Unit-1 Introduction to OP-AMP

UNIT
1
INTRODUCTION TO OP-AMP

1.1 OP-AMP:
Operational amplifier (Op-Amp) is a directly coupled multistage voltage
amplifier with high gain. It has very high input impedance and very low output
impedance. Op-Amps are used for performing mathematical operations such as
addition, subtraction, multiplication, integration and differentiation.

Note: The Op-Amp is used to perform various mathematical operations & is used in all
electronic circuits. Therefore, it is called operational amplifier.
The pin diagram and Op-Amp symbol are shown below in the Figure below.

Figure 1.1: Pin diagram & symbol of Op-Amp

 V1 is the voltage as the Inverting input.
 V2 is the voltage at the Non-Inverting input.
 VO is the output voltage.
 The output voltage VO is directly proportional to the difference between the 2 input
voltages.
i.e., V0 = A (V2 – V1)
where A is the open-loop voltage gain of the OP-AMP.

1.1.1 INVERTING MODE:

Figure 1.2: Inverting amplifier

Page | 1
Unit-1 Introduction to OP-AMP
 In Inverting mode, input is applied to the Inverting terminals and Non-Inverting
terminal is grounded (connected to the ground).
 The amplified voltage is 180 out of phase with respect to applied input voltage.
i.e., V0 =  A V1
Note: Negative sign indicates that output is 180 out of phase.

1.1.2 NON-INVERTING MODE:

In Non-Inverting made, input is applied to the Non-Inverting terminal and
Inverting terminal is grounded (connected to the ground).

Figure 1.3: Non-Inverting amplifier

The amplified output voltage is in phase w.r.t to applied output voltage,
i.e., V0 = A V2

1.2 IDEAL CHARACTERISTICS

Op-Amp is direct coupled multistage voltage amplifier with a very high gain. It has very
high input impedance and very low output impedance.
The ideal characteristics of Op-Amp are:
1. Infinite Voltage gain (AOL = ):
The gain loop voltage gain (AOL) of the ideal Op-Amp is very large, i.e., infinity.
AOL = 
2. Infinite input impedance (Ri = ∞):
An ideal Op-Amp does not draw any current from the voltage source connected to its
input terminals. Thus, its output impedance is infinite. i.e.,
Rin = ∞
3. Zero output impedance (R0 = 0):
The output voltage of an ideal Op-Amp is independent of the current drawn from it.
This means Op-Amp has zero output impedance, i.e.,
R0 = 0
4. Infinite Bandwidth (BW = ∞):
An ideal Op-Amp amplifies signals of any frequency with a constant gain, which implies
that Op-Amp has infinite BW, i.e.,
BW = ∞
5. Infinite CMRR (P = ∞):
CMRR is designed as the ratio of differential voltage gain to common mode voltage gain,
A
CMRR  = d
AC
The common mode refection ratio of on ideal Op-Amp is infinite, i.e.,
CMRR = ∞
6) Infinite slew rate (SR = ∞):
An ideal op amp has infinite slew rate, this implies that the output voltage changes
simultaneously with the input voltages, i.e.,
SR = ∞
7) The characteristics of an ideal Op-Amp do not change with temperature.
8) The power supply rejection ratio of an ideal Op-Amp is zero, i.e., PSRR = 0.
9) Zero offset voltage:

Page | 2
Unit-1 Introduction to OP-AMP
The presence of small output voltage when V1 = V2 = 0 is called as the offset voltage. For
an ideal Op-Amp, offset voltage is zero.
Explain the followings and mention their typical values for 741 Op-Amp IC.
i) CMRR: CMRR is defined as the ratio of the differential gain Ad to the common mod
A
gain AC. CMRR =  = d
AC
CMRR is always expressed in decibels as
 Ad 
(CMRR)dB =  20 log 10  
 AC 
The typical value of CMRR for A741 Op-Amp IC is 90 db.
ii) Slew Rate:
Slew rate of the Op-Amp is defined as the maximum rate of change of its output
voltage w.r.t time & is expressed in volts per microsecond.
dV0
SR = V / s
dt max
For 741 Op-Amp IC, SR = 0.5 v/µsec.

iii) output offset voltage:

When both INPUT terminals are shorted and connected to the ground as shown
in the Figure below, the output should be ideally zero, but practically there exists a
small dc output voltage as output offset voltage. To make this output voltage zero, a
small voltage is required to be applied to one of the INPUT terminals. Such a voltage
makes the output exactly zero. This dc voltage, which makes the output voltage zero is
called input offset voltage 𝑉𝑖𝑜𝑠.

Figure 1.5: output offset voltage

iv) Power supply voltage rejection ratio (PSSR):
PSRR is defined as the ratio of change to INPUT offset voltage due to change in
the supply voltage producing it, keeping other power supply voltage constant. If VEE is
constant & due to change in 𝑉𝐶𝐶 , there is change is input offset voltage, then PSRR is
expressed as
𝜟𝑽
PSSR = 𝜟𝑽𝑰𝑶𝑺 |
𝑪𝑪 𝑽𝑬𝑬 Constant
If VCC is constant & due to change in VEE, there is change in INPUT offset voltage, then
PSRR is expressed as
𝜟𝑽
PSSR = 𝜟𝑽𝑰𝑶𝑺 |
𝑪𝑪 𝑽𝑪𝑪 Constant
v) Input offset voltage:
The dc voltage, which makes the output voltage zero, when the other terminal is
grounded, is called as input offset voltage. It also depends upon the temperature. The
ideal value of INPUT offset voltage is zero but practically this value is small.
vi) INPUT bias current:

Page | 3
Unit-1 Introduction to OP-AMP

Figure 1.6: Input offset voltage

It is defined as the average value of the individual current flowing into the INV and Non-
INV input terminals of the Op-Amp.
I b1  I b 2
PSSR = I B 
2

1.2.1 OPEN-LOOP AMPLIFIER:

Figure 1.7: Open-Loop amplifier

In open loop amplifier, there will be no feedback signal from output to input. The
output voltage is given by
V0 = AOL (V1 – V2)

1.2.2 CLOSED LOOP AMPLIFIER:

The closed loop amplifier is possible wing feedback, i.e., feeding some part of the output
back to the INPUT through resistor. Always Op-Amp is used with negative feedback.
The gain resulting from feedback is called as closed loop gain of the Op-Amp. Due to
negative feedback, gain decreases.

Figure 1.8: Op-Amp with negative feedback

Advantages of negative feedback:
1) It reduces the gain and makes it controllable.
2) It reduces the distortion.
3) It increases the bandwidth
4) It increases the INPUT resistance of the Op-Amp.
5) It decreases the output resistance of the Op-Amp.
6) it reduces the effects of temperature and power supply.
Op-Amp Applications:
1) INV amplifier
2) Non-INV amplifier
3) Voltage follower
4) INV Summer
5) Non-INV summer
6) Difference or Subtractor amplifier
7) Integrator
8) Differentiation

Page | 4
Unit-1 Introduction to OP-AMP
1.2.3 SATURABLE PROPERTY OF OP-AMP:
Saturating property of an Op-Amp is the output voltage which is swinging between the
saturation voltages, i.e., ± Vsat. Thus, if output tries to rise more than +VCC or less than –
VEE, then, it gets clipped & gets saturated at the levels almost equal to +VCC & –VEE.
Practically, the saturation voltage levels are about 90 % of the supply voltage levels.
Thus, for an Op-Amp of supply ±12 V, the saturation voltage levels are 90 % of ± 12 V,
i.e., ± 10.8 V. For example, consider an Op-Amp having gain AOL=105 & supply voltages
±12 V.

Figure 1.9(a): Open Loop Configuration

Figure 1.9(b): Effect of clipping

V0
We know that, AOL = , where Vd = V1 – V2
Vd
V0 = AOL  Vd
where, Vd = ± Vsat = ±12 V in ideal condition.
 Vsat  12 V
Vd = = = 120 V
A OL 10 5
 The differential input to the Op-Amp must be less than ±120 µV to avoid clipping of
the output waves form.
 If a sine wave of 1 mv is applied as the INPUT, then the output will be sine wave
which is clipped at ±Vsat = ±12 V is as shown in Figure above.
 The expected amplitude of output sine wave is
V0 = AoL  Vd
V0 = 105  1 mv
V0 = 100 V
But the output gets clipped at ±12 V due to saturable property of the Op-Amp.

1.3 APPLICATION OF OP-AMP

1.3.1 NON-INVERTING AMPLIFIER:

In Non-INV amplifier, output voltage is amplified & is in-phase with the INPUT signal.
The potential at node B is Vin, hence the potential at node A is same as node B, i.e.,
VA = VB = Vin

Page | 5
Unit-1 Introduction to OP-AMP

Figure 1.10(a): Non-Inverting Figure 1.10(b): Non-Inverting

amplifier amplifier waveforms
From INPUT side, the current I is given by
WE KNOW THAT VA = Vin
VA  0
I1 =
R1
Vin  0 Vin
I1 = = ………………………………………………….… (1)
R1 R1
From output side,
V0  VA
If =
Rf
V0  Vin
If = …………………………………………………………… (2)
Rf
Equating Eq. (1) & (2), we get
Vin V0  Vin
=
R1 Rf
V0 Vin
= 
Rf Rf
V0 Vin Vin
= +
Rf R1 R f
V0  1 1 
= Vin   
Rf  R1 R f 
V0  R  R1 
= Rf  f 
Vin  R1R f 
V0 R f R1
= 
Vin R1 R1
V0  Rf 
= Avf = 1   ………………………………………….……… (3)
Vin  R1 
In Eq. (3), positive sign indicates that the output is in phase with the input.

Page | 6
Unit-1 Introduction to OP-AMP
1.3.2 INVERTING AMPLIFIER:

Figure 1.11(a): Inverting amplifier Figure 1.11 (b):Inverting amplifier waveforms

In INV amplifier, output voltage is amplified and is 180 out of phase with respect to the
INPUT signal. The potential at node B is zero, due to virtual ground concept, the
potential at node A is also zero.
, VA = VB = 0
From INPUT side,
Vin  VA Vin  0
I1 = 
R1 R1
Vin
I1 = ………………………………………………………………………… (1)
R1
From output side,
VA  V0 0  V0
If = 
Rf Rf
V
If =  0 ……………………………………………………………………… (2)
Rf
Equating Eq. (1) & (2), we get
Vin V
=  0
R1 Rf
V0 V
=  in
Rf R1
V0 R 
=   f 
Vin  R1 
 Rf 
Where,   is called as the closed loop gain and is negative in sign. The negative sign
 R1 
indicates that polarity of opposite to the polarity to that of the INPUT.

1.3.3. VOLTAGE FOLLOWER:

Figure 1.12: Voltage follower

A circuit in which the output voltage follows the input voltage is called as the voltage
follower.
The potential at node B is Vin.

Page | 7
 Unit-1 Introduction to OP-AMP
Due to virtual ground concept the potential at node A is also Vin i.e.,
VA = VB = Vin
The node A is directly connected to the output terminal.
V0 = VA
, V0 = Vin.
This circuit is also called source followers, unity gain amplifier or isolation amplifier.

1.3.4 SUMMING OR ADDED AMPLIFIER

When more than one INPUT signal is applied to the INV or Non-INV amplifier, the
OUTPUT contains addition of the applied INPUT signals. Hence, it is called summer or
adder amplifier circuit.

i) INVERTING SUMMER AMPLIFIER CIRCUIT:

Figure 1.13: INV Summer amplifier Circuit

INPUT signals which are to added are applied to the INV INPUT of Op-Amp.
As node B is grounded, due to virtual ground concept, the node A is also at ground
potential, i.e., VA = VB = 0.
From the INPUT side,
V1  VA V1  0
I1 = 
R1 R1
V1
I1 = …………………………………………………………… (1)
R1
V2  VA V2  0
I2 = 
R2 R2
V2
I2 = ……………………………………………………..…… (2)
R2
From output side,
VA  V0 0  V0
If = 
Rf Rf
V
If =  0 …………………………………………………..…… (3)
Rf
Applying KCL at node A,
I1 – I2 – If = 0
If = I1 + I2 ...................................................................................................................... (4)
Substituting Eq. (1), (2), (3) in Eq. (4), we get
V V1 V2
 0 = +
Rf R1 R 2
V V 
V0 =  Rf  1  2 
 R1 R 2 
If R1 = R2 = Rf = R, then

Page | 8
Unit-1 Introduction to OP-AMP
V V 
V0 =  R 1  2 
R R 
=  V1  V2 
R
R
V0 =  [ V1 + V2 ]

ii) NON-INV SUMMING AMPLIFIER:

Due to virtual ground concept, VA = VB

From the INPUT side,
V1  VB
I1 = …………… (1)
R1
V2  VB
I2 = …………… (2)
R2

Figure 1.14: Non-INV summer amplifier Circuit

We know that, input current to Op-Amp is zero.

I1 + I2 = 0 …………… (3)

Substituting Eq. (1) & (2) in Eq. (3), we get

V1  VB V  VB
+ 2 = 0
R1 R2
V1 VB V2 VB
   = 0
R1 R1 R 2 R 2
V1 V2 VB VB
 = 
R1 R 2 R1 R 2
 1 1  V1R 2  V2 R1
VB    =
 R1 R 2  R1R 2
 R  R2  V1R 2  V2 R1
VB  1  =
 R1 R 2  R1R 2
V1R 2  V2 R1
VB = …………… (4)
R1  R 2
Now at node A, we get
VA  0 V
I = = A
R R
WE KNOW THAT VA = VB

Page | 9
Unit-1 Introduction to OP-AMP
VB
I = …………… (5)
R
From the output side
V0  VA
I =
Rf
As VA = VB
V0  Vf V  VB
I = = 0 …………… (6)
Rf Rf
Equating Eq. (5) and (6), we get
VB V0  Vf V0  VB
= =
R Rf Rf
VB V0 Vf V V
=  = 0 B
R Rf Rf Rf Rf
VB Vf V
+ = 0
R Rf Rf
1 1  V0
VB    =
 R Rf  Rf
V0  R  Rf 
= VB  
Rf  R Rf 
 R  Rf 
V0 =VB   …………… (7)
 R 
Substituting Eq. (4) in Eq. (7), we get
 V R  V2 R1   R  R f 
V0 =  1 2    
 R1  R 2   R 
If R1 = R2 = Rf = R, then,
 V1R  V2 R   R  R 
V0 =    
 RR   R 
= R.V1  V2 .
1
R
V0 = V1 + V2

1.3.5 INTEGRATOR:

Figure 1.15: Op-Amp as integrator

 In an integrator Circuit, the output voltage is the integration of the INPUT voltage.
 From virtual ground concept, VA = VB = 0
 As INPUT current of the Op-Amp is zero, the entire current I which flows through R,
also flows through the capacitor Cf.
From the INPUT side we get,

Page | 10
Unit-1 Introduction to OP-AMP
Vin  VA Vin  0
I = 
R1 R1
Vin
I = …………… (1)
R1
From output side,
dVA  VB 
I = Cf .
dt
d0  V0 
I = Cf .
dt
dV0 
I =  Cf . …………… (2)
dt
Equating Eq. (1) and (2), we get
Vin dV0 
=  Cf .
R1 dt
Integrating both sides w.r.t dt, we get
dV0  
t t
 Vin  
  dt =    Cf . dt 
 dt
0 1 
R
0
t
V 
  Rin1  dt =  C f .V0
0
t
1
V0 = 
R1C f  Vin .dt
0

1.3.6 DIFFERENTIATOR:

Figure 1.16: Op-Amp as Differentiator

 The circuit which produces the differentiation of the INPUT voltage at its output is
called differentiator.
 The node B is grounded. Due to virtual ground concept, VA = VB = 0
 The INPUT current of the Op-Amp is zero, entire current I flows through the
resistance Rf.
From INPUT side,
dV  VA 
I = C1. in
dt
As VA= 0,
dV  0
I = C1. in
dt
dV 
I = C1. in …………… (1)
dt
From output side,
VA  V0 0  V0
I = 
Rf Rf

Page | 11
Unit-1 Introduction to OP-AMP
V0
I =  …………… (2)
Rf
Equating Eq. (1) & (2), we get,
dVin  V
C1. =  0
dt Rf
dVin 
V0 =  R f C1. …………… (3)
dt
 The Eq. (3) shows that the output is RfC1 times the differentiation of the input &
product R1C1 is called time constant of the differentiator.
1.3.7 SUBTRACTOR or DIFFERENCE AMPLIFIER:

Figure 1.17: Op-Amp as Subtractor

To find the relation between the INPUT’s & OUTPUT’s, let us use superposition principle
for the Figure 1.17.
Let V01 be the OUTPUT, with INPUT V1 acting, assuming V2 = 0
Let V02 be the OUTPUT, with INPUT V2 acting, assuming V1 = 0
With V2 = 0, the circuit reduces to as shown in Figure 1.18. (i.e., INV amplifier)
From input side,
Since VA = 0,
V1  VA V1  0
I = 
R1 R1
V1
I = …………… (1)
R1

Figure 1.18: Op-Amp as subtractor

From output side,
VA  V01 0  V01
I = 
Rf Rf
V
I =  01 …………… (2)
Rf
Equating Eq. (1) & (2)

Page | 12
Unit-1 Introduction to OP-AMP
V1 V01
= 
R1 Rf
R 
V01 =   f  V1 …………… (3)
 R1 
With V1 = 0, Circuit reduces to as shown in the Figure 1.19, (i.e., Non-INV amp).
Due to virtual ground concept, VB = VA.
Applying voltage divider rule, we get,
VB = I Rf
 Rf 
VB =   V2 …………… (4)
 R2  Rf 

Figure 1.19: Op-Amp as subtractor

From output side,
V02  VA V02  VB
I =  …………… (5)
Rf Rf
VA  0 VB
I =  …………… (6)
R1 R1
Equating Eq. (5) & (6), we get
VB V02  VB
=
R1 Rf
VB V02 VB
= 
R1 Rf R f
VB VB V02
+ =
R1 R f Rf
V02  1 1 
= VB   
Rf  R1 R f 
V02 R  Rf 
= VB  1 
Rf  R1.R f 
R  Rf 
V02 = VB  1 
 R1 
 R 
V02 = VB 1  f  …………… (7)
 R1 
Substituting VB from Eq. (4) in Eq. (7), we get
 Rf   R 
V02 =   V2 . 1  f  …………… (8)
 R2  Rf   R1 
Using superposition principle, we get
V0 = V01 + V02 …………… (9)

Page | 13
Unit-1 Introduction to OP-AMP
Substituting Eq. (3) & Eq. (8) in Eq. (9), we get
R   R   Rf 
V0 =   f  V1 + 1  f  .   V2
 R1   R1   R 2  R f 
R   R  Rf   Rf 
V0 =   f  V1 +  1  .   V2
 R1   R1   R 2  R f 
If R1 = R2 = Rf = R,
R R  R   R 
V0 =    V1 +   .  V2
R  R  RR
V0 =  V1  V2
V0 = V2 – V1

Page | 14