21EC3C03: ANALOG ELECTRONICS

Module 1
Part 6: JFET

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
Module 1

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
Textbooks

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Field Effect Transistor
• The field-effect transistor (FET) is a type of transistor that uses
an electric field to control the flow of current in a semiconductor.

• FETs are devices with three terminals: source, gate, and drain.

• FETs control the flow of current by the application of a voltage to the

gate, which in turn alters the conductivity between the drain and source.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• FETs are also known as unipolar transistors since they

involve single-carrier-type operation.

• That is, FETs use either electrons or holes as charge

carriers in their operation, but not both.

Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• Junction Field Effect Transistor is a semiconductor device in the family
of field effect transistor.
• The field effect transistor is the type of transistor which being operated
by the electric field applied across the junction of the device.
• There are mainly two types of field effect transistor. Junction Field
Effect Transistor or JFET and Metal Oxide Semiconductor Field Effect
Transistor or MOSFET

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• JFET is a voltage control device whereas BJT is a current control device.

• The current through JFET is caused due to the flow of majority carriers
whereas in BJT flow of current is due to both majority and minority
carriers.

• Since only majority carriers are involved in creations of current in JFET,

it is a unipolar device.

• The input impedance of a JFET is very high.

Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Types of JFET
• n channel JFET

• p channel JFET

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Structure - nJFET
• An n channel JFET is made of Si or GaAs bar.
• The bar is doped with n-type impurities.
• One metallic terminal is attached to each of both ends of the bar.
• One of the terminals is called drain terminal, and the other is called the
source terminal.
• Two sides of the bar are highly doped with p-type impurities.
• The region which doped with p-type impurities is called gate region.
• A metallic terminal is connected to the gate region, and the terminal is
called the gate terminal.
Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Structure - pJFET
• a p channel JFET is made of Si or GaAs bar doped with p-type impurities.

• The sides of the bar are highly doped with n-type impurities.

• Here also the drain, and the source terminal are connected to two ends of the bar.

• The terminal attached to the side n-type region is the gate terminal.

• Here in both types of junction field effect transistor both drain and source terminal can
be interchangeable.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
Structure - JFET

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Working principle -nJFET
• If a voltage is applied between drain and source terminal, a current starts flowing through
the device.

• The space between two oppositely doped regions is referred to as channel of the device.

• The current flowing through the channel due to drift of majority carriers.

• The majority carriers enter into the channel through the terminal is referred as to source
terminal and the terminal through which the majority carriers leave the channel is referred
as to drain terminal.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 JFET
• In normal operating condition the drain terminal of n channel JFET is applied with
positive potential and the drain terminal of a p channel JFET is applied with
negative potential

• The gate voltage is kept such in a JFET that the PN junction between the gate
region and the channel is in reverse biased condition

• The width of the depletion layer of this PN junction can be varied by varying gate
terminal voltage

• The opening of the channel depends on the width of the depletion layer
Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• If by changing the gate terminal voltage, the width of the depletion layer
increases, it is extended into the channel and reduces the opening of the
channel and therefore the current through the channel gets decreased.

• Hence by controlling gate voltage we can control the drain current

• Depending on that typical property of the JFET we can use this JFET for
many different electronic applications.

• A JFET can be used as a switch, as an amplifier etc.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• the potential of the channel towards drain terminal is more than that towards source terminal.

• Because the positive terminal of the voltage source gets connected at the drain terminal and
source terminal is grounded.

• Because of voltage distribution along the channel, the portion of the junction nearer to the drain
gets more voltage stress than the lower portion of the junction.

• As a result, the width of the depletion layer nearer to the drain would be more than the lower
portion.

• At that condition flow of majority carriers (here in n channel majority carriers are free electrons)
through the channel continuous due to the applied electrical field between drain and source.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• If we slowly increase the drain voltage, the current through the field effect transistor channel
increases linearly.

• However, this linearity does not continue after a particular drain voltage. That voltage is called
pinch-off voltage.

• When we increase the drain voltage, the channel to gate voltage difference also increases.
However, this difference is more towards the drain terminal. Hence depletion layer towards drain
terminal get thicker faster than that towards source terminal.

• At the pinch-off voltage, the depletion layers touch each other and theoretically blocks the
channel. So theoretically drain current that is current through the channel becomes zero but
practically the current would not be zero rather it gets a constant value.
Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• Now we fix the drain voltage at a certain level and apply a negative voltage at gate
terminal and slowly increase the negative gate terminal voltage.
• If we increase the negative gate terminal voltage from zero to a certain negative value,
the voltage difference between the channel and gate region increases hence the width
of the depletion layer gets increased.
• Hence here also opening of the channel gets reduced which causes a decrease in drain
current even at fixed drain voltage.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• The voltage after which the drain current becomes almost constant is known as pinch-off voltage.

• The drain current at pinch-off voltage when gate terminal is in ground potential, is denoted as IDSS

and known as Shorted Gate Drain Current.

• Now if we go on increasing the drain voltage after a certain value of drain to source voltage, the

depletion layers get broken down and drain current gets suddenly rises.

• This region of the characteristic is called breakdown region.

• The portion of the curve when drain current increases with increasing drain to source voltage is

known as linear region or Ohmic region and the portion of the curve when drain current remains

almost constant is known as constant current or active region.

Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
• open the gate terminal from grounded source terminal and apply certain
negative voltage at gate terminal.

• In this situation the junction between gate region and channel gets more
quick reverse biasing and hence the drain current for same drain to source
voltage becomes lower.

• The entire curve against drain current and drain to source voltage for applied
negative gate voltage, is shifted below the zero gate voltage curve.

• If we apply more negative voltage at gate terminal the curve will shift more
downwards
Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Dr. Remya Jayachandran
Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Transfer Characteristics
• The transfer characteristic is drawn between gate voltage and drain current by keeping drain to source voltage at
pinch-off voltage.

• When the gate is in zero potential the maximum drain current flowing through the transistor is shorted gate drain
current(IDSS).

• Now as the negative potential of the gate increases the corresponding drain current get decreased.

• After a certain negative gate voltage, the drain current becomes zero.

• This negative gate terminal voltage at which drain current becomes zero for the applied drain to source voltage
same as pinch-off voltage is called gate to source cut off voltage VGS(off).

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
P channel JFET characteristics

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
 Properties of JFET
• This is a voltage control device since the current through the channel gets controlled by gate voltage.

• In other words, the electric field across the junction effects the operation of the transistor and that is why it
is named as junction field effect transistor.

• As in normal operating condition, the junction between input gate region and channel remains to reverse
biased, the input impedance of the transistor is high.

• Ideally, there will be no gate current in JFET.

• Majority carriers only contribute the current through the channel in the device, i.e., free electrons in n
channel and holes in p channel and these are the reason why a transistor is called unipolar device.

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022
JFET –Current Equation

Dr. Remya Jayachandran

Assistant Professor, ECED, NIE Mysore
remyajayachandran@nie.ac.in
2022