Advance Processors

INTERNAL ARCHITECTURE

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BUSES AND OPERATION

All internal registers as well as internal and external data buses were 16 bits wide, firmly establishing the "16-bit microprocessor" identity of the 8086. A 20-bit external address bus gave an 1 MB (segmented) physical address space (220 = 1,048,576). The data bus was multiplexed with the address bus in order to fit a standard 40-pin dual in-line package. 16-bit I/O addresses meant 64 KB of separate I/O space (216 = 65,536). The maximum linear address space were limited to 64 KB, simply because internal registers were only 16 bits wide. Some of the control pins, which carry essential signals for all external operations, had more than one function depending upon whether the device was operated in "min" or "max" mode. The former were intended for small single processor systems whilst the latter were for medium or large systems, using more than one processor.

REGISTERS AND INSTRUCTIONS

The 8086 had eight (more or less general) 16-bit registers including the stack pointer, but excluding the instruction pointer, flag register and segment registers. Four of them (AX,BX,CX,DX) could also be accessed as (twice as many) 8-bit registers (AH,AL,BH,BL, etc), the other four (BP,SI,DI,SP) were 16-bit only . As mentioned above 8086 also featured 64 KB of 8-bit (or alternatively 32 K-word or 16-bit) I/O space. A 64 KB (one segment) stack growing towards lower addresses is supported by hardware; 2-byte words are pushed to the stack and the stack top (bottom) is pointed out by SS:SP. There are 256 interrupts, which can be invoked by both hardware and software. The interrupts can cascade, using the stack to store the return address.

SEGMENTATION
There were also four sixteen-bit segment registers (CS, DS, SS, ES, standing for "code segment", "data segment", "stack segment" and "extra segment") that allowed the CPU to access one megabyte of memory in an unusual way. Rather than concatenating the segment register with the address register, as in most processors whose address space exceeded their register size, the 8086 shifted the segment register left 4 bits and added it to the offset address (physical address = 16segment + offset), producing a 20-bit effective address from the 32-bit segment:offset pair. As a result, each physical address could be referred to by 212 = 4096 different segment:offset pairs.

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FLAG REGISTERS

The Flag Register is a special register associated with the ALU. A 16-bit flag register in the EU contains nine active flags. Fig. shows the location of the nine flags in the flag register. Six flags are status flags- AF, CF, OF, SF, PF and ZF. The remaining three flags are control flags DF, IF, and TF.

CF(carry flag) : If this flag is set, there has been a carry out or overflow of the most significant
bit. It is used by instructions that add and subtract multi byte numbers.

PF (parity flag) : If this flag is set, the result has even parity, an even number of 1s. This flag
can be used to check for transmission errors.

AF (auxiliary flag) : If this flag is set, there has been a carry out or borrow of the 4 least
significant bits. This flag is used during decimal arithmetic instructions.

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ZF (zero flag) : If this flag is set, the result of the operation is 0. SF (sign flag) : Since negative binary numbers are represented in the 8086/8088 in standard 2s
complement notation. SF indicates the sign of the result ( 0 = positive, 1 = negative).

TF (trap flag) : Setting TF puts the processor into single-step mode for debugging. In this
mode the MPU automatically generates an internal interrupt after each instruction, allowing a program to be inspected as it executes instruction by instruction.

IF ( interrupt-enable flag) : Setting IF allows the MPU to recognize external (maskable)

interrupt requests. Clearing IF disables these interrupts. IF has no effect on either nonmaskable external or internally generated interrupts.

DF(direction flag) : Setting DF causes string instructions to auto-decrement (count down)

that is, to process strings from the high address to the low address, or from right to left. Clearing DF causes string instructions to auto-increment (count up), or process strings from left to right.

OF (overflow flag) : If this flag is set, an arithmetic overflow has occurred; that is , a
significant digit has been lost because the size of the result exceeded the capacity of its destination location.

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8086 Instruction Set:

Data Transfer Instructions
MOV IN, OUT LEA LDS, LES PUSH, POP XCHG XLAT : Move byte or word to register or memory : Input byte or word from port, output word to port : Load effective address : Load pointer using data segment, extra segment : Push word onto stack, pop word off stack : Exchange byte or word : Translate byte using look-up table

Logical Instructions
NOT AND OR XOR TEST : Logical NOT of byte or word (one's complement) : Logical AND of byte or word : Logical OR of byte or word : Logical exclusive-OR of byte or word : Test byte or word (AND without storing)

Shift and Rotate Instructions

SHL, SHR SAL, SAR ROL, ROR RCL, RCR : Logical shift left, right byte or word by 1 or CL : Arithmetic shift left, right byte or word by 1 or CL : Rotate left, right byte or word by 1 or CL : Rotate left, right through carry byte or word by 1 or CL

Arithmetic Instructions
ADD, SUB ADC, SBB INC, DEC NEG CMP MUL, DIV IMUL, IDIV CBW, CWD : Add, subtract byte or word : Add, subtract byte or word and carry (borrow) : Increment, decrement byte or word : Negate byte or word (two's complement) : Compare byte or word (subtract without storing) : Multiply, divide byte or word (unsigned) : Integer multiply, divide byte or word (signed) : Convert byte to word, word to double word

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Adjustments after arithmetic operations:

AAA, AAS, AAM,AAD :ASCII adjust for addition,subtraction,multiplication,division DAA, DAS : Decimal adjust for add/sub/mul/div(BCD numbers)

Transfer Instructions
JMP : Unconditional jump (short 127/8, near 32K, far between segments)

Conditional jumps:
JA (JNBE) JAE (JNB) JB (JNAE) JBE (JNA) JE (JZ) JG (JNLE) JGE (JNL) JL (JNGE) JLE (JNG) JC, JNC JO, JNO JS, JNS JNP (JPO) JP (JPE) : Jump if above (not below or equal) +127, -128 range only : Jump if above or equal(not below) +127, -128 range only : Jump if below (not above or equal) +127, -128 range only : Jump if below or equal (not above) +127, -128 range only : Jump if equal (zero) +127, -128 range only : Jump if greater (not less or equal) +127, -128 range only : Jump if greater or equal (not less) +127, -128 range only : Jump if less (not greater nor equal) +127, -128 range only : Jump if less or equal (not greater) +127, -128 range only : Jump if carry set, carry not set +127, -128 range only : Jump if overflow, no overflow +127, -128 range only : Jump if sign, no sign +127, -128 range only : Jump if no parity (parity odd) +127, -128 range only : Jump if parity (parity even) +127, -128 range only

Loop control:
LOOP LOOPE (LOOPZ) LOOPNE(LOOPNZ) JCXZ : Loop unconditional, count in CX, short jump to target add. : Loop if equal (zero), count in CX, short jump to target add. : Loop if not equal(not zero),count in CX,short jump to target add. : Jump if CX equals zero (used to skip code in loop)

Subroutine and Interrupt Instructions

CALL, RET INT, INTO IRET : Call, return from procedure (inside or outside current segment) : Software interrupt, interrupt if overflow : Return from interrupt

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String Instructions
MOVS MOVSB, MOVSW CMPS SCAS LODS, STOS : Move byte or word string : Move byte, word string : Compare byte or word string : Scan byte or word string (comparing to A or AX) : Load, store byte or word string to AL or AX

Repeat instructions (placed in front of other string operations):

REP REPE, REPZ REPNE, REPNZ : Repeat : Repeat while equal, zero : Repeat while not equal (zero)

Processor Control Instructions

Flag manipulation:
STC, CLC, CMC STD, CLD STI, CLI LAHF, SAHF PUSHF, POPF : Set, clear, complement carry flag : Set, clear direction flag : Set, clear interrupt enable flag : Load AH from flags, store AH into flags : Push flags onto stack, pop flags off stack

Coprocessor, multiprocessor interface:

ESC LOCK : Escape to external processor interface : Lock bus during next instruction

Inactive states:
NOP WAIT HLT : No operation : Wait for TEST pin activity : Halt processor

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EXECUTING AN 8086 PROGRAM WITH TASM

Go to the MS-DOS command prompt and navigate to the tasm directory using dos commands.(C:\tasm>) To create a new program or edit an existing program : C:\tasm\> edit progname.asm To assemble the program : C:\tasm\> tasm progname.asm Note : If there are any errors or warnings then edit the program and then assemble the program again till there are no errors. To link the program : C:\tasm\> tlink progname.obj To execute the program : For programs in which result is stored in memory : C:\tasm\> debug progname.exe For single stepping : -t or -tnumber For exiting from debug mode : -q

For programs which give output directly on computer screen : C:\tasm\> progname.exe