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tpm8.3l La 312278519190 110930
tpm8.3l La 312278519190 110930
TPM8.3L
LA
19190_000_110913.eps
110913
©
Copyright 2011 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by MB/DoZ/WS 1169 BU TV Consumer CarePrinted in the Netherlands Subject to modification EN 3122 785 19190
2011-Sep-30
EN 2 1. TPM8.3L LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
For on-line product support please use the links in. Here is
product information available, as well as getting started, user
manuals, frequently asked questions and software & drivers.
2011-Sep-30
Technical Specs, Diversity, and Connections TPM8.3L LA 2. EN 3
2.3 Connections
USB
1
VIDEO L - AUDIO - R
3
7 6
HDMI
4
TV ANTENNA
AUDIO
PC IN 5
VGA
CVI 2/AV
SERV.U Y/VIDEOPB PR L R
HDMI 1 AV out
VIDEO L R Y PB PR L R
CVI 1
8 9 10 11
19190_001_110901.eps
110923
Note: The following connector colour abbreviations are used 3 - Cinch: Video CVBS - In, Audio - In
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Ye - Video CVBS 1 VPP / 75 Ω jq
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. Rd - Audio R 0.5 VRMS / 10 kΩ jq
Wh - Audio L 0.5 VRMS / 10 kΩ jq
2.3.1 Side Connections
4 - HDMI: Digital Video, Digital Audio - In
1 - USB 2.0 19 1
18 2
10000_017_090121.eps
1 2 3 4 090428
10000_022_090121.eps
090121
Figure 2-3 HDMI (type A) connector
Figure 2-2 USB (type A)
1 - D2+ Data channel j
2 - Shield Gnd H
1 - +5V k
3 - D2- Data channel j
2 - Data (-) jk
4 - D1+ Data channel j
3 - Data (+) jk
5 - Shield Gnd H
4 - Ground Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
2 - Head phone (Output) 8 - Shield Gnd H
Bk - Head phone 80 - 600 Ω / 10 mW ot 9 - D0- Data channel j
10 - CLK+ Data channel j
2011-Sep-30
EN 4 2. TPM8.3L LA Technical Specs, Diversity, and Connections
2011-Sep-30
Precautions, Notes, and Abbreviation List TPM8.3L LA 3. EN 5
2011-Sep-30
EN 6 3. TPM8.3L LA Precautions, Notes, and Abbreviation List
The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number “1” algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a “2” (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit
AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g.
AP Asia Pacific
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. AR Aspect Ratio: 4 by 3 or 16 by 9
code, digit 4 refers to the Service version change code, digits 5
ASF Auto Screen Fit: algorithm that adapts
and 6 refer to the production year, and digits 7 and 8 refer to
aspect ratio to remove horizontal black
production week (in example below it is 2010 week 10 / 2010 bars without discarding video
week 17). The 6 last digits contain the serial number.
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
B-TXT Blue TeleteXT
10000_053_110228.eps
110228
C Centre channel (audio)
CEC Consumer Electronics Control bus:
Figure 3-1 Serial number (example) remote control bus on HDMI
connections
3.3.7 Board Level Repair (BLR) or Component Level Repair CL Constant Level: audio output to
(CLR) connect with an external amplifier
CLR Component Level Repair
If a board is defective, consult your repair procedure to decide ComPair Computer aided rePair
if the board has to be exchanged or if it should be repaired on CP Connected Planet / Copy Protection
component level. CSM Customer Service Mode
If your repair procedure says the board should be exchanged CTI Color Transient Improvement:
completely, do not solder on the defective board. Otherwise, it manipulates steepness of chroma
cannot be returned to the O.E.M. supplier for back charging! transients
CVBS Composite Video Blanking and
3.3.8 Practical Service Precautions Synchronization
DAC Digital to Analogue Converter
• It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
While some sources are expected to have a possible low frequency amplification
dangerous impact, others of quite high potential are of DCM Data Communication Module. Also
limited current and are sometimes held in less regard. referred to as System Card or
• Always respect voltages. While some may not be Smartcard (for iTV).
dangerous in themselves, they can cause unexpected DDC See “E-DDC”
reactions that are best avoided. Before reaching into a D/K Monochrome TV system. Sound
powered TV set, it is best to test the high voltage insulation. carrier distance is 6.5 MHz
It is easy to do, and is a good service precaution. DFI Dynamic Frame Insertion
2011-Sep-30
Precautions, Notes, and Abbreviation List TPM8.3L LA 3. EN 7
DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I 2C Inter IC bus software upgrade via RF transmission.
I2D Inter IC Data bus Upgrade software is broadcasted in
I2S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (colour
Telecommunication Union relating to carrier = 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (colour carrier
2011-Sep-30
EN 8 3. TPM8.3L LA Precautions, Notes, and Abbreviation List
2011-Sep-30
Mechanical Instructions TPM8.3L LA 4. EN 9
4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assembly/Panel Removal
4.4 Set Re-assembly
19190_100_110901.eps
110926
4.2 Service Positions cover by the other hand to release the clips at the right side
of the rear cover, see Figure 4-3 and Figure 4-4, then use
the same method to release the clips at the left side of the
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop rear cover. Lift bottom side of the rear cover to release clips
at the top side of rear cover, see Figure 4-5.
tools. Ensure that a stable situation is created to perform
3. Lift the rear cover from the TV. Make sure that wires and
measurements and alignments. When using foam bars take
flat foils are not damaged while lifting the rear cover from
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can the set.
seriously damage the display!
Ensure that ESD safe measures are taken.
2011-Sep-30
EN 10 4. TPM8.3L LA Mechanical Instructions
Pull up
3 × 16
3×8
3
M3 × 8
4 4
3
3
Push down
2 2 2 2
19190_101_110913.eps
110913 18860_107_100428.eps
100428
Figure 4-2 Rear cover removal [1/4]
Figure 4-5 Rear cover removal [4/4]
Push down
Refer to Figure 4-6 for details.
Caution: it is mandatory to remount all different screws at their
original position during re-assembly. Failure to do so may result
Pull up in damaging the SSB.
1. Release the clips from both the LVDS cables/Flat Foils
connectors that connect to the SSB [1].
Caution: be careful, as these are very fragile connectors!
2. Release the clamps and unplug all other connectors [2].
3. Remove all fixation screws [3] from the SSB.
4. Take out of the SSB. Refer to Figure 4-6 for details.
18860_105_100428.eps 3
100428 3
1
2
3 3
18860_106_100428.eps
100428 19190_102_110901.eps
110926
Figure 4-4 Rear cover removal [3/4]
Figure 4-6 SSB removal
2011-Sep-30
Mechanical Instructions TPM8.3L LA 4. EN 11
18860_108_100429.eps
100601
2011-Sep-30
EN 12 5. TPM8.3L LA Service Modes, Error Codes, and Fault Finding
5.2 Service Modes Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
The Service Mode feature is split into four parts: activation of the Service modes. For instance the old “MENU”
• Service Default Mode (SDM). button is now called “HOME” (or is indicated by a “house” icon).
• Service Alignment Mode (SAM).
• Customer Service Mode (CSM). 5.2.1 General
• Computer Aided Repair Mode (ComPair).
Next items are applicable to all Service Modes or are general.
Table 5-1 Service mode overview
Life Timer
Service Modes Description During the life time cycle of the TV set, a timer is kept (called
SAM Service alignment mode “Op. Hour”). It counts the normal operation hours (not the
Stand-by hours). The actual value of the timer is displayed in
SDM Service default Mode
SDM and SAM in a decimal value. Every two soft-resets
CSM Customer Service Mode, a 3-page compact increase the hour by + 1. Stand-by hours are not counted.
status overview of the set. These pages will
be written to a dump file on a USB memory
Software Identification, Version, and Cluster
stick upon entering CSM-mode
The software ID, version, and cluster will be shown in the main
USB software Software upgrading of flash memories menu display of SDM, SAM, and CSM.
upgradeable MTK-chips MT5301B can be done via USB. The screen will show: “AAAAAB X.YY”, where:
The main software can be upgraded via • AAAAA is the chassis name.
Autorun.upg • B is the region indication: E = Europe, A = AP/China, U =
NVM-Editor in NVM-editor provides address and data field NAFTA, L = LATAM.
SAM editing • X is the main version number: this is updated with a major
Service Data New Service data in SAM for CTN, Prod. change of specification (incompatible with the previous
no., and 12NC programming with a virtual software version). Numbering will go from 01 - 99 and
keyboard AA - ZZ.
USB copy/paste Channel list, NVM data, Readable info - If the main version number changes, the new version
in SAM number is written in the NVM.
- If the main version number changes, the default settings
UART logging UART logging is available, however no
are loaded.
specification of the output, according to
• YY is the sub version number: this is updated with a minor
MTK definition.
change (backwards compatible with the previous
Blind SAM Remote control sequence “062598” + versions). Numbering will go from 00 - 99.
“Menu” + “Panel code” - If the sub version number changes, the new version
Clear Buffer RC sequence “062599” + “OK” or via SAM number is written in the NVM.
- If the NVM is fresh, the software identification, version,
SDM and SAM offer features, which can be used by the Service and cluster will be written to NVM.
engineer to repair/align a TV set. Some features are:
• A pre-defined situation to ensure measurements can be 5.2.2 Service Default Mode (SDM)
made under uniform conditions (SDM).
• Activates the blinking LED procedure for error identification Purpose
when no picture is available (SDM). Set the TV in SDM mode in order to be able to create a
• Make alignments (e.g. White Tone), reset the error buffer predefined setting for measurements to be made. In this
(SAM). platform, a simplified SDM is introduced (without protection
override and without tuning to a predefined frequency).
2011-Sep-30
Service Modes, Error Codes, and Fault Finding TPM8.3L LA 5. EN 13
Purpose
How to Activate SDM
• To modify the NVM.
To activate SDM, use the following methods:
• To display/clear the error code buffer.
• Press the following key sequence on the RC transmitter:
• To perform alignments.
“062596”, directly followed by the “MENU” button.
Note: It is possible that, together with the SDM, the main
menu will appear. To switch it “off”, push the “MENU” Specifications
button again. • Operation hours counter (maximum five digits displayed).
After activating this mode, “SDM” will appear in the upper right • Software version, error codes, and option settings display.
corner of the screen (when a picture is available). • Error buffer clearing.
• Option settings.
• Software alignments (White Tone).
On Screen Menu
• NVM Editor.
After activating SDM, the following items are displayed, with
• Set screen mode to full screen (all content is visible).
“SDM” in the upper right corner of the screen to indicate that the
television is in Service Default Mode. Menu items and
explanation: How to Activate SAM
• xxxxx Operating hours (in decimal). To activate SAM, use one of the following methods:
• AAAAAB X.YY See paragraph Software Identification, • Press the following key sequence on the remote control
Version, and Cluster for the SW name definition. transmitter: “695260”, directly followed by the “Info” button.
• ERR Shows all errors detected since the last time the Do not allow the display to time out between entries while
buffer was erased in format <xxx> <xxx> <xxx> <xxx> keying the sequence.
• Or via ComPair.
<xxx> (five errors possible).
After entering SAM, the following items are displayed,
• OP Used to read-out the option bytes. Ten
with “SAM” in the upper right corner of the screen to indicate
codes (in two rows) are possible.
that the television is in Service Alignment Mode.
19190_200_110902.eps
110902 19190_201_110902.eps
110926
Figure 5-1 SDM menu
Figure 5-2 Example of SAM
How to Navigate
As this mode is read only, there is not much to navigate. To
switch to other modes, use one of the following methods:
• Command MENU from the user remote will enter the
normal user menu (brightness, contrast, colour, etc...) with
“SDM” OSD remaining, and pressing MENU key again will
return to the last status of SDM again.
• To prevent the OSD from interfering with measurements in
SDM, command “OSD” or “i+” (“STATUS” or “INFO” for
NAFTA and LATAM) from the user remote will toggle the
OSD “on/off” with “SDM” OSD remaining always “on”.
2011-Sep-30
EN 14 5. TPM8.3L LA Service Modes, Error Codes, and Fault Finding
B Gain
Normal R Gain
G Gain
B Gain
Cool R Gain
G Gain
B Gain
Store Store the RGB value
NVM editor Address Select and fill the NVM address
Value Select and fill the NVM value
Store Store the value in the address
Upload to USB Copy Channel List to USB To upload several settings from the TV to an USB stick
Copy NVM to USB
Copy Readable Info to USB
Download from USB Copy Channel List from USB To download several settings from the USB stick to the TV
Copy NVM from USB
Copy Readable Info from USB
Initialize NVM Press [OK] to Initialize NVM To initialize a (corrupted) NVM. Be careful, this will erase all settings.
immediately
EDID Write Enable Press [OK] to enable EDID Enable EDID writable
writable immediately
Service Data Type Number Press [OK] use key pad edit type Use Key pad to edit several service data
number immediately
Production Number Press [OK] use key pad edit
production number immediately
12NC SSB Press [OK] use key pad edit SSB
immediately
12NC PSU Press [OK] use key pad edit PSU
immediately
12NC Display Press [OK] use key pad edit display
immediately
2011-Sep-30
Service Modes, Error Codes, and Fault Finding TPM8.3L LA 5. EN 15
2011-Sep-30
EN 16 5. TPM8.3L LA Service Modes, Error Codes, and Fault Finding
Digital Digital
background background
tasks started tasks completed
TV Wakeup
commands
Received
(TV Wakeup Standby
keys) commands Swith On,
Semi-
previously in
Received (RC Standby Standby/Semi-
Standby key) Standby (Mains
Power Plug)
Standby
Standby Soft Mode Soft Mode
Command Received, Command Switch Off (Mains
previously in Standby Received Power Plug)
TV Wakeup Soft Mode (Power (Power tact
commands tact switch) switch)
Received
(TV Wakeup Switch Off
keys) (Mains Power
Switch On, previously Plug)
in Power On Mode Standby Power Off
Power On (Power tact switch) Soft Mode Swith On,
previously in
Standby Soft Mode Standby Soft Mode
Command Received, (Mains Power Plug)
(Power tact switch)
19080_206_110323.eps
110401
2011-Sep-30
Service Modes, Error Codes, and Fault Finding TPM8.3L LA 5. EN 17
5.4 Service Tools Note: When you encounter problems, contact your local
support desk.
5.4.1 ComPair
Additional cables for VCOM Alignment
Introduction • ComPair/I2C interface cable: 3122 785 90004.
ComPair (Computer Aided Repair) is a Service tool for Philips • ComPair/VGA adapter cable: 9965 100 09269.
Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to Note: When you encounter problems, contact your local
repair the chassis in a short and effective way. support desk.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No 5.5 Software Upgrading
knowledge on I2C or UART commands is necessary,
because ComPair takes care of this.
5.5.1 Description
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the
microprocessor is working) and all repair information is It is possible for the user to upgrade the main software via the
directly available. USB port. This allows replacement of a software image in a
4. ComPair features TV software up possibilities. stand alone set. A description on how to upgrade the main
software can be found in the DFU or on the Philips website.
Specifications
ComPair consists of a Windows based fault finding program 5.5.2 Introduction
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an Philips continuously tries to improve its products, and it’s
USB cable. For the TV chassis, the ComPair interface box and recommend that the TV software is updated when updates are
the TV communicate via a bi-directional cable via the service available. Software update files can be obtained from the
connector(s). dealer or can be downloaded from the following websites:
The ComPair fault finding program is able to determine the http://www.philips.com/support
problem of the defective television, by a combination of
automatic diagnostics and an interactive question/answer Preparing a portable memory for software upgrade
procedure. The following requirements have to be met:
1. A personal computer connected to the Internet.
How to Connect 2. An archive utility that supports the ZIP-format (e.g. WinZip
This is described in the chassis fault finding database in for Windows or Stufflt for Mac OS).
ComPair. 3. A USB flash drive (preferably empty).
TO TV Note:
TO TO TO
1. Only FAT/DOS-formatted flash drives are supported.
UART SERVICE I2C SERVICE UART SERVICE
CONNECTOR CONNECTOR CONNECTOR 2. Only use software update files that can be found on the
http://www.philips.com/support web site.
ComPair II
Multi
RC in RC out
function 5.5.3 Check the current TV software version
Optional power
HDMI 5V DC 5.5.4 Download the latest software
I2C only
How to Order 1. Insert mains power and wait for system to boot completely.
ComPair II order codes: 2. Insert the USB flash drive that contains the software
• ComPair II interface: 3122 785 91020. update files.
• Software is available via the Philips Service web portal. 3. The TV will detect the USB flash drive automatically. Then
• ComPair UART interface cable for TPM8.3x xx. a window jumps out as Figure 5-8.
(using DB9 to 2mm pitch JST connector): 3122 785 90630. Note: If the USB flash drive is not detected after power up,
disconnect it and re-insert it.
4. Select [Update] and press OK. See Figure 5-8.
2011-Sep-30
EN 18 5. TPM8.3L LA Service Modes, Error Codes, and Fault Finding
5. To proceed, in next menu select [Start] and press OK to 5.5.6 Content and Usage of the One-Zip Software File
start software updates. See Figure 5-9.
6. Upgrading will now begins and the status of the updating Below you find a content explanation of the One-Zip file, and
progress will be displayed. instructions on how and when to use it. Only files that are
7. When the TV software is updated. Remove your USB flash relevant for Service are mentioned here.
drive, then select [Restart] and press OK to restart the • FUS_clustername_version.zip: Contains the
TV.See Figure 5-10. “autorun.upg” which is needed to upgrade the TV main
software and the software download application.
• NVM_clustername_version.zip: Default NVM content.
Must be programmed via ComPair.
When copying data to and from a USB memory stick, the folder
“repair” is used. When inserting an empty USB memory stick,
and downloading data to the stick, the TV will create this folder.
When sending data from a USB memory stick to a TV, the
intended data must be available in the “repair” folder.
While copying to or from the USB “Repair” Folder to TV, the
files need to be named accordingly:
19080_207_110324.eps • Channel List: CM_TP83L_LA_CK.BIN
110324 • NVM: NVM_TPM83L_LA_CK.BIN
5.6.1 Introduction
2011-Sep-30
Service Modes, Error Codes, and Fault Finding TPM8.3L LA 5. EN 19
5.8 Fault Finding and Repair Tips Attention: In case the SSB is replaced, always check the
Display Code in CSM, even when picture is available.
Note: Performance with the incorrect display option code can lead to
• It is assumed that the components are mounted correctly unwanted side-effects for certain conditions.
with correct values and no bad solder joints.
• Before any fault finding actions, check if the correct options
are set.
2011-Sep-30
EN 20 6. TPM8.3L LA Alignments
6. Alignments
Index of this chapter: Table 6-1 White tone default settings
6.1 General Alignment Conditions
6.2 Hardware Alignments Colour temperature
Screen
6.3 Software Alignments
Picture mode size Red Green Blue
6.4 Option Settings
6.5 Reset of Repaired SSB Normal 22" 128 118 107
(9000K)
Cool (11000K) 22" 128 126 124
6.1 General Alignment Conditions Warm (6500K) 22" 128 106 68
For the next alignments, supply the following test signals via a CTN_ALT BOM# Panel Type Display Code
video generator to the RF input: 22PFL3606/77 LGD LC216EXN-SDA1 135
• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz
• US/AP-NTSC models: an NTSC M/N TV-signal with a 6.5 Reset of Repaired SSB
signal strength of at least 1 mV and a frequency of
61.25 MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal A very important issue towards a repaired SSB from a Service
strength of at least 1 mV and a frequency of 61.25 MHz repair shop (SSB repair on component level) implies the reset
(channel 3). of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
“00PF0000000000” and Production code “00000000000000”.
6.3.1 Display adjustment
Also the virgin bit (MENU > Setup > TV settings > Reinstall TV
> Start now) is to be set. To set all this, you can use the
You can use the default values. The default values are average ComPair tool or use the “NVM editor” and “Service Data” items
values coming from production. in SAM (do not forget to “store”).
• Enter SAM mode.
• Select a colour temperature (e.g. COOL, NORMAL, or
After a repaired SSB has been mounted in the set (set repair
WARM).
on board level), the type number (CTN) and production code of
• Set the RED, GREEN and BLUE default values according
the TV has to be set according to the type plate of the set. For
to the values in Table 6-1.
this, you can use the NVM editor in SAM. The loading of the
• When finished press OK on the RC, then press STORE to
CTN and production code can also be done via ComPair
store the aligned values to the NVM.
(Model number programming).
• Restore the initial picture settings after the alignments.
2011-Sep-30
Circuit Descriptions TPM8.3L LA 7. EN 21
7. Circuit Descriptions
Index of this chapter: Notes:
7.1 Introduction • Only new circuits (circuits that are not published recently)
7.2 Power Supply are described.
7.3 Power Management • Figures can deviate slightly from the actual situation, due
7.4 Circuit Description to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
The TPM8.3L LA platform uses MT5301B. It supports decoder Key components of this chassis are:
and a TV controller offers high integration for advanced • MT5301B System-On-Chip (SOC) TV Processor
applications. It combines a high definition video decoder, an • F35CT-6-E Tuner (analogue)
audio decoder, a dual-link LVDS/mini-LVDS transmitter, and • TPA6132A2RTER Head Phone amplifier
an NTST/PAL/SECAM TV decoder with a 3D comb filter • AD82587 audio amplifier
(NTSC/PAL). • TMDS361BPAGR HDMI switch
LCD PANEL
A RF
TUNER Analog IF+/- ATV
DEMOD
RGB
PC IN
DDC CVBS Out
24C02
CVI × 2
YPbPr
MT5301B SPDIF
CVBS
CVBS × 2
HeadPhone Out
TMDS361B
HDMI1
DDC 24C02
DDC
HDMI2 [RX0 : RX3]
DDC 24C02
DDC
HDMI3 SPK
DDC 24C02
DDC I2S
AUDIO AMP
AD82587
USB1 2.0
USB1 2.0
I2C
NVM
KEY RC UART 128kb
19190_205_110902.eps
110926
2011-Sep-30
EN 22 7. TPM8.3L LA Circuit Descriptions
DC-DC
DDR2
MT5301BCMU USB
AV OUT
Audio
AMP
TUNER
AV IN
Audio
HDMI MUX
VGA
SERV.U
CVI 1
AV Out
HDMI
19190_206_110905.eps
110926
2011-Sep-30
Circuit Descriptions TPM8.3L LA 7. EN 23
7.2.2 Diversity
Before checking other parts first check whether fuse on the
PSU is not broken. Always replace a defective fuse with one
with the correct specifications! This part is available in the The diversity in power supply units is mainly determined by the
regular market. diversity in screen sizes, but please note to always order the
Consult the Philips Service web portal for the order codes of the correct replacement.
boards.
24V 12V 5V
FB702
NC/FB701
FB703
LDO DDR2
5 VSB 3 V3 SB DV33SB H5PS1G63EFR-G7C
G903T63UF
U705 DDRV 1Gb-1066MHz
FB727 FB728 U402
DVDD3V3
+24V +12V 5VSB BUCK (2A)
>=26" G5657F12U
VCCK VCCK MT5301B NOR FLASH
FB726 OPWRSB U704 MX25L6445EM2I-10G
L704 AVDD3V3 U401 NC/U405
5V_SW BUCK
SC189 AVDD1V2 AVDD1V2
FB729 U706
FB730 NAND FLASH
ADAC_PWR HY27US08561A-TPCB
5V_SW BUCK DDRV U403
SC189
FB718 U702 FB719
VCCK EEPROM
AO4449 5 V_ SW 5V_SW BUCK (2A) 3 V3 _ BUCK DVDD3V3 AT24C128BN-SH-B
5VSB Q707 SC189 U4103
FB715 U701 L701 FB716
AVDD3V3 DV33_TMDS HDMI SW
TMDS361BPAGR
FB717 FB502 U501
AVDD3V3_HP HP AMP
TPA6132A2
R631 U606
DVDD3V3_AMP
FB604
5V_SW 5VDD
FB501
5V_MEMC
USB2
+12V R754 LDO LDO_USB2 VUSB2_5V
G9084-50TU3U USB Connect
U709 NC/FB1006 TH1002 CN104
FB1008
TH1003
SW
STMPS2171STR
NC/U1002
VUSB5V USB_PWR_ENx
5V_SW
FB1007 USB1
USB_PWR_ENx
SW VUSB1_5V USB Connect
STMPS2171STR CN103
NC/U1001
5V_SW AMUX_5V Audio-in SW
CD4052BPWR
FB101 U102
TH1001
LDO V3.3 LDO
5V_SW V1.2 VDD12
G903T63UF G912T63UF
FB731 U707 FB732 FB733 U708
NC/FB1109 Demod.
AVDD1V2 ATBM8848
ASIC_3V3
NC/U101
NC/FB1110
LVDS_PWR_EN LVDS Connect VDD33
5VSB CN408 (40P)
FB711 MOS SW LVDSVDD
AO4449 FB1107
5V_BUCK NC/FB712 Q709 LVDS Connect AVDD3V3
NC/CN409 (30P)
+12V NC/FB713 NC/FB1108
>=26"
BUCK_USB2
FB1111
AVDD3V3
NC/FB1112
NC/FB725
19190_207_110905.eps
110905
2011-Sep-30
EN 24 7. TPM8.3L LA Circuit Descriptions
10K 1/16W 5%
2.7K 1/16W 1%
2.7K 1/16W 1%
power board, to receive the power and signals from the PSU. 220N16V
U4103
See Table 7-1 for the correct pining, The shown test points in
1 8
Figure 7-4. 2 E0
E1
VCC
WC
7
3 6 OSCL0
4 E2 SCL 5 OSDA0
VSS SDA
Table 7-1 Connector CN701 overview CAT24C128Y I R4106
2.2K 1/16W MEMORY _WP#
I2C address at A0
Q4101
Item Pin Description PMBS3904 R4109
10K 1/16W 5%
H: Write Enable
L: Write Protect
1 1 INVERTER_ON_OFF, Inverter board
control (Low: ON, High: OFF)
2 2 BRIGHT_ADJ, Inverter bright PWM 19190_212_110905.eps
control (Max.: 0 V, Min.: 3V3) 110905
3 3, 4 +12 V Supply
4 5, 6, 7 Ground Figure 7-6 NVM (U4103)
5 8, 9 +24 V Supply
6 10 STANDBY, Standby 7.4.4 Reset (U4101)
control (High: Normal, Low: Stand by)
7 11, 12 STB_PWR5V, +5VSB Supply When the input voltage for the MT5301B main processor drops
8 13 POWER OK below 2.93 V, a system reset will be enforced by U4101.
3V3SB 5VSB
3V3SB
CN701
R4139
1 BL_CTRL NC/FB701 +12V 0R05 1/16W R4111
2 BRI_ADJ
3 1 2
NC/820R 1/10W 1%
4 120R/6000mA
5 + NC/C702
6 NC/C701 100N 50V 1 3
7 330UF 35V FB702 +24V R4140 GND CC
RESETV
8
9 1 2 NC/5K1 1/16W 5%
10 120R/6000mA
11 +
12 C703 C704 C4107 R4112
13 330UF 35V 100N 50V R4108 100N 16V NC/1K8 1/10W 1%
R712 ORESET# 2
CONN PSU_STBY
3
8.2K 1/10W
R701
H : ON 0R05 1/16W U4101
10K 1/16W 5% ZD701 L : Standby MAX809STRG
NC/BZX84C3V6 R738
NC/0R05 1/16W C4123 R4110
NC/10P 50V NC/100K 1/16W
1
FB703 5VSB
OPWRSB
1 2
120R/6000mA
+ C705
470UF 10V C706
10uF 10V
19190_213_110905.eps
PWR_OK
R750 110905
0R05 1/10W
DVDD3V3
U403
R4117 1 48
4K7 1/16W 5% 2 NC1 NC28 47
3 NC2 NC27 46
4 NC3 NC26 45
5 NC4 NC25 44 PDD7
R4115
6 NC5 I/O7 43 PDD6
4K7 1/16W 5% NC6 I/O6
PARB# 7 42 PDD5
POOE# 8 RY /BY 1 I/O5 41 PDD4
POCE1# 9 RE I/O4 40
CE1 NC24 DVDD3V3
10 39
11 NC7 NC23 38
DVDD3V3 12 NC8 PRE 37 DVDD3V3
13 VCC1 VCC2 36
14 VSS1 VSS2 35
C4108 15 NC9 NC22 34
100N 16V PACLE 16 NC10 NC21 33 C4109 C4110
PAALE 17 CLE NC20 32 PDD3 100N 16V 10uF 10V
POWE# 18 ALE I/O3 31 PDD2
FLASH_WP# 19 WE I/O2 30 PDD1
20 WP I/O1 29 PDD0
21 NC11 I/O0 28
22 NC12 NC19 27
23 NC13 NC18 26
24 NC14 NC17 25
NC15 NC16
HY 27US08561A-TPCB
19190_211_110905.eps
110905
2011-Sep-30
Circuit Descriptions TPM8.3L LA 7. EN 25
AMP_RB
AMP_RA
AMP_LA
AMP_LB
AMP_PWR
AMP GND
49
48
47
46
45
44
43
42
41
40
39
38
37
LA
GNDL
LB
VDDLB
VDDRB
RB
RA
NC
NC
NC
GNDR
NC
THERMALPAD
DVDD3V3_AMP
1 36
2 VDDLA VDDRA 35
3 NC NC 34
4 NC NC 33
5 NC NC 32
NC U602 NC
R648 AMP_PLL# 6 31
AOMCLK 7 PLL AD82587-LE48NAY NC 30
MCLK NC DVDD3V3_AMP
33R 1/16W 5% 8 29
9 CLK_OUT NC 28
10 DGND NC 27
R649 AMP_DEF 11 DVDD DVDD 26
AOSDATA0 12 DEF DGND 25 OSDA0
33R 1/16W 5% SDATA ERROR SDA
RESET
MONO
LRCIN
BCLK
SCL
SA0
SA1
NC
NC
NC
PD
13
14
15
16
17
18
19
20
21
22
23
24
OSCL0
AMP_PD#
AMP_MONO
AMP_ERROR#
AMP_RESET#
AOBCLK
R651 33R 1/16W 5%
AMP_PD#
R654
AMP_PD# C631 0R05 1/16W
H: ON 0.47uF 16V
L: Pow er Dow n
19190_214_110905.eps
110905
1 2
FB721 FB722 FB723
FB720 NC/120R/3000mA 120R/3000mA 120R/3000mA
120R/3000mA NC/120R/3000mA AOZ1242AI C738
U703 C735 NC/1UF 10V
100N 50V L703
1
8 1
1
7 VBIAS LX 2 15uH
6 VIN BST 3
EN GND 5V_BUCK FB725 BUCK_USB2
5 4
R734 COMP FB
47K 1/16W 5% R736 1 2
2
+ 56K 1%
C729 C730 C733 NC/120R/3000mA
100UF 50V 1uF 50V 1.2nF 50V D702 C736 C737 C739
C731 C732 R737 SX34 10uF 25V 10uF 25V NC/1UF 10V
180P 50V
15K 1/16W 5%
19190_210_110905.eps
110926
2011-Sep-30
EN 26 7. TPM8.3L LA Circuit Descriptions
DVDD3V3_AMP
+12V 5V_SW 5VSB V_MUTE
R621
470K 1/16W 5%
D603 AMP_PD#
D601 D602 BAT54C
NC/1N4148W H: ON
BAT54C R620 L: Pow er Dow n
Q604
V_MUTE 2 3 10K 1/16W 5% PMBS3904
Q603
PMBS3906
1
R618
47K 1/16W 5%
R619
5VSB +12V 5V_SW V_MUTE 10K 1/16W 5%
H: UN-MUTE
A_MUTE L: MUTE
R624 V_MUTE
R630 R665 R622 2.2K 1/16W
NC/100R 1/16W 5%
NC/100R 1/16W 5%
100R 1/16W 5%
3
C603 R628
100N 50V 10K 1/16W 5%
1K 1/16W 5%
ZD601 R627 L : Mute
BZX84C3V6 R626 Q602 Q605 H : Un-mute
1K 1/16W 5% PMBS3904 PMBS3904
1
Q601 POP_MUTE#
PMBS3904 C604 Q606 R629
1uF 16V PMBS3904 1K 1/16W 5%
R623
470OHM1/10W
19190_215_110905.eps
110905
The circuit around U701 will provide the main 3.3 V power
supply to the SSB.
1 2
FB715
120R/3000mA C722
120R/3000mA
U701 SC189ASKTRT
L701
1UF 10V
1 5
R728 VIN LX
1
GND
3 4 2.2uH
1K 1/16W 5% EN VOUT R729 C719 C720 C721
3V3_BUCK FB717 AVDD3V3
23.7K 1%
C717 C718 10N 50V 10U 16V 10U 16V
2
19190_209_110905.eps
110926
7.4.9 Tuner
2011-Sep-30
IC Data Sheets TPM8.3L LA 8. EN 27
8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic”
ICs).
Block diagram
Tuner CVBS/ Component HDMI Tuner Audio Panel 16-bit
In YC Input Analog Input Rx In Input DDR2/DDR3
VDO-In JPEG/MP2/MP
ARM11 4/DivX/H.264/V
OSD
C-1/RM/AVS
BIM De-interlace scaler
2-D Graphic
DRAM Bus
IO Bus
CKGEN
Audio DSP 2
JTAG IrDA IC USB2.0 Watchdog Serial Flash Servo ADC
Audio I/F
Audio DAC BScan PCR RTC UART SDIO PWM NAND Flash
19160_300_110622.eps
110623
2011-Sep-30
19160_301_110622.eps
110622
192 AVDD33_XTAL_STB
133 AVDD33_PDM_STB
149 AVDD33_VGA_STB
189 AVDD33_DEMOD
183 AVDD12_DEMOD
185 ADCINN_DEMOD
188 AVSS33_DEMOD
187 AVSS12_DEMOD
184 ADCINP_DEMOD
186 AVDD33_IFPGA
171 AVDD33_VDAC
182 AVDD33_CVBS
167 AVDD12_RGB
168 AVSS12_RGB
148 AVDD10_LDO
174 AVDD12_PLL
170 VDAC_OUT1
169 VDAC_OUT2
180 CVBS_COM
147 ADIN4_SRV
146 ADIN3_SRV
145 ADIN2_SRV
144 ADIN1_SRV
143 ADIN0_SRV
140 VGA_SDA
141 VGA_SCL
138 OPCTRL1
137 OPCTRL0
132 OPCTRL2
131 OPCTRL4
130 OPCTRL3
129 OPCTRL5
172 FS_VDAC
139 OPWRSB
181 CVBS0P
179 CVBS1P
151 HSYNC
150 VSYNC
190 XTALO
164 COM0
159 COM1
191 XTALI
142 VCCK
173 VCCK
162 SOY0
157 SOY1
134 U0RX
166 PR0P
161 PR1P
165 PB0P
160 PB1P
135 U0TX
155 COM
153 SOG
136 OIRI
177 SC0
175 SC1
163 Y0P
158 Y1P
178 SY0
176 SY1
154 GP
156 RP
152 BP
LO U TP 193 128 O R E S E T_
A IN 0_R _A A D C 194 127 P W R 5V
V M ID _A A D C 195 126 H D M I_H P D
A IN 0_L_A A D C 196 125 H D M I_S C L
A V D D 33_A A D C 197 124 H D M I_S D A
A V D D 33_D A C 198 123 H D M I_C E C
A V S S 33_D A C 199 122 A V D D 12_H D M I
A L0_A D A C 200 121 R X _2
A L1_A D A C 201 120 R X _2B
A R 0_A D A C 202 119 R X _1
A R 1_A D A C 203 118 R X _1B
VCCK 204 117 R X _0
VCCK 205 116 R X _0B
A S P D IF 206 115 R X _C
A O S D A TA 1 207 114 R X _C B
AOBCK 208 113 A V D D 33_H D M I
A O M C LK 209 112 U S B _2P _V R T
MT5301BCMU
A O S D A TA 0 210 111 A V D D 33_U S B _2P
A O LR C K 211 110 U S B _2P _D P 0
IF_A G C 212 109 U S B _2P _D M 0
R F_A G C 213 108 U S B _2P _D P 1
G P IO 214 107 U S B _2P _D M 1
O S C L2 215 106 VCCK
OSDA2 216 105 V C C 3IO
G P IO 13 243 78 VCCK
VCCK 244 77 R D Q M 1//R D Q M 1
V C C 3IO 245 76 R D Q 11//R D Q 15
TPM8.3L LA
G P IO 0 246 75 R D Q 14//R D Q 13
G P IO 1 247 74 V C C 2IO
G P IO 2 248 73 R D Q 9//R D Q 9
G P IO 10 249 72 R D Q 12//R D Q 11
G P IO 3 250 71 R D Q 6//R D Q 0
G P IO 11 251 70 R D Q 1//R D Q 2
G P IO 6 252 69 V C C 2IO
G P IO 12 253 68 R D Q 3//R D Q 6
G P IO 7 254 67 R D Q 4//R D Q 4
G P IO 8 255 66 RVREF
G P IO 4 256 65 VCCK
1
2
3
27
52
4
5
28
29
53
54
6
30
55
7
8
31
56
57
9
10
32
33
11
34
12
35
58
59
36
60
13
37
61
14
15
38
16
39
40
62
41
17
42
63
64
18
19
20
43
21
44
22
45
46
47
23
24
25
26
48
49
50
51
AVDD12_MEMPLL
AVSS12_MEMPLL
AVDD33_LVDSA
AVDD33_LVDSA
RRAS_//RCAS_
AVDD12_VPLL
NC//RRESET_
RCS_//RRAS_
RCAS_//RA12
RODT//RCKE
RCKE//RODT
RWE_//RCS_
RBA0//RBA2
RBA2//RBA0
RA13//RBA1
RA9//RWE_
8.
RBA1//RA3
RA12//RA0
RA7//RA13
RA10//RA5
RA8//RA10
RA11//RA4
RA2//RA11
FSRC_WR
RA5//RA9
RA3//RA7
RA1//RA2
RA4//RA1
RA6//RA6
RA0//RA8
VCC3IO
VCC2IO
GPIO14
AOCKN
AOCKP
AECKN
AECKP
VCCK
VCCK
VCCK
AO2N
AO1N
AO0N
AO5N
AO4N
AO3N
AO2P
AO1P
AO0P
AO5P
AO4P
AO3P
AE5N
AE4N
AE3N
AE2N
AE1N
AE0N
AE5P
AE4P
AE3P
AE2P
AE1P
AE0P
2011-Sep-30
EN 28
IC Data Sheets TPM8.3L LA 8. EN 29
8.2 Diagram I2S Post Amplifier & SPIDF Out B17, AD82587 (IC U602)
Block diagram
Reset
MCLK
SDA
SCL
SA0
SA1
PD
PLL
MONO
Pinning information
VDDRB
VDDLB
GNDR
GNDL
N. C .
N.C.
N.C.
N.C.
RB
RA
LA
LB
48
47
46
45
44
43
42
41
40
39
38
37
VDDLA 1 36 VDDRA
N.C. 2 35 N.C.
N.C. 3 34 N.C.
N.C. 4 33 N.C.
N.C. 5 32 N.C.
PLL 6 N.C.
MCLK 7
AD82587 31
30 N.C.
CLK_OUT 8 29 N.C.
DGND 9 28 N.C.
DVDD 10 27 DVDD
DEF 11 26 DGND
SDATA 12 25 SDA
13
14
15
16
17
18
19
20
21
22
23
SCL 24
LRCIN
ERROR
N.C.
N.C.
MONO
PD
BCLK
SA0
SA1
Reset
N.C.
19160_303_110622.eps
110926
2011-Sep-30
EN 30 8. TPM8.3L LA IC Data Sheets
Block diagram
VDD
HPVDD
Supply 2.2 F
Control
PGND
HPVDD
INL- Resistor
–
Array + OUTL
INL+
Short-Circuit
HPVSS Protection
Thermal
HPVDD Protection
–
INR-
Resistor
Array + OUTR
INR+
HPVSS HPVDD
CPP
G0 Charge 1 F
Gain Click-and-Pop
Suppression Pump
Select
G1
CPN
HPVSS
1 F
SGND EN
Pinning information
SGND
OUTL
VDD
EN
16
15
14
13
INL- 1 12 HPVDD
INL+ 2 11 CPP
INR+ 3 10 PGND
INR- 4 9 CPN
7
6
8
5
OUTR
G0
G1
HPVSS
18850_304_100107.eps
100809
2011-Sep-30
IC Data Sheets TPM8.3L LA 8. EN 31
8.4 Diagram HDMI A & Switch 3:1 B04, TMDS361BPAGR (IC U501)
Block diagram
Vcc
RINT RINT
Dx+_1
TMDS Rx
w/ AEQ
Dx–_1
Vcc
RINT RINT
CLK+_1
TMDS Rx
CLK–_1
Clock Detect
VSadj
Tx
SCL1
Rx Dx+_SINK
TMDS Tx
Tx
Dx–_SINK
SDA1
Rx
3:1 CLK+_SINK
xx2 MUX
Vcc TMDS Tx
CLK–_SINK
RINT RINT
Dx+_3
TMDS Rx
Rx
w/ AEQ SCL_SINK
Dx–_3 Tx
Vcc
RINT RINT
Rx
SDA_SINK
CLK+_3
Tx
TMDS Rx
CLK–_3
Clock Detect Clock Detect
Tx
SCL3
Rx
Tx
SDA3
Rx
HPD_SINK
HPD1
I2C_SEL
2
HPD2 and LP
S1/SCL
HPD3
S2/SDA
Pinning information
CLK+_2
CLK–_2
D0+_2
D2+_2
D1+_2
D2–_2
D1–_2
D0–_2
HPD3
HPD2
SDA2
SCL2
GND
VCC
VCC
LP
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
SDA3 1 48 D2+_1
SCL3 2 47 D2–_1
GND 3 46 VCC
CLK–_3 4 45 D1+_1
CLK+_3 5 44 D1–_1
VCC 6 43 GND
D0–_3 7 42 D0+_1
D0+_3 8 TMDS361B 41 D0–_1
GND 9 64-pin TQFP 40 VCC
D1–_3 10 39 CLK+_1
D1+_3 11 38 CLK–_1
VCC 12 37 SCL1
D2–_3 13 36 SDA1
D2+_3 14 35 HPD1
GND 15 34 I2C_SEL
VSadj 16 33 S2/SDA
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GND
GND
VC C
VCC
S1/SCL
D2+_SINK
D2–_SINK
D1+_SINK
D1–_SINK
D0+_SINK
D0–_SINK
CLK+_SINK
CLK–_SINK
SCL_SINK
SDA_SINK
HPD_SINK
19160_304_110622.eps
110622
2011-Sep-30
EN 32 8. TPM8.3L LA IC Data Sheets
Personal Notes:
10000_012_090121
110
2011-Sep-30
Block Diagrams TPM8.3L LA 9. EN 33
9. Block Diagrams
9-1 Wiring diagram 22"
WIRING DIAGRAM 22" (Smart Choice)
10. PSU_STBY
13. PWR_OK
1. BL_CTRL
KEY BOARD CONTROL PANEL
2. BRI_ADJ
12. 5VSB
11. 5VSB
CN701
9. +24V
8. +24V
4. +12V
3. +12V
7. GND
6. GND
5. GND
12. LED-ON/OFF
12. LED-ON/OFF
14. LED STATUS
1. LED STATUS
37. LVDSVDD
38. LVDSVDD
39. LVDSVDD
40. LVDSVDD
35. SELLVDS
2. TX_AO0N
4. TX_AO1N
3. TX_AO0P
5. TX_AO1P
36. ODSEL
CN903
CN902
10. PWM
CN408
10. GND
13. DIM
11. DIM
1. +24V
2. +24V
3. +24V
4. +24V
5. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
6. GND
7. GND
8. GND
1. GND
3. STB
9. 5V2
11. -
2. -
.
.
.
.
.
USB
CN601
1. SPK_R-
2. SPK_R+
3. SPK_L-
4. SPK_L+
SSB
B (1053 )
(1057)
VIDEO L - AUDIO - R
PC IN
VGA
CVI 2/AV
SERV.U
AV out
Y/VIDEOPB PR L R
HDMI 1
HDMI
AC Input VIDEO L R Y PB PR L R
CVI 1
1. LED_R
2. KEY1
1. KEY2
CN301
3. GND
6. KEY1
7. KEY2
4. GND
3. RC6
J
2. -
IR/LED BOARD
(1056)
19190_400_110906.eps
110926
2011-Sep-30
Block Diagrams TPM8.3L LA 9. EN 34
LCD PANEL
A RF
TUNER Analog IF+/- ATV
DEMODULATOR
RGB
PC IN
DDC CVBS Out
24C02
CVI × 2
YPbPr
MT5301B SPDIF
CVBS
CVBS × 2
HeadPhone Out
TMDS361B
HDMI1
DDC 24C02
DDC
HDMI2 [RX0 : RX3]
DDC 24C02
DDC
HDMI3 SPK
DDC 24C02
DDC I2S
AUDIO AMP
AD82587
USB1 2.0
USB1 2.0
I2C
NVM
KEY RC UART 128kb
19190_401_110907.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 35
Power
A01 R936
A01
330 OHM 1/4W(NC)
HOT COLD R921100 OHM 1/4W
R916100 OHM 1/4W
R917100 OHM 1/4W
!
1 2 T901
1 C902 C911
3
FB901 D905 2N2 50V 2N2 50V L904
1
1 2 0.0022uF/500V 2 9
1
10 HD905
2
DIM
3 2 R910 ZD902
1
J906 20K +-5% 1/8W 7 P6KE20A
JUMPER D901 3 8 + C905 + C921 +
1000uF/16V(NC) 1000uF 25V
! 5 2
-
FR107
2
C922 12
11 470UF 16V 11
4
1
12 10
6 9
D903 R934 8
+ C907 R903100 OHM 1/4W 10 OHM 1/4W 7
C903 100uF 450V R905100 OHM 1/4W L903 +24V 6
10nF + C920 FR103 R915 4 R904100 OHM 1/4W 2.2nF 100V 3.5uH 5
1
22uF/50V(NC) 3.3 OHM 1/4W 4
POWER X'FMR
C919 C933 3 STB
100N 50V 220P 100V(NC) FB905 C936 C904 C918 2
+ C931 BEAD(NC) 2.2nF 100V 2.2nF 100V + C913 1
22uF/50V R912 1000uF 35V
! 100 OHM 1/4W(NC) C914 +
2
HV D904 470UF 35V
IC901 D906 CN902
1 8 C925 SF35G C927 C928
2 CT HV R919 100PF 1KV 100N 50V 100N 50V(NC)
L905 C917 3 COMP 6 1N4148W 10R 1/8W 5% Q903
1
SG904 SG903 2
GS41-201MA(NC) GS41-201MA(NC)
! C924
J910
3
4
AO4421 5
HQ903 Q904 6
2 1 1 8 7
0.22UF275V(NC) 2 S D 7 8
C939 3 S D 6 C934 9
JUMPER(NC) S D 5100N 50V
C900 ! ! C901
2
C906
4
G D
10
11
1500pF / 250V 2U2 25V(NC) 12
1
R922 R941 C938 13
R901
+
1 MOHM +-5% 1/4W(NC) 47K +-5% 1/8W 2U2 50V 14
470pF/250V 470pF/250V R944
1
FB907 FB906
3.3M 1/4W(NC) Wire Harness
BEAD(NC) BEAD(NC)
R907
J920 J919 Status
JUMPER JUMPER
3.3M 1/4W(NC)
!
2
R946
Q905 R942 R945
2
! LF-009561 D908
1N4148(NC)
C912
220P 50V 200OHM +-5% 1/8W C910
RV901 1N 50V(NC)
TVR14511KFC4FY Q901 R939
RK7002FD5T116(NC) R926 1K 1/4W 5%
R931
2
R914 0R051/8W
C908
0.33UF ! ZD904 R908
UDZSNP6.2B(NC) 430KOHM +-5% 1/8W(NC) C929
1K 1/10W(NC)
R925
330N 25V(NC) 0R39 5% 1W R927 C926 R924
R900 100R 1/8W 5% 100N 50V 1K5 +-5% 1/8W 13K7 1/8W 1%(NC) R913
1
R935
1
IC903
! R932 100R 1/8W 5%(NC)
2
2
KIA431A-AT/P 2K4 1/8W 1%
J907 ZD903
1
BEAD(NC)
! RK7002FD5T116(NC)
2
C909
2
!
2
!
1
FB903
BEAD(NC)
J915
JUMPER
CN901
2
2 1
SOCKET
! 1 2011-03-15
Power
715G3897
19190_500_110907.eps
110907
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 36
R942
C909
R945
R925
C907 C903
C930
CN903
HQ903
D906
C938
J906 Q903
C925
FB901
BD901 D907
C915 L903
FB905
J903 J901
ZD906
J922
D901
L905 C913 C914
J914
R937
SG904
R939
FB908 C920
FB909
SG903
C901
C923
J909
C900
CN902
T901
J920
C924 C931
C921 ZD902
J919
FB907
FB906
D903
C922
J905
L902
C905
J902
R933
J910 C906
SG901
SG902
L904
J912
FB902
C908
D908
RV901
IC902 R946
J904
D905
IC903
CN901
J915
TH901 C935
HD905
R900
FB903
F901 FB904
J913
J907
R929
J921
1 2011-02-25
Power
715G3897
layout top
19190_501_110908.eps
110908
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 37
R909
C934
R919 D904
C939 R941
R912
R918
C937
Q905 R936
R904
C918
R903
C904
R905
C936
R910
C919
IC901
R913 C912
C917
C951
R934
J916
C933
R915 C929 Q902
R922
R908
R917
C928
R914
R916
ZD904 J917 Q901
C911 R921
C927
C902
R923
J918
C916
R926
R927
R911
R928
R924
R935
C932
Q906
R930
1 2011-02-25
Power
715G3897
layout bottom
19190_502_110908.eps
110908
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 38
MT5301BCMU
B01 B01
NAND PWM IF_AGC R4004 10K 1/16W 5% IF_AGC_S2T 5V_SW AVDD1V2 AVDD3V3
PDD0 BL_DIM_PWM R4013 GND 5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24
PDD1 PDD0 5 BL_DIM_PWM 21 C4002 47N16V AVDD12_PLL R4044 AVDD33_DAC
PDD2 PDD1 5 RF_AGC_S2T R4005 0R05 1/16W 47 OHM 1/16W
PDD3 PDD2 5 RF_AGC_S2T 15 C4032 C4043 C4044 AV1_CVBS
1K 1/16W 5% + AV1_CVBS 9
PDD4 PDD3 5 IF_AGC_S2T R4001 100N16V 220UF 16V 100N16V
PDD4 5 IF_AGC_S2T 15 AV1
PDD5 OPWM0_100HZ BL_DIM_PWM RF_AGC R4002 10K 1/16W 5% RF_AGC_S2T CVBS_COM
PDD5 5 CVBS_COM 9
PDD6 0R05 1/16W AVDD1V2
PDD7 PDD6 5 R4014 EXT_CVBS
PDD7 5 EXT_CVBS 10 AV2
R4024 AVDD12_VPLL AVDD3V3
POOE# 4K3 1/16W 5% C4001 0R05 1/16W R4045
PAALE POOE# 5 C4033 AVDD33_AADC MONITOR_OUT
PAALE 5 47N16V MONITOR_OUT 18 AV3
PACLE 100N16V 0R05 1/16W
PARB# PACLE 5 C4045
PARB# 5
TX_AOCKN
100N16V
TX_AOCKP
TX_AECKP
POCE1#
TX_AECKN
AVDD1V2 SOY 1
SOY 1 CVI1
AVDD33_LVDSTX
DDRV
VCCK
10
DVDD3V3
TX_AO0N
TX_AO1N
TX_AO2N
TX_AO3N
TX_AO4N
POCE1# 5
TX_AO0P
TX_AO1P
TX_AO2P
TX_AO3P
TX_AO4P
TX_AE0P
TX_AE1P
TX_AE2P
TX_AE3P
TX_AE4P
TX_AE0N
TX_AE1N
TX_AE2N
TX_AE3N
TX_AE4N
AVDD12_MEMPLL
POWE# R4015 Y 1P
1_RAS#
1_CAS#
Y 1P 10
AVDD12_VPLL
POWE# 5
1_WE#
1_ODT
1_CKE
1_CS#
AVDD12_MEMPLL AVDD3V3 COM1
1_BA2
1_BA0
1_BA1
1_A10
1_A12
1_A11
1_A13
COM1 10
1_A1
1_A3
1_A5
1_A7
1_A9
1_A2
1_A0
1_A6
1_A4
1_A8
0R05 1/16W R4046 PB1P
PB1P 10
GPIO_14
C4034 AVDD33_DEMOD PR1P
100N16V PR1P 10
0R05 1/16W
C4046
R4006 4K7 1/16W 5% AVDD1V2 100N16V CVI2
R4016
E-Fuse AVDD12_DEMOD SOY 0
SOY 0 10
0R05 1/16W AVDD3V3 Y 0P
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
Y 0P 10
9
8
7
6
5
4
3
2
1
DDRV C4035 R4047 COM0
100N16V COM0 10
U401 AVDD33_IFPGA PB0P
AVSS12_MEMPLL
AO0P
AO1P
AO2P
AO3P
AO4P
AO5P
RA10//RA5
RA1//RA2
RA3//RA7
RA5//RA9
NC//RRESET_
RA7//RA13
RA12//RA0
VCC2IO
RA0//RA8
RA6//RA6
RA4//RA1
RA11//RA4
RA13//RBA1
RA8//RA10
AOCKP
AVDD33_LVDSA
AVDD33_LVDSA
AE0P
AE1P
AE2P
AECKP
AE3P
AE4P
AE5P
AVDD12_VPLL
RWE_//RCS_
RBA2//RBA0
RBA0//RBA2
RBA1//RA3
RA9//RWE_
RRAS_//RCAS_
RCS_//RRAS_
RCAS_//RA12
RA2//RA11
RODT//RCKE
AVDD12_MEMPLL
VCCK
VCCK
VCCK
VCC3IO
GPIO14
AO0N
AO1N
AO2N
AO3N
AO4N
AO5N
AE0N
AE1N
AE2N
AOCKN
AECKN
AE3N
AE4N
AE5N
RCKE//RODT
FSRC_WR
PB0P 10
0R05 1/16W PR0P
PR0P 10
AVDD1V2 C4047
R4017 100N16V
R4007 AVDD12_HDMI AVDD3V3
1K 1/16W 1% 0R05 1/16W R4048
C4036 AVDD33_HDMI HSY NC
100N16V HSY NC 11
VCCK 65 256 GPIO_4 0R05 1/16W VSY NC
VCCK GPIO4 VSY NC 11
RVREF5 66 255 GPIO_8 C4048 RP
RVREF GPIO8 100N16V RP 11
RDQ4 67 254 GPIO_7 AVDD1V2 GP VGA
RDQ4//RDQ4 GPIO7 GP 11
RDQ3 68 253 GPIO_12 R4018 BP
RDQ3//RDQ6 GPIO12 BP 11
DDRV 69 252 GPIO_6 AVDD12_RGB VGACOM
VCC2IO GPIO6 VGACOM 11
R4008 C4005 RDQ1 70 251 GPIO_11 0R05 1/16W SOG
RDQ1//RDQ2 GPIO11 SOG 11
1K 1/16W 1% 100N16V RDQ6 71 250 GPIO_3 C4037 AVDD3V3 VGA_RX_TX_EN
RDQ12 72 RDQ6//RDQ0 GPIO3 249 GPIO_10 100N16V R4049 VGA_SCL VGA_RX_TX_EN 11
RDQ12//RDQ11 GPIO10 VGA_SCL 11
RDQ9 73 248 GPIO_2 AVDD33_USB_2P VGA_SDA
RDQ9//RDQ9 GPIO2 VGA_SDA 11
DDRV 74 247 GPIO_1 AVDD3V3 0R05 1/16W
RDQ14 75 VCC2IO GPIO1 246 GPIO_0 R4019 C4049
RDQ11 76 RDQ14//RDQ13 GPIO0 245 DVDD3V3 AVDD33_CVBS 100N16V
RDQ11//RDQ15 VCC3IO USB1 & 2
RDQM1 77 244 VCCK 0R05 1/16W USB_PWR_EN0
VCCK 78 RDQM1//RDQM1 VCCK 243 GPIO_13 C4038 USB_DM0 USB_PWR_EN0 8
VCCK GPIO13 100N16V USB_DM0 8
RDQS0 79 242 POWE# AVDD3V3 USB_DP0
RDQS0//RDQS0 POWE_ USB_DP0 8
RDQS0# 80 241 PAALE R4050
RDQM0 81 RDQS0_//RDQS0_ PAALE 240 PACLE AVDD3V3 AVDD33_LVDSTX USB_PWR_EN1
DDRV 82 RDQM0//RDQM0 PACLE 239 POCE1# R4020 0R05 1/16W USB_DM1 USB_PWR_EN1 8
VCC2IO POCE1_ USB_DM1 8
RDQS1 83 238 PARB# AVDD33_VDAC C4050 USB_DP1
RDQS1//RDQS1 PARB_ 100N16V USB_DP1 8
RDQS1# 84 237 POOE# 0R05 1/16W
RDQ15 85 RDQS1_//RDQS1_ POOE_ 236 C4039
RDQ8 86 RDQ15//RDQ12 POCE0_ 235 PDD7 100N16V SPDIF_OUT
DDRV 87 RDQ8//RDQ14 PDD7 234 DVDD3V3
Analog Normal Power SPDIF_OUT 20
RDQ10 88 VCC2IO VCC3IO 233 PDD6 AR0O
RDQ13 89 RDQ10//RDQ10 PDD6 232 PDD5 3V3SB 3V3SB AL0O AR0O 18
RDQ7 90 RDQ13//RDQ8 PDD5 231 PDD4 R4021 R4051 AL0O 18
RDQ7//RDQ1 PDD4 ADAC
RDQ0 91 230 PDD3 AVDD33_XTAL_STB AVDD33_PDM_STB AR1O
DDRV 92 RDQ0//RDQ3 PDD3 229 PDD2 0R05 1/16W 0R05 1/16W AL1O AR1O 19
RDQ2 93 VCC2IO PDD2 228 PDD1 C4041 C4040 C4051 AL1O 19
RDQ5 94 RDQ2//RDQ7 PDD1 227 PDD0 10uF 10V 100N16V 100N16V
DDRV 95 RDQ5//RDQ5 PDD0 226 8282_RST AOMCLK
VCC2IO CI_INT AOMCLK 20
MT5301BCMU
RCLK0 96 225 ARC_OE# AOBCLK
RCLK0# 97 RCLK0//RCLK0 GPIO 224 PWR_OK 3V3SB AOLRCK AOBCLK 20
VCCK 98 RCLK0_//RCLK0_ GPIO 223 LVDS_PWR_EN R4022 AOSDATA0 AOLRCK 20
JTDO 99 VCCK GPIO 222 VCCK AVDD33_REG_STB AOSDATA0 20
JTDO VCCK I2S
JTCK 100 221 DVDD3V3 0R05 1/16W
JTMS 101 JTCK VCC3IO 220 DEMOD_TSDATA0 C4042
JTDI 102 JTMS GPIO 219 DEMOD_TSSY NC 100N16V
JTRST# 103 JTDI GPIO 218 DEMOD_TSVALID
Standby Power
OPWM0_100HZ 104 JTRST_ GPIO 217 DEMOD_TSCLK OSDA0
R4009 DVDD3V3 105 OPWM0 GPIO 216 OSDA0 OSCL0 OSDA0 5,7,12,14,15,20
VCC3IO OSDA2 AADC OSCL0 5,7,12,14,15,20
10K 1/16W 5% VCCK 106 215 OSCL0 AIN0_R_AADC
VCCK OSCL2 AIN0_R_AADC 9
USB_DM1 107 214 DEMOD_RESET AIN0_L_AADC ORESET#
USB_2P_DM1 GPIO AIN0_L_AADC 9 ORESET# 5
USB_DP1 108 213 RF_AGC HDMI A HDMI B HDMI C
USB_DM0 109 USB_2P_DP1 RF_AGC 212 IF_AGC OXTALI
USB_2P_DM0 IF_AGC OXTALI 5 System IO
USB_DP0 110 211 AOLRCK Strapping & GPIO OXTALO
AVDD33_USB_2P 111 USB_2P_DP0 AOLRCK 210 AOSDATA0 OPCTRL4 OXTALO 5
AVDD33_USB_2P AOSDATA0 HDMI_S1 L L H OPCTRL4 5
USB_VRT 112 209 AOMCLK OPCTRL5 U0TX
AVDD33_HDMI 113 USB_2P_VRT AOMCLK 208 AOBCLK AOSDATA1 OPCTRL5 5 U0RX U0TX 7
R4010 M_RX1_CB 114 AVDD33_HDMI AOBCK 207 AOSDATA1 AOSDATA1 5 U0RX 7
RX_CB AOSDATA1 HDMI_S2 L H H
5.1K 1% M_RX1_C 115 206 SPDIF_OUT LED_WGB
M_RX1_0B 116 RX_C ASPDIF 205 VCCK LED_RED_OFF# LED_WGB 17
M_RX1_0 117 RX_0B VCCK 204 POP_MUTE# LED_RED_OFF# 17
M_RX1_1B 118 RX_0 VCCK 203 AR1O POP_MUTE# 16,18
M_RX1_1 119 RX_1B AR1_ADAC 202 AR0O DTMB_PAL_SW
M_RX1_2B 120 RX_1 AR0_ADAC 201 AL1O DTMB_PAL_SW 15 PWR5V_A
M_RX1_2 121 RX_2B AL1_ADAC 200 AL0O RDQ0 PWR5V_B PWR5V_A 12
RX_2 AL0_ADAC ADC-in & GPIO RDQ0 6 PWR5V_B 13
AVDD12_HDMI 122 199 8282_RST RDQ1 PWR5V_C
HDMI_CEC 123 AVDD12_HDMI AVSS33_DAC 198 AVDD33_DAC ARC_OE# 8282_RST 7 RDQ2 RDQ1 6 PWR5V_C 13
HDMI_SDA 124 HDMI_CEC AVDD33_DAC 197 AVDD33_AADC EXT_FSEL ARC_OE# 20 RDQ3 RDQ2 6 M_RX1_CB
HDMI_SDA AVDD33_AADC EXT_FSEL 10 RDQ3 6 M_RX1_CB 12
HDMI_SCL 125 196 AIN0_L_AADC TOC_KEY RDQ4 M_RX1_C
HDMI_SCL AIN0_L_AADC TOC_KEY 17 RDQ4 6 M_RX1_C 12
HDMI_HPD1 126 195 VMID_AADC LIT_SENSOR RDQ5 M_RX1_0B
HDMI_HPD VMID_AADC LIT_SENSOR 17 RDQ5 6 M_RX1_0B 12
PWR5V_C 127 194 AIN0_R_AADC USB_PWR_EN0 RDQ6 M_RX1_0
M_RX1_0 12
AVDD33_XTAL_STB
PWR5V AIN0_R_AADC USB_PWR_EN0 8 RDQ6 6
AVDD33_PDM_STB
AVDD33_VGA_STB
LOUTP RDQ7 6
AVDD12_DEMOD
AVDD33_DEMOD
ADCINP_DEMOD
AVSS12_DEMOD
AVSS33_DEMOD
M_RX1_1 12
AVDD33_VDAC
RDQ8 6
AVDD33_CVBS
RDQ9 M_RX1_2B
AVDD12_RGB
AVSS12_RGB
M_RX1_2B 12
AVDD12_PLL
RDQ9 6
VDAC_OUT2
VDAC_OUT1
RDQ10 M_RX1_2
ADIN0_SRV
ADIN1_SRV
ADIN2_SRV
ADIN3_SRV
ADIN4_SRV
Normal GPIO
CVBS_COM
EPAD_GND
RDQ10 6 M_RX1_2 12
OPCTRL5
OPCTRL3
OPCTRL4
OPCTRL2
OPCTRL0
OPCTRL1
VGA_SDA
FS_VDAC
USB_PWR_EN1 RDQ11
VGA_SCL
HDMI
OPWRSB
USB_PWR_EN1 8 RDQ11 6
CVBS1P
CVBS0P
HSYNC
XTALO
COM1
COM0
VCCK
XTALI
U0RX
U0TX
SOY1
PR1P
SOY0
PR0P
PB1P
PB0P
SC1
SC0
USB_PWR_OCP0 8
Y1P
Y0P
SY1
SY0
RDQ13 6 HDMI_SDA 12
GP
RP
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
CVBS_COM
AVDD33_XTAL_STB
AVDD33_REG_STB
T2S_TIF+
AVDD33_DEMOD
PWR5V_B
PWR5V_A
VDAC_FS
OXTALI
VGACOM
AVDD33_IFPGA
COM0
AVDD33_VDAC
U0RX
SOY1
U0TX
PR1P
SOY0
PR0P
PB1P
PB0P
RCLK0 6
AVDD12_RGB
ADIN0
ADIN1
ADIN2
ADIN3
ADIN4
DTMB_PAL_SW RCLK0#
Y1P
Y0P
AVDD12_PLL
OPCTRL5
OPCTRL4
OPCTRL0
OPCTRL1
VGA_SDA
VGA_SCL
DTMB_PAL_SW 15 RCLK0# 6
SOG
OIRI
HPHONE_DET
BP
GP
RP
VSYNC
HSYNC
ADIN3 R4029 0R05 1/16W VGA_RX_TX_EN MEMORY _WP# HPHONE_DET 19 1_A0 TX_AE0P
MEMORY _WP# 5 1_A0 6 TX_AE0P 7
SC0
SC1
VCCK
2 2011-09-01
MT5301BCMU
715G5151
19190_503_110908.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 39
SoC Peripheral
SoC Peripheral
B02 B02
MEMORY _WP#
MEMORY _WP# 4
HY 27US08561A-TPCB
ORESET#
ORESET# 4
OPCTRL4
OPCTRL4 4
OPCTRL5
OPCTRL5 4
AOSDATA1
AOSDATA1 4
STBC CRYSTAL
NVRAM Strapping 3V3SB 3V3SB DVDD3V3
DVDD3V3 OXTALO
OXTALI R4107 NC/1M 1/16W NC/10K 1/16W 5% NC/10K 1/16W 5% 10K 1/16W 5%
R4103 R4104 R4105
C4104 X4101
10K 1/16W 5%
2.7K 1/16W 1%
2.7K 1/16W 1%
L4101 OXTALI
OXTALI 4
220N16V 3 1 NC/0U82 OPCTRL5 OPCTRL4 AOSDATA1 Close to SoC OXTALO
OXTALO 4
4 2
U4103
1 8 C4105 27MHz C4106 C4125 R4119 R4121 R4123
2 E0 VCC 7
3 E1 WC 6 OSCL0 27pF 33P50V NC/1N 50V 10K 1/16W 5% 10K 1/16W 5% NC/10K 1/16W 5% OSDA0
E2 SCL OSDA0 4,7,12,14,15,20
4 5 OSDA0 OSCL0
VSS SDA OSCL0 4,7,12,14,15,20
NC/5K1 1/16W 5%
GND 4,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24
2 2011-09-01
SoC Peripheral
715G5151
19190_504_110908.eps
110908
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 40
DDR2
DDR2
B03 B03
U402 RDQ0
RDQ0 4
Damping & Termination for CLK RDQ1
RDQ1 4
RDQ0 G8 M8 B_A0 RDQ2
DQ0 A0 RDQ2 4
RDQ1 G2 M3 B_A1 RDQ3
DQ1 A1 RDQ3 4
RDQ2 H7 M7 B_A2 RDQ4
DQ2 A2 RDQ4 4
Close to MT5310 Close to DDR2 RDQ3 H3 N2 B_A3 RDQ5
DQ3 A3 RDQ5 4
RDQ4 H1 N8 B_A4 RDQ6
DQ4 A4 RDQ6 4
RDQ5 H9 N3 B_A5 RDQ7
DQ5 A5 RDQ7 4
RCLK0 R4128 0R05 1/16W CLK0 RDQ6 F1 N7 B_A6 RDQ8
DQ6 A6 RDQ8 4
RDQ7 F9 P2 B_A7 RDQ9
DQ7 A7 RDQ9 4
DDRV CAPs Close to DDR2#1 RDQ8 C8 P8 B_A8 RDQ10
DQ8 A8 RDQ10 4
R4130 RDQ9 C2 P3 B_A9 RDQ11
DQ9 A9 RDQ11 4
100R 1/16W 5% RDQ10 D7 M2 B_A10 RDQ12
DQ10 A10/AP RDQ12 4
RDQ11 D3 P7 B_A11 RDQ13
DQ11 A11 RDQ13 4
J1 A1 E1 R1 RDQ12 D1 R2 B_A12 RDQ14
DQ12 A12 RDQ14 4
RCLK0# R4129 0R05 1/16W CLK0# RDQ13 D9 R8 B_A13 RDQ15
DQ13 NC RDQ15 4
C4113 C4114 C4115 C4116 RDQ14 B1 R3
100N16V 100N16V 100N16V 100N16V RDQ15 B9 DQ14 NC R7 RDQS1
DDRV DQ15 NC RDQS1 4
A2 L2 B_BA0 RDQS1#
NC BA0 RDQS1# 4
E2 L3 B_BA1 RDQS0
NC BA1 RDQS0 4
RDQS1 B7 L1 B_BA2 RDQS0#
UDQS BA2 RDQS0# 4
RDQS1# A8 J8 CLK0 RDQM1
UDQS CK RDQM1 4
R4131 RDQS0 F7 K8 CLK0# RDQM0
LDQS CK RDQM0 4
DDRV 1.1KOHM +-1% 1/10W RDQS0# E8 L8 B_CS#
RDQM1 B3 LDQS CS L7 B_CAS#
Damping for DDR2#1 ADDR/CMD UDM CAS
RDQM0 F3 K9 B_ODT
RVREF1 J2 LDM ODT K7 B_RAS#
RP4101 0OHM 1/16W B_CKE K2 VREF RAS K3 B_WE#
1_RAS# 5 4 B_RAS# A1 CKE WE A3
C4117 C4118 C4119 C4120 C4122 1_CS# 6 3 B_CS# R4132 A9 VDD VSS A7
100N16V 100N16V 100N16V 100N16V 100N16V 1_CAS# 7 2 B_CAS# 1.1KOHM +-1% 1/10W C4121 C1 VDDQ VSSQ B2 1_A0
100N16V VDDQ VSSQ 1_A0 4
1_A2 8 1 B_A2 C3 B8 1_A1
VDDQ VSSQ 1_A1 4
E9 A9 G1 C1 J9 C7 D2 1_A2
VDDQ VSSQ 1_A2 4
RP4102 0OHM 1/16W C9 D8 1_A3
G7 C7 G3 C3 M9 VDDQ VSSQ 1_A3 4
1_A5 5 4 B_A5 E1 E3 1_A4
VDD VSS 1_A4 4
G9 C9 1_A7 6 3 B_A7 E9 E7 1_A5
VDDQ VSSQ 1_A5 4
1_A12 7 2 B_A12 G1 F2 1_A6
VDDQ VSSQ 1_A6 4
1_A9 8 1 B_A9 G3 F8 1_A7
VDDQ VSSQ 1_A7 4
G7 H2 1_A8
VDDQ VSSQ 1_A8 4
RP4103 0OHM 1/16W G9 H8 1_A9
VDDQ VSSQ 1_A9 4
5 4 J1 J3 1_A10
VDDL VSS 1_A10 4
1_A13 6 3 B_A13 J9 J7 1_A11
VDD VSSDL 1_A11 4
1_A8 7 2 B_A8 M9 N1 1_A12
1_ODT 8 1 B_ODT DDRV R1 VDD VSS P9 1_A13
1_A12 4
VDD VSS 1_A13 4
1_BA0
1_BA0 4
RP4104 0OHM 1/16W K4T1G164QF-BCF8 1_BA1
1_BA1 4
1_CKE 5 4 B_CKE 1_BA2
1_BA2 4
1_WE# 6 3 B_WE#
1_BA2 7 2 B_BA2 RCLK0
RCLK0 4
1_BA0 8 1 B_BA0 RCLK0#
RCLK0# 4
1_CS#
1_CS# 4
RP4105 0OHM 1/16W 1_CAS#
1_CAS# 4
1_BA1 5 4 B_BA1 1_ODT
1_ODT 4
1_A10 6 3 B_A10 1_RAS#
1_RAS# 4
1_A1 7 2 B_A1 1_WE#
1_WE# 4
1_A3 8 1 B_A3 1_CKE
1_CKE 4
RP4106 0OHM 1/16W
1_A0 5 4 B_A0
1_A6 6 3 B_A6
1_A4 7 2 B_A4
1_A11 8 1 B_A11
GND 4,5,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24
2 2011-09-01
DDR2
715G51511
19190_505_110908.eps
110908
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 41
R411
R412
R413
R414
1 2 TX_AECKN
TX_AECKN 4
C402 120R/6000mA TX_AE3P
TX_AE3P 4
TX_AE3N
TX_AE3N 4
100N 50V TX_AE4P
TX_AE4P 4
10K 1/16W 5%
10K 1/16W 5%
10K 1/16W 5%
10K 1/16W 5%
TX_AE4N
TX_AE4N 4
C401 R415 R416
NC/10U 10V 10K 1/16W 5% 1K 1/16W 5%
DVDD3V3
21
DVDD3V3
R403 TVTREF#1 1 2 TX_AO0P
42
TX_AO0P 4
NC/1K 1/16W 5% JTRST# 3 4 TX_AO0N
TX_AO0N 4
R405 JTDI 5 6 TX_AO1P
TX_AO1P 4
39 40 NC/1K 1/16W 5% JTMS 7 8 TX_AO1N
TX_AO1N 4
37 38 JTCK 9 10 TX_AO2P
TX_AO2P 4
SELLVDS 35 36 ODSEL 11 12 TX_AO2N
TX_AO2N 4
TX_AE4P 33 34 TX_AE4N JTDO R410 13 14 TX_AOCKP
TX_AOCKP 4
TX_AE3P 31 32 TX_AE3N R406 33R 1/16W 5% 15 16 TX_AOCKN
TX_AOCKN 4
R402 29 30 0R05 1/16W JTAG_DBGRQ 17 18 TX_AO3P
TX_AO3P 4
NC/0R05 1/16W TX_AECKP 27 28 TX_AECKN JTAG_DBGACK 19 20 TX_AO3N
TX_AO3N 4
25 26 TX_AO4P
TX_AO4P 4
TX_AE2P 23 24 TX_AE2N CN406 TX_AO4N
TX_AO4N 4
TX_AE1P 21 22 TX_AE1N NC/60947 20P 1.25MM
22
TX_AE0P 19 20 TX_AE0N R417 R418
17 18 10K 1/16W 5% 10K 1/16W 5%
TX_AO4P 15 16 TX_AO4N
TX_AO3P 13 14 TX_AO3N
11 12
TX_AOCKP 9 10 TX_AOCKN
TX_AO2P 7 8
TX_AO1P 5 6 TX_AO2N
TX_AO0P 3 4 TX_AO1N
1 2 TX_AO0N
JTRST#
JTRST# 4
JTDI
UART Debug Tool (STBY) JTMS
JTDI 4
JTMS 4
41
JTCK
JTCK 4
JTDO
JTDO 4
CN408 3V3SB
S1312-40SVA-1R
R419
3.3K 1/16W TX_AE0P
TX_AE0P 4
Q401 TX_AE0N
TX_AE0N 4
NC/2N7002 TX_AE1P
TX_AE1P 4
U0RX RX_5VPP TX_AE1N
TX_AE1N 4
TX_AE2P
TX_AE2P 4
TX_AE2N
HD 8-Bit LVDS Connector 19" + 22" TX_AECKP
TX_AE2N
TX_AECKP
4
4
R420 100R 1/16W 5% TX_AECKN
TX_AECKN 4
TX_AE3P
TX_AE3P 4
TX_AE3N
TX_AE3N 4
LVDSVDD 3V3SB 5VSB 3 TX_AE4P
TX_AE4P 4
2 TX_AE4N
TX_AE4N 4
CN409 1 1
NC/CONN 2 C403
3 R421
4 100N 50V 3.3K 1/16W
5 Q402 CN410
6 NC/2N7002 CONN TX_AO0P
TX_AO0P 4
7 U0TX TX_5VPP TX_AO0N
TX_AO0N 4
8 TX_AO1P
TX_AO1P 4
9 TX_AO1N
TX_AO1N 4
10 SELLVDS TX_AO2P
TX_AO2P 4
11 R422 100R 1/16W 5% TX_AO2N
TX_AO2N 4
12 TX_AOCKP
TX_AOCKP 4
13 TX_AO3P TX_AOCKN
TX_AOCKN 4
14 TX_AO3N TX_AO3P
TX_AO3P 4
15 TX_AO3N
TX_AO3N 4
16 TX_AOCKP TX_AO4P
TX_AO4P 4
17 TX_AOCKN TX_AO4N
TX_AO4N 4
18
19 TX_AO2P iTV Level 1
20 TX_AO2N
21
22 TX_AO1P
23 TX_AO1N R407
24
3V3SB 0R05 1/16W(NC)
25 TX_AO0P
26 TX_AO0N
27 R408
28
5VSB 0R05 1/16W
29 ITV_IR
ITV_IR 17
30 R425 R424
10K 1/16W 5% 10K 1/16W 5%
R409
0R05 1/16W R423 U0RX
U0RX 4
0R05 1/16W U0TX
U0TX 4
2
ITV_IR R652 1 Q403
100R 1/16W 5% PMBS3906 CN412 TX_5VPP
TX_5VPP 11
CONN RX_5VPP
RX_5VPP 11
3
1
RX_5VPP 2
TX_5VPP 3
4
I2C for MEMC board 5
OSDA0
5V_MEMC 5V_SW OSCL0
OSDA0 4,5,12,14,15,20
OSCL0 4,5,12,14,15,20
8282_RST
8282_RST 4
2
FB403 FB402
NC/120R/3000mA NC/120R/3000mA
6
CN411
ESD
1
5
OSDA0 4
OSCL0 3
8282_RST 2 U404
1 RX_5VPP 1 6
2 I/O1 I/O4 5
TX_5VPP 3 GNDVDD 4 ITV_IR GND 4,5,6,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24
NC/CONN I/O2 I/O3
7
AOZ8105CI
2 2011-09-01
19190_506_110908.eps
110908
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 42
5
7
1 2
1
1 2 3 4
USB_DM1 R1017 0R05 1/16W USB2_D- 2 CN104
USB_DP1 R1018 0R05 1/16W USB2_D+ 3 C1011
4 10U 16V
+ C1007 R1019 R1020 USB CONN
C1008
NC/15K 1/16W 5%
NC/15K 1/16W 5%
47UF 25V 100N 16V C1009 C1010
6
8
NC/4P7 50VNC/4P7 50V
BUCK_USB2 VUSB5V
LDO_USB2
ESD
2
2
FB1006 FB1008
NC/120R/3000mA 120R/3000mA U1005
VUSB2_5V
USB1_D- 1 6 USB2_D+ VUSB5V
I/O1 I/O4
t
2 5
2 1 DVDD3V3 USB1_D+ 3 GNDVDD 4 USB2_D-
1
1
TH1002 PTCR I/O2 I/O3
DVDD3V3 AOZ8105CI
R1014 R1016
R1013 NC/4K7 1/16W 5%
NC/4K7 1/16W 5% U1002 22K 1/16W 5%
5 1
IN OUT 2
USB_PWR_EN1 R1011 4 GND 3 USB_PWR_OCP1
EN FAULT
H: POWER ON 0R05 1/16W STMPS2171STR H: OK
L:POWER OFF R1012 R1015 L: O.C.
C1006
10K 1/16W 5% 100N 16V 47K 1/16W 5%
VUSB5V VUSB1_5V
t
2 1 DVDD3V3
DVDD3V3 TH1001 PTCR
USB_PWR_EN1
USB_PWR_EN1 4
R1003 R1006
NC/4K7 1/16W 5% R1004 NC/4K7 1/16W 5% USB_DM1
U1001 22K 1/16W 5% USB_DP1 USB_DM1 4
5 1 USB_DP1 4
IN OUT 2 USB_PWR_OCP1
USB_PWR_EN0 R1001 4 GND 3 USB_PWR_OCP0 USB_PWR_OCP1 4
EN FAULT
H: POWER ON 0R05 1/16W STMPS2171STR H: OK
L:POWER OFF L: O.C.
R1002 C1001 R1005
10K 1/16W 5% 100N 16V 47K 1/16W 5%
5
7
USB_DP0 USB_DM0 4
1 USB_DP0 4
1 2 3 4
USB_DM0 R1007 0R05 1/16W USB1_D- 2 CN103 USB_PWR_OCP0
USB_DP0 R1008 0R05 1/16W USB1_D+ 3 USB_PWR_OCP0 4
4
+ C1002 R1009 R1010 USB CONN
C1003
NC/15K 1/16W 5%
NC/15K 1/16W 5%
2 2011-09-01
19190_507_110908.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 43
FB101 U102
120R/3000mA
VGA_L_IN 1 16
AV1_LIN 2 Y0 VDD 15 AV1_RIN
AUD_LOUT 3 Y2 X2 14 CVI_R_IN1 R101 0R AIN0_R_AADC
2
VGA_R_IN
VGA_R_IN 11
VGA_L_IN
VGA_L_IN 11
4 ZD101 R103
NC/UDZSNP5.6B
C106
B
3 75R 1/16W 1% NC/220pF 50V
Audio-in MUX CTRL
6
1
C
5 R105 C108 CVBS_COM AMUX_5V AMUX_5V
0R05 1/16W 47N16V
RCA JACK
AMUX_5V
R125 R127
R/L-in 4K7 1/16W 5% 4K7 1/16W 5%
R110 470K 1/16W 5%
R131
NC/4K7 1/16W 5%
MUX_CTLC
R132
R122 AIN_CTL2
0R05 1/16W NC/10K 1/16W 5%
Q104
NC/PMBS3904
GND 4,5,6,7,8,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24
2 2011-09-01
19190_508_110908.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 44
CVI_R_IN1
Y1 1 2 R198 18R 1/16W 5% R135 68R 1/16W 5% C122 Y 1P CVI_L_IN1 CVI_R_IN1 9
FB102 30R/700mA 10N 50V CVI_L_IN1 9
2
ZD107
UDZSNP5.6B R134 C120 SOY 1
Video-in 56R 1/16W 5% 15pF 50V Y 1P SOY 1 4
COM1 Y 1P 4
CN111A R136 100R 1/16W 5% C123 COM1 PB1P COM1 4
1
2 10N 50V PR1P PB1P 4
D105 NC/BAS316 PR1P 4
1 1 2
A K AMUX_5V
4 PB1 1 2 R199 18R 1/16W 5% R139 68R 1/16W 5% C126 PB1P
FB103 30R/700mA 10N 50V EXT_CVBS
2
3 EXT_CVBS 4
ZD108 C124 EXT_R_IN
6 UDZSNP5.6B R137 15pF 50V EXT_L_IN EXT_R_IN 9
56R 1/16W 5% EXT_L_IN 9
5 EXT_FSEL
EXT_FSEL 4
1
RCA JACK SOY 0
Y 0P SOY 0 4
COM0 Y 0P 4
1
PB0P COM0 4
ZD109 C125 PR0P PB0P 4
UDZSNP5.6B R138 15pF 50V PR0P 4
56R 1/16W 5%
2
NC/VPORT0603100KV05
1
C132
D107 NC/BAS316 R149 0R05 1/16W 1.5nF 50V SOY 0
2 1
AMUX_5V K A
ZD112
EXT (Rear) Video-in UDZSNP5.6B R150 C133
56R 1/16W 5% NC/10P 50V
NC/CONN
1 CN112A R152 100R 1/16W 5% C135 COM0
1
C 8 PR2_8 3
9 PR2 ZD113
10 6 UDZSNP5.6B R153 C136 R117
D 56R 1/16W 5% NC/10P 50V NC/11K 1% R115 47N16V
11 EXT_L 5 68R 1/16W 5% C114 EXT_CVBS
12 PR2_8 EXT_FSEL R120
1
5 IN NO 2
ZD114 Y 2_2 R205 AMUX_5V 4 V+ GND 3
UDZSNP5.6B NC/220K 1/16W 5% Q106 C113 COM NC
NC/PMBS3904 100N16V
NC/VPORT0603100KV05
GND 4,5,6,7,8,9,11,12,13,14,15,16,17,18,19,20,21,22,23,24
1
2 2011-09-01
19190_509_110908.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 45
2
SOG 4
D115 R182 VGACOM
A K
R165 C144 VGACOM 4
NC/2K 1/16W
75R 1/16W 1% NC/10P 50V NC/BAS316 HSY NC
VSY NC HSY NC 4
VSY NC 4
1
R168 0R05 1/16W C147 1.5nF 50V SOG
17
6
VGA_RX 11 1 VGA_R HS R183 0R05 1/16W HSY NC VGA_R_IN
7 VGA_L_IN VGA_R_IN 9
PC_SDA 12 2 VGA_G FB109 1 2 30R/700mA R169 68R 1/16W 5% C148 10N 50V GP VGA_L_IN 9
8 R184
HS 13 3 VGA_B NC/2K 1/16W
9 PC_5VI
VS 14 4 VGA_TX R167 C146
10 75R 1/16W 1% NC/10P 50V VGA_SCL
PC_SCL 15 5 VGA_SDA VGA_SCL 4
VGA_SDA 4
R170 100R 1/16W 1% C149 10N 50V VGACOM
16
CN101
D-SUB 15P
RX_5VPP
RX_5VPP 7
TX_5VPP
TX_5VPP 7
FB110 1 2 30R/700mA R172 68R 1/16W 5% C151 10N 50V BP
UART WB Adjustment
R171 C150 DDC_WP#
DDC_WP# 4,12,13
75R 1/16W 1% NC/10P 50V
R185 R186
10K+-5%1/16W 4.7K 1/16W
ESD
VGA_RX_TX_EN R187
Q107
U105 NC/100R 1/16W 5% NC/PMBS3904
HS 1 6 VGA_G VGA_5V RX_5VPP VGA_RX TX_5VPP VGA_TX
2 I/O1 I/O4 5
VGA_B 3 GNDVDD 4 VGA_R
I/O2 I/O3 Q108 Q109
AOZ8105CI 2N7002 2N7002
R121 R123
NC/0R05 1/16W NC/0R05 1/16W
C152
D101
BAT54C
AMUX_5V
2
PHONE JACK DDC_WP# R222 1K 1/16W 5%
2
A K
A K
C153 C154 L : WP R223 PMBS3904 R194
NC/BAS316
ZD121 ZD122 22P 50V 22P 50V R175 R176 R180 470K 1/16W 5% 4K7 1/16W 5% NC/BAS316 NC/1K1/16W
5.1K 1% 5.1K 1% H : Write
NC/VPORT0603100KV05
NC/VPORT0603100KV05
1
1
GND 4,5,6,7,8,9,10,12,13,14,15,16,17,18,19,20,21,22,23,24
2 2011-09-01
19190_510_110908.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 46
HDMI_CEC
HDMI_CEC 4
R511 R534 HDMI_HPD1
HDMI_HPD1 4
NC/4K7 1/16W 5% 4K7 1/16W 5%
DV33_TMDS
DV33_TMDS
DDC_WP#
HDMI_SDA
HDMI_SCL
DDC_WP# 4,11,13
HDMI_HPD1
M_RX1_C
M_RX1_0
M_RX1_1
M_RX1_2
EQ_I2C_SEL 5VDD_LP#
M_RX1_CB
M_RX1_0B
M_RX1_1B
M_RX1_2B
S1_SCL
HDMI_S1
HDMI_S1 4
H : GPIO R532 HDMI_S2
HDMI_S2 4
R510 NC/10K 1/10W
L : I2C 4K7 1/16W 5%
PWR5V_A
PWR5V_A 4
CN501
U501
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
7 RXA_0+ TMDS361BPAGR
TMDSD0+ 9 RXA_0-
S1/SCL
SDA_SINK
SCL_SINK
CLK-_SINK
CLK+_SINK
D0-_SINK
D0+_SINK
D1-_SINK
D1+_SINK
D2-_SINK
D2+_SINK
HPD_SINK
GND
VCC
GND
VCC
TMDSD0-
4 RXA_1+ HDMI_SDA
TMDSD1+ HDMI_SDA 4
6 RXA_1- HDMI_SCL
TMDSD1- HDMI_SCL 4
1 RXA_2+ S2_SDA 33 16 VS_ADJ
TMDSD2+ 3 RXA_2- EQ_I2C_SEL 34 S2/SDA VSadj 15
TMDSD2- HPD_C 35 I2C_SEL GND 14 RXB_2+
10 RXA_C+ HDMIC_SDA 36 HPD1 D2+_3 13 RXB_2- 3V3SB
TMDSC+ 12 RXA_C- HDMIC_SCL 37 SDA1 D2-_3 12 DV33_TMDS RXB_2+
TMDSC- RXC_C- 38 SCL1 VCC 11 RXB_1+ RXB_2- RXB_2+ 13
15 SCL_A R501 100R 1/16W 5% HDMIA_SCL RXC_C+ 39 CLK-_1 D1+_3 10 RXB_1- RXB_2- 13
SCL 16 SDA_A R502 100R 1/16W 5% HDMIA_SDA DV33_TMDS 40 CLK+_1 D1-_3 9 RXB_1+
1
SDA 13 CEC_A RXC_0- 41 VCC GND 8 RXB_0+ RXB_1- RXB_1+ 13
CEC D0-_1 D0+_3 D504 R509 RXB_1- 13
K A
19 RXC_0+ 42 7 RXB_0-
HPD D0+_1 D0-_3 BAS316 NC/0R05 1/16W
43 6 DV33_TMDS RXB_0+
18 HD5V_A R503 1K 1/16W 5% RXC_1- 44 GND VCC 5 RXB_C+ RXB_0- RXB_0+ 13
VCC5 D1-_1 CLK+_3 RXB_0- 13
470K 1/16W 5% R504
RXC_1+ 45 4 RXB_C-
D1+_1 CLK-_3
2
NC/BZX384-C5V6 ZD501
NC/BAS316 D502
NC/BAS316 D503
2 RXC_2+ 48 1 HDMIB_SDA
A K
A K
A K
CLK+_2
11 PMBS3904 HDMIB_SCL
CLK-_2
D0+_2
D1+_2
D2+_2
CSHLD0 NC/2N7002 HDMIB_SCL 13
HPD2
D0-_2
D1-_2
D2-_2
HPD3
SDA2
SCL2
17 R506 HDMIB_SDA
1
GND
VCC
VCC
DDC_GND 4K7 1/16W 5% CEC_A HDMI_CEC HDMIB_SDA 13
1
LP
20 HPD_B
SHLD_GND1 CEC_B HPD_B 13
21
SHLD_GND2
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
22
SHLD1 CEC_C
23
SHLD2 R507 0R05 1/16W
24 RXC_2+
SHLD3 RXC_2+ 13
RXA_0-
RXA_0+
RXA_1-
RXA_1+
RXA_2-
RXA_2+
HPD_B
25 RXC_2-
1
SHLD4 26 RXC_2- 13
SHLD5 ZD502
DV33_TMDS
DV33_TMDS
RXC_1+
NC/VPORT0603100KV05 RXC_1- RXC_1+ 13
RXC_1- 13
HDMI RXC_0+
RXC_0- RXC_0+ 13
RXC_0- 13
2
HDMI A (Rear#1) RXC_C+
RXC_C- RXC_C+ 13
RXC_C- 13
CEC_C
CEC_C 13
HDMIC_SCL
HDMIC_SDA HDMIC_SCL 13
HDMIC_SDA 13
DV33_TMDS HPD_C
Option for 3x port S1_SCL R521 NC/0R05 1/16W HDMI_S1 HPD_C 13
OSDA0
OSDA0 4,5,7,14,15,20
OSCL0
OSCL0 4,5,7,14,15,20
R519 R520 R530 0R05 1/16W OSCL0
10K 1/10W 10K 1/10W
R531 0R05 1/16W OSDA0
ARC_A
ARC_A 20
HDMI_SCL
HDMI_SDA
D505 ESD Protecter for Single HDMI_A Single HDMI_A (Bypass Switch)
BAT54C
U503 NC/0OHM 1/16W
RXA_2+ 1 10 RXA_2+ RXA_2+ 8 1 M_RX1_2
RXA_2- 2 CH1 NC 9 RXA_2- RXA_2- 7 2 M_RX1_2B
R526 3 CH2 NC 8 RXA_1+ 6 3 M_RX1_1
0R05 1/10W C510 RXA_1+ 4 VN VN 7 RXA_1+ RXA_1- 5 4 M_RX1_1B
100N 16V R515 R516 R517 RXA_1- 5 CH3 NC 6 RXA_1-
10K 1/10W 47K 1/10W 5% 47K 1/10W 5% CH4 NC RP501
U502
NC/AOZ8804DI
1 8
2 E0 VCC 7
3 E1 WC 6 HDMIA_SCL
4 E2 SCL 5 HDMIA_SDA
VSS SDA U504 NC/0OHM 1/16W
RXA_0+ 1 10 RXA_0+ RXA_0+ 8 1 M_RX1_0
M24C02-WDW6P R518 RXA_0- 2 CH1 NC 9 RXA_0- RXA_0- 7 2 M_RX1_0B
DDC_WP# 3 CH2 NC 8 RXA_C+ 6 3 M_RX1_C
Q503 RXA_C+ 4 VN VN 7 RXA_C+ RXA_C- 5 4 M_RX1_CB
PMBS3904 1K 1/16W 5% RXA_C- 5 CH3 NC 6 RXA_C-
H : Write CH4 NC RP502
L : WP
NC/AOZ8804DI 2 2011-09-01
19190_511_110908.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 47
NC 2 RXC_2- 12
D510
D511
D512
10K 1/10W 47K 1/10W 5% 47K 1/10W 5%
2 U505 RXC_1+
K
K
DSHLD0 5 R537 1K 1/16W 5% HPD_B 1 8 RXC_1- RXC_1+ 12
470K 1/16W
NC/BAS316
NC/BAS316
NC/BZX384-C5V6
8 Q505 2 7
DSHLD2 11 PMBS3904 3 E1 WC 6 HDMIB_SCL RXC_0+
CSHLD0 17 R538 4 E2 SCL 5 HDMIB_SDA RXC_0- RXC_0+ 12
1
BAT54C
CN506
20
SHLD0 1 RXC_2+
22 TMDSD2+ 2 R533
SHLD2 DSHLD0 3 RXC_2- 0R05 1/10W C516
TMDSD2- 4 RXC_1+ 100N 16V R553 R554 R555
TMDSD1+ 5 10K 1/10W 47K 1/10W 5% 47K 1/10W 5%
DSHLD1 6 RXC_1- U506
TMDSD1- 7 RXC_0+ 1 8
TMDSD0+ 8 2 E0 VCC 7
DSHLD2 9 RXC_0- 3 E1 WC 6 HDMIC_SCL
TMDSD0- 10 RXC_C+ 4 E2 SCL 5 HDMIC_SDA
TMDSC+ 11 VSS SDA
CSHLD0 12 RXC_C-
TMDSC- 13 CEC_C M24C02-WDW6P
CEC 14
NC 15 R541 100R 1/16W 5% HDMIC_SCL R556
SCL 16 R542 100R 1/16W 5% HDMIC_SDA DDC_WP#
SDA 17 Q508
23 DDC_GND 18 HD5V_C R545 1K 1/16W 5% PMBS3904 1K 1/16W 5%
SHLD3 VCC5 L : WP
19
21 HPD
SHLD1 H : Write
2
2
NC/BAS316 D513
NC/BAS316 D514
NC/BAS316 D515
HDMI
2
A K
A K
A K
Q506
PMBS3904 R544 GND 4,5,6,7,8,9,10,11,12,14,15,16,17,18,19,20,21,22,23,24
1
4K7 1/16W 5%
1
2 2011-09-01
19190_512_110908.eps
110913
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 48
2
FB1107 FB1108
NC/120R/3000mA NC/120R/3000mA FB1109 FB1110
NC/120R/3000mA NC/120R/3000mA
T2D_TIF-
T2D_TIF- 15
T2D_TIF+
T2D_TIF+ 15
1
ASIC_3V3 VDD12
1
+ +
C1101 C1102 C1105 C1103 C1106 C1104 C1107 C1119 C1120 C1121 C1122 C1123 C1124 C1125 C1126
NC/220UF 16V 1uF 16V 100N16V 1uF 16V 100N16V 1uF 16V 100N16V NC/220UF 16V 100N16V 100N16V 100N16V 100N16V 100N16V 100N16V 100N16V
VDD33 V3.3
GPIOs from Demodulator IC
V3.3 AVDD33
VDD33 TESTIO20 R1103 100K 1/16W䠄N C 䠅
DEMOD_RESET
DEMOD_RESET 4
TESTIO22 R1104 100K 1/16W(NC) R1122
10K 1/16W 5%(NC) DEMOD_TSDATA0
2
DEMOD_TSSY NC DEMOD_TSDATA0 4
FB1111 FB1112 DEMOD_TSVALID DEMOD_TSSY NC 4
DTMB_RESETN R1123 0R05 1/16W(NC) DEMOD_RESET DEMOD_TSCLK DEMOD_TSVALID 4
NC/120R/3000mA NC/120R/3000mA DEMOD_TSCLK 4
TESTIO21 R1124 100K 1/16W(NC)
VDD12
VDD33
VDD33
VDD33
VDD33
VDD33
VDD12
DTMB_RESETN
VDD33
TESTIO20
TESTIO21
TESTIO22
R1127 R1126
PWM0 10K 1/16W 5%(NC) 200R 1/16W 5%(NC) IF_AGC_D2T
VDD_DIV
L1101
2.2uH(NC) C1127 C1133 C1134 Demod I2C
1uF 16V(NC) 100N16V(NC) 100N16V(NC)
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
VDD12
VDD33
PWM1
VDD33
DBGBUS10
VDD33
DBGBUS11
DBGBUS12
VDD33
VDD33
VDD12
GND
RESETN
NC
NC
NC
close to ATBM8848
ASIC_3V3
DVDD_ADC
AVDD_REF
REFCLKI1
VDD_OSC
TESTIO16
TESTIO15
TESTIO14
TESTIO13
TESTIO12
TESTIO11
VDD12
VDD33
QVINN
QVINP
IVINN
IVINP
Parallel TS
R1118 R1119
10K +-1% 1/16W 10K +-1% 1/16W
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
TS7 TP01
REFCLK1 TS6 TP02
TS5 TP03 IVINN C1137 100N16V T2D_TIF-
IF_AGC_SW
ASIC_3V3
ASIC_3V3
T POINT R(NC)
VDD33
VDD12
VDD33
GND 4,5,6,7,8,9,10,11,12,13,15,16,17,18,19,20,21,22,23,24
LD1101
TESTIO21 1 2 LOCK
NC/LED R1125
330R 1/16W 5%(NC)
2 2011-09-01
Demodulator 715G5151
(DTMB, DVB-T & PAL)
19190_513_110909.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 49
FB1102 1 2 +B_5V
R1140 IF_AGC_S2T
IF_AGC_S2T 4
4K7 1/16W 5% R1141 0R05 1/16W OSCL0
FB1101 1 2 L1108 150uH +B_5V Q1102 IF_AGC_D2T
IF_AGC_D2T 14
2N7002
120R/3000mA TU_5V_SCL R1138 100R 1/16W 5% R1142 NC/0R05 1/16W TU_SCL
+
C1139 C1140
220UF 16V 10uF 10V C1142 OSCL0
OSCL0 4,5,7,12,14,20
22pF 50V +B_5V 3V3_BUCK OSDA0
OSDA0 4,5,7,12,14,20
R1143
C1143 4K7 1/16W 5% R1144 NC/0R05 1/16W TU_SDA TU_SCL
TU_SCL 14
22pF 50V Q1103 TU_SDA
TU_SDA 14
2N7002
R1130 0R05 1/16W TU_5V_SDA R1139 100R 1/16W 5% R1145 0R05 1/16W OSDA0
A Tuner :
T2S_TIF+
TU102 T2S_TIF- T2S_TIF+ 4
F35CT-6-E R1151 0R05 1/16W T2S_TIF- 4
RFAGC_I R1152 10K 1/16W 5% RF_AGC_S2T
1 T2D_TIF+
N.C 2 T2D_TIF- T2D_TIF+ 14
N.C 3 C1147 T2D_TIF- 14
N.C 4 RFAGC_I 47N16V
RF AGC 5 +B_5V BST_CTL
B+(+5V) BST_CTL 4
6 TU_5V_SDA
SDA 7 TU_5V_SCL For ATV only
SCL 8
N.C 9 R1188 NC/0R05 1/16W IFAGC_T IF_AGC_SW
N.C IF_AGC_SW 14
10 TIF+
IF+ 11 TIF-
IF-
TH4
TH3
TH2
TH1
C1149 C1148
56pF 50V 56pF 50V R1150 NC/0R05 1/16W
15
14
13
12
Q1106
PMBS3906(NC) For DTMB
C1145
1
D+A Tuner : V3.3 +B_5V 100N16V(NC) R1148 +B_5V
100K 1/16W(NC)
10K 1/16W 5%(NC)
R1166
RFIN_CTL
H: input 2 (cable) R1198 C1159 IF_AGC_SW
L: input 1 (AIR) Q1109 4K7 1/16W 5%(NC) 100N 16V(NC) Q1107 R1158
2
1
4K7 1/16W 5%(NC) PMBS3906(NC)
1 RFIN_CTL Q1108
RF S/W CTL 2 3 2 IF_AGC_S2T
Bst CTL 3 +B_5V
+B1 4 RFAGC_I C1162
N.C(RF AGC) 5 100N 16V(NC) R1147 For T032D Analog, DVB-C/T
N.C 6 TU_5V_SCL R1192 NC/0R05 1/16W
SCL 7 TU_5V_SDA 20K 1/16W 5%(NC) BST_CTL
SDA 8 Q1101
N.C(AIF) 9 R1136 PMBS3904(NC)
N.C H: ON
10 100K 1/16W 5%(NC) L: OFF
N.C 11
N.C 12 For DTV (bypass AIF & DIF switch)
GND 13
N.C 14 TIF+ T2D_TIF+
N.C 15 R1194 NC/0R05 1/16W
N.C 16 IFAGC_T
IF AGC 17 TIF- TIF- T2D_TIF-
DIF 1(N) 18 TIF+ R1193 NC/0R05 1/16W
DIF 2(P)
TH4
TH3
TH2
TH1
22
21
20
19
IF BPF
C1150 100P 50V
C1157
NC/100N 16V
L1116
TIF+ T2S_TIF+
R1153 33R 1/16W 5% R1155 33R 1/16W 5% R1161 R1159
C1152 0R05 1/10W 0.12UH 51R 1/16W 5%
10N 50V GND 4,5,6,7,8,9,10,11,12,13,14,16,17,18,19,20,21,22,23,24
R1157 C1155 L1111 L1114 C1154
68R 1/16W 5% 220pF 50V 0.1uH 0.22UH 100P 50V
L1117
TIF- T2S_TIF-
R1154 33R 1/16W 5% R1156 33R 1/16W 5% R1162 R1160
C1153 0R05 1/10W 0.12UH 51R 1/16W 5%
10N 50V C1158
NC/100N 16V
2 2011-09-01
19190_514_110909.eps
110926
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 50
R642
10K 1/16W 5%
HPHONE_EN
V_MUTE 2 3
R625 Q607 HPHONE_EN HPHONE_EN 19
Q609 10K 1/16W 5% PMBS3904
R638 PMBS3906
1
47K 1/16W 5%
R643
10K 1/16W 5%
POP_MUTE#
POP_MUTE# 4,18
H: UN-MUTE
L: MUTE A_MUTE
DVDD3V3_AMP
+12V 5V_SW 5VSB V_MUTE
POP Killer Output
R621
470K 1/16W 5%
D603 AMP_PD#
D601 D602 BAT54C
NC/1N4148W H: ON
BAT54C R620 L: Pow er Dow n
Q604
V_MUTE 2 3 10K 1/16W 5% PMBS3904
Q603
PMBS3906
R618 1
47K 1/16W 5%
R619
5VSB +12V 5V_SW V_MUTE 10K 1/16W 5%
H: UN-MUTE
A_MUTE L: MUTE
R624 V_MUTE
R630 R665 R622 2.2K 1/16W
NC/100R 1/16W 5%
NC/100R 1/16W 5%
100R 1/16W 5%
3
C603 R628
100N 50V 10K 1/16W 5%
1K 1/16W 5%
ZD601 R627 L : Mute
BZX84C3V6 R626 Q602 Q605 H : Un-mute
1K 1/16W 5% PMBS3904 PMBS3904
1
Q601 POP_MUTE#
PMBS3904 C604 Q606 R629
1uF 16V PMBS3904 1K 1/16W 5%
R623
470OHM1/10W
2 2011-09-01
19190_515_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 51
ADC_KEY
ADC_KEY 4
TOC_KEY
TOC_KEY 4
LIT_SENSOR
LIT_SENSOR 4
3V3SB_2
H : OFF
ITV_IR
L : ON ITV_IR 7
5V_SW
R201
10K 1/16W 5% LED_RED_OFF# R220 0R05 1/10W LED_RED
100R 1/16W 5%
ZD201 C205 C206
NC/BZX384-C5V6
C203 3V3SB_2
100N 16V ITV_IR 100N 16V 100N 16V
1
R206
NC/4K7 1/16W 5% Q201
NC/2N7002
OIRI R208 0R05 1/16W
100R 1/16W 5% 6
ZD202 7
Link to IR/Keypad Bd.
NC/BZX384-C5V6
C204 KEY 1 8
100N 16V KEY 2 9
10
11
1
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,18,19,20,21,22,23,24
2 2011-09-01
19190_516_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 52
AV Out (Rear)
AV Out (Rear)
B15 B15
MONITOR_OUT
MONITOR_OUT 4
AV_OUT (CVBS+R/L)
AL0O
AL0O 4
AR0O
AR0O 4
2
5V_SW
CVBS OUT R1196 C1168 C1167 C1177 ZD1103
75R 1/16W 1% 47pF 50V 47pF 50V
NC/47pF 50V UDZSNP5.6B
R1197
2K 1/16W 5%
1
R1177 51K 1/16W 5%
R1179
1.02K 1/10W 1%
14
13
12
11
10
9
8
1N 50V 100N 16V 10U 16V
4
UVP
+INL
OUTR OUTL
-INL
CP
PGND
PVSS PVDD
U605 R1189
B
0R05 1/10W 3
C1175
R/L OUT
SGND
DRV603PWR 1uF 16V 6
+INR
-INR
CN
EN
R1190
C
2
0R05 1/10W 5
C1182 ZD1101 C1183 ZD1102
1
2
3
4
5
6
7
NC/VPORT0603100KV05
NC/VPORT0603100KV05
10N 50V 10N 50V CONN
C1176
R1173 15K 1/16W 5% 1uF 16V L : Mute
1
AR0O C1173 R1184 H : Un-mute
10U 16V
5K1 1/16W 5% C1166 EN_AV3 R1187 0R05 1/16W POP_MUTE#
R1174
NC/100K 1/16W 220pF 50V
R1182 C1169
10U 16V
9K1 1/16W 5%
C1172 R1181
47K 1/16W 5%
1N 50V
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,19,20,21,22,23,24
2 2011-09-01
19190_517_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 53
Headphone Out
Headphone Out
B16 B16
HPHONE_DET HPHONE_DET 4
H/Phone_Out (R/L)
R640 22R 1/16W 5% OUTL
HPHONE_EN HPHONE_EN 16
AVDD3V3_HP C612 AVDD3V3_HP
10N 50V
SMD/0402
3V3_BUCK AVDD3V3_HP C613 R644 AL1O
AL1O 4
2.2UF 16V 4K7 1/16W 5% AR1O
AR1O 4
R631 0R05 1/16W HPHONE_EN
Near MT5301
17
16
15
14
13
C605 R645
100N 16V NC/10K 1/16W 5%
Thermal Pad
OUTL
SGND
AVDD
EN
C606 R632
AL1O R633 10K 1/16W 5% 1 12 C615 2.2UF 16V
INL- HPVDD
10uF 10V 0R05 1/16W C610 2
INL+ 11
C607 1N 50V CPP
2.2nF 50V U606
3 10
C608 R634 INR+ TPA6132A2RTER PGND C616
AR1O R635 10K 1/16W 5% 4 1uF 16V
INR- 9
HPVSS
OUTR
10uF 10V 0R05 1/16W CPN
C611
G0
G1
AVDD3V3_HP C609
2.2nF 50V 1N 50V
8
G0 C614
R668 R685 1uF 16V
NC/10K 1/16W 5% 10K 1/16W 5%
G1
G0 G1
10N 50V
AVDD3V3_HP
Headphone Out_Side Direction
R686
4K7 1/16W 5%
HPHONE_DET R641
100R 1/16W 5%
OUTR R636 0R05 1/16W HP_R L : NC
C656 CN602
H : PLUG IN 100P 50V
C617 PHONEJACK
NC/22N 25V 5
4
HP_R R687 0R05 1/10W 3
HP_L 2
OUTL R637 0R05 1/16W HP_L R688 0R05 1/10W 6
2
7
C654 C650 ZD602 ZD603 1
C618
NC/VPORT0603100KV05
NC/VPORT0603100KV05
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,20,21,22,23,24
2 2011-09-01
19190_518_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 54
AMP_RB
AMP_RA
2 120R/3000mA
AMP_LA
AMP_LB
I S Post Amplifier
2
49
48
47
46
45
44
43
42
41
40
39
38
37
+
C622 100N 50V 100N 50V 100N 50V 100N 50V 220N 50V
330UF 35V
LA
LB
VDDLB
GNDL
RB
RA
VDDRB
THERMALPAD
NC
NC
NC
GNDR
NC
DVDD3V3_AMP C633 R658 C637
1 36 1N 50V 10 OHM 1/10W 100N 50V C640
2 VDDLA VDDRA 35 1N 50V
3 NC NC 34
4 NC NC 33 R656
5 NC NC 32 10 OHM 1/10W
R648 AMP_PLL# 6 NC NC
U602 31 FB606 C636 CN601
AOMCLK 7 PLL NC 30 L602 56UH 100N 50V
MCLK AD82587-LE48NAY NC DVDD3V3_AMP
33R 1/16W 5% 8 29 AMP_RB 1 2 ROUT- SPK_R- SPK_R- 1
9 CLK_OUT NC 28 120R/3000mA SPK_R+ 2
3V3_BUCK DVDD3V3_AMP 10 DGND NC 27 L603 56UH SPK_L- 3
R649 AMP_DEF 11 DVDD DVDD 26 AMP_LA 1 2 LOUT+ SPK_L+ SPK_L+ 4
FB604 DEF DGND
AOSDATA0 12 25 OSDA0 FB607 120R/3000mA
SDATA SDA
ERROR
33R 1/16W 5%
RESET
1 2
MONO
LRCIN
BCLK
120R/3000mA R659 C643 CONN
SCL
SA0
SA1
NC
NC
NC
PD
10 OHM 1/10W 100N 50V
C627 C628 C629 C630
1UF 10V 100N 16V 1UF 10V 100N 16V C648
13
14
15
16
17
18
19
20
21
22
23
24
R661 1N 50V
10 OHM 1/10W C644
OSCL0 C641 100N 50V
AMP_PD#
AMP_MONO 1N 50V
AMP_ERROR#
AMP_RESET#
AOLRCK R650 33R 1/16W 5% C647
AMP_SA0
AMP_SA1
220N 50V
AOBCLK C646
R683 R651 33R 1/16W 5% C642 R662 100N 50V
1N 50V 10 OHM 1/10W
0R05 1/10W
AMP_PD# C649
R682 R660 1N 50V
R654 10 OHM 1/10W C645
0R05 1/10W FB608
C631 0R05 1/16W L604 56UH 100N 50V
R646 0.47uF 16V AMP_LB 1 2 LOUT- SPK_L-
120R/3000mA
0R05 1/10W
R647 AMP_PD#
0R05 1/10W H: ON
L: Pow er Dow n
OSDA0
OSDA0 4,5,7,12,14,15
OSCL0
OSCL0 4,5,7,12,14,15
SPDIF OUT
DVDD3V3_AMP DVDD3V3_AMP DVDD3V3_AMP
AOMCLK
AOMCLK 4
AOBCLK
AOBCLK 4
AOLRCK
AOLRCK 4
C651 RCA JACK AOSDATA0
R663 AOSDATA0 4
SPDIF_OUT ESPO 2 R673
330R 1/16W 5% R669 R671 470K 1/16W 5%
10K 1/16W 5% 10K 1/16W 5%
NC/VPORT0603100KV05
2
1
CN603 AMP_PD#
AMP_PD# 16
R670 R672 C653
NC/10K 1/16W 5% NC/10K 1/16W 5% 1UF 10V
1
ARC_OE#
ARC_OE# 4
DVDD3V3 5V_SW R674 R676 R678
NC/10K 1/16W 5% NC/10K 1/16W 5% NC/10K 1/16W 5% ARC_A
ARC_A 12
AMP_PLL# AMP_MONO AMP_DEF
R690
U603 NC/1.2K 1/16W
ARC_OE# 1 5
OE VCC R680 C657 R675 R677 R679
SPDIF_OUT 2
3 A 4 ARC_A 100K 1/16W 10K 1/16W 5% 10K 1/16W 5%
GND Y
SN74LVC1G125DBVR 180R 1/16W 5% 1UF 10V
R681 R689
82R 1/16W 5% 100K 1/16W
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,21,22,23,24
2 2011-09-01
19190_519_110909.eps
110927
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 55
R712
CONN PSU_STBY
3
8.2K 1/10W
R701 H : ON
10K 1/16W 5% ZD701 L : Standby
NC/BZX84C3V6 R738
NC/0R05 1/16W
1
FB703 5VSB
OPWRSB
1 2
120R/6000mA
+ C705
470UF 10V C706
10uF 10V
PWR_OK
R750
0R05 1/10W
R708 R709
R704 R706 NC/2.2K 1/16W 1K 1/16W 5%
NC/2.2K 1/16W 2.2K 1/16W R746
4K7 1/16W 5% R710
BRI_ADJ
R705
BL_CTRL 0R05 1/16W R752
0R05 1/16W R751 R707 C708 0R05 1/10W
0R05 1/10W BL_DIM_PWM
R744 10K 1/16W 5% Q703 NC/1UF 10V
10K 1/16W 5% Q702 C707 R711 PWM Control PMBS3904
NC/2N7002 100N 16V 47K 1/16W 5%
R703 0% : Max Luma
BL_ON/OFF#
10K 1/16W 5% Q701 99% : Min Luma
L : BL_ON PMBS3904
H : BL_OFF
R702
NC/10K 1/16W 5%
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24
2 2011-09-01
19190_520_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 56
2
NC/120R/6000mA
R715 C762 FB711 FB712 FB713
10K 1/16W 5% 220NF 25V 120R/6000mA NC/120R/6000mA NC/120R/6000mA
ZD702 NC/120R/6000mA
1 3 1 8 FB714
2 S D 7
1
NC/BAT54 3 S D 6 1 2
4 S D 5
G D
R716 Q707
R713
VCCK 20K 1/16W AO4449 -7A/-30V C710 R725 C714 1
S D
8
C709 R717 56KOHM 1/16W 220NF 25V 2 7
3 S D 6
Q704 NC/470nF 16V 10K 1/16W 5% 100N 50V
4 S D 5
1V2: ON 1K 1/16W 5% PMBS3904
G D
0V: STANDBY R714
R724 R726 56KOHM 1/16W
10K 1/16W 5% LVDS_PWR_EN Q709
Q706 C715 AO4449 -7A/-30V C716
L: Off 1K 1/16W 5% PMBS3904 NC/220NF 25V 100N 50V
H: On R727
10K 1/10W
1 2 1 2
120R/6000mA
120R/6000mA
+12V R720 C711
FB709
NC/56KOHM 1/16W NC/330N 50V 1 8
2 S D 7
1 2 R722 3 S D 6 D701
S D LVDS_PWR_EN
4 5 1 2 LVDS_PWR_EN 4
NC/120R/6000mA NC/180K G D
PSU_STBY
Q708 SX36 PSU_STBY 4,21
R721 NC/AO4449 -7A/-30V
NC/56KOHM 1/16W C712 C713 R723
NC/330N 50V 100N 50V 10K 1/4W
R718
PSU_STBY
Q705
L: Off NC/10K 1/16W 5% NC/PMBS3904
H: On
R719
NC/10K 1/16W 5% GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,23,24
2 2011-09-01
19190_521_110909.eps
110927
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 57
3V3 Main Power : 5V_SW 1V8 or 1V5 DDR Power : DDRV DDRV
5V_SW 3V3_BUCK FB716 DVDD3V3
3V3_BUCK
2
2
1 2 FB718 FB719
FB715 120R/3000mA 120R/3000mA
120R/3000mA C722
120R/3000mA L702
U701 SC189ASKTRT U702 SC189ASKTRT
L701
1UF 10V 1 5
1 5 R731 VIN LX
1
GND
R728 VIN LX 3 4 2.2uH
1
GND
3 4 2.2uH 1K 1/16W 5% EN VOUT R732 C726
1K 1/16W 5% EN VOUT R729 C719 C720 C721 C725 8.2K 1% C727 C728
3V3_BUCK FB717 AVDD3V3
23.7K 1% C724 10N 50V 10U 16V 10U 16V
2
C717 C718 10N 50V 10U 16V 10U 16V 10U 16V 10N 50V
2
2
C734 1uF 25V
2
1 2
FB721 FB722 FB723
FB720 NC/120R/3000mA 120R/3000mA 120R/3000mA
120R/3000mA NC/120R/3000mA AOZ1242AI C738
U703 C735 NC/1UF 10V
100N 50V L703
1
8 1
1
7 VBIAS LX 2 15uH
6 VIN BST 3
EN GND 5V_BUCK FB725 BUCK_USB2
5 4
R734 COMP FB
47K 1/16W 5% R736 1 2
2
+ 56K 1%
C729 C730 C733 NC/120R/3000mA
100UF 50V 1uF 50V 1.2nF 50V D702 C736 C737 C739
C731 C732 R737 SX34 10uF 25V 10uF 25V NC/1UF 10V
180P 50V
1
15K 1/16W 5% USB2.0 = 1000mA
Tuner = 450mA
OPWRSB
FB726 R745 NC/RB160M-60TE25
120R/6000mA H: ON 1K 1/16W 5% D703 L704
L: OFF 1 2 1 3
NC LX 4.7UH
2
IN R743
Thermal Pad
1
C744 R742
1
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24
2 2011-09-01
19190_522_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 58
LDO Regulator
LDO Regulator
B21 B21
2
5VSB 3V3SB FB729 FB730
U705 120R/3000mA 120R/3000mA
FB727 G903T63UF FB728
L705
U706 SC189ASKTRT
1 2 3 2 1 2 1 5
120R/3000mA VIN VOUT 120R/3000mA R747 VIN LX
1
GND
3 4 2.2uH
GND
1K 1/16W 5% EN VOUT R749 C755
4
C750 Vout = 3.3V C751 C752 C754 2K 1% C765 C766
1UF 10V 10U 16V 10U 16V C753 10N 50V 10U 16V 10U 16V
2
4.7UF 10V 10N 50V
1
4
R748
10K +-1% 1/16W
1 2 3 2 1 2 1 2 3 2 1 2
NC/120R/3000mA VIN VOUT NC/120R/3000mA NC/120R/3000mA VI VO 4 NC/120R/3000mA
4
GND
GND
4
C756 Vout=Fixed 3.3V C757 C758 C759 Vout=Fixed 1.2V C760 C761
NC/1UF 10V NC/10U 16V NC/10U 16V NC/1UF 10V NC/10U 16V NC/10U 16V
1
1
Demod_3V3 = 85mA. Demod_1V2 = 210mA
+12V
NC/G9084-50TU3U LDO_USB2
R754 NC/15 OHM +-5% 1/4W U709 TO-263T
3 2
VIN VOUT
t
ADJ/GND
2 1 C763
NC/PTCR NC/100N 16V
TH1003 5V_MEMC
1
GND 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23
2 2011-09-01
19190_523_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 59
C715
R726
FB1008
CN411
C739 FB1007
R701
R750
Q704
FB713
FB711
FB712
C706
C1006
D704 C746 Q709 C1011
ZD702
R716
C403
FB401
C716
TH1003
R715
R1013
R1012
R1011
R754
C1001
R725
R409
TH1002
TH1001
FB707 FB714
R752 R751 L704 C762
C709
FB723
D703
R709
R1016
U704
U1002
C705
FB703
U1001
C708 C707 R706
CN408
R708 C763
C703 R710 R711
R705
R704
Q703
R1001
R1002
R1003
R1006
R1014
R1005
R1004
Q707 R1015
FB726
Q702
U709 CN104
C741
C1007
R712
R740
L702
C402
C401
C710
L703 R744
R406
R405
R403
Q701
R402
R738
FB702
D702 C704
C701
C1008
R703
FB734 U708
R707
FB710 R702
FB708
C761
R736
R737
C755
C735
R749
R748
C766
R4044
C760 FB733 C759
FB730
L705
C717
FB715
C1002
C718
C765
FB701 C754
C732
U703 Q708
R4137
FB709 U706
R747
C702
C734
R4043
FB719
C756
R728
C713
RP4103
C733
R4006
C4033
FB721
R625
D701 L701
R4130
U701 R631 C605
R4132 R4035
R735
LD1101
C731
C730
R4038 R1122
R1103
R4131
R1124
FB720 R723
U402 C4121 RP4104 RP4102 RP4106
R4037 R1123
C1130 R1104 R632
C4102
R4041
C719 C607
C721
C720
FB716 R4036 R642
R1105
R645
FB603
FB722
R634
R633
C610
R730 R729 RP1101
U403
R4055
R1106
CN103
FB604
R4040 R644
FB727 C750 R1107
C639 C609 C613
42 57
R1108
0
C4013
C634
C635
R R4
R635
C638 R4033
U101
40
R657 R1109
R4032
C616
FB728
L1101 R1141
L601
C1127
C752
C751
Q1102 R686
R1117
R1142
R4128
R639
C614
C1123
C656
R1102
R641
C640
C636
C632
C4019
R4129
R746 R4001
R4009
U401 R680
C1108 R1101
C1128 C1129
C655
R637
C618
R688
R689
R655 R681
C1101
C4001
R658 L602 C4049 R4002
C628
C629
R4049 R4010
C657 R690
R4005
C624
FB605 C4048
C637
R672 X1101 C654
CN602
R1144
R4024
R1145
R4048
R1191
R1158
FB606 R670 R4004 C4002 ZD602
R662 R1119 R1118
C653
C626
C646
C633 R656
R654
C4043 R1121 R1120
Q1108
R4054
R1194 C1138
R1193 C1137
C4044
C4036
R651 C651
C645 U602
C625
L604 R650
R4017
FB608
C647
R636
C617
C606
ZD603
R677
C650
C649
R1147
R687
R660
C623
C643 C4105
R661
C642
C644
R4023 R4107
22
40
R678 R649 C4106
R
R675
R648
R1149
L603
R101
R102
FB607
L1108
C114
C108
C107
Q603
C151
C147
C148
C149
C145
C127
C132
C134
C135
C138
C139
C1145
C4123
R4119
R4118
R4028
R4030
R4012
R4011
R4052
R753
R628
R1160
R1159
C4051
R4121
R618
L4101
R115
R105
R104
D601 C4125
R638
C104
R647
C105
C604
Q605
R643
R4110
R4108
R4026
R4025
R4120
R4051
R619 L1114
R745
R627
C4031
Q609
R1165
C122
C123
C126
R172
R168
R169
R170
R166
C121
R140
R149
R151
R152
R155
R156
R665 C1157 C1154 C1158
D602 R410 R531
ZD601
C1150 C1151
Q602
R1157
R1162 C1153
L1111
R1156
R419
R421
R150
R4027
R4029
R220
R411
R415
R412
R413
R414
R416
C1139
R136
C1155
R135
R139
C205 R626 R630 R418 R1161 C1152 R1155
R417
R224 R4060 C120
R134
C207
R206
R207
Q201
FB101
R1139
C101
C1171
C1176
Q402
C1174
FB202
C202
C1143
R127
FB1101
C203
TU101
R663
R201 R1140
Q401
R202
CN401
C738
R125
C204
R203 R204 R1138
R4111
C652 FB724
R4139
R180
R177
C1142
R420
R175
R174
C153
ZD201
R197
FB201 R664
CN502 C156
TU102
C103
ZD202 Q1101 R1192
R187
C102
C4107
R4112
R173
R176
C154
R179
R178
C155
ZD605
ZD121
Q107
R520
R519
R558 R190
R560 C1159
R557 R189
R123
R559
Q109
R223 R1146
R222
U104
R182
R1137
Q105
R146
R162
R111
R161
R145
R211
Q108
CN603
FB110
FB109
FB108
R181
R183
U501
D101
C110
D113
D114
D115
R121
Q502
C130
C111
CN102
R525
R523
R107
C152
R109
FB111
U105
ZD102
R535 R539
R154
C137 C109
R536
R555
R554
ZD505
R551
D510
C136
R153 R106
R217 R159 R114 R188 FB107
FB105 R218 FB106 R108
Q507
R506
R524
R219
R532
D516
R547
CN101
R538
ZD112 D107 ZD113 D108 ZD114 D109
U506
R537
R540
Q505
C106
R534
R103
R528
FB114
CN501
R550
R549
R548
C502
C515
U502 D102
CN113
FB501
R198
R133
R553
C516
ZD503
U505 C128
C1168
R1196
L1115
R1189 R1190
CN410 FB102
R143
C1167
R533
D104 R141
C510
R517
R515
R516
ZD1103
U504 C129
CN121
D517
R144
R142
R552
D502
R502
R501
Q503
CN1101
ZD111
D503 CN111
R518
ZD501
R503
R556
D501
R526
Q501
D505
R504
Q508
R514
CN506
C124 C125
D514
R407
R408
FB103
FB104
R137 R138
R652
Q403
R425
R541
R423
R424
U404
CN412 R199 R200 D515
D105
ZD108
D106
ZD109
R542
ZD506
D513
R545 R546
Q506
R543
R544
1 2011-05-18
SSB
715G5151
layout top
19190_524_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 60
FB402
FB403
FDT3
C742
C748
C749
FB718
Q706
R742
R743
C747
C743
C744
C725 R731
C724
R724
R727
U702 C737
R741
C745
R1010 R1009 R1020 R1019
C1005 C1004 C1010 C1009
R718
C736
R1017 R733 ZD701
C726
R732
R1018
C727
R719
Q705
U1005 R1007
R1008 C712
R721
C728
FB729
FB731
C711 R720
R4109
R717 FB732 R4106
R722
Q4101
FB1109
C757
C4122
C4117
C4110
R4103
C4109
C758
C4116 C4020
R4135
R4102
R4117
R4115
FB1111
C4010
C4120 C4009
R4014
C4026
C4119
C4050
U4103
C4034
R4141
C4012
C1113
C1116
C1110
C1118
C1126
C1120 C4113
C4006
C4018
C1003
C1122
R4050
C4005
R4015
C4027
C4028
C1115
C1111 R4034 R4101 C4114 R4008
C4029
C1114 R4007
C4104
C1109 C4008
C4024 C4014
C615
R4039
C1124 C4023
R4136
C1121
R640
C4115
R1127
FB1112
R1114
R685
C1112
C1117
R4105
R4104
C612 C1133 C4007
C4103
R1115
R684
R1126
C722
R667
FB1108
C4011
C1106
C1107
C1105
C4108
C4021
C1134
C1104
C4016
C4015
C4025
U603
C4017
FB1107 R4122
C4030
C1102 R4123
C1103
R530
R671
Q1103
R669
R673
C723
R4019
R4046
R4020
R4018
R4047
R4016
R4013
C4045
R4045 C4022 R682
C608
R4021
C4003 R621
FB717
R1150
C4046
C4047
C4035
C4038
C4032
C4004
C4039
C4037
R1130
C4042
C4041 R676
Q1106
C4040
C627
R1148
R674
Q1107 C630
FB1102
R683
C631
Q604
R620
R1166
D603
R132
R126
Q606
Q104
R522
R4059
R1173
R521
R622
C1149 C1148
R624
R1154
R623
R1153 R1174 C1173 C1172
R185
R1188
CN406
R1171
R128
R1184
R122
C1175
C1166
R1182
Q101 R4058
U605
R1186 R1181
R131 C1169
R1175
C1165
Q102
C1170
R1179
R1197
R1177
C1164
R1152
R4140
U4101
C1147
R1151 R509
U102 R508
R110
R113
R1198
D504
Q1109
FB502
C112
R192
C509
C503
C1162 R191
R1136 R194 R193
R148 R164
R511
R510
C131
C143
C142
C508
C505
C504
D511
D512
R1133
C506
C507
R205
U103
R119
R118
R117
Q106
R116
R195
R120
C140
C113
R157
C141
R160
R158
ZD115
ZD116
1 2011-05-18
SSB
715G5151
layout bottom
19190_525_110909.eps
110909
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 61
IR/LED board
J DV33SB J
R301
6.2K 1/10W
1
LED302
LED RED 204-10SURD/S530-A3
TP1
Red
R304
2
1K 1/10W
Q301
BC847C
CN301
S1315-07RVB-S01-K
9
LED_R
DV33SB
1 TP3 DV33SB
2
3 RC6 TP4
4
1
5 DV33SB R203
6 Key 1 R201 100 OHM 1/10W U201
1
Key 2 3
VS
1
8
OUT
----><----|
2
C201 GND
1
22U 10V
TP5 TP6
5
3 ZD202
1
1
2
2 VPORT0603100KV05
1
4
CN001
2 2011-05-20
715G3975
19180_500_110819.eps
110927
2011-Sep-30
Circuit Diagrams and PWB Layouts TPM8.3L LA 10. EN 62
Q301
C201
R203 ZD202
CN301 CN001
LED302
U201
2 2011-07-14
IR/LED board
715G3975
layout top/bottom
19180_501_110819.eps
110927
2011-Sep-30
Styling Sheets TPM8.3L LA 11. EN 63
40
91
50
2011-Sep-30