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5G Physical Channel Processing
5G Physical Channel Processing
5G Physical Channel Processing
5G/NR - PDSCH
It is about the process of converting user data
into PDSCH data and transmit it through each
transmission antenna.
• The second step(Code Block Segmentation) is as follows. It is splitting the big transport block into multiple small blocks
and add another CRC to each of the split chunks. process split the input block only when the block is very large.
• In LTE case, 6144 (bits) is the number. (See 5.1.2 Code block segmentation and code block CRC attachment of 36.212)
PDSCH Processing-Channel Coding
• As per 36.212 ,one bit input become 3 bit output as it
goes through the turbo coding processor (It means the
coding rate is 1/3). In this process, one input row
generate three rows of output as follows.
• Just adding another big picture to this rate matching step, take a
quick look at the following figure from 36.212. You see the three
lines of Turbo coding output gets into this rate matching block and
comes out as a single line of bit stream. Our goal is to
understanding the detailed process of "interleaving",
"BitCollection", "Bit Selection and pruning" procedure.
PDSCH Processing
• Next is the last step which is combine the multiple rows of input into one long bit stream as shown below.
• The output of this complicated process become the input (starting point) of another complicated process as shown below
PDSCH Processing
PDSCH Processing
PDSCH Processing
PDSCH Processing
PDSCH Processing
PDSCH Processing
PDSCH Processing
PDSCH Processing
PDSCH Processing
5G/NR - PDCCH
5G/NR - PBCH
5G/NR - PUSCH
LDPC
Simplest error correction code is repetition code,
Code rate = no. of message bits/no of transmitted bits. In above eg its 6/12 = 1/2
When we increase the protection bits, code rate will further decrease. As the Code Rate Decreases,
Protection Increases
LDPC
Lower code rate is more expensive in design as we are transmitting
less message bits. We need code which required less number of
protection bits , fast in decoding
To do this,
We need no. of 1’s is
to have counted
less and parity
protection bit added
bit which to make
protect even no of
entire 1’s and
message added at
the end of
message
LDPC
Let us assume 1 bit is erased during transmission Receiver counts no of 1’s and corrects the error
In this eg , first error bit is corrected using both blue At least 1 bit in each message set must be correct
& black Parity Check sets and second error bit is than only it will work else as shown in below example
corrected using red & blue Parity Check sets, Using it will not work to correct the error bits
this cascade affect correction of 1 bit allows the
correction of other
LDPC
After long research, overlapping Parity Check Sets comes But this overlapping parity check bits creation was not
into the picture. Focus was to get correct parity bits to working for very large message bits because there were
correct the message bits many overlapping message set which creates complication
and cascading affect stopped working for long message set,
process for error correction also becomes slow.
For eg, in below case where 1 message bit & 2 Parity bits are
received with error, in this case we are stuck
LDPC
Solution is need to protect parity bit and message bits equally.
Means all message bits and parity bits are part of Parity Check
Sets
LDPC
Say for eg , 101 is message bit, we select message bit and parity At receiver , assume 3 bits are erased, Parity Check Set with only
bit subset RANDOMLY to select the code, and say encoding is 1 bit eraser (As shown in blue) will first correct the erased bit to
done to get even number of 1’s 0(As total no of 1’s should be even)
Consider equation , n = k + r n = 7 ; k = 4; r = 3
n = Total transmitted bits
k = Information (message) bits
r = Parity bits
This code with be considered a rate 4/7 code as there are 4 bits of data for every 7 bits of transmission.
If the 7 bits of the block are labeled c1 to c7. Here c1, c2, c3 and c4 are data bits. c5, c6 and c7 are parity bits
We can define the parity constraints as shown below. The constraints are defined with ⊕ modulo 2 additions
(essentially an exclusive-or operation).
c1 ⊕ c2 ⊕ c3 ⊕ c5 = 0 e1
c1 ⊕ c2 ⊕ c4 ⊕ c6 = 0 e2
c1 ⊕ c3 ⊕ c4 ⊕ c7 = 0 e3
The above equation can also be represented in a matrix form. Each equation maps to a row in the matrix. 0 terms
have been introduced for columns that did not exist in the original equation.
c1 c2 c3 c4 c5 c6 c7
1110 100
1101 010
1 01 1 00 1
The equations described above are typically represented as a Tanner graph. The data and parity bits are shown on the
top. The equations placing constraints on the data and parity bits are represented below with connecting lines to the
bits covered by each constraint.
LDPC- Encoding
Let’s assume that c3 bit is received in error at the receiver (orange node in the top row). This error results in the two parity
check equation failures (orange nodes in the bottom row).
Tthis algorithm is simple but does not have great error detection
properties. Message passing algorithms improve the decoder
performance
LDPC- Decoding - Message passing algorithms
Parity check set nodes do the local computing , calculate Ri and send back to message node
With this Ri, qi is modified and sent to Parity check set nodes
Summary is receiver received bits , based on this calculate Pi and qi (Using some formula)
This are assigned to Parity check nodes which does local computing that what is the Probability that check node will be
satisfied given a particular bit Ci is 0 or 1 and then they pass that information to message bit nodes
Now this message bit nodes getting information from other parity check nodes as well because each bit node is connected to
multiple parity check equation so it takes those input into account to update its qi.
And this process is continued in an iterative fashion until all parity check constraints are satisfied.
So finally basically once you compute the probability then qi being -1 is more than 1 you decide in favor of 1 or you decide in
the favor of 0
LDPC- Decoding - Message passing algorithms - Example
Consider 8 code matrix as shown below Below Tanner graph corresponding to Parity
check matrix
0 2 3
1
0 1 2 3 4 5 6 7
-0.4 -1.2
LDPC- Decoding - Message passing algorithms - Example
Qi is message passed from ith bit to jth parity check bit, below are eg of computed Qij based on received message
and formula
LDPC- Decoding - Message passing algorithms - Example
Once this Qij is computed next thing is this parity check constraints now going to check ,
given that bit is going to 0 what is the probability that the parity check constraint is satisfied
. Given the bit is 1 what is the probability that the parity check constraint is satisfied and
those are given by R’s as below
Given that 1st bit C is 0, other bits which are involved in parity check constraints they should
have even parity. Given 1st bit 0, what is the probability that sum of these two add up to
even parity and same we are doing in above formula
0
R0 {0,1,2}
So this is the probability that parity check constraint is satisfied given ci is 0 and similarly we
can calculate R
LDPC- Decoding - Message passing algorithms - Example
After this we update our Qi’s values , all those check equations other than that particular bit
and we repeat this Qij being +1 and -1 and we normalized this probability so that they sup
to 1
Probability of being 0 , probability of being 1 and then based on again normalized this
probabilities, now based on whichever is more likely you decide in favor of that
SUMMARY is you have received some bits , calculate these probabilities Qis, send it to
check bit , then it does local computation , sends he information back .
Now this process goes on and on until all the parity checks are satisfied or maximum
number of iteration are reached.
We did it for one bit , similarly can be done for all bits. Beauty of this algorithm is you can
do this whole operation parallel. Nice feature of this is Computation per bit is independent
References
https://in.mathworks.com/videos/5g-explained-downlink-data-in-5g-nr-1558600809645.html
Transport block CRC attachment
• Error detection is provided on each transport block through a Cyclic Redundancy Check
(CRC).
• The entire transport block is used to calculate the CRC parity bits. Denote the bits in a
transport block delivered to layer 1 by a0 , a1 , a2 , a3 ,..., aA−1 , and the parity bits by p0
, p1 , p2 , p3 ,..., pL−1 , where A is the payload size and L is the ETSI 3GPP TS 38.212
version 15.6.0 Release 15 73 ETSI TS 138 212 V15.6.0 (2019-07) number of parity bits.
The lowest order information bit 0 a is mapped to the most significant bit of the
transport block as defined in Subclause 6.1.1 of [TS38.321].
• The parity bits are computed and attached to the DL-SCH transport block according to
Subclause 5.1, by setting L to
• 24 bits and using the generator polynomial g (D) CRC24A if A > 3824; and by setting L to
16 bits and using the generator
• polynomial g (D) CRC16 otherwise.
• The bits after CRC attachment are denoted by b0 ,b1 , b2 ,b3 ,...,bB−1 , where B = A+ L.
LDPC base graph selection
For initial transmission of a transport block with coding rate R indicated by the MCS index according to Subclause
5.1.3.1 in [6, TS 38.214] and subsequent re-transmission of the same transport block, each code block of the transport
block is encoded with either LDPC base graph 1 or 2 according to the following:
- if A ≤ 292 , or if A ≤ 3824 and R ≤ 0.67 , or if R ≤ 0.25 , LDPC base graph 2 is used;
- otherwise, LDPC base graph 1 is used,
where A is the payload size in Subclause 7.2.1.