Logic Design Homework No.

Write your name your ID clearly on a separate page and hand it in.

0. Register on the class web site at http://ce3704.eng.au.edu.

1. Read the attached file xilinx_tutorial1.pdf and replicate the result on your computer.

2. Now implement this function

g(a, z, r, n) = z'r'n + a'zn' + az'n' + z'rn

in Verilog. Make sure you add all the test bench waveforms. You must submit your
Verilog code and simulation result for this problem.

3. Go to the class web site. Retrieve homework 3. Do homework 3.1 for your student ID.

4. Read about homework 3.2 from the class web site.

After recent events of terrorism, many secret agents throughout the world are put on alert
again. You were recruited as one of them. They need a secret device that shows special
codes. The device is built from a standard 7-segment display device. The 7-segment figure
shows segments a, b, c, d, e, f, and g. If a is equal to 1, then segment a will be on. If segment
a is 0, segment a will be off. So on for b, c, d, e, f, and g. The device has a 4-bit input vector
x with x0 as the least significant bit, x1, x2, and x3 as the most significant bit.

a. Minimize all the functions a, b, c, d, e, f, and g as functions of (x3, x2, x1, x0)
b. Draw the schematics from your function minimization from part a.

REMEMBER: variable is list (x3, x2, x1, x0). It is NOT (x0, x1, x2, x3).

5. Read the attached document Verilog II.pdf.

6. Re-do problem 4 in Verilog. Use case statements. Do not use results from problem 4a.