Whitepaper

2021-09

From Electromechanical Relays to robust

semiconductor solutions: Solid-State Relays
with optimized superjunction FET technology
Enabling a new generation of cost-efficient, reliable, and feature-rich
solid-state relays that combine the performance benefits of both
conventional EM relays as well as traditional TRIAC-based SSRs.

Abstract
Recent advancements in superjunction (SJ) FET technologies enable the implementation of low-cost,
low RDS(on), high-voltage (HV) MOSFETs. With the introduction of the latest CoolMOS™ family, the S7
static switching products, circuit designers now have the essential power elements to implement highly
reliable, feature-rich, and unprecedentedly compact solid-state relays (SSRs) at a highly competitive
price point.

This whitepaper summarizes the key features and benefits of this technology and offers guidelines for
selecting the best fit for designers’ needs.

By Stefan Lukasser, Staff Application Engineer, Infineon Technologies Austria AG

www.infineon.com/s7 Please read the Important Notice and Warnings at the end of this document v1.0
Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

Table of contents
Abstract 1
1 Introduction 3
2 Superjunction (SJ) technology optimized for solid-state relays 5
3 Power dissipation and selection of proper SJ FET 6
4 Safe operating area (SOA), gate driving, and robustness 8
5 Summary 11
References 12

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

1 Introduction

The CoolMOS™ S7 MOSFET is built on a successful technical optimization of Infineon’s CoolMOS™ 7

technology for low-frequency switching applications. It makes CoolMOS™ S7 ideal for applications
requiring low conduction losses at the best price, offering an effective way to replace electromechanical
relays with solid-state implementations or improve existing solid-state designs.

Compared to electromechanical devices, Infineon’s CoolMOS™ S7:

• switches faster,
• doesn’t have contact arcing, bouncing, or degradation of on-resistance over a lifetime,
• ensures more system reliability and considerably longer system lifetime,
• is resistant to shock and vibration and is position insensitive
• enables silent operations

Despite being based on a century-old technology, electromechanical relays (EMR) are still widely used
for switching AC and DC loads. EMRs provide excellent power density; however, they face limitations in
terms of controllability, durability, and reliability. These limitations become increasingly important,
especially when a wide range of loads with capacitive (inrush current) or inductive (arcing, overvoltage
spikes) input characteristics must be controlled, and system availability and reliability are a concern.
Therefore mechanical relays are increasingly replaced by solid-state relay (SSR) solutions for high-
performance applications.

Today’s solid-state relays are based on TRIACs (silicon-controlled rectifiers (SCR) for AC systems) or
standard planar MOSFETs (for DC systems) and optically isolated drivers. TRIACs or MOSFETs serve
as the switching element, and the optically isolated drivers are used for control. Known limitations of
state-of-the-art SSRs are the achievable maximum output current, high power dissipation, size, and total
solution cost. High-current SSRs require heat sinks to reach higher output currents and therefore
achieve significantly lower smaller packaging density compared to EMRs, limiting the attractiveness and
applicability to a limited number of application sockets.

The high power dissipation of commonly-known SSR solutions is mainly caused by the conduction
losses of the applied power switches. While TRIACs or SCRs suffer from a residual high forward voltage
drop when in conduction mode (up to 1.5 V/A at 85°C Tj resulting in losses of 1.5 W/A), FET-based
implementations provide the potential for lower losses if properly low RDS(on) values of the pass
transistors are selected. However, existing standard HV FET technologies provide an {RDS(on)∙A} figure of
merit (FOM) of 2-3 Ω∙mm², resulting in very large die sizes and thus device costs. For higher currents,
standard MOSFET-based SSRs are limited to single-ended and DC-only applications and/or tend to be
very costly.

Furthermore, the controllability of standard SSRs is limited. TRIAC (SCR)-based relays can only support
random-phase switch-on, zero-crossing switch-on, and zero-current switch-off. Additionally, the
maximum dv/dt is limited, requiring output snubber circuits, further increasing the footprint, constructed
space, and cost.

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

While superjunction (SJ) MOSFETs have been predominantly used in high-voltage (HV) switched-mode
applications such as PFC and DC-DC converters, Infineon has recently introduced the 600 V
CoolMOS™ S7 family, optimized for cost-sensitive static switch applications. This technology enables
the implementation of a new generation of solid-state relays with operating voltages up to 250 VAC or 350
VDC matching conventional electromechanical relays in both power- and packaging density. Thanks to
utilizing standard silicon technology, the power technology now enables the introduction of SSR
solutions into cost-sensitive EMR sockets.

The advantages of the new technology are widespread:

• The reduced chip size leads to higher packaging density, especially in a back-to-back
configuration of two FETs for both AC and DC switching.
• The unmatched controllability of MOSFETs enables smart SSRs with comprehensive control
features, including phase-control, section control, zero current switching, and zero voltage
switching.
• The increased robustness and the protection features of the FET-based SSRs can eliminate the
necessity of external fusing elements. This enables selective protection of output channels and
high system availability.

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

2 Superjunction (SJ) technology optimized for solid-state relays

For conventional high-voltage (HV) MOSFETs, the voltage blocking capability in the drain drift region is
developed by combining a thick epitaxial region and light doping. This results in about 95 percent of the
device ON-resistance in the drain region, which cannot be improved by the approaches used for low-
voltage (LV) transistors (trench cells with smaller cell pitch), where only about 30 percent of the transistor
resistance is in the drain drift region. The intrinsic resistance of a conventional epitaxial drift region thus
dominates the overall RDS(on) contribution of the overall structure.

To reduce the specific {RDS(on)∙A} [Ω∙mm²] FOM, Infineon introduced in 1999 the CoolMOS™ technology,
which first enabled a novel drain structure employing the superjunction (SJ) concept. Two key principles
are utilized in this transistor design. First, the main current path is much more heavily doped than this in
a conventional high-voltage MOSFET. This lowers the on-state resistance. But without the p-columns
forming a charge compensation structure below the cell structure, the transistor would have a much
lower blocking voltage capability due to the highly doped n-region. The precisely sized and doped p-
columns constitute a “compensation structure,” which balances the heavily doped current path and
supports a space charge region with zero net charge supporting high blocking voltage [1].

With the introduction of the latest generation of CoolMOS™ SJ MOSFETs optimized for static switching
applications, the 600 V CoolMOS™ S7 high-voltage superjunction (HV SJ) MOSFET family achieves an
unprecedented low {RDS(on)∙A} FOM of 0.6 Ω∙mm². This enables the implementation of solid-state relays
in power ranges, packaging densities, and cost levels that were previously impossible.

The improvements enable products with RDS(on) values down to 22 mΩ in a TOLL SMD package.
Products with 10 mΩ, 22 mΩ, 40 mΩ and 65 mΩ in different packages are already available. The
portfolio rollout is currently ongoing. With this broad selection of on-resistance values, designers can
tailor the power dissipation and current class.

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

3 Power dissipation and selection of proper SJ FET

In EMRs, two parts contribute to the power dissipation: coil dissipation (excitation power) and conduction
losses caused by the contact resistance.

Out of these two, the coil dissipation is independent of the load current and contributes significantly to
the power dissipation budget: even high-sensitivity EMRs require an excitation power of several tens up
to hundreds of mW. While a high power peak is required to initiate the switching process of the EMR, the
steady-state power dissipation can be reduced by means of an advanced control circuit. This, however,
requires additional circuitry for the coil control and is limited by the safe operating conditions of the EMR.

Unlike EMRs, FET-based solid-state relays only require a very small switching energy and negligible
holding power. As the control circuit draws very little power, almost the full power dissipation budget is
available for the conduction losses.

While relay contacts provide a low initial contact resistance, it is known that this key parameter increases
significantly over the device’s lifetime [2], [3]. To properly calculate the power dissipation budget of an
EMR switch solution, the degraded contact resistance has to be accounted for. In contrast to EMRs,
semiconductor solutions do not exhibit a change in ON-resistance. Figure 1 shows a comparison in loss
breakdown. The graph shows how an EMR datasheet specifies higher driving losses compared to an
SSR solution. Aging effects such as hot-switching can increase contact resistance over a lifetime.
Furthermore, assuming a 50 percent spread of typical conduction resistance to the maximum specified
resistance in an EMR, a solid-state implementation can balance costs and conduction losses over a
lifetime, as the SSR FETs do not age and have very tight guaranteed maximum RDS(ON) limits.

Figure 1 Loss breakdown, EMR vs. SSR

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

Depending on the power dissipation budget, a designer can choose the transistor pair with the required
RDS(ON). Figure 2 shows a diagram of the maximum total RDS(on) (i.e., the sum of both back-to-back FETs),
depending on load current for four different conduction power dissipation budgets.

Figure 2 RDS(on) selection based on power dissipation budget

As the graph shows, a wide range of power dissipation budgets can be matched with the currently
available portfolio of the CoolMOS™ S7 600V family, enabling the implementation of low-power-loss
relays for different power classes. For example, two 65 mΩ IPT60R065S7 can be used for a 2 A relay
with a maximum power dissipation budget of 0.5 W. The best-in-class 10 mΩ IPDQ60R010S7 extends
this current range above 5 A while still staying within a stringent power budget.

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

4 Safe operating area (SOA), gate driving, and robustness

EMR contacts are robust due to their mechanical nature. However, when the relay is used for hot
switching, i.e., when a relay is either opened or closed while carrying a current, the contacts can degrade
quickly. In general, data about EMR lifetime are given for switching without current or with resistive
loads. In the real world, however, loads are inductive or capacitive or have large inrush currents, like in
the case of incandescent lamps, LED lamps, or small AC/DC converters.

In order to achieve the expected robustness of solid-state solutions, it is of high importance to consider
the particular control requirements of the applied power transistors. For example, it is absolutely
necessary to operate the transistor within its safe operating area (SOA) [4], especially when switching
loads with high inrush currents. Maintaining the SOA limits is becoming increasingly important with low
RDS(on), high-density power FETs. That is because these transistors do not provide an intrinsic current
limitation and only provide very short operating times in linear mode at high VDS and ID current.

Figure 3 Safe Operating Area (SOA) diagram of IPT60R022S7 with switching transient curves
of a 100 μA and a 100 mA driver, demonstrating the need for sufficient driver output
current

However, advantages also come with certain conditions that a circuit designer must consider, especially
when constructing a solid-state relay. The overall smaller chips have reduced thermal capacity and
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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

increased thermal resistance compared to standard FETs of similar RDS(on) classes. This is best
summarized in the safe operation diagram [4].

While the switching speed compared to typical switch-mode applications is not of primary concern, it is
important to consider the maximum SOA when driving large FET stages.

The SOA diagram in Figure 3 shows two switching transients, one from a driver with 100 μA output
current and one from a driver with 100 mA output current. These two switching transients are shown
below, in Figure 4 and Figure 5. The transient time can be considered from the start of current flow until
the end of the miller plateau, i.e., no significant drain-source voltage across the switches. Note that the
100 uA example has about 600 µs transition time and the 100 mA about 10 µs.

Plotting these two transients into the SOA diagram shows that the first case (100 µA driver) slightly
violates the 500 µs diagram line, while the second case (100 mA driver) shows plenty of margin to the 10
µs diagram line.

Figure 4 Switching transient with a capacitive load, driven by a driver with 100 μA drive
strength. Note the different time scale in Figure 5

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

Figure 5 Switching transient with a capacitive load, driven by a driver with 100 mA drive
strength. Note the different time scale in Figure 4.

Standard MOSFETs have a larger SOA diagram, and thus they are generally less sensitive to gate
driving with small output current circuits. An example is photovoltaic isolators (PVI). PVIs are often used
due to their simplicity: the driver does not need an external, isolated power supply. The gate charge is
transferred by means of a photovoltaic effect from the control/primary to the secondary side. However,
as the output drive strength of only several μA is very small, a direct connection of the driver to the
output stage leads to slow transients. The necessary gate charge to fully enhance the transistor is
transferred in several milliseconds.

Especially when switching capacitive loads with high inrush currents, the SOA could be violated. To
ensure safe and reliable operation, sufficient output drive current is required. For this purpose, Infineon
offers scalable system gate driver solutions in small packages.

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

5 Summary

Recent advancements in Infineon’s superjunction FET technologies enable highly cost-efficient, low
RDS(on), high voltage MOSFETs. With the introduction of the latest CoolMOS™ family, the S7 static
switching products, circuit designers now have the essential building blocks to implement miniature-sized
and highly reliable solid-state relays at highly competitive price levels.

This whitepaper elaborates the pros and cons of mechanical vs. solid-state switch implementations.
While EMRs provide low power losses and high power density, they are prone to contact degradation,
especially when used for hot switching. Existing solid-state relays based on standard FET or SCR
technologies provide advanced control capability but are limited in terms of power density due to high
conduction losses. Infineon’s newly introduced CoolMOS™ S7 technology offers a groundbreaking low
{RDS(on)∙A} [Ω∙mm²] figure-of-merit, which enables cost-efficient and miniature size FET-SSRs for high
current ranges up and beyond a 10 A range. Thanks to the nature of FET output stages, power
dissipation and current class can be tailored through a broad selection of on-resistance.

Furthermore, the device’s safe operating area (SOA) has to be considered when driving high power
density FETs in solid-state applications. Through a practical example, this whitepaper explains the gate
drive requirement for a typical SSR output stage.

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Solid-State Relays (SSRs) with optimized superjunction FET technology
Combining the performance benefits of both conventional EMRs and traditional TRIAC-based SSRs

References
[1] Hancock J., Stueckler F., Vecino E., “CoolMOS™ C7: Mastering the art of quickness, A technology
description, and design guide,” Application Note AN2013-04 V1.0, Infineon Technologies, April 2013
https://www.infineon.com/dgdl/Infineon-ApplicationNote_650V_CoolMOS_C7_Mastering_the_Art_of_Quickness-AN-
v01_00-EN.pdf?fileId=db3a30433e5a5024013e6a966779640b
[2] Wileman, A.J. & Perinpanayagam, Suresh. (2014). A Prognostic Framework For Electromagnetic
Relay Contacts.
https://www.researchgate.net/publication/275522860_A_Prognostic_Framework_For_Electromagnetic_Relay_Contacts
[3] HONGFA HF49FD, Miniature Power Relay
https://www.hongfa.com/Product/Item/467
[4] Infineon Technologies, “Linear mode operation with high-voltage superjunction MOSFETs:
Challenges with CoolMOS™ generation 7 devices in linear mode,” Application Note
AN_2002_PL52_2005_172726, June 2020
https://www.infineon.com/dgdl/Infineon-MOSFET_CoolMOS_7_linear_mode_at_high_voltage-ApplicationNotes-v02_00-
EN.pdf?fileId=5546d46272e49d2a01730eef0c7529dd
[5] Schoiswohl J., “Linear mode operation and safe operating diagram of power-MOSFETs,”
Application Note AP99007, Infineon Technologies, May 2017
https://www.infineon.com/dgdl/Infineon-ApplicationNote_Linear_Mode_Operation_Safe_Operation_Diagram_MOSFETs-
AN-v01_00-EN.pdf?fileId=db3a30433e30e4bf013e3646e9381200

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Solid-State Relays (SSRs) with optimized superjunction FET technology
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Published by
Infineon Technologies AG
85579 Neubiberg, Germany
© 2021 Infineon Technologies AG.
All Rights Reserved.
Document number: B152-I1206-V1-7600-EU-EC
Date: 2021-09
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