Engineering defects in pristine amorphous
chalcogenides for forming-free low voltage selectors
E. Ambrosi1, C. H. Wu1, H. Y. Lee1, C. F. Hsu1, C. M. Lee1, S. Vaziri2, I. M. Datye2, Y. Y. Chen3, D. H. Hou3,
P. C. Chang3, D. W. Heh3, P. J. Liao3, T. Y. Lee1, M. F. Chang1, H.-S. P. Wong1 and X. Y. Bao2
1
Corporate Research, 3Quality and Reliability, Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan.
2022 IEEE International Electron Devices Meeting (IEDM) | 978-1-6654-8959-1/22/$31.00 ©2022 IEEE | DOI: 10.1109/IEDM45625.2022.10019553
2
Corporate Research, Taiwan Semiconductor Manufacturing Company, Ltd., San Jose, CA, USA.
E-mail: eambrosi@tsmc.com, xbao@tsmc.com
Abstract—Amorphous chalcogenide-based threshold selectors
are among the most promising two-terminal technologies for
high density non-volatile memories. However, the necessity of
a high voltage forming operation makes their implementation
in low voltage logic chips a key challenge. This work reports a
new approach towards forming-free chalcogenide selectors,
where extra defects are introduced to assist the forming process
and reduce the forming voltage. The added defects are shown
to increase the conductivity of the pristine chalcogenide and
can be annihilated after the first switching pulse operation.
Forming-free low voltage selectors based on SiNGeCTe
(SNGCT) chalcogenide are demonstrated along with excellent
endurance characteristics over 1010 cycles.
I. INTRODUCTION
Chalcogenide-based selectors are gaining recognition as
the most promising two-terminal selector device technology
for the realization of one-selector/one-resistor (1S1R) cross-
point memory arrays [1,2], and are recently employed for
1S1R-based neural network applications [3] and as hardware
security primitives [4].
Most of the chalcogenide-based selector solutions require a
one-time initialization step where the first switching takes place
at a relatively larger voltage. This forming process can induce
a substantial change in the device properties, such as an increase
of the subthreshold current and the formation of a localized
subthreshold conduction path [5]. On the other hand, a forming-
free device is essential for embedded selector applications to
avoid the necessity of a large voltage initialization and remain
compatible with the shrinking I/O supply voltage in advanced
logic technologies (Fig. 1). Lower forming voltage is also
beneficial to reduce the total snapback voltage and to mitigate
the large overshoot current taking place upon switching.
Although limited, research has been carried out for forming-
free selectors including forming at elevated temperatures [6] or
the use of different material systems, such as SiOTe [7] or Mott
oxides [8].
In this work, a new forming-free approach is developed by
inclusion of additional defects to increase the initial state
leakage and decrease the forming voltage. Forming-free
selectors based on the arsenic-free SiNGeCTe (SNGCT)
chalcogenide are demonstrated with low initial leakage,
enhanced OFF current stability, and excellent cycling
endurance. The defect control in the SNGCT system is
achieved by tuning of the Ge amount, and the subthreshold
conduction characteristics are also studied for different defect
densities to further understand the mechanism.
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II. FORMING-FREE APPROACH AND CHARACTERISTICS
The essential differences between forming-required and
forming-free selectors are described in Fig. 2a. Figure 2b
schematically depicts the new forming-free approach where the
pristine chalcogenide is seeded with additional defects to
increase the initial leakage current and assist the first switching
cycle to take place at a lower voltage. The defect level can be
suitably tuned to make the first and subsequent cycles almost
undistinguishable, effectively realizing a forming-free device.
Figure 3 shows the mushroom type device structure adopted
in this work with W bottom/top electrodes (BE/TE) and an on-
chip current limiting load resistor RL. The TEM image shows a
forming-free device with the SNGCT film in the amorphous
phase and BE size ~ 40 nm.
Figure 4a shows the measured pulsed I-V curves of a typical
device where a forming step is required, namely a first cycle (or
first-fire) occurring at a switching voltage VFF larger than the
subsequent 9 cycles (VTH). In Fig. 4b, a forming-free device is
reported with the first and subsequent cycles almost
overlapped, namely VFF ≈ VTH ≈ 1.75 V. Figure 4c displays the
DC subthreshold I-V curves of the forming-free case collected
before and after the pulsed switching operations. The initial
state leakage (ILEAK) is relatively large which is attributed to the
defects added to the chalcogenide. However, the subthreshold
current after the applied pulses is reduced by a factor >10X,
allowing for selector operation at low OFF-state current (IOFF).
Such behavior is radically different from conventional selectors
where IOFF after forming is typically larger than ILEAK [5].
The physical interpretation of the forming-free mechanism
is portrayed in Fig. 5. Thanks to the additional defects, one or
multiple leakage paths are established across the chalcogenide
layer, and the increased leakage assists the switching to occur
at reduced voltage, successfully realizing the forming-free
behavior. After switching, the additionally included defects are
annihilated and/or swept away owing to the large current
density and temperature at the ON-state. The initial leakage
paths are thus ruptured, and the subthreshold current decreases
below the initial state leakage, which is consistent with the
experimental data in Fig. 4c. In other words, the added defects
only contribute to the very first switching event and the device
can recover to an intrinsic OFF-state chalcogenide with lower
subthreshold current.
III. IMPACT ON THE SUBTHRESHOLD CONDUCTION
To better understand the nature of the added defects, we
studied the subthreshold conduction in the initial state for
different defect levels. Figure 6 reports the subthreshold I-V
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 curves at different temperatures from 25°C to 85°C for three
typical devices with low, medium, and high defect levels,
respectively. By increasing the defect density, the subthreshold
current increases and the temperature activation becomes
weaker. It is worth noting that in each case the current increases
for increasing temperature, revealing the semiconductor-like
behavior also for high density of defects. The different devices
are compared in Fig. 7 showing good linear fitting in the
Arrhenius plot. The conduction activation energy is extracted
according to EA = − d(ln I)/d(1/kT) and EA decreases for
increasing defect density, from 0.31 eV to 0.12 eV at a bias
voltage of 0.1 V. The case of SNGCT with no additional defects
shows a decreasing EA trend with the applied voltage in Fig. 8,
denoting the distinctive barrier lowering feature of localized
transport via deep traps in amorphous chalcogenides [9].
However, as the defect density increases, the barrier lowering
effect gets weaker, and EA becomes almost independent of the
applied voltage for the case of high density of added defects,
which we interpret as the formation of shallower energy states.
The voltage dependence of the initial state subthreshold
conduction is analyzed in Fig. 9 up to the DC switching point.
The transport in the low defects condition closely follows the
Poole-Frenkel model [10] across the full subthreshold I-V
curve. Differently, when high defect density is considered, the
I-V shows a characteristic 2-regime I-V curve: an extended
ohmic region up to about 0.6 V, attributed to the additional
defects’ contribution, and a Poole high-field region, which may
arise from both intrinsic and additional defects. A possible
mechanism is depicted in Fig. 10. Figure 11 shows that ILEAK
increases with the BE size, suggesting that the added defects
form multiple conduction paths, as opposed to a single path.
To better understand the underlying mechanisms in
presence of high density of added defects, we further
investigated the recovery effect introduced in Fig. 4 and Fig. 5,
where the application of switching pulses lead to the rupture of
the leakage paths and consequent leakage decrease. A sequence
of voltage pulses with incremental amplitude is applied to each
device, corresponding to increasing maximum ON-state current
as controlled by RL. Figure 12 shows the initial leakage ILEAK
and the IOFF measured after each pulse as a function of the
maximum ON current for one typical device. From an initial
leakage of about 200 nA, the IOFF drops to ~ 3 nA after the third
applied pulse, which marks the rupture of the defects-induced
leakage paths, namely the recovery process. The ON-current-
for-recovery (ION, REC) is defined at the OFF current crossing
below a target IOFF*. We studied the recovery characteristics in
multiple devices and correlated ION, REC with the initial state
leakage ILEAK. A clear correlation is observed in Fig. 13, with
larger ILEAK requiring larger pulse current for recovery, possibly
suggesting a central role of Joule-heating in the recovery
process [11], where leakage paths with larger defect density
and/or larger effective path width require increased current for
recovery at a critical temperature. In addition, for a given pulse
condition, the recovery is facilitated (i.e., more probable) with
smaller BE size due to a more efficient heating (Fig. 14).
IV. DEFECTS OPTIMIZATION IN SNGCT SELECTOR
In SNGCT the defect level can be controlled by tuning the
Ge amount via co-sputtering deposition process. Figure 15a
shows the initial leakage ILEAK for different Ge sputtering power
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18.7.2
conditions. For decreasing Ge, ILEAK increases from about
0.1 nA (GeA) to ~ 1 μA (GeE). Consequently, the first cycle
threshold voltage decreases from VFF ~ 2.7 V (GeA, i.e.,
forming-required) to ~ 1.5 V (Fig. 15b). Based on such trends,
VFF − VTH and ILEAK/IOFF are studied to find the suitable defects
amount for optimized forming-free characteristics as shown in
Fig. 16. Clearly, the GeD condition offers the most favorable
forming-free device tuning, with VFF − VTH < 150 mV and
ILEAK/IOFF ~ 1. The representative I-V curves of the optimized
condition (GeD) are shown in Fig. 17 where forming-free
behavior with VFF = VTH (Fig. 17a) and comparable
subthreshold I-V curves before and after switching, namely
ILEAK = IOFF (Fig. 17b), are demonstrated simultaneously.
As described in the previous section, when a high density of
defects is added to the chalcogenide, a recovery step of
sufficient ON current is needed to break the leakage paths. On
the other hand, tuning the defect density removes the need for
the recovery step, as shown in Fig. 18 comparing the device-to-
device median IOFF as a function of the ON-state current. The
process condition GeD optimally embeds the defects in the
amorphous matrix and thus no high-current recovery is needed.
The device stability was investigated after electrical
operation by means of elevated temperature baking steps
(Fig. 19). One initial 500 μA pulse was performed to initialize
the devices and induce the recovery in the high defect density
case, and the IOFF was measured at 25°C before and after the
bake. For high defect density, the IOFF significantly increases
after the first bake step, revealing an instability of the recovered
state, attributed to a re-clustering of the residual defects, and
can be recovered by one additional pulse (Fig. 19b). Notably,
the optimized case keeps stable IOFF post-bake thanks to the
carefully tuned defect amount.
We studied the cycling endurance characteristics for the
optimized device condition (GeD) and demonstrated excellent
endurance of 1010 switching cycles under 500 ns stress pulses
(Fig. 20). A comparative table of different chalcogenide-based
selector technologies is reported in Table 1.
V. CONCLUSION
This work presents a novel approach to realize forming-free
threshold type selectors based on the inclusion of additional
defects to the pristine chalcogenide material. We demonstrate
the forming-free behavior and study its mechanisms for
different amounts of additional defects. The process tuning for
forming-free SNGCT selector is reported and demonstrates
optimal device characteristics with VFF = VTH, ILEAK = IOFF and
an excellent cycling endurance over 1010 cycles.
ACKNOWLEDGMENT
The fabrication process was partly supported by the Taiwan
Semiconductor Research Institute (TSRI).
REFERENCES
[1] H. Y. Cheng et al., IEDM, pp. 28.6.1, 2021. [2] T. Kim et al., IEDM, pp.
851, 2018. [3] J. M. Lopez et al., IMW, 2022. [4] Z. Chai et al., IEEE Electron
Device Lett., 41(2), pp. 228, 2020. [5] E. Ambrosi et al., IEDM, pp. 28.5.1,
2021. [6] S. Lee et al., Appl. Phys. Lett., 118, pp. 212103, 2021. [7] S. Vaziri
et al., VLSI, T05-3, 2022. [8] T. Hennen et al., IEDM, pp. 37.5.1, 2018. [9] D.
Ielmini et al., J. Appl. Phys., 102, pp. 054517, 2007. [10] Y. H. Shih et al.,
IEDM, pp. 753, 2009. [11] D. Ielmini et al., Nanotech., 22(25), 2011. [12] S.
A. Chekol et al., Nanotech., 29(34), 2018. [13] M. Laudato et al., IMW, 2020.
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 (a) (b)

Log I
Approach VTE
V TH V FF Top electrode
Chalcogenide
Added W
FORMING defects
layer SNGCT
V

Log I
Bottom electrode W
 Seed additional defects
 Higher leakage assists
FORMING the forming process
RL
FREE
V
Fig. 1. Transistors supply voltage Fig. 2. (a) Forming and forming-free behavior in threshold selectors. Fig. 3. Schematic of the device structure
scaling for different logic technologies. In an ideally forming-free device, the first and subsequent cycles are consisting of SiNGeCTe (SNGCT)
Low voltage operation is needed for almost undistinguishable. (b) Forming-free approach by additional chalcogenide, and W electrodes. The TEM
embedded memory and selector defects in amorphous chalcogenides. image shows a forming-free device with
applications in advanced nodes. SNGCT in the amorphous phase.
Initial During 1 st After
State Sw itching Sw itching

Metal Metal Metal

pristine ON
leakage state OFF
state

Metal Metal Metal

Added defect Switching path defect [5]
Fig. 5. Mechanism of forming-free and recovery
Fig. 4. Examples of (a) forming-required and (b) forming-free I-V curves. Switching I-V curves are of intrinsic IOFF. The additional defects increase the
measured under AC regime (10 μs rise time and 10 μs fall time), and in (b) show comparable switching initial state leakage and assist the forming process.
voltage for the first and subsequent cycles, namely a forming-free behavior. (c) Subthreshold I-V During switching the defects are annihilated
curves (DC) of the forming-free device in (b). Before switching, the initial leakage (ILEAK) is relatively and/or driven away and the leakage paths are
large, thanks to the additional defects. After switching, the current (IOFF) decreases by a factor >10X. ruptured explaining IOFF after switching < ILEAK.

Fig. 6. Initial state subthreshold I-V curves of typical devices for different levels of additional defects: Fig. 7. Arrhenius plot of the experimental data in
(a) no added defects, namely low defect density (LD), (b) medium defect density (MD), (c) high defect Fig. 6, and extraction of the conduction
density (HD). For increasing defect density, the subthreshold current increases. For each case, the current activation energy EA. For increasing defect
increases with temperature T, but the T-activation gets weaker for increasing defects. density, the current increases and EA decreases.
Fitting Parameters
LD
APF (A) 1.10e-13
BPF (V-1/2) 10.894

HD
G (μS) 0.214
AP (A) 4.08e-10
BP (V-1) 6.922

Fig. 10. Interpretation of the subthreshold

Fig. 8. Device-to-device median activation energy Fig. 9. First cycle DC I-V curves for two conduction for HD, assuming for simplicity
EA for different defect levels as a function of the bias representative cases: forming-required (LD) and electron transport. At low-voltage, ohmic
voltage. Increasing the defect density leads to lower forming-free (HD). LD follows the Poole-Frenkel transport takes place at shallow energy states, at
EA and weaker and/or no voltage dependence. model, while HD has two distinct regimes. high-voltage carrier emission to band takes over.

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18.7.3
445
 Fig. 11. Initial state leakage as a function of the BE
size for the HD case. The current increases for
increasing BE size, suggesting that pristine
conduction takes place through multiple paths.
Fig. 12. Study of recovery process by incremental
pulses and IOFF read after each pulse. The ON
current needed for recovery ION,REC is extracted at
the target OFF current IOFF* = 15 nA.
Fig. 13. ION,REC strongly correlates with the
initial state leakage current ILEAK. Larger ILEAK
currents require larger pulse currents for
recovery, suggesting a Joule-heating induced
recovery.

Fig. 14. Dependence of recovery
probability on the BE size after
application of pulse voltages VA, VB,
VC. For each pulse condition the
recovery has larger probability for
smaller BE size.
Fig. 15. Deposition process control for the engineering of forming- Fig. 16. Forming-free optimization plot. The
free behavior via Ge co-sputtering power tuning. (a) For decreasing case GeD demonstrates simultaneously
Ge amount the initial leakage increases and (b) the first-fire forming-free behavior (VFF − VTH < 150 mV)
switching voltage VFF consequently decreases. and low initial leakage ILEAK ~ IOFF.
Forming ON/
VTH (AC) Endurance
Free OFF

CTe 0.8 V
NO >105 109
[12] (250 ns)

GeAsSeTe 2V
NO 104 >109
[13] (100ns)

NGCT 1.3V-
NO >10 4 >1011
[5] 1.5V

SNGCT 1.6V-
YES ~10 4 >1010
This Work 1.8V

Fig. 17. Switching characteristics of the optimized forming-free process condition, namely GeD. Table 1. Comparison of Te-based chalcogenide selectors.
(a) Switching AC I-V curves and (b) DC subthreshold I-V curves. Both the first switching cycle In this work, arsenic-free SNGCT selector demonstrates
and the initial subthreshold I-V are almost undistinguishable from the subsequent cycles. forming-free low voltage operation, good ON/OFF ratio,
and excellent endurance.

Fig. 18. IOFF characteristics for increasing pulse Fig. 19. (a) Post-bake stability of the OFF current IOFF Fig. 20. Typical endurance characteristics
amplitude shows that no recovery is needed for performed after electrical operation. The tuned forming- in optimized forming-free SNCGT (GeD).
the optimized device, namely IOFF remains free condition demonstrates enhanced post-bake stability. The device lifetime exceeds 1010 switching
comparable to the initial leakage ILEAK. (b) Post-bake recovery of the high defect density case. cycles.

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