10th International Conference on Power Electronics-ECCE Asia

May 27 - 30, 2019 / BEXCO, Busan, Korea

Switching Modulation Method for Current-Fed

Dual-Active-Bridge Converter to Improve
Power Conversion Efficiency
Hyun-Jun Choi1, Jun-Young Lee1, Ju-Young Sim1, Sang-Gyu, Cheon2, Chang-Ui Lee2 and Jee-Hoon
Jung1
1
School of Electrical & Computer Engineering, Ulsan Nation Institute of Science and Technology (UNIST), Korea
2
Research Institut, PANASIA CO, LTD, Busan, Korea

Abstract-- A current-fed dual active bridge (CF-

DAB) converter has attracted much attention in
battery applications and energy storage systems
(ESS) because of their zero-voltage-switching (ZVS)
capability and high performance due to the high
control degree of freedom. However, conventional
switching algorithms cannot reduce the high current
in low-side switches under the heavy load condition.
It causes high conduction loss which decreases power
(a)
conversion efficiency. In this paper, a new switching
modulation method of the CF-DAB converter for the
ESS application is proposed to improve the power
conversion efficiency by reducing the conduction
loss. The relationship between the pulse width
modulation (PWM) and the phase shift modulation
(PSM) is investigated and a PWM-plus-PSM
modulation method is proposed to reduce the
conduction loss. A 1-kW prototype CF-DAB (b)
converter is used to verify the effectiveness of the
Fig. 1. Bi-directional DC-DC converters: (a) VF-DAB
proposed switching modulation method. converter, (b) CF-DAB converter

Index Terms--Isolated Bi-directional DC-DC converter,
Current Fed Dual Active Bridge Converter, ESS application.
Zero voltage switching, Dual transformer.
I. INTRODUCTION
Battery are widely adopted in energy storage systems
(ESS), DC microgrid and electrical vehicles [1]-[3].
Bi-directional DC-DC converters serve as an
interface between the battery and the high voltage bus.
Since the battery voltage is relatively low, the higher
gain converter is required. Although the buck/boost
converter is introduced for battery application, its
voltage gain is limited and hard switching is no
suitable. Therefore, the isolated bi-directional DC-
DC (IBDC) converter are widely used, since the
voltage conversion can be flexibly adjusted by
changing the transformer turn ratio. A dual active
bridge (DAB) converter is widely used as one of
IBDC candidates. The DAB converter is suitable as
for ESS application since it meets the high-efficiency
due to the zero-voltage switching (ZVS) conditions,
bi-directional power transmission under the seamless
control with safety for high-frequency transformers.
However, under the single-phase shift (SPS)
modulation, which is the simplest control method of
the voltage-fed (VF) DAB in Fig. 1(a) is negatively
affected in case of wide range voltage application,
inducing high circulating current [4]-[5]. Also, if the
primary and secondary port voltage are not matched,
the high peak current in induced which increases the
RMS current and conduction losses. In addition, the
relatively high current ripple for input/output ports is
formed in VF-DAB converter, which makes battery’s
life-time shorten. To reduce the current ripple on the
battery side, the current-fed (CF) DAB converter in
Fig 1 (b) was introduced in [2]. The current ripple is
naturally attenuated by the inductor, which acts as a
filter and boost circuit. Since the circuit on the battery

ⓒ2019 KIPE 505

Fig. 2. Theoretical waveforms in each mode of primary and secondary phase voltage and current according to the power capability:
(a) Light load, (b) Mid-load I, (c) Mid-load II, (d) Heavy load.

side is equivalent to the bi-directional buck/boost

converter with interleaved structure, the CF-DAB
converter has no problem in high voltage gain. In
addition, the clamping voltage can be adjusted under
the pulse width modulation (PWM) of the primary bi-
directional buck / boost converter, and the ZVS
condition can be achieved regardless of the battery
voltage variation
However, based on the PWM plus phase shift
modulation (PSM), the current spike and circulating
current are high. To overcome disadvantage of PWM
plus PSM in the CF-DAB converter, some control
methods are introduced. In [6], the circulating current
can be reduced using dual PWM (DPWM) control in
both sides with PSM. In [7], based on DPWM control,
the fixed delta is defined, which is fixed difference
between zero vector in both sides, and kept the
trapezoidal waveform in overall load condition to
make ZVS condition under the even no-load
condition. These methods can improve the efficiency,
but it is not optimized because, in [8], due to the zero
vector, the RMS current can be increased especially
at the light load condition and, in [9], the DPWM is
kept under the heavy load condition, the relative high
current caused high conduction losses. To overcome
these problems, in this paper, the switching algorithm
is proposed, which change the mode according to the
load conditions. At the light load condition, the
trapezoidal modulation (TZM) will be adopted to
ensure the ZVS and zero current switching. As power
going increase, the length of zero vector will be
reduced and at the heavy load condition, the zero
vector will be eliminated to minimize the phase RMS
current. In design consideration, the CF-DAB
converter operation is analyzed based on the
mathematical approach, and the proper design guide
Fig. 3. Theoretical waveforms in light load (LL) condition
such as coupling inductance. Finally, using experim-
ents of 3-kW prototype CF-DAB converter, the
adequacy and effectiveness of proposed method is
verified.
II. OPERATION PRINCIPALS
The concept of proposed switching algorithm is
shown in Fig. 2. The mode is divided into four
according to the load conditions: light-load (LL)
mode, mid-load (ML) mode, and heavy-load (HL)
mode. Difference between each mode are duty and
the amounts of phase shift.
A. Light load mode
The theoretical waveforms in LL mode is shown in
Fig. 3. The zero vector in primary and secondary side
is defined as and in Fig. 3. The primary
voltage, vab(t) can be adjusted by changing the
primary duty, D1. In this mode, the zero vectors are
overlapped and the difference between as and
is always higher than phase shift angle, φe . When
input voltage is constant, the transferred power is
controlled by φe . The output power can be derived
as follows:

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Fig. 4. Critical point for zero voltage switching condition when D1 is lower than 0.5

2
TS
controls the transferred power. In this mode, the zero
PLL _ MODE =
TS  vab (t )i p (t )dt vector is not overlapped and ZVS can be always
0 achieved.
vc 2  D 
= {D2 1 − 2 − D1 + φe  . III. DESIGN CONSIDERATION
4 LS f S  4 
Design consideration of the CF-DAB converter is
+ D1 (2 − D1 − φe ) + φe (2 − φe ) − 1 (1) switching loss and conduction loss. The important
point is the ZVS condition for switching losses and
the peak current and RMS for conduction losses.
where LS is coupling inductance, vpri and vsec are the However, the switching loss becomes dominant at
phase voltage in primary and secondary side, high load at low load. In case of switching loss, the
respectively, D1 and D2 are duty in primary and ZVS condition is most important. The current flow
secondary side, respectively, Φe (Φ/π) is the phase through the primary side switches is not only affected
shift angle. As shown in (1), the output power is by transformer current but also by the DC inductor
affected by D1 and D2 and Φe. As shown the current. To match the voltage-gain as unity, the
difference of magnitude between and is clamping voltage, Vcc, can be controlled by D1, and
fixed and set based on the ZVS condition. when D1 increase, the Vcc increase. The waveform of
the DC inductor current depend on whether D1 is
B. Mid- load and heavy-load mode higher or lower than 0.5.
To improve the efficiency, the design of range of
As power increase, phase shift angle also increases.
D1 and Vcc is important. The most paper for the CF-
When − = , the LL mode is changed to DAB converter, the D1 is higher than 0.5 due to
mid-load mode (ML) mode. When the ML mode start, enlarge the ZVS area. However, the larger duty of D1
the D2 is increased. This is because the higher D2 will results in longer circulation stage and high peak
reduce the phase RMS current, and it will be increase current. Therefore, in this paper, the D1 is selected
to unity. During the incensement of D2, Φe is held and for not deviating much from 0.5. This is because the
output power is controlled by only D2. The circulation loss and peak current is same when D1 is
transferred power can be derived as follows: 0.4 and 0.6. When D1 is 0.4 and 0.6, the primary side
T
2 S effective duty (DE) is same, and the only different
TS 0
PLL _ MODE = vab (t )i p (t )dt
between two cases is the different of DC inductance.
The Primary side of ZVS condition will be influenced
vc 2  1
=  D1 ( (1 − D1 ) + φe (1 − φe ) −  by DC inductor current. Fig. 4 shows the operation
2 Ls f s  4 waveform of duty, transformer voltage in both sides,
(2) DC inductor current when D is smaller than 0.5. The
When D2 become unity, the only phase shift angle ZVS condition can be derived as (3)

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 (a) (b)
Fig. 5. Critical condition of ZVS in primary side (a)
switches: (a) S2, (b) S4.

(b)
Fig. 6. Block diagram of the proposed control algorithm Fig. 7. Proposed current-fed DAB converter: (a)
for the CF-DAB converter Simulation scheme in PSIM, (b) Prototype of the current
fed DAB converter
 i pri (t ) + iLdc _ peak (t ) > I P _ req (3 − 1)
 (3) TABLE I
i pri (t ) − iLdc _ peak (t ) > I P _ req (3 − 2) DESIGN SPECIFICATIONS
Parameters Value
where ipri is the phase current, Ldc is the DC inductor, Input Voltage (Battery), Vin 40-60 V
iLdc_peak is the peak current among iLdc_1 and iLdc_2. To Output Voltage, Vout 380 V
achieve the ZVS condition, the parasitic output Switching frequency, fSW 50 kHz
capacitor in power MOSFET need to be fully Transformer turn ratio, n 7:20
Dmin/ Dmax 0.549/0.624
charged/discharged, which means that the minimum Rated output power, PO 3-kW
current is required. When the voltage gain unity, the Output filter capacitance, CO 1.4 mF
critical point for ZVS criteria is the lower switches of DC inductance, LDC 212uH
battery side S2 and S4, which is expressed as (3-2). As Coupling inductance, LS 47 uH
shown in Fig. 5, the condition for ZVS condition is Phase shift angle, Ф /π -0.3< Ф/ π <0.3
defined that magnitude of number one is always
higher than number two. The first, second and third Fig. 6 shows the control diagram of the CF-DAB
term in (2) are critical point in lower switches of converter. As shown in Fig. 6, two closed loop
battery side, upper switches of battery side and controllers are required, which are clamping
switches in DC bus side, respectively. Therefore, in capacitor voltage control loop and output voltage
case of CF-DAB converter, not only consideration of control loop. The clamping capacitor voltage control
LS but also the Ldc is important design factor. In shorts, loop control D1 to adjust the clamping voltage and
the ZVS condition is affected by the phase current maintain the voltage gain at unity. The output voltage
and DC inductor current, the proper design is control loop is affected the D1 and generates the
required. secondary PWM signal based on the value of D2 and
Considering the maximum value of D1, D2 and ΦPS, ΦPS. The most important point in this algorithm is the
the LS can be designed. The LS can be driven by timing when the zero vector of phase voltage in
output power equation and Ldc can be designed (4). secondary side will disappear since it the zero vector
affect not only the ZVS region but also RMS current.
(4).
IV. SIMULATION AND EXPERIMENTAL RESULT
Fig. 7 (a) and (b) shows the CF-DAB converter of

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 (a)
Fig. 8. Simulation waveforms of current-fed DAB converter: (a) 200-W, (b) 500-W and (c) 1-kW
(a)
Fig. 9. Simulated step load response of CF-DAB converter: (a) from 1 A to 5 A, (b) from 1 A to 9 A.
(a)
(b)
Fig. 10. Experimental waveforms of the CF-DAB converter:
(a) At start-up operation, (b) In steady-state operation at 1-kW
load condition
simulation and prototype, respectively. A 1-kW
prototype of the CF-DAB converter is used for the
simulation and experiment to verify the adequacy and
effectiveness. The prototype consists of two DC filter
inductance, coupling inductance and transformer
with power stage, gate drive and DSP (TMS-
320F28335) control board. In Table 1, the design
specification of experiment is presented.
Fig. 8 shows the simulation results according to
power variation. As the output load increases, the
amount of the phase shift and the gradient of current
increase with the output voltage regulation as 380 V.
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(b) (c)
(b)
Under the light load conditions, the difference
between primary and secondary zero vector is almost
same with small phase shift angle. When Fig. 8 (b)
the zero vector in the secondary side is reduced
compared with Fig. 8 (a) to achieve ZVS in all
switches, but the phase shift angle increases to
transfer higher power. In Fig. 8 (c), the length of
secondary zero vector is zero, and it can reduce the
RMS. Fig. 9 shows the step load response of CF-
DAB adopting the proposed algorithm. As shown in
Fig. 9, when load changes in a step, the length of zero
vector and phase shift is smoothly changed. In
addition, the output voltage is well regulated based
on the proposed algorithm.
Fig.10 (a) and (b) show experimental results based
on the prototype converter. In Fig. 10 (a), the
experimental waveform that appear from the initial to
normal state. The output voltage and current show the
stable operation when start-up without excessive
overshoot. Fig. 10 (b) shows the input (Iin), phase
voltage in primary (vab) and secondary (vcd), and
phase current (Ip). The D1 is adjusted to set the
clamping voltage as reference voltage, 133V, to keep
matching the voltage gain as unity between 380V,
DC bus voltage. The boosted clamping voltage
reduces the phase RMS current and reactive power.
In addition, the input current ripple on the battery side
is limited only about 2 A.
V. CONCLUSIONS
In this paper, the switching algorithm for the
current fed DAB converter is proposed to improve
the overall efficiency. The CF-DAB converter is one
of useful bi-directional converters in battery
application due to galvanic isolation, high efficiency
and high performance with ZVS capability. From the
basic analysis of coupling inductor current, the
accurate design guides for the CF-DAB converter
such as coupling inductance and DC filter with detail
analysis of ZVS criteria are presented based on the
elaborate mathematical method. Finally, the design
its effectiveness are verified by simulation and
experimental results based on the 1-kW prototype
converter of the CF-DAB converter.

ACKNOWLEDGMENT
This work was supported by National IT Industry
Promotion Agency(NIPA) grant funded by the Korea
government(MSIT) (R-20170420-001593, Development
of integrated evaluation system for energy management
using intelligence EMS HILS) and Korea Electric Power
Corporation (KEPCO) (Grant number: R18XA06-72).

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