System Verilog classes:

 A class is a user-defined data type that includes properties (data types) &methods (functions
and tasks) that operate on data.
 the class allow objects to be dynamically created, deleted, assigned and accessed via object
handles.

Class Declaration:

class sv_class;

//class properties

int x;

//method-1

task set(int i);

x = i;

endtask

//method-2

function int get();

return x;

endfunction

endclass

initial begin
//class declaration/instance and object.

Sv_class class_1=new();

Sv_class class_2=new();

Class_1.set(10);//handle the method_1

Class_2.get(20);// handle the method_2

$display("\tclass_1 :: Value of x = %0d",class_1.get());

$display("\tclass_2 :: Value of x = %0d",class_2.get());

end

endmodule

o/p:
class_1 :: Value of x =10

class_2 :: Value of x =20