44

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27 Circuit A Vinet 3 to
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45
3 5 Rectifier Circuits
1 DC Power
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EE
i Transformer Step down isolation

I ÉÉIÉÉÉn
M NYN
core

ii Diode rectifier Conversion of ac to de

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example Zener diode regulator
 The Half wave Rectifier 46
2
wantRoi to
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a
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Vo o

iii when vs Uno The idealdiode on

Vous Uno

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length of diode
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3 Full wave Rectifier 47

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Center tapped
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u u

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 PIV 49
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5 The peak Rector Ideal rectifiers Payoff

At
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uncharged peak dector

Initially
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FT
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a
peak dector

It Half wave peak rectifier

Lecture 09 Peak Rectifiers Limiters and
Clamping Circuits
 PIV 49
Uno PEU Us UDo

I
5 The peak Rector Ideal rectifiers Payoff

At
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uncharged peak dector

Initially
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E r Vo
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It Half wave peak rectifier

 50
6 Half Wave Peak Rectifier

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 52
Application Example

own

Half rectifier Zener regulator

 53
O

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1 Rectifier A PIV 30

agent 5V
2
Ur

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Rectifier B 30 30 600
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27 5mA
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 54
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A Épat 14.4mA

inpeak 288mA
mt in 275mA

C
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 55

After
2 VZ 5 V Nz 5002 and IzK 10mA
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131 18 217.5mA

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5 412,2 36 V
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zomt
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off Zener diodes on

 56
Vo JV
OVOpeak peak 0 21 V
35,14
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8
Pz 5 2725 O O 69 W

42414
135 Es 3 x Izu
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 57

48 our

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3 6 limiting and Clamping Circuits
1 Limiters or Clippers ni

Ftt
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Lecture 10 BIT Basics
3 6 limiting and Clamping Circuits
1 Limiters or Clippers ni

Ftt
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 60
vi
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3 07 Vi L 4 0 7 Z Zz off Vo Vi
Vi L 3 07 Zz On Z breakdown 28 3.17
 61

6
 62
2 The Clamper Circuit

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Period A Period B Period C

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i

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 Transresistors 65
Chapter 4 Bipolar Junction Eastes CBJts

4 1 Device Structure and physical Operation

4 l l Simplied structure and Mode of Operation
n

tmall.EE gIiEf.f

l connector
CG
Emitter base
CB collector base
junction 2135 Base junction CBT

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Eye B

Operational modes
EBT CBT Mode

ReverseReversefut
ofmode
Éoward
biased biased
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Forward
biased
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An mpm transistor 66
in an active mode

it
É
4 1 2 Operation of Mpm Transister in Active mode
Mt Strongly doped

l
1
I
i
ti

electrons
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Profile of Minority Carrier Concentration
EBT

viii

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Lecture 11
Mpm BIT in Active Mode
4 1 2 Operation of Mpm Transister in Active mode
Mt Strongly doped

l
i
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electrons

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Profile of Minority Carrier Concentration
EBJ

rites.iq

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EVENT I Minority
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 I
1 The collector current 68

Iea Majka amploy with npc a CENT

mainly
diffusion ie Is BENT independent of
current Vcr
Is Saturation current or scale current
18 155A
ii the base current
BENT
IB GB Iba X
ik hole current due to injected holes xenon
i B2 hole current due to recombination is

Both ie and irs are proportional to EVENT

Ie Ki edBENT ie
IB KEV BENT IFB B BIB E
IB
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IF or small in
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p reduce The hole injection and reduce
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A lightly doped thin c narrow baseregion
C 100 200
in The emitter current
B I

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ie p IB
IFE
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 69

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 170
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ie BENT Independent of VB
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Structure of practical transistor

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 72
1 IE
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4.2 Voltage Current Characteristics
1 Relation between Tre and is

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VEE IF
ni
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Lecture 12 BJ T Operation Basics
 72
1 IE
MII
ie died
agent
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little
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4.2 Voltage Current Characteristics
1 Relation between Tre and is

Independent of
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VEE IF
ni
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 73
Read case ETI a

slope to
with
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t
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Saturation region
Early Voltage
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a

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NCB VCE URE LO
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i Early effect
VCE 4 Deeper The bias on CBT
reverse
Width of depletion region'T
Effective base width to
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curve

izIEME.FI envce
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reverse bias
4 Operation as a Switch 76

5 Cut off Region

Ra
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isvirtually reverse biased
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iB VI VBE WITWVBEIO.NU
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VB O NV VC 20 17
iii Saturation Region 97
Further increase in VI
Ra
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it p Di
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to UBL 0 4 due to Thelargerjunction area

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or

t.nl
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q
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213 Kp
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100
7
Assume EBI is forward biased VBE o nu
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Perform analysis
Check ve 5 3 BJ is reverse biased
VB 4

FILI I NE ELE I 6mA

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6 43 fi
 Assume a saturation mode with VCEcsatso.su 80

I Ze 19.55 0.94 mt

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or 0
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 81
4 4 BIT as an Amplifier Bias point
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point
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Lecture 13 BIT as An Amplifier
 81
4 4 BIT as an Amplifier Bias point Dc
1 Basic Concept point
Operating n
7
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superposition at
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be arbitrary
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15 DC analysis operating point Q CURE Ie 82
in Ac analysis small signal analysis

27 Detailed Graphical Analysis Static or DC Amalgs

Static analysis with Vio

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o small under
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ie Eti ÉÉE I Vee
Relations between
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5
Qubefied can

local behavior

Gm E Wfm defib
ie Xie
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 87
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ib V Fa Vas

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ti OV
g Find the voltage gain vow

whtY
i Dc analysis

43 351,05 0 023mA

1
Ia 213 2 3mA
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100 VEE 0 17
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in small signal analysis É ÉÉÉ.IE gnne
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OV ZE 2 323mA
qt 213 0 023mA
340 22 2 3mA
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it

GraphicalInterpretation

I dine
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it
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one
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Refinement of small signal model

BE Ttt e
ie GmVert
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4 17 Biasing in BJT Amplifier Circuits
Vee
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l
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if Éw
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signal
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Lecture 15 Biasing BJ T Amplifiers
 87
Recap
slope gm

f
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i

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ib V Fa Vas

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joint
i Dc analysis

07
43 351,05 0 023mA
Vi
ya 213 2 3mA
VBB 3V 1,80 p
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100 VEE 0 17
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ii small signal analysis ÉÉ RÉ

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 Iii Circuit waveforms 89
ZE 2 323mA
YTIOV 213 0 023mA
340 22 2 3mA
id Ud LO Icrc 10 2.3 1533 103
ve 3 I
gmunegma it
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monument
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100

rt o.gr mplindofac
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ifftic Bib too 0.008mA

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in

GraphicalInterpretation

Fic KUL I Vac ie Rct UCE

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Vi
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Refinement of small signal model

BE Ttt e
ie GmVert
VE
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24,11mi
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4 17 Biasing in BJT Amplifier Circuits
Vee
Yee I
g
I Re n

HIE
r

IEEE
I
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Rz 1
l
Ru

s Iggy
Ca Ca Ac coupling or de blocking capacitors
CE bypass capacitor
R Ra Re Re Bias circuit to establish a
stable Q point
Eigg
if Éw
tÉÉ
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i DC operating point
I Injection of ac
signal
iii Extraction of ac signal
iv DC blocking affayoD
 93
0 Bias Circuits
1 Example I t.IT

VTw VBB
H I 4
Re
VBB ÉRz
R
I ZE ZE Rt
T
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it

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with VRE 0.7
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Role of RE
LET VET VBEL IBI Let
Negative feedback to stabilize
The bias current
 94
2 Other Examples
Vcc
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LE KEITEL VBEO.TV

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ITIERE
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47
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