1.

MOSFET

 FETs have a few disadvantages like high drain resistance, moderate input impedance and slower
operation. To overcome these disadvantages, the MOSFET which is an advanced FET is invented.
 MOSFET stands for Metal Oxide Silicon Field Effect Transistor or Metal Oxide Semiconductor Field
Effect Transistor. This is also called as IGFET meaning Insulated Gate Field Effect Transistor. The FET
is operated in both depletion and enhancement modes of operation.
 The construction of a MOSFET is a bit similar to the FET. An oxide layer is deposited on the substrate
to which the gate terminal is connected. This oxide layer acts as an insulator (sio2 insulates from
the substrate), and hence the MOSFET has another name as IGFET. In the construction of MOSFET,
a lightly doped substrate, is diffused with a heavily doped region. Depending upon the substrate
used, they are called as P-type and N-type MOSFETs.
 The voltage at gate controls the operation of the MOSFET. In this case, both positive and negative
voltages can be applied on the gate as it is insulated from the channel. With negative gate bias
voltage, it acts as depletion MOSFET while with positive gate bias voltage it acts as an Enhancement
MOSFET.

Classification of MOSFETs

Depending upon the type of materials used in the construction, and the type of operation, the
MOSFETs are classified as in the following figure.
Working:
 An n-channel D-MOSFET is formed on a p-type silicon substrate with two heavily doped n+ silicon
layers for providing low- resistance connections. The gate is insulated from the channel by a thin
layer of silicon dioxide. The substrate is normally connected to the source.
 The voltage VGs applied across the gate and source controls the state of the device. In an n-channel
MOSFET, if VGs is made negative, then, the electrons in the n-channel get repelled, and a depletion
region will be created below the oxide layer near the gate, resulting in narrower effective channel
and a higher resistance between drain and source (RDS). In this case, the device works like an open
switch with very small current flowing between the source and the drain.
 If VGs = -Vp, known the pinch-off voltage, the current between the source and drain will be almost
zero.
 If VGs is made positive, then, the channel width increases resulting in reduction in RDs. Then, the
current between the source and the drain increases. This is the ON-state of the device. In case of a
p-channel D-MOSFET, the polarities of all voltages and currents are reversed. This means that to
turn-ON a p-channel type D-MOSFET, we need to apply a negative V Gs. To turn it OFF we need to
make VGs = +Vp

 In case of n-channel E-MOSFETs, if VGs is positive, it will attract the electrons from the p-substrate
and accumulate them near the surface below the oxide layer. If VGs > VT where VT is known as the
threshold voltage, sufficient number of electrons will be accumulated near the gate forming a virtual
n-channel and the current flows from the drain to the source. This is the ON-state of the device.
 If VGs < VT, then, the device will be in the OFF state. The polarities of all voltages and currents will
be reversed in the case of p-channel E- MOSFETs

Switching Model & Characteristics:

Steady-State Model:

Transient Model:

 A careful observation of the structure of E-MOSFET shows that the MOS- FET structure may be
visualized as two diodes connected back to back or as an n-p-n transistor.
 There are parasitic capacitances between the gate and source (CGs), and between gate and drain
(CGD). The n-p-n transistor has a reverse-biased junction from the drain to the source and offers a
capacitance, CDs. The equivalent circuit of a MOSFET with parasitic transistor and associated
parasitic capacitances.
 Usually in all modern MOSFETs, an internal metallic short circuit is provided between the substrate
and the source. This short circuit has an extremely low resistance RBE which is actually connected
across the base and emitter terminals of the parasitic BJT as shown in fig. If this short circuit is not
provided, then, due to high dv/dt across the drain and source, the parasitic BJT turns ON as it
receives the base current through the stray capacitances. This results in undesirable turn ON of the
MOSFET.
 When short circuit is provided, the parasitic BJT is disabled. But this short circuit creates an inherent
diode in anti-parallel. Due to this, the MOSFET cannot block reverse voltage across drain and source.
But the body diode is useful as a clamp diode in inductive load switching. It is also useful as a
feedback diode in inverters.
 When a voltage is applied between the gate and source, a turn ON delay time fa(on) is required to
charge the input capacitance to the threshold voltage VT. The rise time tr, is the time taken by VGS
to rise to the peak level VGSP which is required to drive the MOSFET into linear region)
 Similarly, while turning OFF, the time required for the input capacitance to discharge from the
overdrive voltage V1 to pinch off region. The fall time tf is the time that is required for the input
capacitance to discharge from the pinch off region to threshold voltage.
 2. IGBT

 No thyristor like latching problem

 Current density higher than BJT and MOSFET
 Popularity in medium power AC drives
 SOA (Safe operating area) is limited by Tj (junction temperature)
 Lower ratio of gate collector capacitance to gate emitter capacitance resulting in
improved Miller feedback effect

Principle of Operation of IGBT

The principle of operation of IGBT is similar to that of a MOSFET. The operation can be divided into
two parts:
1. Creation of the inversion layer and
2. Conductivity modulation.
Creation of inversion layer in IGBT
 The only difference between the MOSFET and IGBT is that there is no "conductivity modulation" of
drift layer in MOSFET.
 Therefore, the on state resistance RDS (on) and hence the on state power loss is very high in
MOSFET. In IGBT however the conductivity modulation takes place which reduces the on state loss
 The operation of IGBT is based on the principle of creation of inversion layer which is same as that
for the power MOSFET.
 In IGBTS also when the positive gate to source voltage VGS is greater than VGS (threshold), n type
inversion layer is created beneath the SiO2 (oxide) layer.
 Due to the formation of n type induction layer in the p type body layer, a channel is formed
(n+ n n- ) which helps to establish the electron current.
Conductivity modulation of IGBT

 In IGBT the conductivity modulation of the n- drift layer takes place.

 The effect of conductivity modulation is reduction in the on state resistance and hence the on state
power loss. Therefore, the on state losses in IGBT are less than that in MOSFET.
 Due to the application of forward voltage between drain (collector) and source (emitter) the
junction J3 is forward biased. Due to the creation of inversion layer, electrons from the source are
injected into the n- drift layer via the n+ p n- channel.
 As the junction J3 is already forward biased, it will inject holes into the n+ buffer layer from p+ layer.
The electrons injected in the n- drift layer create a space charge which will attract holes from the n+
buffer layer which were injected by the p+ layer.
 In this way "double injection" (of electrons and holes) takes place into the n- drift region from both
sides.

Types of IGBTs:

Depending on whether the n+ buffer layer has been included in the structure of IGBT or not, they
are classified into two categories: Non-punch through IGBT (n+ layer is absent) and Punch through
IGBT (n+ layer present).
 The non-punch through type IGBTs have a symmetrical blocking capacity. That means without
breaking down they can block high positive and negative voltages (Vds) successfully.
 The punch through IGBTs has asymmetrical blocking capacity. That means they can block positive
Vds successively but cannot block negative voltage successfully.
Typical output and transfer characteristics of IGBTs:

Equivalent Circuit:
 If the gate is positive with respect to the emitter, an n-channel is induced in the p-region. This
forward biases the base-emitter junction of the p-n-p transistor, turning it ON and causing
conductivity modulation of the n-region. This gives a significant reduction of the conduction drop
when compared to a MOSFET.
 At the ON condition the driver MOSFET in the equivalent circuit of IGBT carries most of the total
terminal current.
 An important point to note is the presence of a parasitic SCR in the device structure. This can lead
to latch-up of the device in the ON state. Then it becomes a semi-controlled device like an SCR.
 This latching action can destroy the IGBT due to excessive power dissipation. However, this
thyristor-like latching action caused by the parasitic n-p-n transistor with p-n-p transistor is
prevented by sufficiently reducing the resistivity of the p+ layer and diverting most of the current
through the MOSFET shown in the equivalent circuit.
 The device is turned OFF by reducing the gate voltage to zero or negative, which shuts OFF the
conducting channel in the p region.

Switching Characteristics of IGBT

Switching Characteristics of IGBT is basically the graphical representation of behavior of IGBT during
its turn-on & turn-off process.
The turn-on time is defined as the time between the instant of forward blocking to forward
conduction mode. Here, forward conduction means the device conducts in forward direction. Turn-
on time (ton) is basically composed of two different times: Delay time (tdn) and Rise time (tr).
Therefore, we can say that ton = tdn + tr.
The delay time is defined as the time for the collector-emitter voltage (VCE) to fall from VCE to
0.9VCE. This simply means that, the collector-emitter voltage drops to 90% in delay time and hence
the collector current rises from initial leakage current to 0.1IC (10%). Thus, delay time may also be
defined as the time period during which collector current rises from zero (in fact a small leakage
current) to 10% of the final value of collector current IC.
The rise time tr is the time during which collector-emitter voltage falls from 0.9VCE to 0.1 VCE. This
means, during rise time collector-emitter voltage falls to 10% from 90%. Therefore, the collector
current builds up to final value of collector current IC from 10%. After time ton, the collector current
becomes IC and the collector-emitter voltage drops to very small value called conduction drop
(VCES).
Let us now focus on turn-off time. Unlike turn-on time, turn-off time comprises of three intervals:
Delay Time, tdf, Initial Fall Time, tf1, Final Fall Time, tf2
Thus, turn-off time is the sum of above three different time intervals i.e. toff = tdf + tf1 + tf2.
Kindly refer the switching characteristics of IGBT for interpretation of above times.
The delay time is the time during which gate voltage falls from VGE to threshold voltage VGET. As
gate voltage falls to VGE during tdf, the collector current falls from IC to 0.9IC. At the end of delay
time, collector-emitter voltage begins to rise.
The first fall time tf1 is defined as the time during which collector current falls from 90% to 20% of
its final value IC. In other words, it is the time during which collector-emitter voltage rises from
VCES to 0.1VCE.
The final fall time tf2 is the time during which collector current falls from 20% to 10% of IC or the
time during which collector-emitter voltage rises from 0.1VCE to final value VCE.
3. SCR
SCR: Switching Characteristics

Switching characteristics during turn-on

A transition time within the device between which the device transits from forward off state to forward on
state. This time span is generally regarded as thyristor turn-on time and is classified into three intervals i.e.,
delay time denoted by td, rise time denoted by tr, and spread time, denoted by ts.

Now, let us understand each one separately,

Delay time (td): Delay time is defined as the time instant between the moment when gate current attains
90% of its final value while the anode current attains 10% of its initial value. During delay time, the thyristor
remains in the forward blocking mode.
Within the delay time, an anode current flows near the gate terminal in a quiet narrow space. With the
increase in gate current and the applied forward anode to cathode voltage, the delay time can be reduced.
Generally, its value is in microseconds.

Rise time (tr): Rise time is defined as the time taken by the anode current to rise from 10% of its value to
90% of the same. We have discussed in delay time that it corresponds to the time when anode current
reaches 10% of its initial value. Thus, the rise time is started once the delay time gets over.
 For the rise time, it is said that the magnitude and rate with which gate current gets build-up is inversely
proportional to the rise time. In this time being, a huge amount of charged carriers is present in the gate
region and they head towards the cathode to occupy the cross-sectional area of the thyristor. Also, at the
same time carriers from the p1 layer are injected into the n1 layer due to the biasing conditions of the
junction. This helps to achieve the forward conduction mode in less amount of time.

Spread time (ts): Spread time of the thyristor exists between the time when the anode current approaches
100% from its 90% value. More simply, we can say, spread time is the time within which the anode current
rises from 90% to 100%. This is called so because, during the spread time, the conduction gets spread over
the complete cathode region of the thyristor. Once the spread time is completed, the value of the anode
current reaches a steady state.

Thus, it is said that the turn-on time of the thyristor is the summation of delay time, rise time, and spread
time. Generally, the rise time is specified by the manufacturers which is in the range between 1 to 4
microseconds. While the overall turn-on time relies on the anode circuit parameters and gate signal wave
shapes.

Switching Characteristics during turn-off

 Turning the thyristor off means that the state of the thyristor is changed from on to off and it can be able to
block forward voltage.
 Once the device gets ON, then even after the removal of the gate signal, current continues to flow through
the device due to the fact that the charge carriers in the four layers’ favors conduction.
 To turn it off, a reverse potential must be necessarily applied for a specific time interval when anode current
attains 0 value.
 So, the turn-off time of the thyristor is defined as the time being between the instants when anode current
becomes 0 and the thyristor attains its forward blocking ability.
 This turn-off time corresponds to the duration within which all the excess carriers must be removed from the
layers of the thyristor. This is nothing but the sweeping out of holes from the outer p region and holes from
the outer n region.

The turn of time of the thyristor is categorized into two intervals, namely reverse recovery time trr and gate
recovery time tgr
 During the reverse recovery time, the anode current will flow in the reverse direction. Due to this reverse
current charged carriers get removed from the pn junction.
 As the density of the n layer is more than that of the p region, the developed anode voltage leads to a
reduction in the reverse recovery time. In the figure shown below, the time interval between t1 and t3 is the
reverse recovery time.
 Although even when the reverse recovery time is expired, the presence of carriers in the junction J2 will not
lead to stop the forward voltage within the thyristor
This forward voltage can be blocked when recombination of the charged carriers occurs at the junction.
The instant where recombination is complete is denoted by t4. However, still, there is the possibility of a
supply of forward voltage. This turn-off time generally ranges between 10 to 100 microseconds
4. TRAIC:

 TRIAC is an acronym that has been coined to identify the TRIode (three-electrode) AC semicon-
ductor switch.
 It is a semi-controlled bidirectional switch having three terminals - Main Terminal 1 (MT1), Main
Terminal 2 (MT2), and Gate (G). We can visualize MT2 and MT1 as equivalent to anode and cathode
respectively of SCR.
 This device behaves similar to two SCRS connected in anti-parallel.
 In Quadrant-I the terminal MT2 is positive with respect to MT1 and the device can be switched ON
by positive gate current pulse exactly like an SCR. The gate loses control once the device has been
latched into conduction, and it continues to conduct like a diode as long as the current flow is in the
same direction. It turns OFF when the current tends to reverse, due to reversal of the voltage polarity
across the main terminals. The gate now regains control and the TRIAC can be turned ON again only
by gate triggering.
 In Quadrant-III, the terminal MT1 is positive and the device can be switched ON by negative gate
current pulse. Therefore, this device is ideal for use in an ac voltage controller.
 The device is more sensitive to positive gate current in quadrant-I and negative gate current in
quadrant-II of I-V plane.
 TRIAC is more economical than a pair of thyristors in anti-parallel and its control is simpler. But the
disadvantage of TRIAC is that its gate current sensitivity is poorer and the turn OFF time is longer due
to the minority carrier storage effect. So, it is not used in ac systems of frequency more than 400 Hz.
Its dv/dt rating is also much lower thus making it more difficult to use with inductive loads. A well
designed R-C snubber network should therefore be connected across TRAIC to keep dv/dt within safe
limits.