How To Avoid Signal Reflection in PCB

RAYMING PCB & ASSEMBLY
How to Avoid Signal Reflection in PCB

Introduction
Signal reflection occurs when an electrical signal encounters an
impedance discontinuity along a transmission line, causing a portion of
the signal to be reflected back towards the source. This can lead to
interference issues like ringing and noise in high speed PCBs. Properly
matching trace impedance and terminating lines helps avoid reflections.
This article provides an overview of signal reflection causes, effects,
calculations, and design techniques to mitigate reflection problems in
circuit boards.
What Causes Signal Reflection?
Reflection arises from an impedance mismatch. Wherever the signal line
characteristic impedance Z0 changes along its path, some incident signal
energy will reflect while the remainder transmits through.
The most common sources of mismatch and reflection in PCBs include:
 Trace impedance change from differences in width, thickness, or
dielectric
 Stub traces that branch off from main signal path
 Components with mismatched terminal impedances
 Improper termination at load end of line
PCB Manufacturing & Assembly Services https://www.raypcb.com/

 Vias that transition between layers with different stackup materials
 Discontinuities at connections like connectors or IC pads
 Damage like cracks or cuts in a trace
Minimizing impedance discrepancies along the signal path reduces the
likelihood of reflections.
Request PCB Manufacturing & Assembly Quote
Reflection Effects
When reflections occur on a signal line, several detrimental effects can
arise:
Ringing – multiple reflections lead to resonances and ringing artifacts on
the signal
Noise – inter-symbol interference from reflected signals appearing at
unintended times
Overshoot – excessive peak voltage from constructive interference
between incident and reflected waves
Undershoot – sagging voltage dips caused by destructive signal
interference
Jitter – timing variations resulting from impedance discontinuities

EMI – radiated interference caused by resonances along the transmission
path
Signal Integrity – reflection noise that can degrade receiver performance
and contribute to bit errors
Power Integrity – impedance issues that compound power distribution
network resonances
Proper impedance control minimizes these reflection issues which are
problematic in high speed digital systems.
Transmission Line Theory
To understand and model reflections, we must consider the transmission
line model of interconnects:
Where:
 R = Resistance per unit length
 L = Inductance per unit length
 G = Conductance per unit length
 C = Capacitance per unit length
Together R, L, G, and C define the characteristic impedance Z0 of the line:

When Z0 is constant throughout the path, signals propagate without
reflection. Wherever Z0 changes, reflection occurs according to the
reflection coefficient Γ:
Where Z1 is the load or intermediate impedance causing mismatch. This
model allows calculating reflection severity at each impedance
discontinuity.
Reflection Calculations
The reflection coefficient quantifies the portion of signal reflecting back at
a impedance change.
For example, consider a 50 Ω transmission line terminated into 75 Ω.
Applying the reflection coefficient equation:
Γ = (Z2 – Z0) / (Z2 + Z0)
Γ = (75 Ω – 50 Ω) / (75 Ω + 50 Ω)
Γ = 0.2
This indicates 20% of the incident signal reflects back from the impedance
mismatch. The remainder transmits through to the load.
Additionally, the voltage reflection coefficient ρ provides the amplitude of
the reflected waveform relative to the incident wave:

ρ = (Z2 – Z0) / (Z2 + Z0)
So in this example, the reflected voltage wave will be 20% of the incoming
signal amplitude.
These principles allow quantifying reflection severity for any impedance
mismatch along a transmission path.
Avoiding Reflections During Routing
Several PCB routing techniques help reduce signal reflections:
Impedance Matching
 Maintain consistent trace width based on stackup dielectric to
match target Z0
 Compensate for thickness changes with width tapers
 Use impedance calculators to design trace geometry
Use Ground Planes
 Reference to continuous ground layers stabilizes impedance
 Avoid routing over splits in ground planes
Minimize Trace Stubs
 Route with shortest connections between drivers and loads
 Avoid creating stub traces that branch off of signal lines

Symmetric Routing
 Equal trace lengths for complementary differential pairs
 Match component placements of differential pairs
Termination
 Properly terminate trace ends near load impedance
 Series terminate drivers, parallel terminate loads
 Avoid unterminated transmission line stubs
Careful routing practices eliminate unnecessary impedance discontinuities
and reflections.
PCB Layer Stackup Design
In addition to routing, the layered construction of the PCB impacts
impedance control:
 Minimize layer changes with vias – use direct routes where possible
 Maximize reference plane layers – avoid splits under critical traces
 Model reference plane interactions – maintain constant line
environment
 Watch glassweave effects – model actual weave patterns
 Keep dielectrics consistent – use same materials for
core, prepreg, solder mask

 Model various densities – copper fills can change local impedance
Simulating the actual manufactured PCB stackup is key to predicting
impedance and reflections.
Via Design to Limit Reflections
Vias that transition between layers introduce impedance discrepancies
and reflections:
 Model vias in layout tools and account for pad shapes
 Use smaller drill sizes to reduce Z0 change
 Avoid routing vias near sensitive crossover nodes
 Minimize signal layer changes
 Place ground vias adjacent to signal for shielding
 Backdrill or stub-eliminate unused via portions
Properly designing vias for the signal path impedance mitigates
discontinuity effects at layer transitions.
Terminating Traces
Adding termination resistors absorbs incident signals, preventing
reflections:
Source Termination

 Called series termination
 Resistor at source isolates driver from reflections
Load Termination
 Called parallel termination
 Resistor at load matches line impedance
Split Termination
 Combination of source and load termination
 Divides termination resistance value
Terminations should match line impedance and be located as physically
close to endpoints as possible.
Simulation and Modeling
Validate designs through electromagnetic (EM) analysis of reflection
severity:
 Model routed traces with actual geometry in layout tools
 Simulate across frequency range of interest
 Identify resonant ringing and reflection hotspots
 Evaluate effects of layer transitions, vias, stubs
 Verify location and value of terminations
 Tune layout to reduce resonances

Simulation provides insight to refine layouts by minimizing identified
impedance mismatches before manufacturing PCBs.
Signal Reflection Mitigation – Frequently Asked Questions
Here are some common questions related to dealing with reflections in
high speed board design:
What is the typical PCB trace impedance?
The most common impedance for signals lines is 50 ohms. This
matches cable impedance and provides a good tradeoff between
conduction losses and reflections.
When do reflections need mitigation?
Reflections must be addressed whenever fast edge rates under 1-2ns rise
time are present on unmatched transmission lines longer than 1/10th
wavelength.
How can reflections be observed?
An oscilloscope plots signal waveform ringing and noise caused by
impedance discontinuities. Time domain reflectometry (TDR) tools also
measure reflections.
Where should source termination resistors be placed?

Series resistors should be located as close as possible to the driver output
pin or package to prevent resonances on the line prior to damping
reflections.
What values are used for termination resistors?
Terminator resistance should match the trace characteristic impedance
(typically 50Ω). Lower values attenuate while higher values reflect more
energy.
Conclusion
Signal reflections that can arise whenever impedance changes along a PCB
trace are a primary concern in high speed digital design. Using controlled
geometries, matched layer stacks, symmetric layout, routed line
terminations, and simulation minimizes discontinuities that lead to
problematic ringing and noise. With care taken to design, analyze, and
validate the transmission environment, signal reflections can be effectively
avoided ensuring reliable circuit performance.
Printed Circuit Boards (PCBs) have been the focus of scientist and
engineers to bring novel ideas on how to improve the quality of
end electronic product. As PCBs play the key role in functionality and
performance of any electronic product or device so the perfectly
designed PCB layout is highly important. There are many factors that a

design engineer must consider while designing a PCB layout and these
factors are driven by the requirements of end product.
Like number of layers PCB, size and dimensions of PCB, number
of electronic components to be soldered upon PCB, types of components,
routing techniques and many other PCB design factors. Among them one
of the most important aspect is the “Impedance Matching”. The PCB that is
dedicated for the electronic product that is to be used for High
frequency application like RF or microwave electronics, then the most
critical part of the PCB layout design is to control the impedance of the
circuit.
Request PCB Manufacturing & Assembly Quote Now
What is Signal Reflection.?
As we are familiar with the phenomena of reflection that when a light ray
is incident on the mirror then the light is reflected from mirror’s surface.
Another example is water, when light enters the water some of the light is
refracted while some is reflected. The same phenomena is with electrical
signal. The signal reflection is the phenomena where the source transmits
the electrical signal in the signal trace to the receiver/sink and some part
of the signal is reflected back from receiver/sink back to the source. This
reflected signal can cause signal distortion and oscillation in the circuit.

Why the Signal is reflected..?
The reason for the signal reflection from receiver to the transmitter is the
transient impedance caused by the discontinuity in characteristic
impedance of signal trace. If the characteristic impedance is uniform
through starting from source or transmitter to sink or receiver then there
will be no signal reflection. The discontinuity in characteristic impedance
of signal trace can be caused by variation in signal trace width, thickness,
distance between the trace and the corresponding reference plane
and dielectric constant of the substrate material of PCB.
Effects of Signal Reflection:
Oscillation:
Fortunately, the signal reflected from receiver is always less in strength
then the main signal, hence the reflected signal is again transmitted and
then again reflected with lesser strength, and hence in this way the signal
is diminished slowly but will cause a temporary oscillation.
Overshooting and Undershooting:
If the delay time between the signal transmission and reception is short
and the signal transmission is faster and if the previous reflected signal
was not given time/delay to diminish and next signal is transmitted then

this will cause the signal “peaks” to accumulate and will cause reflected
signal overshooting thus complete failure of the circuit will happen.
Similarly if the signal “valley” are accumulated this will cause reflected
signal undershooting thus weakening the main signal to cause false
clocking or misinterpretation of digital data lines like SDI, SDO, SCLK etc.
This overshooting or undershooting can completely destroy the protective
diodes at the signal ends.
Signal Distortion:
The reflected signals from receiver end if are strong enough then they can
possibly change the logic state of digital circuitry hence the circuit will
behave in unanticipated manner. Distorted signal are sensitive towards
noise.
How is Signal Reflection Calculated.?
As an example scenario refer to the diagrammatic representation of the
signal trace between two points A and B on the PCB.

In the above diagram signal (Vi Voltage and Current Ii) Vi incident from
source A to sink B. The characteristic impedance from A to B was
continuous but from point B the impedance of signal trace changed hence
changing the voltage Vo and current Io transmitted onwards. The
characteristic impedance from A to B is Zi while from point B it is Zo.
Keeping the picture in view above, for point B looking from left, we can
write using ohm’s law as
(1)
Now looking at point B from right, line impedance is now Zo then we can
write for Vo as
(2)
Now there are two cases
Case-1: The Impedance is not discontinuous and Zi = Zo
In this case if Zi = Zo then we simply get Vo = Vi means the transmitted
voltage is same as incident voltage Vi and no signal is reflected.

Case-2: Discontinuous Impedance Zi ≠ Zo
Now here the incident signal is not completely transmitted onwards
because of discontinuous non-uniform impedance of signal trace. Hence
some part of the incident signal is reflected back as “Vr”.
Hence we can write
(3)
Now since the reflected current flows in opposite direction so it will be
minus from the incident current hence
(4)
The reflected signal is travelling along the signal trace part with impedance
Zi therefore we can use ohm’s law
(5)
Put equations 1, 2 and 5 in 3 we get
(6)
But
(7)
Therefore
(8)

Or
(9)
This term with the impedance is called the reflection coefficient “Rc”.
(10)
The value of Rc can be from -1 to 1. But ideally Rc should be zero
Methods to Reduce Signal Reflection:
 The transmission rate or speed of the signal can be decreased so
that the oscillation of reflected signal can be minimized and
stabilize the circuit’s signal trace
 The PCB thickness is relatively kept low so as to reduce parasitic
capacitances
 Shorten the signal transmission trace length by carefully arranging
number of layers in multilayer HDI PCBs. This can effectively
decrease the parasitic inductance to reduce cross talk between
signals
 The number of turns or bends in the signal trace should be kept as
low as possible. The signal trace should be in straight line but if the
bend is necessary then the bend arc should be at 45O. This helps to
reduce EMI radiation

 Route all important signal lines on same plane to minimize
unwanted through holes.
 The separate ground and power planes should be used for separate
regulated power supply for noise reduction in multiple power
supply circuit system. This will enhance signal integrity.
 Apply correct routing topology
Routing Topologies:
The Parallel Topology:
In this structure arrangement, the source is simultaneously feeding the
signal to more than one sinks or receivers. All the nodes/receivers
connected in parallel or star fashion are synchronized with source.
However the separate termination resistance is required for each
node/branch and must be compatible with characteristic impedance.
The Series Topology:
Here the one transmitter or source is connected in daisy chain or series
fashion the output of one is connected to input of other. A simple series
resistor can be placed close to the driving/transmitting/source end to
make the impedance at the receiver side compatible with characteristic
impedance. The daisy chain branch length should be kept as short as

possible. However the signals received at different receiving ends are not
synchronized with main transmitter.
Signal Trace Termination:
There are two ways to terminate the signal trace. Either from the source
end or from the sink end.
A simple series resistor placed between source and load and close to the
source will do the job.
There are 4 ways to make signal termination at load / sink end.
Single resistor parallel termination:
RC Termination:

Thevenin Termination:
Diode Termination:

Differential Pair Termination:
Related Posts:
1. What Does a Signal Tracer Schematic Mean?
2. What is Signal Integrity? A Comprehensive Overview
3. How You Can Use RF Signal Detectors to Protect Your Security
4. The Ultimate Guide to Signal Conditioning Circuit
https://www.raypcb.com/signal-reflection-in-pcbs/

How To Avoid Signal Reflection in PCB

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

How To Avoid Signal Reflection in PCB

Uploaded by

Copyright:

Available Formats

RAYMING PCB & ASSEMBLY

How to Avoid Signal Reflection in PCB

Signal reflection occurs when an electrical signal encounters an

impedance discontinuity along a transmission line, causing a portion of

matching trace impedance and terminating lines helps avoid reflections.

This article provides an overview of signal reflection causes, effects,

calculations, and design techniques to mitigate reflection problems in

What Causes Signal Reflection?

Reflection arises from an impedance mismatch. Wherever the signal line

characteristic impedance Z0 changes along its path, some incident signal

energy will reflect while the remainder transmits through.

The most common sources of mismatch and reflection in PCBs include:

 Trace impedance change from differences in width, thickness, or

 Stub traces that branch off from main signal path

 Components with mismatched terminal impedances

 Improper termination at load end of line

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 Vias that transition between layers with different stackup materials

 Discontinuities at connections like connectors or IC pads

 Damage like cracks or cuts in a trace

Minimizing impedance discrepancies along the signal path reduces the

Request PCB Manufacturing & Assembly Quote

When reflections occur on a signal line, several detrimental effects can

Ringing – multiple reflections lead to resonances and ringing artifacts on

Noise – inter-symbol interference from reflected signals appearing at

Overshoot – excessive peak voltage from constructive interference

between incident and reflected waves

Undershoot – sagging voltage dips caused by destructive signal

Jitter – timing variations resulting from impedance discontinuities

PCB Manufacturing & Assembly Services https://www.raypcb.com/

EMI – radiated interference caused by resonances along the transmission

Signal Integrity – reflection noise that can degrade receiver performance

and contribute to bit errors

Power Integrity – impedance issues that compound power distribution

Proper impedance control minimizes these reflection issues which are

problematic in high speed digital systems.

Transmission Line Theory

To understand and model reflections, we must consider the transmission

line model of interconnects:

 R = Resistance per unit length

 L = Inductance per unit length

 G = Conductance per unit length

 C = Capacitance per unit length

Together R, L, G, and C define the characteristic impedance Z0 of the line:

PCB Manufacturing & Assembly Services https://www.raypcb.com/

When Z0 is constant throughout the path, signals propagate without

reflection. Wherever Z0 changes, reflection occurs according to the

Where Z1 is the load or intermediate impedance causing mismatch. This

model allows calculating reflection severity at each impedance

The reflection coefficient quantifies the portion of signal reflecting back at

For example, consider a 50 Ω transmission line terminated into 75 Ω.

Applying the reflection coefficient equation:

Γ = (Z2 – Z0) / (Z2 + Z0)

mismatch. The remainder transmits through to the load.

Additionally, the voltage reflection coefficient ρ provides the amplitude of

the reflected waveform relative to the incident wave:

PCB Manufacturing & Assembly Services https://www.raypcb.com/

ρ = (Z2 – Z0) / (Z2 + Z0)

These principles allow quantifying reflection severity for any impedance

mismatch along a transmission path.

Avoiding Reflections During Routing

Several PCB routing techniques help reduce signal reflections: