Đề bài : Thiết kế bộ hiển thị lên led 7 đoạn , đếm từ 00 -99 bằng ngôn ngữ VHDL .

Mô tả :
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_arith.ALL;
use ieee.std_logic_unsigned.ALL;

entity bodem is
Port ( thvao :in std_logic;
rst: in std_logic;
thra1: out std_logic_vector(6 downto 0);
thra2: out std_logic_vector(6 downto 0)
);
end bodem;

architecture Behavioral of bodem is

begin
process(thvao,rst)
variable count1: integer range 0 to 100;
variable count2: integer range 0 to 100;
begin
if rst='1' then
count1:=0;
count2:=0;
elsif rising_edge(thvao) then
count1:= count1 + 1;
if count1 = 10 then
count1:= 0;
count2:= count2 +1;
if count2 =10 then
count2:= 0;
end if;
end if;
end if;
case count1 is
when 0 =>thra1<="1111110";
when 1 =>thra1<="0110000";
when 2 =>thra1<="1101101";
when 3 =>thra1<="1111001";
when 4 =>thra1<="0110011";

1
 when 5 =>thra1<="1011011";
when 6 =>thra1<="1011111";
when 7 =>thra1<="1110000";
when 8 =>thra1<="1111111";
when 9 =>thra1<="1111011";
when others =>NULL;
end case;
case count2 is
when 0 =>thra2<="1111110";
when 1 =>thra2<="0110000";
when 2 =>thra2<="1101101";
when 3 =>thra2<="1111001";
when 4 =>thra2<="0110011";
when 5 =>thra2<="1011011";
when 6 =>thra2<="1011111";
when 7 =>thra2<="1110000";
when 8 =>thra2<="1111111";
when 9 =>thra2<="1111011";
when others =>NULL;
end case;
end process;

end Behavioral;

Test bench:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity tb_bodem is
end tb_bodem;

architecture Behavioral of tb_bodem is

signal thvao: std_logic := '0';
signal rst: std_logic := '0';
signal thra1: std_logic_vector(6 downto 0);
signal thra2: std_logic_vector(6 downto 0);

component bodem
Port ( thvao : in std_logic;
rst : in std_logic;
2
 thra1 : out std_logic_vector(6 downto 0);
thra2 : out std_logic_vector(6 downto 0)
);
end component;

begin
uut: bodem port map (thvao => thvao, rst => rst, thra1 => thra1, thra2 => thra2);

stimulus_process: process
begin
thvao <= '0';
rst <= '1';
wait for 10 ns;

rst <= '0';

wait for 10 ns;

for i in 0 to 19 loop
thvao <= '1';
wait for 10 ns;

thvao <= '0';

wait for 10 ns;
end loop;

wait;
end process;

end Behavioral;