1

EXPERIMENT NO: 1

TWO STAGE R-C COUPLED CE BJT AMPLIFIER

1. To design a two stage R-C coupled Common Emitter BJT amplifier and plot its
1.1Aim:- frequency response.
2. To see the effect of cascading upon gain and bandwidth,

1.2Components:

Name Quantity
Transistor BC547 2
Resistor 100K , 8.2K , 820 , 680 , 120 , 4.7K , 2.2K , 2,4,1,1,1,1,1
Capacitor 10µF,100µF, 1 KPF 3, 2,1

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Function Generator (0-1)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BC 547:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

1.3Theory:

Cascading in amplifiers is a process of connecting the output of one amplifier to the input of the next and
so on so forth. Cascading is used to increase the gain of the amplifier, but due to cascading bandwidth
gets reduced.
2

1.4Circuit diagram:

Fig(2) Two stage RC Coupled CE BJT Amplifier

1.5Procedure:

1) Connect the circuit as shown in figure1.

2) Note the DC conditions i.e, the values of base, collector currents and base to emitter,
collector to emitter voltages for each stage.
3) Connect the circuit as shown in figure 2, Adjust the input signal frequency to 1 KHz and the
peak to peak value of Vi1 to 2 or 3mV. Note the peak to peak value of output voltage Vo1 and
Vo2. Calculate the voltage gain of each stage.

V V
A V = O1 AV = O 2
For stage-1, 1 V For stage-2, 2 V
i1 O1

AV = AV 1  AV 2
And overall voltage gain is,

4) Vary the frequency of the input signal from 30 Hz to 500 KHz in appropriate steps,
maintain the Vi1 constant at 2mV and note the output voltages in each step.

5) Calculate the gains AV1, AV2, and AV for each value of frequency. Plot a graph between gain
and frequency for each stage and the overall stage
3

6) Calculate bandwidth of each stage and the overall stage from the graph.

Observations:

DC conditions:

For stage-1, VBE1 = ……………. VCE1 = ………………

IB1 = ……………… IC1 = ………………..

For stage-2, VBE2 = ……………. VCE2 = ………………

IB2 = ……………… IC2 = ………………..

Frequency Response:

Sl.No. Frequency Vi1 VO1 VO2 (V) V V AV = AV 1  AV

A = O1 A = O2
V1 V2 2
(mV) (mV) Vi1 VO1
4

1.6Expected graph:

Fig(3) frequency response of Two stage RC Coupled CE BJT Amplifier

1.7Result:

1) The frequency response of individual and overall stages is plotted.

2) Mid frequency gains are,

AVm1 = ……………. AVm2 = …………… AVm = ………………

3) Bandwidths are,

BW1 = …………… BW2 = ………….. BW = …………..

4) It is observed that cascading in amplifiers increases the voltage gain but decreases the
bandwidth.
5

EXPERIMENT NO: 2

TWO STAGE R-C COUPLED CS FET AMPLIFIER

2.1Aim:

1. To design a two stage R-C coupled Common Source JFET amplifier and plot its frequency
response.
2. To see the effect of cascading upon gain and bandwidth

2.2Components:

Name Quantity
JFET BFW 11 2
Resistor 4.7K , 12K , 1K , 1M 2, 1, 2, 2
Capacitor 1µF, 10µF, 1KPF 3,2,1

Equipment:

Name Range Quantity

Bread Board 1
Dual power supply 0-30V 1
CRO (0-20)MHz 1
Function Generator (0-1)MHz 1
Connecting Wires

Specifications:

For FET BFW11:

Gate Source Voltage VGS = -30V

Forward Gain Current IGF = 10mA

Maximum Power Dissipation PD = 300mW

2.3Theory:

Cascading in amplifiers is a process of connecting the output of one amplifier to the input of the next and
so on so forth. Cascading is used to increase the gain of the amplifiers and also to get desired values of
input and output impedances.

In a multistage amplifier the overall voltage gain is the product of individual voltage gains. But the
bandwidth of a multistage amplifier is always smaller than the bandwidth of individual stages.
6

2.4Circuit diagram:

Fig(1)- DC bias of CS JFET

Fig(2)- Two stage RC Coupled CS JFET Amplifier

2.5Procedure:

1) Connect the circuit as shown in figure1 .

2) Note the DC conditions i.e, the values of base, collector currents and base to emitter,
collector to emitter voltages for each stage.
7

3) Connect the circuit as shown in figure 2, Adjust the input signal frequency to 1 KHz and the peak
to peak value of Vi1 to 10 mV. Note the peak to peak value of output voltage Vo1 and Vo2.
Calculate the voltage gain of each stage.

V V
A V = O1 AV = O 2
For stage-1, 1 V For stage-2, 2 V
i1 O1

AV = AV 1  AV 2
And overall voltage gain is,

4) Vary the frequency of the input signal from 30 Hz to 500 KHz in appropriate steps,
maintain the Vi1 constant at 2mV and note the output voltages in each step.

5) Calculate the gains AV1, AV2, and AV for each value of frequency. Plot a graph between gain
and frequency for each stage and the overall stage

6) Calculate bandwidth of each stage and the overall stage from the graph.

Observations:

DC conditions:

For stage-1, VGS1 = ……………. VDS1 = ………………

ID1 = ………………

For stage-2, VGS2 = ……………. VDS2 = ………………

ID2 = ………………

Frequency Response:
8

Sl.No. Frequency Vi1 VO1 VO2 (V) V V AV = AV 1  AV

A = O1 A = O2
V1 V2 2
(mV) (mV) Vi1 VO1
9

2.6Expected graph:

Fig(3)- Frequency response of Two stage RC Coupled CS JFET Amplifier

2.7Result:

1) The frequency response of individual and overall stages is plotted.

2) Mid frequency gains are,

AVm1 = ……………. AVm2 = …………… AVm = ………………

3) Bandwidths are,

BW1 = …………… BW2 = ………….. BW = …………..

4) It is observed that cascading in amplifiers increases the voltage gain but decreases the
bandwidth.
10

EXPERIMENT NO: 3

VOLTAGE SERIES FEEDBACK AMPLIFIER

3.1Aim:
1. To plot the frequency response of a voltage series feedback amplifier
2. To see the effect of feed back upon gain and bandwidth,

3.2Components:

Name Quantity
Transistor BC547 2
Resistor 100K , 8.2K , 820 , 680 , 120 , 4.7K , 2.2K , 2,4,1,1,1,1,1
Capacitor 10µF,100µF, 1 KPF 3, 2,1

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Function Generator (0-1)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BC 547:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

3.3Theory:

Negative feedback is defined as a process of returning a part of the output signal to the input out of phase
with the input signal. It reduces gain and increases bandwidth. Negative feedback is employed in
amplifier circuits to improve the stability of the gain, reduce distortion and the effect of noise. It also
helps in obtaining desired values of input and output resistances.

A voltage series feedback amplifier samples output voltage and returns the feedback signal to the input in
series opposing. Feedback signal is a voltage signal.
11

Vf =  V O

Voltage series feedback increases input resistance and decreases output resistance.

3.4Circuit diagram:

Fig(1) DC bias for the BJT

Fig(2) Voltage Series Feedback Amplifier

12

3.5Procedure:

1. Connect the circuit as shown in figure 1. Note the DC conditions.

2. Connect the circuit as shown in figure 2. The switch must be open circuit, Then the circuit
does not has feedback.

3. Adjust the input signal frequency to 1 KHz and the peak to peak amplitude to 3mV. Note the
output voltage and calculate the gain.

4. Vary the frequency from 30 Hz to 500 KHz in appropriate steps and note VS and VO in
V
A = O
v
VS
each case. Calculate the gain without feedback as .

5. Plot a graph between gain and frequency. Calculate bandwidth from the graph.

6. Now connect the switch as short circuit. This will introduce voltage series feedback in the circuit.
Repeat steps 3 to 5. in this case vary the frequency from 30 Hz to 2 MHz.

7. Compare the gain and bandwidth with and without feedback

Observations:

DC conditions:-

For stage-1, VBE1 = ……………. VCE1 = ………………

IB1 = ……………… IC1 = ………………..

For stage-2, VBE2 = ……………. VCE2 = ………………

IB2 = ……………… IC2 = ………………..

Frequency Response:

Sl.No. Frequency Vi VO VO f VO VO f
A= AV =
V f
(mV) (V) (V) Vi Vi
13

3.6Expected graph:

Fig(3) Frequency response of Voltage Series Feedback Amplifier

3.7Result:

Gain without feedback = -----------

Bandwidth without feedback = ----------

Gain with feedback = -----------

Bandwidth with feedback = ----------

14

EXPERIMENT NO: 4

VOLTAGE SHUNT FEEDBACK AMPLIFIER

4.1Aim: To obtain the frequency response characteristics of a Voltage shunt amplifier

with and without feedback and determine the upper and lower cut off frequencies.

4.2Apparatus: 1. Transistor BC 107

2. Resistors – 33KΩ (1), 4.7KΩ (1), 2.2KΩ (1),
8.2KΩ (1), 1KΩ (1), 2.7KΩ (1) and 10KΩ (1),
3. Capacitors – 10μf (3),
4. Signal Generator,
5. Regulated Power Supply,
6. Bread Board with connecting wires,
7. CRO with probes.

4.3 Circuit diagrams:

15

4.4 Procedure:
1. Connections are made as per the circuit diagram.
2. A 10V DC supply is given to the circuit for biasing.
3. The circuit is connected without feedback i.e., without RF
4. At certain amplitude of input signal (say 20mV at 1 kHz) is kept constant
using the function generator and for Different Frequencies the output voltage
from CRO is noted.
5. Now, the circuit is connected with feedback i.e., with RF.
6. By keeping the input signal constant the output voltages for different
frequencies are noted from CRO.
7. Gain with and without feedback is calculated from the
Formula
Gain = 20 log Vo / Vi (dB)

Where VO is output voltage, VI is input voltage.

16

Tabular column:
WITH FEEDBACK: I/P VOLTAGE Vi = 20mV =0.02V

Gain in dB =
S.NO. FREQUENCY (Hz) O/P VOLTAGE (Vo)
20 log Vo / Vi

100Hz

TO

1MH

WITHOUT FEEDBACK: I/P VOLTAGE Vi = 20mV =0.02V

Gain in dB =
S.NO. FREQUENCY (Hz) O/P VOLTAGE (Vo)
20 log Vo / Vi
100Hz

TO

1MHz
17

4.5 Model Graph:

Gain in db Without feedback

With feedback

Frequency(Hz)

Graph: A graph is plotted between gain (dB) and frequency (Hz) which is
frequency response of voltage shunt feedback amplifier for
without feedback and with feedback.

Precautions: 1. Avoid loose and wrong connections.

2. Avoid parallax error while taking readings.

4.6 Result: The frequency response of the given voltage shunt amplifier
with & without feedback are obtained.
Bandwidth
withfeed back= Bandwidth withoutfeed back =

4.7 INFERENCE

1. What is meant by voltage shunt feedback?

2. Draw the circuit diagram of a voltage shunt feedback?
3. What is the difference between voltage series and voltage shunt feedback
4. What is another name for voltage shunt amplifier?
5. What is the effect of voltage shunt feedback on input and output impedance?
18

EXPERIMENT NO: 5

CURRENT SHUNT FEEDBACK AMPLIFIER

5.1 Aim:
1. To plot the frequency response of a current shunt feedback amplifier
2. To see the effect of feed back upon gain and bandwidth,

5.2 Components:

Name Quantity
Transistor BC547 2
Resistor 100K , 8.2K , 820 , 680 , 120 , 4.7K , 2.2K , 2,4,1,1,1,1,1
Capacitor 10µF,100µF, 1 KPF 3, 2,1

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Function Generator (0-1)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BC 547:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

5.3 Theory:

Negative feedback is defined as a process of returning a part of the output signal to the input out of
phase with the input signal. It reduces gain and increases bandwidth. Negative feedback is employed in
amplifier circuits to improve the stability of the gain, reduce distortion and the effect of noise. It also
helps in obtaining desired values of input and output resistances.

A current shunt feedback amplifier samples output current and returns the feedback signal to the input in
shunt. Feedback signal is a voltage signal.
19

I f = IL

Current shunt feedback increases output resistance and decreases input resistance.

5.4 Circuit diagram:

Fig(1) DC bias for the BJT

Fig(2) Current Shunt Feedback Amplifier

20

5.5 Procedure:

1. Connect the circuit as shown in figure 1. Note the DC conditions.

2. Connect the circuit as shown in figure 2. The switch must be open circuit, Then the circuit
does not has feedback.

3. Adjust the input signal frequency to 1 KHz and the peak to peak amplitude to 3mV. Note the
output voltage and calculate the gain.

4. Vary the frequency from 30 Hz to 500 KHz in appropriate steps and note VS and VO in
V
A = O
v
VS
each case. Calculate the gain without feedback as .

5. Plot a graph between gain and frequency. Calculate bandwidth from the graph.

6. Now connect the switch as short circuit. This will introduce current shunt feedback in the circuit.
Repeat steps 3 to 5. in this case vary the frequency from 30 Hz to 2 MHz.

7. Compare the gain and bandwidth with and without feedback

Observations:

DC conditions:

For stage-1, VBE1 = ……………. VCE1 = ………………

IB1 = ……………… IC1 = ………………..

For stage-2, VBE2 = ……………. VCE2 = ………………

IB2 = ……………… IC2 = ………………..

Frequency Response:
Sl.No. Frequency Vi VO VO f V
A= O A =
VO f
(mV) (V) (V) V V f
Vi V
i
21

5.6 Expected graph:

Fig(3) frequency response of Current Shunt Feedback Amplifier

5.8 Result:

Gain without feedback = -----------

Bandwidth without feedback = ----------

Gain with feedback = -----------

Bandwidth with feedback = ----------

22

EXPERIMENT NO : 6

RC PHASE-SHIFT OSCILLATOR

6.1 Aim:
To design and study the operation of RC Phase-shift Oscillator using BJT and verify
Barkhausen’s criterion.

6.2 Components:

Name Quantity
Transistor BC547 1
Resistor 74K , 15K , 4.7K , 1K , 6.8K,2.2K 1,1,2,1,2,1
Capacitor 10µF,100µF, 1 KPF 2, 1,3

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Function Generator (0-1)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BC 547:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

6.3 Theory:-

An oscillator is an electronic circuit that provides an AC output without using any AC input. All
Sinusoidal oscillator circuits use the concept of positive feedback to produce oscillations. An oscillator
circuit must satisfy the Barkhausen’s criterion of unity loop gain to produce oscillations.
23

The Common Emitter amplifier provides a phase shift of 180˚. Additional 180˚ of phase shift required to
satisfy the Barkhausen’s criterion of phase shift is provided by the RC phase-shifting network. RC
Phase-shift oscillator is used at Audio Frequencies.

Design:
Q: Design RC Phase-shift oscillator circuit to provide oscillations at a frequency of 8 KHz. Use BJT
BC547 for which β = 200, hfe = 50, hie = 1.5 KΩ and VBE(active) = 0.65V. The biasing conditions are as
follows.VCC = 12V, IC = 1mA, VCE = 6V and Stability factor is S = 10.
Use RC = 4.7KΩ.

Solution:

Use, IC =   I B Apply KVL to the input loop, then

 I B = 5A − VB + IB  RB + VBE − I E  RE = 0

Apply KVL to the output loop:  VB = 2.01 V

− VCC + IC  RC + VCE + IC  RE Divide RB with VB:

=0

 RE = 1.3K V 
 R1 = CC = 73.5K
RB
V
B
Apply Thevenin’s theorem to the base circuit,
then Also, R  R = 14.8K
R  R2
B
= 1 2

R1 + R2
V  R2 And R R  R2
V B= CC B = 1 1
R1 + R2 R1 + R2 f =
o
We know that 2  RC 6 + 4K where
We know that the stability factor for a self bias
R
circuit is given by, K= C
R
6.4 Circuit diagram:-
For Part-I:

Fig (1) : RC Phase shift oscillator

For Part-II:

Fig (2): Amplifier Circuit diagram

Fig (3): Feedback network

33

6.5 Procedure:-

Part-I: Study of operation

1) Connect the self bias circuit and check the DC conditions.

2) Connect other components of the oscillator circuit as shown in figure. Observe the output voltage
waveform on CRO screen. Note down its peak to peak amplitude and frequency.

Part-II: Verification of Barkhausen’s criterion

1) Connect only the amplifier circuit and find its gain at the frequency of oscillations. Apply an
input of 30mV. Also observe the phase shift between input and output voltages.

2) Connect only the feedback network as shown and compute the feedback factor β as
Vf
=
VS .

A   . This product should be greater than or equal to unity.

3) Compute the loop gain as

4) Observe the phase shift between Vf and VS.

5) Add the phase shift provided by the amplifier and feedback network. The sum should be equal
to 360˚.

Observations: -

Draw the output waveform; mark its peak-to-peak amplitude and time period.

6.6 Result:-

Frequency of oscillations, fo = ------------

Peak to peak amplitude of output = -------------------

Loop gain = --------------------

Phase shift = ---------------------------

Hence Barkhausen’s criterion is satisfied.

BE IV SEM CBCS AEC LAB MANUAL

34

EXPERIMENT NO: 7(A)

COLPITTS OSCILLATOR

7.1 Aim:
To design and study the operation of colpitts Oscillator using BJT and determine the frequency of
oscillation.

7.2 Components:

Name Quantity
Transistor BC547 1
Resistor 74K , 15 K , 4.7K , 1K , 1,1,1,1
Capacitor 4.7µF, 1 KPF 2, 1
Inductor 70 μH 1

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BC 547:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

7.3 Theory:-

An oscillator is an electronic circuit that provides an AC output without using any AC input. All
Sinusoidal oscillator circuits use the concept of positive feedback to produce oscillations. An oscillator
circuit must satisfy the Barkhausen’s criterion of unity loop gain to produce oscillations.
Colpitt’s oscillator is a popular LC Oscillator circuit used at Radio Frequencies.

BE IV SEM CBCS AEC LAB MANUAL

35

Design:
Q: Design Colpitt’s oscillator circuit to provide oscillations at a frequency of 850 KHz. Use BJT BC547
for which β = 200, hfe = 50, hie = 1.5 KΩ and VBE(active) = 0.65V. The biasing conditions are as follows.VCC
= 12V, IC = 1mA, VCE = 6V and Stability factor is S = 10. Use RC = 4.7KΩ. Solution:
Use, IC =   I Apply KVL to the input loop, then
B
 I B = 5A − VB + IB  RB + VBE − I E  RE = 0

Apply KVL to the output loop:  VB = 2.01 V

− VCC + IC  RC + VCE + IC  RE
=0
 RE = 1.3K Divide RB with VB:
V R
= CC B = 73.5K
Apply Thevenin’s theorem to the base circuit,  R1
then VB
V  R2 And R R  R2 Also, RB = R1   R = 14.8K
V B= CC = 1 2
R2
R1 + R2
B
R1 + R2 R1 + R2
We know that the stability factor for a self bias 1 1 1
fo =
1 ( + )
circuit is given by, 2 L C1 C2
1+ We know that
S=
R Assume that C1 = C2 = 1KPF . Then
1+ E L = 70H
RB + RE
 RB = 12.31K

7.4 Circuit diagram:-

Fig (1): Colpitts Oscillator

BE IV SEM CBCS AEC LAB MANUAL
36

7.5 Procedure:-

1) Connect the self bias circuit and check the DC conditions.

2) Connect other components of the oscillator circuit as shown in figure 1. Adjust the
capacitance to 800 PF.

3) Observe the output voltage waveform on CRO screen. Note down its peak to peak
amplitude and frequency.

4) Vary the inductance in appropriate steps and record the frequency in each case.

5) Calculate the frequency theoretically and record it in the table. Compare the theoretical and
practical values.

Observations:-

DC conditions:-

VBE = ……………. VCE = ………………

IB = ……………… IC = ………………..

Sl. No. Inductance Frequency

Frequency
(μH) (Practically)
1 1 1 1
fo=  ( + )
(KHz) 2 L C C
1 2

7.6 Result:-

Colpitts oscillator circuit is designed for the given specifications and its operation is studied.

BE IV SEM CBCS AEC LAB MANUAL

37

EXPERIMENT NO: 7(B)

HARTLEY OSCILLATOR

7.7 Aim:
To design and study the operation of Hartley Oscillator using BJT and determine the frequency of
oscillation.

7.8 Components:

Name Quantity
Transistor BC547 1
Resistor 74K , 15 K , 4.7K , 1K , 1,1,1,1
Capacitor 4.7µF, 100 PF 2, 1
Inductor 70 μH 2

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BC 547:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

7.9 Theory:-

An oscillator is an electronic circuit that provides an AC output without using any AC input. All
Sinusoidal oscillator circuits use the concept of positive feedback to produce oscillations. An oscillator
circuit must satisfy the Barkhausen’s criterion of unity loop gain to produce oscillations.

Hartley’s oscillator is a popular LC Oscillator circuit used at Radio Frequencies.

BE IV SEM CBCS AEC LAB MANUAL

38

Design:
Q: Design Hartley’s oscillator circuit to provide oscillations at a frequency of 850 KHz. Use BJT BC547
for which β = 200, hfe = 50, hie = 1.5 KΩ and VBE(active) = 0.65V. The biasing conditions are as follows.VCC
= 12V, IC = 1mA, VCE = 6V and Stability factor is S = 10. Use RC = 4.7KΩ. Solution:
Use, IC =   I Apply KVL to the input loop, then
B
 I B = 5A − VB + IB  RB + VBE − I E  RE = 0

Apply KVL to the output loop:  VB = 2.01 V

− VCC + IC  RC + VCE + IC  RE
=0
 RE = 1.3K Divide RB with VB:
V R
= CC B = 73.5K
Apply Thevenin’s theorem to the base circuit,  R1
then VB
V  R2 And R R  R2 Also, RB = R1   R = 14.8K
V B= CC = 1 2
R2
R1 + R2 R1 + R2 R1 + R2

7.10 Hartley’s Oscillator

BE IV SEM CBCS AEC LAB MANUAL

39

7.11 Procedure:-

1) Connect the self bias circuit and check the DC conditions.

2) Connect other components of the oscillator circuit as shown in figure. Adjust the
capacitance to 800 PF.

3) Observe the output voltage waveform on CRO screen. Note down its peak to peak
amplitude and frequency.

4) Vary the capacitance in appropriate steps and record the frequency in each case.

5) Calculate the frequency theoretically also and record it in the table. Compare the
theoretical and practical values.

Observations:-

DC conditions:-

VBE = ……………. VCE = ………………

IB = ……………… IC = ………………..

Sl. No. Capacitance Frequency Frequency

(PF) (Practically) 1
f =
(MHz) 2 (L + L + 2M )C
1 2

7.12 Result:-

Hartley oscillator circuit is designed for the given specifications and its operation is studied.

BE IV SEM CBCS AEC LAB MANUAL

40

Experiment no: 8

Constant K Low Pass Filter.

8.1 Aim:-

1) To design a T-section constant K Low Pass Filter with a cut-off frequency of 2 KHz and a
characteristic load impedance of 600Ω.

2) To obtain the output characteristics of the above filter.

8.2Components:

Name Quantity
Resistor 600 1
Capacitance box 1
Inductance box 2

Equipment:

Name Range Quantity

Bread Board 1
Function Generator (0-2)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

8.3Theory:-

Low pass filter is a circuit which passes low frequency signals and attenuates high frequency signals,

The frequency at which the gain is 70% of the maximum value is called as cut off frequency.

Design:-

We know that the cut off frequency is given by,

1
fC =
 LC
R = L
K
and the characteristic load impedance is, C

then the design equations for L and C will be

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41

600
L= = = 48mH
RK   2000
fC

1 1
C= = = 0.26 F
R K f C   600  2000

8.4Circuit Diagram:-

Fig (1): Low pass filter

8.5Procedure:-

1) Connect the components as shown in the circuit diagram.

2) Adjust Vi = 4V (peak-to-peak) and keep it constant throughout the experiment.

3) Vary the input frequency from 100 Hz to 20 Khz in steps of 200 Hz and note down the peak-
to-peak voltage across RL i.e., VO.

Note: Take more readings between 1.8KHz and 2.2KHz.

4) Plot the variation of Gain Versus frequency

fC .
5) From the graph find out

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expected
F Observations:-
i
g
(
2
)
:

F
r
e
q
u
e
n
c
y  Vi 
Sl. Frequency Vi VO  = ln
 
r No.  O
V
(Hz) (Volt) (Volt)
e
s
p
o
n
s
e

o
f
8.7 Results:-
l
o From the attenuation characteristics curve,
w
fC =Hz
p
a
s
s

f
i
l
t
e
r

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EXPERIMENT NO: 9

RF TUNED AMPLIFIER

9.1Aim:To design and plot the frequency response of a RF tuned amplifier

9.2 Components:

Name Quantity
Transistor BF194 1
Resistor 94K , 68K , 3.9K , 2.2K 1,1,1,1
Capacitor 10µF,100µF, 3.18 ηF 2, 1,1
Inductor 39 µH 1

Equipment:

Name Range Quantity

Bread Board 1
Dual DC power supply 0-30V 1
Function Generator (0-1)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

Specifications:

For Transistor BF 194:

• Max Collector Current= 0.1A
• Vceo max= 50V
• VEB0 = 6V
• VCB0 = 50V
• Collector power dissipation = 500mW
• Temperature Range = -65 to +150 0C
• hfe = 110 - 220

9.3 Theory:-

Tuned amplifier circuit uses parallel LC resonant circuit as the load impedance, They have a very narrow
bandwidth, hence they select a particular frequency and rejects other, they are used in radio receivers.

A single tuned amplifier consists of only one LC section as a load.

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9.4 Circuit diagram:-

Fig (1): RF tuned amplifier

9.5 Procedure:-

1) Connect the self bias circuit and check the DC conditions.

2) Connect the other components and set the generator frequency at 455KHZ. Adjust the peak to
peak amplitude of the input voltage to 30mV. Observe the output voltage waveform on the
CRO screen and note the peak to peak value of the output voltage. Calculate the gain.

3) Vary the frequency from 400 to 600KHZ in appropriate steps.

4) Calculate the gain for each frequency.

5) Plot a graph between gain and frequency. Calculate bandwidth from the graph.

Observations:-

DC conditions:-

VBE = ……………. VCE = ………………

IB = ……………… IC = ………………..

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Frequency Response:-

Sl. No. Frequency Vi (mV) Vo (V) Vo

Gain = Vi

9.6 Expected Graph:-

Fig (2): Frequency response of single tuned amplifier

9.7 Result:-

Resonant frequency = -------------

Gain at resonance = --------------

Bandwidth = ---------------

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EXPERIMENT NO: 10

SERIES VOLTAGE REGULATOR

10.1 Aim:

To design and set up a transistor series regulator and plot

1. Load current vs output voltage
2. Input voltage vs output voltage for a constant load current

10.2 Components:

1. BC 107 Transtor
2. Zener diode
3. Ammeter -1(0-50mA)
4. Voltmeters(0-29-0v)
5. Resistor 2.4K
6.

10.3 Circuit diagram:

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10.4 Theory:

An ideal power supply maintains a constant voltage at its output terminals, no matter what current is drawn

from it. The output voltage of a practical power supply changes with load current, generally dropping as load

current increases. The power supply specifications include a full load current rating, which is the maximum

current that can be drawn from the supply. The terminal voltage when full load current is drawn is called the

full load voltage (VFL). The no load voltage (VNL) is the terminal voltage when zero current is drawn from

the supply, that is, the open circuit terminal voltage.

One measure of power supply performance, in terms of how well the power supply is able to maintain a

constant voltage between no load and full load conditions, is called its percentage voltage regulation.

An unregulated power supply has poor regulation, ie. output voltage changes with load variations. If a power

supply has poor regulation it possesses high internal impedance. A simple emitter follower regulator is shown

in Fig. 4.1. It is also called a series regulator since the control element (transistor) is in series with the load. It

is also called as the pass transistor because it conducts or passes all the load current through the regulator. It is

usually a power transistor. The zener diode provides the voltage reference, and the base to emitter voltage of

the transistor is the control voltage. The value of RS must be sufficiently small, to keep the zener in its reverse

breakdown region. Writing Kirchoff’s voltage law to the output circuit,

If VZ is perfectly constant, the above equation is valid at all times, and any change in Vo must cause change in

VBE, in order to maintain equality. When current demand is increased by decreasing RL, Vo tends to decrease.

From the above equation, it is seen that as VZ is fixed, decrease in Vo increases in VBE. This will increase the

forward bias of the transistor, thereby increasing level of conduction. Thus, the output current is increased to

keep ILRL a constant. The reverse process occurs when RL is increased.

Thus, the above circuit keeps the output voltage constant, even if the load varies widely.

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10.5 Procedure:

Load regulation

1. The circuit is wired as per the circuit diagram shown in fig. 1.

2. Keep the input voltage constant at Vimin , ie 10 V.
3. Vary the load resistance. Note IL and VO for each setting of RL. Ensure that Vi remains
same throughout.
4. Draw a plot between IL and VO.
Line Regulation
Percent line regulation is another measure of the ability of a power supply to maintain
a constant output voltage. In this case, it is a measure of how sensitive the output is to the
changes in input or line voltage rather than to the changes in load. The specification is usually
expressed as the percent change in output voltage that occurs per volt change in input voltage,
with the load RL assumed constant.
1. The circuit diagram is wired as per the circuit diagram shown in fig. 1.
2. Keep the load resistance RL a constant.
3. Vary the input voltage between the limits for which the regulator is designed (10 to
15V).
4. Note the load voltage VO for each setting of Vin.

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10.6 Result:

Line regulation and load regulation curves are plotted.

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EXPERIMENT NO: 11

M-DERIVED HIGH PASSFILTER

11.1 Aim 1)To design an m-derived high pass T-section filter with a cut-off frequency of 1.2 KHz,
characteristic load impedance of 600 Ω and f = 1.1KHz

2)To obtain output characteristics of the above filter.

11.2Components:

Name Quantity
Resistor 600 1
Capacitance box 3
Inductance box 1

Equipment:

Name Range Quantity

Bread Board 1
Function Generator (0-2)MHz 1
Digital Ammeter, Voltmeter [0-200µA/200mA], [0-20V] 1
CRO (0-20)MHz 1
CRO probes, Connecting Wires

11.3 Theory:-

High pass filter is a circuit which passes high frequency signals and attenuates low frequency signals,

The frequency at which the gain is 70% of the maximum value is called as cut off frequency. m-

derived filters have a very sharp cut off frequency

Design:-

a) Design of prototype High Pass T-section

R 600 4
L= O = = 39.78mH
4fc 1200

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1 1
C= = = 0.11F
4RO 4  600 1200
fC

Value of m for m-derived section to give infinite attenuation at 1100 Hz is given by,

2
 
2
m= 1 − f   = 1 − 1100  = 0.4
 fC  1200 

b) for the m-derived T-section

2C 0.22
= = = 0.55F
Each series arm m 0.4

L 39.78
= = = 99.45mH m
Shunt arm 0.4

4mC 4  0.4  0.11

= 2 = 0.21F
1 − m2 1 − (0.4)
And,

11.4 Circuit Diagram:-

Fig (1): High pass filter

11.5 Procedure:-
1) Connect the components as shown in the circuit diagram.

2) Adjust Vi = 4V (peak-to-peak) and keep it constant throughout the experiment.

3) Vary the input frequency from 100 Hz to 20 Khz in steps of 200 Hz and note down the peak-
to-peak voltage across RL i.e., VO.

4) Plot the variation of Gain Versus frequency

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 Vi 
Sl. Frequency Vi VO  = ln
No.  
(Hz) (Volt) (Volt)  VO 

11.6 Expected Graphs:-

Fig(2): Frequency response of high pass filter

11.7 Results:-

From the attenuation characteristics curve,

fC =Hz

f =Hz

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‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬

PSpice with OrCAD Capture

‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬

Objectives :

▪ Provide an introduction to the basics of using the PSpice circuit analysis software
package.
▪ Get a review about installing of OrCAD software program.
▪ Be familiar with different types of analyses and simulation.

Introduction:

PSpice is a powerful general purpose analog and mixed-mode circuit simulator that is used to
verify circuit designs and to predict the circuit behavior. Its name implies ' Simulation
Program for Integrated Circuits Emphasis ' .

It is recommended to simulate all circuits you will connect in the lab to get the ability of
predicting the practical results thus the intended ideas become more obvious.

PSpice allows you to do different types of analysis according to the purpose of each circuit.
These types are DC bias, DC Sweep, Transient with Fourier analysis, AC analysis, Parameter
sweep and Temperature sweep.

In this lab, we will use three basic types of circuit analysis; transient analysis, AC frequency
sweep and DC sweep. Briefly, these may be described as follows:

▪ The “DC sweep” analysis produces a graph of the voltage (or current) at a selected
point in the circuit as the value of one of the DC sources in the circuit is swept over
some range.

▪ The “AC Sweep” analysis produces a graph of the magnitude of the sinusoidal
voltage versus frequency at a selected point in the circuit.

▪ The “Time Transient” analysis produces a graph of the output voltage (or current)
versus time at a selected point in the circuit. Applied sources are characterized by a
time sequence of samples of a voltage or current waveform.

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Procedure :

1. Install OrCAD Program on your computer from your own CD. Try to follow the
instruction of downloading.
2. from ʹ Programsʹ directory, click : OrCAD release 9, Capture CIS. The main page of
OrCAD will appear.
3. To open anew project, click : File, New, Project.
4. In the dialog box, type the name of your project. Check the ʹ Analog or Mixed
– Signal Circuit Wizard ʹ . Browse to the path to be used to store the project at
location Field. Click OK.
5. Another dialog box will appear, it asks you to add libraries you need at your project.
Initially the default libraries are sufficient so Click Finish.
6. A schematic page will appear. Click near the right edge of the screen Then a tool bar
should appear.

Simulation Examples:

As mentioned before, there are different types of analysis are available using OrCAD, in this
laboratory, you will work through an example of each of the three basic types of analysis.

• DC sweep :
1. Open OrCAD main window, Open a new project .
2. From the tool bar, click ʹ Place partʹ.
3. From source library, choose VDC "Dc source" and click ok. Place it on your project
page.
4. From Analog library, choose R "resistor" and click ok. Place two resistors on the
project page.
5. From tool bar, click ʹ Place wireʹ and connect between the components as shown at
figure(1).
6. From the tool bar, click ʹ Place groundʹ, choose ʹ 0/SOURCEʹ, connect it to the circuit
as shown at figure (1).
7. Save your project.
8. click PSpice, New simulation profile, Type your desired name of the simulation
name. Click OK.
9. Simulation Settings window will appear. Choose ʹ DC Sweep ʹ as the analysis type.
10. Choose the type of the dc source you want to draw the output with respect to it . At
this example it is a voltage source. Type its name V1.
11. Type the range of V1, start value, final value and increment which is the step
between voltage values.

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55

Figure (1) : DC sweep example circuit

12. It is intended to plot the current versus to the value of voltage source, so the
current should be measured. Put ʹCurrent into Pinʹ as shown at figure (1)
13. click Runʹ. The result of simulation will appear as shown at figure(2).

Figure (2) : DC sweep simulation result

14. Try to analyze and explain the result, does it as you have predicted ….. ?!!
15. For any details, see ʹ Example1 ʹ video file on the atached CD.

• AC sweep :
1. Try to follow the same steps at ʹExample1ʹ, to build the circuit shown at figure(3).
2. The differences between two examples are:
- Use VAC ʺac sourceʺ source instead of VDC, change its value to 1V. Ac
source is used for plotting relations versus frequency.
- Use ʹVoltage levelʹ instead of ʹCurrent into Pinʹ, to plot the output voltage
versus frequency.
- Choose ʺAC Sweepʺ as an analysis type for this example, linear choice. Type
the range of frequency at start frequency, end frequency and total points.
- Note that the x-axis variable is the frequency while at dc sweep is the source
voltage V1.
- The result of AC sweep simulation is shown at figure(4).

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Figure (3) : AC sweep example circuit

Figure (4) : AC sweep simulation result

• Time Transient :
1. Follow steps at ʹExample2 ʹ to build the circuit shown at figure(5).
2. The differences are:
- Use VSIN ʺsinusoidal sourceʺ source instead of VAC. The sinusoidal source
is used for plotting relations versus for time.
- Double click on the sinusoidal source to change its parameters: frequency,
amplitude and offset voltage.
- Choose ʺTime transientʺ as an analysis type for this example. Type the
duration of simulation you want. Keep it suitable with the frequency of the
sinusoidal input to get obvious simulation result.
- Note that the x-axis variable is the time.
- Showing the input and output signals in the simulation result helps you
during results analysis.
- The result of AC sweep simulation is shown at figure(6).

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Figure (5) : Time transient example circuit

Figure (6) : Time transient simulation result

٥
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EXPERIMENT -1

TWO STAGE RC COUPLED CS FET AMPLIFIER

1.1AIM:

• To analysis the FET amplifier in low & high frequencies to show and realize the
response.

• To find the cut off frequencies and calculate bandwidth.

1.2 Theory
1. Low frequency response- FET amplifier

The FET amplifier in low frequency is quite similar to that in BJT.

The low cutoff frequency is determined by CG is given by the relation:

1
f LG
=
2 (R sig + R i )C G

The low cutoff frequency is determined by Cc is given by the relation :

1
f LC
=
2 (R o+ R )LC C

The low cutoff frequency is determined by Cs is given by the relation :

1
f LS
=
2 R eqC S

Where
Ri =RG Ro =RD Req=Rs //(1/gm)

After calculation we choose the largest frequency as cutoff frequency.

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2. High frequency response- FET amplifier

In high frequency there are parasitic capacitances (Cgd , Cgs , Cds) and wiring capacitances
(Cwi , Cwo) .

For the input circuit the high cutoff frequency is determined by the relation:

1
f =
Hi
2 R ThiC i

For the output circuit the high cutoff frequency is determined by the relation:

1
f Ho
=
2 R ThoC o

Where:

RTHI =Rsig//RG Ci =CWi + Cgs + CMi CMi=(1-Av ) Cgd Av=Vo/Vi= -gm(Rd//RL)

RTHo=RD//RL//rd Co=CWo +Cds +CMo CMO=

(1-(1/Av))Cgd

٥
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2.4 Procedure

1) Connect the circuit in figure 1.

2) Adjust the DC power supply at 20 V.

3) Adjust the function generator to sinusoidal of amplitude 1 V at a frequency at 1 kHz.

4) Measure the output voltage Vo.

5) Decrease the frequency till Vo = 0.707 Vo, Find fL.

6) Increase the frequency till Vo = 0.707 Vo, find fH.

7) Calculate the bandwidth (BW).

8) Vary the frequency according to table 1 and complete the table.

9) Plot the voltage gain against frequency.

10) Repeat above procedures for the circuit at figure 2 and complete table (2).

٥
٣
61

Frequency (Hz) Vi (volt ) Vo (volt) Av =Vo/Vi

10

100

1k

5k

10k

50k

100k

1M

Table (1)

Frequency (Hz) Vi (volt ) Vo (volt) Av =Vo/Vi

10

100

1k

5k

10k

50k

100k

1M

10M

15M

Table (2)

61
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Exercises :

For figure1& figure2 :

1. calculate the cutoff frequencies using equations (mathematically)

2. Repeat all steps using ORCAD.

3. compare between result that you had got from exercise and compare with result
you had got from practical experience.

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BEYOND THE SYLLABUS

63
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1. WEIN BRIDGE OSCILLATOR

Aim: To obtain the frequency of oscillations of a Wein Bridge oscillator.

Apparatus:
1. 741 OP – Amp,
2. Resistors – 4.7K (2) & 10K (1),
3. Potentiometer 10K (1),
4. Decade Capacitances Boxes (2),
5. Bread Board and connecting wires,
6. CRO with probes,
7. TRPS

Circuit diagram :

7 +15

2 -
6 V0
3 +
4.7K 10K POT
LM741
4
-15 4.7K 4.7K

WEIN BRIDGE OSCILLATOR DCB

Procedure:
1. Connections are made as per the circuit diagram.
2. The two capacitances are varied by using variable capacitance box.
3. The output wave is observed on the CRO.
4. The time period of the wave for each value of capacitor is noted.
5. The frequency of the wave is calculated from the time period using the formula f = 1/T
6. Theoretical frequency is calculated by using the
Formula f = 1/2П√R1R2C1C2
7. Compare the practical and theoretical values.

64
65
Tabular column:

R1 = R2 C Theoretical Time Practical

(KΩ) C1 C2 f= Period f = 1/T
1/2П√R1R2C1C2 T (Sec) (Hz)
4.7K 0.1µF 0.1µF

4.7K 0.01µF 0.01 µF

4.7K 0.01 µF 0.1 µF

Precautions:
1. Avoid loose and wrong connections.
2. Connections should be made properly and theOutput should be a proper
sine wave, such that the Time Period and amplitude may be obtained
accurately.

RESULT:

VIVA QUESTIONS:
1. What is an oscillator?
2. Mention the condition for oscillations in wein bridge oscillator?
3. What type of feedback is used in oscillator?
4. What is the range of frequencies?
5. What are the characteristics of positive feedback?

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EXPERIMENT NO-2
BJT DARLINGTON EMITTER FOLLOWER
Aim:
To design and test a Darlington emitter follower circuit with and without
boot strapping and determine the gain, input and output impedance.
Components required:

Sl. No. Components Specification Qty

Details
1. Transistor SL100 2 Nos.
10 f 1 No
2. Capacitors
0.47µf 2 Nos.
3. Resistors 1 M, 2.2 M, 1.5 K, 10 K, 47K Each 1 No
DC Supply, CRO with Probe, Signal generator,
AC millivoltmeter

Theory:
Normally transistors are used as amplifiers. But there are some applications in which, matching
of impedance is required between two circuits without any gain or attenuation. In such applications
emitter followers are used. Emitter followers have large input impedance and small output impedance.
Darlington emitter follower has two transistors connected in cascade such that the emitter of first
transistor is connected to the base of second transistor. The voltage gain of the darlington emitter
follower is close to unity. The major drawback of this circuit is that the second transistor amplifies
leakage current of the first transistor and overall leakage current becomes high. The output is observed
at the emitter terminal of the second transistor. Hence it is called an emitter follower.

66
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Circuit diagram:
Darlington emitter follower without bootstrapping

Vcc = 12V

R1 1M

Cb = 0.47µf
Q1
QSL100

SL100
R2 2.2 M

Vin
CE = 0.47µf
RE

1.5 K Vo

Darlington emitter follower with bootstrapping

Design:
Given IC = 4mA, VCC = 12V, VBE = 0.6V, 1 = 2 = 100
To find RE:
Applying KVL to the output loop of the second transistor, we get VCC = VCE +
VRE
Therefore VRE = VCC – VCE = 12 – 6
Therefore VRE = 6V
W.K.T RE = VRE / IE2 Here
IE2 = IC2
Therefore RE = 6 / 4 x 10-3
RE = 1.5k
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To find R1 & R2:

From the circuit we have
VA = VBE1 + VBE2 + VRE
= 0.6 + 0.6 + 6 = 7.2V
W.K.T. IC = IB
Therefore IB = (4 x 10-3)/ 100 = 40 A
Let 10IB be the current through R1 and 9IB be the current through R2. From the fig. we see
that
R1 = (VCC – VA) / 10IB
Therefore R1 = 12K
From the fig. R2 = VA / 9IB
Therefore R2 = 20 K  22K
W.K.T. CC = 10 / XRE = 10 / ( 2..f.RE) Assume f =
50Hz
Therefore CC = 21.2F  47 F
W.K.T. Cb = 10 / XRB = 10 / ( 2..f.RB ) where RB = R1 || R2 = 7.5k
Therefore Cb = 4.2F  4.7F
Chose R3 = 10 K, CB = 10µf for bootstrapping
Procedure:

1. Rig up the circuit as shown in the fig.

2. Check the circuit for biasing, i.e. check VCE, VCC and VRE.
3. Give a sinusoidal input signal of 1KHz from a signal generator.
4. Set the input signal to a value such that the output doesn‟t get clipped.
5. For different frequencies of the input signal, read the output on the voltmeter and verify that
the gain is 1.
6. To measure input impedance, connect a resistor of 47k in series with the signal generator.
7. Measure the voltage at the input point (VS) and at the point after the resistor (VIN).
8. Current through the resistor is given by the expression I
= (VS - VIN) / 47K.
9. Input impedance is given by ZIN = VIN / 47 K
10.To measure output impedance, connect a DRB in parallel with the output.
11.Adjust all the knobs of the DRB to maximum.
12.Start reducing the resistance in the DRB from a large value until the output reduces to half.
13.The resistance in the DRB is the output impedance.

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Tabular Column:
VIN = constant

Frequency
V0 (V) AV AV (dB)
(Hz)

Waveform:
Vin

Vin 0 t

V0

0 t
Vin

Result:

69