Microprocessors & Microcontrollers Most Important

Questions Solutions

Solution 1. In the context of the Intel 8085 microprocessor, special-purpose registers play
crucial roles in performing specific functions within the processor. The Special purpose
registers, as their name indicates, are used for some specific purpose.

Special purpose registers:

Accumulator (A), Flag Register, Instruction Register, Program Counter (PC) & Stack Pointer
(SP).

Accumulator (Register A):

·It is an 8-bit tri-state register. It is mainly used for arithmetic, logic, load, and store
operations.
·It is also used in I/O operations. In most operations, the result is stored in the
Accumulator after execution.
Flag Register:
·It is an 8-bit register, which consists of only five flags.
·Each flag bit is a flip-flop that indicates either a set or reset state.
·The five flags are Sign, Zero, Auxiliary carry, Parity, and Carry as shown below

Here X means undefined.

Sign Flag: The sign flag is set to 1 if the most significant bit of the result of an arithmetic or
logic operation is 1. Otherwise, it is reset (0).

Zero Flag: The Zero status flag is set to 1 if the result of an arithmetic or logic operation is
Zero For non-Zero results it is reset to 0. G

Auxiliary carry Flag: This flag is set if there is a carry from the 3rd bit to the 4th bit during BCD
operations (carry from lower nibble to higher nibble). This flag is not accessible to the user.

Parity Flag: Parity is defined by the number of 1s present in a binary number stored in A
register. After any arithmetic or logical operation, if the result has an even number of 1s it is
called even parity and the Parity Flag is set to 1. Otherwise. i.e. If there is an odd number of
1s in the result, it is called Odd Parity and the Parity flag is set to 0.

Carry Flag: It occupies the zeroth bit of the flag register. If the arithmetic operation results in
a carry (if the result is more than 8 bit), then Carry Flag is set; otherwise, it is reset.

IR (Instruction Register): is a special purpose register, which is used to receive the 8-bit
opcode portion of an instruction. It is not accessible to the programmer. What it means is
that there are no instructions by which the programmer can load it with values of his choice.
Stack Pointer: The stack pointer is used to keep track of the address of the current top of the
stack in the memory. It is a 16-bit register.

Program Counter: The program counter is a 16-bit register that holds the address of the next
instruction to be executed.

While registers are not directly involved in the loading process, they play a crucial role in
program execution. During execution, the CPU uses registers to store operands, intermediate
results, and memory addresses. The program counter keeps track of the memory address of
the next instruction to be executed.

Stack Pointer: The stack pointer in the 8085 microprocessor is a 16-bit register that stores
the address of the top of stack memory. The value of the stack pointer is decremented by 2
in the PUSH operation. It will increment by 2 in POP operation.

Program Counter: The program counter stores the address of the next instruction to be
fetched. Thus it is used as a pointer to the instruction.

Solution 2. The Flag register is a special type of register or we can also say that they are
Special Purpose Register. Based upon the value of the result after any type of arithmetic and
logical operation, the value of flag bits becomes either set (1) or reset (0). In the 8085
microprocessor, the flag register consists of 8 bits, and from these 8 bits, only 5 of them are
useful.
Different Types of Flag Registers of 8085 Microprocessor
The following are the 5 types of flag registers in the 8085 Microprocessor. They are:
1. Sign Flag
Represented by the symbol S. After any type of arithmetic operation or logical operation if
the value of D7 becomes 1 it shows that the number is negative and the sign flag is now set,
if the value of D7 becomes 0, it shows that the number is positive and the sign flag is now
reset.
Example:
MVI A 40 (load the value in register A)
MVI B 30 (load the value 30H in register B)
SUB B (A = A – B)
This set of instructions will reset the sign flag to 0 as 40 – 30 is always a positive number.
2. Zero Flag (Z)
After any type of arithmetical or logical operation if the output becomes 0 (00)H, then zero
flag is said to be set with value 1, if not it becomes reset with the value 0.
Example:
MVI A 40 (load the value of40H in register A)
SUB A
This set of instructions will set the zero flag to the value 1 as 40H – 40H always gives the
result as 00H.
3. Auxiliary Cary Flag (AC)
This type of flag is used in the BCD number system (0-9). If after any type of arithmetic or
logical operation, D3 generates any carry and passes on to D4 this flag becomes set with
value 1, otherwise, it will become reset with value 0. This is the only flag register that is not
used or accessed by the programmer.
Example:
MOV A 2C (load the value 2CH in register A)
MOV B 38 (load the value 38H in register B)
ADD B (A = A + B)
This set of instructions will set the auxiliary carry flag and set the value to 1, as on adding 2C
and 38, the addition of these lower orders will generate a carry.
4. Parity Flag (P)
After any type of arithmetic or logical operation, if the result is even parity, which means it
has an even number of 1 bit, the parity register becomes set with value 1, otherwise, it
becomes reset with value 0.
Example:
MVI A 06 (load 06H value in register A)
This instruction will set the value of the parity flag to 1 as the BCD code of 06H is 00000110,
which contains an even number of ones here the no of 1s is 2.
5. Carry Flag (CY)
Carry is generated only when performing n-bit operations if it will lead to a result that has
more than n bits, then this flag becomes set with value 1, otherwise, it becomes reset with
value 0.
Example:
MVI A 40 (load 40H value in register A)
MVI B 60 (load 60H value in register B)
SUB B (A = A – B)
This set of instructions will set the carry flag with value 1 as 40 – 60 generates an answer
with borrow.

Advantages:
Efficient error detection: The flag register can be used to efficiently detect errors and other
conditions during program execution. For example, the carry flag can be used to detect
overflow or underflow during arithmetic operations.
Simplifies branching: The flags can be used to make decisions about branching and other
control flow operations.
Saves memory: The flag register can help reduce the amount of memory required for storing
status information.
Faster execution: By using flags instead of performing additional operations to check
conditions, the 8085 microprocessor can execute programs more quickly.

Solution 3.
Timing and Control Unit:
This unit of the microprocessor issues necessary timing and control signals for the execution
of instructions.
It generates three types of signals namely status, control, and timing signals required for the
operation of memory and I/O devices.
This unit with the help of these signals controls the entire operation of the microprocessor
and the peripherals.
The signals associated with this unit are two control signals. and three status signals IO/, S1,
and S0 to identify the nature of the operation and one special signal ALE which indicates the
start of the operation.
These signals are explained below in detail.

-Read (active low):

his is a Read control signal.
This signal indicates that the selected I/O or memory device is to be read and data are
available on the data bus.

- Write (active low): This is a Write control signal.

CONTROL SIGNALS: These signals are used to identify the nature of the operation. There are
3 control signals and 3 status signals.
Three control signals are RD, WR & ALE.
RD − This signal indicates that the selected IO or memory device is to be read and is ready to
accept data available on the data bus.
WR − This signal indicates that the data on the data bus is to be written into a selected
memory or IO location.
ALE − It is a positive going pulse generated when a new operation is started by the
microprocessor. When the pulse goes high, it indicates the address. When the pulse goes
down it indicates data.
READY – It senses whether a peripheral is ready to transfer data or not. If READY is high(1)
the peripheral is ready. If it is low (0) the microprocessor waits till it goes high. It is useful for
interfacing with low-speed devices.

Status Signals:
IO/M’ – It is a status signal which determines whether the address is for input-output or
memory. When it is high (1) the address on the address bus is for input-output devices.
When it is low (0) the address on the address bus is for the memory.
SO, S1 – These are status signals. They distinguish the various types of operations such as
halt, reading, instruction fetching, or writing.

DMA Signals:
HOLD – It indicates that another device is requesting the use of the address and data bus.
Having received the HOLD request the microprocessor relinquishes the use of the buses as
soon as the current machine cycle is completed. Internal processing may continue. After the
removal of the HOLD signal, the processor regains the bus.
HLDA – It is a signal that indicates that the hold request has been received after the removal
of a HOLD request, the HLDA goes low.

RESET Signals:
RESET IN’ – When the signal on this pin is low(0), the program counter is set to zero, the
buses are tri-stated and the microprocessor unit is reset.

RESET OUT – This signal indicates that the MPU is being reset. The signal can be used to
reset other devices.
Solution 4.

In the case of the 8085 microprocessor, multiplexing is achieved by time-sharing the address
and data buses. The same set of lines is used for both address and data, and these lines are
time-multiplexed. During different phases of the machine cycle, these lines serve different
purposes.

The 8085 microprocessor uses a technique called "Tri-state Buffer" to achieve multiplexing.
In this technique, the lines are in one of three states: logic high, logic low, or high impedance
(tri-state). The high impedance state effectively disconnects a device from the bus, allowing
multiple devices to share the same set of lines without interfering with each other.

Here's a simplified description of how address and data multiplexing works in the 8085
microprocessor:

1. Address Multiplexing:
- During the address phase of the machine cycle, the address is placed on the multiplexed
address/data bus.
- The address lines are active, and the data lines are in a high-impedance state.

2. Data Multiplexing:
- During the data phase of the machine cycle, the data is placed on the multiplexed
address/data bus.
- The data lines are active, and the address lines are in a high-impedance state.

This multiplexing technique helps in reducing the number of pins required for the buses,
making the microprocessor more feasible for a wide range of applications.

Multiplexing is done to reduce the number of pins of 8085. The lower byte of the address
(A0 – A7) is available from AD0 – AD7 (pins 12 to 19) during T1 of the machine cycle. But the
lower byte of address (A0 – A7), along with the upper byte A8 – A15 (pins 21 to 28) must be
available during T2 and the rest of the machine cycle to access memory location or I/O
ports. Now ALE signal goes high at the beginning of T1 of each machine cycle goes low at the
end of T1 and remains low during the rest of the machine cycle. This high-to-low transition
of ALE signal at the end of T1 is used to latch the lower order address byte (A0 – A7) by the
latch IC 74LS373 so that the lower byte A0 – A7 continues to be available till the end of the
machine cycle. The situation is explained in the following figure:
1. Address Buffer:
- In a microprocessor system, the address bus is used to specify the memory location or I/O
port being accessed. An address buffer, in a general sense, could refer to a set of electronic
components or circuitry that helps manage and stabilize the signals on the address bus.
- Buffers are often used to isolate the microprocessor from the external circuitry connected
to the address bus. This isolation helps prevent loading effects, signal degradation, and
interference.

2. Data Buffer or Data Address Buffer:

- In the context of microprocessors, there are buffers associated with the data bus. These
buffers help in isolating and stabilizing the signals on the data bus during read and write
operations.
- A data buffer can be a generic term for a circuit that handles the data lines. It may not be
specifically termed a "data address buffer."

In summary, while "address buffer" and "data address buffer" may not be standard terms,
addressing and data buffers play a crucial role in ensuring the proper functioning and
reliability of a microprocessor system by managing the signals on the address and data
buses.

Solution 6. Types of Buses and their Functions:

Address Bus:
An address bus is a group of 16 lines generally called A0 – A15 to carry a 16-bit address of
memory location.
In a computer system, each peripheral or memory location is identified by a Hexadecimal
number called an address. It represents 0000 H to FFFF H . H means hexadecimal no. This is
similar to the postal address of a house.
The address bus is unidirectional, which means bit flow in only one direction from MPU to
the peripheral.
MPU carries 16-bit address i.e. 216 = 65,536 or 64K memory locations.
Data Bus:
A data bus is a group of eight bidirectional lines used for data flow in both the directions
between MPH and peripheral devices. The 8 data lines are manipulating 8-bit data ranging
from 00 to FF i.e. (28 = 256) numbers from 0000 0000 -1111 1111. This 8-bit data is called
word length and the register size of a microprocessor and MPH is called an 8-bit
microprocessor.
Control Bus:
The control bus is having various single lines used for sending control signals in the form of
the pulse to the memory and I/O devices. The MPU generates specific control signals to
perform a particular operation. Some of these control signals are memory read, memory
write, I/O read and I/O write.
Solution 7.

The addressing modes in 8085 microprocessors are instructions used to transfer data and
perform operations on them.
An 8085 microprocessor uses five addressing modes: Immediate addressing mode,
Register addressing mode, Register indirect addressing mode, Direct addressing mode, and
Implicit addressing mode.

Immediate Addressing Mode –

In immediate addressing mode the source operand is always data. If the data is 8-bit, then
the instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be of 3
bytes.
Examples:
MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)

Register Addressing Mode –

In register addressing mode, the data to be operated is available inside the register(s) and
register(s) is(are) operands. Therefore the operation is performed within various registers of
the microprocessor.
Examples:
MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)

Direct Addressing Mode –

In direct addressing mode, the data to be operated is available inside a memory location and
that memory location is directly specified as an operand. The operand is directly available in
the instruction itself.
Examples:
LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 35)

Register Indirect Addressing Mode –

In register indirect addressing mode, the data to be operated is available inside a memory
location and that memory location is indirectly specified by a register pair.
Examples:
MOV A, M (move the contents of the memory location pointed by the H-L pair to the
accumulator)
LDAX B (move contents of B-C register to the accumulator)
STAX B (store accumulator contents in memory pointed by register pair B-C)

Implied/Implicit Addressing Mode –

In implied/implicit addressing mode the operand is hidden and the data to be operated is
available in the instruction itself.
Examples:
CMA (finds and stores the 1’s complement of the contents of accumulator A in A)
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)

Relative Addressing Mode-

In this mode, the operand is a memory location specified by the contents of the
program counter plus a constant value.
example:
MOV R0,#05H
AGAIN:
MVI A,#55H
ADD A,R0
JMP AGAIN

Solution 8.

Ans: https://www.elprocus.com/instruction-set-of-8085-microprocessor/

Solution 9.
In the context of 8085 microprocessor programming, both counters and time delays are
related to controlling the timing of operations, but they serve different purposes.

1. Counter:
- A counter is a register or a set of registers that keeps track of the number of events or
operations.
- In the 8085 microprocessor, the most commonly used counter is the program counter
(PC), which keeps track of the memory address of the next instruction to be executed.
- The program counter is automatically incremented after each instruction is fetched,
allowing the processor to proceed to the next instruction in sequence.
- Counters in a more general sense can be used for various purposes, such as loop control,
event counting, and more.

2. Time Delay:
- Time delays involve introducing a delay in the execution of instructions to control the
timing of a program or interface with external devices.
- The 8085 microprocessor doesn't have a built-in hardware-based time delay feature.
Instead, time delays are typically achieved using software loops or specific instructions that
take a certain amount of time to execute.
- For example, a NOP (No Operation) instruction can be used in a loop to introduce a delay
by consuming clock cycles without performing any useful operation.
- External devices may also be used in conjunction with the microprocessor to generate
specific time delays.

Using Timer/Counter Registers Generation delay:

If the microprocessor has built-in timer/counter registers, you can use them to generate
precise delays.
Configure the timer with a specific value and let it count down. When it reaches zero, an
interrupt can be triggered, or you can check its status to determine when the delay is
complete.

Time Delay (in seconds)= Number of machine cycles×Duration of one machine cycle / Clock
frequency

T-state:
One complete cycle of clock is called as T-state as shown in the above figure. The time
intervals T1 orT2 are examples of T-state.
A T-state is measured from the falling edge of one clock pulse to the falling edge of the next
clock pulse.
Various versions of 8086 have maximum clock frequency from 5MHz to 10MHz. Hence the
minimum time for one T-state is between 100 to 200 n sec.

Uses of Time Delays:

Device Interface Timing:
When interfacing the 8085 with external devices, precise timing is often required. Time
delays are used to ensure that signals are synchronized correctly.
Debouncing Switches:
Time delays are useful for debouncing switches or buttons to eliminate noise or bouncing
effects when a button is pressed or released.
In the context of the 8085 microprocessor, counters and time delays serve different
purposes and find various applications in programming and interfacing. Here are some
common uses for counters and time delays in 8085-based systems:

Uses of Counters:
Program Control:
The program counter (PC) in the 8085 is a type of counter that keeps track of the memory
address of the next instruction to be executed.
It is essential for controlling the flow of a program, ensuring that instructions are executed
in the correct sequence.
Looping:
Counters can be used to implement loops in software. By initializing a counter with a
specific value and decrementing it within a loop, you can repeat a sequence of instructions a
predetermined number of times.

Solution 10.
Subroutine in 8085 Microprocessor:
A Subroutine in 8085 Microprocessor is a function and is used to reduce the size of the
program. Instead of writing the same code, again and again, we make the code a function
and this reduces the size of the program. Only one copy of the code is stored in the memory.
Whenever the code is required we can write a subroutine instruction that will call the
subroutine. A subroutine can exist anywhere in the code.
There are two instructions in 8085 that deal with subroutines:
The CALL instruction in 8085 Microprocessor is used for redirecting the program execution
to the subroutine.
The RET instruction in the 8085 Microprocessor is used for returning the execution to the
calling routine.

The CALL function:

The Microprocessor reads the subroutine address from the following two memory locations
and stores the higher order of 8 bits of the address in the W register and stores the lower
order of 8 bits of address in the Z register.
The addresses of the instruction immediately following the call are pushed onto the stack.
Loads the program counter with the 16-bit address supplied with the call instruction from
WZ registers.

The RET function:

It retrieves the return address from the top of the stack.
Loads the program counter with the return address.

How do we pass the data to the Subroutine in the 8085 Microprocessor?

Data in the subroutine can be passed through two ways- call by value and call by reference.

Call by reference Subroutine in 8085 Microprocessor:

The subroutine uses the value from the register, the data is stored in one of the registers by
the calling program. The register value gets modified within the subroutine. Then these
modifications can be transferred back to the calling program upon returning from the
subroutine.
Call by value Subroutine in 8085 Microprocessor:
The subroutine first pushes register values in the stack and after using the registers, the
subroutine pops the previous values of the registers from the stack while exiting the
subroutine. The data is stored in one of the registers. That is the original values are restored
before execution returns to the calling program.

Solution 11.
Timing Diagram is a graphical representation. The timing diagram of 8085 instructions
represents the execution time taken by each instruction in a graphical format. The execution
time is represented in T-states.
Machine Cycle, T State, and Instruction Cycle
T-State:
• The processor takes a definite time to execute the machine cycles. The time
taken by the processor to execute a machine cycle is expressed in T-states.
• A portion of an operation carried out in one system clock period is called as T-
state.
• One T-state is equal to the period of the internal clock signal of the processor.
The T-state starts at the falling edge of a clock
Machine Cycles Of 8085 Microprocessor
The time required to access the memory or input/output devices is called the machine
cycle.
Machine cycles of 8085:
The 8085 microprocessor has 5 basic machine cycles. They are
1. Opcode fetch cycle (4T)
2. Memory read cycle (3 T)
3. Memory write cycle (3 T)
4. I/O read cycle (3 T)
5. I/O write cycle (3 T)
Each instruction of the 8085 processor consists of one to five machine cycles, i.e., when the
8085 processor executes an instruction, it will execute some of the machine cycles in a
specific order.
Opcode Fetch Machine Cycle Of 8085
• Each instruction of the processor has a one-byte opcode.
• The opcodes are stored in memory. So, the processor executes the opcode
fetch machine cycle to fetch the opcode from memory.
• Hence, every instruction starts with the opcode fetch machine cycle.
• The time taken by the processor to execute the opcode fetch cycle is 4T.
• At this time, the first, 3 T-states are used for fetching the opcode from
memory and the remaining T-states are used for internal operations by the
processor.
Memory Read Machine Cycle Of 8085
• The memory read machine cycle is executed by the processor to read a data
byte from memory. The processor takes 3T states to execute this cycle.
• The instructions which have more than one byte word size will use the
machine cycle after the opcode fetch machine cycle.

Memory Write Machine Cycle Of 8085

• The memory write machine cycle is executed by the processor to write a data
byte in memory. The processor takes 3T states to execute this cycle.
• The instructions which have more than one byte word size will use the
machine cycle after the opcode fetch machine cycle.
Solution 12.
8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit microprocessor
designed by Intel in 1977 using NMOS technology.

It has the following configuration −

8-bit data bus
16-bit address bus, which can address up to 64KB
A 16-bit program counter
A 16-bit stack pointer
Six 8-bit registers arranged in pairs: BC, DE, HL
Requires +5V supply to operate at 3.2 MHZ single-phase clock

It is used in washing machines, microwave ovens, mobile phones, etc.

8085 Microprocessor – Functional Units

8085 consists of the following functional units –

Accumulator
It is an 8-bit register used to perform arithmetic, logical, I/O & and LOAD/STORE operations.
It is connected to the internal data bus & ALU.

Arithmetic and logic unit

As the name suggests, it performs arithmetic and logical operations like Addition,
Subtraction, AND, OR, etc. on 8-bit data.

General purpose register

There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each register
can hold 8-bit data.
These registers can work in pair to hold 16-bit data and their pairing combination is like B-C,
D-E & H-L.

Program counter
It is a 16-bit register used to store the memory address location of the next instruction to be
executed. Microprocessor increments the program whenever an instruction is being
executed, so that the program counter points to the memory address of the next instruction
that is going to be executed.

Stack pointer
It is also a 16-bit register works like stack, which is always incremented/decremented by 2
during push & pop operations.

Temporary register
It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.

Flag register
It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon the
result stored in the accumulator.
These are the set of 5 flip-flops −
Sign (S)
Zero (Z)
Auxiliary Carry (AC)
Parity (P)
Carry (C)
Its bit position is shown in the following table −
D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY
Instruction register and decoder:
It is an 8-bit register. When an instruction is fetched from memory then it is stored in the
Instruction register. The instruction decoder decodes the information present in the
Instruction register.
Timing and control unit:
It provides timing and control signals to the microprocessor to perform operations.
Following are the timing and control signals, which control external and internal circuits −
Control Signals: READY, RD’, WR’, ALE
Status Signals: S0, S1, IO/M’
DMA Signals: HOLD, HLDA
RESET Signals: RESET IN, RESET OUT

Interrupt control
As the name suggests it controls the interrupts during a process. When a microprocessor is
executing a main program and whenever an interrupt occurs, the microprocessor shifts the
control from the main program to process the incoming request. After the request is
completed, the control goes back to the main program.
There are 5 interrupt signals in the 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5,
TRAP.

Serial Input/output control

It controls the serial data communication by using these two instructions: SID (Serial input
data) and SOD (Serial output data).

Address buffer and address-data buffer

The content stored in the stack pointer and program counter is loaded into the address
buffer and address-data buffer to communicate with the CPU. The memory and I/O chips are
connected to these buses; the CPU can exchange the desired data with the memory and I/O
chips.

Address bus and data bus

Data bus carries the data to be stored. It is bidirectional, whereas address bus carries the
location to where it should be stored and it is unidirectional. It is used to transfer the data &
Address I/O devices.
8085 Architecture
We have tried to depict the architecture of 8085 with this following image –
Von Neumann Architecture:

Von Neumann Architecture is a digital computer architecture whose design is based on the
concept of stored program computers where program data and instruction data are stored in
the same memory. This architecture was designed by the famous mathematician and
physicist John Von Neumann in 1945.

Harvard Architecture:

Harvard Architecture is the digital computer architecture whose design is based on the
concept that there are separate storage and separate buses (signal paths) for instruction and
data. It was developed to overcome the bottleneck of Von Neumann Architecture.

Difference between Von Neumann and Harvard Architecture:

VON NEUMANN HARVARD
ARCHITECTURE ARCHITECTURE

It is an ancient computer architecture

It is modern computer architecture based
based on stored program computer
on Harvard Mark I relay based model.
concept.

The same physical memory address is A separate physical memory address is

used for instructions and data. used for instructions and data.

There is common bus for data and Separate buses are used for transferring
instruction transfer. data and instruction.

Two clock cycles are required to execute An instruction is executed in a single

single instruction. cycle.

It is costly than Von Neumann

It is cheaper in cost.
Architecture.

CPU can not access instructions and CPU can access instructions and
read/write at the same time. read/write at the same time.

It is used in personal computers and It is used in micro controllers and signal

small computers. processing.
Reduced Instruction Set Architecture (RISC):
The main idea behind this is to simplify hardware by using an instruction set composed of a
few basic steps for loading, evaluating, and storing operations just like a load command will
load data, a store command will store the data.

Advantages of RISC:
Faster execution: Because RISC processors have a simpler instruction set, they can execute
instructions faster than CISC processors.
Lower power consumption: RISC processors consume less power than CISC processors,
making them ideal for portable devices.

Disadvantages of RISC:
More instructions required: RISC processors require more instructions to perform complex
tasks than CISC processors.
Higher cost: Developing and manufacturing RISC processors can be more expensive than
CISC processors.

Complex Instruction Set Architecture (CISC):

The main idea is that a single instruction will do all loading, evaluating, and storing
operations just like a multiplication command will do stuff like loading data, evaluating, and
storing it, hence it’s complex.

Advantages of CISC:
More memory efficient: Because CISC instructions are more complex, they require fewer
instructions to perform complex tasks, which can result in more memory-efficient code.
Widely used: CISC processors have been in use longer than RISC processors, so they have a
larger user base and more available software.

Disadvantages of CISC:
Slower execution: CISC processors take longer to execute instructions because they have
more complex instructions and need more time to decode them.
Higher power consumption: CISC processors consume more power than RISC processors
because of their complex instruction sets.

Solution 13.

The use of each functional block inside this controller has already been explained in the
previous post. Now let us look into the detailed explanation about each section inside the
PIC 16F877.
Memory Organization of PIC16F877

1. Program memory:
Program memory contains the programs that are written by the user. The program counter
(PC) executes these stored commands one by one. Usually, PIC16F877 devices have a 13-bit
wide program counter that is capable of addressing 8K×14 bit program memory space. This
memory is primarily used for storing the programs that are written (burned) to be used by
the PIC. These devices also have 8K*14 bits of flash memory that can be electrically erasable
/reprogrammed. Each time we write a new program for the controller, we must delete the
old one at that time. The figure below shows the program memory map and stack.

2. PIC16F87XA Data Memory Organization:

The data memory of PIC16F877 is separated into multiple banks which contain the general
purpose registers (GPR) and special function registers (SPR). According to the type of
microcontroller, these banks may vary. The PIC16F877 chip only has four banks (BANK 0,
BANK 1, BANK 2, and BANK 4). Each bank holds 128 bytes of addressable memory.

3. Stack:
PIC has an 8-level deep 13-bit wide hardware stack and is not part of any program or data
memory. SP in the PIC controller is neither writable nor readable. The operation of the stack
is as follows:
During a CALL instruction or branch due to INTERRUPT, the PC is automatically pushed onto
the stack and it is POP in the event of execution of RETURN RETLW or RETTIE induction On 8
subsequent PUSHED the SP rolls back and overwrites the PUSH data and thus the stack acts
as a circular buffer, There is no separate POP or PUSH instruction in PIC for stack operation.

Solution 14.

The PIC16F877A is a popular 8-bit microcontroller from Microchip Technology. It belongs to

the PIC (Peripheral Interface Controller) family and is widely used in embedded systems and
various electronic applications. The PIC16F877A features a set of registers that are integral
to its operation. Here's an overview of some of the key registers in the PIC16F877A:

 Working Register: The Working Register is used by many instructions as the source of an
operand. It also serves as the destination for the result of instruction execution and it is
similar to accumulator in other controllers and processors. It is an 8-bit register.

 Status Register: It contains the arithmetic status of the ALU, the RESET status and the
bank select bits for the data memory.

 FSR – (File Select Register): It is the pointer used for indirect addressing. In the indirect
addressing mode, the 8-bit register file address is first written into FSR. It is a special-
purpose register that serves as an address pointer to any address through out the entire
register file.

 INDF – (Indirect File): It is not a physical register. Addressing this INDF will cause indirect
addressing. Any instruction using the INDF register access the register pointed to by the FSR.
Solution 15.

The Timer module is an integral part of any microcontroller family. Most of the modern
controllers today have at least one timer module built into them. These timer modules,
depending on the range of the microcontroller (baseline, mid-range, advanced) have various
features such as, prescaler postscaler, auto-reload, ability to work as a counter and so on.
Any application small or big has its need for a timer. So as embedded engineers, it is a must
to have a working knowledge of how they work and behave.

A Timer / Counter module may derive its clock source from the system clock and perform
counting operations based on this clock pulse. In this case, it is said to work as a timer and
perform time measurement operations. Since the system clock frequency is determined by
the user and it is often quite stable, the programmer can achieve accurate time intervals by
suitably configuring the timer module.

Understanding the concept of prescaler and postscaler:

The prescaler and postscaler are fairly common in most of the mid-range and advanced
microcontrollers. They are provided as added feature and may or may not be used by the
programmer. In a way they are one and the same. They both are used to control the
overflow rate of the module.

The value in the prescaler register defines the number of times the clock has to tick before
the timer register experiences a single pulse. This can be visualized from the above image.
The scaling ratio 1:2 means that the clock has to have a LOW to HIGH transition twice so
that the output of the prescaler completes one HIGH pulse. This is one way of reducing the
clock frequency. Hence by using this method, the timer register is essentially multiplied by
‘N’, where N is the value of the prescaler.
The postscaler concept is much similar to the prescaler. Only here, the value of the prescaler
determines the number of times the timer register has to overflow to produce an interrupt.
Therefore by using the postscaler the timer register value is multiplied by ‘M’, where M is
the value of the postscaler.

Solution 16.

The Capture, Compare, and PWM (CCP) modules are built-in modules in the PIC
microcontrollers. These modules are designed for modulation, waveform generation, and
time delay applications. They contain a 16-bit register that can operate as:

Capture Mode:
If a register constantly changes its value, this mode provides access to the current state of
that register. In this case, it is the timer TMR1 register.

Compare Mode:
This mode constantly compares the values of two registers. One of those registers is the
timer TMR1 register. When a predetermined amount of time expires, this circuit also allows
the user to trigger an external event.

PWM (Pulse Width Modulation):

This mode can generate signals of varying frequency and duty cycle on one or more output
pins.

CCP1 CAPTURE MODE:

In this mode, the CCPR1 register (CCPR1H and CCPR1L) copies the timer register TMR1,
which consists of TMR1H and TMR1L. The transfer of 16-bit data is determined by the
combination of the four bits (CCP1M3-CCP1M0) of the control register, indicating which
events will cause the transfer.

CCP1 COMPARE MODE:

In this mode, the microcontroller constantly compares the value stored in the 16-bit CCPR1
register with the value stored in the TMR1 or TMR3 register. If the value in the CCPR1
register matches the Timer value, it can change the logic state of the RC2/CCP1 output pin
and generate the CCPIF (Interrupt Flag). The specific logic state depends on the configuration
of bits in the control register (CCP1M3 – CCP1M0).

Solution 17.

In PIC micro controller, it having mainly five addressing modes. Those are
• 1. Immediate addressing mode
• 2. Register operand addressing mode
• 3. Memory operand addressing mode
• 4. Direct addressing
• 5. Indirect addressing.
Now it’s time to discuss every thing briefly.
Immediate addressing mode:
In this addressing mode, the operand is a number or constant not an address as MOVLW 43h,
the operand here is data not address. So in this addressing mode of pic microcontroller data
is directly transfer. And data is immediate after the opcode. That is why this type of addressing
is called immediate addressing. This way is fast in execution.

Register operand addressing mode:

In this addressing mode, the operand is a Register which holds the data to be execute. Register
operand addressing mode deals with the registers like: CLR W

Memory operand addressing mode :

In this addressing mode, the operand is an address of Memory location which holds the data
to be execute. Again memory operand addressing mode is under two category
1) Direct addressing like CLRF 13h. We deal with the address or the memory location.
2) Indirect addressing. we use in it INDF and FSR registers.

Direct addressing:
Direct Addressing is done through a 9-bit address. This address is obtained by connecting 7th
bit of direct address. By using an instruction with two bits (RP1, RP0) from STATUS register.
Any access to SFR registers can be an example of direct addressing.

Indirect addressing:
It does not take an address from an instruction. But it derives from IRP bit of STATUS and FSR
registers. Addressed location is accessed through INDF register. And INDF register in fact holds
the address indicated by the FSR. Indirect addressing is very convenient for manipulating data
arrays located in GPR registers. In this case, it is necessary to initialise FSR register with a
starting address of the array, and the rest of the data can be accessed by increment the FSR
register. Figure shows the indirect addressing concept.
Solution 18.
Interrupts in PIC Microcontroller:

Interrupts are special events that when taken place, need to be handled right away. In case
of a CPU which is deeply ordered, this was applied to allow emergency external events to
get the attention of the CPU, emergencies like power failure, the system overheating or
major failure of a subsystem in earlier days. But the concept of interrupts was recognised as
very powerful, and as time went on, more and more subsystems gained the power to
generate interrupts. This forced increasing complexity in interrupt structures and a need to
recognise that not all interrupts were equal.

INTCON Register in PIC:

INTCON Register in PIC Microcontroller

GIE: Global Interrupt Enable bit

1-Enables all unmasked interrupts
0-Disables all interrupts
PIE: Peripheral Interrupt Enable bit
1-Enables all unmasked peripheral interrupts
0-Disables all peripheral interrupts
TMR0IE: TMR0 Overflow Interrupt Enable bit
1-Enables the TMR0 interrupt
0-Disables the TMR0 interrupt
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
TMR0IF: TMR0 Overflow Interrupt Flag bit
1-TMR0 register has overflowed (must be cleared in software)
0-TMR0 register did not overflow
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = At least one of the RB7:RB4 pins changed state; a mismatch condition will continue to set the bit.
Reading PORTB will end the mismatch condition and allow the bit to be cleared (must be cleared in
software).
0 = None of the RB7:RB4 pins have changed state
OPTION Register in PIC:

The OPTION_REG Register is a readable and writable register, which contains various control
bits to configure the TMR0 Prescaler/WDT Postscaler (single assignable register known also
as the Prescaler), the external INT interrupt, TMR0, and the weak pull-ups on PORTB.

OPTION Register in PIC Microcontroller

RBPU: PORTB Pull-up Enable bit (This bit is not used for timers)
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG Interrupt Edge Select bit
1 = Interrupt on the rising edge of RB0/INT pin
0 = Interrupt on the falling edge of RB0/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKO)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits

Interrupt Order: When an interrupt occurs, the program stops executing and the value of
the program counter is put on stack after which it moves to interrupt service vector. At the
time of interrupt trigger, the flag associated with that interrupt gets saved and the GIE bit is
cleared. The core registers like W, STATUS, PCLATH etc., are saved in temporary registers
which allow everything to be restored when we return from the interrupt using RETFIE.

Solution 19.

PIC16F877A ADC Module

The Analog-to-Digital (A/D) Converter module has eight of the 40/44-pin devices.The
conversion of an analog input signal results in a corresponding 10-bit digital number. The
A/D module has a high and low-voltage reference input that is software selectable to some
combination of VDD, VSS, RA2, or RA3.
The A/D converter has the unique feature of being able to operate while the device is in
Sleep mode. To operate in Sleep, the A/D clock must be derived from the A/D’s internal RC
oscillator. Registers used for ADC

A/D Control Register 0 (ADCON0)

A/D Control Register 1 (ADCON1)

A/D Result High Register (ADRESH)

A/D Result Low Register (ADRESL)

A/D Control Register 0 (ADCON0)

The ADCON0 register, shown in the below image, controls the operation of the A/D module
i.e. Used to Turn ON the ADC, Select the Sampling Freq, and Start the conversion. ADCS1-
ADCS0: A/D Conversion Clock Select bits. These bits are based on ADCON1 Reister’s ADCS2
bit. CHS2-CHS0: Analog Channel Select bits. GO/DONE: A/D Conversion Status bit. ADON:
A/D On bit. A/D Control Register 1 (ADCON1)

The ADCON1 register, shown below, configures the functions of the port pins, i.e. used to
configure the GPIO pins for ADC. The port pins can be configured as analog inputs (RA3 can
also be the voltage reference) or as digital I/O. ADFM: A/D Result Format Select bit. PCFG3-
PCFG0: A/D Port Configuration Control bits.

A/D Result High Register (ADRESH) & A/D Result Low Register (ADRESL)

The ADRESH: ADRESL registers contain the 10-bit result of the A/D conversion. When the
A/D conversion is complete, the result is loaded into this A/D Result register pair, the
GO/DONE bit (ADCON0<2>) is cleared and the A/D interrupt flag bit ADIF is set.
Steps to follow:

To do an A/D Conversion, follow these steps:

1. Configure the A/D module:

• Configure analog pins/voltage reference and digital I/O (ADCON1)

• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)

2. Configure A/D interrupt (if desired):

• Clear ADIF bit
• Set ADIE bit
• Set PEIE bit
• Set GIE bit

3. Wait the required acquisition time.

4. Start conversion:
• Set GO/DONE bit (ADCON0)

5. Wait for A/D conversion to complete by either:

• Polling for the GO/DONE bit to be cleared (interrupts disabled); OR
• Waiting for the A/D interrupt

6. Read A/D Result register pair (ADRESH: ADRESL), clear bit ADIF if required.
7. For the next conversion, go to step 1 or step 2 as required.

Solution 20.

In PIC microcontrollers, the term "RESET" typically refers to the reset operation or the
reset feature of the microcontroller. Reset is a mechanism used to bring the
microcontroller to a known and predictable state, often starting the program execution
from the beginning. The reset process clears the program counter, resets the program
memory, and initializes various hardware components to their default states.

• Reset
– Power-on Reset (POR)
– Power-up Timer (PWRT)
– Oscillator Start-up Timer (OST)
– Brown-out Reset (BOR)

In PIC microcontrollers, the reset operation can be triggered by various sources, ensuring
that the microcontroller starts in a known state and allowing for recovery from different
events. Here are the main sources of reset in PIC microcontrollers:
1. Power-on Reset (POR):
- Power-on Reset occurs when the microcontroller is initially powered up. It ensures that
the microcontroller starts its execution in a known and predictable state. POR ensures that
the system initializes properly when power is applied.

2. The Power-up Timer (PWRT) is a feature found in many PIC (Peripheral Interface
Controller) microcontrollers. It is designed to provide a controlled delay during the power-up
sequence to ensure that the internal circuitry stabilizes before the microcontroller starts
executing its program. The purpose of the Power-up Timer is to prevent the microcontroller
from starting its operation immediately upon power application, which could lead to
unpredictable behavior.

3. Brown-out Reset (BOR):

- Brown-out Reset is triggered when the power supply voltage falls below a certain
threshold, which could result in unpredictable behavior of the microcontroller. The BOR
circuit monitors the voltage and triggers a reset if it drops below an acceptable level,
preventing erratic operation in low-power conditions.

4. An oscillator start-up: Timer ensures that the device only operates when the oscillator
generates a stable clock frequency. The PIC M.C oscillator start-up timer holds the device's
reset for a 1024 oscillator-cycle delay to allow the oscillator to stabilize.

Solution 21.

A watchdog timer (WDT) is a timer that monitors microcontroller (MCU) programs to see if
they are out of control or have stopped operating. It acts as a “watchdog” watching over
MCU operations.
A microcontroller (MCU) is a compact processor for controlling electronic devices. Integrated
into a wide variety of electronic devices, MCUs come pre-loaded with program software
whose commands are used to control electronic devices.
This makes safeguarding normal MCU operation essential. Should the MCU program, for
some reason, run out of control or stop running altogether, the electronic device may
behave erratically, which in the worst case could cause damage or an accident.
To proactively prevent such incidents, it falls to the role of the watchdog timer to constantly
watch over the MCU to ensure it is operating normally.
The watchdog timer function can be inside the MCU, but here we are introducing “external”
watchdog timers, the safer kind.
BOR and POR has been defined in 20th Question.
Solution 22.

difference between memory mapped i/o and peripheral mapped i/o

Memory Mapped I/O:

1. Memory-mapped I/O uses a 16-bit address

2. The memory map of 64KB is shared between the I/O device and system memory.
3. Since uses a 16-bit address so it requires more hardware to perform decoding
operations.
4. The key advantage of memory mapped i/o is that arithmetic or logic operations can
be directly performed with I/O data
5. It is used for data transfer between any general-purpose register and I/O port.
6. More complex.

Peripheral MappedI/O:

1. It uses an 8-bit address

2. Unlike the memory mapped i/o, it can connect a total of 256 input devices and 256
output devices.
3. Since it has only an 8-bit address so less hardware is required to decode an 8-bit
address
4. Here data is transferred only between the accumulator and I.O port
5. The major disadvantage of peripheral mapped i/o is that arithmetic or logical
operation cannot be directly performed with I/O data.
6. Complexity is less.

Difference between 8085 and 8086 Microprocessors

The following table highlights the major differences between the 8085 microprocessor and the 8086
microprocessor.

Parameter 8085 Microprocessor 8086 Microprocessor

Definition The 8085 is an accumulator based 8- The 8086 is a register based

bit microprocessor which can 16-bit microprocessor which
process 8-bit of data at a time. can process 16-bit of data at a
time.

Microprocessor The 8085 microprocessor is an 8-bit The 8086 microprocessor is a

type accumulator based microprocessor. 16-bit general purpose
register based microprocessor.
Parameter 8085 Microprocessor 8086 Microprocessor

Data bus size The 8085 microprocessor has a data The size of data bus of 8086
bus of 8-bit size. microprocessor is 16- bit.

Address bus size The size of address bus of 8085 The size of address bus of
microprocessor is 16-bit. 8086 microprocessor is 20-
bit.

Maximum The maximum accessible memory The 8086 microprocessor has

accessible capacity of 8085 microprocessor is maximum accessible memory
Memory capacity 216 bytes or 64 kB. capacity of 220/sup> bytes or 1 MB.

ALU (Arithmetic The 8085 microprocessor has an 8- The 8086 microprocessor has
Logic Unit) size bit ALU. 16-bit ALU.

Number of The 8085 microprocessor consists of The 8086 microprocessor

transistors 6500 transistors in its structure. consists of 29000 transistors.

Operations The 8085 microprocessor can The 8086 microprocessor is

perform addition, subtraction,
increase, decrease, compare, AND,
OR, X-OR, shift and complement. But,
it does not support multiplication
and division.
able to perform all the
operations of 8085
microprocessor and also
multiplication and division.

Number of flags The 8085 microprocessor has 5 flags,
named carry, auxiliary carry, parity,
zero and sign flag.
The 8086 microprocessor has
9 flags, named carry, auxiliary
carry, parity, zero, sign, trap,
interrupt, direction, and
overflow flag.

Memory The 8085 microprocessor does not The 8086 microprocessor

segmentation support memory segmentation. supports memory
segmentation,

Modes of The 8085 microprocessor supports The 8086 microprocessor

operation only a single mode of operation. supports two modes of
operation viz. minimum mode
and maximum mode.

Processor 8085 is a single processor 8086 is a multiprocessor

configuration configuration microprocessor. configuration microprocessor.

Cost 8085 microprocessor is cheaper. 8086 microprocessor is

relatively expensive than 8085
microprocessor.
Difference between Microprocessor and Microcontroller
The following table highlights all the important differences between microprocessors and
microcontrollers −
Parameter Microprocessor Microcontroller

Microprocessors can be Microcontrollers can be understood

Definition understood as the heart of a as the heart of an embedded
computer system. system.

A microprocessor is a processor A microcontroller is a controlling

where the memory and I/O device wherein the memory and
What is it?
component are connected I/O output component are present
externally. internally.

The circuit is complex due to Microcontrollers are present on

Circuit
external connection. chip memory. The circuit is less
complexity
complex.

The memory and I/O The memory and I/O components

Memory and
components are to be connected are available.
I/O components
externally.

Compact system Microprocessors can’t be used in Microcontrollers can be used with a

compatibility compact system. compact system.

Microprocessors are not Microcontrollers are efficient.

Efficiency
efficient.

Microprocessors have a zero Microcontroller doesn’t have a zero

Zero status flag
status flag. status flag.

Number of Microprocessors have less Microcontrollers have more

registers number of registers. number of registers.

Microprocessors are generally Microcontrollers are generally used

Applications used in personal computers. in washing machines, and air
conditioners.

Solution 23.

The instruction sets in PIC is developed by the basis of RISC structure. The instruction sets can
be classified into 5 separate categories (depends on the basis of type of operation). They are

1) DATA TRANSFER GROUP

2) ARITHMETIC AND LOGIC OPERATIONS GROUP
3) BIT OPERATION GROUP INSTRUCTIONS
4) PROGRAM FLOW CONTROL
Data Transfer Group Instructions in PIC:

Data transfer group instructions are one of the major instructions widely used in PIC
programming for data transfer purposes. By using these types of instructions, we can move
or change the value (bits) from one location to another.

Data Transfer Instructions with Syntaxes

1. MOVLW
“MOVLW” instruction is used to write constant in W register (move the value from literal to
W register).

2. MOVWF
MOVWF instruction is used to move the data (bits) from W register to flag register F
(copy/move the value from W register to F register).

3. MOVF
MOVF command is used for copy/move the contents (bits) in the flag register to D register
(Copy f to d register).
D register (destination register) is a special register which can be switchable in its destination
according to its status. If the status of D register is ‘0’, the destination is W register and if the
status is ‘1’, the destination of D register became F register (flag)

4. CLRW
CLRW is a clearing instruction that helps to reset the values of W register to ‘0’ (write ‘0’ in
W register).

5. CLRF f
CLRF f Write ‘0’ in F register that helps to reset the current status to ‘0’

6. SWAPF
SWAPF used for swap (interchanging functions) functions which Swap the nibbles (4bits).
The destination of this function depends on the destination register status.
ARITHMETICAL AND LOGICAL OPERATIONS GROUP
In this article, the basic arithmetic and logic operations that are carried out by a PIC is
explained in detail.
Arithmetic and logic operation group instructions are used for performing all arithmetic
operations and logic operations. By using these types of instructions, the PIC chip can easily
perform all arithmetic and logic operations inside the microcontroller (PIC). The arithmetic
operations are addition (ADD), subtraction (SUB), multiplication (MUL), division (DIV) and
logical operations are AND, OR, NOT, XOR, and so on. The basic Arithmetical and Logical
operations that are performed by a PIC are given below.

1) ADDLW:
“ADDLW” instruction is used for performing addition operations (adding a constant with W
register). By using this instruction, we can add two bits easily and the result value can be
stored in another register or memory location.
2) ADDWF:
“ADDWF” is also used for performing the addition operation. This ADDWF instruction adds
the constant with W register.

3) SUBLW:
“SUBLW” used for performing subtraction function which can be subtracting two values and
can be stored to another memory location. This instruction helps to Subtract W content
from given constant.

4) SUBWF:
SUBWF is used for performing subtraction operation. In SUBLW, this instruction Subtracts W
content from f register.

5) ANDLW:
ANDLW is a logical instruction which used for performing Logic AND. By using this
instruction helps AND the constant with W.

6) IORLW:
This command is used for performing logical OR operation. By using this instruction, it will
perform Logical OR operation with W register.

7) IORWF: Logic OR the W reg. with f

8) XORLW: This command is used for performing logical XOR operation. By using this
command, it will perform logical XOR with Logic constant and W register.

9) XORWF:
This command used to perform Logic XOR the W reg. with f

10) INCF:
INCF command used for performing increment operations.(Increment f registers content)

11) DECF:
DECF command used for performing Decrement f register content

12) RLF:
RLF command is used for performing rotate register content left through Carry

13) RRF:
RRF command used for perform Rotate register content right through Carry
Bit Operation Group

1) BCF

BCF is a resetting command instruction used for performing reset operations for a specified
bit or specified register (simply called bit clearing flag or bit clearing command). Normally BCF
resets the specified bit in f registers content.

2) BSF

BSF is the inversing operation of BCF. This is also a bitwise operation. The BSF instruction will
set the specified bit in the f register (simply called Bit Set Flag or Bit Set command).

Program Flow Control Group in PIC:

1) BTFSC
BTFSC is a special type program flow instruction which control the current program flow.
Normally BTFSC Test the bit in f, skip if it is zero.
2) BTFSS
BTFSS also program flow control instruction. This instruction Test the bit in f, skip if it is one
3) INCFSZ
INCFSZ is a content increment command which Increment f content, skip if it is zero
4) DECFSZ
DECFSZ command Decrement f content, skip if it is zero
5) GOTO
GOTO instruction is used for Jump to specified address locations.
6) CALL
CALL command is used for Call the required sub-program or other values.
7) RETURN
RETURN command is used for Return to main program from any other sub programs
8) RETLW
RETLW is also a return command. By using this command, Return to main program with k in
w reg.

Solution 24.

Memory Interfacing in 8085:

Memory is an integral part of a microprocessor system, and in this section, we will discuss
how to interface a memory device with the microprocessor. The Memory Interfacing in 8085
is used to access memory quite frequently to read instruction codes and data stored in
memory. This read/write operations are monitored by control signals. The microprocessor
activates these signals when it wants to read from and write into memory. In the last section
we have already seen the memory read and memory write machine cycles, and status of the
RD, WR and IO/M status signals for read/write operation.
Memory Structure and its Requirements:

As mentioned earlier, read/write memories consist of an array of registers, in which each

register has unique address. The size of the memory is N x M as shown in Fig. 4.13 (a) where
N is the number of registers and M is the word length, in number of bits.

The memory interfacing requires to:

• Select the chip

• Identify the register
• Enable the appropriate buffer.
Microprocessor system includes memory devices and I/O devices. It is important to note that
microprocessor can communicate (read/write) with only one device at a time, since the data,
address and control buses are common for all the devices. In order to communicate with
memory or I/O devices, it is necessary to decode the address from the microprocessor. Due
to this each device (memory or I/O) can be accessed independently. The following section
describes common address decoding techniques.

Address Decoding Techniques :

• Absolute decoding/Full Decoding

• Linear decoding/Partial Decoding

Absolute decoding:

In absolute decoding technique, all the higher address lines are decoded to select the memory
chip, and the memory chip is selected only for the specified logic levels on these high-order
address lines; no other logic levels can select the chip.This addressing technique is normally
used in large memory systems.

Linear decoding:

In small systems, hardware for the decoding logic can be eliminated by using individual high-
order address lines to select memory chips. This is referred to as linear decodingThis
technique is also called partial decoding. It reduces the cost of decoding circuit, but it has a
drawback of multiple addresses (shadow addresses).
Solution 25.

SHLD instruction is used for multi-precision shifts of 64 bits or more.

The instruction shifts the first operand (destination operand) to the left the number of bits
specified by the third operand (count operand). The second operand (source operand)
provides bits to shift in from the right (starting with bit 0 of the destination operand).

XCHG, which stands for eXCHanGe. This is an instruction to exchange contents of HL register
pair with DE register pair. This instruction uses implied addressing mode. As it is1-Byte
instruction, so It occupies only 1-Byte in the memory. After execution of this instruction, the
content between H and D registers and L and E registers will get swapped respectively.

DAA To support BCD operations, the 8085 provides a DAA (decimal adjust accumulator)
operation that adjusts the result of an addition to correct any overflowing BCD values.

PCHL it loads the program counter with HL data. the content of H placed into higher order
byte and L placed at low order bytes.

In 8085 Instruction set, XTHL is a mnemonic that stands for “eXchange Top of stack with HL”.
This instruction exchanges the contents of the top two locations of the stack with the contents
of register pair HL.

In 8085 Instruction set, SPHL is an instruction with the help of which Stack Pointer will get
initialized with the contents of register pair HL. It is an indirect way of initializing the stack
pointer. But it is not a very common and regularly usable instruction as well.

In 8085 Instruction set, PUSH rp instruction stores contents of register pair rp by pushing it
into two locations above the top of the stack. rp stands for one of the following register pairs.

rp = BC, DE, HL, or PSW

As rp can have any of the four values, there are four opcodes for this type of instruction. It
occupies only 1-Byte in memory.

In 8085 Instruction set, INR is a mnemonic that stands for ‘INcRement’ and ‘R’ stands for any
of the following registers or memory location M pointed by HL pair.

In 8085 Instruction set, DCR is a mnemonic, which stands for ‘DeCRement’ and ‘R’ stands for
any of the following registers, or memory location M pointed by HL pair.
Return Instructions – The return instruction transfers the program sequence from the
subroutine to the calling program. Return instructions are 2 types: Unconditional Jump
Instructions and Conditional Jump Instructions.

(a) Unconditional Return Instruction: The program sequence is transferred unconditionally

from the subroutine to the calling program.

(b) Conditional Return Instruction: The program sequence is transferred unconditionally

from the subroutine to the calling program only is the condition is satisfied.