Assignment # 01 of

DLD
Total Marks: 10
Date of Submission: 7th Lab
Note: You have to follow these steps in the submission of
your assignment.

1- Write CID in the left corner, name in the center, and

SID in the right corner in the header of your
assignment file.
2- Then place all the required output snaps which have
been mentioned in each question.
3- Place the truth table for every question.

Question 1:
Design a 7-bit Parallel Adder Circuit. You have to use all required logic gates for this purpose.
You have to add your last 2 digits of SID with the first 2 digits of SID. Also, show
calculations.

Question 2:
You have to design a circuit for the given equation. Also, satisfy the truth table. (Place ANY 4
output Snaps.)

Equation: X = (A⊕B) + (C.D)’