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I. INTRODUCTION
Because of ever wanted features, the DSP (Digital
Signal Processing) has replaced the analog processing in
most of the modern systems [1]–[3]. A smart digital signal
processing design can lead towards an efficient solution and
vice versa [1]–[3].
Information in digital systems is classified as, data or
control information [4]. Data is known as discrete element
of information that can be altered in order to preform
arithmetic, logic and other data-processing tasks which is
implemented with digital components such as decoders,
adders and counters [5]. While control information provides
Figure 1. Modulo three counters
command signals that supervises the operations held in the
data section to ensure the desired output [4], [5].
There are two distinct modules of all digital processing II. THE FSM PRINCIPLE
system. One is dealing with the performance of data The FSM is typically used as a type of control system
processing by designing the suitable digital circuit. The where knowledge is represented in the states and actions are
other part deals with the design of the operation supervisor, constrained by rules [17]. The general FSM model is shown
the control circuit [5]. on Figure 2.
The control logic uses status conditions from the data Figure 2, illustrates the form and function of a state
processor to serve as decision variables to determine the machine. Usually drawn as a bubble-and-arrow diagram.
sequence of control signals. The control logic provides a State is a uniquely identifiable set of values measured at
sequence of time signals, which is essential for operation various points in a digital system. Where next State is the
initiation in the data processor, and also the determination of state to which the state machine makes the next transition,
the next state of the control subsystem [6]. determined by the inputs present when the device is clocked.
Finite state machine FSM [7]–[9] or also known as Branch explains the change from present state to next state.
finite- state automaton FSA [10], [11]. The word automaton For any given state, there is a finite number of possible next
expresses a machine that functions based on already stored states. On each clock cycle, the state machine branches to
and determined coded instructions, with a wide range of the next state. One of the possible next states becomes the
programmed capabilities based on different circumstances new present state, depending on the inputs present on the
[10], [11]. It simplifies the meaning of FSM to be a clock cycle [7], [17].
mathematical model of computation that is based on a
hypothetical machine that consists of a finite number of
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the inputs present on the triggering edge of clock [17]. The
Mealy machine principle is illustrated with the help of a
diagram, shown on Figure 4 [17]. The Outputs are shown on
transitions since they are determined in the same way as is
the next state.
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The state machine diagram of a Mealy machine based
edge detector is shown on Figure 6. The zero and one states
have similar meaning. When the FSM is in the zero state
and the input changes to high, the output is asserted
immediately. The FSM moves to the one state at the rising
edge of the next clock and the output is de-asserted.
Figure 11. The Mealy machine based edge detector Timing Diagram.
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machine based circuit. Therefore, the Mealy machine based [5] M. M. Mano, Digital design. EBSCO Publishing, Inc., 2002.
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[24]. Therefore, in this case, because of a consistent width [8] Chaudhary, Ankit, et al. "Intelligent approaches to interact with
tick generation, the Moore based edge detectors machines using hand gesture recognition in natural way: a survey."
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IV. CONCLUSION [10] Omlin, Christian W., and C. Lee Giles. "Training second-order
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In recent era, we are becoming more dependent on the Machine Learning. 2014.
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FSMs are discussed. Moore and Mealy machines based FSM ACM SIGSOFT Software Engineering Notes, vol. 27, no. 4, pp. 112–
122, 2002.
design principles are described. An edge detector has been [14] S. J. Baylor, P. F. Corbett, B. G. Fitch, and M. E. Giampapa, “Using
designed based on Moore and Mealy machines for students virtual disks for disk system checkpointing,” May 1997.
concepts building and demonstration. These designs have [15] Aluthwala, Pasindu, et al. "A simple digital architecture for a
been implemented in VHDL. The circuits are successfully harmonic-cancelling sine-wave synthesizer." Circuits and Systems
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[16] E. Börger and R. Stärk, Abstract state machines: a method for high-
component from the Virtex-6 family. The synthesized circuit
level system design and analysis. Springer Science & Business
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machine based circuit technology schematic and the Mealy [17] Jason Brownlee, “http://ai-depot.com/FiniteStateMachines/FSM-
machine based circuit RTL schematics have also been Background.html.”
shown. The designed circuits functionality is also verified [18] Al-Yamani, N., Qaisar, S., Alhazmi, A., Mohammad, S., & Subasi,
with the help of Xilinx-ISim based timing simulations. The A. (2016, December). An event driven surveillance system. In
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