20
1, FEBRUARY 2016
Analytic Approximation of Fault Current
Contribution From AC Networks to MTDC
Networks During Pole-to-Ground Faults
Matthias K. Bucher, Student Member, IEEE, and Christian M. Franck, Senior Member, IEEE
Abstract—HVDC short-circuit calculation standards will be
required to simplify the dimensioning and selection of circuit
breakers (CBs) in future HVDC networks. This paper pro-
poses new analytical formulas for the calculation of the ac-side
contribution through the blocked half-bridge-based converters
during pole-to-ground faults in multiterminal HVDC cable net-
works. Analytic approximations are derived for the steady-state
short-circuit currents and the peak of the transient response for
point-to-point HVDC links and extended to multiterminal HVDC
cable networks with arbitrary grid topology. The results of the
proposed expressions are compared with simulations in PSCAD
and provide accurate calculations for the transient peak and
steady-state values of the ac-side fault current contribution to the
prospective CB current.
Index Terms—HVDC transmission, power system faults, power
system simulation, power system transients, PSCAD.
I. INTRODUCTION
T HE increasing electricity demand and high penetration of
new renewable energy sources at remote locations pose
difficulties to the existing power network and its expansion
will be indispensable. Point-to-point high-voltage dc (HVDC)
transmission has been widely applied for long-distance transmis-
sion and interconnection of asynchronous ac systems. Further
development of this technology to real multiterminal HVDC
networks (MTDC) would, however, provide even more benefits,
including increased system redundancy, higher flexibility for
power trading, and reduced investment and operational costs.
Several initiatives envision the creation of such an MTDC net-
work either as an offshore cable grid [1]–[4] or onshore overhead
line (OHL) system to reinforce the existing ac network [5], [6].
Due to the complexity and size, the development toward such
an MTDC network will be modular and multivendor based,
which requires clear specification and standardization of the net-
work's design and operation [7]. One of the key components is
the HVDC circuit breaker (CB). Point-to-point HVDC connec-
tions can be adequately protected by conventional CBs on the ac
Manuscript received June 26, 2014; revised October 21, 2014; accepted Jan-
uary 26, 2015. Date of publication February 06, 2015; date of current version
January 21, 2016. This work was supported in part by ABB Switzerland Ltd., in
part by Siemens AG, in part by Alstom Grid, and in part by the Swiss Federal
Office of Energy (BfE). Paper no. TPWRD-00771-2014.
The authors are with the Power Systems and High Voltage Laboratories, ETH
Zurich, Zurich 8092, Switzerland (e-mail: bucher@eeh.ee.ethz.ch; franck@eeh.
ee.ethz.ch).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPWRD.2015.2401056
0885-8977 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 31, NO.
side of the converter; a concept, which would not be viable for
a voltage-source converter (VSC)-based MTDC system since it
requires the de-energization of the entire system [8], [9]. HVDC
CBs are needed to selectively isolate a faulty cable section in
the MTDC network by quickly and reliably breaking the fault
current. Several concepts [10]–[12] and even prototypes [13],
[14] have been presented for such a CB for HVDC applications,
which still reveal drawbacks in either onstate losses or breaking
time [15].
To specify and standardize the requirements of such dc CBs
and possible fault clearance support options [16], the maximum
and minimum short-circuit currents, as well as overvoltages,
have to be known.
First, a clear understanding of short-circuit currents in dc
systems and their influencing parameters [17]–[20] is required.
Therefore, the prospective fault current is broken down in its
individual contributions from the fault feeding network compo-
nents, such as dc capacitors, adjacent feeders, and ac networks
[17]. It has been shown that during the first few milliseconds
after fault occurrence, the fault current through the CB is dom-
inated by capacitive contributions, whereas the infeed from the
ac side becomes the main contributor during the following pe-
riod. In steady state, the short-circuit current in an MTDC net-
work is solely fed by the ac networks through the freewheeling
diodes of the converters.
For the capacitive contributions-dominated period, analytic
expressions considering individual surges and the planar skin
effect have been presented in [21]. These formulas are used to
calculate the magnitude of the first peak as well as the ini-
tial as illustrated in Fig. 1, which are key factors for the
dimensioning of an HVDC CB.
This study is continued in this paper at hand and analytic ex-
pressions are also proposed for the requirement specification
of the CB during the ac infeed-dominated second period. Ana-
lytic and numeric calculations are presented for the steady-state
short-circuit current in point-to-point HVDC connections
and MTDC systems as well as the transient peak value of
the ac infeed.
Calculation rules for transient and steady-state short-circuit
currents from the adjacent ac network through the freewheeling
diodes of the blocked half-bridge converter in dc traction sys-
tems can be found in [22]–[24]. These publications consider,
however, only single terminal systems and the proposed for-
mulas cannot be applied to meshed MTDC networks.
The IEC 61660 standard for medium-voltage (MV) dc sys-
tems [25] provides formulas for the calculation of the fault cur-
BUCHER AND FRANCK: ANALYTIC APPROXIMATION OF FAULT CURRENT CONTRIBUTION
Fig. 1. Breakdown of the total CB current (solid curve) into contributions from
the ac side (dashed curve) and dc capacitor (dotted curve).
Fig. 2. Single-line diagram of the single-terminal ac infeed.
rent contribution from the adjacent ac network in small radial
MV dc networks, which cannot be used for meshed MTDC sys-
tems with more than one feeder per busbar.
This paper derives novel expressions for the ac network con-
tributions in meshed MTDC networks with arbitrary topology
and presents formulas for the peak value as well as the steady-
state fault current through the CB.
The approximations are derived for the ac infeed during
pole-to-ground faults in HVDC cable systems and compared
with simulations in PSCAD for validation. The approxima-
tions could also be applied to OHL networks and pole-to-pole
faults, but results are only presented for cable systems, since
they yield higher fault current levels than OHL schemes [19].
Pole-to-ground faults are regarded as significantly more fre-
quent compared to pole-to-pole faults [26], particularly in cable
systems, although the latter fault would lead to more severe
conditions [27].
II. POLE-TO-GROUND FAULT IN THE HVDC CABLE NETWORK
Fig. 1 illustrates the typical temporal development of the fault
current through the CB in the faulted cable of a simplified single
terminal arrangement as depicted in Fig. 2. The total CB current
(solid curve) is the sum of the ac network (dashed curve) and dc
capacitor contribution (dotted curve) to the ground fault.
In bipolar HVDC schemes, the midpoint of the dc capaci-
tors, including the VSC capacitors and possible tuned filter ca-
pacitors, is usually grounded to provide a reference voltage to
the pole voltages [28], [29]. The midpoint is grounded either
via a low-ohmic connection or through a reactor depending on
the requirement, whether the bipole has to be able to operate in
monopolar mode or not [30]. In the following text, only solidly
earthed HVDC schemes are considered, since they yield the
highest fault currents among all possible grounding schemes
21
[20]. The grounded capacitor midpoint and the ground fault
form a loop that provokes a discharge of the capacitors upon
the arrival of the surge at the terminal and yields the first peak
at around 1 ms as seen in Fig. 1.
The surges are reflected and travel forward and backward be-
tween the terminal and the fault location [31] that leads to mul-
tiple peaks in the current pattern (three peaks visible between
1 and 8 ms in Fig. 1). During the first 8 ms, the pattern is de-
termined by the traveling surges and consecutive dc capacitor
discharges as explained and calculated in [21].
The converter's local overcurrent protection blocks the insu-
lated-gate bipolar transistor (IGBT) modules to prevent damage
due to overcurrents. After blocking, a half-bridge-based con-
verter acts like an uncontrolled rectifier and the ac side feeds the
fault through the free-wheeling diodes (dashed curve in Fig. 1)
[32]. In contrast to the half-bridge topologies, converters with
full-bridge schemes are able to block the ac infeed and, con-
sequently, the fault current comprises only contributions from
capacitive sources [17].
In the following text, the ac contribution increases and the
dc capacitor is charged again by the ac infeed with the peak
at 10 ms and discharged into the ground fault that leads to the
peak in the CB current at around 13 ms. Maximum CB
current is determined by various factors: the dc capacitor, the
possible pole reactor in series to the CB, the distance to the fault,
the short-circuit power of the adjacent ac network, and the fault
resistance. During the period between 10 and 40 ms, the ac side
and the dc capacitor contribution interact and influence each
other, which results in a damped oscillation of the CB current.
The dc capacitor contribution gradually decreases until the
steady state is reached at around 40 ms. In the steady state, the
dc capacitor is still charged and discharged, but has no net con-
tribution to the fault current, that is, its mean value is zero. The
steady-state CB current exhibits a 300-Hz ripple given by the
blocked converter acting as a six-pulse diode rectifier.
The aim of this paper is, thus, to present an analytic approx-
imation of the time development of the total CB current. It is,
however, not possible to represent analytically the exact wave-
form as shown in Fig. 1 (solid curve), but some characteristic
points are calculated instead. These are the amplitude of the
peak of the transient period and the average steady-state
short-circuit current .
III. SIMULATION MODEL
A description of the PSCAD models used in the benchmark
simulations for the validation of the approximative calculations
of the prospective short-circuit current in the CB is presented in
this section.
A. Cable Model
The cross-section of the frequency-dependent, distributed-
parameter cable model is derived from a real 150-kV XLPE
VSC-HVDC submarine cable [33], [34]. The cross-section has
been scaled up to a 320-kV cable respecting the diameter of the
copper conductor [35], while keeping the electric-field stress in
cold conditions similar. The same material properties and cable
cross-section dimensions as in [17] are applied. The cable sheath
is assumed to have ground potential over the entire cable length.
It is, therefore, mathematically eliminated in the simulations.
22 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 31, NO. 1, FEBRUARY 2016

Fig. 3. Electrical equivalent scheme of the half-bridge-based converter model

with blocked IGBTs ( : ac voltage : ac resistance : ac inductance : Fig. 4. Single-line diagram of the point-to-point HVDC connector.
transformer reactance : phase reactor : arm reactor (MMC), : dc
capacitor).

B. Converter Model
The converters are modeled as a generic 320-kV bipolar
half-bridge VSC topology with concentrated midpoint-
grounded dc capacitors at each terminal. The converter's
local overcurrent protection protects the insulated-gate bipolar
transistor (IGBT) modules from overcurrents through blocking
of the valves making the half-bridge based VSC an uncontrolled Fig. 5. Single-line diagram of a sample four-terminal network.
rectifier [32]. Therefore, the converter model to be implemented
for the transient study can be simplified to the diode rectifier
transformer turns ratio , the phase reactor , the resistance of
shown in Fig. 3. This model is valid for all half-bridge-based
the faulted cable section , and the possible additional fault
topologies with antiparallel freewheeling diodes, independent
resistance . The factor in (1) comes from the integra-
of whether it is a two-level, three-level, or a modular multilevel
tion of the dc voltage over one-sixth of a period to obtain the
converter (MMC). The MMC topology has additional arm
average dc voltage of the unloaded six-pulse diode converter.
reactors as indicated in Fig. 3.
Equation (1) assumes the diode rectifier with three diodes con-
The ac network adjacent to the converter terminal is modeled
ducting at the same time and, therefore, the dc-side resistances
by its equivalent short-circuit impedance consisting of and
are multiplied by a factor of 2/3. The dc-side inductances have
, and a voltage source . The converter transformer with
no influence on the steady-state current and are omitted in the
reactance has a grounded star point on the HV side and delta
calculations.
windings on the secondary side. An additional phase reactor
1) Point-to-Point Connection: The steady-state fault current
is installed between the converter bridge and transformer for
through the CB in a point-to-point HVDC connection as il-
harmonic filtering of the ac currents. The MMC topology does
lustrated in Fig. 4 is not provided by [25], but can be calculated
not require filtering and is usually neglected. The pole reac-
similarly. To do so, Kirchhoff's voltage law (KVL) is applied to
tors, which are usually installed on the dc side, are neglected in
the circuit sections to both sides of the ground fault and Kirch-
this study, because it considers the worst case without additional
hoff's current law (KCL) to the node of the ground fault. The re-
damping [17].
sulting system of three equations is then solved for current
IV. DERIVATION OF ANALYTIC EXPRESSIONS
In the following text, analytic approximations are derived for
the value of the steady state as well as for the overshoot of the
transient response of the CB current.
(4)
A. Steady-State Short-Circuit Current
The formula for the steady-state short-circuit current during
a pole-to-ground fault can be derived by dividing the voltage by
the impedance as in [25]
(5)

(1) In the general case with nonzero fault resistance , the fault
currents in both sections depend on each other, whereas with
(2) zero fault resistance, (4) reduces to (1).
2) Multiterminal Network: The steady-state short-circuit
(3) current in the faulted branch of a multiterminal network as
depicted in Fig. 5 can be expressed as a system of linear
with the ac network impedance , the phase-to- equations. Each terminal is treated as a node with ac and dc
phase rms source voltage , the transformer reactance , the branches connected to it. An additional node is added for the
BUCHER AND FRANCK: ANALYTIC APPROXIMATION OF FAULT CURRENT CONTRIBUTION 23

ground fault, which is earthed through the fault resistance . and

Hence, an -terminal HVDC network results in a system of
linear equations. The general equation for an -terminal
network is (12)

.. ..
. . (6)
B. Transient Short-Circuit Current
The exact time development of the transient contributions
from all adjacent ac networks through the CB in the sample net-
with the dc network admittance matrix including the fault
work in Fig. 5 cannot be represented analytically. Formulas are
node, but neglecting the ac admittances. It has the dimensions
derived for the peak value of the fault current instead (cf.
, where is the number of dc nodes labeled in
Fig. 1). Along with the peak value of the capacitive contribu-
Fig. 5. is the ac system admittance matrix
tions [21] at 2 ms in Fig. 1, the peak of the ac infeed at 13 ms is
with the ac admittances in the diagonal plus a zero element for
a dimensioning criterion for the CB.
the fault node. The elements of are obtained by
To do so, the transient behavior of the higher order system,
if , as shown in Fig. 5, is approximated by the well-known solution
(7)
if of an underdamped, oscillating second-order system
with the dc line conductance ; the dc bus shunt
conductance ; and the fault conductance .
The elements in the diagonal of are

(13)
(8)
where is the steady-state short-circuit current as calculated
The input voltages are calculated as
in (10), is a unit step function, and is the traveling delay
(9) of the initial surge
(14)
where is the turns ratio of the converter transformer and
is the rms phase-to-phase voltage of the corresponding adjacent based on the line length and the propagation speed of the surge
ac system. .
To calculate the average steady-state fault current through The damping ratio expresses the level of damping in
the CB indicated in Fig. 5 considering the ac-side contributions the system relative to critical damping. It indicates, whether the
from all terminals, the matrix on the left-hand side of (6) has to system is underdamped ( ), critically damped
be inverted numerically to solve (6) for the dc terminal voltages ( ), or overdamped ( ). In an overdamped
, and . The CB current can be finally calculated system, the trigonometric functions in (13) turn into hyperbolic
by functions based on and
(10) .
To obtain the unknown system damping ratio , the
Note that the dc currents and voltages contain a certain ripple method proposed in [22] is used. In [22], the unknown damping
and only averaged values are considered. Therefore, the ac ratio of a single terminal system with a converter connected
source voltages are multiplied by and in (6) to to a faulted line is calculated through the multiplication of the
obtain the average dc voltage of the unloaded converter. known damping ratio of the converter itself by the ratio of the
The resulting matrices representing the example network in dc-side and ac-side inductances. This method is applied to the
Fig. 5 are MTDC system in Fig. 5 with an assumed known damping ratio
of the subsystem consisting of terminal 1 connect to the
ground fault through the cable only. The known damping
is then multiplied by the ratio of the decay rates of terminal
1 and the entire MTDC system as follows:

(15)

using
(16)
(11) with and calculated by (3) and (2), respectively.
24 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 31, NO. 1, FEBRUARY 2016

The decay rate of the MTDC network required in (15) TABLE I

is calculated as DEFAULT SYSTEM PARAMETERS

(17)

using the equivalent MTDC network resistance and induc-

tance as seen from terminal 1. For the sample network in
Fig. 5, these two parameters are computed as follows:

(18)
The comparison includes the dc system as well as ac system
and
parameter variations to validate the analytic approximations.
The considered dc parameters are the dc capacitor size, the
fault resistance, and the network topology of the four-ter-
minal system. The ac system parameter variations include the
short-circuit power of the adjacent ac networks and the size of
(19)
respectively. the converter's commutation reactance, for example, the arm
The damping ratio of terminal 1 , used in (15), is derived reactor size in an MMC. Results are shown for the steady-state
from the peak value and the steady-state short-circuit cur- and the peak value of the transient CB current in the MTDC
rent of the single terminal system network.

The corresponding frequency
system can be evaluated using
A. Parameters
(20)
The default system parameters for comparison are summa-
rized in Table I. The short-circuit power ratio (SCR) is defined
as the ratio of the short-circuit capacity at the point of common
of the single terminal
coupling (PCC) and the rated power of the converter as
(21) (26)

and the phase angle Three different MTDC network scenarios are considered and
their values are summarized in Table II. Grid topology A and
(22) B correspond to the topology presented in Fig. 5, but with dif-
ferent line lengths . Grid topology C has a connection between
where and are the single terminal system parameters de- terminal 1 and 4 ( ) instead of 2 and 3 ( ) as in layouts A and
termined in (3) and (2), respectively. B. The fault resistance is varied between 0 and 4 and the
The frequency of the transient oscillation in the MTDC dc capacitors at all four terminals between 0 and 200 F to
system in (13) is calculated by consider systems with new converter technologies that require
no or very low dc side filtering, as well as the worst case with
(23) very large dc capacitors.
based on the damping ratio of the MTDC system and the The required input parameters for the analytic calculations
frequency of the single terminal system . are also presented in Table II. The per-unit length dc line resis-
Finally, the peak value of the transient fault current through tance and inductance are obtained through the PSCAD
the CB and the corresponding time to peak is derived Line Constant Program. The peak and the steady-state
from (13). The resulting formulas are value of the short-circuit current of terminal 1 are derived
from simulations of the single terminal system comprising ter-
(24) minal 1 only. The two values and depend only on the
parameters of the ac network adjacent to terminal 1 and on the
and line length .
(25)
B. Variation of Fault Resistance
Table III summarizes the relative error of the analytic calcu-
V. COMPARISON AND DISCUSSION lations of the peak and steady-state value of the CB current in
The results of the derived formulas for the fault current the MTDC network with topology A as depicted in Fig. 5. The
through the CB, as indicated in Fig. 5, are verified in com- dc capacitors are neglected and the values are given for
parison to PSCAD simulations as presented in this section. fault resistances between 0 and 4 .
BUCHER AND FRANCK: ANALYTIC APPROXIMATION OF FAULT CURRENT CONTRIBUTION
TABLE II
PARAMETERS OF THE FOUR-TERMINAL HVDC GRID
TABLE III
VARIATION OF FAULT RESISTANCE–TOPOLOGY A,
The peak value of the CB current can be estimated accu-
rately using (24) with a relative error below 3% for all values of
the fault resistance. The small deviations are mainly due to esti-
mation errors of the single terminal peak and steady-state fault
current values and , respectively. Equation (20) is
sensitive to these values and errors in their estimation may dete-
riorate the accuracy of the calculate peak magnitude in the
MTDC network. An alternative determination of the damping
ratio in the MTDC system without relying on the single
terminal damping ratio would mitigate this problem.
The analytic function (13) is plotted by the dashed curve in
Fig. 6 for zero fault resistance and the results of (24) and (25)
are indicated by circles. The time to peak , based on (25),
exhibits rather large deviations from the actual values of the
PSCAD simulation outcomes as indicated by squares in Fig. 6.
The time to peak of the ac infeed is very difficult to estimate in
an MTDC system due to the superposition of the contributions
from all terminals, whose peaks occur at different instances in
time due to the different distances to the fault, that is, different
phase angles. To specify the CB requirements, the exact time to
peak of the ac infeed and the corresponding , however, are
not as important as the of the initial surge as shown in
Fig. 1. The of the ac network contributions is much lower
due to the current-limiting ac-side inductances.
The differences between simulated and approximated results
for the average steady-state short-circuit currents are within a
few tens of amperes and the relative error is below 1% for
all fault resistances as summarized in the second column of
Table III. The small differences are due to the simplified cal-
culation of the average steady-state current based on the sixth
25
Fig. 6. Comparison of peak value results from analytic calculations and
PSCAD simulations for various fault resistances.
TABLE IV
VARIATION OF DC CAPACITOR–TOPOLOGY A,
harmonic only and no other harmonics are considered, which
are present in the simulations.
C. Variation of DC Capacitor Size
The relative error of the analytic calculation of the peak mag-
nitude is presented in Table IV for dc capacitor sizes between 0
and 200 F. Although (24) does not take into account the dc ca-
pacitor size, the relative errors of the calculated peak magnitude
remain below 8% for the considered capacitor sizes up to 200
F. The deviations from the simulation results are again due to
estimation errors in the single terminal damping ratio as ex-
plained in Section V-B.
The calculations of the steady-state fault current through the
CB, not shown in Table IV, yield the same relative error of
0.05% for all dc capacitor sizes, since the capacitors have no
influence on the average steady-state fault current.
A graphic presentation of the PSCAD results (squares) and
the analytic result (circle) is shown in Fig. 7. As can be seen, the
dc capacitor size influences considerably the instance of time
of the ac infeed peak. An exact estimation of this instance is
beyond the scope of this paper. Moreover, Fig. 7 reveals that
the dc capacitor size has more influence on the initial capacitor
discharge peak than on the ac infeed peak magnitude .
D. Variation of DC Network Topology
The variation of the dc network topology yields relative errors
of the calculated peak magnitude between 1.7% in topology A
to 3.77% in topology C as presented in Table V. The relative
26
Fig. 7. Comparison of peak value results from analytic calculations
PSCAD simulations for various dc capacitor sizes.
TABLE V
VARIATION OF NETWORK TOPOLOGY– , F
TABLE VI
VARIATION OF SCR–TOPOLOGY A, , F
error of the calculated average steady-state CB current remains
again below 1%.
E. Variation of SCR
To validate the derived formulas, the SCR of the adjacent ac
networks is also varied. The variation considers values of the
SCR between 5 (weak ac system) and 40 (strong ac system).
Table VI shows that the proposed equations provide accurate re-
sults with relative errors below 0.06% for the steady-state value
and below 1.7% for the peak value of the transient ac infeed.
F. Variation of Commutation Reactance
As an additional proof for the validity of the proposed equa-
tions, the commutation reactance is varied be-
tween 5% and 10% of the base impedance by increasing, for
example, the size of the arm reactor as present in MMC
topologies (see Fig. 3). Table VII shows an increasing relative
error for the peak and the steady-state value of the CB current
with a commutation reactance larger than 0.08 p.u. This is due
to the fact that the derived formulas assume three simultane-
ously conducting diodes, whereas a larger commutation induc-
tance, that is, longer diode conduction periods, results in four
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 31, NO. 1, FEBRUARY 2016
TABLE VII
VARIATION OF COMMUTATION REACTANCE–TOPOLOGY A,
, F
simultaneously conducting diodes. The operation mode of the
rectifier is not only influenced by the ac-side commutation in-
ductance, but also by the load, that is, the dc network and the
fault resistance. For larger fault resistances, the operation point
of the rectifier moves to the three-diode mode and the proposed
and formulas become more accurate. The study of all rectifier oper-
ation modes is beyond the scope of this paper and is subject to
future extensions.
VI. CONCLUSION
This paper presents novel analytic formulas for the calcu-
lation of the fault current contribution from the ac network
through the dc CB during a pole-to-ground fault in a meshed
MTDC system. Analytic expressions are derived for the
steady-state short-circuit current through the CB, as well as for
the peak value of the transient current in an MTDC network
with arbitrary topology. In contrast to the existing IEC 61660
standard for small medium-voltage (MV) dc networks, the
expressions proposed in this paper can be applied to meshed
MTDC systems with multiple feeders per busbar. The proposed
expressions are validated by comparison to detailed simulations
in PSCAD using parameter variations of the dc capacitor size,
fault resistance, and network topology.
Highly accurate results with relative errors below 1% are
achieved with the formula for the steady-state CB current in
MTDC networks. Also, the amplitude of the transient peak of
the ac infeed can be accurately calculated with relative errors
below 8% for the entire range of dc capacitor size, fault resis-
tance, and network topologies considered in this study. The ac-
curacy could be improved with an alternative estimation of the
MTDC system damping ratio, which serves as the basis for the
ac infeed peak magnitude calculations.
The proposed equations show acceptable accuracy for a com-
mutation reactance up to 0.08 p.u. in the base case with a small
fault resistance. For larger inductances, the four-diode opera-
tion mode of the rectifier is prevailing and the derived formulas
become less accurate. For a larger range of commutation in-
ductance, the derived approximations have to be improved and
other rectifier operation modes have to be considered.
For a future short-circuit calculation standard, characteristic
values connected piecewise by enveloping functions will be re-
quired to approximate the entire development of the prospective
CB current over time as used in most existing standards. The
expressions for peak and steady-state values of the CB current
during the ac infeed dominated period as presented in this paper,
together with the values of the initial surges as proposed in [21],
could serve as characteristic values for such a standard.
BUCHER AND FRANCK: ANALYTIC APPROXIMATION OF FAULT CURRENT CONTRIBUTION
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Matthias K. Bucher (S'12) received the B.Sc. and
M.Sc. degrees in electrical engineering from the ETH
Zurich, Zurich, Switzerland, in 2009 and 2011, re-
spectively, where he is currently pursuing the Ph.D.
degree in high voltage engineering.
He joined the High Voltage Laboratory, ETH
Zurich, in 2011. His research is dedicated to tran-
sients in multiterminal HVDC networks.
Christian M. Franck (M'04–SM'11) received the
diploma in physics from the University of Kiel, Kiel,
Germany, in 1999 and the Ph.D. degree in physics
from the University of Greifswald, Greifswald,
Germany, in 2003.
He was Scientist and Group Leader for gas
circuit breakers and high-voltage systems with the
Swiss Corporate Research Center of ABB, Dättwil,
Switzerland, from 2003 to 2009. Currently, he is
Assistant Professor for High Voltage Technology at
ETH Zurich, Zurich, Switzerland.