Modeling and Control of Three-level Bi-directional

Flying Capacitor DC-DC converter in DC microgrid

Vijesh Jayan∗ , Amer Ghias∗ , Adel Merabet†
∗ School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore,
† Division of Engineering, Saint Mary’s University, Halifax, NS, Canada.

Email: vijesh.jayan@ieee.org

Bi-directional flying capacitor

Abstract—This paper presents a finite control set model pre- DC bus
DC-DC converter
dictive control (FCS-MPC) of a three-level bi-directional flying
capacitor DC-DC converter for energy management application
in a DC microgrid. The presence of three voltage levels give S1 D1
the converter advantage of having reduced voltage stress on the
power switches and low ripple in its inductor current. Addition-
ifc idc iload ipv
ally, the capability of having bi-directional power flow enables S2 D2
the converter to integrate energy storage devices such as the
battery to a DC microgrid effectively. An FCS-MPC algorithm Battery L vfc vdc
iL + + PV

Load
is formulated using the developed mathematical model in order Cfc Cdc
system
to yield the dual objective of bi-directional power flow and ib
flying capacitor voltage balancing. Furthermore, a DC microgrid S3 D3
comprising photo-voltaic (PV) system, load, and battery are + +
vb Cb
considered to assess the effectiveness of the designed FCS-MPC _
algorithm under varying load and PV power injections.
S4 D4
Index Terms—Finite Control Set Model Predictive Control, Bi-
directional Flying Capacitor DC-DC converter.

Fig. 1. Three-level bi-directional flying capacitor DC-DC converter in a DC

I. I NTRODUCTION microgrid.

The advent of power electronic converters has made pro-

cessing power efficiently from the renewable energy sources
(RES). However, the RES are intermittent by nature and
can possess various risks when connected to a microgrid.
The intermittent issues are manageable by using different
energy storage devices (ESD) such as the batteries and ultra
capacitors. However, developing a control strategy to ensure
sufficient power balance between the load, ESD, and RES is a
crucial task. Any deviation in the power balance could lead to
violation of system parameters, which will result in the failure
or misoperation of critical loads connected to the system.
Hence, it is required to design an effective control algorithm
which ensures the voltage to be well regulated within the limits
during intermittent operation of RES.
The traditional linear controllers are used in energy manage-
ment application and is well documented in the literature [1]–
[7]. However, these controllers possess numerous drawbacks.
They are sensitive to system parameter variations and require
proper tuning. They have a poor dynamic response, which is
not desirable in microgrid applications. The use of such con-
trollers can cause undesirable deviations in the system voltage
during fluctuating renewable power injection and varying loads
in a DC microgrid [8]. Therefore, finite control set model
predictive control (FCS-MPC) becomes a suitable candidate
to deal with fluctuations as they have better dynamic response
compared to linear controllers.
The system non-linearities can be implemented easily us-
ing a FCS-MPC algorithm. The FCS-MPC algorithm based
two-level bi-directional DC-DC converter in a hybrid energy
storage system (HESS) application is reported in the literature
[9]. Complex matrix calculations are performed in this paper
due to which it suffers from the high computational burden.
The FCS-MPC implementation for RES based AC and DC
microgrid applications are reported in [8], [10]. The algorithm
regulates the DC bus voltage by smoothing the fluctuating
PV power. However, there is significant large ripples in the
inductor current due to the presence of only two voltage
levels and the power switches operate at variable switching
frequency. This can over-stress the battery during the operation
and can reduce its life span.
As a result, a new three-level bi-directional DC-DC con-
verter configuration was developed for HESS applications
[11]. Compared to a two-level DC-DC converter, the topology
has three voltage levels, which yields a reduction in the in-
ductor current ripple. The paper implements a fixed frequency
model predictive control (FFMPC) which enable the power
switches to operate at a fixed frequency. However, the study
lacks an analysis of DC bus voltage regulation under varying
load and RES power injections. Besides increasing the voltage
levels, another method to reduce the inductor current ripple
is by interleaving DC-DC converters [12], [13]. Application

l-))) 
 S1 D1 S1 D1 S1 D1

ifc idc iload ipv idc iload ipv ifc idc iload ipv
S2 D2 S2 D2 S2 D2

L vfc vdc L vfc vdc L vfc vdc

iL + + PV iL + + PV iL + + PV
Cfc Cdc R Cfc Cdc R Cfc Cdc R
System System System

ib ib ib
S3 D3 S3 D3 S3 D3

vb Cb vb Cb vb Cb

S4 D4 S4 D4 S4 D4

(a) (b) (c)

Fig. 2. Boost operation modes: (a) State I (b) State II (c) State III.

S1 D1 S1 D1 S1 D1

ifc idc iload ipv idc iload ipv ifc idc iload ipv
S2 D2 S2 D2 S2 D2

L vfc vdc L vfc vdc L vfc vdc

iL + + PV iL + + PV iL + + PV
Cfc Cdc R Cfc Cdc R Cfc Cdc R
System System System
ib ib ib
S3 D3 S3 D3 S3 D3

vb Cb vb Cb vb Cb

S4 D4 S4 D4 S4 D4

(a) (b) (c)

Fig. 3. Buck operation modes: (a) State IV (b) State V (c) State VI.

of the interleaved DC-DC converter topologies to RES are
reported in the literature [14], [15]. The converters in these
literatures are controlled using FCS-MPC algorithm.
Another multi-level DC-DC converter topology reported in
the literature is the flying capacitor based converters [16]. Due
to the presence of multi-voltage levels, the converters have
reduced voltage stress on the power switches and low inductor
current ripple. The level of the converter are extended easily
by adding more stages, thereby achieving a higher voltage gain
ratio. However, the flying capacitors of each stage are required
to be balanced to the reference value throughout the operation.
Various capacitor voltage balancing techniques namely - active
and passive (RLC filter) are reported in literature [17], [18]
and [19] respectively. Furthermore, a modified three-level buck
DC-DC converter is also reported in literature [20] which
is found to have an improved dynamic response. However,
the converters used in the analysis are all unidirectional and
are controlled by a traditional linear controller which posses
limitations as discussed earlier.
In this paper, a three-level bi-directional flying capacitor
DC-DC converter is introduced for energy management appli-
cations in a DC microgrid. The mathematical modeling of the
converter is developed under different operation modes, which
is further used for formulating the FCS-MPC algorithm. The
designed FCS-MPC algorithm attains the dual objective of bi-
directional power flow and active flying capacitor voltage bal-
ancing throughout the operation. A DC microgrid consisting
of a PV system, load and battery are considered to assess the
effectiveness of the designed algorithm under varying load and
PV power injection.
II. T HREE - LEVEL BI - DIRECTIONAL F LYING C APACITOR
DC-DC CONVERTER TOPOLOGY
A. Topology and Fundamentals
In this section, a three-level bi-directional flying capacitor
DC-DC converter topology and its operation is presented. The
converter consists of four power switches (S1 , S2 , S3 , S4 ), an
inductor L and a flying capacitor Cf c as shown in Fig. 1. The
flying capacitor voltage vf c is regulated to half of the DC bus
voltage vdc during the operation. This gives the topology an
advantage of having reduced voltage stress across the power
switches and less inductor current ripple when compared to a
conventional bi-directional DC-DC converter. The anti-parallel
diodes (D1 , D2 , D3 , D4 ) of the power switches, enhances
the bi-directional power flow capability of the converter.
The converter operation as boost or buck mode is decided
based on the switching sequence of the power switches. The
possible switching states of the converter with flying capacitor
voltage vf c and inductor current iL directions under boost
and buck operation modes are shown in the Fig. 2 and Fig. 3
respectively.
During boost operation mode, the converter operates at three
distinct states which are distributed along a switching period.
The boost operation facilitates the converter to transfer deficit


power from the source, vb to the load, vdc . It is initiated by TABLE I
charging the inductor from vb through the power switches S WITCHING STATES WITH FLYING CAPACITOR VOLTAGE AND INDUCTOR
CURRENT STATUS UNDER DIFFERENT OPERATION MODES .
S3 and S4 as shown in Fig. 2b. When power switch S3 is
switched-off, the inductor discharges its energy to charge the State Mode S1 S2 S3 S4 Δvf c ΔiL
flying capacitor through anti-parallel diode D2 and power I 0 0 0 1 ↑ ↓
switch S4 (Fig. 2a). Once the flying capacitor is charged, II Boost 0 0 1 1 - ↑
the inductor current is charged again from vb through the III 0 0 1 0 ↓ ↓
power switches S3 and S4 . Finally, when power switch S4 IV 1 0 0 0 ↑ ↓
is switched-off, the inductor and flying capacitor transfers its V Buck 0 0 0 0 - ↑
charged energy to vdc through power switch S3 and anti- VI 0 1 0 0 ↓ ↓
parallel diode D1 (Fig. 2c).
Similarly, during buck operation mode, the converter op-
erates at three distinct states which are distributed along a
switching period. The buck operation facilitates the converter current iL and flying capacitor voltage vf c of the converter
to transfer excess power from the load, vdc to the source, under boost mode is given as:
vb . When power switch S1 is switched-on, the inductor and
diL vb − (1 − S4 )vdc − (S4 − S3 )vf c
flying capacitor are charged from vdc through power switch S1 = (1)
and anti-parallel diode D3 as shown in Fig. 3a. When power dt L
dvf c (S4 − S3 )iL
switch S1 is switched-off, the inductor discharges its energy = (2)
to vb by free wheeling through anti-parallel diodes D3 and D4 dt Cf c
(Fig. 3b). When power switch S2 is switched-on, the flying Similarly, the converter operates in buck mode when power
capacitor discharges its energy to the inductor through power switches S1 and S2 are modulated while power switches S3
switch S2 and anti-parallel diode D4 (Fig. 3c). Finally, when and S4 are switched-off. Applying circuit analysis on Fig. 1,
power switch S2 is switched-off, the inductor discharge its the continuous-time model of the converter under buck mode
energy to vb by free wheeling through anti-parallel diodes D3 is given as:
and D4 .
diL vb − (S1 )vdc − (S2 − S1 )vf c
In this paper, the converter is used as an interface to = (3)
exchange power between the battery and DC bus as shown dt L
dvf c (S2 − S1 )iL
in Fig. 1. The DC bus consists of a capacitor Cdc and a load. = (4)
The DC bus is also connected to a PV system which injects dt Cf c
current ipv to the load. The PV power injection depends on where S1 , S2 , S3 and S4 are the binary switching pulses of
the solar irradiation incident on the PV system and its open the respective power switches. Terms vb and vdc are referred to
circuit voltage is always greater than the DC bus voltage. the battery and DC bus voltage, respectively. On comparing
Variable power injection to the DC bus violates the voltage the equations (1,2) with (3,4), a simplified continuous-time
level and will subject to failure or misoperation of the critical model equation of the converter can be written as:
loads connected across the bus. The converter is controlled to
diL vb − (1 − A)vdc − (A − B)vf c
compensate the excess or deficit in load power by charging = (5)
dt L
(buck) or discharging (boost) the battery power from/to the
dvf c (A − B)iL
DC bus respectively. Therefore, the DC bus voltage vdc is = (6)
regulated, and the power balance at the bus is attained. The dt Cf c
mathematical modeling of the converter for two operation where, A and B are the binary pulses (A, B ∈ {0, 1}) of the
modes and the proposed FCS-MPC algorithm formulation is power switches and can be written as:
explained in the following sections.
A = S4 = S 1 (7)
B. Continuous-Time Model B = S3 = S2 (8)
In this section, the mathematical modeling of a three-level
C. Discrete-Time Model
bi-directional flying capacitor DC-DC converter is presented.
The operation mode of the converter depends on the mod- In this section, the continuous-time equations (5,6) are
ulation of power switches. The Table I summaries possible transformed into discrete-time model using Euler method. The
switching states with flying capacitor and inductor current (k + 1)th time step inductor current ik+1
L and flying capacitor
status under each operation modes of the converter. Note that voltage vfk+1
c of the converter are predicted as follows:
the status are indicated based on the sign convention followed
in Fig. 1. It can be seen that the converter operates in boost Ts  k 
ik+1
L = ikL + vb − (1 − A)vdc
k
− (A − B)vfkc (9)
mode when S3 and S4 power switches are modulated while L
power switches S1 and S2 are switched-off. Applying circuit Ts
vfk+1
c = vf c +
k
(A − B)ikL (10)
analysis on Fig. 1, the continuous-time model of the inductor Cf c


 Start at k th time step. The inductor current at k th time step can be
written as:
Read sensor values Vdc
iLk, iloadk, ipvk, vbk, vdck, vfck ikL = k (i∗k − ikpv ) (12)
vb load
Assign reference values where Vdc is the reference DC bus voltage and vbk is the
iLrefk+1, vfcrefk+1
battery voltage at k th time step. The term ikpv is the PV current
Initialise
injected to the DC bus at k th time step. The reference load
i = 1, Jm = Inf current at k th time step, i∗k
load is calculated as follows:
A = [0 1 1], B = [1 0 1]
Vdc
i∗k
load = (13)
No Rk
If i <= 3
where Rk is the load resistance at k th time step and is
Yes
estimated as:
Predict Yes No
iLk+1, vfck+1 If iLrefk+1 > 0 k
vdc
Rk = k
(14)
i= i+ 1 iload
Calculate Set Set
k
Jk S1 = 0 S1 = 1 - A(iopt) where vdc and ikload are the DC bus voltage and load current
S2 = 0 S2 = 1 - B(iopt) th
S3 = B(iopt) S3 = 0 at k time step respectively. From the equations (12), (13),
(14) and assuming small time step (ik+1 Lref ≈ iL ), the final
S4 = A(iopt) S4 = 0 k
Yes
If Jm < Jk
expression of reference inductor current is given as follows:
 
No 2 ikpv
Vdc ikload
Assign iLref = k
k+1
k
− (15)
iopt = i End vb vdc Vdc
Jm = J k
It is observed that the reference inductor current changes with
Fig. 4. Finite control set model predictive control algorithm. respect to load and PV currents. The converter mode is decided
based on the value of reference inductor current. The reference
where Ts is the controller sampling time period. The terms flying capacitor voltage is given as:
vbk , vfkc and vdc
k
are the battery, flying capacitor and DC bus Vdc
cref =
vfk+1 (16)
th
voltage at k time step respectively. The discrete-time model 2
of the converter is used in the FCS-MPC formulation and is The reference flying capacitor voltage is set to half of the ref-
discussed in the next section. erence DC bus voltage and is fixed throughout the operation.
III. F INITE C ONTROL S ET M ODEL P REDICTIVE C ONTROL C. Algorithm
In this section, FCS-MPC algorithm for a three-level bi- The algorithm for performing FCS-MPC is presented in the
directional flying capacitor DC-DC converter is presented. flowchart shown in Fig. 4. The algorithm runs at a sampling
period of Ts . It begins by reading the sensor outputs and
A. Formulation
calculates the reference parameters at every sampling period.
The discrete-time model of inductor current and flying The algorithm predicts ik+1 and vfk+1
L c for all binary switching
capacitor voltage derived in (9) and (10) are used in the control pulse combination of A and B. Finally, an optimum state,
formulation. The inductor current and flying capacitor voltage A(iopt ) and B(iopt ) is found that minimizes the quadratic cost
are the control objectives in the model. Hence an algorithm function (11) in a sample period. Once the optimum states
is formulated to identify the optimum switching pulse of the are computed, the converter operation mode - boost/buck, is
power switches at which the control objectives are attained. decided based on the sign of the reference inductor current.
This is done by formulating a quadratic cost function as: Further, the corresponding switching pulse of the individual
k+1 2 k+1 2 power switches S1 , S2 , S3 and S4 are computed based on the
J k = (ik+1
Lref − iL ) + λ(vf cref − vf c )
k+1
(11)
converter operation mode as shown in Fig. 4.
where ik+1 k+1
Lref and vf cref are the reference inductor current and
IV. S IMULATION R ESULTS
flying capacitor voltage respectively. The term λ is defined
as the weighing factor that provides a preference between the The proposed model is simulated by using MAT-
inductor current and flying capacitor voltage in tracking their LAB/Simulink software. The FCS-MPC algorithm is pro-
reference values. grammed using a function block with a sampling time Ts of
50 μs. Analysis on the voltage regulation across the DC bus
B. Reference generation and flying capacitor during load and PV power variations are
The reference inductor current is derived by applying power studied to assess the effectiveness of the designed controller.
balance (assuming zero converter loss) on the model (Fig. 1) The system parameters considered for the simulations are


 40
400
vdc
30 iL

Current (A)
300
Voltage (V)

40
20
20
iLref
200 10
v 0
fc
0 0.495 0.5 0.505
100
-10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s) Time (s)
(a) (b)

70.02 8 Pload
Ppv
State of Charge (%)

Power (kW)
70

4
69.98
2
69.96
Pb
0
69.94
-2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s) Time (s)
(c) (d)
Fig. 5. Simulation results of case I: (a) Flying capacitor voltage vf c and DC bus voltage vdc (b) Inductor current iL (c) State of charge (SoC), and (d) PV
power Ppv , Load power Pload and Battery power Pb .

a a' a a'
400 40 iL
vdc Current (A)
Voltage (V)

300 20

200 0
vfc
100
-20

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s) Time (s)
(a) (b)

a a' 6 a a'
70
Ppv
State of Charge (%)

4
Power (kW)

69.99
2 Pload
69.98 0
Pb
69.97 -2

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s) Time (s)
(c) (d)
Fig. 6. Simulation results of case II: (a) Flying capacitor voltage vf c and DC bus voltage vdc (b) Inductor current iL (c) State of charge (SoC), and (d) PV
power Ppv , Load power Pload and Battery power Pb .

TABLE II analysis. At time instant t = 0s, a 4 kW load is connected to

S YSTEM PARAMETERS FOR S IMULATION the DC bus. The excess 800 W is absorbed by the battery to
maintain the DC bus voltage through buck operation mode of
Vdc Vf c Vb Cdc Cf c Cb L λ
the converter. Observe that the DC bus and flying capacitor
(V) (mF) (mH)
voltages are regulated entirely within the set limit during the
400 200 100 2 0.6 1 3 0.5 operation (Fig. 5a). An increase in the battery’s state of charge
is also observed (Fig. 5c) as it absorbs the excess power from
the PV system in order to maintain the DC bus voltage. The
given in Table II. The results are discussed separately in the negative sign of battery power symbolizes the reverse flow of
following subsections. power.
A. Case I (Varying load power) At time instant t = 0.5s, the load power is doubled. Since
In this study, the converter’s performance under varying load the PV system in this study is considered to supply constant
power is assessed. The PV system is considered to supply a power (4.8 kW), the deficit power 3.2 kW will reduce the DC
constant power Ppv of 4.8 kW to the DC bus throughout the bus voltage. The FCS-MPC control algorithm determines the


optimum switching pulses and toggles the converter to boost
operation mode. This enables the converter to supply deficit
power by discharging the battery (Fig. 5d), hence avoiding
the dip in DC bus voltage. It is observed that the DC bus
and flying capacitor voltages are regulated well within the set
limit during the time instant of the load change (Fig. 5a). A
reduction in the battery’s state of charge (Fig. 5c) is also seen
after load change justifying the compensation of deficit power
at the DC bus.
B. Case II (Varying PV power)
In this study, converter’s performance under varying PV
power is analyzed. A 3.2 kW load is connected to the DC
bus and is considered constant throughout the study. From
time interval t = 0 to 0.1s, no power from the PV system
is injected to the DC bus (Fig. 6d). During this interval the
controller operates the converter in boost mode enabling the
battery to operate the 3.2 kW load. A reduction in the state
of charge is observed in Fig. 6c during the operation. From
time instant t = 0.1s, the power supplied by the PV system
rises gradually. The rise in PV power injection to the DC bus
is sensed by the controller and reduces the power supplied by
the battery (Fig. 6d) gradually to maintain the DC bus voltage.
Between the time intervals a and a shown in Fig. 6d, the
PV system injects excess power to the DC bus. This will lead
to a massive rise in the DC bus voltage and will affect the loads
connected to the bus. The controller operates the converter in
buck mode enabling the converter to absorb the excess power
to charge the battery. The battery’s state of charge is observed
to rise during the interval (Fig. 6c), confirming the absorption
of power. Also, the power from PV system starts reducing after
time interval a . This will be reflected as a reduction in the DC
bus voltage. The controller now operates the converter in boost
mode enabling the battery to compensate the deficit power and
thereby maintaining the DC bus voltage. It is observed that
the DC bus and flying capacitor voltage are regulated entirely
within the set limit (Fig. 6a) during the entire time-span of
operation. This shows the effectiveness of the control strategy
proposed on three-level bi-directional flying capacitor DC-DC
converter in a DC microgird application.
V. C ONCLUSION
This paper presents a mathematical model of three-level bi-
directional flying capacitor DC-DC converter which is used
in a FCS-MPC algorithm to perform energy management in
a DC microgrid. The effectiveness of the control algorithm
is assessed by simulating the model under varying load and
PV power injections. The future work will include setting
operational constraints for the battery and PV system to the
control algorithm.
ACKNOWLEDGMENTS
The School of Electrical and Electronic Engineering, and
the Academic Research Fund Tier1 at Nanyang Technological
University has supported this work.

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