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1MRK506382-UEN - en - K - Technical Manual, Line Distance Protection REL650 Version 2.2
1MRK506382-UEN - en - K - Technical Manual, Line Distance Protection REL650 Version 2.2
The software and hardware described in this document is furnished under a license and may be used
or disclosed only in accordance with the terms of such license.
This product includes software developed by the OpenSSL Project for use in the OpenSSL Toolkit
(https://www.openssl.org/). This product includes cryptographic software written/developed by: Eric
Young (eay@cryptsoft.com) and Tim Hudson (tjh@cryptsoft.com).
Trademarks
ABB is a registered trademark of ABB Asea Brown Boveri Ltd. Manufactured by/for a Hitachi Energy
company. All other brand or product names mentioned in this document may be trademarks or
registered trademarks of their respective holders.
Warranty
Please inquire about the terms of warranty from your nearest Hitachi Energy representative.
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept or product
description and are not to be deemed as a statement of guaranteed properties. All persons
responsible for applying the equipment addressed in this manual must satisfy themselves that each
intended application is suitable and acceptable, including that any applicable safety or other
operational requirements are complied with. In particular, any risks in applications where a system
failure and/or product failure would create a risk for harm to property or persons (including but not
limited to personal injuries or death) shall be the sole responsibility of the person or entity applying
the equipment, and those so responsible are hereby requested to ensure that all measures are taken
to exclude or mitigate such risks.
This document has been carefully checked by Hitachi Energy, but deviations cannot be completely
ruled out. In case any errors are detected, the reader is kindly requested to notify the manufacturer.
Other than under explicit contractual commitments, in no event shall Hitachi Energy be responsible
or liable for any loss or damage resulting from the use of this manual or the application of the
equipment.
Conformity
This product complies with the directive of the Council of the European Communities on the
approximation of the laws of the Member States relating to electromagnetic compatibility (EMC
Directive 2004/108/EC) and concerning electrical equipment for use within specified voltage limits
(Low-voltage directive 2006/95/EC). This conformity is the result of tests conducted by Hitachi
Energy in accordance with the product standard EN 60255-26 for the EMC directive, and with the
product standards EN 60255-1 and EN 60255-27 for the low voltage directive. The product is
designed in accordance with the international standards of the IEC 60255 series.
1MRK506382-UEN Rev. K Table of contents
Table of contents
Section 1 Introduction..................................................................................................35
1.1 This manual.........................................................................................................................35
1.1.1 Presumptions for Technical Data.......................................................................................35
1.2 Intended audience...............................................................................................................35
1.3 Product documentation....................................................................................................... 36
1.3.1 Product documentation set................................................................................................36
1.3.2 Document revision history................................................................................................. 37
1.3.3 Related documents........................................................................................................... 38
1.4 Document symbols and conventions...................................................................................39
1.4.1 Symbols.............................................................................................................................39
1.4.2 Document conventions......................................................................................................39
1.5 IEC 61850 Edition 1, Edition 2, and Edition 2.1 mapping....................................................42
10.1.4 Signals.............................................................................................................................343
10.1.5 Settings........................................................................................................................... 344
10.1.6 Operation principle.......................................................................................................... 344
10.1.7 Technical data................................................................................................................. 345
10.2 Fuse failure supervision FUFSPVC...................................................................................346
10.2.1 Identification.................................................................................................................... 346
10.2.2 Functionality ................................................................................................................... 346
10.2.3 Function block................................................................................................................. 346
10.2.4 Signals.............................................................................................................................346
10.2.5 Settings........................................................................................................................... 347
10.2.6 Monitored data................................................................................................................ 348
10.2.7 Operation principle.......................................................................................................... 348
10.2.7.1 Zero and negative sequence detection...................................................................... 348
10.2.7.2 Delta current and delta voltage detection...................................................................350
10.2.7.3 Dead line detection.................................................................................................... 352
10.2.7.4 Main logic................................................................................................................... 353
10.2.8 Technical data................................................................................................................. 356
10.3 Voltage based delta supervision DELVSPVC....................................................................356
10.3.1 Identification.................................................................................................................... 356
10.3.2 Functionality.................................................................................................................... 356
10.3.3 Function block................................................................................................................. 357
10.3.4 Signals.............................................................................................................................357
10.3.5 Settings........................................................................................................................... 358
10.3.6 Monitored data................................................................................................................ 358
10.3.7 Operation principle.......................................................................................................... 358
10.3.7.1 Minimum signal level check....................................................................................... 359
10.3.7.2 Mode of operation...................................................................................................... 359
10.3.7.3 Instantaneous 1 cycle / 2 cycle ................................................................................. 359
10.3.7.4 RMS/DFT based supervision..................................................................................... 360
10.3.7.5 Angle based supervision or vector shift supervision.................................................. 360
10.3.8 Technical data................................................................................................................. 362
10.4 Current based delta supervision DELISPVC.....................................................................362
10.4.1 Identification.................................................................................................................... 362
10.4.2 Functionality.................................................................................................................... 362
10.4.3 Function block................................................................................................................. 363
10.4.4 Signals.............................................................................................................................363
10.4.5 Settings........................................................................................................................... 364
10.4.6 Monitored data................................................................................................................ 364
10.4.7 Operation principle.......................................................................................................... 364
10.4.7.1 Minimum signal level check....................................................................................... 365
10.4.7.2 Mode of operation...................................................................................................... 365
10.4.7.3 Instantaneous 1 cycle / 2 cycle ................................................................................. 365
10.4.7.4 RMS/DFT based supervision..................................................................................... 366
10.4.7.5 2nd Harmonic blocking................................................................................................366
10.4.7.6 3rd Harmonic based adaption.....................................................................................367
10.4.8 Technical data................................................................................................................. 368
Section 15 Metering......................................................................................................679
15.1 Pulse-counter logic PCFCNT............................................................................................ 679
15.1.1 Identification.................................................................................................................... 679
15.1.2 Functionality ................................................................................................................... 679
15.1.3 Function block................................................................................................................. 679
15.1.4 Signals.............................................................................................................................679
15.1.5 Settings........................................................................................................................... 680
15.1.6 Monitored data................................................................................................................ 680
15.1.7 Operation principle.......................................................................................................... 680
Section 18 Security.......................................................................................................809
18.1 Authority check ATHCHCK................................................................................................809
18.1.1 Identification.................................................................................................................... 809
18.1.2 Functionality ................................................................................................................... 809
18.1.3 Operation principle ......................................................................................................... 809
18.1.3.1 Authorization with Central Account Management enabled IED................................. 812
18.2 Authority management AUTHMAN................................................................................... 813
18.2.1 Identification.................................................................................................................... 813
18.2.2 AUTHMAN.......................................................................................................................813
18.2.3 Settings........................................................................................................................... 814
18.3 FTP access with password FTPACCS.............................................................................. 814
18.3.1 Identification.................................................................................................................... 814
18.3.2 FTP access with TLS, FTPACCS....................................................................................814
18.3.3 Settings........................................................................................................................... 814
18.4 Authority status ATHSTAT................................................................................................. 815
18.4.1 Identification.................................................................................................................... 815
18.4.2 Functionality ................................................................................................................... 815
18.4.3 Function block................................................................................................................. 815
18.4.4 Signals.............................................................................................................................815
18.4.5 Settings........................................................................................................................... 815
18.4.6 Operation principle ......................................................................................................... 815
Section 1 Introduction
1.1 This manual GUID-AB423A30-13C2-46AF-B7FE-A73BB425EB5F v21
The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per function. The
manual can be used as a technical reference during the engineering phase, installation and
commissioning phase, and during normal service.
The technical data stated in this document are only valid under the following circumstances:
1. Main current transformers with 1 A or 2 A secondary rating are wired to the IED 1 A rated CT
inputs.
2. Main current transformer with 5 A secondary rating are wired to the IED 5 A rated CT inputs.
3. CT and VT ratios in the IED are set in accordance with the associated main instrument
transformers. Note that for functions which measure an analogue signal which do not have
corresponding primary quantity the 1:1 ratio shall be set for the used analogue inputs on the
IED. Example of such functions are: HZPDIF, ROTIPHIZ and STTIPHIZ.
4. Parameter IBase used by the tested function is set equal to the rated CT primary current.
5. Parameter UBase used by the tested function is set equal to the rated primary phase-to-phase
voltage.
6. Parameter SBase used by the tested function is set equal to:
• √3 × IBase × UBase
7. The rated secondary quantities have the following values:
• Rated secondary phase current Ir is either 1 A or 5 A depending on selected TRM.
• Rated secondary phase-to-phase voltage Ur is within the range from 100 V to 120 V.
• Rated secondary power for three-phase system Sr = √3 × Ur × Ir
8. For operate and reset time testing, the default setting values of the function and BOM module
are used if not explicitly stated otherwise.
All reset times are measured using BOM output contacts if not explicitly stated otherwise. The
operate/reset times are determined by characteristics of the output module used.
9. During testing, signals with rated frequency have been injected if not explicitly stated otherwise.
This manual addresses system engineers and installation and commissioning personnel, who use
technical data during engineering, installation and commissioning, and in normal service.
The system engineer must have a thorough knowledge of protection systems, protection equipment,
protection functions and the configured functional logic in the IEDs. The installation and
commissioning personnel must have a basic knowledge in handling electronic equipment.
Decommissioning
Commissioning
Maintenance
Engineering
Operation
Installing
Engineering manual
Installation manual
Commissioning manual
Operation manual
Application manual
Technical manual
Communication
protocol manual
Cyber security
deployment guideline
IEC07000220-4-en.vsd
IEC07000220 V4 EN-US
The installation manual contains instructions on how to install the IED. The manual provides
procedures for mechanical and electrical installation. The chapters are organized in the chronological
order in which the IED should be installed.
The commissioning manual contains instructions on how to commission the IED. The manual can
also be used by system engineers and maintenance personnel for assistance during the testing
phase. The manual provides procedures for the checking of external circuitry and energizing the IED,
parameter setting and configuration as well as verifying settings by secondary injection. The manual
describes the process of testing an IED in a station which is not in service. The chapters are
organized in the chronological order in which the IED should be commissioned. The relevant
procedures may be followed also during the service and maintenance activities.
The operation manual contains instructions on how to operate the IED once it has been
commissioned. The manual provides instructions for the monitoring, controlling and setting of the
IED. The manual also describes how to identify disturbances and how to view calculated and
measured power grid data to determine the cause of a fault.
The application manual contains application descriptions and setting guidelines sorted per function.
The manual can be used to find out when and for what purpose a typical protection function can be
used. The manual can also provide assistance for calculating settings.
The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per function. The
manual can be used as a technical reference during the engineering phase, installation and
commissioning phase, and during normal service.
The communication protocol manual describes the communication protocols supported by the IED.
The manual concentrates on the vendor-specific implementations.
The point list manual describes the outlook and properties of the data points specific to the IED. The
manual should be used in conjunction with the corresponding communication protocol manual.
The cyber security deployment guideline describes the process for handling cyber security when
communicating with the IED. Certification, Authorization with role based access control, and product
engineering for cyber security related events are described and sorted by function. The guideline can
be used as a technical reference during the engineering phase, installation and commissioning
phase, and during normal service.
The electrical warning icon indicates the presence of a hazard which could result in
electrical shock.
The warning icon indicates the presence of a hazard which could result in personal injury.
The caution hot surface icon indicates important information or warning about the
temperature of product surfaces.
Class 1 Laser product. Take adequate measures to protect the eyes and do not view
directly with optical instruments.
The caution icon indicates important information or warning related to the concept
discussed in the text. It might indicate the presence of a hazard which could result in
corruption of software or damage to equipment or property.
The information icon alerts the reader of important facts and conditions.
The tip icon indicates advice on, for example, how to design your project or how to use a
certain function.
Although warning hazards are related to personal injury, it is necessary to understand that under
certain operational conditions, operation of damaged equipment may result in degraded process
performance leading to personal injury or death. It is important that the user fully complies with all
warning and cautionary notices.
• Abbreviations and acronyms in this manual are spelled out in the glossary. The glossary also
contains definitions of important terms.
• Push button navigation in the LHMI menu structure is presented by using the push button icons.
For example, to navigate between the options, use and .
• HMI menu paths are presented in bold.
For example, select Main menu/Settings.
• LHMI messages are shown in Courier font.
For example, to save the changes in non-volatile memory, select Yes and press .
• Parameter names are shown in italics.
For example, the function can be enabled and disabled with the Operation setting.
• Each function block symbol shows the available input/output signal.
• the character ^ in front of an input/output signal name indicates that the signal name may
be customized using the PCM600 software.
• the character * after an input signal name indicates that the signal must be connected to
another function block in the application configuration to achieve a valid application
configuration.
• Dimensions are provided both in inches and millimeters. If it is not specifically mentioned then
the dimension is in millimeters.
• Logic diagrams describe the signal logic of the function block and are bordered by dashed lines.
In a logic diagram, input and output signal paths are shown as lines that touch the outer border
of the diagram. Input signals are always on the left-hand side and output signals are on the
right-hand side.
Input and output signals can be configured using PCM600. They can be connected to the inputs
and outputs of other functions and to binary inputs and outputs. Examples of input signals are
BLKTR, BLOCK, and VTSZ. Examples of output signals are TRIP, START, STL1, STL2, and
STL3.
• Frames with a shaded area on the right-hand side represent setting parameters. These
parameters can only be set via the PST or LHMI. Their values are high (1) only when the
corresponding setting parameter is set to the symbolic value specified within the frame.
Example is the signal Timer tPP=On. Their logical values correspond automatically to the
selected setting value.
• Internal signals are illustrated graphically and end approximately 2 mm from the frame
edge. If an internal signal path cannot be drawn with a continuous line, the same signal
name is used where the signal should continue, see figure 2 and figure 3. Example of the
internal signal is BLK.
• Signal paths that extend beyond the logic diagram and continue in another diagram will be
approximately 2 mm from the frame edge, see figure 3 and figure 4. Examples are
STNDL1N, STNDL2N, STNDL3N, STNDL1L2, STNDL2L3, and STNDL3L1.
STZMPP
OR
STCND
AND STNDL1L2
L1L2
STNDL2L3
L2L3 AND
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STPE
OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK
99000557-2.vsd
IEC99000557-TIFF V3 EN-US
IEC00000488-TIFF V1 EN-US
Timer tPP=On
STZMPP AND tPP
AND
t
BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR
IEC09000887-3-en.vsdx
IEC09000887 V3 EN-US
Illustrations are used as an example and might show other products than the one the
manual describes. The example that is illustrated is still valid.
1.5 IEC 61850 Edition 1, Edition 2, and Edition 2.1 mapping GUID-C5133366-7260-4C47-A975-7DBAB3A33A96 v10
Function block names are used in ACT and PST to identify functions. Respective function block
names of Edition 1, Edition 2, and Edition 2.1 logical nodes are shown in the table below.
Function block name Edition 1 logical nodes Edition 2 and Edition 2.1 logical
nodes
- - ALGOS
- - ALSVS
AGSAL AGSAL AGSAL
SECLLN0
ALMCALH ALMCALH ALMCALH
ALTIM - ALTIM
ALTMS - ALTMS
ALTRK - ALTRK
APPTEF APPTEF APPTEF
BRCPTOC BRCPTOC BRCPTOC
BRPTOC BRPTOC BRPTOC
BTIGAPC B16IFCVI BTIGAPC
CCPDSC CCRPLD CCPDSC
Table continues on next page
Function block name Edition 1 logical nodes Edition 2 and Edition 2.1 logical
nodes
CCRBRF CCRBRF CCRBRF
CCSSPVC CCSRDIF CCSSPVC
CMMXU CMMXU CMMXU
CMSQI CMSQI CMSQI
CVMMXN CVMMXN CVMMXN
DELISPVC DELISPVC DELISPVC
DELSPVC DELSPVC DELSPVC
DELVSPVC DELVSPVC DELVSPVC
DPGAPC DPGGIO DPGAPC
DRPRDRE DRPRDRE DRPRDRE
ECPSCH ECPSCH ECPSCH
ECRWPSCH ECRWPSCH ECRWPSCH
EF4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR GEN4PHAR
GEN4PHAR PH1PTOC
PH1PTOC
EFPIOC EFPIOC EFPIOC
ETPMMTR ETPMMTR ETPMMTR
FLTMMXU FLTMMXU FLTMMXU
FUFSPVC SDDRFUF FUFSPVC
GUPPDUP GUPPDUP GUPPDUP
PH1PTRC
GOPPDOP GOPPDOP GOPPDOP
PH1PTRC
INDCALH INDCALH INDCALH
ITBGAPC IB16FCVB ITBGAPC
L4UFCNT L4UFCNT L4UFCNT
LCPTTR LCPTTR LCPTTR
LD0LLN0 LLN0 LLN0
LFPTTR LFPTTR LFPTTR
LMBRFLO LMBRFLO LMBRFLO
LOVPTUV LOVPTUV LOVPTUV
LPHD LPHD LPHD
MVGAPC MVGGIO MVGAPC
NS4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR PH1PTOC
GEN4PHAR
PH1PTOC
OC4PTOC OC4LLN0 GEN4PHAR
GEN4PHAR PH3PTOC
PH3PTOC PH3PTRC
PH3PTRC
OOSPPAM OOSPPAM OOSPPAM
OOSPTRC
OV2PTOV GEN2LLN0 OV2PTOV
OV2PTOV PH1PTRC
PH1PTRC
PCFCNT PCGGIO PCFCNT
PHPIOC PHPIOC PHPIOC
Table continues on next page
Function block name Edition 1 logical nodes Edition 2 and Edition 2.1 logical
nodes
PSLPSCH PSLPSCH PSLPSCH
QCBAY QCBAY BAY/LLN0
QCRSV QCRSV QCRSV
RCHLCCH RCHLCCH RCHLCCH
ROV2PTOV GEN2LLN0 PH1PTRC
PH1PTRC ROV2PTOV
ROV2PTOV
SAPFRC SAPFRC SAPFRC
SAPTUF SAPTUF SAPTUF
SAPTOF SAPTOF SAPTOF
SCHLCCH SCHLCCH SCHLCCH
SDEPSDE SDEPSDE SDEPSDE
SDEPTOC
SDEPTOV
SDEPTRC
SESRSYN RSY1LLN0 AUT1RSYN
AUT1RSYN MAN1RSYN
MAN1RSYN SYNRSYN
SYNRSYN
SLGAPC SLGGIO SLGAPC
SMBRREC SMBRREC SMBRREC
SMPPTRC SMPPTRC SMPPTRC
SP16GAPC SP16GGIO SP16GAPC
SPC8GAPC SPC8GGIO SPC8GAPC
SPGAPC SPGGIO SPGAPC
SSCBR SSCBR SSCBR
SSIMG SSIMG SSIMG
SSIML SSIML SSIML
STBPTOC STBPTOC STBPTOC
SXCBR SXCBR SXCBR
SXSWI SXSWI SXSWI
TEIGAPC TEIGGIO TEIGAPC
TEILGAPC TEILGGIO TEILGAPC
TMAGAPC TMAGGIO TMAGAPC
TRPTTR TRPTTR TRPTTR
UV2PTUV GEN2LLN0 PH1PTRC
PH1PTRC UV2PTUV
UV2PTUV
VMMXU VMMXU VMMXU
VMSQI VMSQI VMSQI
VNMMXU VNMMXU VNMMXU
VSGAPC VSGGIO VSGAPC
VRPVOC VRLLN0 PH1PTRC
PH1PTRC PH1PTUV
PH1PTUV VRPVOC
VRPVOC
WRNCALH WRNCALH WRNCALH
ZCLCPSCH ZCLCPLAL ZCLCPSCH
ZCPSCH ZCPSCH ZCPSCH
ZCRWPSCH ZCRWPSCH ZCRWPSCH
Table continues on next page
Function block name Edition 1 logical nodes Edition 2 and Edition 2.1 logical
nodes
ZCVPSOF ZCVPSOF ZCVPSOF
ZMFPDIS ZMFLLN0 PSFPDIS
PSFPDIS PSFPDIS
ZMFPDIS ZMFPDIS
ZMFPTRC ZMFPTRC
ZMMMXU ZMMMXU
ZMRPSB ZMRPSB ZMRPSB
The following tables list all the functions available in the IED. Those functions that are not
exposed to the user or do not need to be configured are not described in this manual.
IEC 61850 or
ANSI Function description Line Distance
function name
REL650 (A11) REL650 (A12)
Impedance protection
ZMFPDIS 21 Distance protection, quad and mho characteristic 1 1
PPL2PHIZ Phase preference logic 1
ZMRPSB 68 Power swing detection, blocking 1 1
PSLPSCH Power swing logic 1 1
OOSPPAM 78 Out-of-step protection 1 1
ZCVPSOF Automatic switch onto fault logic, voltage and current based 1 1
IEC 61850 or
ANSI Function description Line Distance
function name
REL650 (A11) REL650 (A12)
Current protection
PHPIOC 50 Instantaneous phase overcurrent protection 1 1
OC4PTOC 51_671) Directional phase overcurrent protection, four steps 1 1
EFPIOC 50N Instantaneous residual overcurrent protection 1 1
EF4PTOC 51N_67N2) Directional residual overcurrent protection, four steps 1 1
NS4PTOC 46I2 Directional negative phase sequence overcurrent protection, 1 1
four steps
SDEPSDE 67N Sensitive directional residual overcurrent and power 1
protection
LCPTTR 26 Thermal overload protection, one time constant, Celsius 1 1
LFPTTR 26 Thermal overload protection, one time constant, Fahrenheit 1 1
TRPTTR 49 Thermal overload protection, two time constants 1
CCRBRF 50BF Breaker failure protection 1 1
STBPTOC 50STB Stub protection 1
CCPDSC 52PD Pole discordance protection 1 1
BRCPTOC 46 Broken conductor check 1 1
Table continues on next page
IEC 61850 or
ANSI Function description Line Distance
function name
REL650 (A11) REL650 (A12)
VRPVOC 51V Voltage restrained overcurrent protection 1
APPTEF 67NT Average power transient earth fault protection 1
BRPTOC 50 Overcurrent protection with binary release 1 1
Voltage protection
UV2PTUV 27 Two step undervoltage protection 1 1
OV2PTOV 59 Two step overvoltage protection 1 1
ROV2PTOV 59N Residual overvoltage protection, two steps 1 1
LOVPTUV 27 Loss of voltage check 1
Frequency protection
SAPTUF 81 Underfrequency protection 1 1
SAPTOF 81 Overfrequency protection 1 1
SAPFRC 81 Rate-of-change of frequency protection 1 1
1) 67 requires voltage
2) 67N requires voltage
Analog input channels must be configured and set properly in order to get correct measurement
results and correct protection operations. For power measuring, all directional and differential
functions, the directions of the input currents must be defined in order to reflect the way the current
transformers are installed/connected in the field ( primary and secondary connections ). Measuring
and protection algorithms in the IED use primary system quantities. Setting values are in primary
quantities as well and it is important to set the data about the connected current and voltage
transformers properly.
An AISVBAS reference PhaseAngleRef can be defined to facilitate service values reading. This
analog channel's phase angle will always be fixed to zero degrees and remaining analog channel's
phase angle information will be shown in relation to this analog input. During testing and
commissioning of the IED, the reference channel can be changed to facilitate testing and service
values reading.
The IED has the ability to receive analog values from primary equipment, that are
sampled by Merging units (MU) connected to a process bus, via the IEC 61850-9-2 LE
protocol.
The availability of VT inputs depends on the ordered transformer input module (TRM)
type.
The hardware channels appear in the signal matrix tool (SMT) and in ACT when a TRM is
included in the configuration with the hardware configuration tool. In the SMT or the ACT,
they can be mapped to the desired virtual input (SMAI) of the IED and used internally in
the configuration.
3.3 Signals
PID-3923-OUTPUTSIGNALS v7
PID-3924-OUTPUTSIGNALS v7
PID-6598-OUTPUTSIGNALS v6
3.4 Settings
SEMOD129840-4 v2
Dependent on ordered IED type.
PID-4153-SETTINGS v8
GUID-72A8BEE0-2430-4C94-A1E0-9B6A0D149FE2 v2
All the visible parameter selections are not supported by the 650-series IED.
PID-3923-SETTINGS v7
PID-3924-SETTINGS v7
PID-6598-SETTINGS v6
PID-3923-MONITOREDDATA v6
PID-3924-MONITOREDDATA v6
PID-6598-MONITOREDDATA v6
The direction of a measured current depends on the connection of the CT. The main CTs are typically
star connected and can be connected with the star point towards the object or away from the object.
This information must be set in the IED.
Once the CT direction settings is correctly entered the internal IED convention of the directionality is
defined as follows:
• Positive value of current or power means that the quantity has the direction into the protected
object.
• Negative value of current or power means that the quantity has the direction out from the
protected object.
For directional functions the directional conventions are defined as follows (see Figure 5)
en05000456.vsd
IEC05000456 V1 EN-US
The settings of the IED is performed in primary values. The ratios of the main CTs and VTs are,
therefore, basic data for the IED. The user has to set the rated secondary and primary currents and
voltages of the CTs and VTs to provide the IED with their rated ratios.
The CT and VT ratio and the name on respective channel is done under IED Configuration /HW
Configuration /ADM in the Parameter Settings Tool or under Main menu /Configuration /Analog
modules in the HMI.
M16988-1 v11
Table 18: TRM - Energizing quantities, rated values and limits for protection transformer
Description Value
Frequency
Rated frequency fr 50/60 Hz
Operating range fr ± 10%
Current inputs
Rated current Ir 1 or 5 A
Operating range (0-100) x Ir
Thermal withstand 100 × Ir for 1 s *)
30 × Ir for 10 s
10 × Ir for 1 min
4 × Ir continuously
Description Value
Dynamic withstand 250 × Ir one half wave
Burden < 20 mVA at Ir = 1 A
< 150 mVA at Ir = 5 A
*) max. 350 A for 1 s when COMBITEST test switch is included.
Voltage inputs **)
Rated voltage Ur 110 or 220 V
Operating range 0 - 340 V
Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
**) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency
SEMOD53376-2 v6
The debounce filter eliminates bounces and short disturbances on a binary input.
A time counter is used for filtering. The time counter is increased once in a millisecond when a binary
input is high, or decreased when a binary input is low. A new debounced binary input signal is
forwarded when the time counter reaches the set DebounceTime value and the debounced input
value is high or when the time counter reaches 0 and the debounced input value is low. The default
setting of DebounceTime is 1 ms.
The binary input ON-event gets the time stamp of the first rising edge, after which the counter does
not reach 0 again. The same happens when the signal goes down to 0 again.
Binary input wiring can be very long in substations and there are electromagnetic fields from for
example nearby breakers. An oscillation filter is used to reduce the disturbance from the system
when a binary input starts oscillating.
An oscillation counter counts the debounced signal state changes during 1 s. If the counter value is
greater than the set value OscBlock, the input signal is blocked. The input signal is ignored until the
oscillation counter value during 1 s is below the set value OscRelease.
4.1.3 Settings
GUID-07348953-4A72-444B-A31A-030ABEA8E0C4 v1
OscBlock must always be set to a value greater than OscRelease. If this is not done,
oscillation detection will not function correctly, and the resulting behaviour will be
undefined.
Instead of the LHMI the Remote IED Access tool, RIA600, can be used and perform all of
the actions that a physical LHMI can.
Information about LHMI working procedures is also valid when the operation is performed
through RIA600. For more information on RIA600 operations, see manual Remote HMI
client RIA600 user guide (1MRK 511 619-UEN).
5.1.1 Identification
GUID-84392EFF-4D3F-4A67-A6ED-34C6E98574D6 v1
5.1.2 Settings
5.2.1 Identification
GUID-03AB7AEE-87D3-4F3C-B6B9-B1EB1B538E38 v1
LHMICTRL
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
IEC09000320-1-en.vsd
IEC09000320 V1 EN-US
5.2.3 Signals
PID-3992-INPUTSIGNALS v6
PID-3992-OUTPUTSIGNALS v6
5.3.1 Identification
GUID-6E36C0BC-F284-4C88-A4A8-9535D3BE8B14 v2
GRP2_LED1 -
GRP2_LED15
GRP3_LED1 -
GRP3_LED15
LEDGEN
BLOCK NEWIND
RESET ACK
IEC09000321-1-en.vsd
IEC09000321 V1 EN-US
GRP1_LED1
^HM1L01R
^HM1L01Y
^HM1L01G
IEC09000322 V1 EN-US
5.3.3 Signals
PID-4114-INPUTSIGNALS v5
PID-4114-OUTPUTSIGNALS v5
PID-1697-INPUTSIGNALS v18
5.3.4 Settings
PID-4114-SETTINGS v6
PID-1697-SETTINGS v18
5.4 LCD part for HMI function keys control module GUID-EECAE7FA-7078-472C-A429-F7607DB884EB v2
5.4.1 Identification
GUID-E6611022-5EA3-420D-ADCD-9D1E7604EFEB v1
FNKEYMD1
ENABLE ^FKEYOUT1
^LEDCTL1
IEC09000327 V2 EN-US
5.4.3 Signals
PID-7424-INPUTSIGNALS v1
PID-7424-OUTPUTSIGNALS v1
5.4.4 Settings
PID-7424-SETTINGS v1
PID-7990-SETTINGS v1
GUID-BCE87D54-C836-40EE-8DA7-779B767059AB v2
For setting ReqAuthority, when users are configured through local or central account
management, the default behavior of the function keys are to only operate if a user is
logged in, and the user have the required rights. This authentication check can be
configured to be bypassed per function key by changing the ReqAuthority from ON to
OFF. To be able to change this, the user changing it have to have the Security advanced
right.
MenuShortcut values are product dependent and created dynamically depending on the product
main menu.
IEC13000239 V4 EN-US
• Keypad
• Display (LCD)
• LED indicators
• Communication port for PCM600
The LHMI keypad contains push-buttons which are used to navigate in different views or menus. The
push-buttons are also used to acknowledge alarms, reset indications, provide help and switch
between local and remote control mode.
The keypad also contains programmable push-buttons that can be configured either as menu
shortcut or control buttons.
IEC15000157 V3 EN-US
Figure 11: LHMI keypad with object control, navigation and command push-buttons and
RJ-45 communication port
The LHMI includes a graphical monochrome liquid crystal display (LCD) with a resolution of 320 x
240 pixels. The character size can vary. The amount of characters and rows fitting the view depends
on the character size and the view that is shown.
IEC15000270-1-en.vsdx
IEC15000270 V1 EN-US
1 Path
2 Content
3 Status
4 Scroll bar (appears when needed)
• The path shows the current location in the menu structure. If the path is too long to be shown, it
is truncated from the beginning, and the truncation is indicated with three dots.
• The content area shows the menu content.
• The status area shows the current IED time, the user that is currently logged in and the object
identification string which is settable via the LHMI or with PCM600.
• If text, pictures or other items do not fit in the display, a vertical scroll bar appears on the right.
The text in content area is truncated from the beginning if it does not fit in the display
horizontally. Truncation is indicated with three dots.
IEC15000138-1-en.vsdx
IEC15000138 V1 EN-US
The function key button panel shows on request what actions are possible with the function buttons.
Each function button has a LED indication that can be used as a feedback signal for the function
button control action. The LED is connected to the required signal with PCM600.
IEC13000281-1-en.vsd
GUID-C98D972D-D1D8-4734-B419-161DBC0DC97B V1 EN-US
IEC13000240-1-en.vsd
GUID-5157100F-E8C0-4FAB-B979-FD4A971475E3 V1 EN-US
The LHMI includes three status LEDs above the display: Ready, Start and Trip.
There are 15 programmable indication LEDs on the front of the LHMI. Each LED can indicate three
states with the colors: green, yellow and red. The texts related to each three-color LED are divided
into three panels.
There are 3 separate panels of LEDs available. The 15 physical three-color LEDs in one LED group
can indicate 45 different signals. Altogether, 135 signals can be indicated since there are three LED
groups. The LEDs are lit according to priority, with red being the highest and green the lowest priority.
For example, if on one panel there is an indication that requires the green LED to be lit, and on
another panel there is an indication that requires the red LED to be lit, the red LED takes priority and
is lit. The LEDs can be configured with PCM600 and the operation mode can be selected with the
LHMI or PCM600.
Information panels for the indication LEDs are shown by pressing the Multipage button. Pressing that
button cycles through the three pages. A lit or un-acknowledged LED is indicated with a highlight.
Such lines can be selected by using the Up/Down arrow buttons. Pressing the Enter key shows
details about the selected LED. Pressing the ESC button exits from information pop-ups as well as
from the LED panel as such.
The Multipage button has a LED. This LED is lit whenever any LED on any panel is lit. If there are
un-acknowledged indication LEDs, then the Multipage LED blinks. To acknowledge LEDs, press the
Clear button to enter the Reset menu (refer to description of this menu for details).
There are two additional LEDs which are next to the control buttons and . These LEDs can
indicate the status of two arbitrary binary signals by configuring the OPENCLOSE_LED function
block. For instance, OPENCLOSE_LED can be connected to a circuit breaker to indicate the breaker
open/close status on the LEDs.
IEC16000076-1-en.vsd
IEC16000076 V1 EN-US
The function blocks LEDGEN and GRP1_LEDx, GRP2_LEDx and GRP3_LEDx (x=1-15) controls
and supplies information about the status of the indication LEDs. The input and output signals of the
function blocks are configured with PCM600. The input signal for each LED is selected individually
using SMT or ACT. Each LED is controlled by the GRPn_LEDx (n=1-3) function block that controls
the color and the operating mode.
Each indication LED on local HMI can be set individually to operate in 6 different sequences; two as
follow type and four as latch type. Two of the latching sequence types are intended to be used as a
protection indication system, either in collecting or restarting mode, with reset functionality. The other
two are intended to be used as signalling system in collecting mode with acknowledgment
functionality.
There are three status LEDs above the LCD in front of the IED: green, yellow and red.
The green LED has a fixed function that presents the healthy status of the IED. The yellow and red
LEDs are user configured. The yellow LED can be used to indicate that a disturbance report is
triggered (steady) or that the IED is in test mode (flashing). The red LED can be used to indicate a
trip command.
• Green LED: unlit > no power; blinking > startup or abnormal situation (IED is not in service);
steady > IED is in service
• Yellow LED: unlit > no attention required; blinking > IED is in Testmode (IED is not in normal
service), or IED is in simulation mode or IED IEC 61850 mod value is set other than its normal
value; steady > at least one of the signals configured to turn the yellow LED on has been active
• Red LED: unlit > no attention required; blinking > user performs a common write from PCM600;
steady > at least one of the signals configured to turn the red LED on has been active
The yellow and red status LEDs are configured in the disturbance recorder function, DRPRDRE, by
connecting a start or trip signal from the actual function to a BxRBDR binary input function block
using the PCM600, and configuring the setting to Off, Start or Trip for that particular signal.
Collecting mode
• LEDs that are used in the collecting mode of operation are accumulated continuously until the
unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified
alarm system. When all three inputs (red, yellow and green) are connected to different sources
of events for the same function block, collecting mode shows the highest priority LED color that
was activated since the latest acknowledgment was made. If a number of different indications
were made since the latest acknowledgment, it is not possible to get a clear view of what
triggered the latest event without looking at the sequence of events list. A condition for getting
the sequence of events is that the signals have been engineered in the disturbance recorder.
Re-starting mode
• In the re-starting mode of operation each new start resets all previous active LEDs and activates
only those which appear during one disturbance. Only LEDs defined for re-starting mode with
the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a new
disturbance. A disturbance is defined to end a settable time after the reset of the activated input
signals or when the maximum time limit has elapsed. In sequence 6, the restarting or reset
mode means that upon occurrence of any new event, all previous indications will be reset. This
facilitates that only the LED indications related to the latest event is shown.
Acknowledgment/reset GUID-E6727E8F-C28B-4295-AE21-BC5643363805 v3
• Automatic reset
• The automatic reset can only be performed for LED indications defined for re-starting
mode with the latched sequence type 6 (LatchedReset-S). When the automatic reset of
the LEDs has been performed, still persisting indications will be indicated with a steady
light.
The figures below show the function of available sequences selectable for each LED separately. The
following 6 sequences are available:
• Sequence 1: Follow-S
• Sequence 2: Follow-F
• Sequence 3: LatchedAck-F-S
• Sequence 4: LatchedAck-S-F
• Sequence 5: LatchedColl-S
• Sequence 6: LatchedReset-S
For sequence 1 and 2, which are of the Follow type, the acknowledgment (Ack ) /reset function is not
applicable because the indication shown by the LED follows its input signal. Sequence 3 and 4,
which are of the Latched type with acknowledgement, are only working in collecting (Coll) mode.
Sequence 5 is working according to Latched type and collecting mode while Sequence 6 is working
according to Latched type and re-starting (Reset) mode. The letters S and F in the sequence names
have the meaning S = Steady and F = Flash.
At the activation of the input signal to any LED, the indication on the corresponding LED obtains a
color that corresponds to the activated input, and operates according to the selected sequence
diagrams shown below.
In the sequence diagrams the different statuses of the LEDs are shown using the following symbols:
Activating
signal
LED
IEC01000228_2_en.vsd
IEC01000228 V2 EN-US
Activating
signal GREEN
Activating
signal RED
LED G G R G
IEC09000312_1_en.vsd
IEC09000312 V1 EN-US
Activating
signal
LED
Acknow.
en01000231.vsd
IEC01000231 V1 EN-US
The sequence described below is valid only if the same function block is used for all three
colour LEDs.
When an acknowledgment is performed, all indications that appear before the indication with higher
priority has been reset, will be acknowledged, independent of if the low priority indication appeared
before or after acknowledgment. In figure 21 it is shown the sequence when a signal of lower priority
becomes activated after acknowledgment has been performed on a higher priority signal. The low
priority signal will be shown as acknowledged when the high priority signal resets.
Activating
signal GREEN
Activating
signal RED
R R G
LED
Acknow
IEC09000313_1_en.vsd
IEC09000313 V1 EN-US
Activating
signal GREEN
Activating
signal YELLOW
Activating
signal RED
LED G Y R R Y
Acknow.
IEC09000314-1-en.vsd
IEC09000314 V1 EN-US
Activating
signal GREEN
Activating
signal YELLOW
Activating
signal RED
LED G G R R Y
Acknow.
IEC09000315-1-en.vsd
IEC09000315 V1 EN-US
Activating
signal
LED
Reset
IEC01000235_2_en.vsd
IEC01000235 V2 EN-US
Activating
signal GREEN
Activating
signal RED
R G
LED
Reset
IEC09000316_1_en.vsd
IEC09000316 V1 EN-US
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000239_2-en.vsd
IEC01000239 V2 EN-US
Figure 26: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
Figure 27 shows the timing diagram for a new indication after tRestart time has elapsed.
Disturbance Disturbance
tRestart tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000240_2_en.vsd
IEC01000240 V2 EN-US
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000241_2_en.vsd
IEC01000241 V2 EN-US
Figure 28: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
but with reset of activating signal between
Figure 29 shows the timing diagram for manual reset.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000242_2_en.vsd
IEC01000242 V2 EN-US
Local Human-Machine-Interface (LHMI) has five function buttons, directly to the left of the LCD, that
can be configured either as menu shortcut or control buttons. Each button has an indication LED that
can be configured in the application configuration.
When used as a menu shortcut, a function button provides a fast way to navigate between default
nodes in the menu tree. When used as a control, the button can control a binary signal.
Each output on the FNKEYMD1 - FNKEYMD5 function blocks can be controlled from the LHMI
function keys. By pressing a function button on the LHMI, the output status of the actual function
block will change. These binary outputs can in turn be used to control other function blocks, for
example, switch control blocks, binary I/O outputs etc.
FNKEYMD1 - FNKEYMD5 function block also has a number of settings and parameters that control
the behavior of the function block. These settings and parameters are normally set using the PST.
Setting OFF
Input value
Output value
IEC09000330-2-en.vsd
IEC09000330 V2 EN-US
In this mode the output toggles each time the function key has been pressed for more than 500ms.
Note that the input attribute is reset each time the function block executes. The function block
execution is marked with a dotted line below.
Input value
500ms 500ms 500ms
Output value
IEC09000331_1_en.vsd
IEC09000331 V2 EN-US
In this mode the output sets high (1) when the function key has been pressed for more than 500ms
and remains high according to set pulse time. After this time the output will go back to 0. The input
attribute is reset when the function block detects it being high and there is no output pulse.
Note that the third positive edge on the input attribute does not cause a pulse, since the edge was
applied during pulse output. A new pulse can only begin when the output is zero; else the trigger
edge is lost.
Input value
500ms 500ms 500ms 500ms
IEC09000332_2_en.vsd
IEC09000332 V2 EN-US
When users are configured through local or central account management, the default behavior of the
function keys are to only operate if a user is logged in, and the user have the required rights. This
authentication check can be configured to be bypassed per function key by changing the
ReqAuthority from ON to OFF. To be able to change this, the user changing it have to have the
Security advanced right.
Authority can be disabled using parameter Authority. Each function key has the parameter Authority,
which can be enabled or disabled using LHMI or PCM 600. User must have Security Advanced rights
to configure the Authority parameter of the function key.
Z
S00346 V2 EN-US
The ZMFPDIS function is a seven zone full scheme protection with three fault loops for phase-to-
phase faults and three fault loops for phase-to-earth faults for each of the independent zones, which
makes the function suitable for applications with single-phase autoreclosing.
In each measurement zone, ZMFPDIS function is designed with the flexibility to operate in either
quadrilateral or mho characteristic mode for separate phase-to-earth or phase-to-phase loops.
A built-in adaptive load compensation algorithm prevents overreaching of the distance zones in the
load exporting end during phase-to-earth faults on heavily loaded power lines. It also reduces
underreach in the importing end.
The ZMFPDIS function block itself incorporates a phase-selection element and a directional element,
contrary to previous designs in the 600-series, where these elements were represented with
separate function-blocks.
The operation of the phase-selection element is primarily based on current change criteria (i.e. delta
quantities), with significantly increased dependability. There is also a phase selection criterion
operating in parallel which bases its operation only on voltage and current phasors.
The directional element utilizes a set of well-established quantities to provide fast and correct
directional decision during various power system operating conditions, including close-in three-phase
faults, simultaneous faults and faults with only zero-sequence in-feed.
The ZMFPDIS function is also equipped with the parallel line mutual coupling compensation feature
based on the parallel line residual current.
ZMFPDIS
I3P* TRIP
U3P* TRZ1
INP TRL1Z1
BLOCK TRL2Z1
VTSZ TRL3Z1
BLKZ1 TRZ2
BLKZ2 TRL1Z2
BLKZ3 TRL2Z2
BLKZ4 TRL3Z2
BLKZ5 TRZ3
BLKZRV TRZ4
BLKZBU TRZ5
BLKTRZ1 TRZRV
BLKTRZ2 TRZBU
BLKTRZ3 START
BLKTRZ4 STZ1
BLKTRZ5 STNDZ1
BLKTRZRV STZ2
BLKTRZBU STL1Z2
EXTNST STL2Z2
ORCND STL3Z2
RELCNDZ1 STNDZ2
RELCNDZ2 STZ3
RELCNDZ3 STNDZ3
RELCNDZ4 STZ4
RELCNDZ5 STNDZ4
RELCNDZRV STZ5
RELCNDZBU STNDZ5
STZRV
STL1ZRV
STL2ZRV
STL3ZRV
STNDZRV
STZBU
STNDZBU
STND
STNDL1
STNDL2
STNDL3
STNDPE
STFWL1
STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
IEC11000433 V7 EN-US
6.1.5 Signals
PID-8227-INPUTSIGNALS v1
PID-8227-OUTPUTSIGNALS v1
6.1.6 Settings
GUID-9E081C6B-4E31-4ED5-A4F9-9E4A80749741 v1
Settings, input and output names are sometimes mentioned in the following text without
its zone suffix (i.e. BLKZx instead of BLKZ3) when the description is equally valid for all
zones.
Practically all voltage, current and impedance quantities used within the ZMFPDIS function are
derived from fundamental frequency phasors filtered by a half cycle filter.
The phasor filter is frequency adaptive in the sense that its coefficients are changed based on the
estimated power system frequency.
A half cycle filter will not be able to reject both even and odd harmonics. So, while odd harmonics will
be completely attenuated, accuracy will be affected by even harmonics. Even harmonics will not
cause the distance zones to overreach however; instead there will be a slightly variable underreach,
on average in the same order as the magnitude ratio between the harmonic and fundamental
component.
The different fault loops within the IED are of full scheme type, which means that earth fault loop for
phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in
parallel.
Figure 34 presents an outline of the different measuring loops for the seven distance zones.
IEC05000458‐3‐en.vsdx
IEC05000458 V3 EN-US
Figure 34: The different measuring loops at phase-to-earth fault and phase-to-phase fault
Each distance protection zone performs like one independent distance protection function with seven
measuring elements.
Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to the
other; in fact, more diverse than can be distinguished by the algorithm itself in the course of a few
milliseconds. So, a setting (CVTtype) is introduced in order to inform the algorithm about the type of
CVT applied and thus providing the advantage of knowing how performance should be optimized,
even during the first turbulent milliseconds of the fault period.
There are two types of CVTs from the function point of view, the passive and the active type, which
refers to the type of ferro-resonance suppression device that is employed. The active type requires
more rigorous filtering which will have a negative impact on operate times. However, this will be
evident primarily at higher source impedance ratios (SIRs), SIR 5 and above, or close to the reach
limit.
The IEC 60044-5 transient classification is of little or no use in relation to this. It is not primarily the
damping of transients that is important; it is the frequency content of the transients that is decisive,
i.e. how difficult it is to filter out the specific frequency. So, even if two CVTs, one passive and the
other active type, comply with the same transient class, the active type requires more extensive
filtering in order to avoid transient overreach.
To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic is implemented. A circular characteristic exists for every measuring loop and
quadrilateral/mho characteristic. There are no specific reach settings for this circular zone. It uses the
normal quadrilateral/mho zone settings to determine a reach that will be appropriate. This implies
that the circular characteristic will always have somewhat shorter reach than the quadrilateral/mho
zone.
The operation of the phase-selection element is primarily based on current change criteria (i.e. delta
quantities) with significantly increased dependability. To handle this, there is also a phase selection
criterion operating in parallel which bases its operation only on voltage sequence component
phasors.
This continuous criteria will, in the vast majority of cases, operate in parallel and carry on the fault
indication after the current change phase has ended. Only in some particularly difficult faults on
heavily loaded lines, the continuous criteria might not be sufficient, for example, when the estimated
fault impedance resides within the load area defined by the load encroachment characteristic. In this
case, the indication will be restricted to a pulse lasting for one or two power system cycles.
The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-earth faults on heavily loaded lines. One exception, however, are
three-phase faults to which the load encroachment characteristic always has to be applied in order to
distinguish fault from load.
Phase-to-phase-earth faults (also called double earth faults) will practically always activate phase-to-
phase zone measurements. Measurement in two phase-to-earth loops at the same time is
associated with so-called simultaneous faults: two earth faults at the same time, one each on the two
circuits of a double line, or when the zero sequence current is relatively high due to a source with low
Z0/Z1 ratio. In these situations zone measurement will be released both for the related phase-to-
earth loops and the phase-to-phase loop simultaneously. On the other hand, simultaneous faults
closer to the remote bus will gradually take on the properties of a phase-to-phase-earth fault and the
function will eventually use phase-to-phase zone measurements also here.
In cases where the fault current infeed is more or less completely of zero sequence nature (all phase
currents in phase), the measurement will be performed in the phase-to-earth loops only for a phase-
to-phase-earth fault.
AND
2-phase Fault
I3P detected by
Impedance/ current
2-phase fault
U3P based Phase PHSLy
AND
selection
PHSLxLy
AND
OR
a
b a>b
250%
OR
a
b a>b
50% AND OR
a
b a<b
INMag
IL1Mag IN / Imax
IL2Mag
MAX
IL3Mag a ForcePE
b a<b
INReleasePE
IEC17000230-2-en.vsdx
IEC17000230 V2 EN-US
Figure 35 explains the release of two-phase faults (including simultaneous faults as well
as cross-country faults for high impedance earthed networks. This is not valid for single-
phase faults.
However, should it be desirable to use phase-to-earth (and only phase-to-earth) zone measurement
for phase-to-phase-earth faults, there is a setting INReleasePE that can be lowered from its
excessive default value to the level above which phase-to-earth measurement should be activated.
Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra security,
especially in making a very fast decision, this method is complemented with an equivalent
comparison where, instead of the phase current, the change in phase current is used. Moreover, a
basic negative sequence directional evaluation is taken into account as a reliable reference during
high load condition. Finally, a zero sequence directional evaluation is used whenever there is more or
less exclusive zero sequence in-feed.
The directional sectors that represent forward direction, one per measuring loop, are defined by the
following equations.
U PolL1
ArgDir arg ArgNegRes
I L1
U PolL1L 2
ArgDir arg ArgNegRes
I L1L 2
Where:
UPolL1 is the polarizing voltage for phase L1.
IL1 is the phase current in phase L1.
UPolL1L2 is the polarizing voltage difference between phase L1 and L2 (L2 lagging L1).
IL1L2 is the current difference between phase L1 and L2 (L2 lagging L1).
Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude of the
voltage is just as interesting as the phase. If there are symmetrical conditions and the measured per
phase positive sequence voltage magnitude is above 75% of the base voltage before the fault, the
pre-fault magnitude will be memorized and used as long as there is a fault. The phase angle however
will only be memorized (locked) for 75 ms at a time, not to lose synchronism with the real system
voltage.
Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and starts from Mho elements will be sealed-in and kept
static as long as there is a fault.
The ZMFPDIS function has to be blocked by an additional function like the Fuse failure supervision
(FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is used for this
purpose.
A built-in supervision feature within distance protection itself, based on phase current change, will
ensure that the FUFSPVC blocking signal is received in time. Namely, an intentional time delay will
be introduced if no current magnitude change greater than 5% of IBase has been detected for any of
the three phase currents.
There is need for external blocking of the ZMFPDIS function during power swings, either from the
Power Swing Blocking function (ZMRPSB) or an external device.
All ZMFPDIS zones operate according to the non-directional impedance characteristics presented in
figure 37 and figure 36. The phase-to-earth characteristic is given in ohms-per-loop domain while the
phase-to-phase characteristic is given in ohms-per-phase domain.
The voltage and current phasors after the half-cycle filter are used in fault loop equations.
For phase-to-phase faults (Figure 38, lower part), the calculated impedances from the relay to the
fault Z calc Rcalc j X calc follow Equation 3 (example is given for a phase L1 to phase L2 fault).
U L1 U L 2 I L1 I L 2 Z calc
IECEQUATION18003 V1 EN-US (Equation 3)
Where and represents the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3).
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-phase quadrilateral
characteristics. If is inside the non-directional phase-to-phase characteristic, the STNDZx output
is set to TRUE.
For phase-to-earth faults (Figure 38, upper part), the earth return compensation applies according to
Equation 4 (example for a phase L1 to earth fault).
U L1 I L1 K N 3I 0 p Z1 I F RF
IECEQUATION18007 V1 EN-US (Equation 4)
Where,
p is the fault location and RF is the calculated fault resistance. p and RF are unknown and needs to
be solved.
Z 0 Z1
KN
3 Z1
Z 0 R 0 Zx j X 0 Zx
Z1 R1Zx j X 1Zx
IECEQUATION18010 V1 EN-US
Where,
is the positive sequence reactance reach of the line in Ω/phase for phase-to-earth fault for zone
x (x = 1 to 5, BU or RV).
is the positive sequence resistive reach of the line in Ω/phase for phase-to-earth fault for zone x
(x = 1 to 5, BU or RV).
is the zero-sequence reactance reach of the line in Ω/phase for zone x (x = 1 to 5, BU or RV).
is the zero-sequence resistive reach of the line in Ω/phase for zone x (x = 1 to 5, BU or RV).
Table 39: Settings of positive and zero-sequence impedances for different zones
is the fault current. It is chosen among phase, zero or negative sequence currents automatically
by the built-in adaptive load compensation algorithm. If the system behind the relay cannot contribute
enough zero-sequence current, only phase or negative sequence current will be chosen.
The calculated impedances from the relay to the fault Z calc Rcalc j X calc can be represented as:
X calc p X 1Zx
IECEQUATION18017 V1 EN-US
Rcalc p R1Zx RF
IECEQUATION18018 V1 EN-US
When the two unknowns p and RF are solved from the equation 4 then the calculated Rcalc and Xcalc
values are compared with the non-directional phase-to-earth quadrilateral characteristics. If is
inside the non-directional phase-to-earth characteristic and the phase selection algorithm enables
this loop, the STNDZx output is set to TRUE.
The load compensation for zone 1 is achieved by estimating the impedance with three different
values of the IF current with:
• neutral current
• negative sequence current
• phase current.
Impedance estimation is based on the neutral current or negative sequence current essentially that
excludes the current component that causes the over-reach. The reactance values from all the
calculations shall effectively be within the zone reactive boundary in order to get the non-directional
start signal from the zone. This means that the under-reach, that is caused by the load import, is not
compensated.
For the other zones, it is enough in effect if the median value of the three is within the zone reach. If
the neutral current is not sufficient, then the negative sequence current based reactance will
represent the median value. If the negative sequence current is not sufficient, then the other
reactance has to be within the reach.
Zone 1 has individual positive sequence impedance settings for phase-to-phase and phase-to-earth
(X1PPZ1, R1PPZ1 and X1PEZ1, R1PEZ1). For the other zones, the positive sequence impedance
reach is common for phase-to-phase and phase-to-earth (X1Zx, R1Zx).
X (Ohm/phase)
X1Zx
R (Ohm/phase)
RFPPZx RFPPZx
2 2
X1Zx
X (Ohm/loop)
R1Zx+RNZx
RFPEZx RFPEZx
X0Zx-X1Zx
XNZx=
3
X1Zx+XNZx R0Zx-R1Zx
RNZx=
3
φN φN
R (Ohm/loop)
RFPEZx RFPEZx
X1Zx+XNZx
RFPEZx RFPEZx
R1Zx+RNZx IEC11000415-2-en.vsdx
IEC11000415 V2 EN-US
Phase-to-earth
RFPEZx
fault in phase L1
(Arc + tower
resistance)
0
IN (R0Zx-R1Zx)/3 +
j (X0Zx-X1Zx)/3 )
The estimated impedance needs to be inside both characteristics for the zone to start or trip. (The
non-directional start STNDZx is an exception however. It is only dependent on the quadrilateral
characteristic.)
In the following figure, it is shown how the X1PP setting can influence the shape of the quadrilateral
characteristic in the fourth quadrant for short line applications.
X (ohm)
X1PP’
X1PP
15° R (ohm)
RFPP/2
-X1PP
R· tan15°
-X1PP’
Line distance protection=IEC19000141=2=en-us=Original.vsdx
IEC19000141 V2 EN-US
Figure 39: Influence of X1PP setting on the quadrilateral shape in the fourth quadrant
Zones 2 to 5 and BU can be selected to be either forward or reverse with positive sequence
polarized mho characteristic; alternatively self polarized offset mho characteristics. The operating
characteristic is in accordance to figure 40 where zone 5 is selected offset mho.
X
ZBU X
Z4
Z3
ZS=0
Z2
Z1 R
Z5 R
ZS=Z1
ZRV
ZS=2Z1
IEC150000 56-2-en.vsdx
IEC15000056 V2 EN-US
Figure 40: Mho, offset mho characteristics and the source impedance influence on the mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing
the origin, as for the mho to the left of figure 40, which is only valid where the source impedance (Zs)
is zero, the crossing point is moved to the coordinates of the negative source impedance given an
expansion of the circle shown to the right of figure 40. Z1 denotes the complex positive sequence
impedance.
The magnitude of the polarizing voltage is determined completely by the positive sequence voltage
magnitude from before the fault. This will give a somewhat less dynamic expansion of the mho circle
during faults. However, if the source impedance is high, the dynamic expansion of the mho circle
might lower the security of the function too much with high loading and mild power swing conditions.
ZMFPDIS fixes zone 1 in Forward mode and zone RV in Reverse mode. Zone 2 to 5 and BU can be
set to Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x = 2 to 5 or
BU depending on selected zone).
X X X
(a) Rset (b) (c) Rset
Xset Xset
R R R
Xset
(a)-(f)
Rset For phase-to-phase fault
Rset = R1Zx
Forward Reverse Non-directional Xset = X1Zx
R R R
IEC15000055 V4 EN-US
The ZMFPDIS function has only one set of reach setting so the reverse will be the same as for the
forward reach, meaning that the non-directional offset mho characteristic will always be centered
around the origin. In detail, for Zone 1, the resistive and reactance reaches for phase-to-earth fault
and phase-to-phase fault are set individually using the settings R1PPZ1, X1PPZ1, R1PEZ1,
X1PEZ1, X0Z1 and R0Z1. In Zone 2-5, BU and RV, the same zone reach settings are used for
phase-to-earth fault and phase-to-phase (R1Zx, X1Zx, X0Zx and R0Zx, x = 2 to 5, BU or RV).
( )
β = arg U L1L 2 − I L1L 2 ⋅ Z 1set − arg U pol ( )
IECEQUATION15027 V1 EN-US (Equation 5)
where
is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set
For Zone 1,
where
R1PPZ1 is the positive sequence resistive reach for phase-to-phase fault for zone 1
X1PPZ1 is the positive sequence reactance reach for phase-to-phase fault for zone 1
where
R1Zx is the positive sequence resistive reach for zone x (x = 2-5, BU and RV)
X1Zx is the positive sequence reactance reach for zone x (x = 2-5, BU and RV)
is the polarizing voltage
Upol
IL1L2 jX
I L1L 2 Z1set
UcompUL1L2 IL1L2 Z1set
UL1L2
U pol
I L1L 2 R
IEC15000060-1-en.vsdx
IEC15000060 V1 EN-US
Figure 42: Simplified mho characteristic and vector diagram for phase L1-to-L2 fault
Offset Mho GUID-3E13E6D5-0832-4386-9677-9A40BFF42F8F v2
The characteristic for offset mho is a circle with origin as the center and magnitude of Z 1set as the
radius, where Z 1set is settable through the resistance and reactance settings.
The condition for operation at phase-to-phase fault is that the angle β between the two compensated
voltages is greater than or equal to 90° (figure 43). The angle will be 90° for fault location on the
boundary of the circle.
U
L1L 2 I L1L 2 Z 1set
arg
U L1L 2 I L1L 2 Z1set
IECEQUATION15008 V2 EN-US (Equation 8)
I L1L 2 jX
I L1L 2 Z1set
U L1L 2
I L1L 2 R
I L1L 2 Z1set
IEC15000058-2-en.vsdx
IEC15000058 V2 EN-US
Figure 43: Simplified offset mho characteristic and voltage vector for phase L1 to L2 fault
Operation occurs if 90°≤β≤270 °.
Compensation for earth return path for faults involving earth is done by setting the positive and zero
sequence impedance of the line. It is known that the earth compensation factor KN is,
Z 0set − Z 1set
KN =
3 ⋅ Z 1set
IECEQUATION15017 V1 EN-US
Z 0set = R 0Zx + j ⋅ X 0 Zx
IECEQUATION15018 V1 EN-US
For Zone 1,
Z 1set = R1PEZ 1 + j ⋅ X 1PEZ 1
IECEQUATION15019 V1 EN-US
where
is the complex zero sequence impedance of the line in Ω/phase
Z 0set
is the complex positive sequence impedance of the line in Ω/phase
Z 1set
R1PEZ1 is the positive sequence resistive reach of the line in Ω/phase for
phase-to-earth fault for zone 1
X1PEZ1 is the positive sequence reactance reach of the line in Ω/phase for
phase-to-earth fault for zone 1
R0Zx is the zero sequence resistive reach of the line in Ω/phase for zone x
(x=2 to 5, BU or RV)
X0Zx is the zero sequence reactance reach of the line in Ω/phase for zone
x (x=2 to 5, BU or RV)
For an earth fault in phase L1, the angle β between the compensation voltage and the polarizing
where
is the phase voltage in faulty phase L1
UL1
is the phase current in faulty phase L1
IL1
3I 0 is the zero-sequence current in faulty phase L1
is the complex positive sequence impedance of the line in Ω/phase
Z 1set for phase-to-earth fault in zone direction
is the polarizing voltage for phase L1
Upol
IL1•jX
U L1
I L1 Z1set
U pol
IL1•R
IEC15000059-1-en.vsdx
IEC15000059 V1 EN-US
Figure 44: Simplified offset mho characteristic and vector diagram for phase L1-to-earth fault
Operation occurs if 90°≤β≤270°.
arg U L1 ( I L1 3I 0 K N ) Z1set arg U L1 ( I L1 3I 0 K N ) Z1set
IL1• jX
U comp1 U L1 ( I L1 3I 0 K N ) Z1set
( I L1 3I 0 K N ) Z1set
U L1
IL1• R
( I L1 3I 0 K N ) Z1set
IEC15000057-2-en.vsdx
IEC15000057 V2 EN-US
Figure 45: Simplified offset mho characteristic and voltage vector for phase L1-to-earth fault
Operation occurs if 90 °≤β≤270 °.
In some cases the measured load impedance might enter the set zone characteristic without any
fault on the protected line. This phenomenon is called load encroachment and it might occur when an
external fault is cleared and high emergency load is transferred onto the protected line. The effect of
load encroachment is illustrated on the left in figure 46. A load impedance within the characteristic
would cause an unwanted trip. The traditional way of avoiding this situation is to set the distance
zone resistive reach with a security margin to the minimum load impedance. The drawback with this
approach is that the sensitivity of the protection to detect resistive faults is reduced.
The IED has a built-in feature which shapes the under-impedance starting characteristic according to
the characteristic shown in figure 46. The load encroachment algorithm will increase the possibility to
detect high fault resistances, especially for phase-to-earth faults at the remote line end. For example,
for a given setting of the load angle ArgLd, the resistive blinder for the zone measurement can be set
according to figure 46 affording higher fault resistance coverage without risk for unwanted operation
due to load encroachment. Separate resistive blinder settings are available in forward and reverse
direction.
The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity of the
distance protection. The function can also preferably be used on heavy loaded, medium long lines.
For short lines, the major concern is to get sufficient fault resistance coverage. Load encroachment is
not a major problem.
The built-in phase selection is based on current change criteria and has no user defined settings.
However, a traditional under-impedance-based phase selector is always working in parallel with it.
This under-impedance-based criterion is defined by the two setting parameters XStart and RStart, as
shown in Figure 46. These two settings are common for both Ph-Ph and Ph-Gnd measurement
loops. In order to ensure proper operation of the distance zones the under-impedance based starting
element shall be set in such a way to always cover (i.e. be larger than) all used distance zones for
both Ph-Ph and Ph-Gnd loops. Consequently, the following settings are recommended:
Parameter XStart shall be set to a value which is at least 20% bigger than the value obtained by
formula (2*X1FwPEZx+X0FwPEZx)/3 applied for the longest reaching zone.
It is recommended that the RStart setting shall not exceed the load impedance, which is typically
defined as UBase/sqrt(3)/IBase in primary ohms. It is recommended to reduce the RStart set value to
maximum 80% of the above defined load impedance value. However, the RLdRvFactor and RLdFw
settings can be utilized to get an additional non-operation sector for emergency load, like for when a
parallel line is opened, as shown in Figure 46.
Distance Zones
RStart
XStart
RLdFw
ArgLd
RLdRvFactor
XStart
* RLdFw
100
RStart
IEC09000248-5-en-us.vsdx
IEC09000248 V5 EN-US
When protecting a system with an alternative earthing method, other than direct earthing, there are
some things that need to be done differently in the ZMF. These adaptions are devised by the PPL2
function through its connections with ZMF. See Figure 47
So, besides its strong association with phase preference, the PPL2 will aid ZMF with an auxiliary
phase selection as well as adjustments related to the present earthing method (selected with PPL2
setting SystemEarthing). This is done through the connection to the ORCND input.
[1] RLdRv=RLdRvFactor*RLdFw
The primary feature is the phase preference, which is fulfilled through the connection from PPL2-
ZREL, which transmits starts of preferred phases, to be released in the distance zones.
To avoid the situation where the ZMF is selecting PE loops but the PPL2 is not releasing them, it is
necessary to bring the internal loop selection inside ZMF in accordance with the PPL2 criterion.
Therefore, we are overriding the customary loop selection inside ZMF with the one decided by PPL2,
which is based mainly on the IN start level (IN>). This is realized by transmitting the IN start from
PPL2 to ZMF, as composite data inside the PPL2-START signal.
There is nothing further in ZMF that influences this enforced loop selection. Even the INReleasePE
setting does not change this and may stay at its default value of 400%.
Also, through the connection to the PPL2-ZST output, the use of zero sequence quantities is
restricted.
The fault current for a Fw/Rv Cross-country (CC) fault is going out on one line while coming back on
another. So, the standard calculation of earth-return current is not valid. Therefore, the earth return
path and the zero sequence current is removed from the phase-to-earth distance calculation.
Load compensation, which is normally based on the residual current, is disabled as well.
Zero sequence can only show one direction, while the CC fault is two faults, possibly one forward
and one reverse. In practice, the zero sequence direction will always go with the forward fault, while
the preferred fault and phase may be reverse. So, only direction based on phase current is used.
When the two CC faults are in the same direction, there is yet another situation. On un-faulted
feeders (radial especially), the zero sequence direction may show the wrong direction during the
voltage asymmetry because the current can be dominated by the load. ZMF will therefore use
negative sequence-based direction instead, when applicable.
The direction based on zero sequence quantities is directly affected by the neutral resistance,
making the direction resistive rather than inductive. So, with this setting value, the zero sequence
direction characteristic is automatically rotated by 70 degrees to better accommodate the direction.
So, the forward characteristic is rotated from its original 30 - 115 degrees, to -40 - 45 degrees. The
reverse characteristic is exactly 180 degrees behind, in both cases.
The IMinOpPEZx should be set high enough not to allow zones to start due to capacitive currents on
healthy feeders
PHSL1, PHSL2,...PHSL3L1 are internal binary logical signals from the Phase-selection element.
They correspond directly to the six loops of the distance zones and determine which loops should be
released to operate.
The ORCND input enables the use of external elements to supplement the internal phase selection
in specialized applications, like unblocking of the distance protection during power swings. Like with
the other CND signals, each bit of its binary encoded integer number corresponds to one of the six
measuring loops. The ORCND is primarily intended as a support to the internal phase selection, so
ultimately, the internal phase selection may make the final decision on enabling the PE or PP loops.
See Figure 47.
PPL2PHIZ ZMFPDIS
Automatic Phase selection
cross-country ZST
phase selection Internal
ORCND criteria Loop
Phase preference selection
Zone1
L1N L1N bitwise TRZ1
RELCNDZ1 release
AND
L2N L2N
ZREL Zone2
L3N bitwise TRZ2
L3N Bool to RELCNDZ2 release
Integer AND
L1L2 Zone3
bitwise TRZ3
L2L3 RELCNDZ3 release
AND
L3L1 Zone4
RELCNDZ4 bitwise TRZ4
TRUE AND
release
Zone5
RELCNDZ5 bitwise release
TRZ5
AND
ZoneRV
RELCNDZRV bitwise TRZRV
release
AND
ZoneBU
RELCNDZBU bitwise release
TRZBU
AND
IEC16000017 V2 EN-US
FWL1, FWL2,...FWL3L1 and RVL1, RVL2,...RVL3L1 are the internal binary signals from the
Directional element. An FW signal is activated if the criteria for a forward fault or load is fulfilled for its
particular loop. The equivalent applies to the reverse (RV) signals.
The internal input 'IN present' is activated if the residual current (3I0) exceeds 10% of the maximum
phase current magnitude and at the same time is above 5% of IBase. However, if current transformer
saturation is detected, this criterion is changed to residual voltage (3U0) exceeding 5% of UBase/
sqrt(3) instead.
DirModeZ3-5, BU
TRUE (1)
FW(Ln & LmLn) Forward
RV(Ln & LmLn) Reverse
IEC12000137-4-en.vsd
IEC12000137 V4 EN-US
ZML1Zx PEZx
OR
PHSL1
AND
DIRL1Zx AND
ZML2Zx
PHSL2
AND
DIRL2Zx AND
ZML3Zx L1Zx
OR
PHSL3
AND
DIRL3Zx AND
ZML1L2Zx L2Zx
PHSL1L2 OR
AND
DIRL1L2Zx AND
ZML2L3Zx
PHSL2L3 L3Zx
AND OR
DIRL2L3Zx AND
ZML3L1Zx
PHSL3L1
AND
DIRL3L1Zx AND
L1N
PPZx
L2N OR
L3N
RELCNDZx Integer L1L2
to Bool
L2L3
NDZx
L1L3 OR
IEC12000140-2-en.vsdx
IEC12000140 V2 EN-US
TimerModeZx =
Enable PhPh or
Ph-E PhPh
PPZx AND tPPZx
OR AND
AND t
PEZx
AND tPEZx OR
TimerModeZx = OR
AND t
Enable Ph-E or AND
Ph-E PhPh
VTSZ
BLKZx OR
OR
TimerLinksZx
ZoneLinkStart
LoopLink (tPP-tPE)
Phase Selection
LoopLink & ZoneLink
1st starting zone OR
No Links
LNKZx
FALSE (0) AND
OR
TimerLinksZx =
LoopLink & ZoneLink
EXTNST
IEC12000139-6-en.vsdx
IEC12000139 V6 EN-US
15 ms
TZx
t TRIPZx
AND
TRL1Zx
OR AND
BLOCK
VTSZ TRL2Zx
OR AND
BLKZx
TRL3Zx
AND
15 ms
L1Zx
t STL1Zx
AND
15 ms
L2Zx
t STL2Zx
AND
15 ms
t STL3Zx
AND
PPZx 15 ms
PEZx OR t STARTZx
AND
15 ms
NDZx
t STNDZx
AND
IEC12000138-2-en.vsd
IEC12000138 V2 EN-US
15 ms
OR t STPE
AND
15 ms
OR t
AND
15 ms
OR t STNDL2
PHSL1L2 AND
15 ms
OR t STNDL3
AND
15 ms
OR t STPP
AND
BLOCK STARTND
OR
VTSZ OR
STPHS
STNDPE
AND
IEC12000133-3-en.vsdx
IEC12000133 V3 EN-US
PHSL1
FWL1 AND
15 ms
FWL2 AND OR t
AND
FWL3 AND 15 ms
PHSL1L2 OR t STFWL2
AND
FWL1L2 AND
PHSL2L3 15 ms
FWL2L3 AND OR t STFWL3
AND
FWL3L1 AND
OR
STFWPE
IN present AND
STFW1PH
=1
BLOCK
VTSZ OR
STFW2PH
=2
STFW3PH
=3
IEC12000134-2-en.vsd
IEC12000134 V2 EN-US
PHSL1
RVL1 AND
15 ms
RVL2 AND OR t
AND
RVL3 AND 15 ms
PHSL1L2 OR t STRVL2
AND
RVL1L2 AND
PHSL2L3 15 ms
RVL2L3 AND OR t STRVL3
AND
RVL3L1 AND
OR
STRVPE
IN present AND
BLOCK
VTSZ OR
IEC12000141-2-en.vsdx
IEC12000141 V2 EN-US
6.1.8.11 Measurement
Measurement supervision SEMOD54417-130 v4
The protection, control, and monitoring IEDs have functionality to measure and further process
information for currents and voltages obtained from the pre-processing blocks. The number of
processed alternate measuring quantities depends on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
• Overfunction, when the measured quantity exceeds the High limit (XHiLim) or High-high limit
(XHiHiLim) pre-set values
• Underfunction, when the measured quantity decreases under the Low limit (XLowLim) or Low-
low limit (XLowLowLim) pre-set values.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
IEC05000657 V4 EN-US
The logical value of the functional output signals changes according to figure 55.
The user can set the hysteresis (XLimHyst), which determines the difference between the operating
and reset value at each operating point, in wide range for each measuring channel separately. The
hysteresis is common for all operating values within one channel.
In addition to the normal cyclic reporting the IED also report spontaneously when measured value
passes any of the defined threshold limits.
Y
Value Reported Value Reported
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t
Value 1
Value 2
Value 3
Value 4
Value 5
new value to a higher level. This limits the information flow to a minimum necessary. Figure 57 shows
an example with the amplitude dead-band supervision. The picture is simplified: the process is not
continuous but the values are evaluated with a time interval of one execution cycle from each other.
Value Reported
Y
Value Reported Value Reported
Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1
IEC99000529 V3 EN-US
The last value reported, Y1 in figure 58 serves as a basic value for further measurement. A
difference is calculated between the last reported and the newly measured value and is multiplied by
the time increment (discrete integral). The absolute values of these integral values are added until
the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a new base
for the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small variations
that can last for relatively long periods.
Y A1 >=
A >= pre-set value A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
IEC99000530 V3 EN-US
Additionally, if a measuring value has changed from the last reported value, and the change is larger
than ±ΔY predefined limits that are set by user (XDbRepInt), then the measuring channel reports the
new value to a higher level immediately irrespective of cyclic trigger. See Figure 59 for example.
Value
Value
Reported
Y5 Y6
+ΔY
-ΔY
Y”
Y’
Y1 Y2 Y7
Y4
Y3
Δt Δt Δt Δt Δt Δt
Time
IEC16000109-2-en.vsdx
IEC16000109 V2 EN-US
Figure 59: Example of value reporting in mode dead band and xx cyclic (xx : 5 sec , 30 sec,
1 min)
The term <deadband> is used to describe the maximum deviation between the current value of a
signal and the last reported value.
The current value will be reported when the absolute value of the deviation is larger than the
computed deadband. The set value is entered in percent (as relative deadband), the absolute
deadband is calculated with the set value and the last reported value or actual measured value
(dynamic deadband computation).
Dynamic deadband computation will use smaller of the deadband computed from current value and
deadband computed from the last reported value. As a result, deadband of the last reported value
will be used for values moving away from the critical range, while the current value deadband will be
used when the measured value is approaching the critical range.
The effective deadband is always over 0.1% of the total range to prevent excessive reporting of
values close to the minimum value. It is restricted to dB*range using the setting ZdbRepInt, even if
the input value exceeds the configured maximum range value.
A minimum report interval of 250 milli-Seconds is applied to prevent high frequency noise with
amplitudes larger than computed deadband, in the most sensitive value range, from creating
excessive communication load.
Like other deadband profiles, a minimum report rate of 5, 30 or 60 seconds can be specified in the
parameter ZRepTyp. When this time has elapsed, since last report time, the new value will be
reported regardless of deadband or limits.
The applied minimum dead-band for all dead-band types is restricted to 0.1% of the range.
A deadband monitored value will also be reported if the limit value exceeds or when the value cross
over the configure range boundaries.
Rmin
IEC20000216 V1 EN-US
<Curr-Rep value> (dashed line) is the absolute value of the difference between current value and last
reported value.
IEC20000217 V1 EN-US
IEC20000218 V1 EN-US
IEC20000219 V1 EN-US
IEC20000220 V1 EN-US
• When one signal belonging to a group triggers a sending, then all other signals in the group will
be sent together.
• All cyclic transmission time and dead bands will be reset at transmission.
• The event grouping is only used for IEC 61850 events.
Phase-to-earth impedance measurement is calculated based on UL1/ IL1 , UL2 / IL2 , UL3 / IL3 and
When the operating current is too low, the impedance measurement can be erroneous. To avoid such
error, minimum operating current will be checked. For phase-earth currents or phase-phase currents
lower than 2% of IBase, the resistance and reactance of the impedance are forced to 99 999 ohm,
corresponding to a magnitude at 141419 (99 999*√2) ohm and an angle at 45 degree.
6.2.1 Identification
M14853-1 v3
Zpsb
SYMBOL-EE V1 EN-US
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
Power swing detection function (ZMRPSB ) is used to detect power swings and initiate block of all
distance protection zones. Occurrence of earth-fault currents during a power swing inhibits the
ZMRPSB function, to allow fault clearance.
ZMRPSB
I3P* START
U3P* ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXTERNAL
IEC06000264-2-en.vsd
IEC06000264 V2 EN-US
6.2.4 Signals
PID-3663-INPUTSIGNALS v6
PID-3663-OUTPUTSIGNALS v6
6.2.5 Settings
PID-3663-SETTINGS v6
Its principle of operation is based on the measurement of the time it takes for a power swing transient
impedance to pass through the impedance area between the outer and the inner characteristics. The
power swings are identified by transition times longer than a transition time set on corresponding
timers. The impedance measuring principle is the same as that used for the distance protection
zones. The impedance and the characteristic passing times are measured in all three phases
separately.
X1OutFw jX ZL R1LIn
X1InFw DFw
j
DRv
R1FInRv R1FInFw
DFw
ArgLd j
ArgLd
DRv
DFw
DFw
R
DFw
DRv
RLdInRv RLdInFw
DFw
DRv
RLdOutRv RLdOutFw
j DRv X1InRv
X1OutRv
IEC09000222_1_en.vsd
IEC09000222 V1 EN-US
Figure 66: Operating characteristic for ZMRPSB function (setting parameters in italic)
The impedance measurement within ZMRPSB function is performed by solving equation 12 and
equation 13 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).
æ ULn ö
Re çç ÷÷ £ Rset
è I Ln ø
EQUATION1183 V2 EN-US (Equation 12)
æ ULn ö
Imçç ÷÷ £ Xset
è ILn ø
EQUATION1184 V2 EN-US (Equation 13)
To avoid load encroachment, the resistive reach is limited in forward direction by setting the
parameter RLdOutFw which is the outer resistive load boundary value while the inner resistive
boundary is calculated according to equation 14.
RLdInFw = kLdRFw·RLdOutFw
EQUATION1185 V2 EN-US (Equation 14)
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting the parameter
ArgLd.
The load encroachment in the fourth quadrant uses the same settings as in the first quadrant (same
ArgLd and RLdOutFw and calculated value RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the distance
measuring zones. The angle is the same as the line angle and derived from the setting of the
reactive reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault
resistance coverage for the inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the
inner and outer boundary, DFw, is calculated. This value is valid for R direction in first and fourth
quadrant and for X direction in first and second quadrant.
To avoid load encroachment in reverse direction, the resistive reach is limited by setting the
parameter RLdOutRv for the outer boundary of the load encroachment zone. The distance to the
inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in
equation 15.
RLdInRv = kLdRRv·RLdOutRv
EQUATION1187 V2 EN-US (Equation 15)
where:
kLdRRv is a settable multiplication factor less than 1
From the setting parameter RLdOutRv and the calculated value RLdInRv, a distance between the
inner and outer boundary, DRv, is calculated. This value is valid for R direction in second and third
quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load encroachment part
corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is
internally calculated as the sum of DRv+R1FInRv.
The inner resistive characteristic in the third quadrant outside the load encroachment zone consist of
the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the tilted lines
outside the load encroachment is the same as the tilted lines in the first quadrant. The distance
between the inner and outer boundary is the same as for the load encroachment in reverse direction,
that is DRv.
The inner characteristic for the reactive reach in forward direction correspond to the setting
parameter X1InFw and the outer boundary is defined as X1InFw + DFw,
where:
DFw = RLdOutFw - KLdRFw · RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the setting
parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + DRv.
where:
DRv = RLdOutRv - KLdRRv · RLdOutRv
The operation of the Power swing detection ZMRPSB is only released if the magnitude of the current
is above the setting of the minimum operating current, IMinOpPE.
• The 1 out of 3 operating mode is based on detection of power swing in any of the three phases.
Figure 67 presents a composition of an internal detection signal DET-L1 in this particular phase.
• The 2 out of 3 operating mode is based on detection of power swing in at least two out of three
phases. Figure 68 presents a composition of the detection signals DET1of3 and DET2of3.
Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 67 are related to the
operation of the impedance measuring elements in each phase separately (n represents the
corresponding L1, L2 and L3). They are internal signals, calculated by ZMRPSB function.
The tP1 timer in figure 67 serve as detection of initial power swings, which are usually not as fast as
the later swings are. The tP2 timer become activated for the detection of the consecutive swings, if
the measured impedance exit the operate area and returns within the time delay, set on the tW
waiting timer. The upper part of figure 67 (internal input signal ZOUTL1, ZINL1, AND-gates and tP-
timers) are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have the same
settings.
ZOUTL1 AND
0-tP1
ZINL1 0 OR
-loop
0-tP2
-loop
AND
0
OR DET-L1
AND AND
ZOUTL2 OR
ZOUTL3
detected 0
0-tW
IEC05000113-2-en.vsd
IEC05000113 V2 EN-US
DET-L1
DET-L2 DET1of3 - int.
>1
DET-L3
&
DET2of3 - int.
& >1
&
IEC01000057-2-en.vsd
IEC01000057-TIFF V2 EN-US
Figure 68: Detection of power swing for 1-of-3 and 2-of-3 operating mode
ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR
ZINL3
tEF
TRSP
t AND
I0CHECK
10 ms
AND t
BLKI02 OR
tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL
en05000114.vsd
IEC05000114 V1 EN-US
Figure 69 presents a simplified logic diagram for the Power swing detection function ZMRPSB. The
internal signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 67 and figure 68
respectively.
Selection of the operating mode is possible by the proper configuration of the functional input signals
REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter OperationLdCh =
Off, but notice that the DFw and DRv will still be calculated from RLdOutFw and RLdOutRv. The
characteristic will in this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
• Logical 1 on functional input BLOCK inhibits the output START signal instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected and the
measured impedance remains within its operate characteristic for the time, which is longer than
the time delay set on tR2 timer. It is possible to disable this condition by connecting the logical 1
signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if an earth-fault
appears during the power swing (input IOCHECK is high) and the power swing has been
detected before the earth-fault (activation of the signal I0CHECK). It is possible to disable this
condition by connecting the logical 1 signal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK appears within
the time delay, set on tEF timer and the impedance has been seen within the outer characteristic
of ZMRPSB operate characteristic in all three phases. This function prevents the operation of
ZMRPSB function in cases, when the circuit breaker closes onto persistent single-phase fault
after single-phase autoreclosing dead time, if the initial single-phase fault and single-phase
opening of the circuit breaker causes the power swing in the remaining two phases.
6.3.2 Identification
SEMOD155890-2 v4
Automatic switch onto fault logic ZCVPSOF is a function that gives an instantaneous trip when
closing the breaker onto a fault. A dead-line detection check is provided to activate ZCVPSOF when
the line is de-energized.
Mho distance protections cannot operate for switch onto fault conditions when the phase voltages
are close to zero. An additional logic based on UI Level is used for this purpose.
ZCVPSOF is a complementary function to the distance protection function. It is enabled for operation
either by the closing command to the circuit breaker (normally closed auxiliary contact of the circuit
breaker) to the BC input or automatically by the dead-line detection. Once enabled, it remains active
for tSOTF duration after the enabling signal is reset. The protection function can be enabled for
tripping during the activated time by connecting the functions included in the terminal to the ZACC
input. Therefore, the start of the selected protection functions connected to ZACC during the enabled
condition results in an immediate TRIP output from the function.
IEC06000459 V3 EN-US
PID-3875-INPUTSIGNALS v11
PID-3875-OUTPUTSIGNALS v10
PID-3875-SETTINGS v11
The automatic switch onto fault logic ZCVPSOF can be activated externally (by the breaker-closed
input) or internally (automatically) with the dead-line detection using the UI level-based logic. When
the setting AutoInitMode is DLD disabled, ZCVPSOF is activated by an external binary input BC.
When the setting AutoInitMode is set to Voltage, Current or Current & Voltage modes, ZCVPSOF is
activated by the dead-line detection.
The activation from the dead-line detection function is released if the internal signal DeadLine from
the UILevel Detector function is activated at the same time as the inputs ZACC and START_DLYD are
not activated at least for the duration of tDLD. The internal signal DeadLine from the UILevel
Detector function is activated under any of the following conditions:
• If all three-phase currents are below the setting IPh< and the AutoInitMode setting is set to
Current
• If all three-phase voltages are below the setting UPh< and the AutoInitMode setting is set to
Voltage
• If all three-phase currents and voltages are below the settings IPh< and UPh< and the
AutoInitMode setting is set to Current & Voltage
Once the dead line drops off after energization or once BC drops off, the activated signal is extended
for the duration of tSOTF.
The internal signal SOTFUILevel is activated if the phase voltage is below the set UPh< and the
corresponding phase current is above the set IPh< for a time longer than the duration set by
tDuration.
To get the TRIP signal, one of the different operate modes must also be selected with the Mode
parameter:
• Mode = Impedance; TRIP is released if either the ZACC input (connected normally to a
nondirectional distance protection start zone) or the START_DLYD input is activated. If
START_DLD is activated, TRIP is released after a delay of tOperate.
• Mode = UILevel; TRIP is released if UILevel detector is activated
• Mode = UILvl&Imp; TRIP is released based either on the impedance-measured criteria or
UILevel detection
The measured phase voltages and currents are provided as service values.
BLOCK
15ms
BC TRIP
& t
ZACC tSOTF
tDLD t
START_DLYD ≥1
& t
≥1
tOperate
t
I3P
U3P
DeadLine
IPh< UILevel tDuration
Detector t
UPh<
AutoInitMode
&
Mode = Impedance
SOTFUILevel
& ≥1
Mode = UILevel
≥1
&
Mode = UILvl&Imp
IEC07000084 V3 EN-US
Figure 71: Simplified logic diagram for Automatic switch onto fault logic
M16043-1 v14
6.4.1 Identification
GUID-BF2F1533-BA39-48F0-A55C-0B13A393F780 v2
<
The out-of-step protection (OOSPPAM ) function in the IED can be used for both generator protection
and as well for line protection applications.
The main purpose of the OOSPPAM function is to detect, evaluate, and take the required action
during pole slipping occurrences in the power system.
The OOSPPAM function detects pole slip conditions and trips the generator as fast as possible, after
the first pole-slip if the center of oscillation is found to be in zone 1, which normally includes the
generator and its step-up power transformer. If the center of oscillation is found to be further out in
the power system, in zone 2, more than one pole-slip is usually allowed before the generator-
transformer unit is disconnected. A parameter setting is available to take into account the circuit
breaker opening time. If there are several out-of-step relays in the power system, then the one which
finds the center of oscillation in its zone 1 should operate first.
Two current channels I3P1 and I3P2 are available in OOSPPAM function to allow the direct
connection of two groups of three-phase currents; that may be needed for very powerful generators,
with stator windings split into two groups per phase, when each group is equipped with current
transformers. The protection function performs a simple summation of the currents of the two
channels I3P1 and I3P2.
OOSPPAM
I3P1* TRIP
I3P2* TRIPZ1
U3P* TRIPZ2
BLOCK START
BLKGEN GENMODE
BLKMOT MOTMODE
EXTZ1 R
X
SLIPFREQ
ROTORANG
UCOSPHI
IEC12000188-3-en.vsd
IEC12000188 V3 EN-US
6.4.4 Signals
PID-3539-INPUTSIGNALS v10
PID-3539-OUTPUTSIGNALS v10
6.4.5 Settings
PID-3539-SETTINGS v10
General
Under balanced and stable conditions, a generator operates with a constant rotor angle (power
angle), delivering active electrical power to the power system, which is approximately equal to the
input mechanical power on the generator axis.The currents and voltages are constant and stable. An
out-of-step condition is characterized by periodic changes in the rotor angle, that leads to a wild flow
of the synchronizing power; so there are also periodic changes of rotational speed, currents and
voltages. When displayed in the complex impedance plane, these changes are characterized by a
cyclic change in the complex load impedance Z(R, X) as measured at the terminals of the generator,
or at the location of the instrument transformers of a power line connecting two power subsystems.
This is shown in Figure 73.
1.5 ← trajectory
of Z(R, X)
to the 3rd
The 2nd pole-slip
Imaginary part (X) of Z in Ohms
1 The 1st X in Ohms
pole slip
pole slip
occurred Pre-disturbance
occurred
RE normal load
- - -
- - - - --------- - - - Z(R, X)
-
0.5 -- ---- ------ - - -
3 ----
Zone 2 -- - 1 --- - 0
- - 2 -- -
- -- -
^ --^ ^ ^ ^ ---^ ^ ^ ^ ^ ^ ^ ---- -
- -- ^ ^-- ^ ^ ^ --^
Zone 1
0 -
- ---- -
-- -
-
- --- relay --
-
- -
- -
- - - R in Ohms
limit of reach → -- -- - -
-- -- -
-- --- --
- -
lens determined - - → ---- ------ 0- - - pre-disturbance Z(R, X)
-0.5 by the setting - - - -------- - - - →
- - -- - 1 → Z(R, X) under 3-phase fault
StartAngle = 120° SE 2 → Z(R, X) when fault cleared
3 → Z when pole-slip declared
-1
-1.5 -1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms
IEC10000109-1-en.vsd
IEC10000109 V1 EN-US
Figure 73: Loci of the complex impedance Z(R, X) for a typical case of generator losing step
after a short circuit that was not cleared fast enough
Under typical, normal load conditions, when the protected generator supplies the active and the
reactive power to the power system, the complex impedance Z(R, X) is in the 1st quadrant, point 0 in
Figure 73. One can see that under a three-phase fault conditions, the centre of oscillation is at the
point of fault, point 1, which is logical, as all three voltages are zero or near zero at that point. Under
the fault conditions the generator accelerated and when the fault was finally cleared, the complex
impedance Z(R, X) jumped to the point 2. By that time, the generator has already lost its step, Z(R,
X) continues its way from the right-hand side to the left-hand side, and the 1st pole-slip cannot be
avoided. If the generator is not immediately disconnected, it will continue pole-slipping — see Figure
73, where two pole-slips (two pole-slip cycles) are shown. Under out-of-step conditions, the centre of
oscillation is where the locus of the complex impedance Z(R, X) crosses the (impedance) line
connecting the points SE (Sending End), and RE (Receiving End). The point on the SE – RE line
where the trajectory of Z(R, X) crosses the impedance line can change with time and is mainly a
function of the internal induced voltages at both ends of the equivalent two-machine system, that is,
at points SE and RE.
Rotor (power) angle δ can be thought of as the angle between the two lines, connecting point 0 in
Figure 73, that is, Z(R, X) under normal load, with the points SE and RE, respectively. These two
lines are not shown in Figure 73. Normal values of the power angle, that is, under stable, steady-
state, load conditions, are from 30 to 60 electrical degrees. It can be observed in Figure 74 that the
angle reaches 180 degrees when the complex impedance Z(R, X) crosses the impedance line SE –
RE. It then changes the sign, and continues from -180 degrees to 0 degrees, and so on. Figure 74
shows the rotor (power) angle and the magnitude of Z(R, X) against time for the case from Figure 73.
4
|Z| in Ohms
rotor (power)
3 normal angle in rad
angle
Impe dance Z in Ohm and rotor a ngle in radian ® load
Z(R, X) unde r fa ult lies |Z|
2
on the impe dance line
or nea r (for 3-ph faults )
1
0
0
fault 500 ms
-1 fa ult
occ urrs
Unde r 3-pha s e fa ult
condition rotor a ngle 3
-2
of a pp. ±180 de gre e s
is m e a s ure d ...
2
-3 Z(R,X) cros s e d
1 1 the im pe da nce line , Z-line ,
conne cting points S E - RE
-4
0 200 400 600 800 1000 1200 1400
Time in millis econds ®
IEC10000110-2-en.vsd
IEC10000110 V2 EN-US
Figure 74: Rotor (power) angle and magnitude of the complex impedance Z(R, X) against
the time
In order to be able to fully understand the principles of OOSPPAM, a stable case, that is, a case
where the disturbance does not make a generator to go out-of-step, must be shown.
1
SE RE
G X [Ohm]
0.8 Z(R,X) 20 ms
fault
relay after line out
- - - RE - - -
0.6 - - -- -
-- ---- ----- 4 - - pre-fault
Imaginary part (X) of Z in Ohms →
--- ---
zone 2 - - -- -
-- --- - Z(R,X)
0.4 - ---- --- 2 -
- -
-- -- -1 5
- --- fault→ --- -
X-line → ^ -^ ^ ^ ^ ---^ ^ 3 - -
0.2 - -- ^ ^ ^ ^ ^ ^ ---^- ^ ^ -
- --- Z-line→ -- ^ -^ 0
-
- --
-- --- - 6
0 - -- --- -
- -- -
- - R
limit of - -- relay lens → -- -- -
--
-0.2 reach - --
--- 110° ---- -
zone 1- - -- --- -
-
- --- - - -
-- --- ---
-0.4
- - ----------
---
- --
- - - - -
-0.6 SE - - -
0 → pre-fault Z(R, X)
this circle forms 3 → Z(R, X) under fault
-0.8 the right-hand side 5 → Z 20 ms after line out
edge of the lens 6 → pow er line reclosed
-1
-1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms → IEC10000111-1-en.vsd
IEC10000111 V1 EN-US
Figure 75: A stable case where the disturbance does not make the generator to go out-of-
step
It shall be observed that for a stable case, as shown in Figure 75, where the disturbance does not
cause the generator to lose step, the complex impedance Z(R, X) exits the lens characteristic on the
same side (point 4) it entered it (point 2), and never re-enters the lens. In a stable case, where the
protected generator remains in synchronism, the complex impedance returns to quadrant 1, and,
after the oscillations fade, it returns to the initial normal load position (point 0), or near.
A precondition in order to be able to construct a suitable lens characteristic is that the power system
in which OOSPPAM is installed, is modeled as a two-machine equivalent system, or as a single
machine – infinite bus equivalent power system. Then the impedances from the position of
OOSPPAM in the direction of the normal load flow (that is from the measurement point to the remote
system) can be taken as forward. The lens characteristic, as shown in Figure73 and Figure75, is
obtained so that two equal in size but differently offset Mho characteristics are set to overlap. The
resultant lens characteristic is the loci of complex impedance Z(R, X) for which the rotor (power)
angle is constant, for example 110 degrees or 120 degrees; if the rotor (power) angle approaches
this value, then there is a high risk to have an out of step condition. The limit-of- reach circle is
constructed automatically by the algorithm; it is about 10% wider than the the circle that has the line
SE-RE as diameter (that is the out-of-step characteristic which corresponds to the rotor (power)
angle of 90 degrees). Figure 76 illustrates construction of the lens characteristic for a power system.
X
Position of the OOS
- - RE - - -
0.6 - - - --- - relay is the origin of
- - -- --- - the R - X plane
- -- -- -
- --- Ze -- -
- Zone 2 --- -- -
0.4 X-line - - - -- -
Imaginary part (X) of Z in Ohms
-- --
determined - -- - Zline -- -
- -- -
by the → ^ ^- ^ --- -
^ ^ ^-- ^ -- -
0.2 setting - ^ ^ ^ ^ -
- ^ ^ ^ --- ^ -
---
ReachZ1 - -- -- ^ ^ ^-
Ztr
- --- -- - R
0 - Zone 1 -- --
- -
- relay -
- -- 120° -- Z(R,X) -
- -- --
- -
-- ← Z-line -
-0.2 - -- Zgen -- -
- -- --- -
limit-of-reach → - -- -- -
- Lens is the locus
-- ←
--
circle depends on - --
-- -- of constant
-
rotor (power)
-0.4 - -- --- -
the position of the - -- - -- - angle, - e.g. 120°.
- - - -
points SE and RE - - -- - - - - - -Lens' width determined
SE
-0.6 by the setting StartAngle
ReverseZ
ReverseZ(ReverseR, ReverseX)) ForwardZ(ForwardR, ForwardX)
SE RE
IEC10000113-2-en.vsd
IEC10000113 V2 EN-US
The out-of-step relay, as in Figure 77 looks into the system and the impedances in that direction are
forward impedances:
Resistances are much smaller than reactances, but in general can not be neglected. The ratio
(ForwardX + ReverseX) / (ForwardR + ReverseR) determines the inclination of the Z-line, connecting
the point SE (Sending End) and RE (Receiving End), and is typically approximately 85 degrees.
While the length of the Z-line depends on the values of ForwardX, ReverseX, ForwardR, and
ReverseR, the width of the lens is a function of the setting StartAngle .The lens is broader for smaller
values of the StartAngle , and becomes a circle for StartAngle = 90 degrees.
When the complex impedance Z(R, X) enters the lens, pole slipping is imminent, and a start signal is
issued. The angle recommended to form the lens is 110 or 120 degrees, because it is this rotor
(power) angle where problems with dynamic stability usually begin. Rotor (power) angle 120 degrees
is sometimes called “the angle of no return” because if this angle is reached under generator power
swings, the generator is most likely to lose step.
An out-of-step condition is characterized by periodic changes of the rotor angle, that leads to a wild
flow of the synchronizing power; so there are also periodic changes of rotational speed, currents and
voltages. When displayed in the complex impedance plane, these changes are characterized by a
cyclic change in the complex load impedance Z(R, X) as measured at the terminals of the generator,
or at the location of the instrument transformers of a power line connecting two power sub-systems.
This was shown in Figure 73. When a synchronous machine is out-of-step, pole-slips occur. To
recognize a pole-slip, the complex impedance Z(R,X) must traverse the lens from right to left in case
of a generator and in the opposite direction in case of a motor. Another requirement is that the travel
across the lens takes no less than a specific minimum traverse time, typically 40...60 milliseconds.
The above timing is used to discriminate a fault from an out-of-step condition. In Figure 73, some
important points on the trajectory of Z(R, X) are designated. Point 0: the pre-fault, normal load Z(R,
X). Point 1: impedance Z under a three-phase fault with low fault resistance: Z lies practically on, or
very near, the Z-line. Transition of the measured Z from point 0 to point 1 takes app. 20 ms, due to
Fourier filters. Point 2: Z immediately after the fault has been cleared. Transition of the measured Z
from point 1 to point 2 takes approximately 20 ms, due to Fourier filters. The complex impedance
then travels in the direction from the right to the left, and exits the lens on the opposite side. When
the complex impedance exits the lens on the side opposite to its entrance, the 1st pole-slip has
already occurred and more pole-slips can be expected if the generator is not disconnected. Figure 73
shows two pole-slips. Figures like Figure 73 and Figure 75 are always possible to draw by means of
the analog output data from the pole-slip function, and are of great help with eventual investigations
of the performance of the out-of-step function.
A pole-slip may be detected if it has a slip frequency lower than a maximum value fsMax. The
specific value of fsMax depends on the setting (parameter) StartAngle (which determines the width of
the lens characteristic). A parameter in this calculation routine is the value of the minimum traverse
time, traverseTimeMin. The minimum traverse time is the minimum time that the travel of the
complex impedance Z(R, X) through the lens, from one side to the other, must last in order to
recognize that a pole-slip has occurred. The value of the internal constant traverseTimeMin is a
function of the set StartAngle.For values of StartAngle <= 110°, traverseTimeMin = 50 ms. For values
StartAngle > 110°, traverseTimeMin = 40 ms. The expression which relates the maximum slip
frequency fsMax and the traverseTimeMin is as follows:
The minimum value of fsMax is 6.994 Hz. When StartAngle = 110 degrees, fsMax = 7.777 Hz. This
implies, that the default StartAngle = 110 degrees covers 90% of cases as, the typical final slip
frequency is between 2 - 5Hz. In practice, however, before the slip frequency, for example 7.777 Hz,
is reached, at least three pole-slips have occurred. In other words, if we consider a linear increase of
frequency from 50 Hz to 57.777 Hz, at least three pole-slips will occur (in fact: (57.777 - 50) / 2 =
3.889). The exact instantaneous slip-frequency expressed in Hz (corresponding to number of pole
slips per second) is difficult to calculate. The easiest and most exact method is to measure time
between two successive pole slips. This means that, the instantaneous slip-frequency is measured
only after the second pole-slip, if the protected machine is not already disconnected after the first
pole-slip. The measured value of slipsPerSecond (SLIPFREQ) is equal to the average slip-frequency
of the machine between the last two successive pole-slips.
Although out-of-step events are relatively rare, the out-of-step protection should take care of the
circuit breaker health. The electromechanical stress to which the breaker is exposed shall be
minimized. The maximum currents flowing under out-of-step conditions can be even greater that
those for a three-phase short circuit on generator terminals; see Figure 79. The currents flowing are
highest at rotor angle 180 degrees, and smallest at 0 degrees, where relatively small currents flow.
To open the circuit breaker at 180 degrees, when not only the currents are highest, but the two
internal (that is, induced) voltages at both ends are in opposition, could be fatal for the circuit breaker.
There are two methods available in order to minimize the stress; the second method is more
advanced than the first one.
X[Ohm]
0.6 trip RE - Receiving End (infinite bus)
region
loci of Z(R, X)
0.4 3
Imaginary part (X) of Z in Ohms → no trip
region 1
here rotor here
0.2 2
angle rotor angle
is -90° no trip is +90°
rotor angle
region
= ±180°
0 no trip
relay
region R[Ohm]
inside ← Z - line connects
points SE & RE
-0.2 circle
← this circle
is loci of
outside the
the rotor
-0.4 circle is the trip
angle = 90°
region for
TripAngle <= 90° SE - Sending End (generator)
Figure 78: The imaginary offset Mho circle represents loci of the impedance Z(R, X) for
which the rotor angle is 90 degrees
35
very high currents due
Current in kA, trip command to CB, rotor angle in rad →
← rotor angle
0
angle towards 0°
-5
0 200 400 600 800 1000 1200
Time in milliseconds →
IEC10000115-1-en.vsd
IEC10000115 V1 EN-US
Figure 79: Trip initiation when the break-time of the circuit breaker is known
At every execution of the function the following is calculated: active power P, reactive power Q, rotor
angle ROTORANG, quantity UCOSPHI, the positive-sequence current CURRENT and voltage VOLTAGE.
All other quantities, that can as well be read as outputs, are only calculated if the Z(R, X) enters the
limit of reach zone, which is a circle in the complex (R – X) plane. When the complex impedance
Z(R, X) enters the limit-of-reach region, the algorithm:
• determines in which direction the impedance Z moves, that is, the direction the lens is traversed
• measures the time taken to traverse the lens from one side to the other one
If the traverse time is more than the limit 40 or 50 ms, a pole-slip is declared. If the complex
impedance Z(R, X) exits the lens on the same side it entered, then it is a stable case and the
protected machine is still in synchronism. If a pole-slip has been detected, then it is determined in
which zone the centre of oscillation is located. If the number of actual pole-slips exceeds the
maximum number of allowed pole-slips in either of the zones, a trip command is issued taking care of
the circuit breaker safety.
R R
UPSRE Calculation of X X
UPSIM R and X parts
of the complex Z(R,X)
UPSMAG
positive-
IPSRE
sequence Z(R,X) NO
IPSIM
impedance within limit of Return
Z(R, X) reach?
YES UCOSPHI
Z(R,X) ROTORANG
within lens NO
Function alert
characteristic?
SLIPFREQ
YES GENMODE
Z(R,X) MOTMODE
LEFT Z(R,X) RIGHT NO
exited lens
entered lens
on the left- hand
from?
Motor losing Generator losing side?
step ? step ?
YES
Was
traverse time NO
more than
Calculation of 50 ms?
P
positive- sequence YES (pole- slip!)
active power P, Q TRIP
>= 1
reactive power Q, Number
ZONE 2 NO
rotor angle UCOSPHI
of pole- slips
ROTORANG exceeded in TRIPZ1
a zone? Open
and
ROTORANG circuit
UCOSPHI ZONE 1 TRIPZ2
breaker
safely
IEC10000116-3-en.vsd
IEC10000116 V3 EN-US
6.5.2 Identification
GUID-850E4134-E912-45EC-981E-E1A2C12A91A8 v1
The Phase preference logic function (PPL2PHIZ) is used with the high speed distance protection,
quad and mho characteristic (ZMFPDIS). It is intended to be used in isolated or high impedance
earthed networks where there is a requirement to operate on only one of the faulty lines during a
cross-country fault. It can be used without preference to restrain operation for single earth faults with
a delayed zero-sequence current release for cable networks earthed using a resistor.
For cross-country faults, the logic selects either the leading or lagging phase-to-earth loop for
measurement. It initiates operation on the preferred phase based on the selected phase preference
scheme. A number of different phase preference schemes are available.
PPL2PHIZ provides an additional phase selection criteria, namely under voltage criteria, suitable for
phase selection during cross-country faults. In radial networks, where there is no fault current in the
phase with the external fault, current or impedance based phase selection methods become
ineffective. Hence, only voltage can be used for phase selection. The phase selection result will be
the same for all bays on a bus since the voltage is the same, which is an important condition for
operating with phase preference.
In meshed and stronger networks, it may be difficult to find appropriate under-voltage settings for
phase selection. Therefore an automatic phase selection logic is made available which works in
parallel with a set under-voltage criterion in order to detect the two faulty phases even for complex
networks. If for any reason the PPL2PHIZ is unable to detect the two faulty phases, then after a short
time delay all three phase-to-earth loops of the distance protection will be released for operation. The
final result might be that both faulty feeders are disconnected. In other words, protection operation is
prioritized over strict adherence to preference.
During a cross-country fault, both fault locations are in front of the distance protection. The measured
residual current magnitude can be quite small. The PPL2PHIZ function has built-in logic that can
detect such a condition and properly release the preferred phase-to-earth loop.
PPL2PHIZ
I3P* OPENL1E
U3P* OPENL2E
BLOCK OPENL3E
RELL1N CCFPHL1
RELL2N CCFPHL2
RELL3N CCFPHL3
STU
STIN
FORCEIN
ZREL
ZST
IEC16000016 V3 EN-US
6.5.5 Signals
PID-8024-INPUTSIGNALS v1
PID-8024-OUTPUTSIGNALS v1
6.5.6 Settings
PID-8024-SETTINGS v1
The PPL2PHIZ function releases the phase selection inside the distance protection, see Figure 82.
Before an operation from the distance zones is achieved, the phase selection inside the
distance protection or the automatic phase selection inside PPL2PHIZ has to detect the
fault and the preference phase must be received from the ZREL output of PPL2PHIZ.
PPL2PHIZ ZMFPDIS
Automatic Phase selection
cross-country ZST
phase selection Internal
ORCND criteria Loop
Phase preference selection
Zone1
L1N L1N bitwise TRZ1
RELCNDZ1 release
AND
L2N L2N
ZREL Zone2
L3N bitwise TRZ2
L3N Bool to RELCNDZ2 release
Integer AND
L1L2 Zone3
bitwise TRZ3
L2L3 RELCNDZ3 release
AND
L3L1 Zone4
RELCNDZ4 bitwise TRZ4
TRUE AND
release
Zone5
RELCNDZ5 bitwise release
TRZ5
AND
ZoneRV
RELCNDZRV bitwise TRZRV
release
AND
ZoneBU
RELCNDZBU bitwise release
TRZBU
AND
IEC16000017 V2 EN-US
The fundamental start criterion for a cross-country fault is a continuous residual current (3I0) above
setting level IN>.
Transient residual currents associated with single phase fault inception are not allowed to release the
distance protection. This is taken care of by a time-on-delay tIN, which should be set longer than the
expected duration of the transient. This time delay can be bypassed if the magnitude of the residual
current exceeds the set high level IN>>.
If a single phase fault remains for some time, it is possible to bypass the tIN time delay, since the
next fault event is expected to be a cross-country fault. The criterion for this bypass is that the
residual voltage is greater than setting level 3U0> for a time longer than setting tUN. The time-off-
delay tOffUN is used to make sure that the bypass is steady during the cross-country fault.
The time delay for residual current start is also bypassed as soon as two low voltages are detected
during the cross-country fault (startUPP). See Figure 83 for a simplified diagram showing the residual
current start logic.
tIN
a
IN> b AND t
startIN
OR
IN a
maxPhCurrent b OR
AND
INStartFulfilled
I3P OR
Max(lL1, IL2, IL3) AND
X
kINStab
a
IN >> b nonDelayedStartIN
startUN
startUPP
IEC16000018 V3 EN-US
Operation area
for IN>>
IN>>
Operation area
for IN> No operation
kINStab
IN>
Figure 84: Slope characteristic of residual over current start when using kINStab
During a cross-country fault in a radially fed network, the phase with an external fault typically does
not carry any fault current, which will make it difficult for a conventional distance phase selection
function to detect both faults. Therefore, PPL2PHIZ function provides an additional phase selection
based on voltage.
PPL2PHIZ is designed to detect two-phase faults based on under-voltage in two phases or between
two phases.
L1 startU
AND
L2 OR
L3
startUL2UL3
AND
AND startUL3UL1
AND OR startUL1
OR OR AND
OR startUL2
AND OR OR AND
AND OR startUL3
OR OR AND
ULxLy < UPP<
L1L2
L2L3
L3L1
UL1
UL2
UL3 AND
Automatic
UL1L2 phase
UL2L3 detection AND
UL3L1
OpAutoDetect AND
startIN OR
nonDelayedStartIN
AND
startUPP
OR
forceIN
IEC16000019 V3 EN-US
Figure 85: Voltage based phase selection for cross coutry faults
In meshed and complex networks, it may be difficult to find appropriate under-voltage settings for
phase selection. Therefore, an automatic phase selection logic is made available which works in
parallel with a set under-voltage criterion in order to detect the two faulty phases even for complex
networks. This automatic phase selection logic can be switched off or on with the setting
OpAutoDetect, which by default is set On. If, for any reason, this additional logic is unable to detect
the two faulty phases, then after a short time delay, all the three phase-to-earth loops of the distance
protection will be released for operation. The final result might be that both faulty feeders are
disconnected. In other words, protection operation is prioritized over strict adherence to preference.
During a cross-country fault, when both faults are in front of the distance protection, the residual
current start criterion might not be fulfilled. Additional logic, as given in Figure 86, is then available to
detect such condition and force the phase selection for phase-to-earth loops without the IN criterion.
This logic shall be enabled by using the parameter EnableAutoPhSel. Additional checks for
maximum phase current level, minimum phase voltage level, residual voltage level and phase-to-
phase voltage unbalance level are also included in order to make this logic more secure.
EnableAutoPhSel
MaxPhPhVolt
MinPhPhVolt startUN
nonDelayedStartIN
a
DeltaUPP b forceIN
AND
maxPhCurrent
a
IPhMax> b
minPhVoltage
Min(UL1, UL2, UL3) a
UPhMin< b
U3P maxPhVoltage
Max(UL1, UL2, UL3) a
b
3U0
1,05
X
GUID-14452519-D522-4C60-900F-1E2386D4E704 V1 EN-US
Figure 86: Automatic phase selection for Cross Country fault without residual current
The voltage phase selection can be complemented with external phase selection through inputs
RELL1-3N.
ccfphL1
startUL1 ccfphL2
AND ccfphL3
startUPP
AND OR
AND
startUL1UL2
phL1L2OpenLoop
AND
startUL2UL3
phL2L3OpenLoop
AND
startUL3UL1
phL3L1OpenLoop
AND
OperMode =
No Filter
OR AND
OperMode =
NoPref startL1
RELL1N OR
startL2
RELL2N OR
startL3
RELL3N OR
forceIN OR
INStartFulfilled
IEC16000020 V2 EN-US
The different operating modes (selected with OperMode setting) determine how the internal status is
used to release the phases of the connected distance protection.
This setting shall be set in accordance with used phase preference scheme in the protected network.
It is of uttermost importance that all distance relays installed in this network has the same setting
value for this parameter.
TRUE
TRUE zrelL2
TRUE zrelL3
IEC16000021 V2 EN-US
TRUE
zrelL1
AND
TRUE zrelL2
AND
TRUE
zrelL3
AND
startIN
IEC16000022 V2 EN-US
A logic is also included to handle the special case where only one start (startL1-3) is present.
The internal under-voltage phase selection always issues a release in at least two phases, but the
inputs RELL1-3N can be activated with some time apart. If no measures are taken, the phase
activated first will pass through the preference scheme and release the distance protection. Since it
could a be non-preferred phase, a time delay of 40 ms is provided to release if only one phase is
detected, in order to wait for the second phase to be activated. If no second phase is detected within
40 ms, the single phase is released without preference.
• All three phases are involved in the fault and a cyclic scheme is selected
• No faulty phase can be detected due to an insufficient voltage drop
In both cases, no release signals come from the phase preference scheme. For these cases, an
additional logic is provided that releases all three phase-to-earth loops if there is no output from the
preference scheme after 40 ms from the activation of the residual current start.
Hence, if there is a residual current start, it is guaranteed that the distance protection is released in at
least one phase. This is valid for all phase preference schemes.
Preference
OperMode scheme
Scheme
startL1 prefL1
INL1 OUTL1
startL2 INL2 OUTL2
prefL2
startL3 INL3 OUTL3
prefL3
More than
one true stIN
AND
startIN
40 ms
AND stIN40ms
t
IEC16000023 V3 EN-US
prefL1
OR zrelL1
AND
prefL2
OR zrelL2
AND
prefL3
OR zrelL3
AND
30 ms
OR t
AND
stIN40ms
stIN OR
IEC16000024 V2 EN-US
Figure 91: Logic to release the preferred phase towards distance protection
Table 66 shows the preferred phase for each detected cross-country fault type and operating mode
(OperMode).
Table 66: Preferred phase for each cross-country fault type and operating mode
All loop releasing signals are gathered in the binary coded integer outputs ZREL and ZST. The value
of ZREL can be calculated according to Equation 17.
For example, if only L1N is active, then the value is 1. If both start L1N and L3N are active, then the
value is 1+4=5.
The phase-to-phase loops are always released, that is, the value of ZREL will always be
at least 8+16+32=56. For example:
If only L1N is active, then the value is 1+56=57
If start L1N and L3N are active, then the value is 1+4+56=61
The BLOCK input will only block the enabling signals for phase-to-earth loops, phase-to-
phase loops are still released.
Where P-Coil, Reactor, Resistor, Isolated and Solidly are the chosen system earthings in the setting
of SystemEarthing.
startIN
STIN
BLOCK AND
startUN
STU
AND
zreIL1
OPENL1E
AND
zreIL2
OPENL2E
AND
zreIL3
OPENL2E
AND
L1N
L2N
L3N
Bool to ZREL
TRUE L1L2 Integer
TRUE L2L3
TRUE L3L1
ccfphL1
CCFPHL1
AND
ccfphL2
CCFPHL2
AND
ccfphL3
CCFPHL3
AND
phL1L2OpenLoop
AND
phL2L3OpenLoop
AND
Bool to
AND Integer ZST
forceIN
AND
SystemEarthing
FORCEIN
IEC16000025 V2 EN-US
7.1.1 Identification
M14880-1 v5
SYMBOL-Z V1 EN-US
The instantaneous three phase overcurrent (PHPIOC) function has a low transient overreach and
short tripping time to allow use as a high set short-circuit protection function.
PHPIOC
I3P* TRIP
BLOCK TRL1
ENMULT TRL2
TRL3
IEC04000391-2-en.vsd
IEC04000391 V2 EN-US
PID-6914-INPUTSIGNALS v3
PID-6914-OUTPUTSIGNALS v3
PID-6914-SETTINGS v3
The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block. The
RMS value of each phase current is derived from the fundamental frequency components, as well as
sampled values of each phase current. These phase current values are fed to the instantaneous
phase overcurrent protection 3-phase output function PHPIOC. In a comparator the RMS values are
compared to the set operation current value of the function (IP>>).
If a phase current is larger than the set operation current a signal from the comparator for this phase
is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this phase
and the TRIP signal that is common for all three phases.
There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the parameter is set to 1 out
of 3, any phase trip signal will be activated. If the parameter is set to 2 out of 3, at least two phase
signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current (StValMult) via a
binary input (ENMULT). In some applications the operation value needs to be changed, for example,
due to transformer inrush currents.
The operation current value IP>>, is limited to be between IP>>Max and IP>>Min. The default values
of the limits are the same as the setting limits for IP>>, and the limits can only be used for reducing
the allowed range of IP>>. This feature is used when remote setting of the operation current value is
allowed, making it possible to ensure that the operation value used is reasonable. If IP>> is set
outside IP>>Max and IP>>Min, the closest of the limits to IP>> is used by the function. If IP>>Max is
smaller then IP>>Min, the limits are swapped. The principle of the limitation is shown in Figure 94.
IP>>Max
MAX hi
u y
IP>>_used
IP>>
MIN lo
IP>>Min
IEC17000016-1-en.vsdx
IEC17000016 V1 EN-US
M12336-1 v14
J 2.2.6 -
H 2.2.6 Minimum value changed to 0.01 for k1,k2,k3 and k4 settings
7.2.2 Identification
M14885-1 v6
TOC-REVA V2 EN-US
Directional phase overcurrent protection, four steps (OC4PTOC) has an inverse or definite time delay
for each step.
All IEC and ANSI inverse time characteristics are available together with an optional user defined
time characteristic.
The directional function needs voltage as it is voltage polarized with memory. The function can be set
to be directional or non-directional independently for each of the steps.
A second harmonic blocking level can be set for the function and can be used to block each step
individually.
OC4PTOC
I3P* TRIP
U3P* TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
ST2NDHRM
DIRL1
DIRL2
DIRL3
STDI RCND
IEC06000187-4-en.vsdx
IEC06000187 V4 EN-US
7.2.5 Signals
PID-8147-INPUTSIGNALS v1
PID-8147-OUTPUTSIGNALS v1
7.2.6 Settings
PID-8147-SETTINGS v1
Directional phase overcurrent protection, four steps OC4PTOC is divided into four different sub-
functions. For each step x , where x is step 1, 2, 3 and 4, an operation mode is set by DirModex: Off/
Non-directional/Forward/Reverse.
If VT inputs are not available or not connected, setting parameter DirModex shall be left
to default value, Non-directional.
4 step overcurrent
Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START
U3P
TRIP
Harmonic harmRestrBlock
Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
IEC05000740-3-en.vsdx
IEC05000740 V3 EN-US
Using a parameter setting MeasType within the general settings for the function OC4PTOC, it is
possible to select the type of the measurement used for all overcurrent stages. Either discrete
Fourier filter (DFT) or true RMS filter (RMS) can be selected.
If the DFT option is selected, only the RMS value of the fundamental frequency component of each
phase current is derived. The influence of the DC current component and higher harmonic current
components are almost completely suppressed. If the RMS option is selected, then the true RMS
value is used. The true RMS value includes the contribution from the current DC component as well
as from the higher current harmonic in addition to the fundamental frequency component.
In a comparator, the DFT or RMS values are compared to the set operation current value of the
function (I1>, I2>, I3> or I4>) for each phase current. If a phase current is larger than the set
operation current, outputs START, STx, STL1, STL2 and STL3 are activated without delay. Output
signals STL1, STL2 and STL3 are common for all steps. This means that the lowest set step will
initiate the activation. The START signal is common for all three phases and all steps. It shall be
noted that the selection of measured value (DFT or RMS) do not influence the operation of
directional part of OC4PTOC.
Service values for individually measured phase currents are available on the local HMI for OC4PTOC
function, which simplifies testing, commissioning and in service operational checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used.
The function can be directional. The direction of a fault is given as the current angle in relation to the
voltage angle. The fault current and fault voltage for the directional function are dependent on the
fault type. The selection of the measured value (DFT or RMS) does not influence the operation of the
directional part of OC4PTOC. To enable directional measurement at close-in faults, causing a low
measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a
memory voltage (15%). The following combinations are used.
U refL1L 2 = U L1 - U L 2 I dirL1L 2 = I L1 - I L 2
EQUATION1449 V1 EN-US (Equation 19)
U refL 2 L 3 = U L 2 - U L 3 I dirL 2 L 3 = I L 2 - I L 3
EQUATION1450 V1 EN-US (Equation 20)
U refL 3 L1 = U L 3 - U L1 I dirL 3 L1 = I L 3 - I L1
EQUATION1451 V1 EN-US (Equation 21)
U refL1 = U L1 I dirL1 = I L1
EQUATION1452 V1 EN-US (Equation 22)
U refL 2 = U L 2 I dirL 2 = I L 2
EQUATION1453 V1 EN-US (Equation 23)
U refL 3 = U L 3 I dirL 3 = I L 3
EQUATION1454 V1 EN-US (Equation 24)
The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set
base voltage UBase. So the directional element can be used for all unsymmetrical faults including
close-in faults.
For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
• If the current is still above the set value of the minimum operating current (7% of the set terminal
rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.
The directional setting is given as a characteristic angle AngleRCA for the function and an angle
window ROADir.
Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
IEC05000745 V1 EN-US
A minimum current for the directional phase start current signal can be set. IMinOpPhSel is the start
level for the directional evaluation of IL1, IL2 and IL3. The directional signals release the overcurrent
measurement in the respective phases if their current amplitudes are higher than the start level
(IMinOpPhSel) and the direction of the current is according to the set direction of the step.
If no blocking signals are active, the start signal will start the timer of the steps. The time
characteristic for each step can be chosen as definite time delay or an inverse time delay
characteristic. A wide range of standardized inverse time delay characteristics is available. It is also
possible to create a tailor made time characteristic.
The possibilities for inverse time characteristics are described in section "Inverse characteristics".
HarmBlockx = Enabled
Freeze Timers
AND
2ndH_FreezeTimers_int
EMULTX
IMinx Characteristx=DefTime
X T b tx
F a>b
a t
TRx
AND AND
|IOP|
a OR
a>b
b
STx
IxMult AND
X T
F
Inverse
Ix>
AND
AND
Characteristx=Inverse
txmin
DirModex=Off t
OR STEPx_DIR_Int
DirModex=Non-directional
DirModex=Forward AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
IEC12000008‐2‐en.vsdx
IEC12000008 V3 EN-US
I3P
DFWDLx
U3P DFWDLxx
DREVLx
Directional
Element
AngleRCA DREVLxx FORWARD_int
Directional
AngleROA Release REVERSE_int
Block
STLx
Greater
IMinOpPhSel Comparator
x‐ means three phases 1,2 and 3
xx – means phase to phase 12,23,31
IEC15000266-2-en.vsdx
IEC15000266 V2 EN-US
There is a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the set operation current
via a binary input ENMULTx (enable multiplier). In some applications the operation value needs to be
changed, for example due to changed network switching state.
The operation current value Ix>, is limited to be between Ix>Max and Ix>Min. The default values of
the limits are the same as the setting limits for Ix>, and the limits can only be used for reducing the
allowed range of Ix>. This feature is used when remote setting of the operation current value is
allowed, making it possible to ensure that the operation value used is reasonable. If Ix> is set outside
Ix>Max and Ix>Min, the closest of the limits to Ix> is used by the function. If Ix>Max is smaller then
Ix>Min, the limits are swapped. The principle of the limitation is shown in Figure 100.
Ix>Max
MAX hi
u y
Ix>_used
Ix>
MIN lo
Ix>Min
IEC17000018-1-en.vsdx
IEC17000018 V1 EN-US
The STDIRCND output provides an integer signal that depends on the start and directional
evaluation and is derived from a binary coded signal as described in Table 81.
STDIRCND Description
bit 0 (1) General start
bit 1 (2) Direction detected in forward
bit 2 (4) Direction detected in reverse
bit 3 (8) Start in phase L1
bit 4 (16) Forward direction detected in phase L1
bit 5 (32) Reverse direction detected in phase L1
bit 6 (64) Start in phase L2
bit 7 (128) Forward direction detected in phase L2
bit 8 (256) Reverse direction detected in phase L2
bit 9 (512) Start in phase L3
bit 10 (1024) Forward direction detected in phase L3
bit 11 (2048) Reverse direction detected in phase L3
All four steps in OC4PTOC can be blocked from the binary input BLOCK. The binary input BLKSTx
(x=1, 2, 3 or 4) blocks the operation of the respective step.
The start signals from the function can be blocked by the binary input BLKST. The trip signals from
the function can be blocked by the binary input BLKTR.
GUID-E3980B2D-EEDA-4BF1-A07D-E7B721130554 v7
A harmonic restrain of the directional phase overcurrent protection function OC4PTOC can be
chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency
component in a phase current exceeds the preset level defined by the parameter 2ndHarmStab
setting, any of the four overcurrent stages can have their timers selectively frozen by the parameter
HarmBlockx setting. When the 2nd harmonic restraint feature is active, the OC4PTOC function
output signal ST2NDHRM will be set to the logical value one.
BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b
Extract 2ndH_FreezeTimers_Int
fundamental
current component
X
2ndHarmStab
IEC13000014-3-en.vsdx
IEC13000014 V3 EN-US
When enabled, the 2nd harmonic blocking function is used to freeze the Definite and/or
the Inverse Characteristics internal timers. When the function detects a 2nd harmonic
higher than the set threshold, the internal function timers are frozen but START outputs
continues to be active as long as the measured current is above the set pickup level.
Internal timers will again resume timing when harmonic content becomes smaller than the
set threshold and the measured current is higher than the pickup value. If TRIP output is
already active when harmonic blocking signal appears the TRIP output will not be
affected.
When DirModex is set to Forward/Reverse and Ix> is set at its minimum value, that is,
5.0% of IBase, the operation from the respective overcurrent step takes place at 20.0% of
IBase. This is done to avoid unintentional maloperations during unbalanced loading
conditions that might appear in power systems and the unbalanced loading condition
might lead to a neutral current in the range of 10.0% to 15.0% of IBase.
7.3.1 Identification
M14887-1 v4
IEF V1 EN-US
The Instantaneous residual overcurrent protection (EFPIOC) has a low transient overreach and short
tripping times to allow the use for instantaneous earth-fault protection, with the reach limited to less
than the typical eighty percent of the line at minimum source impedance. EFPIOC is configured to
measure the residual current from the three-phase current inputs and can be configured to measure
the current from a separate current input.
EFPIOC
I3P* TRIP
BLOCK
BLKAR
ENMULT
IEC06000269-3-en.vsdx
IEC06000269 V3 EN-US
PID-6915-INPUTSIGNALS v4
PID-6915-OUTPUTSIGNALS v4
PID-6915-SETTINGS v4
The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of the residual current, as well as from the sample
values the equivalent RMS value is derived. This current value is fed to the Instantaneous residual
overcurrent protection (EFPIOC). In a comparator the RMS value is compared to the set operation
current value of the function (IN>>).
If the residual current is larger than the set operation current a signal from the comparator is set to
true. This signal will, without delay, activate the output signal TRIP.
There is also a possibility to activate a preset change of the set operation current via a binary input
(enable multiplier ENMULT). In some applications the operation value needs to be changed, for
example, due to transformer inrush currents.
The operation current value IN>>, is limited to be between IN>>Max and IN>>Min. The default values
of the limits are the same as the setting limits for IN>>, and the limits can only be used for reducing
the allowed range of IN>>. This feature is used when remote setting of the operation current value is
allowed, making it possible to ensure that the operation value used is reasonable. If IN>> is set
outside IN>>Max and IN>>Min, the closest of the limits to IN>> is used by the function. If IN>>Max is
smaller then IN>>Min, the limits are swapped. The principle of the limitation is shown in Figure 103.
IN>>Max
MAX hi
u y
IN>>_used
IN>>
MIN lo
IN>>Min
IEC17000015-1-en.vsdx
IEC17000015 V1 EN-US
EFPIOC function can be blocked from the binary input BLOCK. The trip signals from the function can
be blocked from the binary input BLKAR, that can be activated during single pole trip and
autoreclosing sequences.
M12340-2 v10
7.4.2 Identification
M14881-1 v7
Directional residual overcurrent protection, four steps (EF4PTOC) can be used as main protection for
phase-to-earth faults. It can also be used to provide a system back-up, for example, in the case of
the primary protection being out of service due to communication or voltage transformer circuit
failure.
EF4PTOC has an inverse or definite time delay independent for each step.
All IEC and ANSI time-delayed characteristics are available together with an optional user-defined
characteristic.
IDir, UPol and IPol can be independently selected to be either zero sequence or negative sequence.
Directional operation can be combined together with the corresponding communication logic in
permissive or blocking teleprotection scheme. The current reversal and weak-end infeed functionality
are available as well.
The residual current can be calculated by summing the three-phase currents or taking the input from
the neutral CT.
EF4PTOC also provides very fast and reliable faulty phase identification for phase selective tripping
and subsequent reclosing during earth fault.
EF4PTOC
I3P* TRIP
I3PDIR* TRIN1
I3PPOL* TRIN2
U3P* TRIN3
BLOCK TRIN4
BLKTR TRSOTF
BLKST1 START
BLKST2 STIN1
BLKST3 STIN2
BLKST4 STIN3
BLKPHSEL STIN4
ENMULT1 STSOTF
ENMULT2 STFW
ENMULT3 STRV
ENMULT4 PHSELL1
CBPOS PHSELL2
CLOSECB PHSELL3
OPENCB 2NDHARMD
IEC06000424-6-en.vsdx
IEC06000424 V6 EN-US
PID-8149-INPUTSIGNALS v1
PID-8149-OUTPUTSIGNALS v1
PID-8149-SETTINGS v1
M13941-51 v8
This function has the following four analog inputs on its function block in the configuration tool:
1. I3P, input used for the operating quantity. Supplies the zero-sequence magnitude measuring
functionality.
2. U3P, input used for the voltage polarizing quantity. Supplies either the zero or the negative
sequence voltage to the directional functionality
3. I3P and U3P also supply current and voltage samples for faulty phase selection functionality.
4. I3PPOL, input used for the current polarizing quantity. Provides polarizing current to the
directional functionality. This current is normally taken from the grounding of a power
transformer.
5. I3PDIR, input used for directional detection. Supplies either the zero or the negative sequence
current to the directional functionality.
These inputs are connected from the corresponding pre-processing function blocks in the
configuration tool in PCM600.
The function always uses residual current (3I0) for its operating quantity. The residual current can be:
1. Directly measured (when a dedicated CT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block connected to EF4PTOC function input I3P). This
dedicated IED CT input can be, for example, connected to:
• Parallel connection of current instrument transformers in all three phases (Holm-Green
connection).
• One single core balance current instrument transformer (cable CT).
• One single current instrument transformer located between power system star point and
earth (current transformer located in the star point of a star connected transformer
winding).
• One single current instrument transformer located between two parts of a protected object
(current transformer located between two star points of double star shunt capacitor bank).
2. Calculated from three-phase current input within the IED (when the fourth analog input of the
pre-processing block, connected to EF4PTOC function Analog Input I3P, is not connected to a
dedicated CT input of the IED in PCM600). In such a case, the pre-processing block will
calculate 3I0 from the first three inputs into the pre-processing block by using the following
formula (will take 3I0 from SMAI AI3P and will be connected to I3PDIR and I3P inputs.
where:
IL1, IL2, and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental
frequency component of the residual current is derived. The phasor magnitude is used within the
EF4PTOC protection to compare it with the set operation current value of the four steps (IN1>, IN2>,
IN3>, or IN4>).
If the residual current is larger than the set operation current and the step is used in non-directional
mode a signal from the comparator for this step is set to true. This signal will, without delay, activate
the output signal STINx (x=step 1-4) for this step and a common START signal.
A polarizing quantity is used within the protection in order to determine the direction to the earth fault
(forward/reverse).
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected, the protection will use the residual voltage -3U0 as the polarizing
quantity U3P.
1. Directly measured (when a dedicated VT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block connected to EF4PTOC function input U3P). This
dedicated IED VT input shall be then connected to the open delta winding of a three-phase main
VT.
2. Calculated from three-phase voltage input within the IED (when the fourth analog input of the
pre-processing block, connected to EF4PTOC analog function input U3P, is NOT connected to a
dedicated VT input of the IED in PCM600). In such a case, the pre-processing block will
calculate -3U0 from the first three inputs into the pre-processing block by using the following
formula:
where:
UL1, UL2, and UL3 are fundamental frequency phasors of three individual phase voltages.
In order to use this, all three phase-to-earth voltages must be connected to three IED VT
inputs.
The residual voltage is pre-processed by a discrete Fourier filter. Thus, the phasor of the
fundamental frequency component of the residual voltage is derived.
This phasor is used together with the phasor of the operating directional current, in order to
determine the direction to the earth fault (Forward/Reverse). In order to enable voltage polarizing the
magnitude of polarizing voltage shall be bigger than a minimum level defined by setting parameter
UPolMin.
It shall be noted that residual voltage (-3U0) or negative sequence voltage (-3U2) is used to
determine the location of the earth fault. This ensures the required inversion of the polarizing voltage
within the earth-fault function.
Current polarizing
When current polarizing is selected, the function will use an external residual current (3I0) as the
polarizing quantity IPol. This current can be:
1. Directly measured (when a dedicated CT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block, connected to EF4PTOC function input I3PPOL). This
dedicated IED CT input is then typically connected to one single current transformer located
between power system star point and earth (current transformer located in the star point of a
star connected transformer winding).
• For some special line protection applications, this dedicated IED CT input can be
connected to a parallel connection of current transformers in all three phases (Holm-
Green connection).
2. Calculated from three phase current input within the IED (when the fourth analog input into the
pre-processing block, connected to EF4PTOC function analog input I3PPOL, is NOT connected
to a dedicated CT input of the IED in PCM600). In such case, the pre-processing block will
calculate 3I0 from the first three inputs into the pre-processing block by using the following
formula:
where:
IL1, IL2, and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete fourier filter. Thus the phasor of the fundamental
frequency component of the polarizing current is derived. This phasor is then multiplied with the pre-
set equivalent zero-sequence source impedance in order to calculate the equivalent polarizing
voltage UIPol in accordance with the following formula:
which will be then used, together with the phasor of the operating current, in order to determine the
direction to the earth fault (forward/reverse).
In order to enable current polarizing, the magnitude of the polarizing current shall be bigger than a
minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected, the function will use the vectorial sum of the voltage based and
current based polarizing in accordance with the following formula:
UPol and IPol can be either zero sequence component or negative sequence component depending
upon the user selection.
Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor of the
operating current, to determine the direction of the earth fault (forward/reverse).
The individual steps within the protection can be set as non-directional. When this setting is selected,
it is possible via the function binary input BLKSTx to provide external directional control (that is,
torque control) by, for example, using one of the following functions if available in the IED:
Zero sequence components will be used for detecting directionality for the earth fault function. In
some cases, zero sequence quantities might detect directionality incorrectly. In such a scenario,
negative sequence quantities will be used. The user can select either zero sequence components or
negative sequence components for detecting directionality with the parameter SeqTypeIPol. I3PDIR
input is always connected to the same source as I3P input.
The base quantities are entered as global settings for all functions in the IED. Base current (IBase)
shall be entered as rated phase current of the protected object in primary amperes. Base voltage
(UBase) shall be entered as rated phase-to-phase voltage of the protected object in primary kV.
Each overcurrent step uses operating quantity Iop (residual current) as the measuring quantity. Each
of the four residual overcurrent steps has the following built-in facilities:
INx>Max
MAX hi
INx>_used
INx> u y
MIN lo
INx>Min
IEC17000017-2-en.vsdx
IEC17000017 V2 EN-US
Simplified logic diagram for one residual overcurrent step is shown in Figure 106.
HarmBlockx = Enabled
Freeze Timers
AND
2ndH_FreezeTimers_int
EMULTX
IMinx Characteristx=DefTime
X T b tx
F a>b
a t
TRINx
AND AND
|IOP|
a OR
a>b
b
STINx
INxMult AND
X T
F
Inverse
INx>
AND
AND
Characteristx=Inverse
txmin
DirModex=Off t
OR STEPx_DIR_Int
DirModex=Non-directional
DirModex=Forward AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
IEC10000008-7-en.vsdx
IEC10000008 V7 EN-US
Figure 106: Simplified logic diagram for residual overcurrent step x, where x = step 1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output signals for respective
step, and STINx and TRINx, can be blocked from the binary input BLKSTx. The trip signals from the
function can be blocked from the binary input BLKTR.
At least one of the four residual overcurrent steps shall be set as directional in order to
enable execution of the directional supervision element and the integrated directional
comparison function.
The protection has an integrated directional feature. As the operating quantity current Iop is always
used, the polarizing method is determined by the parameter setting polMethod. The polarizing
quantity will be selected by the function in one of the following three ways:
The operating and polarizing quantity are then used inside the directional element, as shown in
Figure 107, in order to determine the direction of the earth fault.
Operating area
STRV
0.6 * IN>DIR
Characteristic for reverse
release of measuring steps
-RCA -85 deg
Characteristic
for STRV 40% of
IN>DIR RCA +85 deg
RCA
65° Upol = -3U 0
STFW
I op = 3I0
Operating area
Characteristic
for STFW IEC11000243-1-en.ai
IEC11000243 V1 EN-US
Figure 107: Operating characteristic for earth-fault directional element using the zero
sequence components
The relevant setting parameters for the directional supervision element are:
• The directional element will be internally enabled to operate as soon as Iop is bigger than 40%
of IN>Dir and the directional condition is fulfilled in the set direction.
• The relay characteristic angle AngleRCA, which defines the position of forward and reverse
areas in the operating characteristic.
1. STFW=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than setting
parameter IN>Dir and directional supervision element detects fault in forward direction.
2. STRV=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than 60% of
setting parameter IN>Dir and directional supervision element detects fault in reverse direction.
These signals shall be used for communication based earth-fault teleprotection communication
schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated directional comparison
step is shown in Figure 108:
| IopDir |
a
a>b STRV
b AND
REVERSE_Int
0.6
X
a
a>b STFW
IN>Dir b AND
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
UPolMin
Characteristic
Directional
polMethod=Dual IPolMin
UPol T
I3PDIR
0.0 F
polMethod=Current
OR
UTotPol
IPol AND REVERSE_Int
T RVS
F
UIPol
RNPol STAGE1_DIR_Int
X T
Complex 0.0 STAGE2_DIR_Int
Number 0.0 F OR
XNPol STAGE3_DIR_Int
STAGE4_DIR_Int
BLOCK AND
IEC07000067-7-en.vsdx
IEC07000067 V7 EN-US
Figure 108: Simplified logic diagram for directional supervision element with integrated directional comparison
step
A harmonic restrain can be chosen for each step by a parameter setting HarmBlockx. If the ratio of
the 2nd harmonic component in relation to the fundamental frequency component in the residual
current exceeds the preset level (defined by parameter 2ndHarmStab), output signal 2NDHARMD is
set to logical value one and the harmonic restraining feature to the function block will be applicable.
Blocking from the 2nd harmonic element activates if all of three criteria are satisfied:
In addition to the basic functionality explained above, the 2nd harmonic blocking can be set in such
way to seal-in until residual current disappears. This feature might be required to stabilize EF4PTOC
during switching of parallel transformers in the station. In case of parallel transformers there is a risk
of sympathetic inrush current. If one of the transformers is in operation, and the parallel transformer
is switched in, the asymmetric inrush current of the switched-in transformer will cause partial
saturation of the transformer already in service. This is called transferred saturation. The 2nd
harmonic of the inrush currents of the two transformers is in phase opposition. The summation of the
two currents thus gives a small 2nd harmonic current. The residual fundamental current is however
significant. The inrush current of the transformer in service before the parallel transformer energizing,
is a little delayed compared to the first transformer. Therefore, we have high 2nd harmonic current
component initially. After a short period this current is however small and the normal 2nd harmonic
blocking resets. If the BlkParTransf function is activated, the 2nd harmonic restrain signal is latched
as long as the residual current measured by the relay is larger than a selected step current level by
using setting UseStartValue.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature is
activated when all of the following three conditions are simultaneously fulfilled:
Once Block for Parallel Transformers is activated, the basic 2nd harmonic blocking signal is sealed-in
until the residual current magnitude falls below a value defined by parameter setting UseStartValue
(see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in Figure 109.
BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b
Extract
fundamental
current component
X
2ndHarmStab
q-1
0-70ms OR 2ndH_FreezeTimers_int
AND OR
0
BlkParTransf=On
|IOP|
a
a>b
b
Use_PUValue
Pickup1>
Pickup2>
Pickup3>
Pickup4>
ANSI13000015-2-en.vsdx
ANSI13000015 V2 EN-US
Figure 109: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers
feature
When enabled, the 2nd harmonic blocking function is used to freeze the Definite and/or
the Inverse Characteristics internal timers. When the function detects a 2nd harmonic
higher than the set threshold, the internal function timers are frozen but START outputs
continues to be active as long as the measured current is above the set pickup level.
Internal timers will again resume timing when harmonic content becomes smaller than the
set threshold and the measured current is higher than the pickup value. If TRIP output is
already active when harmonic blocking signal appears the TRIP output will not be
affected.
Integrated in the four step residual overcurrent protection are the switch on to fault logic (SOTF) and
the under-time logic. The setting parameter SOTF is set to activate SOTF, the under-time logic or
both. When the circuit breaker is closing there is a risk to close it onto a permanent fault, for example
during an autoreclosing sequence. The SOTF logic will enable fast fault clearance during such
situations. The time during which SOTF and under-time logics will be active after activation is defined
by the setting parameter t4U.
The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected by setting
parameter StepForSOTF. The setting parameter ActivationSOTF can be set for activation of CB
position open change, CB position closed change or CB close command. In case of a residual
current start from step 2 or 3 (dependent on setting) the function will give a trip after a set delay
tSOTF. This delay is normally set to a short time (default 200 ms).
The under-time logic acts as a circuit breaker pole-discordance protection, but it is only active
immediately after breaker switching. The under-time logic can only be used in solidly or low
impedance grounded systems.
The under-time logic always uses the start signal from the step 4. The under-time logic will normally
be set to operate for a lower current level than the SOTF function. The under-time logic can also be
blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if power transformer
inrush currents can occur at breaker closing. This logic is typically used to detect asymmetry of CB
poles immediately after switching of the circuit breaker. The under-time logic is activated either from
change in circuit breaker position or from circuit breaker close and open command pulses. This
selection is done by setting parameter ActUnderTime. In case of a start from step 4 this logic will give
a trip after a set delay tUnderTime. This delay is normally set to a relatively short time (default 300
ms).
SOTF
200 ms
Open
t
t4U
200 ms
Closed
t ActivationSOTF
Close command
tSOTF
AND t
AND
STIN2
StepForSOTF
STIN3
SOTF
BLOCK
OFF
SOTF
UNDERTIME
UnderTime TRIP
tUnderTime
SOTF or
AND
2nd Harmonic HarmResSOFT t UnderTime
OR
Open
Close OR
t4U
ActUnderTime
Close command AND
STIN4
IEC06000643-7-en.vsdx
IEC06000643 V7 EN-US
Figure 110: Simplified logic diagram for SOTF and under-time features
M13941-3 v6
Simplified logic diagram for the complete EF4PTOC function is shown in Figure 111:
harmRestrBlock
3I0 Harmonic
Restraint 1
Element TRIP
Blocking at parallel
transformers
SwitchOnToFault
TRSOTF
CB
DirMode pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
IEC06000376-4-en.vsdx
IEC06000376 V4 EN-US
The phase selection element provides very fast and reliable faulty phase identification for phase
selective tripping and subsequent reclosing during earth faults. The operation of the phase selection
element is based on both voltage phasor comparison and current change criteria. This measuring
principle successfully distinguishes the faulty phase with minimum influence from load current or
other disturbances, such as power swing. The phase selection feature can be enabled by setting
EnPhaseSel.
The faulty phases are primarily identified by a delta current criteria. Per-phase and phase-to-phase
delta currents are calculated and compared with different criteria to determine if there is a single
phase or phase-to-phase to earth fault. In case the fault cannot be identified by the delta current
criteria, a voltage phasor based method will be applied by comparing the angle between the voltage
phasor and the zero sequence current. The voltage phasor based method is applicable for forward
direction single phase to ground faults. If a three phase disturbance has been identified (for example,
during power swing), the voltage based method will be temporarily disabled until the disturbance
disappears.
The operation of the phase selection element is controlled by the measured zero sequence current.
When the measured zero sequence current is above the operate level (60% of IN>Dir), phase
selection is released. Once the faulty phase is selected, the selected phase will be latched until the
zero sequence current drops below the operate level.
Outputs PHSELL1, PHSELL2, and PHSELL3 are used to indicate the selected faulty phases. The
outputs are released when general START from EF4 function is TRUE.
The phase selection element will be blocked by the external input BLKPHSEL or when the circuit
breaker position is open. The CBPOS input will be high when the circuit breaker is closed and it will
be low when the circuit breaker is open. The CBPOS input provides the CB position to phase
selection element.
tON = 20ms
Phase selection by
U3P voltage and zero
AND 1s AND
sequence current
phasor
No 3 Phase Disturbance
STFW
IEC20000563-2-en.vsdx
IEC20000563 V2 EN-US
M15223-1 v19
F 2.2.5 -
J 2.2.6 -
K 2.2.6 Minimum value changed to 0.01 for k1,k2,k3 and k4 settings
7.5.2 Identification
GUID-E1720ADA-7F80-4F2C-82A1-EF2C9EF6A4B4 v1
alt
IEC10000053 V2 EN-US
Four step directional negative phase sequence overcurrent protection (NS4PTOC) has an inverse or
definite time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user defined
characteristic.
NS4PTOC can be set directional or non-directional independently for each of the steps.
NS4PTOC can be used as main protection for unsymmetrical fault; phase-phase short circuits,
phase-phase-earth short circuits and single phase earth faults.
NS4PTOC can also be used to provide a system backup for example, in the case of the primary
protection being out of service due to communication or voltage transformer circuit failure.
NS4PTOC (46I2)
I3P* TRIP
I3PDIR* TR1
U3P* TR2
BLOCK TR3
BLKTR TR4
BLKST1 START
BLKST2 ST1
BLKST3 ST2
BLKST4 ST3
ENMULT1 ST4
ENMULT2 STFW
ENMULT3 STRV
ENMULT4
IEC10000054 V3 EN-US
7.5.5 Signals
PID-8148-INPUTSIGNALS v1
PID-8148-OUTPUTSIGNALS v1
7.5.6 Settings
PID-8148-SETTINGS v1
Four step negative sequence overcurrent protection NS4PTOC function has the following three
“Analog Inputs” on its function block in the configuration tool:
These inputs are connected from the corresponding pre-processing function blocks in the
Configuration Tool within PCM600.
Four step negative sequence overcurrent protection NS4PTOC function always uses negative
sequence current (I2) for its operating quantity. The negative sequence current is calculated from
three-phase current input within the IED. The pre-processing block calculates I2 from the first three
inputs into the pre-processing block by using the following formula:
1
I2 =
3
(
× IL1 + a × IL 2 + a × IL 3
2
)
EQUATION2266 V2 EN-US (Equation 32)
where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
a is so called operator which gives a phase shift of 120 deg, that is, a = 1∠120 deg
a2 similarly gives a phase shift of 240 deg, that is, a2 = 1∠240 deg
The phasor magnitude is used within the NS4PTOC protection to compare it with the set operation
current value of the four steps (I1>, I2>, I3> or I4>). If the negative sequence current is larger than
the set operation current and the step is used in non-directional mode a signal from the comparator
for this step is set to true. This signal, without delay, activates the output signal STx (x=1 - 4) for this
step and a common START signal.
A polarizing quantity is used within the protection to determine the direction to the fault (Forward/
Reverse).
Four step negative sequence overcurrent protection NS4PTOC function uses the voltage polarizing
method.
NS4PTOC uses the negative sequence voltage -U2 as polarizing quantity U3P. This voltage is
calculated from three phase voltage input within the IED. The pre-processing block calculates -U2
from the first three inputs into the pre-processing block by using the following formula:
1
UPol = -U 2 = - × (UL1 + a 2 × UL 2 + a × UL3 )
3
EQUATION2267 V2 EN-US
where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.
To use this all three phase-to-earth voltages must be connected to three IED VT inputs.
This phasor is used together with the phasor of the operating current, in order to determine the
direction to the fault (Forward/Reverse).To enable voltage polarizing the magnitude of polarizing
voltage must be bigger than a minimum level defined by setting UpolMin.
Note that –U2 is used to determine the location of the fault. This ensures the required inversion of the
polarizing voltage within the function.
The individual steps within the protection can be set as non-directional. When this setting is selected
it is then possible via function binary input BLKSTx (where x indicates the relevant step within the
protection) to provide external directional control (that is, torque control) by for example using one of
the following functions if available in the IED:
Each overcurrent stage uses Operating Quantity I2 (negative sequence current) as measuring
quantity. Every of the four overcurrent stage has the following built-in facilities:
• Operating mode (Off/ Non-directional /Forward / Reverse). By this parameter setting the
operating mode of the stage is selected. Note that the directional decision (Forward/Reverse) is
not made within the overcurrent stage itself. The direction of the fault is determined in common
“Directional Supervision Element” described in the next paragraph.
• Negative sequence current pickup value.
• Type of operating characteristic (Inverse or Definite Time). By this parameter setting it is
possible to select Inverse or definite time delay for negative sequence overcurrent function.
Most of the standard IEC and ANSI inverse characteristics are available. For the complete list of
available inverse curves, refer to Chapter "Inverse characteristics"
• Type of reset characteristic (Instantaneous / IEC Reset /ANSI reset).By this parameter setting it
is possible to select the reset characteristic of the stage. For the complete list of available reset
curves, refer to Chapter "Inverse characteristics"
• Time delay related settings. By these parameter settings the properties like definite time delay,
minimum operating time for inverse curves, reset time delay and parameters to define user
programmable inverse curve are defined.
• Multiplier for scaling of the set negative sequence current pickup value by external binary signal.
By this parameter setting it is possible to increase negative sequence current pickup value when
function binary input ENMULTx has logical value 1.
Simplified logic diagram for one negative sequence overcurrent stage is shown in the following
figure:
Characteristic=DefTime tDT
AND
a TRIP
a>b OR
EnaMultiplier b
MULTVAL START
AND
X T
F
I2>
tMinIDMT
AND tIDMT
Inverse
Characteristic=Inverse
DirMode=Off OR DIR_Selected
DirMode=Non-directional
DirMode=Forward
AND OR
DIRFW
DirMode=Reverse
AND
DIRRV
IEC09000683 V4 EN-US
Figure 114: Simplified logic diagram for negative sequence overcurrent stage x , where x=1, 2, 3 or 4
NS4PTOC can be completely blocked from the binary input BLOCK. The start signals from
NS4PTOC for each stage can be blocked from the binary input BLKSTx. The trip signals from
NS4PTOC can be blocked from the binary input BLKTR.
At least one of the four negative sequence overcurrent steps must be set as directional in
order to enable execution of the directional supervision element and the integrated
directional comparison function.
The operating and polarizing quantity are then used inside the directional element, as shown in figure
115, to determine the direction of the fault.
Reverse
Area
AngleRCA Upol=-U2
Forward
Area
Iop = I2
IEC10000031-1-en.vsd
IEC10000031 V1 EN-US
• Directional element is internally enable to operate as soon as Iop is bigger than 40% of I>Dir
and the directional condition is fulfilled in set direction.
• Relay characteristic angle AngleRCA which defines the position of forward and reverse areas in
the operating characteristic.
Directional comparison step, built-in within directional supervision element, set NS4PTOC output
binary signals:
1. STFW=1 when tip of I2 phasor (operating quantity magnitude) is in forward area, see fig 115
(Operating quantity magnitude is bigger than setting I>Dir)
2. STRV=1 when tip of I2 phasor (operating quantity magnitude) is in the reverse area, see fig 115.
(Operating quantity magnitude is bigger than 60% of setting I>Dir)
These signals must be used for communication based fault teleprotection communication schemes
(permissive or blocking).
Simplified logic diagram for directional supervision element with integrated directional comparison
step is shown in figure 116:
IEC07000067-4 V3 EN-US
Figure 116: Simplified logic diagram for directional supervision element with integrated directional comparison
step
GUID-E83AD807-8FE0-4244-A50E-86B9AF92469E v8
7.6.1 Identification
SEMOD172025-2 v4
In networks with high impedance earthing, the phase-to-earth fault current is significantly smaller
than the short circuit currents. Another difficulty for earth fault protection is that the magnitude of the
phase-to-earth fault current is almost independent of the fault location in the network.
Directional residual current can be used to detect and give selective trip of phase-to-earth faults in
high impedance earthed networks. The protection uses the residual current component 3I0 · cos φ,
where φ is the angle between the residual current and the residual voltage (-3U0), compensated with
a characteristic angle. Alternatively, the function can be set to strict 3I0 level with a check of angle φ.
Directional residual power can also be used to detect and give selective trip of phase-to-earth faults
in high impedance earthed networks. The protection uses the residual power component 3I0 · 3U0 ·
cos φ, where φ is the angle between the residual current and the reference residual voltage,
compensated with a characteristic angle.
A normal non-directional residual current function can also be used with definite or inverse time
delay.
A backup neutral point voltage function is also available for non-directional residual overvoltage
protection.
In an isolated network, that is, the network is only coupled to earth via the capacitances between the
phase conductors and earth, the residual current always has -90º phase shift compared to the
residual voltage (3U0). The characteristic angle is chosen to -90º in such a network.
In resistance earthed networks or in Petersen coil earthed, with a parallel resistor, the active residual
current component (in phase with the residual voltage) should be used for the earth fault detection. In
such networks, the characteristic angle is chosen to 0º.
As the amplitude of the residual current is independent of the fault location, the selectivity of the earth
fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and when should the
sensitive directional residual power protection be used? Consider the following:
• Sensitive directional residual overcurrent protection gives possibility for better sensitivity. The
setting possibilities of this function are down to 0.25 % of IBase, 1 A or 5 A. This sensitivity is in
most cases sufficient in high impedance network applications, if the measuring CT ratio is not
too high.
• Sensitive directional residual power protection gives possibility to use inverse time
characteristics. This is applicable in large high impedance earthed networks, with large
capacitive earth fault currents. In such networks, the active fault current would be small and by
using sensitive directional residual power protection, the operating quantity is elevated.
Therefore, better possibility to detect earth faults. In addition, in low impedance earthed
networks, the inverse time characteristic gives better time-selectivity in case of high zero-
resistive fault currents.
Phase
currents
IN
Phase-
Ground
voltages
UN
IEC13000013 V2 EN-US
Overcurrent functionality uses true 3I0, i.e. sum of GRPxL1, GRPxL2 and GRPxL3. For 3I0 to be
calculated, connection is needed to all three phase inputs.
Directional and power functionality uses IN and UN. If a connection is made to GRPxN this signal is
used, else if connection is made to all inputs GRPxL1, GRPxL2 and GRPxL3 the internally calculated
sum of these inputs (3I0 and 3U0) will be used.
SDEPSDE
I3P* TRIP
U3P* TRDIRIN
BLOCK TRNDIN
BLKTR TRUN
BLKTRDIR START
BLKNDN STDIRIN
BLKUN STNDIN
STUN
STFW
STRV
STDIR
UNREL
IEC07000032-2-en.vsd
IEC07000032 V2 EN-US
7.6.4 Signals
PID-3892-INPUTSIGNALS v7
PID-3892-OUTPUTSIGNALS v7
7.6.5 Settings
PID-3892-SETTINGS v7
The function is using phasors of the residual current and voltage. Group signals I3P and U3P
containing phasors of residual current and voltage which are taken from pre-processor blocks.
The sensitive directional earth fault protection has the following sub-functions included:
3I0
j = ang(3I0 ) - ang(3Uref )
-3U0 = Uref
3I0 × cosj
IEC06000648-4-en.vsd
IEC06000648 V4 EN-US
Uref
RCADir = −90 , ROADir = 90
3I0
3I0 ⋅ cos ϕ
−3U0
IEC06000649_3_en.vsd
IEC06000649 V3 EN-US
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function picks up, binary output signals START and STDIRIN are activated. If the output
signals START and STDIRIN remain active for the set delay tDef the binary output signals TRIP and
TRDIRIN get activated. The trip from this sub-function has definite time delay.
ROADir is Relay Operating Angle. ROADir is identifying a window around the reference direction in
order to detect directionality. Figure 121 shows the restrictions made by the ROADir.
RCADir = 0o
3I0
Operate area
j
-3U0 = Uref
3I0 × cos j
ROADir
IEC06000650_2_en.vsd
IEC06000650 V2 EN-US
It is also possible to tilt the characteristic to compensate for current transformer angle error with a
setting RCAComp as shown in the Figure 122:
RCADir = 0º
Operate area
-3U0 =Uref
Instrument
transformer
angle error
RCAcomp
Characteristic after
angle compensation
IEC06000651-3-en.vsd
IEC06000651 V3 EN-US
φ is defined as the angle between the residual current 3I0 and the reference voltage (Uref = -3U0 e-
jRCA) compensated with the set characteristic angle RCADir (|φ=ang(3I )—ang(U )|). The function
0 ref
operates when 3I0 · 3U0 · cos φ gets larger than the set value SN>. Refer to the simplified logical
diagram in Figure 124.
For trip, the residual power 3I0 · 3U0 · cos φ, the residual current 3I0 and the release voltage 3U0,
shall be larger than the set levels (SN>, INRel> and UNRel>).
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function picks up, binary output signals START and STDIRIN are activated. If the output
signals START and STDIRIN remain active for the set delay tDef or after the inverse time delay
(setting kSN) the binary output signals TRIP and TRDIRIN get activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as 3I0 ·
3U0·cos (φ + 180°) ³ the set value.
This variant has the possibility of choice between definite time delay and inverse time delay.
RCADir = 0º
ROADir = 80º
Operate area
3I0
-3U0
IEC06000652-3-en.vsd
IEC06000652 V3 EN-US
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function picks up, binary output signals START and STDIRIN are activated. If the output
signals START and STDIRIN remain active for the set delay tDef the binary output signals TRIP and
TRDIRIN get activated.
The function indicates forward/reverse direction to the fault. Reverse direction is defined as φ is
within the angle sector: RCADir + 180° ± ROADir
The non-directional function is using the calculated residual current, derived as sum of the phase
currents. This will give a better ability to detect cross-country faults with high residual current, also
when dedicated core balance CT for the sensitive earth fault protection will saturate.
This variant has the possibility of choice between definite time delay and inverse time delay
(TimeChar parameter). The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set level (INNonDir>).
Trip from this function can be blocked from the binary input BLKNDN.
When the function picks up, binary output signal STNDIN is activated. If the output signal STNDIN
remains active for the set delay tINNonDir or after the inverse time delay the binary output signals
TRIP and TRNDIN get activated.
In addition, there is also a separate non-directional residual over voltage protection, with its own
definite time delay tUN and set level UN>.
For trip, the residual voltage 3U0 shall be larger than the set level (UN>).
Trip from this function can be blocked from the binary input BLKUN.
When the function picks up, binary output signal STUN is activated. If the output signal STUN is
active for the set delay tUNNonDir, the binary output signals TRIP and TRUN get activated. A
simplified logical diagram of the total function is shown in Figure 124.
OpINNonDir> = On
STNDIN
&
INNonDir>
t
TRNDIN
TimeChar IN
OpUN> = On
STUN
&
UN>
tUN TRUN
t
OpMode = 3I0Cosfi
INRel>
tDef ³ TRDIRIN
t 1
OpMode = 3I03U0Cosfi
& &
SN>
t
³ S
1 N
STFW
RCADir Direction &
Detection
RCAComp Logic STRV
&
ROADir
DirMode = Forward
DirMode = Reverse
IEC06000653.vsd
IEC06000653 V4 EN-US
Figure 124: Simplified logical diagram of the sensitive earth fault current protection
SEMOD173350-2 v17
7.7.2 Identification
M17106-1 v7
The increasing utilization of the power system closer to the thermal limits has generated a need of a
thermal overload protection for power lines.
A thermal overload will often not be detected by other protection functions and the introduction of the
thermal overload protection can allow the protected circuit to operate closer to the thermal limits.
The three-phase current measuring protection has an I2t characteristic with settable time constant
and a thermal memory. The temperature is displayed in either Celsius or Fahrenheit, depending on
whether the function used is Thermal overload protection (LCPTTR) (Celsius) or (LFPTTR)
(Fahrenheit).
An alarm level gives early warning to allow operators to take action well before the line is tripped.
Estimated time to trip before operation, and estimated time to reclose after operation are presented.
LCPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET
IEC13000199 V2 EN-US
LFPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET
IEC13000301 V2 EN-US
7.7.5 Signals
PID-8003-INPUTSIGNALS v1
PID-8004-INPUTSIGNALS v1
PID-8003-OUTPUTSIGNALS v1
PID-8004-OUTPUTSIGNALS v1
7.7.6 Settings
PID-8003-SETTINGS v1
PID-8004-SETTINGS v1
PID-8004-MONITOREDDATA v1
The sampled analog phase currents are pre-processed and for each phase current the RMS value is
derived. These phase current values are fed to the thermal overload protection, one time constant
From the largest of the three-phase currents a final temperature is calculated according to the
expression:
2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø
EQUATION1167 V1 EN-US (Equation 34)
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature rise corresponding to Iref
The ambient temperature is added to the calculated final temperature. If this temperature is larger
than the set operate temperature level, TripTemp, a START output signal is activated.
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø
EQUATION1168 V1 EN-US (Equation 35)
where:
Qn is the calculated present temperature,
Q n-1 is the calculated temperature at the previous time step,
Q final is the calculated final temperature with the actual current,
Dt is the time step between calculation of the actual temperature and
t is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient temperature can
be taken from a separate sensor or can be given a constant value. The used ambient temperature is
available as a real figure signal, TEMPAMB. The calculated component temperature is available as a
real figure signal, TEMP. The temperature of the component compared to the setting TripTemp is also
available as a real figure signal, TERMLOAD which indicates the thermal status compared to the trip
level.
When the component temperature reaches the set alarm level AlarmTemp the output signal ALARM
is set. When the component temperature reaches the set trip level TripTemp the output signal TRIP is
set.
There is also a calculation of the present time to operate with the present current. This calculation is
only performed if the final temperature is calculated to be above the operation temperature:
æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
EQUATION1169 V1 EN-US (Equation 36)
After a trip, caused by the thermal overload protection, there can be a lockout to reconnect the
tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is
above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated by the following cooling time calculation. The thermal
content of the function can be reset with input RESET.
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
EQUATION1170 V1 EN-US (Equation 37)
In the above equation, the final temperature is equal to the set or measured ambient temperature.
The calculated time to reset of lockout is available as a real figure signal, TENRECL. This signal is
enabled when the LOCKOUT output is activated.
In some applications the measured current can involve a number of parallel lines. This is often used
where one bay connects several parallel cables. By setting the parameter IMult to the number of
parallel lines (cables) the actual current on one line is used in the protection algorithm by dividing the
measured current by the total number of cables. To activate this option the input ENMULT must be
activated.
The protection has a reset input: RESET. By activating this input the calculated temperature is reset
to its default initial value. This is useful during testing when secondary injected current has given a
calculated “false” temperature level.
START
Final Temp > Trip Temp
TEMP
Calculation of actual
temperature
AMBTEMP ALARM
Actual Temp > Alarm Temp
I3P
Calculation of final
temperature
ENMULT
TRIP
LOCKOUT
Lockout logic
TTRIP
Calculation of time to trip
BLKTR
TENRECL
Calculation of time to reset
of lockout
IEC09000637-2-en.vsd
IEC09000637 V2 EN-US
7.8.1 Identification
M14877-1 v2
SYMBOL-A V1 EN-US
If a power transformer reaches very high temperatures the equipment might be damaged. The
insulation within the transformer will experience forced ageing. As a consequence of this the risk of
internal phase-to-phase or phase-to-earth faults will increase.
The thermal overload protection (TRPTTR) estimates the internal heat content of the transformer
(temperature) continuously. This estimation is made by using a thermal model of the transformer with
two time constants, which is based on current measurement.
Two warning levels are available. This enables actions in the power system to be done before
dangerous temperatures are reached. If the temperature continues to increase to the trip value, the
protection initiates a trip of the protected transformer.
TRPTTR
I3P* TRIP
BLOCK START
COOLING ALARM1
ENMULT ALARM2
RESET LOCKOUT
WARNING
IEC06000272_2_en.vsd
IEC06000272 V2 EN-US
7.8.4 Signals
PID-4148-INPUTSIGNALS v4
PID-4148-OUTPUTSIGNALS v4
7.8.5 Settings
PID-6862-SETTINGS v1
The sampled analog phase currents are pre-processed and for each phase current the true RMS
value of each phase current is derived. These phase current values are fed to the protection function.
From the largest of the three phase currents a relative final temperature (heat content) is calculated
according to the expression:
2
æ I ö
Q final =ç ÷÷
ç I ref
è ø
EQUATION1171 V1 EN-US (Equation 39)
where:
I is the largest phase current
Iref is a given reference current
If this calculated relative temperature is larger than the relative temperature level corresponding to
the set operate (trip) current, then the start output signal START will be activated.
If Q final > Q n
EQUATION1172 V1 EN-US (Equation 40)
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø
EQUATION1173 V1 EN-US (Equation 41)
If Q final < Qn
EQUATION1174 V1 EN-US (Equation 42)
Dt
Qn = Q final - ( Q final - Qn -1 ) × e
-
t
where:
Qn is the calculated present temperature
Q n-1 is the calculated temperature at the previous time step
Table continues on next page
Q final is the calculated final (steady state) temperature with the actual current
Dt is the time step between calculation of the actual and final temperature
t is the thermal time constant of the protected circuit given in minutes. There are different time
constants depending on the cooling used. Please refer to manufacturer's manuals for details
The calculated transformer relative temperature can be monitored and it is exported from the function
as a real figure HEATCONT.
When the transformer temperature reaches any of the set alarm levels Alarm1 or Alarm2 the
corresponding output signal ALARM1 or ALARM2 is activated. When the temperature of the object
reaches the set trip level which corresponds to continuous current equal to ITrip the output signal
TRIP is activated.
There is also a calculation of the time to operation with the present current. This calculation is only
performed if the final temperature is calculated to be above the operation temperature:
æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
EQUATION1176 V1 EN-US (Equation 44)
The calculated time to trip can be monitored and it is exported from the function as an integer output
TTRIP.
After a trip there can be a lockout to inhibit reconnecting the tripped circuit. The output lockout signal
LOCKOUT is activated when the temperature of the object is above the set lockout release
temperature setting ResLo.
The time to lockout release is calculated by the following cooling time calculation.
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
EQUATION1177 V1 EN-US (Equation 45)
In the above equation, the final temperature is calculated according to equation 39. The calculated
component temperature can be monitored as it is exported from the function as a real figure,
TRESLO.
When the current is so high that it has given a start signal START, the estimated time to trip is
continuously calculated and given as analogue output TTRIP. If this calculated time get less than the
setting time Warning, set in minutes, the output WARNING is activated.
RESET HEATCONT
Calculation
of heat
content
I3P
Calculation
ENMULT of final
temperature
ALARM1
Actual Temp >
Alarm1,Alarm2
ALARM2
Temp
S LOCKOUT
Management of R
COOLING setting
parameters: Tau,
Actual Temp
IBase Tau used
< Recl
Temp
TTRIP
Calculation
of time to
WARNING
trip
Calculation
of time to TRESCAL
reset of
lockout
IEC05000833-2-en.vsd
IEC05000833 V2 EN-US
M13266-2 v10
7.9.2 Identification
M14878-1 v5
SYMBOL-U V1 EN-US
Breaker failure protection (CCRBRF) ensures a fast backup tripping of the surrounding breakers in
case the own breaker fails to open. CCRBRF measurement criterion can be current based, CB
position based or an adaptive combination of these two conditions.
A current based check with extremely short reset time is used as check criterion to achieve high
security against inadvertent operation.
CB position check criteria can be used where the fault current through the breaker is small.
CCRBRF provides three different options to select how t1 and t2 timers are run:
CCRBRF can be single- or three- phase initiated to allow its use with single phase tripping
applications. For the three-phase application of the CCRBRF the current criteria can be set to
operate only if “2 elements operates out of three phases and neutral” for example; two phases or one
phase plus the residual current start. This gives a higher security to the backup trip command.
The CCRBRF function can be programmed to give a single- or three- phase retrip to its own breaker
to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes during
testing.
CCRBRF
I3P* TRBU
BLOCK TRBU2
START TRRET
STL1 TRRETL1
STL2 TRRETL2
STL3 TRRETL3
CBCLDL1 CBALARM
CBCLDL2 STALARM
CBCLDL3
CBFLT
IEC18001006-1-en.vsd
IEC18001006 V1 EN-US
7.9.5 Signals
PID-7233-INPUTSIGNALS v1
PID-7233-OUTPUTSIGNALS v1
7.9.6 Settings
PID-7233-SETTINGS v1
Breaker failure protection CCRBRF is initiated from the protection trip command, either from
protection functions within the IED or from external protection devices.
To this function the three-phase current input and/or change to: the breaker normally open auxiliary
contact (i.e. "52a" or "closed") shall be connected. On OHL feeders where single pole auto-reclosing
is used, auxiliary contact from each CB pole shall be connected separately
The input START signal (i.e. initiate signal) can be phase selective or common (for all three phases).
Phase selective start signals enable single pole retrip functionality. This means that a second attempt
to open the same breaker can be done phase-selective. The retrip attempt is made after a set time
delay t1. For transmission lines, single pole trip and auto-reclosing is often used. The retrip function
can be phase selective if it is initiated from the phase selective line protection.
The retrip function can be done with or without current FunctionMode check. With this check, the
retrip is only performed if the circuit breaker is still seen as closed when t1 timer has elapsed.
The START signal will also start the backup trip timer. The function detects the successful breaker
opening, either by detection of low current through RMS evaluation and a special adapted current
algorithm or by monitoring the circuit breaker status using normally open auxiliary contact from the
breaker. The special algorithm enables a very fast detection of successful breaker opening, which is,
fast resetting of the current measurement. If the function has not detected breaker opening before
the backup timer has run-out its time a backup trip is initiated.
• Three phase (i.e. common) start/initiation via input START or individual start/initiation per phase
by using phase segregated inputs STLx.
• The minimum length of the retrip pulse, the backup trip pulse and the second backup trip pulse
are settable. This pulse duration is defined by a parameter setting tPulse. The retrip pulse, the
backup trip pulse and the second backup trip pulse will however sustain as long as there is an
indication of closed breaker.
• If the current detection is used it is possible to use three different options: 1 out of 3 where it is
sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient to
detect failure to open (high current) in one pole or high residual current and 2 out of 4 where at
least two currents (phase current and/or residual current) shall be high for breaker failure
detection.
• The current detection level for the residual current can be set different from the setting of phase
current detection.
• It is possible to have different backup time delays for single-phase faults and for multi-phase
faults.
• It is possible to have instantaneous backup trip function if the circuit breaker is incapable to clear
faults, for example, at low gas pressure. This will happen when input signal CBFLT has logical
value one and timer tCBAlarm has expired. This situation will be indicated via output signal
CBALARM.
The selection of measurement criterion is done with setting parameter FunctionMode, to determine if
the breaker has opened or not:
• Option 1 - Current: Compares the measured phase current magnitude to setting IPh> (operate
phase current level in % of IBase), and the measured residual current magnitude to setting IN>
(Operate residual current level in % of IBase). Criterion is active (i.e. breaker did not open yet) if
the measured current magnitudes are higher than the set values.
• Option 2 - CB Pos: This criterion is active (i.e. breaker did not open yet in phase Lx) if the binary
input CBCLDLx has logical value one. Thus function simply follows the status of CB pole
normally open auxiliary contact (i.e. "52a" or "closed") which shall be connected to this input.
If TRBU has been given and CBCLDLx still has value one, TRBU and TRRET will internally be
reset intentionally after approximately 10 seconds. Another way of resetting TRBU and TRRET
is either to shortly activate BLOCK input or setting CCRBRF to blocked when the IED is in
TestMode.
• Option 3 - Current or CB Pos: It uses a combination of Current or CB Pos criteria. Note that
Current criterion will be then always used, while the CB Pos criterion will be only enabled and
used if current is smaller than set value I>BlkCBPos at the moment when external START signal
has been received. It is recommended to set value for I>BlkCBPos higher than the set value for
IPh>.
If TRBU has been given and CBCLDLx still has value one and if the CB Pos criterion is
used,TRBU and TRRET will internally be reset intentionally after approximately 10 seconds.
Another way of resetting TRBU and TRRET is either to shortly activate BLOCK input or setting
CCRBRF to blocked when the IED is in TestMode.
By the setting StartMode it is possible to select how t1 and t2 timers are run and consequently how
output commands are given from the function:
the appropriate command shall be given out from the function. Timers can be always stopped by
resetting the external START signal, see Figure 131.
When one of the two “follow modes” is used, there is a settable timer tStartTimeout which will block
the external START input signal when it times-out. This will automatically also reset the t1 and t2
timers and consequently prevent any backup trip command. At the same time the STALARM output
from the function will have logical value one. To reset this signal external START signal shall be
removed. This is done in order to prevent unwanted operation of the breaker failure function for
cases where a permanent START signal is given by mistake (e.g. due to a fault in the station battery
system). Note that any backup trip command will inhibit running of tStartTimeout timer.
The BLOCK signal overrides any StartMode condition and resets START signal, running of t1 and t2
timers and all function outputs.
30ms t1 30ms
START OR TRRET
S Q t AND
t2 30ms
OR TRBU
t AND
Current Check
CB Position Check OR
150ms
AND
t
NOT
IEC18001002-1-en.vsdx
IEC18001002 V1 EN-US
t1
START OR TRRET
t AND
Current Check
CB Position Check OR
t2
TRBU
t AND
OR
IEC18001003-1-en.vsdx
IEC18001003 V1 EN-US
START t1 TRRET
AND t
Current Check
CB Position Check OR t2 TRBU
t
IEC18001004-1-en.vsdx
IEC18001004 V1 EN-US
Note that it is possible to set several timers for the backup trip as described below:
1. Timer t2 is used when function is started in one phase only (i.e. for single-phase to ground fault
on an OHL (Over Head Lines) when single-pole auto-reclosing is used).
2. Timer t2MPh is used when function is started in at least two phases. This will allow to have
shorter backup trip times for a multi-phase fault on an OHL Note that for a protected object
which are always tripped three-phase (e.g. transformers, generators, reactors, cables, etc.) this
timer shall always be set to the same value as t2 timer.
3. Timer t3 can be used to give a second backup trip command. It can be used in stations having
small DC battery which is not capable to trip all surrounding breakers at once. Note that t3 timer
will only start when t2 timer expires.
• Off: The retrip command to the own circuit breaker is permanently disabled.
• UseFunctionMode: Retrip command to the own circuit breaker is given only if measurement
criterion defined by setting parameter FunctionMode is still active when set timer t1 expires (e.g.
if FunctionMode=Current and current magnitude is higher than set value IPh> when t1 expires,
the retrip command will be issued).
• Always: Retrip command to the own circuit breaker is given always when set timer t1 expires
without any further checks.
The simplified logic for the function is given in the following figures.
StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR
START 30ms
int startL1
STL1 OR AND S Q
BLOCK
NOT
int reset
OR R
NOT
TRBU
NOT int startAlarmL1
tStartTimeout
AND t NOT
AND AND int startAlarmL2 STALARM
From other OR
phases int startAlarmL3
IEC18001005-1-en.vsdx
IEC18001005 V1 EN-US
Figure 133: Start logic for all three Function Modes of operation
IL1
a
a>b NOT
IPh> b
FunctionMode
Current
CB Pos OR AND int reset
OR
1
Current or CB Pos 150 ms
int startL1
t
OR AND
t1
t
t2
t OR
t2MPh
t
AND
CBCLDL1
NOT
IEC18001007-1-en.vsdx
IEC18001007 V1 EN-US
StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR AND
int retrip
currPh1Check
CB Position Check OR
AND t1 30ms
OR AND
int startL1 t OR
t1
t
BLOCK
RetripMode
Off tPulse
TRRETL1
UseFunctionMode AND OR AND
1
Always
TRRETL2 TRRET
TRRETL3
OR
tPulse
From other
AND phases
IEC18001008-2-en.vsdx
IEC18001008 V2 EN-US
StartMode
LatchedStart
1 FollowStart
FollowStart&Mode OR AND
currCheck
CB Position Check OR
backupTripL1
t2
AND t 30ms
OR AND
OR OR
int startL1
BLOCK
t3
t TRBU2
OR
AND
tPulse
IEC18001009 V2 EN-US
When the function Start mode is set to LatchedStart and the function mode is set CB Pos, Re-trip,
and Backup trip will internally operate and latch. To reset these two signals the breaker position has
to indicate that the CB is open.
To avoid continuous lockout of Re-trip and Back up trip signals, the signals are rested internally
under the following conditions:
1. When the function blocking input is activated breaker position input (CBCLDLxx) will internally
be forced to zero in all phases (that is simulating that CB is open), which will reset Re-
trip(TRRET) and back up trip (TRBU) output signals.
2. If TRBU is active for 10 seconds, then the activated breaker position input (CBCLDLxx) will
internally be forced to zero which will reset both RETRIP and TRBU.
3. When using FunctionMode=Current/CB pos, the same behavior is applicable only when the CB
pos part is active; that is, when the measured current is below the set value I>BlkCBPos.
M12353-1 v16
7.10.2 Identification
M17108-1 v2
3I>STUB
SYMBOL-T V1 EN-US
When a power line is taken out of service for maintenance and the line disconnector is opened in
multi-breaker arrangements the voltage transformers will mostly be outside on the disconnected part.
The primary line distance protection will thus not be able to operate and must be blocked.
The stub protection (STBPTOC) covers the zone between the current transformers and the open
disconnector. The three-phase instantaneous overcurrent function is released from a normally
closed, NC (b) auxiliary contact on the line disconnector.
STBPTOC
I3P* TRIP
BLOCK START
BLKTR
RELEASE
IEC05000678-2-en.vsd
IEC05000678 V2 EN-US
7.10.5 Signals
PID-7754-INPUTSIGNALS v1
PID-7754-OUTPUTSIGNALS v1
7.10.6 Settings
PID-7754-SETTINGS v1
The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From
the fundamental frequency components of each phase current the RMS value of each phase current
is derived. These phase current values are fed to a comparator in the stub protection function
STBPTOC. In a comparator the RMS values are compared to the set operating current value of the
function I>.
If a phase current is larger than the set operating current the signal from the comparator for this
phase is activated. This signal will, in combination with the release signal from either line
disconnector (RELEASE input) and ReleaseMode is set to Release or ReleaseMode is set to
Continuous activates START signal and timer tDelay. The output signal TRIP activates, if the fault
current remains during the set timer tDelay.
The function can be blocked by activation of the BLOCK input. Also, activation of BLKTR resets TRIP
output.
BLOCK
I3P* IL1
a
IL2 a>b
IL3 b
AND
START
1
a
a>b tDelay
b TRIP
AND t AND
a
a>b
I> b
AND
RELEASE
AND
ReleaseMode = Release 1
ReleaseMode = Continuous
BLKTR
IEC05000731 V2 EN-US
From the measured three-phase currents, various types of measurement modes such as DFT, Peak,
and Peak-to-peak can be selected for the BRPTOC operation.
Peak and Peak-to-Peak measurement mode allow this function to be used as instantaneous over-
current protection as well. If required by application, short time delay can also be applied.
BRPTOC can be used for different line and transformer protection applications. If required, it can also
be used to supervise on-load tap-changer operation.
BRPTOC
I3P* TRIP
BLOCK START
BLKTR STL1
RELEASE STL2
STL3
IEC21000231 V2 EN-US
7.11.5 Signals
PID-7755-INPUTSIGNALS v2
PID-7755-OUTPUTSIGNALS v2
7.11.6 Settings
PID-7755-SETTINGS v2
Using a parameter setting MeasType within the general settings for the function BRPTOC, it is
possible to select the type of the measurements such as DFT, Peak, and Peak-to-peak used for
overcurrent operation.
If the DFT option is selected, only the RMS value of the fundamental frequency component of each
phase current is derived. The influence of the DC current component and higher harmonic current
components are completely suppressed.
The peak-to-peak measurement efficiently suppress the DC current component from the measured
phase currents. On the contrary, when Peak measurement mode is selected, it allows the DC current
component into the measurement signal for the BRPTOC function.
If the Peak/Peak-to-peak option is selected, RMS equivalent phase currents are derived and
therefore, the set value of I> is remained intact irrespective of any type of the measurement mode.
These phase current values are fed to a comparator in the overcurrent protection with binary release
function BRPTOC. In a comparator, the RMS values are compared to the set operating current value
of the function I>.
If a phase current is larger than the set operating current, comparator output signal for this phase will
be high. This signal will, in combination with the release signal (RELEASE input), activate the timer
for the TRIP signal. If the current magnitude remains high during the timer tdelay, the TRIP output
signal is activated. The function can be blocked by activation of the BLOCK input.
I3P* IL1
a
IL2 a>b
IL3 b STL1
AND
a
a>b
b STL2
AND
a
a>b
I> b STL3
AND
RELEASE START
1
BLOCK
tDelay
TRIP
t AND
BLKTR
GUID-CAC3BE85-59F2-4264-A060-CA53DF9CA3E8 V1 EN-US
Figure 139: Simplified logic diagram for overcurrent protection with binary release
7.12.1 Identification
M14888-1 v4
PD
SYMBOL-S V1 EN-US
An open phase can cause negative and zero sequence currents which cause thermal stress on
rotating machines and can cause unwanted operation of zero sequence or negative sequence
current functions.
Normally the own breaker is tripped to correct such a situation. If the situation persists the
surrounding breakers should be tripped to clear the unsymmetrical load situation.
The Pole discordance protection function (CCPDSC) operates based on information from auxiliary
contacts of the circuit breaker for the three phases with additional criteria from unsymmetrical phase
currents when required.
CCPDSC
I3P* TRIP
BLOCK START
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
IEC13000305-1-en.vsd
IEC13000305 V1 EN-US
7.12.4 Signals
PID-3525-INPUTSIGNALS v8
PID-3525-OUTPUTSIGNALS v8
7.12.5 Settings
PID-3525-SETTINGS v8
circuit breaker
en05000287.vsd
IEC05000287 V2 EN-US
There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and
phase contact closed) to binary inputs of the IED, see figure 142.
C.B.
+
poleOneOpened from C.B.
en05000288.vsd
IEC05000288 V1 EN-US
Pole discordance can also be detected by means of phase selective current measurement. The
sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the
fundamental frequency components of each phase current the RMS value of each phase current is
derived. The smallest and the largest phase current are derived. If the smallest phase current is
lower than the setting CurrUnsymLevel times the largest phase current the settable trip timer (tTrip) is
started. The tTrip timer gives a trip signal after the set delay. The TRIP signal is a pulse 150 ms long.
The current based pole discordance function can be set to be active either continuously or only
directly in connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing function, so that
the pole discordance function can be blocked during sequences with a single pole open if single pole
autoreclosing is used.
M13946-3 v7
The simplified block diagram of the current and contact based Pole discordance protection function
CCPDSC is shown in figure 143.
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR
PD Signal from CB
AND
EXTPDIND
CLOSECMD t+200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en05000747.vsd
IEC05000747 V1 EN-US
Figure 143: Simplified block diagram of pole discordance function CCPDSC - contact and
current based
CCPDSC is blocked if:
• The IED is in TEST mode and CCPDSC has been blocked from the local HMI
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance protection. It can be
connected to a binary input in the IED in order to receive a block command from external devices or
can be software connected to other internal functions in the IED itself in order to receive a block
command from internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclosing
cycle is in progress. It can be connected to the output signal 1PT1 on SMBRRECfunction block. If the
autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary input
in the IED and this binary input is connected to a signalization “1phase autoreclosing in progress”
from the external autoreclosing device.
If the pole discordance protection is enabled, then two different criteria can generate a trip signal
TRIP:
If one or two poles of the circuit breaker have failed to open or to close the pole discordance status,
then the function input EXTPDIND is activated from the pole discordance signal derived from the
circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel, and in series
with one NC contact for each phase connected in parallel) and, after a settable time interval tTrip
(0-60 s), a 150 ms trip pulse command TRIP is generated by the Polediscordance function.
• any phase current is lower than CurrUnsymLevel of the highest current in the three phases.
• the highest phase current is greater than CurrRelLevel of IBase.
If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is
turned high. This detection is enabled to generate a trip after a set time delay tTrip if the detection
occurs in the next 200 ms after the circuit breaker has received a command to open trip or close and
if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation during
unsymmetrical load conditions.
The pole discordance protection is informed that a trip or close command has been given to the
circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD
(for opening command information). These inputs can be connected to terminal binary inputs if the
information are generated from the field (that is from auxiliary contacts of the close and open push
buttons) or may be software connected to the outputs of other integrated functions (that is close
command from a control function or a general trip from integrated protections).
7.13.2 Identification
SEMOD172362-2 v2
Conventional protection functions cannot detect the broken conductor condition. Broken conductor
check BRCPTOC function, consisting of continuous phase selective current unsymmetrical check on
the line where the IED is connected, gives an alarm or trip at detecting broken conductors.
BRCPTOC
I3P* TRIP
BLOCK START
BLKTR
IEC07000034 V3 EN-US
7.13.5 Signals
PID-8008-INPUTSIGNALS v1
PID-8008-OUTPUTSIGNALS v1
7.13.6 Settings
PID-8008-SETTINGS v1
Broken conductor check (BRCPTOC) detects a broken conductor condition by detecting the
asymmetry between currents in the three phases. The current-measuring elements continuously
measure the three-phase currents.
The current asymmetry signal output START is set on after 50.0 ms if:
• The difference in currents between the phase with the lowest current and the phase with the
highest current is greater than set percentage Iub> of the highest phase current
• The highest phase current is greater than the minimum setting value IP>.
• The lowest phase current is below 50% of the minimum setting value IP>
The third condition is included to avoid problems in systems involving parallel lines. If a conductor
breaks in one phase on one line, the parallel line will experience an increase in current in the same
phase. This might result in the first two conditions being satisfied. If the unsymmetrical detection lasts
for a period longer than the set time tOper, the TRIP output is activated.
The simplified logic diagram of the broken conductor check function is shown in Figure
• The IED is in TEST status and the function has been blocked from the local HMI test menu
(BlockBRC=Yes).
• The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the IED in order to receive a block command
from external devices, or can be software connected to other internal functions of the IED itself to
receive a block command from internal functions.
The output trip signal TRIP is a three-phase trip. It can be used to command a trip to the circuit
breaker or for alarm purpose only.
TEST
TEST-ACTIVE
AND
Block BRCPTOC=Yes
50 ms
START
t
Function Enable
BLOCK OR
tOper TRIP
AND
AND t
Unsymmetrical
Current Detection
STI
IL1<50%IP>
IL2<50%IP> OR
IL3<50%IP>
IEC09000158-4-en.vsd
IEC09000158 V4 EN-US
Figure 145: Simplified logic diagram for Broken conductor check BRCPTOC
SEMOD175200-2 v10
Voltage-restrained time overcurrent protection (VRPVOC) function can be used as generator backup
protection against short-circuits.
The overcurrent protection feature has a settable current level that can be used either with definite
time or inverse time characteristic. Additionally, it can be voltage controlled/restrained.
One undervoltage step with definite time characteristic is also available within the function in order to
provide functionality for overcurrent protection with undervoltage seal-in.
VRPVOC
I3P* TRIP
U3P* TROC
BLOCK TRUV
BLKOC START
BLKUV STOC
STUV
IEC12000184-1-en.vsd
IEC12000184 V1 EN-US
7.14.5 Signals
PID-8153-INPUTSIGNALS v1
PID-8153-OUTPUTSIGNALS v1
7.14.6 Settings
PID-8153-SETTINGS v1
The voltage-restrained time overcurrent protection VRPVOC function is always connected to three-
phase current and three-phase voltage input in the configuration tool (ACT), but it will always
measure the maximum of the three-phase currents and the minimum of the three phase-to-phase
voltages. If frequency tracking mode for preprocessing blocks is used, then the function operates
properly in wide frequency range (e.g. 10-90 Hz).
GlobalBaseSel defines the particular Global Base Values Group where the base quantities of the
function are set. In that Global Base Values Group:
IBase shall be entered as rated phase current of the protected object in primary amperes.
UBase shall be entered as rated phase-to-phase voltage of the protected object in primary kV.
The overcurrent step simply compares the magnitude of the measured current quantity with the set
start level. The overcurrent step starts if the magnitude of the measured current quantity is higher
than the set level.
• Voltage restrained overcurrent (when setting parameter VDepMode = Slope); the start level of
the overcurrent stage changes according to the Figure 147. The voltage restrained characteristic
is defined by the two points: (0.25*UBase ; VDepFact *StartCurr/100*IBase) and (UHighLimit/
100*UBase; StartCurr/100*IBase). In the first point the factor 0.25 that multiply UBase cannot be
changed.
StartCurr
VDepFact * StartCurr
0.25 UHighLimit
UBase
IEC10000123 V3 EN-US
Figure 147: Example for start level of the current variation as function of measured voltage
magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter VDepMode = Step); the start level of the
overcurrent stage changes according to the Figure 148.
StartCurr
VDepFact * StartCurr
UHighLimit UBase
IEC10000124-2-en.vsd
IEC10000124 V2 EN-US
Figure 148: Example for start level of the current variation as function of measured voltage
magnitude in Step mode of operation
DEF time
selected
TROC
OR
MaxPhCurr
a STOC
a>b
b
StartCurr
X Inverse
Inverse
Voltage time
control or selected
restraint
feature
MinPh-PhVoltage
IEC10000214-1-en.vsd
IEC10000214 V1 EN-US
DEF time
selected TRUV
MinPh-phVoltage a
b>a
b STUV
AND
StartVolt
Operation_UV=On
BLKUV
IEC10000213-1-en.vsd
IEC10000213 V1 EN-US
The undervoltage step simply compares the magnitude of the measured voltage quantity with the set
start level. The undervoltage step starts if the magnitude of the measured voltage quantity is lower
than the set level.
The start signal starts a definite time delay. If the value of the start signal is logical TRUE for longer
than the set time delay, the undervoltage step sets its trip signal to logical TRUE.
This undervoltage functionality together with additional ACT logic can be used to provide functionality
for overcurrent protection with undervoltage seal-in.
Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device
number
Average Power Transient APPTEF Io > → TEF 67NT
Earth Fault Protection
High impedance grounded power systems are characterized by a relatively high impedance which is
connected between the power system neutral point and ground. The most extreme example is an
isolated power system where this impedance is practically infinite. However, it is important to
understand that the natural distributed capacitances between the individual phase conductors and
ground are always present in any power network irrespective of the neutral point grounding. These
distributed capacitances are important to understand the power system behavior, during an Earth
Fault (EF) in a high impedance grounded power system.
The APPTEF (Average Power Transient Earth Fault Protection) function is a transient measuring
directional earth-fault protection. Determination of the earth fault direction is based on the short-term
built-up transient at the beginning of the earth fault. This transient is to a large extent independent of
the neutral point treatment. This means that the function can be used without any modification in all
types of high-impedance grounded, resonant grounded or isolated power systems.
For a resonant grounded system, the correct directional measurement is ensured regardless of how
many Petersen coils are used throughout the interconnected power network. The function is not
sensitive to the actual compensation degree of the coils. It will operate equally well in an under- or
over-compensated system. Parallel neutral resistor to the Petersen coil are not needed to correctly
determine earth fault direction. However, these neutral resistors can still be used if already installed
in the network.
APPTEF
I3P* TRIP
U3P* STFW
BLOCK STRV
BLKTR STUN
BLKHARM STIEF
RESET WRNFW
ALMCC
ALMCIRI
STDIR
IFUNDRE
IFUNDIM
IHARMIM
GUID-62978D0E-DC7C-43E3-85FB-85A75D7672AD V2 EN-US
7.15.5 Signals
GUID-1DF01EED-2316-4540-AD51-1F44BE750C81 v1
GUID-A9902F06-1C00-4A10-B7A2-6D2A1F19D216 v1
7.15.6 Settings
PID-8086-SETTINGS v1
The basic operating condition for the transient earth fault (EF) protection in a high impedance
grounded system is explained for a substation having a single incoming transformer which will be
feeding a LV side busbar having three outgoing feeders. The associated directional EF protection for
every feeder are also shown in Figure 152 as well as a grounding impedance connected to the
transformer LV winding star point.
HV Busbar
HV
CB
Power Δ
Transformer
Y Ground
Grounding
Impedance
Transformer
LV Bay
CB
Feeder 1 Feeder 2 Feeder 3
LV Busbar
VT
F1 F2 F3
CB CB CB
IEC19000933-1-en.vsdx
IEC19000933 V1 EN-US
Transformer
Feeder 1 Bay Feeder 2 Feeder 3
LV Busbar
VT
Uo
F1 LV F2 F3
CB CB CB CB
Io_F1
Io_F2
Io_F3
Io_Tr
Transformer HV
Y Δ CB
Rf Grounding
Impedance
Ground
IEC19000934-1-en.vsdx
IEC19000934 V1 EN-US
1. The EF location is in Feeder 1. Consequently, its distributed capacitance is split into two parts,
one in-between the LV busbar and the fault point (that is C_F1’) and the second one behind the
fault point (that is C_F1”).
2. All feeders are just represented with a capacitance to ground. All series parameters of any
feeder are ignored because their impedance is much lower than this capacitive impedance and
consequently these series parameters can be ignored.
3. A resistance to ground (R_F3) is shown with dashed lines for Feeder 3, in practice these
resistances are extremely large and typically can be ignored. Consequently, these are not
shown for other feeders.
4. An inductance to ground ( L_F3) is also shown with dashed lines for Feeder 3, that in practice
may represent distributed coils along that feeder or remote coils located in the other substation
at the end of Feeder 3. In systems with multiple coils the above-mentioned resistance to ground
(R_F3) may also include the coil losses.
5. The grounding impedance at the transformer LV winding neutral point is represented as a
parallel connection of an inductor ( L) and a resistor ( R). This is the most practical
representation because it can then represent the most commonly used grounding principles (for
isolated system L= R=∞).
6. The location of all CTs and VTs are also given because these are used to determine the
measurement points for Io and respectively Uo signals in each feeder.
7. Note that Io and Uo are correct values for this equivalent circuit. In a real installation the IED will
actually measure 3Io and 3Uo, but the difference between them is just a fixed factor of 3. In
further writing only Io and Uo notation will be used, but whatever is written is applicable to 3Io
and 3Uo as well.
8. The reference direction for current measurement (towards the protected feeder) is also given
with associated directional EF protection ( 67NT-F1 for Feeder 1) in each outgoing feeder bay.
9. As per the superposition theorem, a single source in the zero-sequence system is located at the
fault point. Its magnitude is equal to the phase-to-ground voltage in the faulty phase just before
the fault, but its phase angle shall be turned-around for 180 degrees. If it is assumed that the
fault resistance (that is Rf) has approximately a value of zero ( a bolted fault), then the Uo
voltage will be equal to this source voltage. The Uo voltage will be approximately the same for
all IEDs throughout the system. That means that the differences in the measured Io currents in
the individual feeders are important to determine the faulty versus the healthy feeder.
When EF happens (that is when the switch at the fault point closes in Figure 153) the source located
at the fault point energizes all the distributed capacitances of all the feeders connected to the LV
busbar.
Note that these capacitors are not energized (that is the capacitors are empty or without any stored
energy) just before the earth fault.
Consequently, these are first charged to an energy level corresponding to the Uo voltage level (using
the formula 0.5*Uo2*C) before starting to exchange reactive power with either the source located at
the fault point or with the coil(s) which are possibly located at transformer neutral point(s). This active
power surge is quite short, but if it can be measured or detected by the IED, then it can be used to
detect the faulty feeder. Figure 154 displays the path for this active but transient power from the
source to the distributed capacitors.
Transformer
Feeder 1 Bay Feeder 2 Feeder 3
LV Busbar
VT
Uo
F1 LV F2 F3
CB CB CB CB
Io_F1
Io_F2
Io_F3
Io_Tr
67NT‐F1 67NT‐F2 67NT‐F3
Faulty Feeder
HV Busbar
Transformer HV
Y Δ CB
Rf Grounding
Impedance
Ground
IEC19000935-1-en.vsdx
IEC19000935 V1 EN-US
Figure 154: Flow of active power in the zero-sequence system at the moment when EF
happens
Note that the existence of any shunt resistance in the system (R or R_F3 in Figure 154) will increase
the active transient power flow and consequently make it easier for the active power measurement
principle to determine the EF position. The same is true if the fault resistance Rf is present in the
circuit. At the same time, the existence of any inductor in the circuit (L or L_F3) will not influence the
active power flow in any way.
The EF position can be determined because the flow of the active transient power will be in the
opposite direction through the CTs in the faulty feeder and the healthy feeders. In simple words this
active power will be negative in the faulty feeder and positive in a healthy feeder. Note that the
transient EF IED installed in a healthy feeder will measure the transient charging power of the own
distributed capacitance, while the IED installed in the faulty feeder will measure the active transient
charging power of all healthy feeders lumped together. Consequently, this transient charging power
signal magnitude will be the largest for the faulty feeder and the smallest for the shortest healthy
feeder.
It is quite a common protection practice to use -Uo voltage (that is Uo voltage phasor which is turned
around/rotated for 180 degrees) for all EF protection functions. This will only invert all power
directions previously explained. For example, in an actual IED implementation the measured power
will be essentially positive in the faulty feeder and negative in a healthy feeder. This can be simply
understood as a sign convention which is commonly used in protective relaying practice.
In a power system the active power can be only supplied by the fundamental frequency signals,
which means that this active power must be generated by one or more generation plant connected to
the networks. Consequently, only the fundamental frequency content of the Io and Uo signals shall
be used to measure this active transient power in every bay. To calculate active power based on
fundamental frequency phasors the formula given below is used. Note that Uo is taken with the
minus sign as explained previously.
P U 01 * I 01 *cos( 1)
The index one in this equation indicates that only the fundamental frequency component signals are
used for the active power calculation. As mentioned previously -Uo is a constant for all EF IEDs in
the galvanically interconnected system, and consequently only the active fundamental frequency
current component Io*cos(ɸ) can be used to determine the direction of the EF.
Figure 155 displays the method to derive the Io*cos(ɸ) component. Practically it is a part of Io
phasors which is in phase with -Uo phasor. This calculation is done at every execution of the
algorithm.
For fundamental frequency current phasor, only the Io*cos(ɸ) component has a useful physical
meaning. The Io*sin(ɸ) component is just a disturbing part of the input signal which can only cause
confusion and possible wrong operation of the transient EF IED if it is used. This is because when
multiple compensation coils are installed in the network, the flow of the reactive power in the zero-
sequence system is quite unpredictable.
‐Uo
Io
IEC19000936-1-en.vsdx
IEC19000936 V1 EN-US
Figure 155: Deriving Io*cos(ɸ) and Io*sin(ɸ) quantities from -Uo and Io phasors
Because the instantaneous Io*cos(ɸ) values will vary quite a lot during the transient an averaged
(that is integrated) value is used. This averaged power value will correspond to the actual energy
stored in the distributed capacitances. In the feeder where EF is located this averaged value will be
always positive, while in all healthy feeders this averaged value will be always negative. Thus, by
setting two simple current threshold levels (one positive and the second one negative) the direction
of the EF can be determined. The averaged Io*cos(ɸ) value is also given as a service value from the
APPTEF function in order to make easier testing and understanding of the function operation
principles (that is see signal IFUNDRE in Figure 160). This value can be recorded by the built in DR
and even be used to fine-tune the settings for the respective pickup levels.
An example how these signals may look like for an EF on a faulty feeder and on a healthy feeder are
given in Figure 156 and Figure 157 respectively.
IEC19000937 V1 EN-US
Figure 156: Example how waveforms and the active power signals may look like for a faulty
feeder
IEC19000938=IEC19000938=1=en-us=Original.vsdx
IEC19000938=IEC19000938=1=en-us=Original.vsdx
IEC19000938-1-en.vsdx
IEC19000938 V1 EN-US
Figure 157: Example how waveforms and the active power signals may look like for a healthy
feeder
Note that the presence of a grounding resistor is clearly visible in Figure 156b because the averaged
value of the Io*cos(ɸ) component do not drop to zero after the transient for a faulty feeder, but it
drops to zero for a healthy feeder as shown in Figure 157b.
The advantages of the averaged Io*cos(ɸ) method to detect the EF direction in high-impedance
grounded system are:
1. Simplicity, because only the active part of the fundamental frequency component of the Io
current phasor is used.
2. Use of the widely recognized protection principle Io*cos(ɸ).
3. Independence from the compensation degree, number of coils used and their physical location
in the protected network (Petersen coils do not consume active power).
4. Averaging (numerical integration) is performed continuously. No need to start/stop this
calculation process.
5. The Io*cos(ɸ) quantity will be approximately equal to zero during all operating conditions of the
protected network except during the transient charging process of the capacitors. Consequently,
it is relatively simple to determine when this quantity appears. As additional security measure it
can also be verified that this coincides with the jump of Uo voltage magnitude.
6. A low sampling rate is sufficient because only the fundamental frequency phasors of Uo and Io
are calculated from the input signal. A sampling rate of 20 samples per fundamental power
system cycle is enough for proper operation of the transient EF IED.
7. Raw samples of residual voltage and current are not at all directly used in the algorithm which
simplifies the overall design.
8. There are no angular accuracy issues because no angle-based criterion is used.
9. Separate operate levels for forward and reverse directions can be used.
The energizing of a shunt capacitor in a power system is typically followed by relatively large current
and voltage transients which contains a lot of harmonics. When an EF happens the same holds true
for the zero-sequence circuit.
As shown in Figure 156, some damped oscillation is clearly visible in the Io signal at the beginning of
this EF. The frequency of that oscillation is determined by network parameters (that is L, R and C)
and is almost never an exact multiple of the fundamental frequency signal. The frequency of the
oscillating signal may vary from 100Hz up to theoretically 5kHz. In modern numerical IEDs typically
full-cycle filters (that is 20ms long filtering window in 50Hz power system) will be used to extract the
fundamental frequency phasors but, also higher harmonic phasors. The filtering time is quite short
and the oscillation signal during an EF will pass through this filter making it visible in some of the Io
current harmonic phasors.
For resonant grounded systems the total inductance of all coils is tuned to the distributed
capacitance of the overall power system only at the fundamental (rated) frequency. For all higher
harmonic signals the coils have a h2 times higher impedance than the corresponding capacitive
reactance, where h is the harmonic number. Already for the second harmonic component (h=2) the
compensation coils will have a 4 times higher impedance than distributed capacitances. Therefore all
coils can be omitted from the zero-sequence equivalent circuit shown in Figure 153 for all harmonic
components. A simplification is that all harmonic components in any high-impedance grounded
systems behave as the fundamental frequency component in an isolated power system.
Subsequently the Io*sin(ɸ) principle which is typically used in an isolated power system can be now
applied to all the higher order harmonic components irrespective of the actual type of the grounding
used in the protected network.
Since the higher harmonics will primarily be present during the transient part of the EF, these
harmonic components will behave in a similar transient way as previously explained for the
fundamental frequency Io*cos(ɸ) component. Consequently, the same integration principle can be
used to measure this transient harmonic reactive power exchange between the capacitors and the
harmonic source located at the fault point.
To simplify the IED calculations, the following sum is formed first, where all reactive power
components from all current harmonics are lumped together:
K
IOh *sin( h )
h2
where K is the maximum harmonic component which can be measured by the relay. This summed
value is proportional to the total harmonic reactive power seen by the IED during an EF.
Since the summed instantaneous Io*sin(ɸ) harmonic values will vary quite a lot during a transient
period of the EF, the averaged (integrated) value is used. In the feeder where the EF is located this
averaged value will be positive, while in all feeders which see the EF in reverse, this averaged value
will be negative. By settings, two current threshold levels (one positive and the second negative), the
direction of the EF can be determined. Since everything is scaled back to current, even the same
pickup levels as for the active transient power part can be used.
The summed averaged Io*sin(ɸ) harmonic value is also given as a service value from the function
(see signal IHARMIM in Figure 160) to make testing and understanding of the function operation
principles easier. This value can be recorded by the built in disturbance recorder and even be used to
fine-tune the settings for the respective pickup levels.
Examples how these signals may look like for an EF on a faulty feeder and on a healthy feeder are
given in Figure 158 and Figure 159 respectively. Note that this is the same EF and feeders as shown
in Figure 156 and Figure 157.
IEC19000939=IEC19000939=1=en-us=Original.vsdx
IEC19000939-1-en.vsdx
IEC19000939-1-en.vsdx
IEC19000939 V1 EN-US
Figure 158: Example how waveforms and the summed harmonic reactive power signals may
look like for a faulty feeder
IEC19000940=IEC19000940=1=en-us=Original.vsdx
IEC19000939-1-en.vsdx
IEC19000940=IEC19000940=1=en-us=Original.vsdx
IEC19000940=IEC19000940=1=en-us=Original.vsdx
IEC19000940 V1 EN-US
Figure 159: Example how waveforms and the summed harmonic reactive power signals may
look like for a healthy feeder
Advantages of this harmonic based transient reactive power method to detect the EF direction in
high-impedance grounded system are:
1. Simplicity, because only the reactive part of the higher harmonic phasors of Io current is used.
2. Use of the widely recognized protection principle Io*sin(ɸ).
3. Independence from the compensation degree, number of coils used and their physical location
in the protected network (all coils are disregarded for harmonic calculations).
4. Averaging (that is numerical integration) is performed continuously. There is no need to start/
stop this calculation process.
5. The Ʃ(Ioh*sin(ɸh)) quantity will be approximately equal to zero during all operating conditions of
the protected network except during the transient period of the EF. Consequently, it is simple to
determine when this quantity appears. As an additional security measure, it can be verified that
this coincides with the jump of the fundamental frequency Uo voltage magnitude.
6. A low sampling rate is sufficient, because typically only up to and including the 5th harmonic is
required to be taken into calculation.
7. Raw samples of residual voltage and current are not at all directly used in the algorithm which
simplifies the overall design.
8. Separate operate levels for forward and reverse direction are possible.
As explained in the previous two sections this transient EF protection function is based on two
principles:
1. Distribution of the active transient power at fundamental frequency, which is supplied from the
fault point to initially charge all distributed capacitances to ground in the zero-sequence system
at the moment of an EF inception in a high-impedance grounded network.
2. Distribution of the reactive transient power for higher harmonic components at the moment of an
EF inception in a high-impedance grounded network.
These two principles will hold true for any type of EF in a high-impedance grounded network,
including low-ohmic, high-ohmic, intermittent and restriking earth-faults. Consequently, this function is
able to operate for all of them.
Note that the neutral voltage Uo is common for all relays installed in the galvanically interconnected
system and typically the voltage measurement does not pose any problem for the IED operation.
It is not trivial to properly measure the residual current signal Io and extract the useful parts from it.
Due to this, use of complete current phasors for either fundamental frequency or higher harmonics
can be a problem and can lead to incorrect operation of the relays which are using complete current
phasors for measurement.
For fundamental frequency current phasor only the Io*cos(ɸ) component has useful physical
meaning, while the Io*sin(ɸ) component is just a disturbing part of the signal.
For all higher harmonic current phasors the situation is exactly the opposite. Io*sin(ɸ) is a useful
component with physical meaning, while the Io*cos(ɸ) component shall be avoided.
To achieve a stable and reliable signal, only the useful components of the current signal are
integrated in time. This makes these integral values proportional to the respective energy. However,
these integral values are scaled back to the measured current magnitude by using the moving
average method. Only the sign of this integral (positive or negative) during an EF is used in this
design to determine the direction of the earth fault. Some minimum (settable) magnitude level of the
integrated signal shall be exceeded for security reasons and to avoid any possible issues with IED
hardware accuracy. Using two independent measurement principles, the best practical results in
respect to dependability and security for the transient earth-fault protection will be ensured.
Figure 160 displays the overall simplified logic diagram for the APPTEF function.
a uormshigh
a>b
UN> b
UNMAG *)
ioangle
ANGDIF *)
uoangle -
uofundamp
iofundamp
Continuous
Extract -Uo1 IFUNDRE
Derive |Io1|*cos(ɸ1) Integration
Fundamental
current (Averaging)
Extract Io1 active and |Io1|*sin(ɸ1)
reactive part Continuous IFUNDIM
Fundamental
Integration
Invert (Averaging)
Uo
Extract -Uo2 a activepowerhigh
3Uo Derive |Io2|*cos(ɸ2) a>b
2nd Harmonic IMinForward b
VT input current
Extract Io2 active and |Io2|*sin(ɸ2)
reactive part a activepowerlow
2nd Harmonic a<b
IMinReverse
x b
-1
Extract -Uo3 Derive |Io3|*cos(ɸ3) 2% of IBase a activepoweralarm
3Io 3rd Harmonic a>b
current b
CT input active and |Io3|*sin(ɸ3)
Extract
3rd Harmonic
Io3 reactive part Ʃ Continuous
Integration a
a>b
reactivepowerhigh
(Averaging)
b
0.0 T IHARMIM
F INRMS *)
5 cycles
Io True RMS a iormshigh
t
Filter a>b
IN> b
*) shown only in PCM600 Monitoring Tool and LHMI
IEC19000941 V2 EN-US
Figure 160: Simplified logic for measurement part of the APPTEF function
If required, the harmonic part of the APPTEF function can be effectively disabled when the binary
input signal BLKHARM has a logical value one. That will effectively force the calculated value for
IHARMIM to zero. Therefore, the Transient EF function APPTEF will then work based only on the
fundamental frequency phasor measurements for 3Uo and 3Io quantities.
The harmonic part of the function is enabled by default (that is, BLKHARM=0).
Service values for 3Uo magnitude, 3Io magnitude and angle between them are only displayed in the
Monitoring Tool and LHMI, in order to facilitate function testing and commissioning.
The integrated value of the fundamental frequency Io*sin(ɸ) reactive part (IFUNDIM ) is not used in
the function but is provided as a service value. This enables the end user for easier understanding of
the flow of reactive power in the zero-sequence circuit during an EF in a complex sub-transmission
network configurations when several compensation coils are used which are geographically spread-
out throughout the system.
The output signals displayed in Figure 160 with small letters are only used in simplified
logic diagrams which are given below. These signals are not available outside of the
function.
After performing the measurement of the two averaged power components, the following Boolean
logics are used to derive required binary outputs from the transient EF protection function.
Residual over-voltage start logic and function overall reset logic GUID-C68D706F-BABC-48E2-B5E0-98A26121C09C v1
The residual over-voltage start signal is internally used in the APPTEF function to arm the function to
operate in case of an EF.
Note that this voltage signal defines when the function resets internally as well.
BLOCK block
stunwindow
2.5 cycles AND
STUN
AND
tStart
stun
t tStartOn
tReset 20ms
uormshigh
t
AND
RESET 5ms
From LHMI reset
IEC61850 Command OR OR
almcc
IEC19000942-1-en.vsdx
IEC19000942 V1 EN-US
20ms
stfw Counter
AND Set CounterLimit
stun reset Reached STIEF
Reset block AND
UN>StartsNo CounterLimit
stief
IEC19000943-1-en.vsdx
IEC19000943 V1 EN-US
uofundamp = 600ms
High
iofundamp t
Impedance
activepoweralarm Fault 50ms
stun
almciri Logic
block WRNFW
AND
activepowerhigh
OR
reactivepowerhigh
stunwindow stfw
iormshigh AND
almcc S tPulseMin
AND
reset RS
R OR STFW
tTripInterm
t
AND
stief TRIP
OR tTrip OR
tStartOn
AND t
OR tPulseMin
OperationMode = Start and Trip
BLKTR AND
IEC19000944 V2 EN-US
stunwindow
activepowerlow
reactivepowerlow OR
iormshigh AND
almcc
stfw
S
reset RS
R
stief
tStartOn OR AND STRV
OR
block tPulseMin
stun
IEC19000945-1-en.vsdx
IEC19000945 V1 EN-US
tCC
OperationCC = On 200ms
t
iofundamp AND t ALMCC
a reset AND AND
a>b block
CrossCntry_IN> b
almcc
IEC19000946-1-en.vsdx
IEC19000946 V1 EN-US
tCircIN
iofundamp 500ms block
a t
a>b reset t ALMCIRI
Circulate_IN> b AND AND
200ms
activepowerhigh
t
activepowerlow OR AND OR
stun
almciri
IEC19000947-1-en.vsdx
IEC19000947 V1 EN-US
8.1.1 Identification
M16876-1 v8
3U<
V2 EN-US
SYMBOL-R-2U-GREATER-THAN
Undervoltages can occur in the power system during faults or abnormal conditions. The two-step
undervoltage protection function (UV2PTUV) can be used to open circuit breakers to prepare for
system restoration at power outages or as a long-time delayed back-up to the primary protection.
UV2PTUV has two voltage steps, each with inverse or definite time delay.
It has a high reset ratio to allow settings close to the system service voltage.
UV2PTUV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
IEC06000276-2-en.vsd
IEC06000276 V2 EN-US
8.1.4 Signals
PID-3586-INPUTSIGNALS v7
PID-3586-OUTPUTSIGNALS v7
8.1.5 Settings
PID-3586-SETTINGS v7
Two-step undervoltage protection (UV2PTUV) is used to detect low power system voltage. If one,
two or three phase voltages decrease below the set value, a corresponding START signal is
generated. The parameters OpMode1 and OpMode2 influence the requirements to activate the
START outputs: the measured voltages 1 out of 3, 2 out of 3, or 3 out of 3 have to be lower than the
corresponding set point to issue the corresponding START signal.
UV2PTUV has two voltage-measuring steps with separate time delays. If the voltage remains below
the set value for the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted
trip due to the disconnection of the related high-voltage equipment, a voltage-controlled blocking of
the function is available: if the voltage is lower than the set blocking level, the function is blocked and
no START or TRIP signal is generated. The time delay characteristic is individually chosen for each
step and can be either definite time delay or inverse time delay.
To avoid oscillations of the output START signal, a hysteresis has been included.
Depending on the value of the ConnType parameter, UV2PTUV can be set to measure phase-to-
earth fundamental value, phase-to-phase fundamental value, phase-to-earth true RMS value or
phase-to-phase true RMS value, and compares it against the set values, U1< and U2<. The voltage-
related settings are made in percentage of the base voltage which is set in kV phase-to-phase
voltage. This means operation for phase-to-earth voltage under:
UBase(kV )
U (%) ·
3
EQUATION1429 V3 EN-US (Equation 49)
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT).
For the inverse time delay three different modes are available:
• inverse curve A
• inverse curve B
• customer programmable inverse curve
k
t=
æ Un < -U ö
ç ÷
è Un < ø
EQUATION1431 V2 EN-US (Equation 51)
where:
Un< Set value for step 1 and step 2
U Measured voltage
k × 480
t= 2.0
+ 0.055
æ Un < - U ö
ç 32 × - 0.5 ÷
è Un < ø
EQUATION1432 V2 EN-US (Equation 52)
é ù
ê ú
ê k×A ú
t=ê pú
+D
ê æ Un < - U ö ú
êçB × -C÷ ú
ëè Un < ø û
EQUATION1433 V2 EN-US (Equation 53)
When the denominator in the expression is equal to zero the time delay will be infinity. There will be
an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Un< down to Un< · (1.0 – CrvSatn/100) the used voltage will be:
Un< · (1.0 – CrvSatn/100). If the programmable curve is used this parameter must be calculated so
that:
CrvSatn
B× -C > 0
100
EQUATION1435 V1 EN-US (Equation 54)
If the Programmable inverse curve is chosen for operation and Equation 54 does not
satisfy based on the set values, no TRIP signal is issued. However, START signal is set
and maintained as long as the measured quantity for operation is below the set start level
of step.
The lowest voltage is always used for the inverse time delay integration. The details of the different
inverse time characteristics are shown in section "Inverse characteristics".
Voltage
UL1
UL2
UL3
IDMT Voltage
Time
IEC12000186-1-en.vsd
IEC12000186 V1 EN-US
Figure 168: Voltage used for the inverse time characteristic integration
TRIP signal issuing requires that the undervoltage condition continues for at least the user set time
delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some
special voltage level dependent time curves for the inverse time mode (IDMT). If the start condition,
with respect to the measured voltage, ceases during the delay time, and is not fulfilled again within a
user-defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 pickup
for the inverse time) the corresponding start output is reset. After leaving the hysteresis area, the
start condition must be fulfilled again and it is not sufficient for the signal to only return back to the
hysteresis area. For the undervoltage function the IDMT reset time is constant and does not depend
on the voltage fluctuations during the drop-off period. However, there are three ways to reset the
timer: the timer is reset instantaneously, the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 169 and figure 170.
tIReset1
Voltage Measured
START Voltage
HystAbs1
TRIP
U1<
Time
START
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous
decreased IEC05000010-5-en.vsdx
IEC05000010 V5 EN-US
Figure 169: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay at
different reset types
tIReset1
Voltage
START
START
HystAbs1 Measured Voltage
TRIP
U1<
Time
START t
TRIP
Time
Integrator Frozen Timer
Time
Instantaneous Linearly decreased
IEC05000011-en-4.vsdx
IEC05000011 V4 EN-US
Figure 170: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at different
reset types
Definite timer delay
When definite time delay is selected the function will operate as shown in figure 171. Detailed
information about individual stage reset/operation behavior is shown in figure 172 and figure 173
respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time delayed
stage is ensured.
ST1
U t1
a tReset1
TR1
t
a<b t
U1< R
b
AND
IEC09000785-3-en.vsd
IEC09000785 V3 EN-US
U1<
ST1
TR1
tReset1
t1
IEC10000039-3-en.vsd
IEC10000039 V3 EN-US
U1<
ST1
TR1
tReset1
t1
IEC10000040-3-en.vsd
IEC10000040 V3 EN-US
It is possible to block Two step undervoltage protection UV2PTUV partially or completely, by binary
input signals or by parameter settings, where:
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of
step 1, or both the trip and the START outputs of step 1, are blocked. The characteristic of the
blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to Off resulting in
no voltage based blocking. Corresponding settings and functionality are valid also for step 2.
In case of disconnection of the high voltage component the measured voltage will get very low. The
event will START both the under voltage function and the blocking function, as seen in figure 174.
The delay of the blocking function must be set less than the time delay of under voltage function.
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
IEC05000466 V1 EN-US
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the
three phase-to-phase voltages. Recursive fourier filters or true RMS filters of input voltage signals
are used. The voltages are individually compared to the set value, and the lowest voltage is used for
the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2 out
of 3 and 3 out of 3 criteria to fulfill the START condition. The design of Two step undervoltage
protection UV2PTUV is schematically shown in Figure 175.
Step 1 TR1L2
Time integrator TRIP
MinVoltSelector tIReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
UL1 < U2< Voltage Phase Phase 1
Selector
OpMode2 ST2L2
Comparator Phase 2
UL2 < U2< 1 out of 3
2 out of 3 Start t2 ST2L3
3 out of 3 Phase 3 t2Reset
Comparator IntBlkStVal2 &
UL3 < U2< Trip ST2
Output OR
Logic
START TR2L1
Step 2
TR2L2
Time integrator TRIP
MinVoltSelector tIReset2
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
IEC05000834-2-en.vsd
IEC05000834 V2 EN-US
M13290-1 v17
8.2.1 Identification
M17002-1 v8
3U>
SYMBOL-C-2U-SMALLER-THAN V2 EN-US
Overvoltages may occur in the power system during abnormal conditions such as sudden power
loss, tap changer regulating failures, and open line ends on long lines.
Two step overvoltage protection (OV2PTOV) function can be used to detect open line ends, normally
then combined with a directional reactive over-power function to supervise the system voltage. When
triggered, the function will cause an alarm, switch in reactors, or switch out capacitor banks.
OV2PTOV has a high reset ratio to allow settings close to system service voltage.
OV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
IEC06000277-2-en.vsd
IEC06000277 V2 EN-US
8.2.4 Signals
PID-3535-INPUTSIGNALS v7
PID-3535-OUTPUTSIGNALS v7
8.2.5 Settings
PID-3535-SETTINGS v7
Two step overvoltage protection OV2PTOV is used to detect high power system voltage. OV2PTOV
has two steps with separate time delays. If one-, two- or three-phase voltages increase above the set
value, a corresponding START signal is issued. OV2PTOV can be set to START/TRIP, based on 1
out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being above the set point. If the voltage
remains above the set value for a time period corresponding to the chosen time delay, the
corresponding trip signal is issued.
The time delay characteristic is individually chosen for the two steps, and can be either definite time
or inverse time delayed.
The voltage related settings are made in percent of the global set base voltage UBase, which is set
in kV, phase-to-phase.
The setting of the analog inputs are given as primary phase-to-earth or phase-to-phase voltage.
OV2PTOV will operate if the voltage gets higher than the set percentage of the set base voltage
UBase. This means operation for phase-to-earth voltage over:
All the three voltages are measured continuously, and compared with the set values, U1> for Step 1
and U2> for Step 2. The parameters OpMode1 and OpMode2 influence the requirements to activate
the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3 measured voltages have to be higher
than the corresponding set point to issue the corresponding START signal.
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT).
For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
• customer programmable inverse curve
k
t=
æ U - Un > ö
ç ÷
è Un > ø
IECEQUATION2422 V1 EN-US (Equation 57)
where:
Un> Set value for step 1 and step 2
U Measured voltage
k 480
t 2.0
0.035
U Un
32 0.5
Un
k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è U n > ø
IECEQUATION2425 V1 EN-US (Equation 59)
The customer programmable curve is defined by the below equation, where A, B, C, D, k and p are
settings:
k×A
t= p
+D
æ U -Un > ö
çB× -C÷
è Un > ø
EQUATION1439 V2 EN-US (Equation 60)
When the denominator in the expression is equal to zero the time delay will be infinity. There will be
an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Un> up to Un> · (1.0 + CrvSatn/100) the used voltage will be:
Un> · (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so
that:
CrvSatn
B× -C > 0
100
EQUATION1435 V1 EN-US (Equation 61)
If the Programmable inverse curve is chosen for operation and Equation 61 does not
satisfy based on the set values, no TRIP signal is issued. However, START signal is set
and maintained as long as the measured quantity for operation is above the set start level
of step.
The highest phase (or phase-to-phase) voltage is always used for the inverse time delay integration,
see figure 177. The details of the different inverse time characteristics are shown in section "Inverse
characteristics".
Voltage
IDMT Voltage
UL1
UL2
UL3
Time
IEC05000016-2-en.vsd
IEC05000016 V2 EN-US
Figure 177: Voltage used for the inverse time characteristic integration
Operation of the trip signal requires that the overvoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
selected voltage level dependent time curves for the inverse time mode (IDMT). If the START
condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding START output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition
must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.
The hysteresis value for each step is settable HystAbsn (where n means either 1 or 2 respectively) to
allow a high and accurate reset of the function. For OV2PTOV the IDMT reset time is constant and
does not depend on the voltage fluctuations during the drop-off period. However, there are three
ways to reset the timer: either the timer is reset instantaneously, or the timer value is frozen during
the reset time, or the timer value is linearly decreased during the reset time.
tIReset1
Voltage
START
TRIP
U1>
HystAbs1 Measured
Voltage
Time
START t
TRIP
Time
Integrator Linearly decreased
Frozen Timer
t
Instantaneous Time
IEC09000055‐3‐en.vsdx
IEC09000055 V3 EN-US
Figure 178: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay at
different reset types
tIReset1
Voltage
START TRIP
START HystAbs1
U1>
Measured
Voltage
Time
START t
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous decreased
IEC05000020‐4‐en.vsdx
IEC05000020 V4 EN-US
Figure 179: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at different
reset types
Definite time delay
When definite time delay is selected, the function will operate as shown in figure 180. Detailed
information about individual stage reset/operation behavior is shown in figure 181 and figure 182
respectively. Note that by setting tResetn = 0.0s (where n means either 1 or 2 respectively),
instantaneous reset of the definite time delayed stage is ensured.
ST1
U tReset1 t1
a
a>b t t
TR1
U1>
b AND
OFF ON
Delay Delay
IEC10000100-2-en.vsd
IEC10000100 V2 EN-US
Figure 180: Logic diagram for step 1, definite time delay, DT operation
U1>
START
TRIP
tReset1
t1
IEC10000037-2-en.vsd
IEC10000037 V2 EN-US
Figure 181: Example for step 1, Definite Time Delay stage 1 reset
U1>
START
TRIP
tReset1
t1
IEC10000038-2-en.vsd
IEC10000038 V2 EN-US
It is possible to block Two step overvoltage protection OV2PTOV partially or completely, by binary
input signals where:
The voltage measuring elements continuously measure the three phase-to-earth voltages or the
three phase-to-phase voltages. Recursive Fourier filters or true RMS filters of input voltage signals
are used. The phase voltages are individually compared to the set value, and the highest voltage is
used for the inverse time characteristic integration. A special logic is included to achieve the 1 out of
3, 2 out of 3 or 3 out of 3 criteria to fulfill the START condition. The design of Two step overvoltage
protection (OV2PTOV) is schematically described in figure 183.
OR TR1
Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
Start ST2L3
2 out of 3
Phase 3 t2
3 out of 3
Comparator t2Reset
UL3 > U2> & ST2
OR
Trip
START Output TR2L1
Logic
TR2
OR
START
OR
TRIP
OR
IEC05000013-2-en.vsd
IEC05000013-WMF V2 EN-US
M13304-1 v16
8.3.2 Identification
SEMOD54295-2 v6
IEC15000108 V1 EN-US
Residual voltages may occur in the power system during earth faults.
Two step residual overvoltage protection (ROV2PTOV) function calculates the residual voltage from
the three-phase voltage input transformers or measures it from a single voltage input transformer fed
from an open delta or neutral point voltage transformer.
ROV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2
IEC06000278-2-en.vsd
IEC06000278 V2 EN-US
8.3.5 Signals
PID-7438-INPUTSIGNALS v1
PID-7438-OUTPUTSIGNALS v1
8.3.6 Settings
PID-7438-SETTINGS v1
Two step residual overvoltage protection ROV2PTOV is used to detect a high residual voltage. The
residual voltage can be measured directly from a voltage transformer in the neutral of a power
transformer or from a three-phase voltage transformer, where the secondary windings are connected
in an open delta. Another possibility is to measure the three phase-to-earth voltages, and calculate
the corresponding residual voltage internally in the IED. ROV2PTOV has two steps with separate
time delays. If the residual voltage remains above the set value for a time period corresponding to
the chosen time delay, the corresponding TRIP signal is issued.
The time delay characteristic is individually chosen for the two steps and can be either definite time
delay or inverse time delay.
The voltage-related settings are made in percent of the base voltage, which is set in kV, phase-
phase. The set UBase value is divided by sqrt(3) before the set value is calculated.
The residual voltage is measured continuously, and compared with the set values, U1> and U2>.
To avoid oscillations of the output START signal, a settable hysteresis has been included.
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT).
For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
• customer programmable inverse curve
k
t=
æ U - Un > ö
ç ÷
è Un > ø
IECEQUATION2422 V1 EN-US (Equation 62)
where:
Un> Set value for step 1 and step 2
U Measured voltage
k 480
t 2.0
0.035
U Un
32 0.5
Un
k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è U > ø
IECEQUATION2421 V1 EN-US (Equation 64)
k×A
t= p
+D
æ U -Un > ö
çB× -C÷
è Un > ø
EQUATION1439 V2 EN-US (Equation 65)
When the denominator in the expression is equal to zero, the time delay will be infinite. There will be
an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Un> up to Un> · (1.0 + CrvSatn/100) the used voltage will be:
Un> · (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so
that:
CrvSatn
B× -C > 0
100
EQUATION1440 V1 EN-US (Equation 66)
If the Programmable inverse curve is chosen for operation and Equation 66 does not
satisfy based on the set values, no TRIP signal is issued. However, START signal is set
and maintained as long as the measured quantity for operation is above the set start level
of step.
The details of the different inverse time characteristics are shown in section "Inverse characteristics".
TRIP signal issuing requires that the residual overvoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some
special voltage level dependent time curves for the inverse time mode (IDMT).
If the START condition, with respect to the measured voltage ceases during the delay time, and is
not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after the
defined reset time has elapsed.
Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled
again and it is not sufficient for the signal to only return back to the hysteresis area. Also, notice that
for the overvoltage function, IDMT reset time is constant and does not depend on the voltage
fluctuations during the drop-off period.
There are three ways to reset the timer: the timer is reset instantaneously, the timer value is frozen
during the reset time, or the timer value is linearly decreased during the reset time. See figure 185
and figure 186.
tIReset1
Voltage
START
TRIP
U1>
HystAbs1 Measured
Voltage
Time
START t
TRIP
Time
Integrator Linearly decreased
Frozen Timer
t
Instantaneous Time
IEC09000055‐3‐en.vsdx
IEC09000055 V3 EN-US
Figure 185: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
tIReset1
Voltage
START TRIP
START HystAbs1
U1>
Measured
Voltage
Time
START t
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous decreased
IEC05000020‐4‐en.vsdx
IEC05000020 V4 EN-US
Figure 186: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite time delay
When definite time delay is selected, the function will operate as shown in figure 187. Detailed
information about individual stage reset/operation behavior is shown in figure 188 and figure 189
respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time delayed
stage is ensured.
ST1
U tReset1 t1
a
a>b t t
TR1
U1>
b AND
OFF ON
Delay Delay
IEC10000100-2-en.vsd
IEC10000100 V2 EN-US
Figure 187: Logic diagram for step 1, Definite time delay, DT operation
U1<
ST1
TR1
tReset1
t1
IEC10000039-3-en.vsd
IEC10000039 V3 EN-US
U1<
ST1
TR1
tReset1
t1
IEC10000040-3-en.vsd
IEC10000040 V3 EN-US
It is possible to block two step residual overvoltage protection ROV2PTOV partially or completely by
binary input signals where:
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier filters
filter the input voltage signal for the rated frequency. The residual voltage is compared to the set
value, and is also used for the inverse time characteristic integration. The design of the function is
schematically described in figure 190.
ST2
Comparator Phase 1
UN > U2> TR2
Start
t2
START tReset2
& START
Trip OR
Time integrator Output
TRIP Logic
tIReset2
ResetTypeCrv2 TRIP
Step 2 OR
IEC05000748_2_en.vsd
IEC05000748 V2 EN-US
Figure 190: Schematic design of Two step residual overvoltage protection ROV2PTOV
8.4.1 Identification
SEMOD171954-2 v2
Loss of voltage check (LOVPTUV ) is suitable for use in networks with an automatic system
restoration function. LOVPTUV issues a three-pole trip command to the circuit breaker, if all three
phase voltages fall below the set value for a time longer than the set time and the circuit breaker
remains closed.
LOVPTUV
U3P* TRIP
BLOCK START
CBOPEN
VTSU
IEC07000039-2-en.vsd
IEC07000039 V2 EN-US
8.4.4 Signals
PID-3519-INPUTSIGNALS v6
PID-3519-OUTPUTSIGNALS v6
8.4.5 Settings
PID-3519-SETTINGS v6
The operation of Loss of voltage check LOVPTUV is based on line voltage measurement. LOVPTUV
is provided with a logic, which automatically recognizes if the line was restored for at least tRestore
before starting the tTrip timer. All three phases are required to be low before the output TRIP is
activated. The START output signal indicates start.
Additionally, LOVPTUV is automatically blocked if only one or two phase voltages have been
detected low for more than tBlock.
LOVPTUV operates again only if the line has been restored to full voltage for at least tRestore.
Operation of the function is also inhibited by fuse failure and open circuit breaker information signals,
by their connection to dedicated inputs of the function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a length set by setting
tPulse.
The operation of LOVPTUV is supervised by the fuse-failure function (BLKU input) and the
information about the open position (CBOPEN) of the associated circuit breaker.
The BLOCK input can be connected to a binary input of the IED in order to receive a block command
from external devices or can be software connected to other internal functions of the IED itself in
order to receive a block command from internal functions. LOVPTUV is also blocked when the IED is
in TEST status and the function has been blocked from the HMI test menu. (Blocked=Yes).
TEST
TEST-ACTIVE
&
Blocked = Yes
START
BLOCK >1
Function Enable tTrip tPulse TRIP
STUL1N & t
STUL2N &
only 1 or 2 phases are low for
Latched at least 10 s (not three)
STUL3N Enable
&
tBlock
>1 t
IEC07000089_2_en.vsd
IEC07000089 V2 EN-US
9.1.1 Identification
M14865-1 v6
f<
SYMBOL-P V1 EN-US
Underfrequency protection (SAPTUF) measures frequency with high accuracy, and is used for load
shedding systems, remedial action schemes, gas turbine startup and so on. Separate definite time
delays are provided for operate and restore.
The operation is based on positive sequence voltage measurement and requires two phase-phase or
three phase-neutral voltages to be connected. For information about how to connect analog inputs,
refer to Application manual /IED application /Analog inputs /Setting guidelines .
SAPTUF
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
FREQ
IEC06000279_2_en.vsd
IEC06000279 V2 EN-US
9.1.4 Signals
PID-6752-INPUTSIGNALS v2
PID-6752-OUTPUTSIGNALS v2
9.1.5 Settings
PID-6752-SETTINGS v2
Underfrequency protection SAPTUF is used to detect low power system frequency. SAPTUF can
either have a definite time delay or a voltage magnitude dependent time delay. If the voltage
magnitude dependent time delay is applied, the time delay will be longer if the voltage is higher, and
the delay will be shorter if the voltage is lower. If the frequency remains below the set value for a time
period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an
unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage
controlled blocking of the function is available, that is, if the voltage is lower than the set blocking
voltage IntBlockLevel, the function is blocked and no START or TRIP signal is issued.
The fundamental frequency of the measured input voltage is measured continuously, and compared
with the set value, StartFrequency. The frequency function is dependent on the voltage magnitude. If
the voltage magnitude decreases below the setting IntBlockLevel, SAPTUF gets blocked, and the
output BLKDMAGN is issued. All voltage settings are made in percent of the setting UBase, which
should be set as a phase-phase voltage in kV.
To avoid oscillations of the output START signal, a hysteresis has been included.
The time delay for underfrequency protection SAPTUF can be either a settable definite time delay or
a voltage magnitude dependent time delay, where the time delay depends on the voltage level; a
high voltage level gives a longer time delay and a low voltage level causes a short time delay. For the
definite time delay, the setting tDelay sets the time delay.
For the voltage dependent time delay the measured voltage level and the settings UNom, UMin,
Exponent, tMax and tMin set the time delay according to Figure 194 and Equation 67. The setting
TimerMode is used to decide what type of time delay to apply.
Trip signal issuing requires that the underfrequency condition continues for at least the user set time
delay tDelay. If the START condition, with respect to the measured frequency ceases during this user
set delay time, and is not fulfilled again within a user defined reset time, tReset, the START output is
reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
The total time delay consists of the set value for time delay plus the minimum operate
time of the start function (80-90 ms).
On the RESTORE output of SAPTUF a 100ms pulse is issued, after a time delay corresponding to
the setting of tRestore, when the measured frequency returns to the level corresponding to the
setting RestoreFreq, after an issue of the TRIP output signal. If tRestore is se to 0.000 s the restore
functionality is disabled, and no output will be given.
Since the fundamental frequency in a power system is the same all over the system, except some
deviations during power oscillations, another criterion is needed to decide, where to take actions,
based on low frequency. In many applications the voltage level is very suitable, and in most cases is
load shedding preferable in areas with low voltage. Therefore, a voltage dependent time delay has
been introduced, to make sure that load shedding, or other actions, take place at the right location. At
constant voltage, U, the voltage dependent time delay is calculated according to Equation 67
undervoltage and overvoltage functions.
Exponent
é U - UMin ù
t=ê × ( tMax - tMin) + tMin
ëUNom - UMin úû
U = U measured
where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3, and 4
1
0
1
Exponenent
TimeDlyOperate [s]
2
3
0.5 4
0
90 95 100
U [% of UBase]
en05000075.vsd
IEC05000075 V1 EN-US
Figure 194: Voltage dependent inverse time characteristics for underfrequency protection
SAPTUF. The time delay to operate is plotted as a function of the measured
voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the
TRIP outputs are blocked.
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults. The time integrator can operate either due to a definite delay
time or to the special voltage dependent delay time. When the frequency has returned back to the
setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore. The design of
underfrequency protection SAPTUF is schematically described in figure 195.
BLKDMAGN
BLOCK
block START
OR
U < IntBlockLevel
Start
&
start Trip
Voltage
output
Definite timer
logic TRIP
or
Voltage based timer
Frequency
f < StartFrequency
tReset trip
tDelay RESTORE
AND
BLKTRIP
IEC16000041-1-en.vsdx
IEC16000041 V1 EN-US
Exponent
é U - UMin ù
t=ê × ( tMax - tMin) + tMin
ëUNom - UMin úû
U = U measured
EQUATION1182 V2 EN-US
Note: The stated accuracy is valid for the voltage range 50 V – 250 V secondary.
1) The settings and test conditions are in accordance with IEC 60255-181 standard (section 6.2 – 6.7).
9.2.1 Identification
M14866-1 v4
f>
SYMBOL-O V1 EN-US
Overfrequency protection function (SAPTOF) is applicable in all situations, where reliable detection
of high fundamental power system frequency is needed.
Overfrequency occurs because of sudden load drops or shunt faults in the power network. Close to
the generating plant, generator governor problems can also cause over frequency.
SAPTOF measures frequency with high accuracy, and is used mainly for generation shedding and
remedial action schemes. It is also used as a frequency stage initiating load restoring. A definite time
delay is provided for operate.
The operation is based on positive sequence voltage measurement and requires two phase-phase or
three phase-neutral voltages to be connected. For information about how to connect analog inputs,
refer to Application manual /IED application /Analog inputs /Setting guidelines .
SAPTOF
U3P* TRIP
BLOCK START
BLKTRIP BLKDMAGN
FREQ
IEC06000280_2_en.vsd
IEC06000280 V2 EN-US
9.2.4 Signals
PID-6751-INPUTSIGNALS v2
PID-6751-OUTPUTSIGNALS v2
9.2.5 Settings
PID-6751-SETTINGS v2
Overfrequency protection SAPTOF is used to detect high power system frequency. SAPTOF has a
settable definite time delay. If the frequency remains above the set value for a time period
corresponding to the chosen time delay, the corresponding TRIP signal is issued. To avoid an
unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage
controlled blocking of the function is available, that is, if the voltage is lower than the set blocking
voltage IntBlockLevel, the function is blocked and no START or TRIP signal is issued.
The fundamental frequency of the positive sequence voltage is measured continuously, and
compared with the set value, StartFrequency. Overfrequency protection SAPTOF is dependent on
the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, SAPTOF
is blocked and the output BLKDMAGN is issued. All voltage settings are made in percent of the
UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output
START signal, a hysteresis has been included.
The time delay for Overfrequency protection SAPTOF is a settable definite time delay, specified by
the setting tDelay.
TRIP signal issuing requires that the overfrequency condition continues for at least the user set time
delay, tDelay. If the START condition, with respect to the measured frequency ceases during this
user set delay time, and is not fulfilled again within a user defined reset time, tReset, the START
output is reset, after that the defined reset time has elapsed. It is to be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
The total time delay consists of the set value for time delay plus minimum operate time of
the start function (80 - 90 ms).
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the
TRIP outputs are blocked.
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults in the power system. The time integrator operates due to a
definite delay time. The design of overfrequency protection SAPTOF is schematically described in
figure 197.
BLKDMAGN
BLOCK
block START
OR
U < IntBlockLevel
Start
&
start Trip
Voltage
output
logic TRIP
Definite timer
Frequency
f > StartFrequency tReset
trip
tDelay
AND
BLKTRIP
IEC16000042-1-en.vsdx
IEC16000042 V1 EN-US
1) The settings and test conditions are in accordance with IEC 60255-181 standard (section 6.2 – 6.7).
9.3.1 Identification
M14868-1 v4
df/dt >
<
SYMBOL-N V1 EN-US
The rate-of-change of frequency protection function (SAPFRC) gives an early indication of a main
disturbance in the system. SAPFRC measures frequency with high accuracy, and can be used for
generation shedding, load shedding and remedial action schemes. SAPFRC can discriminate
between a positive or negative change of frequency. A definite time delay is provided for operate.
SAPFRC is provided with an undervoltage blocking. The operation is based on positive sequence
voltage measurement and requires two phase-phase or three phase-neutral voltages to be
connected. For information about how to connect analog inputs, refer to Application manual/IED
application/Analog inputs/Setting guidelines .
SAPFRC
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
IEC06000281-2-en.vsd
IEC06000281 V2 EN-US
9.3.4 Signals
PID-6754-INPUTSIGNALS v2
PID-6754-OUTPUTSIGNALS v2
9.3.5 Settings
PID-6754-SETTINGS v2
Rate-of-change frequency protection SAPFRC is used to detect fast power system frequency
changes at an early stage. SAPFRC has a settable definite time delay. If the rate-of-change of
frequency remains below the set value, for negative rate-of-change, for a time period equal to the
chosen time delay, the TRIP signal is issued. If the rate-of-change of frequency remains above the
set value, for positive rate-of-change, for a time period equal to the chosen time delay, the TRIP
signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage
magnitude a voltage controlled blocking of the function is available, that is, if the voltage is lower than
the set blocking voltage IntBlockLevel the function is blocked and no START or TRIP signal is issued.
If the frequency recovers, after a frequency decrease, a restore signal is issued.
The rate-of-change of the fundamental frequency of the selected voltage is measured continuously,
and compared with the set value, StartFreqGrad. Rate-of-change frequency protection SAPFRC is
also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting
IntBlockLevel , SAPFRC is blocked, and the output BLKDMAGN is issued. The sign of the setting
StartFreqGrad, controls if SAPFRC reacts on a positive or on a negative change in frequency. If
SAPFRC is used for decreasing frequency that is, the setting StartFreqGrad has been given a
negative value, and a trip signal has been issued, then a 100 ms pulse is issued on the RESTORE
output, when the frequency recovers to a value higher than the setting RestoreFreq. A positive
setting of StartFreqGrad, sets SAPFRC to START and TRIP for frequency increases.
To avoid oscillations of the output START signal, a hysteresis has been included.
Rate-of-change frequency protection SAPFRC has a settable definite time delay, tDelay.
Trip signal issuing requires that the rate-of-change of frequency condition continues for at least the
user set time delay, tDelay. If the START condition, with respect to the measured frequency ceases
during the delay time, and is not fulfilled again within a user defined reset time, tReset, the START
output is reset, after that the defined reset time has elapsed. Here it should be noted that after
leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the
signal to only return back into the hysteresis area.
The RESTORE output of SAPFRC is set, after a time delay equal to the setting of tDelay, when the
measured frequency has returned to the level corresponding to RestoreFreq, after an issue of the
TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and no output will
be given. The restore functionality is only active for lowering frequency conditions and the restore
sequence is disabled if a new negative frequency gradient is detected during the restore period,
defined by the settings RestoreFreq and tRestore.
Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked, by binary input
signals or by parameter settings, where:
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the
TRIP outputs are blocked.
BLKDMAGN
BLOCK
block
OR
Voltage
U < IntBlockLevel
START
Start
Rate-of-change
&
of Frequency start
If Trip
[StartFreqGrad<0 output
AND logic
Definite timer
df/dt < StartFreqGrad]
start TRIP
OR
tReset
[StartFreqGrad>0
AND
tDelay
df/dt > StartFreqGrad]
Then
START trip
AND
BLKTRIP
RESTORE
Frequency restore
f > RestoreFreq
> tRestore
AND
BLKREST
IEC16000040-1-en.vsdx
IEC16000040 V1 EN-US
10.1.1 Identification
M14870-1 v5
Open or short circuited current transformer cores can cause unwanted operation of many protection
functions such as differential, earth-fault current and negative-sequence current functions.
Current circuit supervision (CCSSPVC) compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from another set of
cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to block protection
functions expected to give inadvertent tripping.
CCSSPVC
I3P* FAIL
IREF* ALARM
BLOCK
IEC13000304-1-en.vsd
IEC13000304 V1 EN-US
10.1.4 Signals
PID-6806-INPUTSIGNALS v2
PID-6806-OUTPUTSIGNALS v2
10.1.5 Settings
PID-6806-SETTINGS v2
Current circuit supervision CCSSPVC compares the absolute value of the vectorial sum of the three
phase currents |ΣIphase| and the absolute value of the residual current |Iref| from another current
transformer set, see figure 201.
The FAIL output will be set to high when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the numerical value
of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the set operate
value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• CCSSPVC is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for more
than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case the FAIL
and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted resetting of
the blocking function when phase current supervision element(s) operate, for example, during a fault.
40 ms 100 ms
IEC05000463-3-en.vsd
IEC05000463 V3 EN-US
Figure 201: Simplified logic diagram for Current circuit supervision CCSSPVC
The operate characteristic is percentage restrained, which is shown in Figure 202.
| åI phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| åI phase | + | I ref |
99000068.vsd
IEC99000068 V1 EN-US
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + | I ref |
respectively, the slope can not be above 1.
10.2.1 Identification
M14869-1 v4
The aim of the fuse failure supervision function (FUFSPVC) is to block voltage measuring functions
at failures in the secondary circuits between the voltage transformer and the IED in order to avoid
inadvertent operations that otherwise might occur.
The fuse failure supervision function basically has three different detection methods, negative
sequence and zero sequence based detection and an additional delta voltage and delta current
detection.
A criterion based on delta current and delta voltage measurements can be added to the fuse failure
supervision function in order to detect a three phase fuse failure, which in practice is more associated
with voltage transformer switching during station operations.
FUFSPVC
I3P* BLKZ
U3P* BLKU
BLOCK 3PH
CBCLOSED DLD1PH
MCBOP DLD3PH
DISCPOS STDI
BLKTRIP STDIL1
STDIL2
STDIL3
STDU
STDUL1
STDUL2
STDUL3
IEC14000065-1-en.vsd
IEC14000065 V1 EN-US
10.2.4 Signals
PID-3492-INPUTSIGNALS v9
PID-3492-OUTPUTSIGNALS v9
10.2.5 Settings
PID-3492-SETTINGS v9
The zero and negative sequence function continuously measures the currents and voltages in all
three phases and calculates, see figure 204:
The measured signals are compared with their respective set values 3U0> and 3I0<, 3U2> and 3I2<.
The function enable the internal signal FuseFailDetZeroSeq if the measured zero-sequence voltage
is higher than the set value 3U0> and the measured zero-sequence current is below the set value
3I0<.
The function enable the internal signal FuseFailDetNegSeq if the measured negative sequence
voltage is higher than the set value 3U2> and the measured negative sequence current is below the
set value 3I2<.
A drop out delay of 100 ms for the measured zero-sequence and negative sequence current will
prevent a false fuse failure detection at un-equal breaker opening at the two line ends.
Sequence Detection
3I0< CurrZeroSeq
IL1
Zero 3I0
sequence
filter 100 ms CurrNegSeq
a
IL2 a>b t
b
Negative 3I2
sequence
IL3 filter FuseFailDetZeroSeq
AND
100 ms
a
a>b t
3I2< b
FuseFailDetNegSeq
AND
3U0>
VoltZeroSeq
UL1
Zero
sequence a 3U0
a>b
b
filter
UL2 VoltNegSeq
Negative
sequence a 3U2
a>b
UL3 filter b
3U2>
IEC10000036-2-en.vsd
IEC10000036 V2 EN-US
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision function.
It can be connected to a binary input of the IED in order to receive a block command from external
devices or can be software connected to other internal functions of the IED itself in order to receive a
block command from internal functions. Through OR gate it can be connected to both binary inputs
and internal function outputs.
The input BLKTRIP is intended to be connected to the trip output from any of the protection functions
included in the IED. When activated for more than 20 ms, the operation of the fuse failure is blocked;
a fixed drop-out timer prolongs the block for 100 ms. The aim is to increase the security against
unwanted operations during the opening of the breaker, which might cause unbalance conditions for
which the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is activated. The dead
line detection signal has a 200 ms drop-out time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary
contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets
the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is
open independent of the setting of OpMode selector. The additional drop-out timer of 150 ms
prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage dependent
function due to non simultaneous closing of the main contacts of the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order
to block the voltage related functions when the line disconnector is open. The impedance protection
function is not affected by the position of the line disconnector since there will be no line currents that
can cause malfunction of the distance protection. If DISCPOS=0 it signifies that the line is connected
to the system and when the DISCPOS=1 it signifies that the line is disconnected from the system
and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions (undervoltage
protection, energizing check and so on) except for the impedance protection.
The function output BLKZ shall be used for blocking the impedance protection function.
A simplified diagram for the functionality is found in figure 205. The calculation of the changes of
currents and voltages is based on a sample analysis algorithm. The calculated delta quantities are
compared with their respective set values DI< and DU>. The algorithm detects a fuse failure if a
sufficient change in voltage without a sufficient change in current is detected in each phase
separately. The following quantities are calculated in all three phases:
The internal FuseFailDetDUDI signal is activated if the following conditions are fulfilled:
• The magnitude of the phase-ground voltage has been above UPh> for more than 1.5 cycles (i.e.
30 ms in a 50 Hz system)
• The magnitudes of DU in three phases are higher than the corresponding setting DU>
• The magnitudes of DI in three phases are below the setting DI<
• The magnitude of voltages drop in all three phases
• The zero sequence voltage is smaller than 3U0>
In addition to the above conditions, at least one of the following conditions shall be fulfilled in order to
activate the internal FuseFailDetDUDI signal:
• The magnitude of the phase currents in three phases are higher than the setting IPh>
• The circuit breaker is closed (CBCLOSED = True)
The first criterion means that detection of failure in three phases together with high current for the
three phases will set the output. The measured phase current is used to reduce the risk of false fuse
failure detection. If the current on the protected line is low, a voltage drop in the system (not caused
by fuse failure) may be followed by current change lower than the setting DI<, and therefore a false
fuse failure might occur.
The second criterion requires that the delta condition shall be fulfilled at the same time as circuit
breaker is closed. If CBCLOSED input is connected to FALSE , then only the first criterion can enable
the delta function. If the DUDI detections of three phases set the internal signal FuseFailDetDUDI at
the level high, then the signal FuseFailDetDUDI will remain high as long as the voltages of three
phases are lower then the setting Uph>.
In addition to fuse failure detection, two internal signals DeltaU and DeltaI are also generated by the
delta current and delta voltage DUDI detection algorithm. The internal signals DelatU and DeltaI are
activated when a sudden change of voltage, or respectively current, is detected. The detection of the
sudden change is based on a sample analysis algorithm. In particular DelatU is activated if at least
three consecutive voltage samples are higher then the setting DU>. In a similar way DelatI is
activated if at least three consecutive current samples are higher then the setting DI<. When DeltaU
or DeltaI are active, the output signals STDUL1, STDUL2, STDUL3 and respectively STDIL1,
STDIL2, STDIL3, based on a sudden change of voltage or current detection, are activated with a 20
ms time off delay. The common start output signals STDU or STDI are activated with a 60 ms time off
delay, if any sudden change of voltage or current is detected.
The delta function (except the sudden change of voltage and current detection) is
deactivated by setting the parameter OpDUDI to Off.
DUDI Detection
DUDI detection Phase 1
DeltaIL1
IL1
IL2
IL3 DI detection based on sample analysis OR
DI<
UL1
IL1 DeltaIL2
IL2 DUDI detection Phase 2
DeltaUL2
IL3
UL2 Same logic as for phase 1
IL1 DeltaIL3
DUDI detection Phase 3
IL2
DeltaUL3
IL3
UL3 Same logic as for phase 1
UL1
a
a<b
b
IL1
a
a>b
IPh> b AND
OR AND
CBCLOSED AND OR
UL2
a
a<b
b
IL2
a
a>b
b AND
OR AND
AND OR
UL3
a
a<b
b
IL3
a
a>b
b AND
OR AND
AND OR FuseFailDetDUDI
AND
IEC12000166-3-en.vsd
IEC12000166 V3 EN-US
Figure 205: Simplified logic diagram for the DU/DI detection part
intBlock
STDI
AND
20 ms
DeltaIL1 STDIL1
t AND
OR
20 ms
DeltaIL2
t STDIL2
AND
20 ms
DeltaIL3
t
STDIL3
AND
STDU
AND
20 ms
DeltaUL1 STDUL1
t AND
OR
20 ms
DeltaUL2
t STDUL2
AND
20 ms
DeltaUL3
t
STDUL3
AND
IEC12000165-1-en.vsd
IEC12000165 V1 EN-US
Figure 206: Internal signals DeltaU or DeltaI and the corresponding output signals
A simplified diagram for the functionality is found in figure 207. A dead phase condition is indicated if
both the voltage and the current in one phase is below their respective setting values UDLD< and
IDLD<. If at least one phase is considered to be dead the output DLD1PH and the internal signal
DeadLineDet1Ph is activated. If all three phases are considered to be dead the output DLD3PH is
activated
IL3
a
a<b
b
IDLD<
DeadLineDet1Ph
UL1
a AND
a<b
b OR DLD1PH
AND
UL2
a AND
a<b
b
AND DLD3PH
UL3 AND
a AND
a<b
b
UDLD<
intBlock
IEC10000035-1-en.vsd
IEC10000035 V2 EN-US
Figure 207: Simplified logic diagram for Dead Line detection part
A simplified diagram for the functionality is found in figure 208. The fuse failure supervision function
(FUFSPVC) can be switched on or off by the setting parameter Operation to On or Off.
For increased flexibility and adaptation to system requirements an operation mode selector, OpMode,
has been introduced to make it possible to select different operating modes for the negative and zero
sequence based algorithms. The different operation modes are:
The delta function can be activated by setting the parameter OpDUDI to On. When selected it
operates in parallel with the sequence based algorithms.
If the fuse failure situation is present for more than 5 seconds and the setting parameter SealIn is set
to On it will be sealed in as long as at least one phase voltages is below the set value USealIn<. This
will keep the BLKU and BLKZ signals activated as long as any phase voltage is below the set value
USealIn<. If all three phase voltages drop below the set value USealIn< and the setting parameter
SealIn is set to On the output signal 3PH will also be activated. The signals 3PH, BLKU and BLKZ
will now be active as long as any phase voltage is below the set value USealIn<.
If SealIn is set to On the fuse failure condition lasting more then 5 seconds is stored in the non-
volatile memory in the IED. At start-up of the IED (due to auxiliary power interruption or re-start due
to configuration change) it uses the stored value in its non-volatile memory and re-establishes the
conditions that were present before the shut down. All phase voltages must be restored above
USealIn< before fuse failure is de-activated and resets the signals BLKU, BLKZ and 3PH.
The output signal BLKU will also be active if all phase voltages have been above the setting
USealIn< for more than 60 seconds, the zero or negative sequence voltage has been above the set
value 3U0> and 3U2> for more than 5 seconds, all phase currents are below the setting IDLD<
(criteria for open phase detection) and the circuit breaker is closed (input CBCLOSED is activated).
If a MCB is used then the input signal MCBOP is to be connected via a binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP
signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when
the MCB is open independent of the setting of OpMode or OpDUDI. An additional drop-out timer of
150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage
dependent function due to non simultaneous closing of the main contacts of the miniature circuit
breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order
to block the voltage related functions when the line disconnector is open. The impedance protection
function does not have to be affected since there will be no line currents that can cause malfunction
of the distance protection.
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
FusefailStarted
AND
Any UL < UsealIn<
FuseFailDetDUDI
AND 5s
OpDUDI = On
OR t
FuseFailDetZeroSeq
AND
AND
FuseFailDetNegSeq
AND
UNsINs OR
UZsIZs OR
UZsIZs OR UNsINs
OpMode
UZsIZs AND UNsINs
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b
AND
DeadLineDet1Ph 200 ms
AND BLKZ
t OR AND
150 ms
MCBOP t
AND BLKU
60 s
t OR OR
All UL > UsealIn<
AND
VoltZeroSeq 5s
VoltNegSeq OR t
AllCurrLow
CBCLOSED
DISCPOS IEC10000033-2-en.vsd
IEC10000033 V2 EN-US
Figure 208: Simplified logic diagram for fuse failure supervision function, Main logic
10.3.1 Identification
GUID-C7108931-DECA-4397-BCAF-8BFF3B57B4EF v2
Delta supervision function is used to quickly detect (sudden) changes in the network. This can, for
example, be used to detect faults in the power system networks and islanding in grid networks.
Voltage based delta supervision (DELVSPVC) is needed at the grid interconnection point.
DELVSPVC
U3P* START
BLOCK STARTL1
STARTL2
STARTL3
STRISE
STRISEL1
STRISEL2
STRISEL3
STLOW
STLOWL1
STLOWL2
STLOWL3
DELMAGL1
DELMAGL2
DELMAGL3
IEC18000007‐1‐en.vsdx
IEC18000007 V1 EN-US
10.3.4 Signals
PID-7097-INPUTSIGNALS v1
PID-7097-OUTPUTSIGNALS v1
10.3.5 Settings
PID-7097-SETTINGS v1
The delta supervision function DELVSPVC is a phase segregated function with the following
features.
Signal pre‐processing
fundamental DFT
opMode= RMS/DFTMag
harmonic extraction
Magnitude based STARTMAG
delta calculation DELMAGLx
MinValueCheck AND
BLOCK
IEC18000008-1-en.vsdx
IEC18000008 V1 EN-US
Figure 210: Simplified logic diagram for voltage based delta supervision DELVSPVC
The setting Umin is used to check and release the signals for the delta supervision. The delta
detection is blocked for 2 cycles by Umin comparator for angle shift mode.
• Instantaneous 1 cycle
• Instantaneous 2 cycle
• True RMS
• DFT mag
• Vector Shift
This method uses the instantaneous samples for delta detection. The logic of this scheme is shown
in Figure 211. The instantaneous difference between the present sample and the one cycle (or two
cycle) old sample is used for the delta detection. The change (delta) is verified for three continuous
samples in order to release the start signal. Once the start signal is set, any subsequent change in
sample values within 60 ms will not be detected. The DELU> setting will be set in % of UB. The
sample based delta is selectable for one cycle/two cycle operation, based on the OpMode setting.
‐ Abs
60ms
>
StartSampleDelta
AND t
DelU>
q‐1
q‐1
IEC17000199-2-en.vsdx
IEC17000199 V2 EN-US
Figure 211: Simplified logic diagram for sample based delta detection
This mode uses the RMS or DFT magnitude value of the voltage signal for the delta detection. The
logic of this scheme is given in Figure 212. Difference between the present value and the old value is
used for the delta detection. The old value is chosen based on the setting DeltaT, which is defined as
the number of old power cycles.
The function has an execution cycle time of 3 ms. For a DeltaT setting of 3, the old value
is 60 ms. Therefore, accuracy of the old cycle data depends upon the execution cycle.
The output of the comarator is ascertained for half a cycle before releasing a STARTMAG signal. In
DELVSPVC, the DelU> setting is set in % of UB. RMS based delta will have poor accuracy if the
signal contains harmonics and other frequency components. DFT Mag based delta will operate better
in these conditions.
Additional information for the STARTRISE and STARTLOW outputs of the delta are also available in
this mode. The STARTRISE and STARTLOW outputs will be sealed by the start signal. These
outputs explains the reason for the STARTMAG signal.
Seal‐in STARTLOW
logic
0.1
>
IEC17000200-2-en.vdsx
IEC17000200 V2 EN-US
Figure 212: Simplified logic diagram for RMS/DFT based delta detection
The Vector shift selection in the OpMode setting is used to set the DELVSPVC function to operate. A
change in magnitude will not have any impact on this supervision. Angle shift is measured based on
the half cycle time (HCTime) as shown in Figure 213. The figure shows a waveform shift of 40
degree in the voltage waveform. There are two half cycle times which are affected by this angle shift
namely, HCTime(k-1) and HCTime(k). A cumulative difference of two HCTime difference is calculated
to get an accurate estimate of the angle shift. This angle shift is compared with DelUang> setting to
release the STARTANGLE signal.
The logic for this mode is given in Figure 214. The DelUAng> setting will be set in absolute degrees.
Voltage
Angle shift
IEC17000210-1-en.vsdx
IEC17000210 V1 EN-US
DelUang> STARTANGLE
Frequency difference of last 2 cycles AND
> AND
0.2 Hz
IEC18000902-1-en.vsdx
IEC18000902 V1 EN-US
Figure 214: Simplified logic diagram for angle based delta detection
10.4.1 Identification
GUID-0B735A27-6A7D-40E1-B981-91B689608495 v1
Delta supervision function is used to quickly detect (sudden) changes in the network. This can, for
example, be used to detect disturbances in the power system network. Current based delta
supervision (DELISPVC) provides selectivity between load change and the fault.
Present power system has many power electronic devices or FACTS devices, which injects a large
number of harmonics into the system. The function has additional features of 2nd harmonic blocking
and 3rd harmonic start level adaption. The 2nd harmonic blocking secures the operation during the
transformer charging, when high inrush currents are supplied into the system.
DELISPVC
I3P* START
BLOCK STARTL1
STARTL2
STARTL3
STRISE
STRISEL1
STRISEL2
STRISEL3
STLOW
STLOWL1
STLOWL2
STLOWL3
ADAPTVAL
HARM2BLK
DELMAGL1
DELMAGL2
DELMAGL3
IEC18000005-1-en.vsdx
IEC18000005 V1 EN-US
10.4.4 Signals
PID-7098-INPUTSIGNALS v1
PID-7098-OUTPUTSIGNALS v1
10.4.5 Settings
PID-7098-SETTINGS v1
The delta supervision function is a phase segregated function. Following are the features of
DELISPVC:
Signal pre‐processing
fundamental DFT
opMode= RMS/DFTMag
harmonic extraction
Magnitude based STARTMAG
delta calculation DELMAGLx
DFTMagToComp
rd
3 harmonic based ADAPTVAL
adaption nd HARM2BLK
2 harmonic
blocking
AND
MinValueCheck
BLOCK
IEC18000006-1-en.vsdx
IEC18000006 V1 EN-US
Figure 216: Simplified logic diagram for current based delta supervision DELISPVC
The setting Imin is used to check and release the signals for the delta supervision. This setting can
be used to obtain selectivity between load current and fault current.
• Instantaneous 1 cycle
• Instantaneous 2 cycle
• True RMS
• DFT mag
This method uses the buffer of instantaneous sample for delta detection. The logic of this scheme is
given in Figure 217. The instantaneous difference between the present sample and the one cycle (or
two cycle) old sample is used for the delta detection. The change (vectorial delta) is verified for three
continuous samples in order to release the start signal. This delta calculation is affected by angle or
magnitude or both changes in the signal in the last one cycle/two cycle. It is also known as vectorial
delta scheme. Once the start signal is set, any subsequent change in sample values within 60 ms will
not be detected. The DelI> setting will be set in % of IB. The sample based delta is selectable for one
cycle/two cycle operation, based on the OpMode setting.
‐
60ms
Abs
> AND
StartSampleDelta
t
DelI>
q‐1
q‐1
IEC17000191-2-en.vsdx
IEC17000191 V2 EN-US
Figure 217: Simplified logic diagram for sample based delta detection
This mode uses the RMS or DFT magnitude value of the current signal for the delta detection. The
logic of this scheme is given in Figure 218. Difference between the present value and the old value is
used for the delta detection. The old value is chosen based on the setting DeltaT, which is defined as
the number of old power cycles.
The function has an execution cycle of 3 ms. For a DeltaT setting of 3, the old value is 60
ms. Therefore, accuracy of the old cycle data depends upon the execution cycle.
The output of the comparator is ascertained for half a cycle before releasing a STARTMAG signal. In
DELISPVC, the DelI> setting is set in % of IB.
Additional information for the STARTRISE and STARTLOW outputs of the delta are also available in
this mode. The STARTRISE and STARTLOW outputs will be sealed by the start signal. These
outputs explains the reason for the STARTMAG signal.
Seal‐in STARTLOW
logic
0.1
>
Seal‐in STARTRISE
> logic
RMS Input Delay defined by ‐0.1
DeltaT
0. 5 cycle
‐ Abs STARTMAG
> t
DelI>
IEC17000192-2-en.vsdx
IEC17000192 V2 EN-US
Figure 218: Simplified logic diagram for RMS based delta detection
Presence of the harmonics is another reason for maloperation of the delta based protection. The 2nd
harmonic blocking is an additional security feature in this function. It can be enabled by the
EnaHarm2Blk setting. If the ratio of 2nd harmonic frequency signal magnitude to the fundamental
frequency magnitude is greater than the set level harmBlkLev, then this feature will block the start
signal of the delta protection. The logic for this functionality is shown in Figure 219. The tON of 1.25
cycle is added to ensure a reliable harmonic blocking. The tOFF of 2 cycles is added to block the
operation during any sudden increase in the current load.
EnaHarm2Blk
2 cycles
t HARM2BLK
DFTInput‐2ndHarm AND
< 1.25 cycle
t
DFTInput ‐ fundamental
X
HarmBlkLev
IEC17000194-2-en.vsdx
IEC17000194 V2 EN-US
Figure 219: Simplified logic diagram for 2nd harmonic blocking logic
Present days power system network has high amount of the 3rd harmonics presence due to heavy
power electronic devices. In such case, many networks modify the settings based on the 3rd
harmonic present in the system. Delta supervision can be adapted based on the 3rd harmonic
present in the signal. When OpMode is set to DFTMag and EnStValAdap is set to is Enable, then the
setting DelI> will change based on the StValGrad setting if the third harmonic is greater than the set
level defined by the Harm3Level setting. The logic for this functionality is shown in Figure 220.
DeltaMode = DFTMag
EnStValAdap = Enable/Disable
2 cycle
t ADAPTSTLEV
rd
DFTInput ‐ 3 Harmonics AND
< 1.25 cycle
DFTInput ‐ fundamental t
X
Harm3Lev
StValGrad X T DeltaMagToComp
F
DelI>
IEC17000195-2-en.vsdx
IEC17000195 V2 EN-US
Figure 220: Simplified logic diagram for 3rd harmonic restrain of MagStVal setting
Since this mode is adaptably changing the setting, the tOFF time is mandatory to ensure the reliable
operation during any sudden change.
10.5.1 Identification
GUID-66CFBA71-B3A4-489F-B7F4-F1909B75E1DD v1
Delta supervision functions are used to quickly detect (sudden) changes in the power system. Real
input delta supervision (DELSPVC) function is a general delta function. It is used to detect the
change measured qualities over a settable time period, such as:
• Power
• Reactive power
• Temperature
• Frequency
• Power factor
DELSPVC
BLOCK START
INPUT STRISE
STLOW
DELREAL
IEC17000202-1-en.vsdx
IEC17000202 V1 EN-US
10.5.4 Signals
PID-7096-INPUTSIGNALS v1
PID-7096-OUTPUTSIGNALS v1
10.5.5 Settings
PID-7096-SETTINGS v1
Delta supervision of real input DELSPVC is a general delta function with the following features:
Seal‐in STARTLOW
Logic
>
0.1
Seal‐in STARTRISE
Logic
REALIN Delay defined by >
‐0.1
DeltaT
0. 5 cycle
‐ Abs
> t
DelStLevel
tHold
& t
>
MinStVal
IEC17000203-1-en.vsdx
IEC17000203 V1 EN-US
The setting MinStVal is used to check and release the signals for the delta supervision. In its initial
condition, during the first time a real value signal is detected (ascertained by the MinStVal
comparator), the delta detection is blocked for operation for the next 11 cycles. These 11 cycles are
used to block any unwanted operation during the initialization of the function.
The outputs STARTRISE and STARTLOW are released based on the difference (respectively above
and below) from the old value at the instant when the START signal is released.
Section 11 Control
11.1 Synchrocheck, energizing check, and synchronizing
SESRSYN IP14558-1 v4
11.1.1 Identification
M14889-1 v4
SYMBOL-M V1 EN-US
The Synchronizing function allows closing of asynchronous networks at the correct moment including
the breaker closing time, which improves the network stability.
Synchrocheck, energizing check, and synchronizing (SESRSYN) function checks that the voltages
on both sides of the circuit breaker are in synchronism, or with at least one side dead to ensure that
closing can be done safely.
SESRSYN function includes a built-in voltage selection scheme for double bus and 1½ breaker or
ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and can have different
settings.
For systems, which can run asynchronously, a synchronizing feature is also provided. The main
purpose of the synchronizing feature is to provide controlled closing of circuit breakers when two
asynchronous systems are in phase and can be connected. The synchronizing feature evaluates
voltage difference, phase angle difference, slip frequency and frequency rate of change before
issuing a controlled closing of the circuit breaker. Breaker closing time is a setting.
SESRSYN
U3PBB1* SYNOK
U3PBB2* AUTOSYOK
U3PLN1* AUTOENOK
U3PLN2* MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
B1QOPEN TSTENOK
B1QCLD USELFAIL
B2QOPEN B1SEL
B2QCLD B2SEL
LN1QOPEN LN1SEL
LN1QCLD LN2SEL
LN2QOPEN SYNPROGR
LN2QCLD SYNFAIL
UB1OK UOKSYN
UB1FF UDIFFSYN
UB2OK FRDIFSYN
UB2FF FRDIFFOK
ULN1OK FRDERIVA
ULN1FF UOKSC
ULN2OK UDIFFSC
ULN2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG INADVCLS
AENMODE UDIFFME
MENMODE FRDIFFME
PHDIFFME
UBUS
ULINE
MODEAEN
MODEMEN
IEC10000046-1-en.vsd
IEC10000046 V1 EN-US
11.1.4 Signals
PID-6724-INPUTSIGNALS v1
PID-6724-OUTPUTSIGNALS v1
11.1.5 Settings
PID-6724-SETTINGS v2
The synchrocheck feature measures the conditions across the circuit breaker and compares them to
set limits. The output for closing operation is given when all measured quantities are simultaneously
within their set limits.
The energizing check feature measures the bus and line voltages and compares them to both high
and low threshold detectors. The output is given only when the actual measured quantities match the
set conditions.
The synchronizing feature measures the conditions across the circuit breaker, and also determines
the angle change occurring during the closing delay of the circuit breaker, from the measured slip
frequency. The output is given only when all measured conditions are simultaneously within their set
limits. The closing of the output is timed to give closure at the optimal time including the time needed
for the circuit breaker and the closing circuit operation.
The voltage difference, frequency difference and phase angle difference values are measured in the
IED centrally and are available for the SESRSYN function for evaluation. By setting the phases used
for SESRSYN, with the settings SelPhaseBus1, SelPhaseBus2, SelPhaseLine1 and SelPhaseLine2,
a compensation is made automatically for the voltage amplitude difference and the phase angle
difference caused if different setting values are selected for both sides of the breaker. If needed, an
additional phase angle adjustment can be done for selected line voltage with the PhaseShift setting.
Some restrictions when using CBConfig selections 1½ bus CB, 1½ bus alt.CB and Tie
CB are described in Table 249 Such restriction are applicable only when a power
transformer is connected in the diameter and VT used for synchrocheck function is
located on the other side of the transformer.
For double bus single circuit breaker and 1½ circuit breaker arrangements, the SESRSYN function
blocks have the capability to make the necessary voltage selection. For double bus single circuit
breaker arrangements, selection of the correct voltage is made using auxiliary contacts of the bus
disconnectors. For 1½ circuit breaker arrangements, correct voltage selection is made using auxiliary
contacts of the bus disconnectors as well as the circuit breakers.
The internal logic for each function block as well as, the input and outputs, and the setting
parameters with default setting and setting ranges is described in this document. For application
related information, please refer to the application manual.
M14833-3 v5
The logic diagrams that follow illustrate the main principles of the SESRSYN function components
such as Synchrocheck, Synchronizing, Energizing check and Voltage selection, and are intended to
simplify the understanding of the function.
The function will compare the bus and line voltage values with the set values for UHighBusSC and
UHighLineSC.
If both sides are higher than the set values, the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference: FreqDiffA, FreqDiffM, PhaseDiffA,
PhaseDiffM and U DiffSC. If additional phase angle adjustment is done with the PhaseShift setting,
the adjustment factor is deducted from the line voltage before the comparison of the phase angle
values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than ±5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value FreqDiff.
Two sets of settings for frequency difference and phase angle difference are available and used for
the manual closing and autoreclose functions respectively, as required.
The inputs BLOCK and BLKSC are available for total block of the complete SESRSYN function and
selective block of the Synchrocheck function respectively. Input TSTSC will allow testing of the
function where the fulfilled conditions are connected to a separate test output.
The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions match
the set conditions for the respective output. The output signal can be delayed independently for
MANSYOK and AUTOSYOK conditions.
A number of outputs are available as information about fulfilled checking conditions. UOKSC shows
that the voltages are high, UDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows when the
voltage difference, frequency difference and phase angle difference are out of limits.
Output INADVCLS, inadvertent circuit breaker closing, indicates that the circuit breaker has been
closed at wrong phase angle by mistake. The output is activated, if the voltage conditions are fulfilled
at the same time the phase angle difference between bus and line is suddenly changed from being
larger than 60 degrees to smaller than 5 degrees.
OperationSC = On
AND TSTAUTSY
AND
invalidSelection AND
OR AUTOSYOK
AND
0-60 s
AND t
tSCA
UDiffSC 50 ms
AND t
UHighBusSC
UOKSC
AND
UHighLineSC
UDIFFSC
1
1
FRDIFFA
FreqDiffA
1
PHDIFFA
PhaseDiffA
UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
32 ms 100 ms
AND t INADVCLS
PhDiff > 60° AND
PhDiff < 5°
IEC07000114-6-en.vsdx
IEC07000114 V6 EN-US
Figure 224: Simplified logic diagram for the auto synchrocheck function
The function will compare the values for the bus and line voltage with the set values for
UHighBusSynch and UHighLineSynch, which is a supervision that the voltages are both live. Also the
voltage difference is checked to be smaller than the set value for UDiffSynch, which is a p.u value of
set voltage base values. If both sides are higher than the set values and the voltage difference
between bus and line is acceptable, the measured values are compared with the set values for
acceptable frequency FreqDiffMax and FreqDiffMin, rate of change of frequency FreqRateChange
and phase angle CloseAngleMax.
The measured frequencies between the settings for the maximum and minimum frequency will
initiate the measuring and the evaluation of the angle change to allow operation to be sent at the
right moment including the set tBreaker time. The calculation of the operation pulse sent in advance
is using the measured SlipFrequency and the set tBreaker time. To prevent incorrect closing pulses,
a maximum closing angle between bus and line is set with CloseAngleMax. To minimize the moment
stress when synchronizing near a power station, a narrower limit for CloseAngleMax needs to be
used.
When setting the value for tBreaker the following should be considered:
• The closing time of contact on a Binary Out Module (BOM) is appr.4ms and on a Static Output
Module (SOM) appr. 1ms.
• The operating time of any auxilliary relays in the closing circuit.
• Mechanical closing time of the breaker primary contacts.
The setting CloseAngleMax is only a limitation under which which combination of the SlipFrequency
and CB closing time the Synchronizing feature is capable to operate.
For example, when CloseAngleMax = 30 deg. and tBreaker = 0.1 s then the Synchronizing feature
can handle up to 0.833 Hz as shown below:
Figure 225 below shows the dependencies between tBreaker and slip frequency for the SYNOK
release with CloseAngleMax set to 15 or 30 degrees.
1000
800
15 30
600
tBreaker [ms]
400
15 30
200
30
15
15
0
Figure 225: Dependencies between tBreaker and Slip frequency with different
CloseAngleMax values
The function measures voltages on the busbar and the line to verify whether they are live or dead.
This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for bus
energizing and UHighLineEnerg and ULowLineEnerg for line energizing.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz.
The Energizing direction can be selected individually for the Manual and the Automatic functions
respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will
be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed
independently for MANENOK and AUTOENOK conditions. The Energizing direction can also be
selected by an integer input AENMODE respective MENMODE, which for example, can be
connected to a Binary to Integer function block (B16I). Integers supplied shall be 1=Off, 2=DLLB,
3=DBLL and 4= Both. Not connected input will mean that the setting is done from Parameter Setting
tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes are
0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete SESRSYN function
respective block of the Energizing check function. TSTENERG will allow testing of the function where
the fulfilled conditions are connected to a separate test output.
manEnergOpenBays
MANENOK
OR
TSTENERG
BLKENERG
OR
BLOCK
selectedFuseOK
UHighBusEnerg
DLLB 50ms tManEnerg
AND
OR t t
AND
OR
ULowLineEnerg AND
ManEnerg BOTH
ULowBusEnerg
DBLL
AND
UHighLineEnerg
TSTENOK
ManEnergDBDL AND AND
UMaxEnerg
fBus and fLine ±5 Hz
IEC14000031-2-en.vsdx
IEC14000031 V2 EN-US
TSTENERG
BLKENERG
OR
BLOCK
selectedFuseOK
UHighBusEnerg
DLLB 50ms tAutoEnerg
AND
OR t t
AND OR
AUTOENOK
ULowLineEnerg AND
BOTH
AutoEnerg
ULowBusEnerg
DBLL
AND
UHighLineEnerg
TSTENOK
UMaxEnerg AND
IEC14000030-2-en.vsdx
IEC14000030 V2 EN-US
BLKENERG
BLOCK OR manEnergOpenBays
AND
ManEnerg
1½ bus CB
CBConfig AND
B1QOPEN
LN1QOPEN AND
OR
B1QCLD
B2QOPEN
AND
LN2QOPEN
B2QCLD
AND
Tie CB
AND
AND
OR
AND
IEC14000032-1-en.vsd
IEC14000032 V1 EN-US
The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage and the ULN1OK/
ULN2OK and ULN1FF/ULN2FF inputs are related to the line voltage. Configure them to the binary
input or function outputs that indicate the status of the external fuse failure of the busbar and line
voltages. In the event of a fuse failure, the energizing check function is blocked. The synchronizing
and the synchrocheck function requires full voltage on both sides, thus no blocking at fuse failure is
needed.
The voltage selection type to be used is set with the parameter CBConfig.
If No voltage sel. is set the voltages used will be U-Line1 and U-Bus1. This setting is also used in the
case when external voltage selection is provided. Fuse failure supervision for the used inputs must
also be connected.
The voltage selection function, selected voltages, and fuse conditions are used for the
Synchronizing, Synchrocheck and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but, it is also possible to use an inverter for one of the
positions.
If breaker or disconnector positions not are available for deciding if energizing is allowed, it is
considered to be allowed to manually energize. This is only allowed for manual energizing in 1½
breaker and Tie breaker arrangements. Manual energization of a completely open diameter in 1 1/2
CB switchgear is allowed by internal logic.
Voltage selection for a single circuit breaker with double busbars M14838-3 v11
The setting CBConfig selected for Double Bus activates the voltage selection for single CB and
double busbars. This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and bus
2 voltages. If the disconnector connected to bus 1 is closed and the disconnector connected to bus 2
is opened or both disconnectors are closed, the bus 1 voltage is used. All other combinations use the
bus 2 voltage. The outputs B1SEL and B2SEL respectively indicate the selected Bus voltage.
The function checks the fuse failure signals for bus 1, bus 2 and line voltage transformers. Inputs
UB1OK-UB1FF supervise the MCB for Bus 1 and UB2OK-UB2FF supervises the MCB for Bus 2.
ULN1OK and ULN1FF supervises the MCB for the Line voltage transformer. The inputs fail (FF) or
healthy (OK) can alternatively be used dependent on the available signal. If a VT failure is detected
in the selected voltage source an output signal USELFAIL is set. This output signal is true if the
selected bus or line voltages have a VT failure. This output as well as the function can be blocked
with the input signal BLOCK. The function logic diagram is shown in figure 229.
B1QOPEN
B1SEL
B1QCLD AND
B2QOPEN B2SEL
AND
1
B2QCLD
invalidSelection
AND
bus1Voltage busVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR selectedFuseOK
AND
UB2OK AND
UB2FF OR USELFAIL
AND
ULN1OK
ULN1FF OR
BLOCK
en05000779-2.vsd
IEC05000779 V2 EN-US
Figure 229: Logic diagram for the voltage selection function of a single circuit breaker with double busbars
With the setting parameter CBConfig the selection of actual CB location in the 1½ circuit breaker
switchgear is done. The settings are: 1½ bus CB, 1½ alt. bus CB or Tie CB.
This voltage selection function uses the binary inputs from the disconnectors and circuit breakers
auxiliary contacts to select the right voltage for the SESRSYN function. For the bus circuit breaker
one side of the circuit breaker is connected to the busbar and the other side is connected either to
line 1, line 2 or the other busbar depending on the selection of voltage circuit.
The tie circuit breaker is connected either to bus 1 or line 1 voltage on one side and the other side is
connected either to bus 2 or line 2 voltage. Four different output combinations are possible, bus to
bus, bus to line, line to bus and line to line.
Some restrictions when using CBConfig selections 1½ bus CB, 1½ bus alt.CB and Tie
CB are described in Table 249. Such restriction are applicable only when a power
transformer is connected in the diameter and VT used for synchrocheck function is
located on the other side of the transformer.
Table 249: Limitations for VT selection regarding selected value for CBConfig
CBConfig setting Possible closing Used GblBaseSel settings PhaseShift setting Conclusion
between has impact on
1½ bus CB Bus1 - Line1 GblBaseSelBus => Bus1 Line1
GblBaseSelLine => Line1
Bus1 - Line2 GblBaseSelBus => Bus1 Line2
GblBaseSelLine => Line2
Bus1 - Bus2 GblBaseSelBus => Bus1 No impact Bus1 and Bus2 must have
GblBaseSelBus => Bus2 same base voltage.
GblBaseSelLine has no impact PhaseShift setting has no
impact.
1½ bus alt.CB Bus2 - Line2 GblBaseSelBus => Bus2 Line2
GblBaseSelLine => Line2
Bus2 - Line1 GblBaseSelBus => Bus2 Line1
GblBaseSelLine => Line1
Bus2 - Bus1 GblBaseSelBus => Bus2 No impact Bus2 and Bus1 must have
GblBaseSelBus => Bus1 same base voltage.
GblBaseSelLine has no impact PhaseShift setting has no
impact.
Table continues on next page
CBConfig setting Possible closing Used GblBaseSel settings PhaseShift setting Conclusion
between has impact on
Tie CB Bus1 - Line2 GblBaseSelBus => Bus1 Line2
GblBaseSelLine => Line2
Bus1 - Bus2 GblBaseSelBus => Bus1 No impact Bus1 and Bus2 must have
GblBaseSelBus => Bus2 same base voltage.
GblBaseSelLine has no impact PhaseShift setting has no
impact.
Bus2 - Line1 GblBaseSelBus => Bus2 Line1
GblBaseSelLine => Line1
Line1 - Line2 GblBaseSelLine => Line1 Line2 Line1 and Line2 must have
GblBaseSelLine => Line2 same base voltage.
GblBaseSelBus has no affect
The function also checks the fuse failure signals for bus 1, bus 2, line 1 and line 2. If a VT failure is
detected in the selected voltage an output signal USELFAIL is set. This output signal is true if the
selected bus or line voltages have a MCB trip. This output as well as the function can be blocked with
the input signal BLOCK. The function block diagram for the voltage selection of a bus circuit breaker
is shown in figure 230 and for the tie circuit breaker in figure 231.
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1QOPEN
LN2SEL
B1QCLD AND AND
B2SEL
OR
LN2QOPEN
AND invalidSelection
LN2QCLD AND
AND
B2QOPEN
B2QCLD AND
line1Voltage lineVoltage
line2Voltage
bus2Voltage
UB1OK
UB1FF OR
OR selectedFuseOK
UB2OK AND
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000780-2.vsd
IEC05000780 V2 EN-US
Figure 230: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2
breaker arrangement
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1SEL
1
B1QOPEN AND
AND
B1QCLD AND
line1Voltage busVoltage
bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
invalidSelection
OR
B2QOPEN AND
AND
B2QCLD AND
line2Voltage lineVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR selectedFuseOK
UB2OK AND
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000781-2.vsd
IEC05000781 V2 EN-US
Figure 231: Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2
breaker arrangement.
11.2.1 Identification
M14890-1 v7
Up to five reclosing shots can be performed. The first shot can be single-, two-, and /or three-phase
depending on the type of the fault and the selected auto reclosing mode.
Several auto reclosing functions can be provided for multi-breaker arrangements. A priority circuit
allows one circuit breaker to reclose first and the second will only close if the fault proved to be
transient.
Each auto reclosing function can be configured to co-operate with the synchrocheck function.
SMBRREC
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
STARTHS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
CBCLOSED PREP3P
PLCLOST CLOSECB
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
ABORTED
SYNCFAIL
INHIBOUT
IEC06000189-3-en.vsd
IEC06000189 V3 EN-US
11.2.4 Signals
PID-6796-INPUTSIGNALS v2
PID-6796-OUTPUTSIGNALS v2
11.2.5 Settings
PID-6797-SETTINGS v2
Before describing the auto reclosing function it is first necessary to define the following terminology:
The auto reclosing function can be in one of the following five statuses:
“Inactive” GUID-BF80C969-FCBE-4CAB-BF71-9590A2DB433C v1
The auto recloser is in “inactive” status when the following conditions are fulfilled:
The function will not react on any start from protection trips while in “inactive” status and no
automatic reclosing is possible.
“Ready” GUID-04F154EC-E236-40A4-A3E0-7624A2F6B132 v1
The function is in “ready” status when the following conditions are fulfilled:
Start can be initiated by either protection trip command or circuit breaker position change. The
second starting alternative is only possible when enabled by a setting.
In “in progress” status the dead time starts and the status ceases when the dead time expires. Then
circuit breaker close command is given and the function changes its state into the "reclaim time"
status.
A new start signal during “reclaim time” status forces the function to proceed to next shot and change
state into “in progress” status, as long as the last shot is not reached.
“Blocked” GUID-9C38B1BE-3772-49AE-B4B3-391CE15D5CD2 v1
The function is in “blocked” status when an external blocking signal exists. No auto reclosing is
possible in “blocked” status. Only an external signal for cancellation of the blocking can cancel this
status.
From Table 255 below it is possible to see which status transitions are possible. When the auto
recloser is for instance in “inactive” status only two transition are possible:
• transition to “ready” status when the circuit breaker is ready and closed
• transition to “blocked” status by external blocking
The empty cells in the table indicate that no such transition is possible.
To comprehend this chapter better it is essential to first read chapters “Status descriptions“ and
“Description of the status transition” carefully.
The logic for most of the explained inputs, outputs, settings and internal signals, described in this
chapter, is shown in Figure 238. Other figures mentioned are in some way connected or cooperate
with Figure 238.
Before going into details in the following chapters, the short functional/feature summary is given
below.
The auto reclosing function is multi-shot capable and suitable for both high-speed and delayed auto
reclosing. The function can be set to perform a single-shot, two-shot, three-shot, four-shot or five-
shot reclosing sequence. Dead times for all shots can be set independently.
• protection operation
• circuit breaker operation (when enabled by setting StartByCBOpen=On)
At the end of the dead time, provided that other conditions are fulfilled, a circuit breaker close
command signal is given. The other conditions to be fulfilled are:
• input signal SYNC is true, which typically indicates that power systems on the two sides of the
circuit breaker are in synchronism
• and that input signal CBREADY is true, typically indicating that circuit breaker springs are
charged.
If a circuit breaker close command is given successfully at the end of the dead time, a reclaim time
starts. If the circuit breaker does not trip again within reclaim time, the auto recloser indicates a
successful reclosing and resets into "ready" status. If the protection trips again during the reclaim
time, the sequence advances to the next shot. If all reclosing attempts have been made and the
circuit breaker does not remain closed, the auto recloser indicates an unsuccessful reclosing. Each
time a breaker close command is given, a shot counter is incremented by one.
If the input conditions CBCLOSED and CBREADY, from the circuit breaker, are not fulfilled while
switching the auto recloser on, the auto recloser changes into “inactive” status and the output
SETON is activated (high). The auto recloser is not ready for auto reclosing. If, however, the circuit
breaker is closed and ready when switching the auto recloser on, the output READY is activated and
the function is prepared to start the auto reclosing cycle. The circuit breaker must have been closed
for at least the set value for setting tCBClosedMin before a start is accepted. The logic for Off or On
operation is shown in Figure 233.
Operation
AND OR S SETON
ExternalCtrl
R
ON AND
OR
OFF AND
StartByCBOpen
START AND
STARTHS AND
100ms OR
AND OR initiate
100ms
AND
TRSOTF
startThermal AND
CBReady
120ms
CBREADY OR S
t AND start
AND
AND
tCBClosedMin R
CBCLOSED
t
cbClosed AND
count0 AND READY
inhibit
OR
INHIBIT
IEC16000153-1-en.vsdx
IEC16000153 V1 EN-US
When a valid integer is connected to the input MODEINT the selected setting ARMode will be invalid
and the MODEINT input value will be used instead. The selected mode is reported as an integer on
the MODE output.
Please note that tripping mode of the IED is defined in Trip Logic function block SMPPTRC. For
example for two-phase faults either 2ph or 3ph tripping and consequent auto reclosing can be
selected
Table 256: Type of reclosing shots at different settings of “ARMode” or integer inputs to "MODEINT"
MODEINT (Integer) ARMode Type of fault 1st shot 2nd - 5th shot
1ph 3ph 3ph
1 3ph 2ph 3ph 3ph
3ph 3ph 3ph
1ph 1ph 3ph
2 1/2/3ph 2ph 2ph 3ph
3ph 3ph 3ph
Table continues on next page
MODEINT (Integer) ARMode Type of fault 1st shot 2nd - 5th shot
1ph 1ph 3ph
3 1/2ph 2ph 2ph 3ph
3ph - -
1ph 1ph 3ph
4 1ph+1x2ph 2ph 2ph -
3ph - -
1ph 1ph 3ph
5 1/2ph+1x3ph 2ph 2ph 3ph
3ph 3ph –
1ph 1ph 3ph
6 1ph+1x2/3ph 2ph 2ph -
3ph 3ph -
The first shot differs from the other shots by the possibility to extend its dead time and to utilize up to
four different time settings for it.
For the first shot, there are separate settings for single-, two- and three-phase dead times, t1 1Ph, t1
2Ph and t1 3Ph. If only the START input signal is applied, and an auto-reclosing program with single-
phase reclosing is selected, the auto reclosing dead time t1 1Ph will be used. If one of the TR2P or
TR3P inputs is activated in in parallel with the START input, the auto reclosing dead time for either
two-phase or three-phase auto reclosing is used.
There is also a separate time setting facility for three-phase high-speed auto reclosing, t1 3PhHS.
This high-speed auto reclosing is activated by the STARTHS input and is used when auto reclosing
is done without the requirement of synchrocheck conditions to be fulfilled. The high-speed dead time
shall be set shorter than normal first shot three-phase dead time. Note that if high-speed three-phase
shot is not successful the auto reclosing sequence will continue with shot two.
A time extension delay, tExtended t1, can be added to the dead time delay for the first shot. It is
intended to come into use if the communication channel for permissive line protection is lost. In a
case like this there can be a significant time difference in fault clearance at the two line ends, where
a longer auto reclosing dead time can be useful. This time extension is controlled by the setting
Extended t1 and the PLCLOST input. The logic for control of extended dead time is shown in
Figure234 and Figure 238. Time extension delay is not possible to add to the three-phase high-
speed auto reclosing dead time, t1 3PhHS.
Extended t1
AND extendTime
PLCLOST
OR
initiate AND
AND
start
IEC16000155-1-en.vsdx
IEC16000155 V1 EN-US
The usual way to start a reclosing sequence, is to start it when a selective line protection tripping has
occurred, by applying a signal to the START input. If the auto reclosing mode with only three-phase
reclosing is selected, activation of the START input will start the three-phase dead timer. When
alternatively the START input signal is applied, and an auto reclosing mode with single-phase
reclosing is selected, the auto reclosing dead time for single-phase is used. However if one of the
TR2P or TR3P inputs is activated in connection with the START input, the auto reclosing dead time
for two-phase or three-phase auto reclosing is used. The STARTHS input (start high-speed
reclosing) can also be used to start a separate, high-speed three-phase dead time in which case the
synchrocheck condition will be bypassed.
To start a new auto reclosing cycle, a number of conditions of input signals need to be fulfilled. The
inputs are:
• CBREADY: circuit breaker is ready for a reclosing cycle, for example, charged operating gear.
• CBCLOSED: to ensure that the circuit breaker was closed when the line fault occurred and start
was applied. The CBCLOSED condition must be present for more that the settable time
tCBClosedMin.
• no BLKON or INHIBIT signal is present.
When the start has been accepted, the internal signals “start” and “initiate” are set. The internal
signal “start” is latched and the internal signal “initiate” follows the length of the signal on the START
input. The latched signal “start” can be interrupted by a signal to the INHIBIT input.
The auto recloser is normally started by selective tripping. It is either a zone 1 or communication
aided trip, or a general trip. If the general trip is used the auto recloser must be blocked, via the
INHIBIT input, from all back-up tripping. The breaker failure function must always be connected to
inhibit the auto recloser. START makes a first shot with synchrocheck conditions to be fulfilled,
STARTHS makes its first shot without any fulfilled synchrocheck conditions. The TRSOTF “trip by
switch onto fault” input starts shots 2 to 5. It may be connected to the “switch onto fault” output of line
protection if multi-shot auto reclosing is used.
In normal circumstances, the auto recloser is started with a protection trip command which resets
quickly due to fault clearing. In case the start signal lasts for a too long time, the user can set a
maximum start pulse duration tLongStartInh. This start pulse duration time is controlled by setting
LongStartInhib. When the start pulse duration signal is longer than the set maximum start pulse
duration, the auto reclosing sequence will be interrupted in the same way as if the INHIBIT input was
set to true. The logic for the control of long start pulse duration is shown in Figure 235.
LongStartInhib
start
AND
tLongStartInh
initiate
t
longStartInhibit
OR
Extended t1 AND
t13PhExtTimeout
IEC16000154-1-en.vsdx
IEC16000154 V1 EN-US
If the user wants to start the auto recloser from circuit breaker open position instead of the protection
trip signals, this starting mode is selected by enabling a setting StartByCBOpen. Typically, a circuit
breaker auxiliary contact of type normally open (NO) shall be connected to the CBCLOSED and
START inputs. Then the circuit breaker status change from closed to open will generate an auto
reclosing start pulse of limited length (100ms) subject to the usual auto recloser checks. The auto
reclosing sequence continues then as usual. Signals from manual tripping and other functions, which
shall prevent auto reclosing, need to be connected to the INHIBIT input. The logic for start from
circuit breaker open position is shown in Figure 233.
The function can also be set to proceed to the next reclosing shot (if selected) even if the external
start signal is not received but the breaker is still not closed. The user can set a required time delay
for the auto recloser to proceed without a new start with setting tAutoContWait. Also the
synchrocheck conditions not fulfilled will also make the auto recloser to proceed to next shot. This
automatic proceeding of shots is controlled by setting AutoContinue and is shown in figure 236.
tAutoContWait
t
AND
commandCloseCB
AND S
R
OR
AND
OR
cbClosed AND autoInitiate
synchroCheckOK
AutoContinue
IEC16000156-1-en.vsdx
IEC16000156 V1 EN-US
The RESET input is used to reset the auto recloser to its initial conditions. When initial starting
conditions are fulfilled again, after a reset, the auto recloser is ready for a new reclosing sequence.
If the INHIBIT input is activated it is reported on the INHIBOUT output. To ensure reliable interruption
and temporary blocking of the auto recloser a reset time delay tInhibit is used. The auto recloser will
be blocked the time set in tInhibit after the deactivation of the INHIBIT input. The following internal
inhibit signals are also affected by the setting tInhibit:
• inhibitWaitForMaster: after expiration of the tWaitForMaster time for the WAIT input to reset, the
reclosing cycle of the slave is inhibited.
• longStartInhibit: if start pulse duration is longer than the tLongStartInh time, the reclosing cycle
is inhibited.
The ABORTED output indicates that the auto recloser is inhibited while it was in one of following
internal states:
The SYNCFAIL output indicates that the auto recloser is inhibited because the synchrocheck or
energizing check condition has not been fulfilled within the set time interval, tSync. The ABORTED
output will also be activated.
The behavior of the functionality described above is described in Table 257 and Table 258 below.
Table 257: BLKON, BLKOFF, RESET, INHIBIT and SYNC behavior when the function is in "ready" status
Table 258: BLKON, BLKOFF, RESET, INHIBIT and SYNC behavior when the function is in "in progress" status
By choosing CBReadyType = CO (circuit breaker ready for a Close-Open sequence) the readiness of
the circuit breaker is also checked before issuing the circuit breaker closing command. If the circuit
breaker has a readiness contact of type CBReadyType = OCO (circuit breaker ready for an Open-
Close-Open sequence) this condition may not be fulfilled during the dead time and at the moment of
auto reclosure. The Open-Close-Open condition was however checked at the start of the auto
reclosing cycle and it is then likely that the circuit breaker is prepared for a Close-Open sequence.
The reclaim timer, tReclaim, is started each time a circuit breaker closing command is given. If no
start occurs within this time, the auto recloser will reset. A new start received in “reclaim time” status
will move the auto recloser to “in progress” status and next shot as long as the final shot is not
reached. The auto recloser will reset and enter “inactive” status if a new start is given during the final
reclaim time. This will also happen if the circuit breaker has not been closed within set time interval
tUnsucCl after each circuit breaker close command. The latter case is controlled by setting
UnsucClByCBChk. The auto reclosing sequence is considered unsuccessful for both above cases
and the UNSUCCL output is activated.
If the circuit breaker closing command is given and the circuit breaker is closed within the set time
interval tUnsucCl, the SUCCL output is activated after the set time interval tSuccessful. The logic for
successful and unsuccessful reclosing indication is shown in Figure 237.
initiate
reclaimTimeStarted AND
OR
AND UNSUCCL
OR tUnsucCl S
AND t unsuccessful
cbClosed
AND
UnsucClByCBChk
count0
OR R
tUnsucCl tSuccessful
AND SUCCL
commandCloseCB t AND S t
R
OR
IEC16000157-1-en.vsdx
IEC16000157 V1 EN-US
400
ZONESTEP AND
Control
MODEINT MODE
Section 11
start ARMode
initiate inProgress
IEC16000158 V1 EN-US
TR2P and INPROGR
Figure 238:
TR3P NoOfShots 1PT1
startThermal OR 2PT1
selection 3PT1
Dead time
reclaimTimeStarted 3PT2
tExtended t1 tExtended t1 is 3PT3
extendTime added to t1 1Ph inhibitThermalStart 3PT4
t
or t1 2ph or t1 3Ph 3PT5
SKIPHS Skips high-speed shot (t1 3PhHS) and PREP3P
continues with delayed shot (t1 3Ph) AND tReclaim PERMIT1P
AND t 1
t1 1Ph OR
t1 2Ph OR
Dead t1 3PhHS AND
t13PhExtTimeout
time inhibit
tSync
SYNC AND t SYNCFAIL
inProgress AND
reclaimTimeStarted OR
CBReadyType wait AND ABORTED
CB OR
AND
readiness
AND inhibitWaitForMaster tInhibit
CBReady check t
OR
longStartInhibit count0
OR Counter COUNT1P
inhibitThermalStart COUNT2P
CutPulse inProgress COUNT3P1
AND Set COUNT3P2
OR COUNT3P3
OR COUNT3P4
AND
AND COUNT3P5
Reset COUNTAR
tPulse
Follow CB CLOSECB
OR
RSTCOUNT
RESET
BLKON
BLKOFF
INHIBIT INHIBOUT
IEC16000158-1-en.vsdx
A number of outputs from the function keeps track of the actual state in the auto reclosing sequence.
Technical manual
1MRK506382-UEN Rev. K
The possible statuses are described in Table 259 below. Their mapping to output signals and their
corresponding IEC 61850 integer value is also given in the table. Mapping from IEC 61850 Ed2
standard is also shown for the AutoRecSt data object.
Table 259: Auto reclosing status reported by IEC 61850 in priority order
Data object AutoRecSt Description for mapped Mapped output signals / Description in IEC 61850
value signals Comments Ed2
1 Ready READY Ready
2 In Progress INPROGR In Progress
3 Successful SUCCL Successful
4 Waiting for trip
5 Trip issued by protection
6 Fault disappeared
7 Wait to complete CLOSECB Wait to complete
8 Circuit breaker closed
9 Cycle unsuccessful UNSUCCL
10
-1 Aborted by synchrocheck SYNCFAIL
fail
11 Aborted ABORTED Aborted
-2 Set On, Not Ready SETON = 1, READY = 0,
ACTIVE = 0, SUCCL = 0,
UNSUCC = 0, INPROG = 0
-3 Set Off, Not Ready SETON = 0
-99 Others Means that auto recloser is
in transitional state, that
should not be visible in
steady state situation
There are several counters within the function. One for each shot and type of fault and one overall
counter for total number of circuit breaker closing commands. All counters can be reset to zero using
either the HMI command or the RSTCOUNT input or by an IEC 61850 command.
The circuit breaker closing command, CLOSECB output is a pulse with settable duration by setting
tPulse. For circuit breakers without anti-pumping function, close pulse cutting can be used. This is
controlled by the setting CutPulse. In case of a new auto recloser start pulse, the breaker closing
command pulse is cut (interrupted). The minimum duration of the closing pulse is always 50ms.
The prepare three-phase trip, PREP3P output is usually connected to the trip function SMPPTRC to
force the coming trip to be three-phase. If the auto recloser cannot make a single-phase or two-
phase reclosing, the start from the trip function should be three-phase.
The permit single-phase trip, PERMIT1P output is the inverse of the PREP3P output. It can be
connected to a binary output relay for connection to external protection or trip relays. In case of a
total loss of auxiliary power, the output relay drops and does not allow single-phase trip.
The setting Follow CB can be used to prevent close command to be issued when dead time has
expired and circuit breaker is already closed (e.g. by manual close command). If a new start is
received after the dead time expiration the auto recloser will advance to next shot.
If input SKIPHS is activated, and simultaneously STARTHS input is initiated then actually normal
three-phase shot one with dead time "t1 3Ph" will be started.
The ZONESTEP input is used when coordination between local auto reclosers and down stream
auto reclosers is needed. If function is in "ready" status and this input is activated the auto recloser
increases its actual shot number by one and enters directly the “reclaim time” status for shot one. If a
start is received during the reclaim time, the function will proceed with the next shot (e.g. starting
dead time for shot two). Every new pulse on the ZONESTEP input will further increase the shot
number. Note that ZONESTEP input will have such effect only if local start signal was not activated,
as shown in Figure 238. The setting NoOfShots limits of course the maximum number of available
shots. This functionality is controlled by the setting ZoneSeqCoord.
By activating the THOLHOLD input the auto recloser is set on hold. It can be connected to a thermal
overload protection trip signal which resets only when the thermal content has fallen to an acceptable
level, for example, 70%. As long as the signal is high, indicating that the line is hot, the auto reclosing
is halted. When the signal resets, a reclosing cycle will continue. This may cause a considerable
delay between start of the auto recloser and the breaker closing command. An external logic limiting
this time and activating the INHIBIT input can be used. The THOLHOLD input can also be used to
set the auto recloser on hold, for longer or shorter time periods, for other purposes if for some reason
the auto recloser needs to be halted. The logic for thermal protection hold is shown in Figure 239.
start inhibitThermalStart
THOLHOLD AND AND S
q-1 20ms
startThermal
AND
inhibit OR
IEC16000159-1-en.vsdx
IEC16000159 V1 EN-US
When activating the WAIT input, in the auto recloser set as slave, every dead timer is changed to the
value of setting tSlaveDeadTime and holds back the auto reclosing operation. When the WAIT input
is reset at the time of a successful reclosing of the first circuit breaker, the slave is released to
continue the reclosing sequence after the set tSlaveDeadTime. The reason for shortening the time,
for the normal dead timers with the value of tSlaveDeadTime, is to give the slave permission to react
almost immediately when the WAIT input resets. The mimimum settable time for tSlaveDeadTime is
0.1sec because both master and slave should not send the breaker closing command at the same
time. The slave should take the duration of the breaker closing time of the master into consideration
before sending the breaker closing command. A setting tWaitForMaster sets a maximum wait time
for the WAIT input to reset. If the wait time expires, the reclosing cycle of the slave is inhibited. The
maximum wait time, tWaitForMaster for the second circuit breaker is set longer than the auto
reclosing dead time plus a margin for synchrocheck conditions to be fulfilled for the first circuit
breaker. Typical setting is 2sec. In single circuit breaker applications, the setting Priority is set to
None. The logic for master-slave is shown in Figure 240.
Master:
High (Master)
Priority
WFMASTER
inProgress AND
unsuccessful OR
Slave:
Low (Slave)
Priority
inhibitWaitForMaster
AND
start tWaitForMaster
AND t
WAIT
wait
AND slaveDeadTime
AND S
inhibit
commandCloseCB R
OR
reclaimTimeStarted
IEC16000160-1-en.vsdx
IEC16000160 V1 EN-US
Some examples of the timing of internal and external signals at typical transient and permanent faults
are shown below in Figure 241 to 244.
Fault
CBCLOSED
Closed Open Closed
CBREADY
START
SYNC
tReclaim
READY
INPROGR
1PT1
ACTIVE
PREP3P
SUCCL
Time
IEC04000196-4-en.vsd
IEC04000196 V4 EN-US
Fault
CBCLOSED Open
Closed Open C C
CBREADY
START
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReclaim
PREP3P
UNSUCCL
Time
IEC04000197-3-en.vsd
IEC04000197 V3 EN-US
Fault
CBCLOSED
CBREADY
START
TR3P
SYNC
READY
INPROGR
1PT1
3PT1
3PT2
CLOSECB t1 1Ph
PREP3P
UNSUCCL tReclaim
IEC04000198-3-en.vsd
IEC04000198 V3 EN-US
Fault
CBCLOSED
CBREADY
START
TR3P
SYNC
READY
INPROGR
1PT1
3PT1
3PT2
t2 3Ph
CLOSECB t1 1Ph
PREP3P
UNSUCCL tReclaim
IEC04000199-3-en.vsd
IEC04000199 V3 EN-US
Figure 244: Permanent single-phase fault, single-phase trip, two-shot reclosing, ARMode=1ph
+ 1*2ph
The interlocking functionality blocks the possibility to operate high-voltage switching devices, for
instance when a disconnector is under load, in order to prevent material damage and/or accidental
human injury.
Each control IED has interlocking functions for different switchyard arrangements, each handling the
interlocking of one bay. The interlocking functionality in each IED is not dependent on any central
function. For the station-wide interlocking, the IEDs communicate via the station bus or by using hard
wired binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the system at any given
time.
The interlocking function consists of software modules located in each control IED. The function is
distributed and not dependent on any central function. Communication between modules in different
bays is performed via the station bus.
The reservation function (see section "Functionality") is used to ensure that HV apparatuses that
might affect the interlock are blocked during the time gap, which arises between position updates.
This can be done by means of the communication system, reserving all HV apparatuses that might
influence the interlocking condition of the intended operation. The reservation is maintained until the
operation is performed.
After the selection and reservation of an apparatus, the function has complete data on the status of
all apparatuses in the switchyard that are affected by the selection. Other operators cannot interfere
with the reserved apparatus or the status of switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules distributed in the
control IEDs. Each module contains the interlocking logic for a bay. The interlocking logic in a module
is different, depending on the bay function and the switchyard arrangements, that is, double-breaker
or 1 1/2 breaker bays have different modules. Specific interlocking conditions and connections
between standard interlocking modules are performed with an engineering tool. Bay-level interlocking
signals can include the following kind of information:
The interlocking module is connected to the surrounding functions within a bay as shown in figure
245.
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI
other bays SXSWI
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module
Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI
IEC04000526 V1 EN-US
• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
Station bus
Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn
...
WA1 not earthed WA1 not earthed
WA2 not earthed WA2 not earthed WA1 and WA2 interconn
WA1 and WA2 interconn WA1 and WA2 interconn in other bay
..
WA1
WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2
QB9 QB9
en05000494.vsd
IEC05000494 V1 EN-US
On the local HMI an override function exists, which can be used to bypass the interlocking function in
cases where not all the data required for the condition is valid.
• The interlocking conditions for opening or closing of disconnectors and earthing switches are
always identical.
• Earthing switches on the line feeder end, for example, rapid earthing switches, are normally
interlocked only with reference to the conditions in the bay where they are located, not with
reference to switches on the other side of the line. So a line voltage indication may be included
into line interlocking modules. If there is no line voltage supervision within the bay, then the
appropriate inputs must be set to no voltage, and the operator must consider this when
operating.
• Earthing switches can only be operated on isolated sections for example, without load/voltage.
Circuit breaker contacts cannot be used to isolate a section, that is, the status of the circuit
breaker is irrelevant as far as the earthing switch operation is concerned.
• Disconnectors cannot break power current or connect different voltage systems. Disconnectors
in series with a circuit breaker can only be operated if the circuit breaker is open, or if the
disconnectors operate in parallel with other closed connections. Other disconnectors can be
operated if one side is completely isolated, or if the disconnectors operate in parallel to other
closed connections, or if they are earthed on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its bay or additionally
in a transformer bay against the disconnectors and earthing switch on the other side of the
transformer, if there is no disconnector between CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in
progress.
To make the implementation of the interlocking function easier, a number of standardized and tested
software interlocking modules containing logic for the interlocking conditions are available:
The interlocking conditions can be altered, to meet the customer specific requirements, by adding
configurable logic by means of the graphical configuration tool PCM600. The inputs Qx_EXy on the
interlocking modules are used to add these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer of
information from other bays. Required signals with designations ending in TR are intended for
transfer to other bays.
11.3.3.1 Identification
GUID-3EC5D7F1-FDA0-4F0E-9391-08D357689E0C v3
The Logical node for interlocking SCILO function is used to enable a switching operation if the
interlocking conditions permit. SCILO function itself does not provide any interlocking functionality.
The interlocking conditions are generated in separate function blocks containing the interlocking
logic.
SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
IEC05000359-2-en.vsd
IEC05000359 V2 EN-US
11.3.3.4 Signals
PID-3487-INPUTSIGNALS v7
PID-3487-OUTPUTSIGNALS v7
The function contains logic to enable the open and close commands respectively if the interlocking
conditions are fulfilled. That means also, if the switch has a defined end position for example, open,
then the appropriate enable signal (in this case EN_OPEN) is false. The enable signals EN_OPEN
and EN_CLOSE can be true at the same time only in the intermediate and bad position state and if
they are enabled by the interlocking function. The position inputs come from the logical nodes Circuit
breaker/Circuit switch (SXCBR/SXSWI) and the enable signals come from the interlocking logic. The
outputs are connected to the logical node Switch controller (SCSWI). One instance per switching
device is needed.
POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&
OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd
IEC04000525 V1 EN-US
11.3.4.1 Identification
GUID-F3CBAFDC-3723-429F-9183-45229A6F0A12 v3
The interlocking for busbar earthing switch (BB_ES) function is used for one busbar earthing switch
on any busbar parts according to figure 249.
QC
en04000504.vsd
IEC04000504 V1 EN-US
BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB
IEC05000347-2-en.vsd
IEC05000347 V2 EN-US
BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1
QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd
IEC04000546 V1 EN-US
11.3.4.5 Signals
PID-3494-INPUTSIGNALS v10
PID-3494-OUTPUTSIGNALS v10
11.3.5.1 Identification
GUID-BEA26EA4-F402-4385-9238-1361E862D987 v3
The interlocking for line bay (ABC_LINE) function is used for a line connected to a double busbar
arrangement with a transfer busbar according to figure 251. The function can also be used for a
double busbar arrangement without transfer busbar or a single busbar arrangement with/without
transfer busbar.
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB7
QC1
QA1
QC2
QB9
QC9
en04000478.vsd
IEC04000478 V1 EN-US
ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB9_OP QB9REL
QB9_CL QB9ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QB7_OP QB7REL
QB7_CL QB7ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC9_OP QC9REL
QC9_CL QC9ITL
QC11_OP QB1OPTR
QC11_CL QB1CLTR
QC21_OP QB2OPTR
QC21_CL QB2CLTR
QC71_OP QB7OPTR
QC71_CL QB7CLTR
BB7_D_OP QB12OPTR
BC_12_CL QB12CLTR
BC_17_OP VPQB1TR
BC_17_CL VPQB2TR
BC_27_OP VPQB7TR
BC_27_CL VPQB12TR
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
IEC05000357-2-en.vsd
IEC05000357 V2 EN-US
ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2
en04000527.vsd
IEC04000527 V1 EN-US
VPQA1 QB1REL
& ³1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
en04000528.vsd
IEC04000528 V1 EN-US
VPQA1 QB2REL
& ³1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd
IEC04000529 V1 EN-US
VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2
IEC04000530 V1 EN-US
VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd
IEC04000531 V1 EN-US
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd
IEC04000532 V1 EN-US
11.3.5.5 Signals
PID-3509-INPUTSIGNALS v10
PID-3509-OUTPUTSIGNALS v10
11.3.6.1 Identification
GUID-AD839CAA-531B-43BC-B508-39AED3D0A97D v3
The interlocking for transformer bay (AB_TRAFO) function is used for a transformer bay connected
to a double busbar arrangement according to figure 253. The function is used when there is no
disconnector between circuit breaker and transformer. Otherwise, the interlocking for line bay
(ABC_LINE) function can be used. This function can also be used in single busbar arrangements.
WA1 (A)
WA2 (B)
QB1 QB2
QC1
QA1
AB_TRAFO
QC2
QC3
QA2
QA2 and QC4 are not
QC4 used in this interlocking
QB3 QB4
en04000515.vsd
IEC04000515 V1 EN-US
AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QB3_OP QB1OPTR
QB3_CL QB1CLTR
QB4_OP QB2OPTR
QB4_CL QB2CLTR
QC3_OP QB12OPTR
QC3_CL QB12CLTR
QC11_OP VPQB1TR
QC11_CL VPQB2TR
QC21_OP VPQB12TR
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
IEC05000358-2-en.vsd
IEC05000358 V2 EN-US
AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1
VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1
en04000538.vsd
IEC04000538 V1 EN-US
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000539.vsd
IEC04000539 V1 EN-US
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000540.vsd
IEC04000540 V1 EN-US
VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd
IEC04000541 V1 EN-US
11.3.6.5 Signals
PID-3510-INPUTSIGNALS v10
PID-3510-OUTPUTSIGNALS v10
11.3.7.1 Identification
GUID-3C4B9379-C861-406C-9295-0309014D548E v2
Position evaluation (POS_EVAL) function converts the input position data signal POSITION,
consisting of value, time and signal status, to binary signals OPENPOS or CLOSEPOS.
The output signals are used by other functions in the interlocking scheme.
POS_EVAL
POSITION OPENPOS
CLOSEPOS
IEC09000079_1_en.vsd
IEC09000079 V1 EN-US
POS_EVAL
Position including quality POSITION OPENPOS
Open/close position of
CLOSEPOS switch device
IEC08000469-1-en.vsd
IEC08000469-1-EN V1 EN-US
Only the value, open/close, and status is used in this function. Time information is not used.
11.3.7.5 Signals
PID-3555-INPUTSIGNALS v6
PID-3555-OUTPUTSIGNALS v6
The apparatus control functions are used for control and supervision of circuit breakers,
disconnectors and earthing switches within a bay. Permission to operate is given after evaluation of
conditions from other functions such as interlocking, synchrocheck, operator place selection and
external or internal blockings.
The apparatus control function APC5 for up to 5 apparatuses is used for control and supervision of
circuit breakers, disconnectors and earthing switches within a bay. Permission to operate is given
after evaluation of conditions from other functions such as interlocking, synchrocheck, operator place
selection and external or internal blockings.
In normal security, the command is processed and the resulting position is not supervised. However
with enhanced security, the command is processed and the resulting position is supervised.
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command is evaluated with an additional supervision
of the status value of the control object. The command sequence with enhanced security is always
terminated by a CommandTermination service primitive and an AddCause telling if the command was
successful or if something went wrong.
Control operation can be performed from the local HMI with authority control if so defined.
The switch controller SCSWI initializes and supervises all functions to properly select and operate
switching primary apparatuses. Each of the 10 switch controllers SCSWI may handle and operate on
one three-phase apparatus.
Each of the 3 circuit breaker controllers SXCBR provides the actual position status and pass the
commands to the primary circuit breaker and supervises the switching operation and positions.
Each of the 9 circuit switch controllers SXSWI provides the actual position status and pass the
commands to the primary disconnectors and earthing switches and supervises the switching
operation and positions.
A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The
different primary apparatuses within the bay can be controlled via the apparatus control functions
directly by the operator or indirectly by automatic sequences.
Because a primary apparatus can be allocated to many functions within a Substation Automation
system, the object-oriented approach with a function block that handles the interaction and status of
each process object ensures consistency in the process information used by higher-level control
functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
function block (SCSWI) each. Because the number and type of signals used for the control of a
breaker or a disconnector are almost the same, the same function block type is used to handle these
two types of apparatuses.
The SCSWI function block is connected to an SXCBR function block (for circuit breakers). The
physical process in the switchyard is connected to these two function blocks via binary inputs and
outputs.
Three types of function blocks are available to cover most of the control and supervision within the
bay. These function blocks are interconnected to form a control function reflecting the switchyard
configuration. The total number used depends on the switchyard configuration. These types are:
The functions Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle the
local/remote switch, also belong to the apparatus control function.
The principles of operation, function blocks, input and output signals and setting parameters for all
these functions are described below.
Depending on the error that occurs during the command sequence the error signal will be set with a
value. Table 271 describes the cause values given on local HMI. The translation to AddCause
values specified in IEC 61850-8-1 is shown in Table 272. For IEC 61850-8-1 edition 2 only
addcauses defined in the standard are used, for edition 1 also a number of vendor specific causes
are used. The values are available in the command response to commands from IE C61850-8-1
clients. An output L_CAUSE on the function block for Switch controller (SCSWI) and Circuit breaker
(SXCBR) indicates the value of the cause during the latest command if the function specific
command evaluation has been started. The causes that are not always reflected on the output
L_CAUSE, with description of the typical reason are listed in table 273.
Table 272: Translation of cause values for IEC 61850 edition 2 and edition 1
The Bay control (QCBAY) function is used together with Local remote and local remote control
functions to handle the selection of the operator place per bay. QCBAY also provides blocking
functions that can be distributed to different apparatuses within the bay.
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID LOC
BL_UPD STA
BL_CMD REM
IEC10000048 V4 EN-US
11.4.4.3 Signals
PID-4086-INPUTSIGNALS v8
PID-4086-OUTPUTSIGNALS v8
11.4.4.4 Settings
PID-4086-SETTINGS v8
When the local panel switch (or LHMI selection, depending on the set source to select this) is in Off
position, all commands from remote and local level will be ignored. If the position for the local/remote
switch is not valid the PSTO output will always be set to faulty state (3), which means no possibility to
operate.
To adapt the signals from the local HMI or from an external local/remote switch, the function blocks
LOCREM and LOCREMCTRL are needed and connected to QCBAY.
When the external switch is in Off position, or invalid position, the output always shows the actual
state of the switch (0 for Off and 3 for Invalid). In these cases, it is not possible to control anything,
and the setting AllPSTOValid has no effect on the PSTO output.
If the setting AllPSTOValid is set to No Priority and the LR-switch position is in Local or Remote
state, the PSTO output is set to 5 (all), that is, it is permitted to operate from local, station and remote
level without any priority.
If the setting RemoteIncStation is set to Yes and the LR-switch position is in Remote state, the PSTO
output is set to 2 (Station or Remote), that is, it is permitted to operate from both station and remote
level without any priority.
If the LR-switch position is in Remote state, and AllPSTOValid is set to Priority and RemoteIncStation
is set to No, the switching between station and remote level control is done through the command
LocSta. The command is accessible only through the IEC 61850 Edition 2 protocol.
Table 277: PSTO values for different Local panel switch positions
Blockings M13446-50 v6
The blocking states for position indications and commands are intended to provide the possibility for
the user to make common blockings for the functions configured within a complete bay.
The blocking facilities provided by the bay control function are the following:
• Blocking of position indications, BL_UPD. This input will block all inputs related to apparatus
positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all configured functions
within the bay.
The switching of the Local/Remote switch requires at least system operator level. The password will
be requested at an attempt to operate if authority levels have been defined in the IED, otherwise the
default authority level can handle the control without LogOn. The users and passwords are defined
with the IED Users tool in PCM600.
M17086-3 v12
The signals from the local HMI or from an external local/remote switch are connected via the function
blocks local remote (LOCREM) and local remote control (LOCREMCTRL) to the Bay control
(QCBAY) function block. The parameter ControlMode in function block LOCREM is set to choose if
the switch signals are coming from the local HMI or from an external hardware switch connected via
binary inputs.
LOCREM
CTRLOFF OFF
LOCCTRL LOCAL
REMCTRL REMOTE
LHMICTRL VALID
IEC05000360 V4 EN-US
LOCREMCTRL
^PSTO1 HMICTR1
^PSTO2 HMICTR2
^PSTO3 HMICTR3
^PSTO4 HMICTR4
^PSTO5 HMICTR5
^PSTO6 HMICTR6
^PSTO7 HMICTR7
^PSTO8 HMICTR8
^PSTO9 HMICTR9
^PSTO10 HMICTR10
^PSTO11 HMICTR11
^PSTO12 HMICTR12
IEC05000361 V4 EN-US
11.4.5.2 Signals
PID-3944-INPUTSIGNALS v7
PID-3944-OUTPUTSIGNALS v7
PID-3943-INPUTSIGNALS v6
PID-3943-OUTPUTSIGNALS v6
11.4.5.3 Settings
PID-3944-SETTINGS v7
PID-3943-SETTINGS v2
The function block Local remote (LOCREM) handles the signals coming from the local/remote switch.
The connections are seen in Figure 259, where the inputs on function block LOCREM are connected
to binary inputs if an external switch is used. When the local HMI is used, the inputs are not used.
The switching between external and local HMI source is done through the parameter ControlMode.
The outputs from the LOCREM function block control the output PSTO (Permitted Source To
Operate) on Bay control (QCBAY).
LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM
LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO 10 HMICTR 10
PSTO 11 HMICTR 11
PSTO 12 HMICTR 12
IEC10000052 V3 EN-US
Figure 259: Configuration for the local/remote handling for a local HMI with two bays and two
screen pages
If the IED contains control functions for several bays, the local/remote position can be different for the
included bays. When the local HMI is used the position of the local/remote switch can be different
depending on which single line diagram screen page that is presented on the local HMI. The function
block Local remote control (LOCREMCTRL) controls the presentation of the LEDs for the local/
remote position to applicable bay and screen page.
The switching of the local/remote switch requires at least system operator level. The password will be
requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the
default authority level, SuperUser, can handle the control without LogOn. The users and passwords
are defined with the IED Users tool in PCM600.
The Switch controller (SCSWI) initializes and supervises all functions to properly select and operate
switching primary apparatuses. The Switch controller may handle and operate on one multi-phase
device or up to three one-phase devices.
SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SEL_OP
L_OPEN SEL_CL
L_CLOSE SELECTED
AU_OPEN RES_RQ
AU_CLOSE RES_RQ_OP
BL_CMD RES_RQ_CL
RES_GRT START_SY
RES_EXT CANC_SY
SY_INPRO POSITION
SYNC_OK OPENPOS
EN_OPEN CLOSEPOS
EN_CLOSE POLEDISC
XPOSL1* POS_INTR
XPOSL2* CMD_BLK
XPOSL3* L_CAUSE
XEXINF
IEC05000337 V7 EN-US
11.4.6.3 Signals
PID-8269-INPUTSIGNALS v1
PID-8269-OUTPUTSIGNALS v1
GUID-7DABB496-EABE-48A4-8078-7ED5D6D4FE14 v4
AU_OPEN and AU_CLOSE are used to issue automated commands. They work without
regard to how the operator place selector, PSTO, is set. In order to have effect on the
outputs EXE_OP and EXE_CL, the corresponding enable input, EN_OPEN respectively
EN_CLOSE must be set, and that no interlocking is active.
L_SEL, L_OPEN and L_CLOSE are used for local command sequence connected to
binary inputs. In order to have effect, the operator place selector, PSTO, must be set to
local or to remote with no priority. Also, the corresponding enable input must be set, and
no interlocking is active. The L_SEL input must always be set before L_OPEN or
L_CLOSE, regardless of the control model. This is to ensure no accidental operations
occur.
If one multi-phase XCBR or two single-phase XCBR is used for a two- or three-phase
system, two or more of the inputs XPOSL1, XPOSL2 and XPOSL3 are connected to the
same source.
11.4.6.4 Settings
PID-8269-SETTINGS v1
Reservation
Client SCSWI SXCBR
logic
select
SEL_CL = TRUE
RES_RQ = TRUE
tReservation
Response
tSelect
RES_GRT = TRUE
SELECTED = TRUE
selectAck/AddCause = 0
requestedPosition = 10
opRcvd = TRUE
EXE_CL
RES_RQ = FALSE
RES_GRT = FALSE
IEC16000083=1=en=Original.vsdx
IEC16000083 V1 EN-US
Figure 261: Example of command sequence for a successful close command when the
control model SBO with enhanced security is used
requestedPosition = 10
opRcvd = TRUE
RES_RQ
tReservation
Response
RES_GRT = TRUE
EXE_CL
operateAck/AddCause = 0 operateAck/AddCause = 0
RES_RQ = FALSE
RES_GRT = FALSE
IEC15000417-1-en.vsdx
IEC15000417 V1 EN-US
Figure 262: Example of command sequence for a successful close command when the
control model direct with normal security is used
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command sequence is supervised in three steps, the
selection, command evaluation and the supervision of position. Each step ends up with a pulsed
signal to indicate that the respective step in the command sequence is finished. If an error occurs in
one of the steps in the command sequence, the sequence is terminated. The last error (L_CAUSE)
can be read from the function block and used for example at commissioning.
Before an execution command, an evaluation of the position is done. If the parameter PosDependent
is set to Not perm 00/11 or Not perm cPos/00/11, and the position is in intermediate state or in bad
state, the command is rejected with the cause Invalid-position. If the parameter is set to Not perm
cPos or Not perm cPos/00/11 and the command is to move to the current position, the command is
rejected with the cause Position-reached. If the parameter is set to Always permitted the execution
command is sent independent of the position value.
In the case when there are two or more one-phase switches connected to the switch control function,
the switch control will "merge" the position of the switches to the resulting multi-phase position. In the
case when the position differ between the one-phase switches, following principles will be applied:
The time stamp of the output multi-phase position from switch control will have the time stamp of the
last changed phase when it reaches the end position. When it goes to intermediate position or bad
state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change position at any
time due to a trip. Such situation is here called pole discordance and is supervised by this function. In
case of a pole discordance situation, that is, the positions of the one-phase switches are not equal for
a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause" values from the switch
module circuit breaker (SXCBR). At error the "cause" value with highest priority is shown.
The different block conditions will only affect the operation of this function, that is, no
blocking signals will be "forwarded" to other functions. The above blocking outputs are
stored in a non-volatile memory.
When there is no positive confirmation from the synchrocheck function, SCSWI will send a start
signal START_SY to the synchronizing function, which will send the closing command to SXCBR
when the synchronizing conditions are fulfilled, see Figure 263. If no synchronizing function is
included, the timer for supervision of the "synchronizing in progress signal" is set to 0, which means
no start of the synchronizing function. SCSWI will then set the attribute "blocked-by-synchrocheck" in
the "cause" signal. See also the time diagram in Figure 267.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
CANC_SY
SY_INPRO
SESRSYN
CLOSECB
Synchro Synchronizing
check function
IEC09000209-2-en.vsd
IEC09000209 V2 EN-US
The timer tSelect is used for supervising the time between the select and the execute command
signal, that is, the time the operator has to perform the command execution after the selection of the
object to operate.
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
IEC05000092 V1 EN-US
The Long-operation-time cause (-30) is only given on the output L_CAUSE. It is not sent
on protocols since the selection has already received a positive response, and no
operation has been issued. If an operation is issued after the time out, the negative
response is Object-not-selected.
The parameter tResResponse is used to set the maximum allowed time to make the reservation, that
is, the time between reservation request and the feedback reservation granted from all bays involved
in the reservation function.
select
execute command
position L1 open
close
position L2 open
close
position L3 open
close
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination *
position open
close
t1>tExecutionFB, then
tExecutionFB timer long-operation-time in
t1 'cause' is set
The parameter tSynchronizing is used to define the maximum allowed time between the start signal
for synchronizing and the confirmation that synchronizing is in progress.
execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
en05000095.vsd
IEC05000095 V1 EN-US
The purpose of Circuit breaker (SXCBR) is to provide the actual status of positions and to perform
the control operations, that is, pass all the commands to primary apparatuses in the form of circuit
breakers via binary output boards and to supervise the switching operation and position.
SXCBR
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
CBOPCAP CLOSEPOS
TR_OPEN TR_POS
TR_CLOSE CNT_VAL
RS_CNT L_CAUSE
EEH_WARN EEHEALTH
EEH_ALM CBOPCAP
XIN
IEC05000338-6-en.vsdx
IEC05000338 V6 EN-US
11.4.7.3 Signals
PID-6799-INPUTSIGNALS v3
PID-6799-OUTPUTSIGNALS v3
11.4.7.4 Settings
PID-6799-SETTINGS v3
SXCBR has an operation counter for closing and opening commands. The counter value can be read
remotely from the operator place. The value is reset from local HMI, a binary input or remotely from
the operator place by configuring a signal from the Single Point Generic Control 8 signals
(SPC8GAPC) for example. The health of the external equipment, the switch, can be monitored
according to IEC 61850-8-1. The operation counter functionality and the external equipment health
supervision are independent sub-functions of the circuit breaker function.
Local= Operation at
UE switch yard level
TR
en05000096.vsd
IEC05000096 V1 EN-US
• Block/deblock for open command. It is used to block operation for the open command. Note that
this block signal also affects the input OPEN for immediate command.
• Block/deblock for close command. It is used to block operation for the close command. Note that
this block signal also affects the input CLOSE for immediate command.
• Update block/deblock of positions. It is used to block the updating of position values. Other
signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active, but no
outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.
Substitution M13487-22 v5
The substitution part in SXCBR is used for manual set of the position and quality of the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous for some reason. SXCBR will then use the manually entered value instead of the
value for positions determined by the process.
When the position of the SXCBR is substituted, its IEC 61850-8-1 data object is marked
as “substituted", in addition to the substituted quality, but the position quality of the
connected SCSWI is not dependent on the substitution indication in the quality, so it does
not show that it is derived from a substituted value.
OPENPOS
CLOSEPOS
en05000097.vsd
IEC05000097 V1 EN-US
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
IEC05000098 V1 EN-US
The execute output pulses are reset when the activating input is reset and either of the following
happens:
• the new expected final position is reached and the configuration parameter AdaptivePulse is set
to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch not start moving, that is tStartMove has elapsed for normal
commands, or tIntermediate has elapsed starting from intermediate position, and the position
indications are valid.
If either of the position inputs are invalid or unconnected, the combined position is considered as
invalid. Then the execute output pulse resets at earliest when time tOpenPulse or tClosePulse has
elapsed.
If the breaker reaches the final position before the execution pulse time has elapsed, and
AdaptivePulse is not true, then the function waits for the end of the execution pulse
before indicating the activating function that the command is complete.
If the activating input remains active when the breaker has reached its final position and
the execution pulse time has elapsed, then the function waits for the reset of the
activating input before indicating that the command is complete.
There is one exception to the first item above: if the primary device is in open position and an open
command is executed or if the primary device is in closed position and a close command is executed.
In these cases, with the additional condition that the configuration parameter AdaptivePulse is true,
the execute output pulse is always activated and resets when tStartMove has elapsed. If the
configuration parameter AdaptivePulse is set to false, the execution output remains active until the
pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS=1) when a
command is executed, the execute output pulse resets at earliest when timer tOpenPulse
or tClosePulse has elapsed.
An example of when a primary device is open and an open command is executed is shown in
Figure 272 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
IEC05000099 V1 EN-US
The purpose of Circuit switch (SXSWI) function is to provide the actual status of positions and to
perform the control operations, that is, pass all the commands to primary apparatuses in the form of
disconnectors or earthing switches via binary output boards and to supervise the switching operation
and position.
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
SWOPCAP CLOSEPOS
RS_CNT CNT_VAL
EEH_WARN L_CAUSE
EEH_ALM EEHEALTH
XIN SWOPCAP
IEC05000339-5-en.vsdx
IEC05000339 V5 EN-US
11.4.8.3 Signals
PID-6800-INPUTSIGNALS v4
PID-6800-OUTPUTSIGNALS v4
11.4.8.4 Settings
PID-6800-SETTINGS v4
SXSWI has an operation counter for closing and opening commands. The counter value can be read
remotely from the operator place. The value is reset from a binary input or remotely from the operator
place by configuring a signal from the Single Point Generic Control 8 signals (SPC8GAPC), for
example.
Also, the health of the external equipment, the switch, can be monitored according to IEC 61850-8-1.
Local= Operation at
UE switch yard level
TR
en05000096.vsd
IEC05000096 V1 EN-US
• Block/deblock for open command. It is used to block operation for open command.
• Block/deblock for close command. It is used to block operation for close command.
• Update block/deblock of positions. It is used to block the updating of position values. Other
signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active, but no
outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.
Substitution M16494-21 v7
The substitution part in SXSWI is used for manual set of the position and quality of the switch. The
typical use of substitution is that an operator enters a manual value because the real process value is
erroneous of some reason. SXSWI will then use the manually entered value instead of the value for
positions determined by the process.
When the position of the SXSWI is substituted, its IEC 61850-8-1 data object is marked
as “substituted", in addition to the substituted quality, but the position quality of the
connected SCSWI is not dependent on the substitution indication in the quality, so it does
not show that it is derived from a substituted value.
OPENPOS
CLOSEPOS
en05000097.vsd
IEC05000097 V1 EN-US
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
IEC05000098 V1 EN-US
For the SXSWI the activating inputs should be pulsed, however, the functionality of following them is
the same as for SXCBR.
The execute output pulses are reset when the activating input is reset and either of the following
happens:
• the new expected final position is reached and the configuration parameter AdaptivePulse is set
to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch not start moving, that is tStartMove has elapsed for normal
commands, or tIntermediate has elapsed starting from intermediate position, and the position
indications are valid.
If either of the position inputs are invalid or unconnected, the combined position is considered as
invalid. Then the execute output pulse resets at earliest when time tOpenPulse or tClosePulse has
elapsed.
If the controlled primary device reaches the final position before the execution pulse time
has elapsed, and AdaptivePulse is not true, the function waits for the end of the execution
pulse before indicating the activating function that the command is completed.
If the activating input remains active when the switch has reached its final position and
the execution pulse time has elapsed, the function waits for the reset of the activating
input before indicating that the command is completed.
There is one exception from the first item above. If the primary device is in open position and an
open command is executed or if the primary device is in close position and a close command is
executed. In these cases, with the additional condition that the configuration parameter
AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains
active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a
command is executed the execute output pulse resets only when timer tOpenPulse or
tClosePulse has elapsed.
An example when a primary device is open and an open command is executed is shown in
Figure 277.
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
IEC05000099 V1 EN-US
11.4.9 Proxy for signals from switching device via GOOSE XLNPROXY
The proxy for signals from switching device via GOOSE (XLNPROXY) gives an internal
representation of the position status and control response for a switch modelled in a breaker IED.
This representation is identical to that of an SXCBR function.
XLNPROXY
BEH* XPOS
BEH_VALID* SELECTED
LOC* OP_BLKD
LOC_VALID* CL_BLKD
BLKOPN* OPENPOS
BLKOPN_V* CLOSEPOS
BLKCLS* CNT_VAL
BLKCLS_V* L_CAUSE
POSVAL* EEHEALTH
POSVAL_V* OPCAP
OPCNT*
OP_CNT_V*
BLK
BLK_VAL
STSELD
STSELD_V
OPRCVD
OPRCVD_V
OPOK
OPOK_VAL
EEHEALTH
EEH_VAL
OPCAP
OPCAP_V
COMMVALID
XIN
IEC16000043-1-en.vsdx
IEC16000043 V1 EN-US
11.4.9.3 Signals
PID-6712-INPUTSIGNALS v3
PID-6712-OUTPUTSIGNALS v3
11.4.9.4 Settings
PID-6712-SETTINGS v3
GUID-A4CCC681-D4D8-4534-905D-1D8AD40E923B v1
The default values of the inputs BEH, OPCNT, EEHEALTH and OPCAP are set to -1 to
denote that they are not connected.
The proxy for signals from switching device via GOOSE (XLNPROXY) is intended to be used when
the switch (XCBR) is modelled and controlled in a breaker IED or similar unit on the process bus.
XLNPROXY packages the signals from the GOOSE receive function, normally GOOSEXLNRCV, into
the same format as used from SXCBR to SCSWI. It makes a similar evaluation of the command
response as SXCBR when a command is issued from the connected SCSWI.
XLNPROXY has two outputs for position indication: OPENPOS and CLOSEPOS. Position is a
double point indication and the OPENPOS and CLOSEPOS are binary outputs intended to be used
for condition logics to protection and control functions
Normally, the position outputs, OPENPOS and CLOSEPOS, follow the value of the input POSVAL.
However, if the POSVAL_V input is FALSE, the communication is lost (COMMVALID = FALSE), or
the quality of the position received is bad, the OPENPOS and CLOSEPOS are both set to FALSE.
The command evaluation is triggered through the group input XIN that is connected to the SCSWI
function controlling the switch.
If an operation is initiated by the SCSWI, the XLNPROXY function checks if the switch is blocked for
the operation direction and that the position moves to the desired position within the two time limits
tStartMove and tIntermediate. The default values for tStartMove and tIntermediate are for a breaker.
The typical values for a disconnector are:
• tStartMove = 3s
• tIntermediate = 15s
In most cases, tStartMove and tIntermediate can be set to the same values as in the
source XCBR function. However, if the time limits are set very close to the actual
movement times of the apparatus, compensation may be needed for the communication
delays and differences in cycle time of the XLNPROXY function and the source function.
The compensation should be in the range of 0 - 5ms.
When the switch has started moving, it issues a response to the SCSWI function that the operation
has started. If it does not start moving within tStartMove, the command is deemed as failed, and a
cause is raised on the L_CAUSE output and sent to the SCSWI. The different causes it can identify
are listed in order of priority in table 1. The detection of the different ways of blocking is done while
waiting for movement of the switch, but the cause is not given until the tStartMove has elapsed.
The L_CAUSE output keeps its output value until a new command sequence has been started.
If the quality of the position or the communication becomes bad, the command evaluation replaces
the uncertain position value with intermediate position. Thus, as long as the quality is bad, all
commands will result in the cause Persistant-intermediate-state, -32.
If the switch in the merging unit has the behaviour set to Test or Test blocked, when the IED has
the behaviour On or Blocked, all data from the switch is regarded as invalid. Thus, any command
will fail with the cause PersistantiIntermediate-state, -32, and if selection is used for the switch, all
attempts to select the connected SCSWI will fail with the cause Select-failed, 3, from the SCSWI.
It is possible to speed up the command response for when the command has been started by the
switch in the breaker IED by connecting the inputs OPOK and OPOK_VAL. Then the blocking check
is only done until OPOK is activated and confirmation of that the command has been started is given
to the SCSWI function.
If the inputs STSELD and STSELD_V are connected, the switch in the breaker IED is assumed to
use selection. Then the SCSWI will wait for a selected indication, STSELD input of XLNPROXY,
before accepting selection, this information is transferred to the SCSWI function from the
XLNPROXY through the group connection XPOS. If STSELD is not activated within tSelect of the
SCSWI function, the selection is deemed failed and it gives a negative selection acknowledgement to
the command issuer with the cause Select-failed. Further, if the communication is lost, or the data
received is deemed invalid, the selection will also fail with cause Select-failed from the SCSWI.
The purpose of the reservation (QCRSV) function is primarily to transfer interlocking information
between IEDs in a safe way and to prevent double operation in a bay, switchyard part, or complete
substation.
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLOCK ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
IEC05000340-3-en.vsdx
IEC05000340 V3 EN-US
11.4.10.3 Signals
PID-3561-INPUTSIGNALS v7
PID-3561-OUTPUTSIGNALS v7
11.4.10.4 Settings
PID-3561-SETTINGS v7
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE) or
other bays (FALSE). To reserve the own bay only means that no reservation request RES_BAYS is
created.
If the RESERVED output is not set, the selection is made with the output RES_GRTx (where x=1-8 is
the number of the requesting apparatus), which is connected to switch controller SCSWI. If the bay
already is reserved the command sequence will be reset and the SCSWI will set the attribute "1-of-n-
control" in the "cause" signal.
When it receives acknowledge from the bays via the input RES_DATA, it sets the output RES_GRTx
(where x=1-8 is the number of the requesting apparatus). If not acknowledgement from all bays is
received within a certain time defined in SCSWI (tResResponse), the SCSWI will reset the
reservation and set the attribute "1-of-n-control" in the "cause" signal.
The reservation function can also be overridden in the own bay with the OVERRIDE input signal, that
is, reserving the own bay without waiting for the external acknowledge.
If there are more than eight apparatuses in the bay, there has to be one additional QCRSV. The two
QCRSV functions have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to Figure 280. If more than one QCRSV are used, the execution order is very
important. The execution order must be in the way that the first QCRSV has a lower number than the
next one.
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLOCK ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
1
BLOCK ACK_TO_B RESERVED
OVERRIDE RESERVED
RES_DATA EXCH_OUT
IEC05000088-3-en.vsdx
IEC05000088 V3 EN-US
The Reservation input (RESIN) function receives the reservation information from other bays. The
number of instances is the same as the number of involved bays (up to 60 instances are available).
RESIN1
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC05000341-2-en.vsd
IEC05000341 V2 EN-US
RESIN2
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC09000807_1_en.vsd
IEC09000807 V1 EN-US
11.4.11.3 Signals
PID-3629-INPUTSIGNALS v7
PID-3629-OUTPUTSIGNALS v7
PID-3630-INPUTSIGNALS v7
PID-3630-OUTPUTSIGNALS v7
11.4.11.4 Settings
PID-3629-SETTINGS v7
PID-3630-SETTINGS v7
The reservation input (RESIN) function is based purely on Boolean logic conditions. The logic
diagram in Figure 283 shows how the output signals are created. The inputs of the function block are
connected to a receive function block representing signals transferred over the station bus from
another bay.
EXCH_IN INT
BIN
ACK_F_B
&
FutureUse
³1
ANY_ACK
BAY_ACK ³1
VALID_TX
&
BAY_VAL ³1
RE_RQ_B
³1
BAY_RES &
V _RE_RQ
³1
BIN
EXCH_OUT
INT
en05000089.vsd
IEC05000089 V1 EN-US
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
IEC05000090 V2 EN-US
11.5.1 Identification
SEMOD167845-2 v4
The logic rotating switch for function selection and LHMI presentation (SLGAPC) (or the selector
switch function block) is used to get an enhanced selector switch functionality compared to the one
provided by a hardware selector switch. Hardware selector switches are used extensively by utilities,
in order to have different functions operating on pre-set values. Hardware switches are however
sources for maintenance issues, lower system reliability and an extended purchase portfolio. The
selector switch function eliminates all these problems.
SLGAPC
BLOCK ^P01
PSTO ^P02
UP ^P03
DOWN ^P04
^P05
^P06
^P07
^P08
^P09
^P10
^P11
^P12
^P13
^P14
^P15
^P16
^P17
^P18
^P19
^P20
^P21
^P22
^P23
^P24
^P25
^P26
^P27
^P28
^P29
^P30
^P31
^P32
SWPOSN
IEC14000005 V2 EN-US
11.5.4 Signals
PID-6641-INPUTSIGNALS v3
PID-6641-OUTPUTSIGNALS v3
11.5.5 Settings
PID-6641-SETTINGS v3
Besides the inputs visible in the application configuration in the Application Configuration Tool, there
are other possibilities that will allow an user to set the desired position directly (without activating the
intermediate positions), either locally or remotely, using a “select before execute” dialog. One can
block the function operation, by activating the BLOCK input. In this case, the present position will be
kept and further operation will be blocked. The operator place (local or remote) is specified through
the PSTO input. If any operation is allowed the signal INTONE from the Fixed signal function block
can be connected. SLGAPC function block has also an integer value output, that generates the
actual position number. The positions and the block names are fully settable by the user. These
names will appear in the menu, so the user can see the position names instead of a number.
• if it is used just for the monitoring, the switches will be listed with their actual position names, as
defined by the user (max. 13 characters).
• if it is used for control, the switches will be listed with their actual positions, but only the first
three letters of the name will be used.
In both cases, the switch full name will be shown, but the user has to redefine it when building the
Graphical Display Editor, under the "Caption". If used for the control, the following sequence of
commands will ensure:
Control
Control Single Line Diagram
Measurements Commands
Events
Disturbance records
Settings
Diagnostics
Test
Change to the "Switches" page Reset
of the SLD by left-right arrows. Authorization
Select switch by up-down Language
arrows
../Control/SLD/Switch
O I ../Control/SLD/Switch
SMBRREC control SMBRREC control
WFM Select switch. Press the
WFM
I or O key. A dialog box
Pilot setup appears.
Pilot setup
OFF OFF
Damage control
P: Disc N: Disc Fe
DAL
The pos will not be modified
(outputs will not be activated) until OK Cancel
you press the Enter button for O.K.
../Control/SLD/Switch
SMBRREC control
WFM
Pilot setup
OFF
Damage control
DFW
IEC06000421 V4 EN-US
Figure 286: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.
11.6.1 Identification
SEMOD167850-2 v4
The Selector mini switch (VSGAPC) function block is a multipurpose function used for a variety of
applications, as a general purpose switch.
VSGAPC can be controlled from a symbol on the single line diagram (SLD) on the local HMI or from
binary inputs.
VSGAPC
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
CMDPOS12
CMDPOS21
IEC14000066 V2 EN-US
11.6.4 Signals
PID-7478-INPUTSIGNALS v1
PID-7478-OUTPUTSIGNALS v1
11.6.5 Settings
PID-7478-SETTINGS v1
Selector mini switch (VSGAPC) function can be used for double purpose, in the same way as switch
controller (SCSWI) functions are used:
• for indication on the single line diagram (SLD). Position is received through the IPOS1 and
IPOS2 inputs and distributed in the configuration through the POS1 and POS2 outputs, or to
IEC 61850 through reporting, or GOOSE.
• for commands that are received via the local HMI or IEC 61850 and distributed in the
configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command from the local
HMI when the SLD is displayed and the object is chosen.
The output CMDPOS21 is set when the function receives an OPEN command from the local
HMI when the SLD is displayed and the object is chosen.
It is important for indication in the SLD that a symbol is associated with a controllable
object, otherwise the symbol won't be displayed on the screen. A symbol is created and
configured in GDE tool in PCM600.
The PSTO input is connected to the Local remote switch to have a selection of operators place,
operation from local HMI (Local) or through IEC 61850 (Remote). An INTONE connection from Fixed
signal function block (FXDSIGN) will allow operation from local HMI.
As it can be seen, both indications and commands are done in double-bit representation, where a
combination of signals on both inputs/outputs generate the desired result.
The following table shows the relationship between IPOS1/IPOS2 inputs and the name of the string
that is shown on the SLD. The value of the strings are set in PST.
11.7.1 Identification
GUID-E16EA78F-6DF9-4B37-A92D-5C09827E2297 v4
Generic communication function for double point indication (DPGAPC) function block is used to send
double point position indications to other systems, equipment or functions in the substation through
IEC 61850-8-1 or other communication protocols. It is especially intended to be used in the
interlocking station-wide logics.
DPGAPC
OPEN POSITION
CLOSE
VALID
IEC13000081 V2 EN-US
PID-4139-INPUTSIGNALS v12
PID-4139-OUTPUTSIGNALS v12
The function does not have any parameters available in the local HMI or PCM600.
When receiving the input signals, DPGAPC sends the signals over IEC 61850-8-1 to the systems,
equipment or functions that requests and thus subscribes on these signals. To be able to get the
signals into other systems, equipment or functions, one must use other tools, described in the
Engineering manual, and define which function block in which systems, equipment or functions
should receive this information.
More specifically, DPGAPC function reports a combined double point position indication output
POSITION, by evaluating the value and the timestamp attributes of the inputs OPEN and CLOSE,
together with the logical input signal VALID.
When the input signal VALID is active, the values of the OPEN and CLOSE inputs determine the two-
bit integer value of the output POSITION. The timestamp of the output POSITION will have the latest
updated timestamp of the inputs OPEN and CLOSE.
When the input signal VALID is inactive, DPGAPC function forces the position to intermediated state.
When the value of the input signal VALID changes, the timestamp of the output POSITION will be
updated as the time when DPGAPC function detects the change.
Refer to Table 314 for the description of the input-output relationship in terms of the value and the
quality attributes.
POSITION
VALID OPEN CLOSE
Value Description
0 - - 0 Intermediate
1 0 0 0 Intermediate
1 1 0 1 Open
1 0 1 2 Closed
1 1 1 3 Bad State
11.8.1 Identification
SEMOD176456-2 v3
The Single point generic control 8 signals (SPC8GAPC) function block is a collection of 8 single point
commands that can be used for direct commands for example reset of LEDs or putting IED in
"ChangeLock" state from remote. In this way, simple commands can be sent directly to the IED
outputs, without confirmation. Confirmation (status) of the result of the commands is supposed to be
achieved by other means, such as binary inputs and SPGAPC function blocks. The commands can
be pulsed or steady with a settable pulse time.
SPC8GAPC
BLOCK ^OUT1
PSTO ^OUT2
^OUT3
^OUT4
^OUT5
^OUT6
^OUT7
^OUT8
IEC07000143 V4 EN-US
11.8.4 Signals
PID-3575-INPUTSIGNALS v8
PID-3575-OUTPUTSIGNALS v8
11.8.5 Settings
PID-3575-SETTINGS v8
The PSTO input selects the operator place (LOCAL, REMOTE or ALL). One of the eight outputs is
activated based on the command sent from the operator place selected. The settings Latchedx and
tPulsex (where x is the respective output) will determine if the signal will be pulsed (and how long the
pulse is) or latched (steady). BLOCK will block the operation of the function – in case a command is
sent, no output will be activated.
PSTO is the universal operator place selector for all control functions. Although, PSTO
can be configured to use LOCAL or ALL operator places, only REMOTE operator place is
used in SPC8GAPC function.
11.9.1 Identification
GUID-C3BB63F5-F0E7-4B00-AF0F-917ECF87B016 v4
The Automation bits function (AUTOBITS) is used to configure the DNP3 protocol command
handling. Each of the 3 AUTOBITS available has 32 individual outputs available, each can be
mapped as a binary output point in DNP3.
AUTOBITS
BLOCK ^CMDBIT1
PSTO ^CMDBIT2
^CMDBIT3
^CMDBIT4
^CMDBIT5
^CMDBIT6
^CMDBIT7
^CMDBIT8
^CMDBIT9
^CMDBIT10
^CMDBIT11
^CMDBIT12
^CMDBIT13
^CMDBIT14
^CMDBIT15
^CMDBIT16
^CMDBIT17
^CMDBIT18
^CMDBIT19
^CMDBIT20
^CMDBIT21
^CMDBIT22
^CMDBIT23
^CMDBIT24
^CMDBIT25
^CMDBIT26
^CMDBIT27
^CMDBIT28
^CMDBIT29
^CMDBIT30
^CMDBIT31
^CMDBIT32
IEC09000925-1-en.vsd
IEC09000925 V1 EN-US
11.9.4 Signals
PID-3776-INPUTSIGNALS v6
PID-3776-OUTPUTSIGNALS v6
11.9.5 Settings
PID-3776-SETTINGS v6
AutomationBits function (AUTOBITS) has 32 individual outputs which each can be mapped as a
Binary Output point in DNP3. The output is operated by a "Object 12" in DNP3. This object contains
parameters for control-code, count, on-time and off-time. To operate an AUTOBITS output point,
send a control-code of latch-On, latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining
parameters will be regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5
would give 5 positive 100 ms pulses, 300 ms apart.
There is a BLOCK input signal, which will disable the operation of the function, in the same way the
setting Operation: On/Off does. That means that, upon activation of the BLOCK input, all 32
CMDBITxx outputs will be set to 0. The BLOCK acts like an overriding, the function still receives data
from the DNP3 master. Upon deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the
DNP3 master again, momentarily. For AUTOBITS , the PSTO input determines the operator place.
The command can be written to the block while in “Remote”. If PSTO is in “Local” then no change is
applied to the outputs.
11.10.1 Identification
GUID-2217CCC2-5581-407F-A4BC-266CD6808984 v2
The IEDs can receive commands either from a substation automation system or from the local HMI.
The command function block has outputs that can be used, for example, to control high voltage
apparatuses or for other user defined functionality.
SINGLECMD
BLOCK ^OUT1
^OUT2
^OUT3
^OUT4
^OUT5
^OUT6
^OUT7
^OUT8
^OUT9
^OUT10
^OUT11
^OUT12
^OUT13
^OUT14
^OUT15
^OUT16
IEC05000698-2-en.vsd
IEC05000698 V3 EN-US
11.10.4 Signals
PID-6189-INPUTSIGNALS v7
PID-6189-OUTPUTSIGNALS v7
11.10.5 Settings
PID-6189-SETTINGS v7
Single command, 16 inputs (SINGLECMD) function has 16 binary output signals. The outputs can be
individually controlled from a substation automation system or from the local HMI. Each output signal
can be given a name with a maximum of 13 characters in PCM600.
The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done via the
local HMI or PCM600 and is common for the whole function block. The length of the output pulses
are 100 ms. In steady mode, SINGLECMD function has a memory to remember the output values at
power interruption of the IED. Also a BLOCK input is available used to block the updating of the
outputs.
The output signals, OUT1 to OUT16, are available for configuration to built-in functions or via the
configuration logic circuits to the binary outputs of the IED.
12.1.2 Identification
M14854-1 v4
To achieve instantaneous fault clearance for all line faults, scheme communication logic is provided.
All types of communication schemes for permissive underreaching, permissive overreaching,
blocking, delta based blocking, unblocking and intertrip are available.
The built-in communication module (LDCM) can be used for scheme communication signaling when
included.
ZCPSCH
I3P* TRIP
U3P* CS
BLOCK CHSTOP
BLKTR CRL
BLKCS LCG
CSBLK
CACC
CSOR
CSUR
CR
CRG
CBOPEN
IEC09000004
IEC09000004 V4 EN-US
12.1.5 Signals
PID-3766-INPUTSIGNALS v7
PID-3766-OUTPUTSIGNALS v5
12.1.6 Settings
PID-3766-SETTINGS v7
A permissive scheme is inherently faster and has better security against false tripping than a blocking
scheme. On the other hand, a permissive scheme depends on a received signal for a fast trip, so its
dependability is lower than that of a blocking scheme.
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is received
from the remote IED.
The received signal, which shall be connected to CR, is used to block the zone to be accelerated to
clear the fault instantaneously (after time tCoord). The forward overreaching zone to be accelerated
is connected to the input CACC, see figure 293.
In case of external faults, the blocking signal (CR) must be received before the settable timer tCoord
elapses to prevent a false trip, see figure 293.
The function can be totally blocked by activating the input BLOCK. Tripping can be blocked by
activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
IEC05000512 V1 EN-US
In order to avoid delays due to carrier coordination times, the initiation of sending of blocking signal
to remote end is done by a fault inception detection element based on delta quantities of currents
and voltages. The delta based fault detection is very fast and if the channel is fast there is no need
for delaying the operation of the remote distance element. The received blocking signal arrives well
before the distance element has started. If the fault is in forward direction the sending is immediately
stopped by a forward directed distance, directional current or directional earth fault element.
The fault inception detection element detects instantaneous changes in any phase currents or zero
sequence current in combination with a change in the corresponding phase voltage or zero sequence
voltage. The criterion for the fault inception detection is if the change of any phase voltage and
current exceeds the settings DeltaU and DeltaI respectively, or if the change of zero sequence
voltage and zero sequence current exceeds the settings Delta3U0,Delta3I0 respectively. The
schemeType is selected as DeltaBlocking.
If the fault inception function has detected a system fault, a block signal CS will be issued and sent to
remote end in order to block the overreaching zones. Different criteria has to be fulfilled for sending
the CS signal:
1. The breaker has to be in closed condition, that is, the input signal CBOPEN is deactivated.
2. A fault inception should have been detected while the carrier send signal is not blocked, that is,
the input signal BLKCS is not activated.
If it is later detected that it was an internal fault that made the function issue the CS signal, the
function will issue a CHSTOP signal to unblock the remote end.
The received signal, which is connected to the CR input, is not used to accelerate the release of the
overreaching zone to clear the fault instantaneously. The overreaching zone to be accelerated is
connected to the input CACC, see Figure 294.
In case of external faults, the blocking signal (CR) must be received before the settable timer tCoord
elapses, to prevent a false trip, see Figure 294.
The function can be totally blocked by activating the input BLOCK, block of trip by activating the input
BLKTR, block of carrier send by activating the input BLKCS.
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
IEC05000512 V1 EN-US
Figure 294: Basic logic for trip signal in delta blocking scheme
Channels for communication in each direction must be available.
The logic for trip signal in permissive scheme is shown in figure 295.
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
IEC05000513 V1 EN-US
The logic for trip signal in permissive scheme is shown in figure 295.
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
IEC05000513 V1 EN-US
In unblocking scheme, the lower dependability of a permissive scheme is overcome by using the loss
of guard signal from the communication equipment to locally create a receive signal. It is common or
suitable to use the function when older, less reliable power-line carrier (PLC) communication is used.
The unblocking function uses a guard signal CRG, which must always be present, even when no CR
signal is received. The absence of the CRG signal for a time longer than the setting tSecurity time is
used as a CR signal, see figure 297. This enables a permissive scheme to operate when the line
fault blocks the signal transmission. The CRG signal is only used in unblocking schemes.
The received signal created by the unblocking function is reset 150 ms after the security timer has
elapsed. When that occurs an output signal LCG is activated for signalling purpose. The unblocking
function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t OR
CRG
200 ms 150 ms
t OR t AND
AND
LCG
IEC05000746-2-en.vsd
IEC05000746 V2 EN-US
Figure 297: Guard signal logic with unblocking scheme and with setting Unblock = Restart
CR
CRL
tSecurity OR
CRG t
IEC11000253-2-en.vsd
IEC11000253 V2 EN-US
Figure 298: Guard signal logic with unblocking scheme and with setting Unblock = NoRestart
The unblocking function can be set in three operation modes (setting Unblock):
In the direct intertrip scheme, the send signal CS is sent from an underreaching zone that is tripping
the line.
The received signal CR is directly transferred to a trip for tripping without local criteria. The signal is
further processed in the tripping logic.
The simplified logic diagram for the complete logic is shown in figure 299.
Unblock =Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
tSecurit
Restart
y
CRG 1 t AND
SchemeType =
Intertrip
CSUR
tSendMi
n AND
OR
BLOCK AND
CSBLK OR
CRL
Schemetype =
Permissive UR AND CS
OR
tCoord
AND 25 ms
OR
t TRIP
CACC t
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
IEC05000515-3-en.vsdx
IEC05000515 V3 EN-US
Figure 299: Scheme communication logic for distance or overcurrent protection, simplified
logic diagram
12.2.2 Identification
M15073-1 v5
The ZCRWPSCH function provides the current reversal and weak end infeed logic functions that
supplement the standard scheme communication logic. It is not suitable for standalone use as it
requires inputs from the distance protection functions and the scheme communications function
included within the terminal.
On detection of a current reversal, the current reversal logic provides an output to block the sending
of the teleprotection signal to the remote end, and to block the permissive tripping at the local end.
This blocking condition is maintained long enough to ensure that no unwanted operation will occur as
a result of the current reversal.
On verification of a weak end infeed condition, the weak end infeed logic provides an output for
sending the received teleprotection signal back to the remote sending end and other output(s) for
local tripping. For terminals equipped for single- and two-pole tripping, outputs for the faulted
phase(s) are provided. Undervoltage detectors are used to detect the faulted phase(s).
ZCRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL
IEC06000287-2-en.vsd
IEC06000287 V2 EN-US
12.2.5 Signals
PID-3521-INPUTSIGNALS v8
PID-3521-OUTPUTSIGNALS v8
12.2.6 Settings
PID-3521-SETTINGS v8
The current reversal logic can be enabled by setting the parameter CurrRev = On. The current
reversal logic uses a reverse zone connected to the input IRV to recognize the fault on the parallel
line in any of the phases.When the reverse zone has been activated (even if only for a short time), it
prevents sending of a communication signal and tripping through the scheme communication logic
after a settable time tPickUpRev. The prevention will last for tPickUpRev + 10 ms + tDelayRev after
the IREV reset. This makes it possible for the receive signal to reset before the carrier-aided trip
signal is activated due to the current reversal by the forward directed zone. The logic diagram for
current reversal is shown in Figure 301.
BLOCK
IRVBLK
tDelayRev
tPickUpRev 10 ms tPickUpRev IRVL
IRV AND t
t t t
CurrRev = On
IEC05000122-4-en.vsd
IEC05000122 V4 EN-US
The function has an internal 10 ms drop-off timer which will secure that the current reversal logic will
be activated for short input signals even if the pick-up timer is set to zero.
The weak-end infeed logic (WEI) function sends back (echoes) the received signal under the
condition that no fault has been detected on the weak-end by different fault detection elements
(distance protection in forward or reverse direction).
The WEI function returns the received signal, shown in Figure 302, when:
• The setting parameter WEI is set to either Echo or Echo & Trip.
• No active signal is present on the input BLOCK.
• The functional input CRL is active for a time longer than the tPickUpWei setting. This input is
usually connected to the CRL output on the scheme communication logic ZCPSCH.
• The WEI function is not blocked by the active signal connected to the WEIBLK1 functional input
or to the VTSZ functional input. The later is usually configured to the VTSZ functional output of
the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional input. An OR
combination of all fault detection functions (not undervoltage) as present within the IED is
usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens.
BLOCK
VTSZ
WEIBLK1 OR
tPickUpWEI
CRL AND 50 ms 200 ms
t AND
OR t t
ECHO
200 ms AND
WEIBLK2
t
AND
OR
1500 ms
CBOPEN
t
WEI = Echo
IEC05000123-3-en.vsd
IEC05000123 V3 EN-US
Figure 302: Simplified logic diagram for weak-end infeed logic — Echo
When an echo function is used in both IEDs (should generally be avoided), a spurious signal can be
looped round by the echo logics. To avoid a continuous lock-up of the system, the duration of the
echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local
breaker is selected, setting WEI = Echo&Trip. With this setting the Echo and Trip are working in
parallel as in logic shown in Figure 303.
BLOCK
VTSZ
WEIBLK1 OR
tPickUpWEI
CRL AND 50 ms 200 ms
t AND ECHO
OR t t AND
200 ms
WEIBLK2
t
AND
1500 ms
OR
CBOPEN
t
AND
U3P*
UL1<UPN<
UL2 < UPN<
UL3 < UPN<
UPN< 100 ms
OR
AND t
TRWEI
OR
15 ms
TRWEIL1
U3P*
AND t
UL1L2 <UPP< OR
UL2L3 < UPP<
UL3L1 < UPP<
15 ms
UPP< TRWEIL2
AND t
OR
15 ms
OR TRWEIL3
AND t
Figure 303: Simplified logic diagram for weak-end infeed logic — Echo&Trip
12.3.1 Identification
M14860-1 v4
To achieve fast clearing of faults on the whole line, when no communication channel is available,
local acceleration logic (ZCLCPSCH) can be used. This logic enables fast fault clearing and re-
closing during certain conditions, but naturally, it can not fully replace a communication channel.
The logic can be controlled either by the autorecloser (zone extension) or by the loss-of-load current
(loss-of-load acceleration).
ZCLCPSCH
I3P* TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
IEC13000307-1-en.vsd
IEC13000307 V1 EN-US
12.3.4 Signals
PID-3511-INPUTSIGNALS v6
PID-3511-OUTPUTSIGNALS v6
12.3.5 Settings
PID-3511-SETTINGS v7
When the auto-recloser controls the function, a signal auto-recloser ready (ZCLCARREADY) allows
an overreaching zone (ZCLC-EXACC) to trip instantaneously, see figure 305.
IEC05000157 V1 EN-US
In case of a fault on the adjacent line within the overreaching zone range, an unwanted autoreclosing
cycle will occur due to the zone extension functionality.
On the other hand, if the fault is a persistent line fault on the line section and not covered by
instantaneous zone (normally zone 1), then a trip after reclosing will be with the step-time distance
function (which is time delayed) and only the first trip (before reclosing) will be "instantaneous" .
The function will be blocked if the input BLOCK is activated (common with loss-of-load acceleration).
The local acceleration logic uses the loss-of-load condition to accelerate the trip for faults that were
not detected in an instantaneous zone (normally zone 1). If there is a fault in the range of over
reaching zone but still in the same line section, then the distance protection in the remote operates in
the instantaneous zone and the remote breaker opens in all three phases. Due to this, the load
current in the healthy phases will be discontinued, however, the current continues to flow in the fault
phases. Hence, this scenario is used to detect that the fault is inside the line section and then LLACC
is released for TRLL.
When the "acceleration" is controlled by a loss-of-load, the overreaching zone used for "acceleration"
connected to input LLACC is not allowed to trip "instantaneously" during normal non-fault system
conditions. When all three-phase currents have been above the set value MinCurr for more than
setting tLowCurr, an overreaching zone will be allowed to trip "instantaneously" during a fault
condition when one or two of the phase currents will become low due to a three-phase trip at the
opposite IED, see figure 306. The current measurement is performed internally and the internal
STILL signal becomes logical one under the described conditions. The load current in a healthy
phase is in this way used to indicate the tripping at the opposite IED. Note that this function will not
operate in case of three-phase faults, because none of the phase currents will be low when the
opposite IED is tripped.
BLOCK
BC OR
I_PHL1
a overPhase1
a>b
LoadCurr b
tLoadOn tLoadOff
a
a > b overPhase2 AND t t
b
a
a>b
b overPhase3
tLoadOn
AND TRLL
AND t
OR
a
a < b underPhase1
MinCurr b
tLowCurr
I_PHL2
a AND t
a < b underPhase2 OR
b
I_PHL3
a
a<b
b underPhase3
LLACC
IEC05000158-2-en.vsdx
IEC05000158 V2 EN-US
12.4.2 Identification
M14882-1 v2
To achieve fast fault clearance of earth faults on the part of the line not covered by the instantaneous
step of the residual overcurrent protection, the directional residual overcurrent protection can be
supported with a logic that uses communication channels.
In the directional scheme, information of the fault current direction must be transmitted to the other
line end. With directional comparison, a short operate time of the protection including a channel
transmission time, can be achieved. This short operate time enables rapid autoreclosing function
after the fault clearance.
The communication logic module for directional residual current protection enables blocking as well
as permissive under/overreaching, and unblocking schemes. The logic can also be supported by
additional logic for weak-end infeed and current reversal, included in Current reversal and weak-end
infeed logic for residual overcurrent protection (ECRWPSCH) function.
ECPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
IEC06000288-2-en.vsd
IEC06000288 V2 EN-US
12.4.5 Signals
PID-3581-INPUTSIGNALS v7
PID-3581-OUTPUTSIGNALS v6
12.4.6 Settings
PID-3581-SETTINGS v6
• Input signal CACC is used for tripping of the communication scheme, normally the start signal of
a forward overreaching step of STFW.
• Input signal CSBLK is used for sending block signal in the blocking communication scheme,
normally the start signal of a reverse overreaching step of STRV.
• Input signal CSUR is used for sending permissive signal in the underreaching permissive
communication scheme, normally the start signal of a forward underreaching step of STINn,
where n corresponds to the underreaching step.
• Input signal CSOR is used for sending permissive signal in the overreaching permissive
communication scheme, normally the start signal of a forward overreaching step of STINn,
where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS input
for blocking of the function at a single phase reclosing cycle.
In the blocking scheme a signal is sent to the other line end if the directional element detects an
earth fault in the reverse direction. When the forward directional element operates, it trips after a
short time delay if no blocking signal is received from the opposite line end. The time delay, normally
30 – 40 ms, depends on the communication transmission time and a chosen safety margin.
One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if the
ratio of source impedances at both end is approximately equal for zero and positive sequence source
impedances, the channel can be shared with the impedance measuring system, if that system also
works in the blocking mode. The communication signal is transmitted on a healthy line and no signal
attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is no zero-sequence
outfeed from the tapping. The blocking scheme is immune to current reversals because the received
signal is maintained long enough to avoid unwanted operation due to current reversal. There is never
any need for weak-end infeed logic, because the strong end trips for an internal fault when no
blocking signal is received from the weak end. The fault clearing time is however generally longer for
a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no blocking signal
comes from the other line end via the CR binary input (received signal) the TRIP output is activated
after the tCoord set time delay.
IEC05000448 V1 EN-US
In the permissive scheme the forward directed earth-fault measuring element sends a permissive
signal to the other end, if an earth fault is detected in the forward direction. The directional element at
the other line end must wait for a permissive signal before activating a trip signal. Independent
channels must be available for the communication in each direction.
An impedance measuring IED, which works in the same type of permissive mode, with one channel
in each direction, can share the channels with the communication scheme for residual overcurrent
protection. If the impedance measuring IED works in the permissive overreaching mode, common
channels can be used in single line applications. In case of double lines connected to a common bus
at both ends, use common channels only if the ratio Z1S/Z0S (positive through zero-sequence source
impedance) is about equal at both ends. If the ratio is different, the impedance measuring and the
directional earth-fault current system of the healthy line may detect a fault in different directions,
which could result in unwanted tripping.
Common channels cannot be used when the weak-end infeed function is used in the distance or
earth-fault protection.
In case of an internal earth-fault, the forward directed measuring element operates and sends a
permissive signal to the remote end via the CS output (sent signal). Local tripping is permitted when
the forward direction measuring element operates and a permissive signal is received via the CR
binary input (received signal).
The permissive scheme can be of either underreaching or overreaching type. In the underreaching
alternative, an underreaching directional residual overcurrent measurement element will be used as
sending criterion of the permissive input signal CSUR.
BLOCK
CRL
CR AND
25 ms
t TRIP
0 - 60 s
AND
BLKCS OR CS
AND
Overreach
CSOR AND 25 ms
CSUR OR t
IEC05000280.vsd
IEC05000280 V4 EN-US
In unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss
of guard signal from the communication equipment to locally create a receive signal. It is common or
suitable to use the function when older, less reliable, power line carrier (PLC) communication is used.
The unblocking function uses a guard signal CRG, which must always be present, even when no CR
signal is received. The absence of the CRG signal for a time longer than the setting tSecurity time is
used as a CR signal, see figure 309. This also enables a permissive scheme to operate when the
line fault blocks the signal transmission.
The received signal created by the unblocking function is reset 150 ms after the security timer has
elapsed. When that occurs an output signal LCG is activated for signaling purpose. The unblocking
function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t OR
CRG
200 ms 150 ms
t OR t AND
AND
LCG
IEC05000746-2-en.vsd
IEC05000746 V2 EN-US
12.5.1 Identification
M14883-1 v2
12.5.2 Functionality
M13928-3 v8
The Current reversal and weak-end infeed logic for residual overcurrent protection (ECRWPSCH) is
a supplement to Scheme communication logic for residual overcurrent protection ECPSCH.
To achieve fast fault clearing for all earth faults on the line, the directional earth fault protection
function can be supported with logic that uses tele-protection channels.
This is why the IEDs have available additions to the scheme communication logic.
M13928-6 v2
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted tripping
affects the healthy line when a fault is cleared on the other line. This lack of security can result in a
total loss of interconnection between the two buses. To avoid this type of disturbance, a fault current
reversal logic (transient blocking logic) can be used.
M13928-8 v5
Permissive communication schemes for residual overcurrent protection can basically operate only
when the protection in the remote IED can detect the fault. The detection requires a sufficient
minimum residual fault current, out from this IED. The fault current can be too low due to an opened
breaker or high-positive and/or zero-sequence source impedance behind this IED. To overcome
these conditions, weak-end infeed (WEI) echo logic is used. The weak-end infeed echo is limited to
200 ms to avoid channel lockup.
ECRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
IEC06000289-3-en.vsd
IEC06000289 V3 EN-US
12.5.4 Signals
PID-3522-INPUTSIGNALS v9
PID-3522-OUTPUTSIGNALS v8
12.5.5 Settings
PID-3522-SETTINGS v9
The directional comparison function contains logic for blocking overreaching and permissive
overreaching schemes.
The circuits for the permissive overreaching scheme contain logic for current reversal and weak-end
infeed functions. These functions are not required for the blocking overreaching scheme.
Use the independent or inverse time functions in the directional earth fault protection module to get
backup tripping in case the communication equipment malfunctions and prevents operation of the
directional comparison logic.
Connect the necessary signal from the autorecloser for blocking of the directional comparison
scheme, during a single-phase autoreclosing cycle, to the BLOCK input of the directional comparison
module.
The fault current reversal logic uses a reverse directed element, connected to the input signal IRV,
which recognizes that the fault is in reverse direction. When the reverse direction element is
activated the output signal IRVL is activated which is shown in Figure 311. The logic is now ready to
handle a current reversal without tripping. The output signal IRVL will be connected to the block input
on the permissive overreaching scheme.
When the fault current is reversed on the healthy line, IRV is deactivated and IRVBLK is activated.
The tDelayRev timer delays the reset of the output signal. The signal blocks operation of the
overreach permissive scheme for residual current and thus prevents unwanted operation caused by
fault current reversal.
BLOCK
IRVBLK
tDelayRev
tPickUpRev 10 ms tPickUpRev AND t
IRVL
IRV
t t t
CurrRev = On
IEC09000031-4-en.vsd
IEC09000031 V4 EN-US
The weak-end infeed function can be set to send only an echo signal (WEI=Echo) or an echo signal
and a trip signal (WEI=Echo & Trip). The corresponding logic diagrams are depicted in Figure 312
and Figure 313.
The weak-end infeed logic uses normally a reverse and a forward direction element, connected to
WEIBLK2 via an OR-gate. If neither the forward nor the reverse directional measuring element is
activated during the last 200 ms, the weak-end infeed logic echoes back the received permissive
signal as shown in Figure 312 and Figure 313. The weak-end infeed logic also echoes the received
permissive signal when CBOPEN is high (local breaker opens) prior to faults appeared at the end of
line.
If the forward or the reverse directional measuring element is activated during the last 200 ms, the
fault current is sufficient for the IED to detect the fault with the earth fault function that is in operation.
CR
BLOCK AND
VTSZ
OR
tPickUpWEI
WEIBLK1
t AND 50 ms 200 ms
AND
OR t t ECHO
200 ms AND
CRL t
WEIBLK2
AND
1500 ms
CBOPEN OR
t
WEI = Echo
IEC09000032-6-en.vsd
IEC09000032 V6 EN-US
Figure 312: Simplified logic diagram for weak-end infeed logic - Echo
With the WEI= Echo & Trip setting, the logic sends an echo according to the diagram above. Further,
it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled and the neutral
point voltage is above the set operate value for 3U0> .
The voltage signal that is used to calculate the zero sequence voltage is set in the earth fault function
which is in operation.
BLOCK
VTSZ
OR
tPickUpWEI
WEIBLK1 t AND 50 ms 200 ms
AND
OR t t ECHO
200 ms AND
t
CRL
AND
WEIBLK2 1500 ms
OR
t
CBOPEN
AND
ST3U0
15 ms TRWEI
a>b AND
3U0> t
WEI = Echo&Trip
IEC09000020-6-en.vsd
IEC09000020 V6 EN-US
Figure 313: Simplified logic diagram for weak-end infeed logic - Echo & Trip
The weak-end infeed echo sent to the strong line end has a maximum duration of 200 ms. When this
time period has elapsed, the conditions that enable the echo signal to be sent are set to zero for a
time period of 50 ms. This avoids ringing action if the weak-end echo is selected for both line ends.
Section 13 Logic
13.1 Tripping logic SMPPTRC IP14576-1 v4
13.1.2 Identification
SEMOD56226-2 v7
A function block for protection tripping and general start indication is always provided as a basic
function for each circuit breaker. It provides a settable pulse prolongation time to ensure a trip pulse
of sufficient length, as well as all functionality necessary for correct co-operation with autoreclosing
functions.
The trip function block includes a settable latch function for the trip signal and circuit breaker lockout.
The trip function can collect start and directional signals from different application functions. The
aggregated start and directional signals are mapped to the IEC 61850 logical node data model.
The function also captures and reports the magnitude, angle of the voltage and current of each
phase and neutral at the instant of fault to IEC 61850, LHMI, signal monitoring tool triggered by
TRINx signal activation.
SMPPTRC
I3P TRIP
U3P TRL1
BLOCK TRL2
BLKLKOUT TRL3
TRINALL TRN
TRINL1 TR1P
TRINL2 TR2P
TRINL3 TR3P
TRINN CLLKOUT
PSL1 START
PSL2 STL1
PSL3 STL2
1PTRZ STL3
1PTREF STN
P3PTR FW
SETLKOUT REV
RSTLKOUT FLTIL1MAG
STDIR FLTIL1ANG
RSTFLTUI FLTIL2MAG
FLTIL2ANG
FLTIL3MAG
FLTIL3ANG
FLTINMAG
FLTINANG
FLTUL1MAG
FLTUL1ANG
FLTUL2MAG
FLTUL2ANG
FLTUL3MAG
FLTUL3ANG
FLTUNMAG
FLTUNANG
IEC05000707 V6 EN-US
13.1.5 Signals
PID-8233-INPUTSIGNALS v1
PID-8233-OUTPUTSIGNALS v1
13.1.6 Settings
PID-8233-SETTINGS v1
There is a single input (TRINALL) through which all trip output signals from the protection functions
within the IED or from external protection functions via one or more of the IEDs' binary inputs are
routed. It has a three-phase trip output (TRIP) to connect to one or more of the IEDs' binary outputs,
as well as to other functions within the IED requiring this signal.
P3PTR
TRINN
SETLKOUT
RSTLKOUT
P3PTR
TRINN
SETLKOUT
RSTLKOUT
IEC10000266 V4 EN-US
The input TRINN can be activated from functions which provide data for trip in the neutral.
The inputs 1PTRZ and 1PTREF enable single- phase and two-phase tripping for those functions
which do not have their own phase selection capability (that is, which have just a single trip output).
An example of such a protection function is the residual overcurrent protection. The SMPPTRC
function has two inputs for these functions, one for impedance tripping (1PTRZ used for carrier-aided
tripping commands from the scheme communication logic), and one for earth fault tripping (1PTREF
used for tripping from a residual overcurrent protection). External phase selection for these two trip
signals shall be provided via inputs PSL1, PSL2, and PSL3.
A timer tWaitForPHS, secures a three-phase trip command for these two trip signals in the absence
of the external phase selection signals.
The SMPPTRC function has three trip outputs TRL1, TRL2, TRL3 (besides the three-phase trip
output TRIP), one per phase, to connect to one or more of the IEDs’ binary outputs, as well as to
other functions within the IED requiring these signals. These three output signals shall be used as
trip signals for individual circuit breaker poles. These signals are important for cooperation with the
autorecloser SMBRREC function.
The outputs TRN and TRIP are activated when the input TRINN is activated.
The SMPPTRC function is equipped with logic which secures correct operation for evolving faults as
well as for reclosing on to persistent faults. A binary input P3PTR is provided which will force all
tripping to be three-phase. This input is required in order to cooperate with the SMBRREC function.
In multi-breaker arrangements, one SMPPTRC function block is used for each circuit breaker.
If external conditions are required to initiate a circuit breaker lockout, it can be achieved by activating
input SETLKOUT. The settingAutoLock = Off means that the internal three-phase trip will not activate
lockout so only initiation of the input SETLKOUT will result in lockout. This is normally the case for
overhead line protection where most faults are transient. Unsuccessful autoreclosing and back-up
zone tripping can in such cases be connected to initiate lockout by activating the input SETLKOUT.
If CLLKOUT is set by an external trip signal from another protection function, that is by activating
SETLKOUT input, or internally by a three-phase trip, that is with the setting AutoLock = On and the
setting TripLockout = On, then also all trip outputs are set latched.
The lockout can manually be reset after checking the primary fault by activating the reset lockout
input RSTLKOUT.
The BLKLKOUT input blocks the circuit breaker lockout output CLLKOUT.
The following three sequences in the following table shows the interaction between the inputs
BLOCK, BLKLKOUT, SETLKOUT, RSTLKOUT and the output CLLKOUT.
Inputs Output
BLOCK BLKLKOUT SETLKOUT RSTLKOUT CLLKOUT
Active - - - False
Active - Active - False
- - - - False
- - Active - True
Active - - - True
Active - - Activated True
- - - - True
- Active - - False
Table continues on next page
Inputs Output
BLOCK BLKLKOUT SETLKOUT RSTLKOUT CLLKOUT
- Active Active - False
- - - - True
- - - Activated False
Directional data
Merged directional data from application functions can be provided to the trip function (SMPPTRC)
via the start matrix function (SMAGAPC) connected to the STDIR input.
The directional input signal STDIR is a coded integer signal which contains 15 individual Boolean
signals, see Figure 321:
STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (start L1)
b4= FWL1 (forward L1)
b5= REVL1 (reverse L1)
b6= STL2 (start L2)
b7= FWL2 (forward L2)
b8= REVL2 (reverse L2)
b9= STL3 (start L3)
b10= FWL3 (forward L3)
b11= REVL3 (reverse L3)
b12= STN (start N)
b13= FWN (forward N)
b14= REVN (reverse N)
The indications for general start START and phase-wise starts STL1, STL2 and STL3, and neutral
STN and general directional forward FW and reverse REV are all available as outputs on the trip
function.
All start and directional outputs are mapped to the IEC 61850 logical node data model of the trip
function. The time stamping is updated each time an operate or start signal is changed:
dirGeneral
0 unknown
1 forward
2 backward (reverse)
3 both
• The phase wise directional outputs (DIRL1, DIRL2, DIRL3, and DIRN) are mapped as:
TRIP
Instantaneous samples
FLTIL1MAG
IL1
FLTIL2MAG
IL2
FLTIL3MAG
IL3
GUID-8178BD9C-69CB-4C1C-905E-59626FD6B5ED V1 EN-US
If the signal RESET is HIGH, SMPPTRC will set all the reported current magnitudes to
-1.000A, voltage magnitudes to -0.001kV, current and voltage angles to -1.000deg values
respectively.
If the group connections of current and voltage are not connected to SMAI or the signal
quality is bad, the SMPPTRC function will set all the reported current magnitudes to
-2.000A, voltage magnitudes to -0.002kV, current and voltage angles to -2.000deg values
respectively, indicating Invalid data.
tTripMin
BLOCK TRIPALL
OR
AND t
TRINL1
TRINL2
TRINL3
TRINALL OR
1PTREF
1PTRZ
IEC05000517 V6 EN-US
TRINALL
TRINL1
OR L1TRIP
PSL1
AND
TRINL2
OR L2TRIP
PSL2
AND
TRINL3
OR L3TRIP
PSL3
AND
-LOOP
OR OR
OR
AND
AND
OR
tWaitForPHS
-LOOP t
OR
1PTRE AND
F AND
1PTRZ OR
IEC10000056 V6 EN-US
tTripMin
BLOCK
OR TRIPL1
L1TRIP AND t OR
tEvolvingFault
t TRIP
AND
L2TRIP
L3TRIP
OR
P3PTR
IEC17000065 V3 EN-US
Figure 319: Simplified additional logic per phase, Program = 1ph/3ph or 1ph/2ph/3ph
TRIPL1
OR TRL1
OR
TRIPL2
OR TRL2
OR
TRIPL3
OR TRL3
OR
TRIPN TRN
OR OR TRIP
OR
TRIPALL
OR -LOOP
OR
-LOOP AND
AND TR3P
OR
AND OR
AND
10 ms To ensure that the
fault is single phase TR1P
AND t
AND
AND OR AND
OR
-LOOP
AND
TripLockout
AND AND
AutoLock -LOOP
SETLKOUT OR
OR AND CLLKOUT
AND AND
RSTLKOUT
AND
AND
BLOCK
BLKLKOUT
IEC17000066 V4 EN-US
Directional logic
IntToBits
STDIR START START
in b0
FW STL1
b1
REV STL2
b2
STL1 STL3
b3
FWL1 STN
b4
REVL1
b5
STL2
b6
FWL2 FW
b7
REVL2 BitsToInt
b8 dirGeneral (61850 Standard)
STL3
b9 0 = unknown
FWL3 b0 out
b10 DIR 1 = forward
REVL3 b1 2 = backward (reverse)
b11
STN 3 = both
b12
FWN REV
b13
REVN
b14
b15
AND
XOR
AND
XOR
AND
IEC16000179 V3 EN-US
The Start Matrix (SMAGAPC) merges start and directional output signals from different application
functions and creates a common start and directional output signal (STDIR) to be connected to the
Trip function, see Figure 322.
The purpose of this functionality is to provide general start and directional information for the IEC
61850 trip logic data model SMPPTRC.
SMAGAPC
BLOCK STDIR
STDIR1
STDIR2
STDIR3
STDIR4
STDIR5
STDIR6
STDIR7
STDIR8
STDIR9
STDIR10
STDIR11
STDIR12
STDIR13
STDIR14
STDIR15
STDIR16
IEC16000165-1-en.vsdx
IEC16000165 V1 EN-US
13.2.4 Signals
PID-6906-INPUTSIGNALS v2
PID-6906-OUTPUTSIGNALS v2
13.2.5 Settings
PID-6906-SETTINGS v2
Start matrix
The Start Matrix function requires that a protection function delivers the directional output signals in a
fixed order to Start Matrix.
A directional input signal STDIRX of the Start Matrix is of type word. Each input contains 14
individual Boolean signals, which are positioned as, see Figure 324.
STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (startL1)
b4= FWL1 (forwardL1)
b5= REVL1 (reverseL1)
b6= STL2 (startL2)
b7= FWL2 (forwardL2)
b8= REVL2 (reverseL2)
b9= STL3 (startL3)
b10= FWL3 (forwardL3)
b11= REVL3 (reverseL3)
b12= STN (startN)
b13= FWN (forwardN)
b14= REVN (reverseN)
The StartMatrix function contains two function: the START criteria and the DIRECTION criteria, see
Figure 323.
The START criteria is to ensure that a forward and reverse signal shall come together with a start
signal to pass through the block. This is done individually for each protection function connected to
the StartMatrix via the STDIRX inputs, see Figure 324.
All STDIROUT signals are then connected via an OR gate, see Figure 323.
The DIRECTION criteria allow either forward or reverse (phase-wise forward FWLx or forward
neutral FWN or phase-wise reverse REVLx or reverse neutral REVN) to pass through to the general
STDIR output. If both forward and reverse are active phase-wise (e.g. REVLx=FWLx = True) or at
neutral (e.g. FWN = REVN = True) at the same time, none will be shown, see Figure 325.
SMAGAPC
(StartMatrix)
START Criteria
STDIR1
STDIRX STDIROUT
START Criteria
STDIR2
STDIRX STDIROUT
START Criteria
STDIR3
STDIRX STDIROUT
DIRECTION Criteria
STDIR
≥1 STDIRIN STDIR
START Criteria
STDIR4
STDIRX STDIROUT
START Criteria
STDIR5
STDIRX STDIROUT
START Criteria
STDIR6
STDIRX STDIROUT
START Criteria
STDIR7
STDIRX STDIROUT
START Criteria
STDIR8
STDIRX STDIROUT
START Criteria
STDIR9
STDIRX STDIROUT
START Criteria
STDIR10
STDIRX STDIROUT
START Criteria
STDIR11
STDIRX STDIROUT
START Criteria
STDIR12
STDIRX STDIROUT
START Criteria
STDIR13
STDIRX STDIROUT
START Criteria
STDIR14
STDIRX STDIROUT
START Criteria
STDIR15
STDIRX STDIROUT
START Criteria
STDIR16
STDIRX STDIROUT
IEC16000161-2-en.vsdx
IEC16000161 V2 EN-US
START Criteria
START (in)
STL1 (in)
STL2 (in) ≥1 START (out)
STL3 (in)
IntToBits STN (in) BitsToint
STDIRX STDIROUT
in b0 START (in) STL1 (out) START (out) b0 out
b1 FW (in) STL2 (out) FW (out) b1
b2 REV (in) STL3 (out) REV (out) b2
b3 STL1 (in) STN (out) STL1 (out) b3
b4 FWL1 (in) FWL1 (out) b4
b5 REVL1 (in) REVL1 (out) b5
&
b6 STL2 (in) FW (in) STL2 (out) b6
b7 FWL2 (in) FWL2 (out) b7
≥1 FW (out)
b8 REVL2 (in) REVL2 (out) b8
b9 STL3 (in) STL3 (out) b9
b10 FWL3 (in) FWL3 (out) b10
b11 REVL3 (in) & REVL3 (out) b11
REV (in)
b12 STN (in) STN (out) b12
b13 FWN (in) ≥1 REV (out) FWN (out) b13
b14 REVN (in) REVN (out) b14
b15 N/A FALSE b15
IEC16000162-2-en.vsdx
IEC16000162 V2 EN-US
DIRECTION Criteria
FWL1 (in)
=1
REVL1 (in)
FWL2 (in)
=1
REVL2 (in)
FWL3 (in)
=1
REVL3 (in)
FWN (in)
=1
REVN (in)
IEC16000163-2-en.vsdx
IEC16000163 V2 EN-US
STARTCOMB
To make it possible to provide the directional information from a protection function, a STARTCOMB
block is used in between the application function and the Start Matrix function.
The STARTCOMB function has one block input and 14 Boolean inputs that convert the 14 Boolean
inputs into a WORD output STDIR, see Figure 326.
STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (startL1)
b4= FWL1 (forwardL1)
b5= REVL1 (reverseL1)
b6= STL2 (startL2)
b7= FWL2 (forwardL2)
b8= REVL2 (reverseL2)
b9= STL3 (startL3)
b10= FWL3 (forwardL3)
b11= REVL3 (reverseL3)
b12= STN (startN)
b13= FWN (forwardN)
b14= REVN (reverseN)
STARTCOMB
BLOCK STDI R
START
FW
REV
STL1
FWL1
REVL1
STL2
FWL2
REVL2
STL3
FWL3
REVL3
STN
FWN
REVN
IEC16000166-2-en.vsdx
IEC16000166 V2 EN-US
Protection functions
Some protection functions are provided with start and directional outputs, for example:
Connection example
In Figure 327 below is an example how to connect start and directional signals from protection
functions via STARTCOMB and SMAGAPC to SMPPTRC.
SMAGAPC
STARTCOMB BLOCK STDIR
PROTECTION 1 BLOCK STDIR STDIR1
START START STDIR2
FW FW STDIR3
REV REV STDIR4
STL1 STDIR5
FWL1 STDIR6 SMPPTRC
REVL1 STDIR7 BLOCK TRIP
STL2 STDIR8 BLKLKOUT TRL1
FWL2 STDIR9 TRIN TRL2
REVL2 STDIR10 TRINL1 TRL3
STL3 STDIR11 TRINL2 TR1P
FWL3 STDIR12 TRINL3 TR2P
REVL3 STDIR13 PSL1 TR3P
STN STDIR14 PSL2 CLLKOUT
FWN STDIR15 PSL3 START
REVN STDIR16 1PTRZ STL1
1PTREF STL2
P3PTR STL3
STARTCOMB SETLKOUT STN
BLOCK STDIR RSTLKOUT FW
START STDIR REV
FW
PROTECTION 2 REV
STL1 STL1
FWL1 FWL1
REVL1 REVL1
STL2 STL2
FWL2 FWL2
REVL2 REVL2
STL3 STL3
FWL3 FWL3
REVL3 REVL3
STN
FWN
REVN
STARTCOMB
BLOCK STDIR
START
FW
REV
STL1
FWL1
REVL1
STL2
FWL2
REVL2
STL3
PROTECTION 4
FWL3
-
PROTECTION 3 REVL3
STDIR
STN STN
-
FWN FWN
-
REVN REVN
IEC16000164-2-en.vsdx
IEC16000164 V2 EN-US
13.3.1 Identification
SEMOD167882-2 v4
The trip matrix logic function has 3 output signals and these outputs can be connected to physical
tripping outputs according to the specific application needs for settable pulse or steady output.
TMAGAPC
BLOCK OUTPUT1
BLK1 OUTPUT2
BLK2 OUTPUT3
BLK3
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32
IEC13000197 V2 EN-US
13.3.4 Signals
PID-6513-INPUTSIGNALS v4
PID-6513-OUTPUTSIGNALS v5
13.3.5 Settings
PID-6513-SETTINGS v4
The trip matrix logic (TMAGAPC) block is provided with 32 input signals and 3 output signals. The
function block incorporates internal logic OR gates in order to provide grouping of connected input
signals to the three output signals from the function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical value 1 the first output
signal (OUTPUT1) will get logical value 1.
2. when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical value 1 the
second output signal (OUTPUT2) will get logical value 1.
3. when any one of all 32 input signals (INPUT1 to INPUT32) has logical value 1 the third output
signal (OUTPUT3) will get logical value 1.
PulseTime
t
&
ModeOutput1=Pulsed
INPUT 1
OUTPUT 1
Ondelay Offdelay
&
1
1 t t
PulseTime
t
&
ModeOutput2=Pulsed
OUTPUT 2
Ondelay Offdelay
&
1
1 t t
PulseTime
t
&
ModeOutput3=Pulsed
OUTPUT 3
Ondelay Offdelay
&
1
1 t t
IEC09000612 V4 EN-US
The group alarm logic function (ALMCALH) is used to route several alarm signals to a common
indication, LED and/or contact, in the IED.
ALMCALH
BLOCK ALARM
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
IEC13000181 V2 EN-US
13.4.4 Signals
PID-6510-INPUTSIGNALS v5
PID-6510-OUTPUTSIGNALS v6
13.4.5 Settings
PID-6510-SETTINGS v5
The logic for group alarm ALMCALH block is provided with 16 input signals and one ALARM output
signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output ALARM signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the ALARM output
signal will get logical value 1.
The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.
Input 1
200 ms
ALARM
1 t
IEC13000191 V2 EN-US
The group warning logic function (WRNCALH) is used to route several warning signals to a common
indication, LED and/or contact, in the IED.
WRNCALH
BLOCK WARNING
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
IEC13000182 V2 EN-US
13.5.4 Signals
PID-4127-INPUTSIGNALS v3
PID-4127-OUTPUTSIGNALS v3
13.5.5 Settings
PID-4127-SETTINGS v3
The logic for group warning WRNCALH block is provided with 16 input signals and 1 WARNING
output signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output WARNING signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the WARNING output
signal will get logical value 1.
The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.
INPUT1
200 ms
WARNING
³1 t
INPUT16
IEC13000192-1-en.vsd
IEC13000192 V1 EN-US
The group indication logic function (INDCALH) is used to route several indication signals to a
common indication, LED and/or contact, in the IED.
INDCALH
BLOCK IND
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
IEC13000183 V2 EN-US
13.6.4 Signals
PID-4128-INPUTSIGNALS v4
PID-4128-OUTPUTSIGNALS v4
13.6.5 Settings
PID-4128-SETTINGS v4
The logic for group indication INDCALH block is provided with 16 input signals and 1 IND output
signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output IND signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the IND output signal
will get logical value 1.
The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.
INPUT1
200 ms
IND
1 t
INPUT16
IEC13000193 V2 EN-US
The basic configurable logic blocks do not propagate the time stamp and quality of signals. The list
below shows a summary of the function blocks and their features.
The logic blocks are available as a part of an extension logic package. The list below is a summary of
the function blocks and their features.
• AND function block. The AND function is used to form general combinatory expressions with
boolean variables. The AND function block has up to four inputs and two outputs.
• GATE function block is used for whether or not a signal should be able to pass from the input to
the output.
• INVERTER function block that inverts the input signal to the output.
• LLD function block. Loop delay used to delay the output signal one execution cycle.
• OR function block. The OR function is used to form general combinatory expressions with
boolean variables. The OR function block has up to six inputs and two outputs. One of the
outputs is inverted.
• PULSETIMER function block can be used, for example, for pulse extensions or limiting of
operation of outputs, settable pulse time.
• RSMEMORY function block is a flip-flop that can reset or set an output from two inputs
respectively. Each block has two outputs where one is inverted. The memory setting controls if,
after a power interruption, the flip-flop resets or returns to the state it had before the power
interruption. RESET input has priority.
• SRMEMORY function block is a flip-flop that can set or reset an output from two inputs
respectively. Each block has two outputs where one is inverted. The memory setting controls if
the block's output should reset or return to the state it was, after a power interruption. The SET
input has priority if both SET and RESET inputs are operated simultaneously.
• TIMERSET function has pick-up and drop-out delayed outputs related to the input signal. The
timer has a settable time delay and must be On for the input signal to activate the output with
the appropriate time delay.
• XOR is used to generate combinatory expressions with boolean variables. XOR has two inputs
and two outputs. One of the outputs is inverted. The output signal OUT is 1 if the input signals
are different and 0 if they are the same.
M11453-3 v4
The AND function is used to form general combinatory expressions with boolean variables. The AND
function block has up to four inputs and two outputs. One of the outputs is inverted.
AND
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
IEC14000071 V2 EN-US
13.7.1.2 Signals
PID-3437-INPUTSIGNALS v7
PID-3437-OUTPUTSIGNALS v7
M11489-3 v2
The Controllable gate function block (GATE) is used for controlling if a signal should be able to pass
from the input to the output or not depending on a setting.
GATE
INPUT OUT
IEC04000410-2-en.vsd
IEC04000410 V2 EN-US
13.7.2.2 Signals
PID-3801-INPUTSIGNALS v6
PID-3801-OUTPUTSIGNALS v5
13.7.2.3 Settings
PID-3801-SETTINGS v6
INV
INPUT OUT
IEC04000404 V3 EN-US
13.7.3.2 Signals
PID-3803-INPUTSIGNALS v5
PID-3803-OUTPUTSIGNALS v4
GUID-64B24094-010D-4B8F-8B7B-DDD49499AAE5 v3
The Logic loop delay function block (LLD) function is used to delay the output signal one execution
cycle, that is, the cycle time of the function blocks used.
LLD
INPUT OUT
IEC15000144 V2 EN-US
13.7.4.2 Signals
PID-3805-INPUTSIGNALS v5
PID-3805-OUTPUTSIGNALS v5
M11449-3 v2
The OR function is used to form general combinatory expressions with boolean variables. The OR
function block has up to six inputs and two outputs. One of the outputs is inverted.
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
IEC04000405 V3 EN-US
13.7.5.2 Signals
PID-3806-INPUTSIGNALS v5
PID-3806-OUTPUTSIGNALS v5
M11466-3 v3
The pulse (PULSETIMER) function can be used, for example, for pulse extensions or limiting the
operation time of outputs. The PULSETIMER has a settable length. When the input is 1, the output
will be 1 for the time set by the time delay parameter t. Then it returns to 0.
PULSETIMER
INPUT OUT
IEC04000407 V4 EN-US
13.7.6.2 Signals
PID-6985-INPUTSIGNALS v1
PID-6985-OUTPUTSIGNALS v1
13.7.6.3 Settings
PID-6985-SETTINGS v1
GUID-4C804DEA-3C83-4C20-82C6-BAD03BD48242 v6
The Reset-set with memory function block (RSMEMORY) is a flip-flop with memory that can reset or
set an output from two inputs respectively. Each RSMEMORY function block has two outputs, where
one is inverted. The memory setting controls if, after a power interruption, the flip-flop resets or
returns to the state it had before the power interruption. For a Reset-Set flip-flop, RESET input has
higher priority over SET input.
RSMEMORY
SET OUT
RESET NOUT
IEC09000294 V2 EN-US
13.7.7.2 Signals
PID-3811-INPUTSIGNALS v5
PID-3811-OUTPUTSIGNALS v5
13.7.7.3 Settings
PID-3811-SETTINGS v5
M11485-3 v4
The Set-reset with memory function block (SRMEMORY) is a flip-flop with memory that can set or
reset an output from two inputs respectively. Each SRMEMORY function block has two outputs,
where one is inverted. The memory setting controls if, after a power interruption, the flip-flop resets or
returns to the state it had before the power interruption. The input SET has priority.
SRMEMORY
SET OUT
RESET NOUT
IEC04000408 V3 EN-US
13.7.8.2 Signals
PID-3813-INPUTSIGNALS v5
PID-3813-OUTPUTSIGNALS v5
13.7.8.3 Settings
PID-3813-SETTINGS v5
M11494-3 v3
The Settable timer function block (TIMERSET) timer has two outputs for the delay of the input signal
at drop-out and at pick-up. The timer has a settable time delay. It also has an Operation setting On
and Off that controls the operation of the timer.
Input
tdelay
On
Off
tdelay
t
IEC08000289 V3 EN-US
TIMERSET
INPUT ON
OFF
IEC04000411 V3 EN-US
13.7.9.2 Signals
PID-6976-INPUTSIGNALS v1
PID-6976-OUTPUTSIGNALS v1
13.7.9.3 Settings
PID-6976-SETTINGS v1
M11477-3 v4
The exclusive OR function (XOR) is used to generate combinatory expressions with boolean
variables. XOR has two inputs and two outputs. One of the outputs is inverted. The output signal
OUT is 1 if the input signals are different and 0 if they are the same.
XOR
INPUT1 OUT
INPUT2 NOUT
IEC04000409 V3 EN-US
13.7.10.2 Signals
PID-3817-INPUTSIGNALS v2
PID-3817-OUTPUTSIGNALS v2
The Fixed signals function (FXDSIGN) has nine pre-set (fixed) output signals that can be used in the
configuration of an IED, either for forcing the unused inputs in other function blocks to a certain level/
value, or for creating certain logic. Boolean, integer, floating point, string types of signals are
available.
FXDSIGN
OFF
ON
INTZERO
INTONE
INTALONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
IEC05000445-3-en.vsd
IEC05000445 V3 EN-US
13.8.3 Signals
PID-6191-OUTPUTSIGNALS v6
13.8.4 Settings
PID-1325-SETTINGS v12
The function does not have any settings available in Local HMI or Protection and Control IED
Manager (PCM600).
13.9.1 Identification
SEMOD175721-2 v2
Boolean to integer conversion, 16 bit (B16I) is used to transform a set of 16 boolean (logical) signals
into an integer.
B16I
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
IEC07000128 V3 EN-US
13.9.4 Signals
PID-3606-INPUTSIGNALS v4
PID-3606-OUTPUTSIGNALS v3
The function does not have any parameters available in the local HMI or PCM600.
The Boolean 16 to integer conversion function (B16I) will transfer a combination of up to 16 binary
inputs INx, where 1≤x≤16, to an integer. Each INx represents a value according to the table below
from 0 to 32768. This follows the general formula: INx = 2x-1 where 1≤x≤16. The sum of all the values
on the activated INx will be available on the output OUT as a sum of the integer values of all the
inputs INx that are activated. OUT is an integer. When all INx (where 1≤x≤16) are activated, that is =
Boolean 1, it corresponds to that integer 65535 is available on the output OUT. The B16I function is
designed for receiving up to 16 booleans input locally. If the BLOCK input is activated, it will freeze
the output at the last value.
Values of each of the different OUTx from function block B16I for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output OUT on the
function block B16I
The sum of the numbers in column “Value when activated” when all INx (where 1≤x≤16) are active
that is=1; is 65535. 65535 is the highest boolean value that can be converted to an integer by the
B16I function block.
13.10.1 Identification
SEMOD175757-2 v6
Boolean to integer conversion with logical node representation, 16 bit (BTIGAPC) is used to
transform a set of 16 boolean (logical) signals into an integer. The block input will freeze the output at
the last value.
BTIGAPC
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
IEC13000303 V2 EN-US
13.10.4 Signals
PID-6944-INPUTSIGNALS v2
PID-6944-OUTPUTSIGNALS v2
The function does not have any parameters available in the local HMI or PCM600.
The Boolean 16 to integer conversion with logic node representation function (BTIGAPC) will transfer
a combination of up to 16 binary inputs INx, where 1≤x≤16, to an integer. Each INx represents a
value according to the table below from 0 to 32768. This follows the general formula: INx = 2x-1
where 1≤x≤16. The sum of all the values on the activated INx will be available on the output OUT as
a sum of the integer values of all the inputs INx that are activated. OUT is an integer. When all INx
(where 1≤x≤16) are activated, that is = Boolean 1, it corresponds to that integer 65535 is available on
the output OUT. If the BLOCK input is activated, it will freeze the logical outputs at the last value.
Table 421: Values of each of the different OUTx from function block BTIGAPC for 1≤x≤16
13.11.1 Identification
SEMOD167941-2 v3
Integer to boolean 16 conversion function (IB16) is used to transform an integer into a set of 16
boolean (logical) signals.
IB16
BLOCK OUT1
INP OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
IEC06000501 V4 EN-US
13.11.4 Signals
PID-6938-INPUTSIGNALS v1
PID-6938-OUTPUTSIGNALS v1
The function does not have any parameters available in local HMI or Protection and Control IED
Manager (PCM600)
With integer 15 on the input INP the OUT1 = OUT2 = OUT3= OUT4 =1 and the remaining OUTx = 0
for (5≤x≤16).
OUTx represents a value when activated. The value of each of the OUTx is in accordance with the
table IB16_1. When not activated the OUTx has the value 0.
In the above example when integer 15 is on the input INP the OUT1 has a value =1, OUT2 has a
value =2, OUT3 has a value =4 and OUT4 has a value =8. The sum of these OUTx is equal to 1 + 2
+ 4 + 8 = 15.
This follows the general formulae: The sum of the values of all OUTx = 2x-1 where 1≤x≤16 will be
equal to the integer value on the input INP.
The Integer to Boolean 16 conversion function (IB16) will transfer an integer with a value between 0
to 65535 connected to the input INP to a combination of activated outputs OUTx where 1≤x≤16. The
sum of the values of all OUTx will then be equal to the integer on input INP. The values of the
different OUTx are according to the table below. When an OUTx is not activated, its value is 0.
When all OUTx where 1≤x≤16 are activated that is = Boolean 1 it corresponds to that integer 65535
is connected to input INP. The IB16 function is designed for receiving the integer input locally. If the
BLOCK input is activated, it will freeze the logical outputs at the last value.
Values of each of the different OUTx from function block IB16 for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output OUT on the
function block IB16.
The sum of the numbers in column “Value when activated” when all OUTx (where x = 1 to 16) are
active that is=1; is 65535. 65535 is the highest integer that can be converted by the IB16 function
block.
13.12.1 Identification
SEMOD167944-2 v5
Integer to boolean conversion with logic node representation function (ITBGAPC) is used to
transform an integer which is transmitted over IEC 61850 and received by the function to 16 boolean
(logic) output signals.
ITBGAPC function can only receive remote values over IEC 61850 when the R/L (Remote/Local)
push button on the front HMI indicates that the control mode for the operator is in position R (Remote
i.e. the LED adjacent to R is lit), and the corresponding signal is connected to the input PSTO
ITBGAPC function block. The input BLOCK will freeze the output at the last received value and
blocks new integer values to be received and converted to binary coded outputs.
ITBGAPC
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
IEC14000012 V2 EN-US
13.12.4 Signals
PID-3627-INPUTSIGNALS v7
PID-3627-OUTPUTSIGNALS v7
13.12.5 Settings
GUID-F573CA16-4821-4203-970A-F7D01AF5E63B v1
This function does not have any setting parameters.
An example is used to explain the principle of operation: With integer 15 sent to and received by the
ITBGAPC function on the IEC 61850 the OUTx changes from 0 to 1 on each of the OUT1; OUT2
OUT3 and OUT4. All other OUTx (5≤x≤16) remains 0. The boolean interpretation of this is
represented by the assigned values of each of the outputs OUT1 = 1; and OUT2 = 2; and OUT3= 4;
and OUT4 = 8. The sum of these OUTx (1≤x≤4) is equal to the integer 15 received via the IEC 61850
network. The remaining OUTx = 0 for (5≤x≤16).
OUTx represents a value when activated. The value of each of the OUTx is in accordance with the
Table 428. When not activated the OUTx has the value 0.
The value of each OUTx for 1≤x≤16 (1≤x≤16) follows the general formulae: OUTx = 2x-1 The sum of
the values of all activated OUTx = 2x-1 where 1≤x≤16 will be equal to the integer value received over
IEC 61850 to the ITBGAPC_1 function block.
The Integer to boolean conversion with logical node representation, 16 bit function (ITBGAPC) will
transfer an integer with a value between 0 to 65535 communicated via IEC 61850 and connected to
the ITBGAPC function block to a combination of activated outputs OUTx where 1≤x≤16. The values
represented by the different OUTx are according to Table 428. When an OUTx is not activated, its
value is 0.
The ITBGAPC function is designed for receiving the integer input from a station computer - for
example, over IEC 61850. If the BLOCK input is activated, it will freeze the logical outputs at the last
value.
The sum of the numbers in column “Value when activated” when all OUTx (1≤x≤16) are active equals
65535. This is the highest integer that can be converted to boolean by the ITBGAPC function block.
The operator position input (PSTO) determines the operator place. The integer number that is
communicated to the ITBGAPC can only be written to the block while the PSTO is in position
“Remote”. If PSTO is in position ”Off” or ”Local”, then no changes are applied to the outputs.
Elapsed Time Integrator (TEIGAPC) function is a function that accumulates the elapsed time when a
given binary signal has been high, see also Figure 347.
BLOCK
RESET
IN Time Integration ACCTIME
with Retain
q-1
a
OVERFLOW
AND
a>b
999 999 s b
a
WARNING
AND
a>b
tWarning b
a
ALARM
AND
a>b
tAlarm b
IEC13000290 V2 EN-US
TEIGAPC
BLOCK WARNING
IN ALARM
RESET OVERFLOW
ACCTIME
IEC14000014-1-en.vsd
IEC14000014 V1 EN-US
13.13.4 Signals
PID-6836-INPUTSIGNALS v3
PID-6836-OUTPUTSIGNALS v4
13.13.5 Settings
PID-6836-SETTINGS v2
• time integration, accumulating the elapsed time when a given binary signal has been high
• blocking and reset of the total integrated time
• supervision of limit transgression and overflow, the overflow limit is fixed to 999999.9 seconds
• retaining of the integrated value
Figure 349 describes the simplified logic of the function where the block “Time Integration“ covers the
logics for the first two items listed above while the block “Transgression Supervision Plus
Retain“ contains the logics for the last two.
Loop Delay
tWarning
OVERFLOW
tAlarm
Transgression Supervision WARNING
Plus Retain
ALARM
BLOCK
RESET ACCTIME
Time Integration
IN
Loop Delay
IEC12000195-4-en.vsd
IEC12000195 V4 EN-US
The ACCTIME output represents the integrated time in seconds while tOverflow, tAlarm and tWarning
are the time limit parameters in seconds.
tAlarm and tWarning are user settable limits. They are also independent, that is, there is no check if
tAlarm > tWarning.
tAlarm and tWarning are possible to be defined with a resolution of 10 ms, depending on the level of
the defined values for the parameters.
The limit for the overflow supervision is fixed at 999999.9 seconds. The outputs freeze if an overflow
occurs.
In principle, a shorter function cycle time, longer integrated time length or more pulses may lead to
reduced accuracy.
The function gives the possibility to monitor the level of integer values in the system relative to each
other or to a fixed value. It is a basic arithmetic function that can be used for monitoring, supervision,
interlocking and other logics.
INTCOMP
INPUT INEQUAL
REF INHIGH
INLOW
IEC15000052-1-en.vsdx
IEC15000052 V1 EN-US
13.14.4 Signals
PID-6928-INPUTSIGNALS v3
PID-6928-OUTPUTSIGNALS v3
13.14.5 Settings
PID-6928-SETTINGS v2
The selection of reference value for comparison is done through setting RefSource. If RefSource is
selected as "Input REF" then the reference value for comparison is taken from second input signal
(REF). If RefSource is selected as "Set Value" then the reference value for comparison is taken from
setting (SetValue).
The comparison can be done either between absolute values or signed values, which is governed by
on the setting EnaAbs. If EnaAbs is selected as "Absolute" then both input and reference values are
converted into absolute values and comparison is done. If EnaAbs is selected as "Signed" then the
comparison is done without any conversion.
The function has three binary outputs representing the result of the comparison:
• If the input is above the reference value then INHIGH is set HIGH
• If the input is below the reference value then INLOW is set HIGH
• If the input is equal to reference value then INEQUAL is set HIGH
The function gives the possibility to monitor the level of real value signals in the system relative to
each other or to a fixed value. It is a basic arithmetic function that can be used for monitoring,
supervision, interlocking and other logics.
REALCOMP
INPUT INEQUAL
REF INHIGH
INLOW
IEC15000053-1-en.vsdx
IEC15000053 V1 EN-US
13.15.4 Signals
PID-7248-INPUTSIGNALS v2
PID-7248-OUTPUTSIGNALS v2
13.15.5 Settings
The selection of reference value for comparison is done through setting RefSource. If RefSource is
selected as "Input REF" then the reference value for comparison is taken from second input signal
(REF). If RefSource is selected as "Set Value" then the reference value for comparison is taken from
setting (SetValue).
Generally the inputs to the function are in units, but when the comparison is to be done with respect
to set level, then the user can scale the reference value in steps of 1000, as per the setting RefPrefix.
Internally the function handles the reference value for comparator as SetValue*RefPrefix.
Additionally the comparison can be done either between absolute values or signed values, which is
determined by the setting EnaAbs. If EnaAbs is selected as "Absolute" then both input and reference
values are converted into absolute values and then comparison is done. If EnaAbs is selected as
"Signed" then the comparison is done without absolute conversion.
This function has two settings EqualBandHigh and EqualBandLow to provide margins from reference
value for equal to condition. When the INPUT value is within high and low band around the reference
value, output INEQUAL will get set.
In order to avoid oscillations at boundary conditions of equal band low limit and high limit, hysteresis
has been provided. If the INPUT is above the equal high level margin including hysteresis, then
INHIGH will set. Similarly if the INPUT is below the equal low level margin including hysteresis, then
INLOW will set.
EqualBandHigh
Internal
Equal Band REF or SetValue Hysteresis for
equal band
EqualBandLow
IEC15000261 V1 EN-US
When EnaAbs is set as absolute comparison and SetValue is set less than 0.1% of the
set unit then INLOW output will never pick up. During the above mentioned condition, due
to marginal value for avoiding oscillations of function outputs, the INLOW output will
never set.
Hold minimum and maximum of input (HOLDMINMAX) function will acquire, compare and hold the
minimum and maximum values of INPUT as soon as the START input goes to 1, the outputs are
updated as long as the START is 1. After START goes to 0, the last updated value is stored. The
outputs are reset when the RESET is 1.
HOLDMAXMIN
HOLDMINMAX
INPUT MAX
START MIN
RESET
IEC21000053-1-en.vsdx
IEC21000053 V1 EN-US
13.16.4 Signals
GUID-5B941634-5868-427A-80F8-9CA5740D3039 v1
PID-7882-OUTPUTSIGNALS v1
The converter integer to real (INT_REAL) function can be used to convert integer to real values.
INT_REAL
INT_REAL
INT REAL
IEC21000055-1-en.vsdx
IEC21000055 V1 EN-US
13.17.4 Signals
PID-7883-INPUTSIGNALS v1
PID-7883-OUTPUTSIGNALS v1
The definable constant for logic function CONST_INT can be used to provide a constant output in an
integer format based on the set value in PST.
CONST_INT
CONST_INT
OUT
IEC21000056-1-en.vsdx
IEC21000056 V1 EN-US
13.18.4 Signals
PID-7894-OUTPUTSIGNALS v1
13.18.5 Settings
PID-7894-SETTINGS v1
Analog input selector for integer values (INTSEL) selects one out of eight possible integer inputs.
Each input (INPUTx) has its dedicated select input (SELx). The function provides the output for the
value of the selected input, and its respective select number (INSEL).
If more than one input is selected, the output will be the lowest in order INPUT value. If inputs are not
selected, the select value number shall be 0.
INTSEL
INTSEL
INPUT1 VALUE
INPUT2 INSEL
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
SEL1
SEL2
SEL3
SEL4
SEL5
SEL6
SEL7
SEL8
IEC21000057-1-en.vsdx
IEC21000057 V1 EN-US
13.19.4 Signals
PID-7884-INPUTSIGNALS v1
PID-7884-OUTPUTSIGNALS v1
The definable limiter (LIMITER) function can be used to limit the output values within the minimum
and maximum limits set in the PST. If the input is outside the set range then the value OUTLIMIT is
set to 1 to indicate the output value is limited.
LIMITER
LIMITER
IN OUT
OUTLIMIT
IEC21000064-1-en.vsdx
IEC21000064 V1 EN-US
13.20.4 Signals
PID-7881-INPUTSIGNALS v1
PID-7881-OUTPUTSIGNALS v1
13.20.5 Settings
PID-7881-SETTINGS v1
The absolute value (ABS) function gives the absolute value of the input.
ABS
ABS
IN OUT
IEC21000063-1-en.vsdx
IEC21000063 V1 EN-US
13.21.4 Signals
PID-7885-INPUTSIGNALS v1
PID-7885-OUTPUTSIGNALS v1
The polar to rectangular converter (POL_REC) function gives the possibility to convert an input
values in polar form to a rectangular form.
POL_REC
MAG REAL
ANGLE IMAG
IEC22005900 V1 EN-US
13.22.4 Signals
PID-7887-INPUTSIGNALS v1
PID-7887-OUTPUTSIGNALS v1
The radians to degree angle converter (RAD_DEG) function gives the possibility to convert an input
value from radian angles to degree angles.
RAD_DEG
RAD_DEG
RAD DEG
IEC21000058-1-en.vsdx
IEC21000058 V1 EN-US
13.23.4 Signals
PID-7886-INPUTSIGNALS v1
PID-7886-OUTPUTSIGNALS v1
The definable constant for logic function (CONST_REAL) can be used to provide a constant output in
an real format based on the set value in PST.
CONST_REAL
CONST_REAL
OUT
IEC21000059-1-en.vsdx
GUID-6A878306-1E98-469E-9E4F-1B0C46381ADE V1 EN-US
13.24.4 Signals
PID-7888-OUTPUTSIGNALS v1
13.24.5 Signals
PID-7888-SETTINGS v1
Analog input selector for real values (REALSEL) function selects one out of eight possible real
inputs. Each input (INPUTx) has its dedicated select input (SELx).
The function provides the output for the value of the selected input and its respective select number
(INSEL). If more than one input is selected, the output will be the lowest in order INPUT value. If
inputs are not selected, the select value number shall be 0.
REALSEL
REALSEL
INPUT1 VALUE
INPUT2 INSEL
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
SEL1
SEL2
SEL3
SEL4
SEL5
SEL6
SEL7
SEL8
IEC21000062-1-en.vsdx
IEC21000062 V1 EN-US
13.25.4 Signals
PID-7889-INPUTSIGNALS v1
PID-7889-OUTPUTSIGNALS v1
The store value for integer inputs (STOREINT) function can be used to store the integer value upon
the trigger, the minimum trigger duration for it to be stored is 100ms. The stored value is reset to 0
when the RESET input is set to 1.
GUID-4AF5186E-2BF2-4D6D-AEAC-D1854A0D04EB V1 EN-US
13.26.4 Signals
PID-7890-INPUTSIGNALS v1
PID-7890-OUTPUTSIGNALS v1
The store value for real inputs (STOREREAL) function can be used to store the real value upon the
trigger, the minimum trigger duration for it to be stored is 100ms. The stored value is reset to 0 when
the RESET input is set to 1.
STOREREAL
STOREREAL
IN STOREDVAL
TRIGGER
RESET
IEC21000060-1-en.vsdx
IEC21000060 V1 EN-US
13.27.4 Signals
PID-7891-INPUTSIGNALS v1
PID-7891-OUTPUTSIGNALS v1
The degree to radians angle converter (DEG_RAD) function gives the possibility to convert an input
value from degree angles to radian angles.
DEG_RAD
DEG_RAD
DEG RAD
IEC21000052-2-en.vsdx
IEC21000052 V2 EN-US
13.28.4 Signals
PID-7893-INPUTSIGNALS v1
PID-7893-OUTPUTSIGNALS v1
Section 14 Monitoring
14.1 Measurements IP14593-1 v4
14.1.2 Identification
SEMOD56123-2 v8
SYMBOL-RR V1 EN-US
SYMBOL-SS V1 EN-US
SYMBOL-UU V1 EN-US
SYMBOL-VV V1 EN-US
SYMBOL-TT V1 EN-US
SYMBOL-UU V1 EN-US
Measurement functions are used for power system measurement, supervision and reporting to the
local HMI, monitoring tool within PCM600 or to station level for example, via IEC 61850. The
possibility to continuously monitor measured values of active power, reactive power, currents,
voltages, frequency, power factor etc. is vital for efficient production, transmission and distribution of
electrical energy. It provides to the system operator fast and easy overview of the present status of
the power system. Additionally, it can be used during testing and commissioning of protection and
control IEDs in order to verify proper operation and connection of instrument transformers (CTs and
VTs). During normal service by periodic comparison of the measured value from the IED with other
independent meters the proper operation of the IED analog measurement chain can be verified.
Finally, it can be used to verify proper direction orientation for distance or directional overcurrent
protection function.
The available measured values from an IED are depending on the actual hardware
(TRM) and the logic configuration made in PCM600.
All measured values can be supervised with four settable limits that is, low-low limit, low limit, high
limit and high-high limit. A zero clamping reduction is also supported, that is, the measured value
below a settable limit is forced to zero which reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level when change in
measured value is above set threshold limit or time integral of all changes since the last time value
updating exceeds the threshold limit. Measure value can also be based on periodic reporting.
All measurement functions use fundamental frequency phasors (that is, DFT filtering) for internal
calculations and for reporting of measured values. However, from the following three measurement
functions CMMXU, VMMXU and VNMMXU it is also possible to report the total measured quantity
(that is, true RMS filtering). By selecting the RMS mode, the reported value will be in addition to the
fundamental magnitude also include harmonics.
The measurement function, CVMMXN, provides the following power system quantities:
,
The measuring functions CMMXU, VMMXU and VNMMXU provide physical quantities:
Fundamental frequency filtered values (DFT) or true RMS values can be selected as a measurement
type in CMMXU, VMMXU and VNMMXU functions.
The CVMMXN function calculates three-phase power quantities by using fundamental frequency
phasors (DFT values) of the measured current and voltage signals. The measured power quantities
are available either, as instantaneously calculated quantities or, averaged values over a period of
time (low pass filtered) depending on the selected settings.
It is possible to calibrate the measuring function above to get better then class 0.5 presentation. This
is accomplished by angle and amplitude compensation at 5, 30 and 100% of rated current and at
100% of rated voltage.
The power system quantities provided, depends on the actual hardware, (TRM) and the
logic configuration made in PCM600.
The measuring functions CMSQI and VMSQI provide sequence component quantities:
The available function blocks of an IED are depending on the actual hardware (TRM) and the logic
configuration made in PCM600.
CVMMXN
I3P* S
U3P* S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
IEC10000016-1-en.vsd
IEC10000016 V1 EN-US
CMMXU
I3P* IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
IEC05000699 V3 EN-US
VMMXU
U3P* UL12
UL12RANG
UL12ANGL
UL23
UL23RANG
UL23ANGL
UL31
UL31RANG
UL31ANGL
IEC05000701 V3 EN-US
CMSQI
I3P* 3I0
3I0RANG
3I0ANGL
I1
I1RANG
I1ANGL
I2
I2RANG
I2ANGL
IEC05000703 V3 EN-US
VMSQI
U3P* 3U0
3U0RANG
3U0ANGL
U1
U1RANG
U1ANGL
U2
U2RANG
U2ANGL
IEC05000704 V3 EN-US
VNMMXU
U3P* UL1
UL1RANG
UL1ANGL
UL2
UL2RANG
UL2ANGL
UL3
UL3RANG
UL3ANGL
IEC09000850 V2 EN-US
14.1.5 Signals
PID-6713-INPUTSIGNALS v3
PID-6713-OUTPUTSIGNALS v3
PID-7953-INPUTSIGNALS v1
PID-7953-OUTPUTSIGNALS v1
PID-7956-INPUTSIGNALS v1
PID-7956-OUTPUTSIGNALS v1
PID-6736-INPUTSIGNALS v3
PID-6736-OUTPUTSIGNALS v3
PID-6739-INPUTSIGNALS v2
PID-6739-OUTPUTSIGNALS v2
PID-7955-INPUTSIGNALS v1
PID-7955-OUTPUTSIGNALS v1
The available setting parameters of the measurement function (MMXU, MSQI) are depending on the
actual hardware (TRM) and the logic configuration made in PCM600.
These six functions are not handled as a group, so parameter settings are only available in the first
setting group.
The following terms are used in the Unit and Description columns:
• UBase (UB): Base voltage in primary kV. This voltage is used as reference for voltage setting. It
can be suitable to set this parameter to the rated primary voltage supervised object.
• IBase (IB): Base current in primary A. This current is used as reference for current setting. It can
be suitable to set this parameter to the rated primary current of the supervised object.
• SBase (SB): Base setting for power values in MVA.
PID-6713-SETTINGS v3
PID-7953-SETTINGS v1
PID-7956-SETTINGS v1
PID-6736-SETTINGS v3
PID-6739-SETTINGS v2
PID-7955-SETTINGS v1
PID-7953-MONITOREDDATA v1
PID-7956-MONITOREDDATA v1
PID-6736-MONITOREDDATA v3
PID-6739-MONITOREDDATA v2
PID-7955-MONITOREDDATA v1
The protection, control, and monitoring IEDs have functionality to measure and further process
information for currents and voltages obtained from the pre-processing blocks. The number of
processed alternate measuring quantities depends on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
• Overfunction, when the measured quantity exceeds the High limit (XHiLim) or High-high limit
(XHiHiLim) pre-set values
• Underfunction, when the measured quantity decreases under the Low limit (XLowLim) or Low-
low limit (XLowLowLim) pre-set values.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
IEC05000657 V4 EN-US
The logical value of the functional output signals changes according to figure 370.
The user can set the hysteresis (XLimHyst), which determines the difference between the operating
and reset value at each operating point, in wide range for each measuring channel separately. The
hysteresis is common for all operating values within one channel.
In addition to the normal cyclic reporting the IED also report spontaneously when measured value
passes any of the defined threshold limits.
Y
Value Reported Value Reported
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t
Value 1
Value 2
Value 3
Value 4
Value 5
(*)Set value for t: XDbRepInt
IEC05000500 V3 EN-US
Value Reported
Y
Value Reported Value Reported
Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1
IEC99000529 V3 EN-US
The last value reported, Y1 in figure 373 serves as a basic value for further measurement. A
difference is calculated between the last reported and the newly measured value and is multiplied by
the time increment (discrete integral). The absolute values of these integral values are added until
the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a new base
for the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small variations
that can last for relatively long periods.
Y A1 >=
A >= pre-set value A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
IEC99000530 V3 EN-US
Set value Formula used for complex, Formula used for voltage Comment
for three-phase power calculation and current magnitude
parameter calculation
“Mode”
1 L1, L2, L3 Used when three phase-to-
* * *
S = U L1 × I L1 + U L 2 × I L 2 + U L 3 × I L 3 U = ( U L1 + U L 2 + U L 3 ) / 3 earth voltages are available
EQUATION1385 V1 EN-US (Equation 68) I = ( I L1 + I L 2 + I L 3 ) / 3
Set value Formula used for complex, Formula used for voltage Comment
for three-phase power calculation and current magnitude
parameter calculation
“Mode”
5 L2L3 Used when only UL2L3 phase-
S = U L 2 L3 × ( I L 2 - I L3 )
* *
U = U L2 L3 to-phase voltage is available
(Equation 76)
I = ( I L2 + I L3 ) / 2
EQUATION1393 V1 EN-US
(Equation 80)
I = I L1
EQUATION1397 V1 EN-US
(Equation 82)
I = IL2
EQUATION1399 V1 EN-US
(Equation 84)
I = I L3
EQUATION1401 V1 EN-US
It shall be noted that only in the first two operating modes that is, 1 & 2 the measurement function
calculates the three-phase power accurately. In other operating modes that is, from 3 to 9 it
calculates the three-phase power under assumption that the power system is fully symmetrical. Once
the complex apparent power is calculated then the P, Q, S, & PF are calculated in accordance with
the following formulas:
P = Re( S )
EQUATION1403 V1 EN-US (Equation 86)
Q = Im( S )
EQUATION1404 V1 EN-US (Equation 87)
S = S = P2 + Q2
EQUATION1405 V1 EN-US (Equation 88)
PF = cosj = P
S
EQUATION1406 V1 EN-US (Equation 89)
Additionally to the power factor value, the two binary output signals from the function are provided
which indicates the angular relationship between the current and voltage phasors. Binary output
signal ILAG is set TRUE when current phasor is lagging behind voltage phasor. Binary output signal
ILEAD is set TRUE when current phasor is leading the voltage phasor.
Each analogue output has a corresponding supervision level output (X_RANGE). The output signal is
an integer in the interval 0-4, see section "Measurement supervision".
IEC05000652 V2 EN-US
X = k × X Old + (1 - k ) × X Calculated
EQUATION1407 V1 EN-US (Equation 90)
where:
X is a new measured value (that is P, Q, S, U, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately given
out without any filtering (that is, without any additional delay). When k is set to value bigger than 0,
the filtering is enabled. Appropriate value of k shall be determined separately for every application.
Some typical value for k =0.14.
Directionality SEMOD54417-256 v7
If CT earthing parameter is set as described in section "Analog inputs", active and reactive power will
be always measured towards the protected object. This is shown in the following figure 375.
Busbar
IED
P Q
Protected
Object
IEC09000038-1-EN V2 EN-US
In some application, for example, when power is measured on the secondary side of the power
transformer it might be desirable, from the end client point of view, to have actually opposite
directional convention for active and reactive power measurements. This can be easily achieved by
setting parameter PowAngComp to value of 180.0 degrees. With such setting the active and reactive
power will have positive values when they flow from the protected object towards the busbar.
Frequency SEMOD54417-261 v2
Frequency is actually not calculated within measurement block. It is simply obtained from the pre-
processing block and then just given out from the measurement block as an output.
The Phase current measurement (CMMXU) function must be connected to three-phase current input
in the configuration tool to be operable. Currents handled in the function can be calibrated to get
better then 0.5 class measuring accuracy for internal use, on the outputs and IEC 61850. This is
achieved by amplitude and angle compensation at 5, 30 and 100% of rated current. The
compensation below 5% and above 100% is constant and linear in between, see figure 374.
There are two types of measurement available in the function through the MeasurementType setting:
• DFT
• RMS
DFT is used to calculate amplitude and angle values for the fundamental frequency component (that
is, phasor) in the current waveform. This method uses full cycle fourier filtering.
RMS calculates a true RMS value over one cycle of data. Hence, it has both the fundamental
frequency and harmonics frequency component in its measurement.
When RMS measurement mode is selected, all phase angles are forced to zero degree.
Phase currents (amplitude and angle) are available on the outputs and each amplitude output has a
corresponding supervision level output (ILx_RANG). The supervision output signal is an integer in
the interval 0-4, see section "Measurement supervision".
The voltage function must be connected to three-phase voltage input in the configuration tool to be
operable. Voltages are handled in the same way as currents when it comes to class 0.5 calibrations,
see above.
DFT and RMS measurement types are available in VMMXU and VNMMXU functions also, as
explained in CMMXU function.
The voltages (phase-to-earth or phase-to-phase voltage, amplitude and angle) are available on the
outputs and each amplitude output has a corresponding supervision level output (ULxy_RANG). The
supervision output signal is an integer in the interval 0-4, see section "Measurement supervision".
The measurement functions must be connected to three-phase current (CMSQI) or voltage (VMSQI)
input in the configuration tool to be operable. No outputs, other than X_RANG, are calculated within
the measuring blocks and it is not possible to calibrate the signals. Input signals are obtained from
the pre-processing block and transferred to corresponding output.
Positive, negative and three times zero sequence quantities are available on the outputs (voltage and
current, amplitude and angle). Each amplitude output has a corresponding supervision level output
(X_RANGE). The output signal is an integer in the interval 0-4, see section "Measurement
supervision".
GUID-5E04B3F9-E1B7-4974-9C0B-DE9CD4A2408F v6
GUID-374C2AF0-D647-4159-8D3A-71190FE3CFE0 v5
GUID-9B8A7FA5-9C98-4CBD-A162-7112869CF030 v5
GUID-47094054-A828-459B-BE6A-D7FA1B317DA7 v6
GUID-ED634B6D-9918-464F-B6A4-51B78129B819 v6
14.2.2 Identification
GUID-AD96C26E-C3E5-4B21-9ED6-12E540954AC3 v5
Insulation supervision for gas medium (SSIMG ) is used for monitoring the circuit breaker condition.
Binary information based on the gas pressure in the circuit breaker can be used as input to the
function. In addition, the function can be used with an analog value of gas pressure and temperature
of the insulation medium and binary inputs. The SSIMG function generates alarms based on the
received information.
SSIMG
BLOCK LOCKOU T
BLKALM PRESLO
SENPRES TEMPLO
SENTEMP ALARM
SENPRESQ PRESALM
SENTEMP Q TEMPALM
SENPRESALM PRESSURE
SENPRESLO TEMP
SETP LO
SETTLO
RESETLO
IEC09000129-3-en.vsdx
IEC09000129 V3 EN-US
14.2.5 Signals
GUID-89749F71-CAEB-4A57-A1F0-148CCF68E97E v3
PID-7402-INPUTSIGNALS v2
PID-7402-OUTPUTSIGNALS v2
14.2.6 Settings
PID-7402-SETTINGS v2
Gas medium supervision SSIMG is used to monitor the gas pressure in the circuit breaker and
temperature of the medium. The gas pressure is monitored to detect low pressure. Binary inputs of
gas density SENPRESALM, SENPRESLO, and gas pressure signal SENPRES are considered to
initiate the gas pressure alarm PRESALM and the gas pressure lockout PRESLO.
If any gas pressure sensor measurement is available and connected to the function input, then gas
pressure sensor quality input also considered for pressure alarm and lockout detections.
Gas pressure alarm PRESALM is activated when any of the following condition occurs,
Gas pressure lockout PRESLO is activated when any of the following condition occurs,
Thus, the function can be used without any sensor inputs and allowing alarm and lockout outputs
based on binary inputs.
To avoid false alarms due to a sudden change in gas pressure, two time delays tPressureAlarm or
tPressureLO are included. If the pressure goes below the settings for more than these time delays,
the corresponding alarm PRESALM or lockout PRESLO will be initiated. The SETPLO binary input is
used for setting the gas pressure lockout PRESLO. The PRESLO output retains the last value until it
is reset by using the binary input RESETLO. The binary input BLKALM can be used to block the
alarms, and the BLOCK input can be used to block both alarm and the lockout indications.
Temperature of the medium is available from the input signal of temperature SENTEMP. The signal is
monitored to detect high temperature. If any gas temperature sensor measurement is available and
connected to the function input, then gas temperature sensor quality input also considered for
temperature alarm and lockout detections.
Temperature alarm TEMPALM is activated if temperature SENTEMP goes above the setting
TempAlarmLimit and quality input SENTEMPQ is high.
Temperature lockout TEMPLO is activated when any of the following condition occurs,
To avoid false alarms due to a sudden change in temperature, two time delays tTempAlarm or
tTempLockOut are included. If the temperature goes below the settings for more than these time
delays, the corresponding alarm TEMPALM or lockout TEMPLO will be initiated. The SETTLO binary
input is used for setting the gas pressure lockout TEMPLO. The TEMPLO output retains the last
value until it is reset by using the binary input RESETLO. The binary input BLKALM can be used to
block the alarms, and the BLOCK input can be used to block both alarm and the lockout indications.
The output ALARM goes high if the pressure alarm condition or the temperature alarm condition
exists. The output ALARM can be blocked by activating BLOCK or BLKALM inputs.
The output LOCKOUT goes high if the pressure lockout condition or the temperature lockout
condition exists and it gets reset by activating binary input RESETLO. The output LOCKOUT can be
blocked by activating BLOCK input.
14.3.2 Identification
GUID-4CE96EF6-42C6-4F2E-A190-D288ABF766F6 v4
Insulation supervision for liquid medium (SSIML) is used for monitoring the oil insulated device
condition. For example, transformers, shunt reactors, and so on. Binary information based on the
liquid level in the circuit breaker can be used as input to the function. In addition, the function can be
used with an analog value of liquid level and temperature of the insulation medium and binary inputs.
The function generates alarms based on the received information.
SSIML
BLOCK LOCKOU T
BLKALM LVLLO
SENLEVEL TEMPLO
SENTEMP ALARM
SENLVLQ LVLALM
SENTEMP Q TEMPALM
SENLVLALM LEVEL
SENLVLLO TEMP
SETLLO
SETTLO
RESETLO
IEC09000128-3-en.vsdx
IEC09000128 V3 EN-US
14.3.5 Signals
GUID-0C378BB3-2104-417F-94B5-16EFC55151FE v3
PID-7403-INPUTSIGNALS v2
PID-7403-OUTPUTSIGNALS v2
14.3.6 Settings
PID-7403-SETTINGS v2
Liquid medium supervision SSIML is used to monitor the oil level and temperature of oil in the oil
insulated devices. The liquid level is monitored to detect low liquid level. Binary inputs of oil level
SENLVLALM, SENLVLLO, and gas pressure signal SENLEVEL are considered to initiate the liquid
level alarm LVLALM and the liquid level alarm lockout LVLLO.
If any liquid level sensor measurement is available and connected to the function input, then liquid
level sensor quality input also considered for level alarm and lockout detections.
Liquid level alarm LVLALM is activated when any of the following condition occurs,
Liquid level lockout LVLLO is activated when any of the following condition occurs,
Thus, the function can be used without any sensor inputs and allowing alarm and lockout outputs
based on binary inputs.
To avoid false alarm due to the sudden change in the oil level, two time delays tLevelAlarm or
tLevelLockOut are included. If the pressure goes below the settings for more than these time delays,
the corresponding alarm LVLALM or lockout LVLLO will be initiated. The SETLLO binary input is
used for setting the liquid level lockout LVLLO. The LVLLO output retains the last value until it is reset
by using the binary input RESETLO. The binary input BLKALM can be used to block the alarms, and
the BLOCK input can be used to block both alarm and the lockout indications.
Temperature of the medium is available from the input signal of temperature. The signal is monitored
to detect high temperature. If any oil temperature sensor measurement is available and connected to
the function input, then oil temperature sensor quality input also considered for temperature alarm
and lockout detections.
Temperature alarm TEMPALM is activated if temperature SENTEMP goes above the setting
TempAlarmLimit and quality input SENTEMPQ is high.
Temperature lockout TEMPLO is activated when any of the following condition occurs,
To avoid false alarm due to the sudden change in the temperature, two time delays tTempAlarm or
tTempLockOut are included. If the temperature goes below the settings for more than these time
delays, the corresponding alarm TEMPALM or lockout TEMPLO will be initiated. The SETTLO binary
input is used for setting the gas pressure lockout TEMPLO. The TEMPLO output retains the last
value until it is reset by using the binary input RESETLO. The binary input BLKALM can be used to
block the alarms, and the BLOCK input can be used to block both alarm and the lockout indications.
The output ALARM goes high if the pressure alarm condition or the temperature alarm condition
exists. The output ALARM can be blocked by activating BLOCK or BLKALM inputs.
The output LOCKOUT goes high if the pressure lockout condition or the temperature lockout
condition exists and it gets reset by activating binary input RESETLO. The output LOCKOUT can be
blocked by activating BLOCK input.
The circuit breaker condition monitoring function (SSCBR) is used to monitor different parameters of
the breaker condition. The breaker requires maintenance when the number of operations reaches a
predefined value. For a proper functioning of the circuit breaker, it is essential to monitor the circuit
breaker operation, spring charge indication or breaker wear, travel time, number of operation cycles
and estimate the accumulated energy during arcing periods. Each SCCBR function instance is made
to be used with a 1-pole, 1-phase breaker.
SSCBR
I3P* OPNPOS
BLOCK CLSPOS
BLKALM INVDPOS
TRIND COLOPN
POSOPN OPTMOPNALM
POSCLS OPTMCLSALM
PRESALM OPCNTWRN
PRESLO OPCNTALM
SPC RMNLIFEALM
SPD MONALM
RSRMNLIFE ACCMABRWRN
RSOPTM ACCMABRALM
RSACCMABR SPCALM
RSSPCTM GPRESALM
EXEOPNXCBR GPRESLO
EXEOPNCSWI
IEC13000231 V4 EN-US
14.4.5 Signals
PID-8315-INPUTSIGNALS v1
PID-8315-OUTPUTSIGNALS v1
14.4.6 Settings
PID-8315-SETTINGS v1
The breaker monitoring function includes metering and monitoring subfunctions. The subfunctions
can be enabled and disabled with the Operation setting. The corresponding parameter values are On
and Off.
The operation of the subfunctions is described by the module diagram as shown in figure 379. All the
modules in the diagram are explained in subsequent sections.
IRMSPh OPTMOPN
POSCLS OPTMCLS
POSOPN CB Contact Operation OPTMOPNALM
BLOCK Time OPTMCLSALM
BLKALM OPTMOPNDIFALM
RSOPTM OPTMCLSDIFALM
OPNPOS
CB Status CLSPOS
INVDPOS
RMNLIFEALM
Remaining Life of CB
RMNLIFE
RSRMNLIFE
ACCMABRWRN
Accumulated
contact abrasion ACCMABRALM
IL
TRIND ACCMABR
RSACCMABR
CB Operation OPCNTWRN
Cycles OPNUM
CB Operation MONALM
Monitoring INADAYS
SPCALM
SPC CB Spring Charge SPCTM
SPD Monitoring
RSSPCTM
GUID-BC6063F6-8206-4E20-BE3A-7859C9A24836 V1 EN-US
The circuit breaker contact operation time sub function calculates the breaker contact operation time
for opening and closing operations. The operation of the breaker contact operation time
measurement is described in Figure 380.
POSCLS OPTMOPN
Contact
POSOPN operation time OPTMCLS
calculation
RSOPTM OPTMOPNALM
GUID-B421E15B-2ED1-400D-92A8-E0E03C4F366B V1 EN-US
Figure 380: Functional module diagram for circuit breaker contact operation time
Main Contact
1
0
POSCLS
1
POSOPN
1
t1 tOpen t2 t3 tClose t4
GUID-352EA7A6-004C-4D3A-AF87-52210EC81707 V1 EN-US
Main Contact
1
0
POSCLS
1
POSOPN
1
t1 tOpen t2 t3 tClose t4
GUID-352EA7A6-004C-4D3A-AF87-52210EC81707 V1 EN-US
The last measured opening operation time (OPTMOPN) and the closing operation time (OPTMCLS) are
given as service values.
The values can be reset using the Clear menu on the LHMI or by activation of the input RSRMNLIFE.
It is also possible to block the OPTMCLSALM and OPTMOPNALM alarm signals by activating the
BLKALM input.
The circuit breaker status subfunction monitors the position of the circuit breaker, that is, whether the
breaker is in the open, closed or error position. The operation is described in figure 382.
OPNPOS
Contact position
POSCLS CLSPOS
indicator
POSOPN INVDPOS
GUID-E78F2E25-2D81-40AC-B044-058D03488A4E V1 EN-US
Figure 382: Functional module diagram for monitoring circuit breaker status
The status of the breaker is indicated with the binary outputs OPNPOS, CLSPOS and INVDPOS for
open, closed and error position respectively.
The Remaining life of circuit breaker subfunction is used to give an indication on the wear and tear of
the circuit breaker. Every time the breaker operates, the life of the circuit breaker reduces due to
wear. The breaker wear depends on the interrupted current. The remaining life of the breaker is
estimated from the circuit breaker trip curve provided by the manufacturer. The remaining life is
decreased by at least one when the circuit breaker is opened. The operation of the remaining life of
circuit breaker subfunction is described in figure 383.
IRMSPH
CB remaining RMNLIFE
POSCLS life estimation
RSRMNLIFE
Alarm limit
BLOCK RMNLIFEALM
Check
BLKALM
GUID-BBBAC955-DE50-4FC8-90DB-A5D180251BF2 V1 EN-US
Figure 383: Functional module diagram for estimating the life of the circuit breaker
It is possible to deactivate the RMNLIFEALM alarm signal by activating the binary input BLKALM.
The old circuit breaker operation counter value can be used by adding the value to the InitRmnLife
parameter. The value can be reset using the Clear menu from LHMI or by activating the input
RSRMNLIFE.
The Accumulated contact abrasion subfunction calculates the accumulated contact abrasion (Iyt)
based on current samples, where the setting CurExponent (y) ranges from 0.5 to 3.0. The operation
is described in figure 384.
The TRCMD output is enabled when either of the trip indications from the trip coil circuit TRIND is high
or the breaker status isOPNPOS.
IL
IRMSPH Accumulated
ACCMABR
POSCLS contact
abrasion
TRIND calculation
RSACCMABR
ACCMABRWRN
Alarm limit
BLOCK
Check ACCMABRALM
BLKALM
GUID-F430402D-11DC-4381-AF58-8322329A8E30 V1 EN-US
Figure 384: Functional module diagram for estimating accumulated contact abrasion
The calculation is initiated with the POSCLS or TRIND input events. It ends when the RMS current is
lower than the AccmAbrStopCur setting.
The OpnTmTrvlCor setting is used to determine the accumulated contact abrasion in relation to the
time the main contact opens. If the setting is positive, the calculation of contact abrasion starts after
the auxiliary contact has opened and the delay equal to the value of the OpnTmTrvlCor setting has
passed. When the setting is negative, the calculation starts in advance by the correction time in
relation to when the auxiliary contact opened.
close close
Main Contact Main Contact
open open
1 1
POSCLS POSCLS
0 0
Energy Energy
Accumulation Accumulation
starts starts
OpnTmTrvlCor OpnTmTrvlCor
(Negative) (Positive)
GUID-D03E3522-BFD0-4129-A3A9-700367E5B37E V1 EN-US
The accumulated contact abrasion output ACCMABR is provided as a service value. The value can be
reset by enabling RSACCMABR through LHMI or activating the input RSACCMABR.
ACCMABRALM is activated when the accumulated contact abrasion exceeds the limit of the
AccmAbrAlmLev setting.
The ACCMABRWRN and ACCMABRALM outputs can be blocked by activating the binary input BLKALM.
The circuit breaker operation cycles subfunction counts the number of closing-opening sequences of
the breaker. The operation counter value is updated after each closing-opening sequence. The
operation is described in figure386.
POSCLS
Operation
POSOPN OPNUM
counter
RSRMNLIFE
OPCNTWRN
Alarm limit
BLOCK
Check
OPCNTALM
BLKALM
GUID-A50229B5-B78C-4043-807D-ECFCE9440A2B V1 EN-US
Figure 386: Functional module diagram for circuit breaker operation cycles
Operation counter
The operation counter counts the number of operations based on the state of change of the auxiliary
contact inputs POSCLS and POSOPN.
The number of operations OPNUM is given as a service value. The old circuit breaker operation
counter value can be used by adding the value to the InitCntVal parameter and can be reset by
activating the input RSRMNLIFE.
If the number of operations increases and exceeds the limit value set with the OpNumAlmLev setting,
the OPCNTALM output is activated.
The binary outputs OPCNTWRN and OPCNTALM are deactivated when the BLKALM input is activated.
The circuit breaker operation monitoring subfunction indicates the inactive days of the circuit breaker
and gives an alarm when the number of days exceed the set level. The operation of the circuit
breaker operation monitoring is shown in figure 387.
POSCLS
Inactive timer INADAYS
POSOPN
GUID-B761217E-CE5D-4F76-9B73-0093097D34F9 V1 EN-US
Figure 387: Functional module diagram for circuit breaker operation monitoring
Inactive timer
The Inactive timer module calculates the number of days the circuit breaker has remained in the
same open or closed state. The value is calculated by monitoring the states of the POSOPN and
POSCLS auxiliary contacts.
The number of inactive days INADAYS is available as a service value. The initial number of inactive
days is set using the InitInaDay parameter.
The circuit breaker spring charge monitoring subfunction calculates the spring charging time. The
operation is described in figure 388.
SPC
Spring charging
SPD time SPCTM
measurement
RSSPCTM
Alarm limit
BLOCK SPCALM
Check
BLKALM
GUID-3DB117D1-A927-47CF-937D-0AC0BAB5A25F V1 EN-US
Figure 388: Functional module diagram for circuit breaker spring charge indication
The binary input SPC indicates the start of circuit breaker spring charging time. SPD indicates that the
circuit breaker spring is charged. The spring charging time is calculated from the difference of these
two signal timings. Spring charging indication is described in figure 388.
The last measured spring charging time SPCTM is provided as a service value. The spring charging
time SPCTM can be reset on the LHMI or by activating the input RSSPCTM.
It is possible to block the SPCALM alarm signal by activating the BLKALM binary input.
The circuit breaker gas pressure indication subfunction monitors the gas pressure inside the arc
chamber. The operation is described in figure 389.
PRESALM
tON
BLOCK AND t GPRESALM
BLKALM
tON
PRESLO AND t GPRESLO
GUID-ADE5256E-4676-4EA9-AFF6-6B4EC9079A12 V1 EN-US
Figure 389: Functional module diagram for circuit breaker gas pressure indication
When the PRESALM binary input is activated, the GPRESALM output is activated after a time delay set
with the tGasPresAlm setting. The GPRESALM alarm can be blocked by activating the BLKALM input.
If the pressure drops further to a very low level, the PRESLO binary input goes high, activating the
lockout alarm GPRESLO after a time delay set with the tGasPresLO setting. The GPRESLO alarm can
be blocked by activating the BLKALM input.
The binary input BLOCK can be used to block the function. The activation of the BLOCK input
deactivates all outputs and resets internal timers. The alarm signals from the function can be blocked
by activating the binary input BLKALM.
The output COLOPN indicates that opening coil has been operated through the open command. The
binary inputs EXEOPNXCBR and EXEOPNCSWI are open command from the control function, not from
the protection function. COLOPN is achieved by AND operation between EXEOPNXCBR and
EXEOPNCSWI. The output can be blocked by the BLOCK binary input signal.
EXEOPNXCBR
Coil Open
EXEOPNCSWI Indication COLOPN
BLOCK
GUID-AAEBD59C-5DDD-40A0-913E-6E20F3E61E3C V1 EN-US
14.5.1 Identification
SEMOD167950-2 v2
When using a Substation Automation system with LON or SPA communication, time-tagged events
can be sent at change or cyclically from the IED to the station level. These events are created from
any available signal in the IED that is connected to the Event function (EVENT). The EVENT function
block is used for LON and SPA communication.
Analog, integer and double indication values are also transferred through the EVENT function.
EVENT
BLOCK
^INPUT1
^INPUT2
^INPUT3
^INPUT4
^INPUT5
^INPUT6
^INPUT7
^INPUT8
^INPUT9
^INPUT10
^INPUT11
^INPUT12
^INPUT13
^INPUT14
^INPUT15
^INPUT16
IEC05000697-2-en.vsd
IEC05000697 V2 EN-US
PID-4145-INPUTSIGNALS v6
PID-4145-SETTINGS v6
The main purpose of the Event function (EVENT) is to generate events when the state or value of
any of the connected input signals is in a state, or is undergoing a state transition, for which event
generation is enabled.
Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given a name from the
Application Configuration tool. The inputs are normally used to create single events, but are also
intended for double indication events. For double indications, only the first eight inputs, 1–8, must be
used. Inputs 9–16 can be used for other types of events in the same EVENT block.
The EVENT function also has an input BLOCK to block the generation of events.
Events that are sent from the IED can originate from both internal logical signals and binary input
channels. The internal signals are time-tagged in the main processing module, while the binary input
channels are time-tagged directly on the input module. Time-tagging of the events that are originated
from internal logical signals have a resolution corresponding to the execution cycle-time of the source
application. Time-tagging of the events that are originated from binary input signals have a resolution
of 1 ms.
The outputs from the EVENT function are formed by the reading of status, events and alarms by the
station level on every single input. The user-defined name for each input is intended to be used by
the station level.
All events according to the event mask are stored in a buffer, which contains up to 1000 events. If
new events appear before the oldest event in the buffer is read, the oldest event is overwritten and
an overflow alarm appears.
Events are produced according to set event masks. The event masks are treated commonly for both
the LON and SPA communication. An EventMask can be set individually for each input channel.
These settings are available:
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of the EVENT function generates the events. This can be
performed individually for communication types SPAChannelMask and LONChannelMask. For each
communication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication, events are normally sent to station level at change. It is also possible to set
a time for cyclic sending of the events individually for each input channel.
To protect the SA system from signals with a high change rate that can easily saturate the EVENT
function or the communication subsystems behind it, a quota limiter is implemented. If an input
creates events at a rate that completely consume the granted quota then further events from the
channel will be blocked. This block will be removed when the input calms down and the accumulated
quota reach 66% of the maximum burst quota. The maximum burst quota per input channel is 45
events per second.
14.6.1 Identification
M16055-1 v10
Complete and reliable information about disturbances in the primary and/or in the secondary system
together with continuous event-logging is accomplished by the disturbance report functionality.
Disturbance report (DRPRDRE), always included in the IED, acquires sampled data of all selected
analog input and binary signals connected to the function block with a maximum of 40 analog and
352 binary signals.
• Event list
• Indications
• Event recorder
• Trip value recorder
• Disturbance recorder
• Fault locator
• Settings information
The Disturbance report function is characterized by great flexibility regarding configuration, starting
conditions, recording times, and large storage capacity.
Every disturbance report recording is saved in the IED in the standard COMTRADE format. In the
COMTRADE1999 format it is saved as a header file HDR, a configuration file CFG, and a data file
DAT. In the COMTRADE2013 format, it is saved as CFF single file format. The same applies to all
events, which are continuously saved in a ring-buffer. The local HMI is used to get information about
the recordings. The disturbance report files can be uploaded to PCM600 for further analysis using
the disturbance handling tool.
M12510-3 v3
DRPRDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
IEC05000406 V4 EN-US
A1RADR
^GRPINPUT1
^GRPINPUT2
^GRPINPUT3
^GRPINPUT4
^GRPINPUT5
^GRPINPUT6
^GRPINPUT7
^GRPINPUT8
^GRPINPUT9
^GRPINPUT10
IEC05000430 V5 EN-US
C1RADR
^INPUT41
^INPUT42
^INPUT43
^INPUT44
^INPUT45
^INPUT46
^INPUT47
^INPUT48
^INPUT49
^INPUT50
GUID-7F42F48F-7E32-412E-8E61-D3753C8A4926 V1 EN-US
B1RBDR
^INPUT1
^INPUT2
^INPUT3
^INPUT4
^INPUT5
^INPUT6
^INPUT7
^INPUT8
^INPUT9
^INPUT10
^INPUT11
^INPUT12
^INPUT13
^INPUT14
^INPUT15
^INPUT16
IEC05000432 V4 EN-US
Figure 395: B1RBDR function block, binary inputs, example for B1RBDR - B22RBDR
14.6.4 Signals
PID-7839-OUTPUTSIGNALS v1
GUID-48019111-7303-40FE-A292-65FDFB6AE686 v2
GUID-D025D5D9-A0F3-4A00-891A-63AD5F609A77
PID-8028-INPUTSIGNALS v3
v1
PID-3798-INPUTSIGNALS v6
GUID-D3A8067F-80F8-4174-BD2D-4C43F4B99020 v3
B2RBDR to B22RBDR functions have the same input signal specifications as B1RBDR but with
different numbering:
14.6.5 Settings
PID-7839-SETTINGS v1
PID-4014-SETTINGS v7
GUID-E05EEC82-CB90-4E73-B9C9-4C16FD95FCBF v2
A2RADR and A3RADR functions have the same Non group settings (basic) as A1RADR but with
different numbering:
A2RADR and A3RADR functions have the same Non group settings (advanced) as A1RADR but
with different numbering (examples given in brackets):
PID-3798-SETTINGS v6
GUID-8702C5B9-05A3-4E61-8952-C66483FFDFE2 v4
B2RBDR to B22RBDR functions have the same Non group settings (basic) as B1RBDR but with
different numbering (examples given in brackets):
B2RBDR to B22RBDR functions have the same Non group settings (advanced) as B1RBDR but with
different numbering (examples given in brackets):
Figure 396 shows the relations between Disturbance Report, included functions and function blocks.
Event list (EL), Event recorder (ER) and Indications (IND) use information from the binary input
function blocks (BxRBDR). Trip value recorder (TVR) use analog information from the analog input
function blocks (AxRADR) which is used by FL after estimation by TVR. Disturbance recorder
DRPRDRE acquires information from both AxRADR and BxRBDR.
DRPRDRE FL
Analog signals
Trip value rec Fault locator
BxRBDR Disturbance
recorder
Binary signals
Event list
Event recorder
Indications
IEC09000336 V4 EN-US
independent of disturbance triggering, recording time, and so on. Settings information function
contains all the visible settings, parameter information of components configured in ACT, runtime
status and IEC 61850 behavior that is added to the disturbance record header file. These settings
information is recorded in XML format and then grouped for each function instance in the HDR file.
The function, setting names and Enum values are same as in the HMI and can be translated to the
selected HMI language. All setting values are updated along with the units. If the setting values are
related to the global base value, then the setting value is scaled and updated with corresponding
global base unit. All information in the disturbance report is stored in non-volatile flash memories.
This implies that no information is lost in case of loss of auxiliary power. Each report will get an
identification number in the interval from 0-999.
Disturbance report
General dist.
Trip Event Disturbance
Information & Setting Indications Fault locator Event list
values recordings recording
infotrmation
IEC20000223 V2 EN-US
The IED flash disk should not be used to store any user files. This causes lack of space
for new disturbance recordings.
During post processing of the disturbance record, the header file is updated with a section called
Settings . Settings has complete setting values of the configured components that are read during
the trigger time. The setting values, runtime status and the behavior of each component are
compared between the trigger and the post processing time. If there are any differences, then it will
be added in the header file under section Changed_settings.
In the HDR file, section tag Settings has an attribute tag called function which includes parameters
that are grouped based on the function instance. The function tag has content called name which is
the function name provided together with the user-defined name in brackets similar to the HMI.
Status content will indicate the runtime status of the function and beh content will indicate the IEC
61850 behavior of the components, if supported. Non runtime components will not have status and
beh tag contents.
Parameters of the function are listed as a child tag Set with contents name, value and unit:
The changed_settings attribute tag is similar to the settings section. It contains functions which have
changes in parameter value or runtime status or IEC 61850 behavior when compared with trigger
and post-processing settings values.
Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
IEC05000487 V1 EN-US
PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the operate time of the
trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as any valid trigger
condition, binary or analog, persists (unless limited by TimeLimit the limit time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all activated triggers
are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was triggered. The
limit time is used to eliminate the consequences of a trigger that does not reset within a reasonable
time interval. It limits the maximum recording time of a recording and prevents subsequent
overwriting of already stored disturbances. Use the setting TimeLimit to set this time.
SMAI A1RADR
Block AI3P A2RADR
^GRP2L1 AI1 INPUT1 A3RADR
External
analogue ^GRP2L2 AI2 INPUT2
signals ^GRP2L3 AI3 INPUT3
^GRP2N AI4 INPUT4
Type AIN INPUT5
INPUT6
...
C1RADR
INPUT41
INPUT42
INPUT43
Internal analogue signals INPUT44
INPUT45
INPUT46
...
INPUT50
GUID-E3F03091-00C5-402B-ABCE-E8F356186ED5 V1 EN-US
The external input signals will be acquired, filtered and skewed and (after configuration) available as
an input signal on the AxRADR function block via the SMAI function block. The information is saved
at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally calculated signals are
updated according to the cycle time of the specific function. If a function is running at lower speed
than the base sampling rate, Disturbance recorder will use the latest updated sample until a new
updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the Disturbance report is
the Signal Matrix Tool (SMT, external signal configuration). In case of modification of a preconfigured
IED or general internal configuration the Application Configuration tool within PCM600 is used.
The preprocessor function block (SMAI) calculates the residual quantities in cases where only the
three phases are connected (AI4-input not used). SMAI makes the information available as a group
signal output, phase outputs and calculated residual output (AIN-output). In situations where AI4-
input is used as an input signal the corresponding information is available on the non-calculated
output (AI4) on the SMAI function block. Connect the signals to the AxRADR accordingly.
For each of the analog signals, Operation = On means that it is recorded by the disturbance recorder.
The trigger is independent of the setting of Operation, and triggers even if operation is set to Off.
Both undervoltage and overvoltage can be used as trigger conditions. The same applies for the
current signals.
If Operation = Off, no waveform (samples) will be recorded and reported in graph. However, Trip
value, pre-fault and fault value will be recorded and reported. The input channel can still be used to
trig the disturbance recorder.
If Operation = On, waveform (samples) will also be recorded and reported in graph.
The analog signals are presented only in the disturbance recording, but they affect the entire
disturbance report when being used as triggers.
Each of the 352 signals can be selected as a trigger of the disturbance report (Operation = On). A
binary signal can be selected to activate the red LED on the local HMI (SetLED = On ).
The selected signals are presented in the event recorder, event list and the disturbance recording.
But they affect the whole disturbance report when they are used as triggers. The indications are also
selected from these 352 signals with local HMI IndicationMask = Show/Hide.
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
The check of the trigger condition is based on peak-to-peak values. When this is found, the absolute
average value of these two peak values is calculated. If the average value is above the threshold
level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater than (>) sign with
the user-defined name.
If the average value is below the set threshold level for an undervoltage or undercurrent trigger, this
trigger is indicated with a less than (<) sign with its name. The procedure is separately performed for
each channel.
This method of checking the analog start conditions gives a function which is insensitive to DC offset
in the signal. The operate time for this start is typically in the range of one cycle, 20 ms for a 50 Hz
network.
All under/over trig signal information is available on the local HMI and PCM600.
The Logical signal status report (BINSTATREP) function makes it possible for a SPA master to poll
signals from various other functions.
BINSTATREP
BLOCK OUTPUT1
^INPUT1 OUTPUT2
^INPUT2 OUTPUT3
^INPUT3 OUTPUT4
^INPUT4 OUTPUT5
^INPUT5 OUTPUT6
^INPUT6 OUTPUT7
^INPUT7 OUTPUT8
^INPUT8 OUTPUT9
^INPUT9 OUTPUT10
^INPUT10 OUTPUT11
^INPUT11 OUTPUT12
^INPUT12 OUTPUT13
^INPUT13 OUTPUT14
^INPUT14 OUTPUT15
^INPUT15 OUTPUT16
^INPUT16
IEC09000730-1-en.vsd
IEC09000730 V1 EN-US
14.7.4 Signals
PID-4144-INPUTSIGNALS v6
PID-4144-OUTPUTSIGNALS v6
14.7.5 Settings
PID-4144-SETTINGS v6
The Logical signal status report (BINSTATREP) function has 16 inputs and 16 outputs. The output
status follows the inputs and can be read from the local HMI or via SPA communication.
When an input is set, the respective output is set for a user defined time. If the input signal remains
set for a longer period, the output will remain set until the input signal resets.
INPUTn
OUTPUTn
t t
IEC09000732-1-en.vsd
IEC09000732 V1 EN-US
14.8.1 Identification
SEMOD113212-2 v4
The current and voltage measurements functions (CVMMXN, CMMXU, VMMXU and VNMMXU),
current and voltage sequence measurement functions (CMSQI and VMSQI) and IEC 61850 generic
communication I/O functions (MVGAPC) are provided with measurement supervision functionality. All
measured values can be supervised with four settable limits: low-low limit, low limit, high limit and
high-high limit. The measure value expander block (RANGE_XP) has been introduced to enable
translating the integer output signal from the measuring functions to 5 binary signals: below low-low
limit, below low limit, normal, above high limit or above high-high limit. The output signals can be
used as conditions in the configurable logic or for alarming purpose.
RANGE_XP
RANGE* HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
IEC05000346 V3 EN-US
PID-3819-INPUTSIGNALS v5
PID-3819-OUTPUTSIGNALS v5
The input signal must be connected to a range output of a measuring function block (CVMMXN,
CMMXU, VMMXU, VNMMXU, CMSQI, VMSQ or MVGAPC). The function block converts the input
integer value to five binary output signals according to Table 543.
Measured supervised below low- between low‐ between low between above high-high limit
value is: low limit low and low and high limit high-high and
Output: limit high limit
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High
14.9.1 Identification
GUID-F3FB7B33-B189-4819-A1F0-8AC7762E9B7E v3
The Limit counter (L4UFCNT) provides a settable counter with four independent limits where the
number of positive and/or negative flanks on the input signal are counted against the setting values
for limits. The output for each limit is activated when the counted value reaches that limit.
BLOCK
INPUT
Operation
Counter
RESET
VALUE
Overflow
CountType Detection OVERFLOW
OnMaxValue
Limit LIMIT1 … 4
MaxValue Check
CounterLimit1...4
Error ERROR
Detection
InitialValue
IEC12000625 V2 EN-US
• Stops counting and activates a steady overflow indication for the next count
• Rolls over to zero and activates a steady overflow indication for the next count
• Rolls over to zero and activates a pulsed overflow indication for the next count
The pulsed overflow output lasts up to the first count after rolling over to zero, as illustrated in Figure
404.
Overflow indication
Actual value ... Max value -1 Max value Max value +1 Max value +2 Max value +3 ...
IEC12000626 V2 EN-US
The function can be blocked through a block input. During the block time, input is not counted and
outputs remain in their previous states. However, the counter can be initialized after reset of the
function. In this case the outputs remain in their initial states until the release of the block input.
Reset of the counter can be performed from the local HMI or via a binary input.
Reading of content and resetting of the function can also be performed remotely, for example from a
IEC 61850 client. The value can also be presented as a measurement on the local HMI graphical
display.
L4UFCNT
BLOCK ERROR
INPUT OVERFLOW
RESET LIMIT1
LIMIT2
LIMIT3
LIMIT4
VALUE
IEC12000029 V2 EN-US
14.9.5 Signals
PID-6966-INPUTSIGNALS v2
PID-6966-OUTPUTSIGNALS v2
14.9.6 Settings
PID-6966-SETTINGS v2
The Running hour-meter (TEILGAPC) function is a function that accumulates the elapsed time when
a given binary signal has been high, see also Figure 406.
BLOCK
RESET
IN Time Accumulation ACC_HOUR
ADDTIME with Retain
ACC_DAY
tAddToTime
q-1
OVERFLOW
a
&
a>b
99 999.9 h b
WARNING
a
&
a>b
tWarning b
ALARM
a
&
a>b
tAlarm b
TEILGAPC
BLOCK ALARM
IN WARNING
ADDTIME OVERFLOW
RESET ACC_HOUR
ACC_DAY
IEC15000323.vsdx
IEC15000323 V1 EN-US
14.10.4 Signals
PID-6998-INPUTSIGNALS v1
PID-6998-OUTPUTSIGNALS v1
14.10.5 Settings
PID-6998-SETTINGS v1
Loop Delay
tWarning
OVERFLOW
tAlarm
Transgression Supervision WARNING
Plus Retain
ALARM
BLOCK
RESET ACC_HOUR
Time Accumulation
IN
ADDTIME ACC_DAY
tAddToTime
Loop Delay
IEC15000322 V2 EN-US
The ACC_HOURoutput represents the accumulated time in hours and the ACC_DAY output
represents the accumulated time in days.
tAlarm and tWarning are user settable time limit parameters in hours. They are also independent of
each other, that is, there is no check if tAlarm > tWarning.
tAlarm, tWarning and tAddToTime are possible to be defined with a resolution of 0.1 hours (6
minutes).
The limit for the overflow supervision is fixed at 99999.9 hours. The outputs will reset and the
accumulated time will reset and start from zero if an overflow occurs.
Consequently in case of a power failure, there is a risk of losing the difference in time between actual
time and last time stored in the non-volatile memory.
Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device
number
Fault current and voltage FLTMMXU - -
monitoring function
The fault current and voltage monitoring function (FLTMMXU) monitors and reports the maximum
peak current per phase, maximum RMS current per phase, DFT values of current per phase and
three phase to ground voltages, as well as DFT values of neutral current and neutral voltage upon a
trip event occurrence.
The FLTMMXU function monitors the voltage and current data for a predefined time window and
stores their values when the binary input TRIGFLTUI becomes active. The trip signal from any
protection/monitoring function should be connected to TRIGFLTUI input for the data monitoring. The
time window for calculation of maximum peak and RMS current of individual phases can be set using
the setting parameters PreTrig and PostTrig .
FLTMMXU
I3P* REPREADY
U3P* FLTIL1MAG
BLOCK FLTIL1ANG
TRGFLTUI FLTIL2MAG
RSTFLTUI FLTIL2ANG
FLTIL3MAG
FLTIL3ANG
FLTINMAG
FLTINANG
FLTUL1MAG
FLTUL1ANG
FLTUL2MAG
FLTUL2ANG
FLTUL3MAG
FLTUL3ANG
FLTUNMAG
FLTUNANG
IMAX
IL1MAXPK
IL2MAXPK
IL3MAXPK
IL1MAX
IL2MAX
IL3MAX
IEC21000225 V2 EN-US
PID-7997-INPUTSIGNALS v1
PID-7997-OUTPUTSIGNALS v1
PID-7997-SETTINGS v1
I3P
U3P ILx
BLOCK ULx
TRIGFLTUI ILxMAXPK
Maximum RMS current ILxMAX
and maximum peak
IMAX
current calculation
RSTFLTUI TRIGTIME
TRIGDUR
PreTrig
PostTrig
FLTILxMAG
FLTILxANG
Fundamental DFT FLTINMAG
current and voltage
FLTINANG
values snapshot
captured at the time of FLTULxMAG
TRIGFLTUI signal FLTULxANG
becomes TRUE FLTUNMAG
FLTUNANG
The function is triggered when the TRIGFLTUI binary input of the function is TRUE, for example, if
TRIGFLTUI is connected to general TRIP signal of SMPPTRC function. The duration for calculation
of maximum peak current for each phase and maximum RMS current for each phase is set using the
setting parameters PreTrig and PostTrig as shown in Figure 411.
Instantaneous samples
Peak value(SMAI o/p)
RMS value(SMAI o/p)
PreTrig PostTrig
TRIGFLTUI
Time duration for maximum peak and
RMS current calculation
IL1MAXPK
IL1MAX
FLTIL1MAG
IL1
IL2MAXPK
IL2MAX
FLTIL2MAG
IL2
IL3MAXPK
IL3MAX
FLTIL3MAG
IL3
IEC21000227 V1 EN-US
The fundamental DFT magnitude and angle of phase currents (FLTILxMAG/FLTILxANG), phase
voltages (FLTULxMAG/FLTULxANG), neutral current (FLTINMAG/FLTINANG) and neutral voltage
(FLTUNMAG/FLTUNANG) are read and stored at the positive edge of the binary input TRIGFLTUI.
These values are also reported to IEC 61850, LHMI, monitoring tool at the end of PostTrig.
The reference for the angle outputs can be set by DFTReference setting parameter in
SMAI function.
The output TRIGTIME shows the date and time of the instant when TRIGFLTUI input has changed
the state to TRUE from FALSE.
TRIGDUR output indicates the time duration of TRIGFLTUI input active in ms.
A reset command input RSTFLTUI is provided to reset all the monitored/reported output values to
zero.
If the RSTFLTUI signal remains TRUE and a new trigger for TRIGFLTUI input is received,
the FLTMMXU will report the new set of values. Only the positive edge of the RSTFLTUI
input is considered to reset the values which were reported/monitored in the previous
event.
BLOCK input is provided to stop the internal calculations. When BLOCK input is active, activation of
TRIGFLTUI input will not trigger the fault data calculations. The ILxMAXPK, ILxMAX, IMAX,
FLTILxMAG/FLTILxANG, FLTULxMAG/FLTULxANG, FLTINMAG/FLTINANG and FLTUNMAG/
FLTUNANG outputs will retain the previous fault event values.
14.12.2 Identification
M14892-1 v3
The accurate fault locator is an essential component to minimize the outages after a persistent fault
and/or to pin-point a weak spot on the line.
The fault locator is an impedance measuring function giving the distance to the fault in km, miles or
% of line length. The main advantage is the high accuracy achieved by compensating for load current
and for the mutual zero-sequence effect on double circuit lines.
The compensation includes setting of the remote and local sources and calculation of the distribution
of fault currents from each side. This distribution of fault current, together with recorded load (pre-
fault) currents, is used to exactly calculate the fault position. The fault can be recalculated with new
source data at the actual fault to further increase the accuracy.
Especially on heavily loaded long lines, where the source voltage angles can be up to 35-40 degrees
apart, the accuracy can be still maintained with the advanced compensation included in fault locator.
There are two phase selection inputs used to derive the fault loop information. The CALCDIST input
need to be set in order to calculate the fault location. If the CALCDIST input is low, then the outputs
are shown as default for the corresponding disturbance recorded.
LMBRFLO
PHSELL1* CALCMADE
PHSELL2* FLINVAL
PHSELL3* FLT_DIST
CALCDIST* FLT_X
FLT_R
FLT_LOOP
BCD_80
BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
IEC05000679-5-en.vsdx
IEC05000679 V5 EN-US
14.12.5 Signals
PID-7422-INPUTSIGNALS v1
PID-7422-OUTPUTSIGNALS v1
14.12.6 Settings
PID-7422-SETTINGS v1
When calculating distance to fault, pre-fault and fault phasors of currents and voltages are selected
from the Trip value recorder data, thus the analog signals used by the fault locator must be among
those connected to the disturbance report function. The analog configuration (channel selection) is
performed using the parameter setting tool within PCM600.
The calculation algorithm considers the effect of load currents, double-end infeed and additional fault
resistance.
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L
DRPRDRE
LMBRFLO
IEC05000045_2_en.vsd
IEC05000045 V2 EN-US
Figure 413: Simplified network configuration with network data, required for settings of the
fault location-measuring function
If source impedance in the near and far end of the protected line have changed in a significant
manner relative to the set values at fault location calculation time (due to exceptional switching state
in the immediate network, power generation out of order, and so on), new values can be entered via
the local HMI and a recalculation of the distance to the fault can be ordered using the algorithm
described below. It’s also possible to change fault loop. In this way, a more accurate location of the
fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in kilometers or
miles according to the setting LineLengthUnit. The fault location is stored as a part of the disturbance
report information (ER, DR, IND, TVR and FL) and managed via the local HMI or PCM600.
For transmission lines with voltage sources at both line ends, the effect of double-end infeed and
additional fault resistance must be considered when calculating the distance to the fault from the
currents and voltages at one line end. If this is not done, the accuracy of the calculated figure will
vary with the load flow and the amount of additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of double-end infeed,
additional fault resistance and load current.
M14983-5 v1
Figure 414 shows a single-line diagram of a single transmission line, that is fed from both ends with
source impedances ZA and ZB. Assume that the fault occurs at a distance F from IED A on a line with
the length L and impedance ZL. The fault resistance is defined as RF. A single-line model is used for
better clarification of the algorithm.
A B
ZA IA pZL IB (1-p).ZL ZB
IF
UA RF
xx01000171.vsd
IEC01000171 V1 EN-US
U A = I A × p × Z L + IF × R F
EQUATION95 V1 EN-US (Equation 91)
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to the fault,
IF is the fault current and
IF A
IF = --------
DA
EQUATION96 V1 EN-US (Equation 92)
Where:
IFA is the change in current at the point of measurement, IED A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line end A and the total fault
current.
( 1 – p ) × Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
EQUATION97 V1 EN-US (Equation 93)
Thus, the general fault location equation for a single line is:
I FA
U A = I A × p × Z L + -------
- × RF
DA
EQUATION98 V1 EN-US (Equation 94)
Table 564: Expressions for UA, IA and IFA for different types of faults
The KN complex quantity for zero-sequence compensation for the single line is equal to:
Z0L – Z 1L
K N = ------------------------
3 × Z1L
EQUATION99 V1 EN-US (Equation 95)
DI is the change in current, that is the current after the fault minus the current before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the equations,
because this is the value used in the algorithm.
I FA
U A = I A × p × Z 1L + -------- × RF + I 0P × Z 0M
DA
EQUATION100 V1 EN-US (Equation 96)
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) × ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
-
2 × ZA + Z L + 2 × Z B
EQUATION101 V1 EN-US (Equation 97)
Z0L – Z 1L Z 0M I 0P
K N = ------------------------ + ----------------- × -------
3 × Z1L 3 × Z1L I 0A
EQUATION102 V1 EN-US (Equation 98)
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation for a
single line is obtained. Only the distribution factor differs in these two cases.
2
p – p × K1 + K2 – K3 × RF = 0
EQUATION103 V1 EN-US (Equation 99)
Where:
UA ZB
K 1 = ---------------
- + --------------------------
-+1
I A × ZL Z L + ZA DD
UA ZB
K2 = --------------- × æè --------------------------- + 1öø
IA × Z L Z L + Z A DD
IF A Z A + ZB
- × æ --------------------------
K 3 = --------------- - + 1ö
I A × Z L è Z 1 + ZA DD ø
EQUATION106 V1 EN-US (Equation 102)
and:
For a single line, Z0M = 0 and ZADD = 0. Thus, Equation 99 applies to both single and parallel lines.
2
p – p × Re ( K 1 ) + Re ( K 2 ) – R F × Re ( K 3 ) = 0
EQUATION107 V1 EN-US (Equation 103)
– p × Im × ( K1 ) + Im × ( K 2 ) – R F × Im × ( K3 ) = 0
EQUATION108 V1 EN-US (Equation 104)
If the imaginary part of K3 is not zero, RF can be solved according to Equation 104, and then inserted
to Equation 103. According to Equation 103, the relative distance to the fault is solved as the root of
a quadratic equation.
Equation 103 gives two different values for the relative distance to the fault as a solution. A simplified
load compensated algorithm, which gives an unequivocal figure for the relative distance to the fault,
is used to establish the value that should be selected.
If the load compensated algorithms according to the above do not give a reliable solution, a less
accurate, non-compensated impedance model is used to calculate the relative distance to the fault.
In the non-compensated impedance model, IA line current is used instead of IFA fault current:
U A = p × Z 1 L × IA + R F × IA
EQUATION109 V1 EN-US (Equation 105)
Where:
IA is according to Table 564.
The accuracy of the distance-to-fault calculation, using the non-compensated impedance model, is
influenced by the pre-fault load current. So, this method is only used if the load compensated models
do not function.
If in case the roots of the quadratic equation is not within the given line length, then the fault location
is as follows:
1. If the fault distance estimated is between -1 p.u. and 0 p.u. or 1 p.u. and 2 p.u., then fault
distance is sealed to the closest value.
2. If the fault distance estimated is < -1 p.u. and >2.0 p.u., then fault distance is set as -1000.
The communication protocol IEC 60870-5-103 may be used to poll fault location information from the
IED to a master (that is station HSI). The output CALCMADE gives a pulse (100 ms) when a new
fault location is updated on FLT_X, FLT_R, FLT_DIST. The FLTINVAL is a binary output to indicate
the fault location estimated is invalid.
The CALCMADE and FLTINVAL must be connected to inputs to the function block I103USRDEF as
shown in Figure 415. The FLT_DIST, FLT_R, and FLT_X outputs are connected to the function block
I103MEASUSR.
IEC20000302 V1 EN-US
Section 15 Metering
15.1 Pulse-counter logic PCFCNT IP14600-1 v3
15.1.1 Identification
M14879-1 v4
S00947 V1 EN-US
Pulse-counter logic (PCFCNT) function counts externally generated binary pulses, for instance
pulses coming from an external energy meter, for calculation of energy consumption values. The
pulses are captured by the binary input module and then read by the PCFCNT function. A scaled
service value is available over the station bus. The special Binary input module with enhanced pulse
counting capabilities must be ordered to achieve this functionality.
PCFCNT
BLOCK INVALID
READ_VAL RESTART
BI_PULSE* BLOCKED
RS_CNT NEW_VAL
SCAL_VAL
IEC14000043-1-en.vsd
IEC09000335 V3 EN-US
15.1.4 Signals
PID-6509-INPUTSIGNALS v4
PID-6509-OUTPUTSIGNALS v4
15.1.5 Settings
PID-6509-SETTINGS v4
M13397-3 v5
The registration of pulses is done for positive transitions (0->1) on one of the 16 binary input
channels located on the Binary Input Module (BIM). Pulse counter values are sent to the station HMI
with predefined cyclicity without reset.
The reporting time period can be set in the range from 1 second to 60 minutes and is synchronized
with absolute system time. Interrogation of additional pulse counter values can be done with a
command (intermediate reading) for a single counter. All active counters can also be read by the
LON General Interrogation command (GI) or IEC 61850.
Pulse-counter logic (PCFCNT) function in the IED supports unidirectional incremental counters. That
means only positive values are possible. The counter uses a 32 bit format, that is, the reported value
is a 32-bit, signed integer with a range 0...+2147483647. The counter is reset at initialization of the
IED.
The reported value to station HMI over the station bus contains Identity, Scaled Value (pulse count x
scale), Time, and Pulse Counter Quality. The Pulse Counter Quality consists of:
The transmission of the counter value by SPA can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database. PCFCNT updates
the value in the database when an integration cycle is finished and activates the NEW_VAL signal in
the function block. This signal can be connected to an Event function block, be time tagged, and
transmitted to the station HMI. This time corresponds to the time when the value was frozen by the
function.
The pulse-counter logic function requires a binary input card, BIMp, that is specially
adapted to the pulse-counter logic function.
M13399-3 v9
Figure 417 shows the pulse-counter logic function block with connections of the inputs and outputs.
The BI_PULSE input is connected to the used input of the function block for the Binary Input Module
(BIM).
Each pulse-counter logic function block has four binary output signals that can be connected to an
Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL. The
SCAL_VAL signal can be connected to the IEC Event function block.
The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse counter
input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not comprise a
complete integration cycle. That is, in the first message after IED start-up, in the first message after
deblocking, and after the counter has wrapped around during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two
reasons why the counter is blocked:
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since last
report.
The SCAL_VAL signal consists of scaled value (according to parameter Scale), time and status
information.
M13404-2 v5
15.2.1 Identification
SEMOD175537-2 v4
Power system measurement (CVMMXN) can be used to measure active as well as reactive power
values. Function for energy calculation and demand handling (ETPMMTR) uses measured active
and reactive power as input and calculates the accumulated active and reactive energy pulses, in
forward and reverse direction. Energy values can be read or generated as pulses. Maximum demand
power values are also calculated by the function. This function includes zero point clamping to
remove noise from the input signal. As output of this function: periodic energy calculations,
integration of energy values, calculation of energy pulses, alarm signals for limit violation of energy
values and maximum power demand, can be found.
The values of active and reactive energies are calculated from the input power values by integrating
them over a selected time tEnergy. The integration of active and reactive energy values will happen
in both forward and reverse directions. These energy values are available as output signals and also
as pulse outputs. Integration of energy values can be controlled by inputs (STARTACC and STOPACC)
and EnaAcc setting and it can be reset to initial values with RSTACC input.
The maximum demand for active and reactive powers are calculated for the set time interval tEnergy
and these values are updated every minute through output channels. The active and reactive
maximum power demand values are calculated for both forward and reverse direction and these
values can be reset with RSTDMD input.
ETPMMTR
P* ACCINPRG
Q* EAFPULSE
STARTACC EARPULSE
STOPACC ERFPULSE
RSTACC ERRPULSE
RSTDMD EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
IEC14000019-1-en.vsd
IEC14000019 V1 EN-US
15.2.4 Signals
PID-6872-INPUTSIGNALS v3
PID-6872-OUTPUTSIGNALS v3
15.2.5 Settings
PID-6872-SETTINGS v3
The instantaneous output values of active and reactive power from the Measurements function
CVMMXN are used and integrated over a selected time tEnergy to measure the integrated energy.
Figure 419 shows the overall functionality of the energy calculation and demand handling function
ETPMMTR.
MAXPAFD
RSTDMD
MAXPARD
MAXPRFD
P
MAXPRRD
Zero Clamping Maximum Power
EAFALM
Detection Demand Calculation
Q EARALM
ERFALM
ERRALM
ACCINPRG
EAFPULSE
EARPULSE
ERFPULSE
Energy Accumulation ERRPULSE
STARTACC
Calculation EAFACC
EARACC
STOPACC
ERFACC
ERRACC
RSTACC
IEC13000185-2-en.vsd
IEC13000185 V2 EN-US
STOPACC
FALSE
STARTACC T
³1
& F ACCINPRG
EnaAcc &
q-1
RSTACC
RSTACC
EAFPrestVal
ACCINPRG
P* (ACTIVE FORWARD)
X
T
T EAFACC
60.0
F
F
&
q-1
1000 GWh T
-1 F
q 0.0
a
a>b
b
-1
q = unit delay
IEC13000187-5-en.vsdx
IEC13000187 V5 EN-US
tEnergyOffPls
EAFACC
a Counter q-1
a>b CU
1000 GWh b CV
Rst
tOff
t
R I q-1
0
÷ X
R I T
EAFPULSE
a TP
a>b F
b
EAFAccPlsQty ÷ 0
Counter
CU
CV
RSTACC
Rst
q-1
tEnergyOnPls
Figure 422: Logic for pulse generation of integrated active forward energy
The maximum demand values for active and reactive power are calculated for the set time interval
tEnergy. The maximum values are updated every minute and stored in a register available over
communication and from outputs MAXPAFD, MAXPARD, MAXPRFD and MAXPRRD for the active and
reactive power forward and reverse direction. When the RSTDMD input is active from the local HMI
reset menu, these outputs are reset to zero. The energy alarm is activated once the periodic energy
value crosses the energy limit ExLim. Figure 423 shows the logic of alarm for active forward energy
exceeds limit and Maximum forward active power demand value. Similarly, the maximum power
calculation and energy alarm outputs in the active reverse, reactive forward and reactive reverse is
implemented.
P (ACTIVE FORWARD)
Average Power
X a EAFALM
tEnergy Calculation a>b
b
EALim
RSTMAXD
0.0 T MAXPAFD
MAX F
q-1
q-1 = unit delay
IEC13000189-4-en.vsd
IEC13000189 V4 EN-US
Figure 423: Logic for maximum power demand calculation and energy alarm
Section 16 Ethernet
16.1 Access point
Device 1 Device 1
IEC16000092-2-en.vsdx
IEC16000092 V2 EN-US
Figure 424: Access points, non redundant (left) and redundant communication (right)
16.1.2 Settings
PID-8307-SETTINGS v1
MANUALPID-17002 v1
The access point diagnostics function blocks (RCHLCCH, SCHLCCH and FRONTSTATUS)
supervise communication. SCHLCCH is used for communication over the rear Ethernet ports,
RCHLCCH is used for redundant communications over the rear Ethernet ports and FRONTSTATUS
is used for communication over the front port. All access point function blocks include output signal
for denial of service. To get this denial of service, that is reported on the communication, the
DOSALARM output from these blocks must be connected to a communication function.
For RSTP, the frame error rate on an individual link cannot be extrapolated accurately to
that of which is received by the IED. Hence, the frame error rate on link A (LCCH.FerCh)
and the frame error rate on link B (LCCH.RedFerCh) cannot be calculated and are 0
always.
SCHLCCH
LINKUP
DOSALARM
IEC16000044 V2 EN-US
RCHLCCH
REDLINKA
REDLINKB
DOSALARM
IEC16000045 V2 EN-US
16.2.3 Signals
PID-6818-OUTPUTSIGNALS v2
PID-6819-OUTPUTSIGNALS v2
PID-6819-MONITOREDDATA v2
16.3.1 Identification
GUID-B7AE0374-0336-42B8-90AF-3AE1C79A4116 v1
The RCHLCCH function block supervise the redundant communication on the two channels. If no
data package has been received on one (or both) channels within the last 10 s, the output LinkAUp
and/or LinkBUp is set to 0 which indicates an error.
Device 1 Device 2
AP1 AP1
PhyPortA PhyPortB PhyPortA PhyPortB
Switch A Switch B
Device 3 Device 4
IEC09000758 V5 EN-US
For each message sent, the node sends two frames, one through each port. Both the frames
circulate in opposite directions over the ring. Every node forwards the frames it receives from one
port to another to reach the next node. When the originating sender node receives the frame it sent,
the sender node discards the frame to avoid loops
The RCHLCCH function block supervise the redundant communication on the two channels. If no
data package has been received on one (or both) channels within the last 10 s, the output LinkAUp
and/or LinkBUp is set to 0 which indicates an error.
If IEEE1588 (PTP) is used an accuracy of 1 µs can be guaranteed for up to 15 devices in one HSR-
ring.
Device 1 Device 2
AP1 AP1
PhyPortA PhyPortB PhyPortA PhyPortB
Device 3 Device 4
IEC16000038 V2 EN-US
Rapid Spanning Tree Protocol (RSTP) is a network protocol built for loop free network topology and
redundancy/backup connections between switches.
• Support for RSTP will be available on the Station level network communication.
• RSTP will only be available on the Access Point (AP) AP1 or AP3. AP1 uses port 1 and port 2;
AP3 uses port 3 and port 4.
• RSTP will not be available on Optical Ethernet Module (OEM02) hardware (that is, on interface
AP5).
• RSTP can be configured using Ethernet configuration tool (ECT) and PST in PCM600.
Access points can be configured to use the RSTP using ECT in PCM600. Either AP1 or AP3 can be
configured with RSTP and not both at the same time. ECT will not allow the RSTP on another AP if
RSTP is already configured on any of the APs. Settings related to the RSTP are available under PST
in PCM600 or on LHMI (under Configuration menu/Communication/Ethernet Configuration/
RSTP).
GUID-B6D6F552-B316-4B31-A93A-89C7CC9E96C0 V1 EN-US
GUID-44BD3474-C865-4CE2-8198-030AF1753ADF V1 EN-US
RSTP will only be available either on the Access Point, AP 1 or AP 3. AP1 uses port 1
and port 2; AP3 uses port 3 and port 4.
When any of the Access Point is configured with RSTP or changed from RSTP, the IED
will reboot to load the new ethernet configuration.
The IED will display hints on LHMI if any error in the configuration is detected.
For IEC 61850 ED2, the new sub-network can be changed but it is recommend to
configure all the devices in a ring to the same access point. Due to a limitation in ECT, it
does not allow to edit the subnet for WA1 because it is dedicated to a station bus access
point, and AP1 is configured by default in the IED SCL model.
GUID-10173961-FCCC-4EEE-9848-0D0DAA3649F1 v1
Changes to parameters, such as priority of the bridge/ports, can result in reconfiguration of RSTP in
the network. It is recommended to use the default values of the RSTP parameters.
All the devices in the network must support RSTP. Before configuring RSTP, the network topology
should be carefully planned by the network administrator. The administrator should determine which
switch will be the root bridge and configure the switches or devices (IED) appropriately (see Section
16.4.5).
If the root bridge is down, the protocol automatically assigns a new root bridge based on
BridgePriority, switch/device with the lowest priority will be considered as the root bridge. The
network configuration, that is, bridge priorities, must be configured such that the redundant switch if
any takes over as the root bridge if the first root bridge is out-of-service.
If all the devices in the network have the same BridgePriority, such as the default priority, and the
root bridge goes down, a tie situation arises, and the protocol will assign a device as the root bridge
based on the lowest MAC address.
In any kind of network topology, the configuration must be done such that the switch is
used as the root bridge.
Once the device have been assigned a bridge priority, the best path to the root bridge is calculated
based on the path cost and port priority. The path cost is determined based on the bandwidth of a
link, however, links between switches or IEDs may have the same bandwidth. The bandwidth
supported by the IED is 100 Mbps. This cannot be configured by the user.
The selection of how other switches/IEDs in the topology choose their root port, or the least cost path
to the root bridge, can be influenced by the port priority. The highest priority means the path will
ultimately be less preferred. If all ports of a switch have the same priority, the port with the lowest
number (port number) is chosen to forward frames.
In star topology, the IED is connected to two different switches. Switch Sw1 should be configured as
the root bridge. In this case, all the IEDs will communicate with Sw1; only in case of a link failure or
other failure in the switch, the redundant link will be activated. With this topology, RSTP can only be
used for attaining the redundancy. In case of failure of main link, the backup link will be activated and
the IED will receive messages from Sw1 through Sw2.
IEC21000009 V2 EN-US
In ring and star topology, switches are connected in ring and devices are connected in star topology.
The IED is connected to two different switches. Switch Sw1 (or Sw2) should be configured as the
root bridge.
In this case, all the IEDs will communicate with Sw1; only in case of a link failure or other failure in
the switch Sw1 the redundant link via Sw2 will be activated.
IEC21000005 V2 EN-US
In ring topology, IEDs and switch are connected to form a ring. Ring is the most preferred topology
with RSTP. In Figure 433, switch Sw1 is the root bridge, if the priority of Sw2 is greater than that of
the IEDs, then the alternate port (backup link) will be placed between IED3 and IED4 (for
representation and this depends on the configuration).
If any of the link breaks in the loop, then the backup link/alternate link will be activated. For example,
if a link between IED1 and IED2 fails, then the alternate link is activated after the recovery time; all
the devices in the ring will communicate with the new alternate link established. In the example
topology, after the recovery time, IED2 and IED3 will now communicate in the ring through IED4.
IEC21000008 V2 EN-US
IEC21000006 V2 EN-US
IEC21000007 V2 EN-US
Depending on the configuration, the diagnostics information related to RSTP would be available
under Test/Function status/Communication/Station communication/RSTPDiagnostics/
RSTPSTATUS on LHMI.
The test setup consisted of IEDs and a switch in a ring, and UDP multicast frames were sent at 5 ms
interval to measure the single link failure recovery time.
The recovery time of a link failure on RSTP with the IEDs that are using Galvanic ports is
higher than the IEDs with the Optical ports.
If a reset to factory default is performed on an IED with RSTP, then the IED will be reverted to the
factory settings with default values and RSTP will be disabled.
GUID-D4AFB582-036A-4A98-88A5-40884091AFD7 v1
Function Value
Protocol IEEE 802.1D Rapid spanning tree protocol (RSTP)
Communication speed 100Base-FX
Connectors Optical, type LC or Galvanic, type RJ45
Supported topologies Star, Ring, Ring and star
Maximum number of 39 IEDs
nodes in a ring
Performance Recovery time from single link failure for 9 IEDs + 1 switch is < 45 ms and for 39 IEDs + 1
measurements switch is < 185 ms in ring topology
The IEC/UCA 61850-9-2LE process bus communication protocol enables an IED to communicate
with devices providing measured values in digital format, commonly known as Merging Units (MU).
The rear access points are used for the communication.
The merging units (MU) are called so because they can gather analog values from one or more
measuring transformers, sample the data and send the data over process bus to other clients (or
subscribers) in the system. Some merging units are able to get data from classical measuring
transformers, others from non-conventional measuring transducers and yet others can pick up data
from both types.
16.5.2 Settings
PID-8088-SETTINGS v1
PID-7549-SETTINGS v1
16.6 Routes
A route is a specified path for data to travel between the source device in a subnetwork to the
destination device in a different subnetwork. A route consists of a destination address and the
address of the gateway to be used when sending data to the destination device, see Figure 436.
Default gateway
Gateway
Source Destination
IEC16000095 V2 EN-US
16.6.2 Settings
PID-6761-SETTINGS v2
Each IED is provided with several communication interfaces enabling it to connect to one or many
substation level systems or equipment, either on the Substation Automation (SA) bus or Substation
Monitoring (SM) bus.
The LPHD.PhyHealth reflects the physical health of the IED. The status is set to Alarm
when there is an internal failure in the IED or Warning if any active communication link
fails.
Status of the protocols can be viewed in the LHMI under Main menu /Diagnostics /IED status /
Protocol diagnostics. The diagnostic values are:
IEC15000400 V2 EN-US
Simple Network Management Protocol (SNMP) is an internet standard protocol to get and set data of
the connected network devices. It uses UDP protocol for communication.
Here it is used to provide information of the hardware devices, software and attached network
interface to the SNMP manager.
1. SNMPv2c and SNMPv3 are supported and both are enabled by default.
1.1. SNMPv2c sends community strings which are used for authentication in clear text format.
1.2. User based security model (USM) for SNMPv3 require the users/ password and the
encryption password to be predefined. A maximum of 2 users are supported.
2. Public IF-MIB and Hitachi Energy MIB with specific objects (Object Identifiers) are supported.
3. User profiles can be configured from the PCM600 tool and only these users are supported for
SNMP communication.
4. Traps are not supported.
GUID-191FB872-2134-411E-905F-2CDF232E657F V1 EN-US
There is one component for the server configuration and two components for the different users
configuration.
GUID-A0899C80-FB05-41AA-AE79-B3D21C07DC4D V1 EN-US
Table 592 shows the SNMP server parameters that are to be configured.
Settings PID-8317-SETTINGS v1
ROCommunity: This information is need by SNMP manager to get read-only Object Identifiers from
SNMP agent/IED using SNMPv2c protocol. This information is mandatory for SNMPv2c protocol.
RWCommunity: This information is need by SNMP manager to get and set Object Identifiers from
SNMP agent/IED using SNMPv2c protocol. This information is mandatory for SNMPv2c protocol.
If SNMP server parameters are not configured, then the SNMP engineID parameter will
be empty.
GUID-A6B6C5F6-997C-4172-95D6-C84BA43B4FFA V1 EN-US
• The user definition for SNMP includes username and password. The password and the
encryption key will only support ASCII characters. Any password policies will not be enforced.
• Password parameters will have the PAD lock, so they need to be unlocked to be written.
• Password parameters are hidden (shown in the Figure 441).
• Minimum password length supported for the user configurations is 8 characters and maximum is
62 characters.
• Based on the security level parameter the respective parameters need to be updated.
GUID-76F7BBA7-3FEC-4C57-857C-42DDC098E451 V1 EN-US
Settings PID-8318-SETTINGS v1
GUID-FFD0764F-95B0-4722-AB27-5D34C284FFBA V1 EN-US
IF-MIB is a part of public MIBs and can be downloaded from SNMP portal
HITACHI-ENERGY-AC-MIB can be downloaded from https://library.abb.com/
Object Identifiers supported by the product are listed below. SNMP Get request on the unsupported
MIB will result in a noSuchObject response.
As part of the Hitachi Energy MIB, options for many Object Identifiers are provided. However, for
2.2.6 release only a below listed Object Identifiers are supported.
If the HW module is
healthy from supervision it
will be reported as ok. In
case of HW failure, it will
be reported as warning.
IED reports
only firmware
IEC 61850 Ed. 1, Ed. 2 or Ed. 2.1 can be chosen by a setting in PCM600. The IED is equipped with
four optical Ethernet rear ports for IEC 61850-8-1 station bus communication. The IEC 61850-8-1
communication is also possible from the electrical Ethernet front port. IEC 61850-8-1 protocol allows
intelligent electrical devices (IEDs) from different vendors to exchange information and simplifies
system engineering. IED-to-IED communication using GOOSE and client-server communication over
MMS are supported. Disturbance recording file (COMTRADE) uploading can be done over MMS or
FTP.
The front port is only intended for PCM600 communication, maintenance, training and
test purposes due to risk of interference during normal operation.
17.4.3 Settings
PID-7437-SETTINGS v2
M15031-1 v9
Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
Protocol IEC 60870–5–103
Communication speed for the IEDs 9600 or 19200 Bd
Protocol DNP3.0
Communication speed for the IEDs 300–115200 Bd
Protocol TCP/IP, Ethernet
Communication speed for the IEDs 100 Mbit/s
Table continues on next page
Function Value
Protocol LON
Communication speed for the IEDs 1.25 Mbit/s
Protocol SPA
Communication speed for the IEDs 300–38400 Bd
Generic communication function for single point indication (SPGAPC) is used to send one single
logical signal to other systems or equipment in the substation.
SPGAPC
BLOCK
^IN
IEC14000021 V2 EN-US
SP16GAPC
BLOCK
^IN1
^IN2
^IN3
^IN4
^IN5
^IN6
^IN7
^IN8
^IN9
^IN10
^IN11
^IN12
^IN13
^IN14
^IN15
^IN16
IEC14000020 V2 EN-US
PID-3780-INPUTSIGNALS v6
PID-3781-INPUTSIGNALS v6
The function does not have any parameters available in the local HMI or PCM600.
PID-3781-MONITOREDDATA v3
Upon receiving a signal at its input, Generic communication function for single point indication
(SPGAPC) function sends the signal over IEC 61850-8-1 to the equipment or system that requests
this signal. Additional configuration is needed with PCM600 or IET600 to get the IEC 61850-8-1
communication established. For more information, refer to the Engineering manual.
Generic communication function for measured values (MVGAPC) function is used to send the
instantaneous value of an analog signal to other systems or equipment in the substation. It can also
be used inside the same IED, to attach a RANGE aspect to an analog value and to permit
measurement supervision on that value.
MVGAPC
BLOCK ^VALUE
^IN RANGE
IEC14000022 V2 EN-US
PID-6753-INPUTSIGNALS v2
PID-6753-OUTPUTSIGNALS v2
PID-6753-SETTINGS v3
Upon receiving an analog signal at its input, Generic communication function for Measured Value
(MVGAPC) will give the instantaneous value of the signal and the range, as output values. Additional
configuration is needed with PCM600 or IET600 to get the IEC 61850-8-1 communication
established. For more information, see Engineering manual.
The principles of zero-point clamping, range supervision, and value reporting are explained in
Section. For MVGAPC, the measurement range is defined by the MV min and MV max settings.
The GOOSE AC Receive (GOOSEACRCV) component collects information from another device’s
Data Object (DO) of common data class type ACD (normally start data from the sending IED) or ACT
(normally operate DO), that is, a DO with several values (general and individual phases) and
common quality and time for those sent via GOOSE. The GOOSE AC Receive component includes
five different outputs with defined names to ease the IEC 61850 mapping of the GOOSE signals in
the configuration process and three additional outputs to convey the validity of the data, the
communication, and if the data received is in test mode.
GOOSEACRCV
BLOCK ^GENERAL
^SRCGENERAL ^PHSA
^SRCPHSA ^PHSB
^SRCPHSB ^PHSC
^SRCPHSC ^NEUT
^SRCNEUT DATAVALID
COMMVALID
TEST
GUID-65039D30-1CBB-4964-AC2A-9905E7E04D6F V1 EN-US
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections in the Signal Matrix Tool (SMT). These connections are visible
and possible to make only if Easy GOOSE engineering is enabled. For instructions on
how to enable Easy GOOSE engineering in PCM600, refer to the Engineering Manual.
PID-8324-INPUTSIGNALS v1
PID-8324-OUTPUTSIGNALS v1
PID-8324-SETTINGS v1
The DATAVALID output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under a total failure condition
and the GOOSE transmission from the sending IED does not occur.
The TEST output will go HIGH if the sending IED is in test mode.
Receiver in block 0 0 1 0
Receiver in block and communication error 0 0 0 0
Receiver in test mode and incoming data Updated 1 1 0
with q= Normal
Receiver in test mode and incoming data Updated 1 1 1
with q= Test
Communication Error 0 0 0 0
At least one of the inputs of this GOOSE block must be linked in SMT by a cross or in
ACT by means of a GOOSE connection (if easy GOOSE engineering is enabled) to
receive any data. Only those outputs whose source input is linked or connected will be
updated.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD, then the DATAVALID output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE, or OLD DATA, then the
DATAVALID output will be LOW.
17.4.8.1 Identification
GUID-8C11DB9A-7844-4E1F-A6BB-D97ECE350FC1 v2
GOOSEDPRCV is used to receive a double point value using IEC 61850 protocol via GOOSE.
If the time information is received along with Goose message at input (source of output) from the
Goose sender, the same time information is available at the output signal.
If non signal goose message is received from the sender, the goose output will have the time
information of the receiver IED at which goose message is received.
GOOSEDPRCV
BLOCK ^DPOUT
^SRCDPOUT DATAVALID
COMMVALID
TEST
IEC10000249 V3 EN-US
17.4.8.4 Signals
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6828-INPUTSIGNALS v3
PID-6828-OUTPUTSIGNALS v3
17.4.8.5 Settings
PID-6828-SETTINGS v3
The DATAVALID output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure condition and
the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
Receiver in block 0 0 1 0
Receiver in block and communication error 0 0 0 0
Table continues on next page
The input of this GOOSE block must be linked either in SMT by means of a cross or in
ACT by means of a GOOSE connection (if easy GOOSE engineering is enabled) to
receive the double point values.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the DATAVALID output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
DATAVALID output will be LOW.
17.4.9.1 Identification
GUID-93A1E81B-1DE8-483A-BB3B-DB771EE66DC1 v2
GOOSEINTRCV is used to receive an integer value using IEC 61850 protocol via GOOSE.
If the time information is received along with Goose message at input (source of output) from the
Goose sender, the same time information is available at the output signal.
If non signal goose message is received from the sender, the goose output will have the time
information of the receiver IED at which goose message is received.
GOOSEINTRCV
BLOCK ^INTOUT
^SRCINTOUT DATAVALID
COMMVALID
TEST
IEC10000250 V3 EN-US
17.4.9.4 Signals
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6829-INPUTSIGNALS v3
PID-6829-OUTPUTSIGNALS v3
17.4.9.5 Settings
PID-6829-SETTINGS v3
The DATAVALID output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure condition and
the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
The input of this GOOSE block must be linked either in SMT by means of a cross or in
ACT by means of a GOOSE connection (if easy GOOSE engineering is enabled) to
receive the integer values.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the DATAVALID output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
DATAVALID output will be LOW.
17.4.10.1 Identification
GUID-B1FFBE08-C823-4A58-9FE0-A9A20DA6BB44 v2
GOOSEMVRCV is used to receive measured value using IEC 61850 protocol via GOOSE.
If the time information is received along with Goose message at input (source of output) from the
Goose sender, the same time information is available at the output signal.
If non signal goose message is received from the sender, the goose output will have the time
information of the receiver IED at which goose message is received.
GOOSEMVRCV
BLOCK ^MVOUT
^SRCMVOUT DATAVALID
COMMVALID
TEST
IEC10000251 V3 EN-US
17.4.10.4 Signals
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6830-INPUTSIGNALS v3
PID-6830-OUTPUTSIGNALS v3
17.4.10.5 Settings
PID-6830-SETTINGS v3
The DATAVALID output will be HIGH if the incoming message is with valid data.
If the incoming data is outside the range [-1e30, 1e30], the input will be considered invalid, and the
DATAVALID output will be LOW.
The COMMVALID output will become LOW when the sending IED is under total failure condition and
the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
The input of this GOOSE block must be linked either in SMT by means of a cross or in
ACT by means of a GOOSE connection (in case easy GOOSE engineering is enabled) to
receive the measured value.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the DATAVALID output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
DATAVALID output will be LOW.
17.4.11.1 Identification
GUID-F2B30A70-842E-435E-8FAB-B1E58B9C0164 v2
GOOSESPRCV is used to receive a single point value (SPS or SPC) using IEC 61850 protocol via
GOOSE.
If the time information is received along with Goose message at input (source of output) from the
Goose sender, the same time information is available at the output signal.
If non signal goose message is received from the sender, the goose output will have the time
information of the receiver IED at which goose message is received.
GOOSESPRCV
BLOCK ^SPOUT
^SRCSPOUT DATAVALID
COMMVALID
TEST
IEC10000248 V3 EN-US
17.4.11.4 Signals
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6832-INPUTSIGNALS v3
PID-6832-OUTPUTSIGNALS v3
17.4.11.5 Settings
PID-6832-SETTINGS v3
The DATAVALID output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure condition and
the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
Receiver in block 0 0 1 0
Receiver in block and communication error 0 0 0 0
Table continues on next page
The input of this GOOSE block must be linked either in SMT by means of a cross or in
ACT by means of a GOOSE connection (if easy GOOSE engineering is enabled) to
receive the binary single point values.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the DATAVALID output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
DATAVALID output will be LOW.
GOOSE communication can be used for exchanging information between IEDs via the IEC
61850-8-1 station communication bus. This is typically used for sending apparatus position
indications for interlocking or reservation signals for 1-of-n control. GOOSE can also be used to
exchange any boolean, integer, double point and analog measured values between IEDs.
If the time information is received along with Goose message at input(source of output) from the
Goose sender, the same time information is available at the output signal.
If non signal goose message is received from the sender, the goose output will have the time
information of the receiver IED at which goose message is received.
GOOSEINTLKRCV
BLOCK ^RESREQ
^SRCRESREQ ^RESGRANT
^SRCRESGR ^APP1_OP
^SRCAPP1 ^APP1_CL
^SRCAPP2 APP1VAL
^SRCAPP3 ^APP2_OP
^SRCAPP4 ^APP2_CL
^SRCAPP5 APP2VAL
^SRCAPP6 ^APP3_OP
^SRCAPP7 ^APP3_CL
^SRCAPP8 APP3VAL
^SRCAPP9 ^APP4_OP
^SRCAPP10 ^APP4_CL
^SRCAPP11 APP4VAL
^SRCAPP12 ^APP5_OP
^SRCAPP13 ^APP5_CL
^SRCAPP14 APP5VAL
^SRCAPP15 ^APP6_OP
^APP6_CL
APP6VAL
^APP7_OP
^APP7_CL
APP7VAL
^APP8_OP
^APP8_CL
APP8VAL
^APP9_OP
^APP9_CL
APP9VAL
^APP10_OP
^APP10_CL
APP10VAL
^APP11_OP
^APP11_CL
APP11VAL
^APP12_OP
^APP12_CL
APP12VAL
^APP13_OP
^APP13_CL
APP13VAL
^APP14_OP
^APP14_CL
APP14VAL
^APP15_OP
^APP15_CL
APP15VAL
COMMVALID
TEST
IEC07000048-4-en.vsd
IEC07000048 V4 EN-US
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6831-INPUTSIGNALS v3
PID-6831-OUTPUTSIGNALS v3
PID-6831-SETTINGS v3
The APPxVAL output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when at least one of the subscribed GOOSE datasets is
not received at the Function Block.
The TEST output will go HIGH if the sending IED is in test mode.
Receiver in block 0 0 1 0
Receiver in block and communication error 0 0 0 0
Table continues on next page
At least one of the inputs of this GOOSE block must be linked either in SMT by means of
a cross or in ACT by means of a GOOSE connection (if easy GOOSE engineering is
enabled) to receive any data. Only those outputs whose source input is linked/connected
will be updated.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the APPxVAL output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
APPxVAL output will be LOW.
GOOSEBINRCV
BLOCK ^OUT1
^SRCOUT1 DVALID1
^SRCOUT2 ^OUT2
^SRCOUT3 DVALID2
^SRCOUT4 ^OUT3
^SRCOUT5 DVALID3
^SRCOUT6 ^OUT4
^SRCOUT7 DVALID4
^SRCOUT8 ^OUT5
^SRCOUT9 DVALID5
^SRCOUT10 ^OUT6
^SRCOUT11 DVALID6
^SRCOUT12 ^OUT7
^SRCOUT13 DVALID7
^SRCOUT14 ^OUT8
^SRCOUT15 DVALID8
^SRCOUT16 ^OUT9
DVALID9
^OUT10
DVALID10
^OUT11
DVALID11
^OUT12
DVALID12
^OUT13
DVALID13
^OUT14
DVALID14
^OUT15
DVALID15
^OUT16
DVALID16
COMMVALID
TEST
IEC07000047 V5 EN-US
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6827-INPUTSIGNALS v3
PID-6827-OUTPUTSIGNALS v3
PID-6827-SETTINGS v3
The DVALIDx output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure condition and
the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
Receiver in block 0 0 1 0
Receiver in block and communication error 0 0 0 0
Receiver in test mode and incoming data Updated 1 1 0
with q= Normal
Receiver in test mode and incoming data Updated 1 1 1
with q= Test
Communication Error 0 0 0 0
At least one of the inputs of this GOOSE block must be linked either in SMT by means of
a cross or in ACT by means of a GOOSE connection (if easy GOOSE engineering is
enabled) to receive any data. Only those outputs whose source input is linked/connected
will be updated.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the DVALIDx output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
DVALIDx output will be LOW.
17.4.14.1 Identification
GUID-4B23D0CF-F298-4BBC-B833-1B8CC98D1604 v1
The GOOSE XLN Receive component is used to collect information from another device’s XCBR/
XSWI logical node sent over process bus via GOOSE. The GOOSE XLN Receive component
includes 12 different outputs (and their respective channel valid bits) with defined names to ease the
61850 mapping of the GOOSE signals in the configuration process.
GOOSEXLNRCV
BLOCK ^BEH
^SRCBEH BEH_VALID
^SRCLOC ^LOC
^SRCBLKOPN LOC_VALID
^SRCBLKCLS ^BLKOPN
^SRCPOS BLKOPN_VALID
^SRCOPCNT ^BLKCLS
^SRCBLK BLKCLS_VALID
^SRCSTSELD ^POSVAL
^SRCOPRCVD POSVAL_VALID
^SRCOPOK ^OPCNT
^SRCEEHLT OPCNT_VALID
^SRCOPCAP ^BLK
BLK_VALID
^STSELD
STSELD_VALID
^OPRCVD
OPRCVD_VALID
^OPOK
OPOK_VALID
^EEHEALTH
EEHEALTH_VALID
^OPCAP
OPCAP_VALID
COMMVALID
TEST
IEC16000036-1-en.vsdx
IEC16000036 V1 EN-US
17.4.14.4 Signals
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are used
for GOOSE connections. These connections are visible and possible to make only if Easy
GOOSE engineering is enabled. For instructions on how to enable Easy GOOSE
engineering in PCM600, refer to the Engineering Manual.
PID-6643-INPUTSIGNALS v3
PID-6643-OUTPUTSIGNALS v3
17.4.14.5 Settings
PID-6643-SETTINGS v3
The xxx_VALID outputs will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure condition and
the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
At least one of the inputs of this GOOSE block must be linked either in SMT by means of
a cross or in ACT by means of a GOOSE connection (if easy GOOSE engineering is
enabled) to receive any data. Only those outputs whose source input is linked/connected
will be updated.
The implementation for IEC 61850 quality data handling is restricted to a simple level. If
quality data validity is GOOD then the xxx_VALID output will be HIGH. If quality data
validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA then the
xxx_VALID output will be LOW.
The IEC/UCA 61850-9-2LE process bus communication protocol enables an IED to communicate
with devices providing measured values in digital format, commonly known as Merging Units (MU).
The rear access points are used for the communication.
The function blocks are not represented in the configuration tool. The signals appear only
in the SMT tool when merging units (MU) are included in the configuration with the
Ethernet configuration tool. In the SMT tool they can be mapped to the desired virtual
input (SMAI) of the IED and used internally in the configuration.
17.5.3 Signals
GUID-942C81AD-22D9-438F-95FA-1972BA2BE2E5 v1
The output signals are the same for all MUs so only the table for MU1_HW is included in this manual.
PID-6850-OUTPUTSIGNALS v3
PID-6850-SETTINGS v3
The merging units (MUs) are situated close to the primary equipment, like circuit breakers, isolators,
etc. The MUs have the capability to gather measured values from measuring transformers, non-
conventional transducers or both. The gathered data are then transmitted to subscribers over the
process bus, utilizing the IEC/UCA 61850-9-2LE protocol.
The IED communicates with the MUs over the process bus via the rear access points. For the user,
the MU appears in the IED as a normal analogue input module and is engineered in the very same
way.
IED
Application
Station Wide
Preprocessing blocks Preprocessing blocks GPS Clock
SMAI SMAI
MU1 MU2
Splitter
Electrical-to-
Optical Converter
1PPS
TRM module
Access Point
110 V 1A 1A
IEC/UCA 61850-9-2LE
Ethernet Switch
IEC/UCA 61850-9-2LE
IEC/UCA 61850-9-2LE
Combi Combi
CT CT
Sensor Sensor
Conventional VT
IEC08000072 V4 EN-US
Figure 454: Example of signal path for sampled analogue values from MU and conventional
CT/VT
The function has the following alarm signals:
• MUDATA:
• Ok[0] indicates that the merging unit samples are received from the merging unit and are
accepted.
• ERROR[1] indicates that the merging unit samples are generated by internal substitution.
• SYNCH:
• OK[0] indicates
• when SyncLostMode = Block, and the time quality of the hardware is within the set
value [SyncAccLevel=1us, 4us or Unspecified]
• when SyncLostMode = BlockOnLostUTC, the time quality of the hardware is within
the set value [SyncAccLevel=1us, 4us or Unspecified] [AND] IED receives global
common time[UTC] from any of the FineSyncSource like IRIG-B, PTP or GPS.
• when SyncLostMode = NoBlock
• ERROR[1] indicates
• when SyncLostMode = Block, and the time quality of the hardware is not within the
set value [SyncAccLevel=1us, 4us or Unspecified]
• when SyncLostMode = BlockonLostUTC, the time quality of the hardware is not
within the set value [SyncAccLevel=1us, 4us or Unspecified] [OR] IED doesn't
receive global common time[UTC] from any of the FineSyncSource like IRIG-B,
PTP or GPS.
• SMPLLOST:
• NO[0] indicates that the merging unit samples are received from the merging unit and are
accepted
• YES[1] indicates
• when merging unit data are generated by internal substitution
• when one/more channel's Quality is not good
• when merging unit is in Testmode/detailed quality=Test, IED is not in test mode
• MUSYNCH:
• OK[0] indicates
• when SyncLostMode = Block/BlockOnLostUTC, the time quality of the hardware is
within the set value [SyncAccLevel=1us, 4us or Unspecified] [AND] merging unit is
time synchronized [smpSynch flag in datastream is not equal to 0] [AND] the
hardware time matches the time in the datastream within 10 ms.
• when SyncLostMode = NoBlock, the merging unit samples are received
• ERROR[1] indicates
• when SyncLostMode = Block/BlockOnLostUTC, the time quality of the hardware is
not within the set value [SyncAccLevel=1us, 4us or Unspecified] [OR] merging unit
is not time synchronized [smpSynch flag in datastream is equal to 0] [OR] the
hardware time is out of 10 ms from the time in the datastream.
• when SyncLostMode = NoBlock, the merging unit samples are not received
• TESTMODE:
• NO[0] indicates that No merging unit analog channels are in testmode
• YES[1] indicates that one/more subscribed channels are in testmode
• SIMMODE:
• NO[0] indicates that normal data is received and are accepted
• YES[1] indicates that the received datastream is tagged as simulated and are accepted
During Internal substitution, the functions connected to that particular merging unit will be blocked
and the merging unit channel's analog values will be forced to 0 with quality as Invalid, Substituted,
Failure.
Timeout
TSYNCERR Indicates that there is some timeout on any configured time source or the time quality is
worse than specified in SynchAccLevel. The timeout is individually specified per time source (PPS,
IRIG-B, SNTP etc.) See section "Time synchronization TIMESYNCHGEN"
Introduction GUID-9D9A73FA-505E-4936-BB55-E7D86AB8023B v2
Conditional blocking is a concept in the 670 series which improves resilience against errors in
network communication, time synchronization, and hardware. This is important for digital substations
where analogue data (some or even all) is sourced from the IEC 61850 9-2 MUs (merging units).
To make conditional blocking work as intended, there are configuration rules that need to be
followed. If an incorrect configuration is deployed, the IED functionality may be blocked inadvertently,
thereby reducing the availability of protection functions. An incorrect configuration also increases the
sensitivity to single point failures.
With a proper configuration, on the other hand, only functions directly affected by an error will be
blocked, while other functions will continue to operate.
Implementation GUID-D9880430-E6D6-42EE-B315-7E9279BEC913 v1
In Figure 455, two functions are shown, F1 and F2, where F1 takes data only from MU1, while F2
takes data from both MU1 and MU2.
3Ph Group
MU1 SMAI F1
3Ph Group
MU2 SMAI F2
IEC18001012 V2 EN-US
Function F1 is independent of MU2, if MU2 is lost, this will not affect F1. It will execute its algorithms
as long as data from MU1 is available. Note that F1 will operate even with poor time synchronization.
This is possible because F1 only depends on data from a single MU.
Function F2 on the other hand, depends on the correct information and time synchronized data being
available from both MU1 and MU2. If any of the MUs fail, or if any of them indicates the loss of time
synchronization, F2 will be blocked.
• Hardware errors (for example, network switches and fibers, station clock failures etc.)
Depending on how the IED is configured, these kinds of errors will have a bigger or smaller impact
on how much of the IED functionality that is blocked.
IEC18001013 V2 EN-US
Due to the way conditional blocking works, if one or both of the MUs indicate poor time
synchronization, then the entire function will be blocked. Unfortunately, in this example, this will also
block the non-directional over-current step, although it would be perfectly capable of operating
without time synchronization.
IEC18001014 V2 EN-US
This is an example of how the user needs to configure the IED to ensure conditional blocking works
as intended.
Another way to avoid conditional blocking is to take currents as well as voltages from the same MU.
Thus, the usage of multiple SMAIs in itself is not a trigger of conditional blocking, but the usage of
multiple MUs can be. This also implies that hardware-wise, one should try to not divide a 3-phase
group of currents and voltages over multiple MUs, when this is possible (this is really a consideration
for the substation hardware setup).
SDEPSDE
VRPVOC
To begin with, a suitable station clock must be available. Hitachi Energy recommends that PTP is
used as a time synchronization protocol.
Further, it is recommended that at least two station clocks are connected to the substation network.
This is to avoid the single point of failure. If one clock encounters an error, or loses its connection to
the network, the other clock will seamlessly take over the time synchronization task, and thus avoid
blocking due to lost time synchronization.
It is also required that PTP is active on all ports that send or receive sampled data on all devices, to
secure that the system time is common for all devices.
This means that during a transition, for example, when a clock regains time from the GPS system
after drifting for some time, there can be different times in different parts of a substation.
GMC
MU2
REX 670
MU1 MU3
SAM600 - TS CT VT
IEC18001015 V2 EN-US
If the station clock is out of order for some time and then regains good synch from, for example, the
satellite system, the correct time will reach MU2 and the 670 first. Then, it will propagate to MU1 and
MU3 through the boundary clock in the 670. This means, that for a short duration, MU1 and MU2 will
both appear to be synchronized, but they will in practice have different times. If the protection is not
blocked during this condition, user will get a false trip.
To fix this problem, the synch-lost signal from the merging units is prolonged for 16 seconds in the
670. The synch-lost signal is used for conditional blocking of protections which use data from the
TRM of the IED in combination with a merging unit. The maximum time frame specified by IEC
61850-9-3 to propagate the time and resynchronize is 16 seconds.
The same time frame applies for the internal synchronization of the 670. In the scenario where PTP
is used in combination with 9-2, the synch-lost signal is also prolonged with 16 seconds. Again, this
delay is needed to ensure that the correct time has propagated to all units before blocked functions
are released for operation.
The quality expander component is used to display the detailed quality of an IEC/UCA 61850-9-2LE
analog channel. The component expands the channel quality output of a Merging Unit analog
channel received in the IED as per the IEC 61850-7-3 standard. This component can be used during
the ACT monitoring to get the particular channel quality of the Merging Unit.
The expanded quality bits are visible on the outputs as per IEC 61850-7-3 standard. When written to
IED, the configuration will show the expanded form of the respective MU channel quality information
during the online monitoring in the ACT.
The validity status of the quality as described in IEC 61850-7-3 is expanded to Good, Invalid,
Reserved and Questionable (QUEST) outputs.
The detailed quality as described in IEC 61850-7-3 is expanded to Overflow, Out of Range
(OUTRANGE), Bad reference (BADREF), Oscillatory (OSC), Failure, old data, inconsistent
(INCONS) and inaccurate (INACC) outputs.
The source status of the quality as described in IEC 61850-7-3 is expanded to Process and
Substituted (SUBST) outputs.
The other quality statuses (Test, Operator Blocked (OPBLKD) and Derived) are shown as they are.
The derived quality is the extension to IEC 61850-7-3. If the derived bit is set to 1, it indicates that
there is no physical sensor within the system to determine the value, but the value is derived from a
combination of values from other physical sensors. Typically, I4 or U4 are derived if they are
calculated as the sum of the three phase quantities.
The configured MU channel quality as described in IEC 61850-7-3 is available on LHMI. This can be
viewed under Main Menu /Diagnostics /Merging units /MUX:XXXX/XX Quality .
IEC16000074 V2 EN-US
SEMOD172236-2 v3
Functions Value
Protocol IEC/UCA 61850-9-2LE
Communication speed for the IEDs 100BASE-FX
An optical network can be used within the substation automation system. This enables
communication with the IED through the LON bus from the operator’s workplace, from the control
center and also from other terminals.
In this document the most common addresses for commands and events are available. For other
addresses, refer to section Related documents.
It is assumed that the reader is familiar with LON communication protocol in general.
PID-593-SETTINGS v11
PID-4147-SETTINGS v7
M15083-3 v3
The speed of the network depends on the medium and transceiver design. With protection and
control devices, fiber optic media is used, which enables the use of the maximum speed of 1.25
Mbits/s. The protocol is a peer-to-peer protocol where all the devices connected to the network can
communicate with each other. The own subnet and node number are identifying the nodes (max. 255
subnets, 127 nodes per one subnet).
The LON bus links the different parts of the protection and control system. The measured values,
status information, and event information are spontaneously sent to the higher-level devices. The
higher-level devices can read and write memorized values, setting values, and other parameter data
when required. The LON bus also enables the bay level devices to communicate with each other to
deliver, for example, interlocking information among the terminals without the need of a bus master.
The LonTalk protocol supports two types of application layer objects: network variables and explicit
messages. Network variables are used to deliver short messages, such as measuring values, status
information, and interlocking/blocking signals. Explicit messages are used to transfer longer pieces of
information, such as events and explicit read and write messages to access device data.
The benefits achieved from using the LON bus in protection and control systems include direct
communication among all terminals in the system and support for multi-master implementations. The
LON bus also has an open concept, so that the terminals can communicate with external devices
using the same standard of network variables.
For double indications, only the first eight inputs 1–8 must be used. Inputs 9–16 can be used for
other types of events at the same EVENT block.
Three EVENT function blocks EVENT:1 to EVENT:3 running with a fast loop time (3 ms) are available
as basic in the IEDs.. The remaining EVENT function blocks EVENT:4 to EVENT:9 run with a loop
time of 8 ms and EVENT:10 to EVENT:20 run with a loop time of 100 ms. The EVENT blocks are
used to send binary signals, integers, real time values like analogue data from measuring functions
and mA input modules as well as pulse counter signals.
16 pulse counter value function blocks PCFCNT:1 to PCFCNT:16 are available in the IEDs.
The first LON address in every EVENT function block is found in table 635. The formula for
calculating the LON address is:
For instance, the first pin at Event block number 2 has the address: (2-1)×16 +1 +1023 = 1040
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, the EVENT function makes the reporting decision (reporting criteria for integers has
no semantic, prefer to be set by the user)
Directly connected binary IO signal via binary input function block (SMBI) is always reported on
change, no changed detection is done in the EVENT function block. Other Boolean signals, for
example a start or a trip signal from a protection function is event masked in the EVENT function
block.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent using
the same message code. It is mandatory that one device sends out only one SPA-bus message at a
time to one node and waits for the reply before sending the next message.
For commands from the operator workplace to the IED for apparatus control, that is the function
blocks type SCSWI 1 to 30, SXCBR 1 to 18 and SXSWI 1 to 24, the SPA addresses are according to
table 636.
SEMOD116913-2 v2
Table 636: SPA addresses for commands from the operator workplace to the IED for apparatus control
Multiple command send function block (MULTICMDSND) is used to pack the information to one
value. This value is transmitted to the receiving node and presented for the application by a multiple
command receive function block (MULTICMDRCV). With horizontal communication, the input
BOUND on MULTICMDSND must be set to 1. There are 10 MULTICMDSND and 60
MULTICMDRCV function blocks available. These function blocks are connected using the LON
network tool (LNT). The tool also defines the service and addressing on LON.
This is an overview for configuring the network variables for the IEDs.
LON
en05000718.vsd
IEC05000718 V2 EN-US
en05000719.vsd
IEC05000719 V1 EN-US
en05000720.vsd
IEC05000720 V1 EN-US
In the following figure, X311 ports A/B are for SPA, IEC103 or DNP3 and X311 ports C/D are for LON
protocol.
IEC16000079-1-en.vsd
IEC16000079 V1 EN-US
Figure 463: Rear view of 1/2 x 19” casing with 1 TRM slot
There are two types of IO connectors: snap-in connectors for plastic fiber cables and ST/bayonet
connectors for glass fiber cables. The SLM can be equipped with either type of connector or a
combination of both connectors. This is identified by a tag.
Connect the incoming optical fiber to the RX receiver input, and the outgoing optical fiber to the TX
transmitter output. Pay special attention to the instructions concerning handling and connection of
fiber cables.
M11927-1 v2
Function Value
Protocol LON
Communication speed 1.25 Mbit/s
In this section the most common addresses for commands and events are available. For other
addresses, refer to section Related documents.
It is assumed that the reader is familiar with the SPA communication protocol in general.
Using the rear SPA port for either local or remote communication with a PC requires the following
equipment:
• Optical fibers
• Opto/electrical converter for the PC
• PC
When communicating between the local HMI and a PC, the only hardware required is a front-
connection cable.
SPA can be accessed via LHMI front only when using the Field Service Tool Access
(FSTACCS).
PID-6195-SETTINGS v5
PID-6194-SETTINGS v5
M11880-3 v2
The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7 data bits + even
parity, 1 stop bit) with data transfer rate up to 38400 bit/s. For more information on recommended
baud rate for each type of IED, refer to Technical reference manual. Messages on the bus consist of
ASCII characters.
The master requests slave information using request messages and sends information to the slave in
write messages. Furthermore, the master can send all slaves in common a broadcast message
containing time or other data. The inactive state of bus transmit and receive lines is a logical "1".
The SPA addresses for the pulse counter values PCFCNT:1 to PCFCNT:16 are found in table 640.
The single command, 16 signals function consists of four function blocks: SINGLECMD:1 to
SINGLECMD:4 for 16 binary output signals each.
The signals can be individually controlled from the operator station, remote-control gateway, or from
the local HMI on the IED. For Single command, 3 signals function block, SINGLECMD:1 to
SINGLECMD:3, the address is for the first output. The other outputs follow consecutively after the
first one. For example, output 7 on the SINGLECMD:2 function block has the 5O533 address.
The SPA addresses for Single command, 16 signals functions SINGLECMD:1 to SINGLECMD:4 are
found in table 641.
Function block SPA address CMD Input SPA address CMD output
SINGLECMD1-Cmd1 4-S-4639 5-O-511
SINGLECMD1-Cmd2 4-S-4640 5-O-512
SINGLECMD1-Cmd3 4-S-4641 5-O-513
SINGLECMD1-Cmd4 4-S-4642 5-O-514
SINGLECMD1-Cmd5 4-S-4643 5-O-515
SINGLECMD1-Cmd6 4-S-4644 5-O-516
SINGLECMD1-Cmd7 4-S-4645 5-O-517
SINGLECMD1-Cmd8 4-S-4646 5-O-518
SINGLECMD1-Cmd9 4-S-4647 5-O-519
SINGLECMD1-Cmd10 4-S-4648 5-O-520
SINGLECMD1-Cmd11 4-S-4649 5-O-521
SINGLECMD1-Cmd12 4-S-4650 5-O-522
SINGLECMD1-Cmdt13 4-S-4651 5-O-523
SINGLECMD1-Cmd14 4-S-4652 5-O-524
SINGLECMD1-Cmd15 4-S-4653 5-O-525
SINGLECMD1-Cmd16 4-S-4654 5-O-526
Table continues on next page
Function block SPA address CMD Input SPA address CMD output
SINGLECMD2-Cmd1 4-S-4672 5-O-527
SINGLECMD2-Cmd2 4-S-4673 5-O-528
SINGLECMD2-Cmdt3 4-S-4674 5-O-529
SINGLECMD2-Cmd4 4-S-4675 5-O-530
SINGLECMD2-Cmd5 4-S-4676 5-O-531
SINGLECMD2-Cmd6 4-S-4677 5-O-532
SINGLECMD2-Cmd7 4-S-4678 5-O-533
SINGLECMD2-Cmd8 4-S-4679 5-O-534
SINGLECMD2-Cmd9 4-S-4680 5-O-535
SINGLECMD2-Cmd10 4-S-4681 5-O-536
SINGLECMD2-Cmd11 4-S-4682 5-O-537
SINGLECMD2-Cmd12 4-S-4683 5-O-538
SINGLECMD2-Cmd13 4-S-4684 5-O-539
SINGLECMD2-Cmd14 4-S-4685 5-O-540
SINGLECMD2-Cmd15 4-S-4686 5-O-541
SINGLECMD2-Cmd16 4-S-4687 5-O-542
SINGLECMD3-Cmd1 4-S-4705 5-O-543
SINGLECMD3-Cmd2 4-S-4706 5-O-544
SINGLECMD3-Cmd3 4-S-4707 5-O-545
SINGLECMD3-Cmd4 4-S-4708 5-O-546
SINGLECMD3-Cmd5 4-S-4709 5-O-547
SINGLECMD3-Cmd6 4-S-4710 5-O-548
SINGLECMD3-Cmd7 4-S-4711 5-O-549
SINGLECMD3-Cmd8 4-S-4712 5-O-550
SINGLECMD3-Cmd9 4-S-4713 5-O-551
SINGLECMD3-Cmd10 4-S-4714 5-O-552
SINGLECMD3-Cmd11 4-S-4715 5-O-553
SINGLECMD3-Cmd12 4-S-4716 5-O-554
SINGLECMD3-Cmd13 4-S-4717 5-O-555
SINGLECMD3-Cmd14 4-S-4718 5-O-556
SINGLECMD3-Cmd15 4-S-4719 5-O-557
SINGLECMD3-Cmd16 4-S-4720 5-O-558
SINGLECMD4-Cmd1 4-S-4738 5-O-559
SINGLECMD4-Cmd2 4-S-4739 5-O-560
SINGLECMD4-Cmd3 4-S-4740 5-O-561
SINGLECMD4-Cmd4 4-S-4741 5-O-562
SINGLECMD4-Cmd5 4-S-4742 5-O-563
SINGLECMD4-Cmd6 4-S-4743 5-O-564
SINGLECMD4-Cmd7 4-S-4744 5-O-565
SINGLECMD4-Cmd8 4-S-4745 5-O-566
SINGLECMD4-Cmd9 4-S-4746 5-O-567
SINGLECMD4-Cmd10 4-S-4747 5-O-568
SINGLECMD4-Cmd11 4-S-4748 5-O-569
SINGLECMD4-Cmd12 4-S-4749 5-O-570
SINGLECMD4-Cmd13 4-S-4750 5-O-571
Table continues on next page
Function block SPA address CMD Input SPA address CMD output
SINGLECMD4-Cmd14 4-S-4751 5-O-572
SINGLECMD4-Cmd15 4-S-4752 5-O-573
SINGLECMD4-Cmd16 4-S-4753 5-O-574
Figure 464 shows an application example of how the user can, in a simplified way, connect the
command function via the configuration logic circuit in a protection IED for control of a circuit breaker.
A pulse via the binary outputs of the IED normally performs this type of command control. The SPA
addresses to control the outputs OUT1 – OUT16 in SINGLECMD:1 are shown in table 641.
SINGLECMD PULSETIMER
BLOCK ^OUT1 INPUT OUT To output board, CLOSE
#CD01-CMDOUT1 ^OUT2
#CD01-CMDOUT2 ^OUT3
#CD01-CMDOUT3 ^OUT4
#CD01-CMDOUT4 ^OUT5 AND PULSETIMER
^OUT6 INPUT1 OUT INPUT OUT To output board, OPEN
#CD01-CMDOUT5
^OUT7 INPUT2 NOUT
#CD01-CMDOUT6
#CD01-CMDOUT7 ^OUT8 INPUT3
#CD01-CMDOUT8 ^OUT9 INPUT4
#CD01-CMDOUT9 ^OUT10
#CD01-CMDOUT10 ^OUT11
#CD01-CMDOUT11 ^OUT12
#CD01-CMDOUT12 ^OUT13
#CD01-CMDOUT13 ^OUT14
#CD01-CMDOUT14 ^OUT15
#CD01-CMDOUT15 ^OUT16
#CD01-CMDOUT16
SYNCH OK
IEC05000717-4-en.vsd
IEC05000717 V4 EN-US
Figure 464: Application example showing a simplified logic diagram for control of a circuit
breaker
The MODE input defines if the output signals from SINGLECMD:1 is off, steady or setable pulse
length signals. This is set in Parameter Setting Tool (PST) under: Main Menu /Settings / IED
Settings / Control / Commands / Single Command or via Parameter Setting Tool (PST).
Two special signals for event registration purposes are available in the IED: Terminal Restarted
(0E50) and Event buffer overflow (0E51).
The status and event codes for the EVENT function are found in Table 642.
These values are only applicable if the event mask is masked ≠ OFF.
EVENT
Block BLOCK
ILRANG ^INPUT1
PSTO ^INPUT2
UL12RANG ^INPUT3
UL23RANG ^INPUT4
UL31RANG ^INPUT5
3I0RANG ^INPUT6
3U0RANG ^INPUT7
FALSE ^INPUT8
^INPUT9
^INPUT10
^INPUT11
^INPUT12
^INPUT13
^INPUT14
^INPUT15
^INPUT16
IEC07000065-2-en.vsd
IEC07000065 V2 EN-US
The serial communication module (SLM) is a mezzanine module placed on the first analog digital
conversion module (ADM). It is used for LON, SPA, IEC 60870-5-103 and DNP communication.
In the following figure, X311 ports A/B are for SPA, IEC103 or DNP3 and X311 ports C/D are for LON
protocol.
IEC16000079-1-en.vsd
IEC16000079 V1 EN-US
Figure 466: Rear view of 1/2 x 19” casing with 1 TRM slot
There are two types of IO connectors: snap-in connector for plastic fiber cables and ST/bayonet
connector for glass fiber cables. The SLM can be equipped with either type or connector or with a
combination of both types of connectors. This is identified with a tag.
Connect the incoming optical fiber to the RX receiver input, and the outgoing optical fiber to the TX
transmitter output. Pay special attention to the instructions concerning handling and connection of
fiber cables.
For setting the transfer rate (baud rate) and slave number, please refer to the Application manual and
Commissioning manual respectively.
M11901-1 v2
Function Value
Protocol SPA
Communication speed 300, 1200, 2400, 4800, 9600, 19200 or 38400 Bd
Slave number 1 to 899
IEC 60870-5-103 communication protocol is mainly used when a protection IED communicates with
a third party control or monitoring system. This system must have software that can interpret the IEC
60870-5-103 communication messages.
103MEAS is a function block that reports all valid measuring types depending on connected signals.
The set of connected input will control which ASDUs (Application Service Data Units) are generated.
• 9 Will be generated if at least IL1 is connected. IL2, IL3, UL1, UL2, UL3, P, Q, F are optional but
there can be no holes.
• 3.4 Will be generated if IN and UN are present.
• 3.3 Will be generated if IL2, Ul1L2, P and Q present.
• 3.2 Will be generated if IL2, UL1L2 and P or Q missing.
• 3.1 Will be generated if IL2 present and IL1 missing (otherwise IL2 in 9).
17.8.2.2 Identification
GUID-3E1AB624-1B68-4018-B1BA-BC2C811F8F74 v1
I103MEAS
BLOCK
IL1
IL2
IL3
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
IEC10000287-1-en.vsd
IEC10000287 V1 EN-US
17.8.2.4 Signals
PID-6625-INPUTSIGNALS v4
17.8.2.5 Settings
PID-6625-SETTINGS v4
I103MEASUSR is a function block with user defined input measurands in monitor direction. These
function blocks include the FunctionType parameter for each block in the private range, and the
Information number parameter for each block.
17.8.3.2 Identification
GUID-A9E21066-354B-453D-8D9B-E86EE31CF5F9 v1
I103MEASUSR
BLOCK
^INPUT1
^INPUT2
^INPUT3
^INPUT4
^INPUT5
^INPUT6
^INPUT7
^INPUT8
^INPUT9
IEC10000288-1-en.vsd
IEC10000288 V1 EN-US
17.8.3.4 Signals
PID-3791-INPUTSIGNALS v5
17.8.3.5 Settings
PID-3791-SETTINGS v5
I103AR is a function block with defined functions for autorecloser indications in monitor direction.
This block includes the FunctionType parameter, and the information number parameter is defined
for each output signal.
17.8.4.2 Identification
GUID-7B066282-79D7-480B-BEDE-3C04F0FCBF05 v1
I103AR
BLOCK
16_ARACT
128_CBON
130_BLKD
IEC10000289-2-en.vsd
IEC10000289 V2 EN-US
17.8.4.4 Signals
PID-3973-INPUTSIGNALS v5
17.8.4.5 Settings
PID-3973-SETTINGS v5
I103EF is a function block with defined functions for earth fault indications in monitor direction. This
block includes the FunctionType parameter, and the information number parameter is defined for
each output signal.
17.8.5.2 Identification
GUID-033731B7-1B71-4CCC-8356-1C03CBCB23FA v1
I103EF
BLOCK
51_EFFW
52_EFREV
IEC10000290-1-en.vsd
IEC10000290 V1 EN-US
17.8.5.4 Signals
PID-3974-INPUTSIGNALS v5
17.8.5.5 Settings
PID-3974-SETTINGS v5
I103FLTPROT is used for fault indications in monitor direction. Each input on the function block is
specific for a certain fault type and therefore must be connected to a correspondent signal present in
the configuration. For example: 68_TRGEN represents the General Trip of the device, and therefore
must be connected to the general trip signal SMPPTRC_TRIP or equivalent.
The delay observed in the protocol is the time difference in between the signal that is triggering the
Disturbance Recorder and the respective configured signal to the IEC 60870-5-103 I103FLTPROT.
17.8.6.2 Identification
GUID-55593EC4-7AED-47A0-8311-DB22D013A193 v1
I103FLTPROT
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
68_TRGEN
69_TRL1
70_TRL2
71_TRL3
72_TRBKUP
73_SCL
74_FW
75_REV
76_TRANS
77_RECEV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
83_ZONE6
84_STGEN
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
FLTLOC
IEC10000291-2-en.vsdx
IEC10000291 V2 EN-US
17.8.6.4 Signals
PID-6864-INPUTSIGNALS v1
17.8.6.5 Settings
PID-6864-SETTINGS v1
I103IED is a function block with defined IED functions in monitor direction. This block uses parameter
as FunctionType, and information number parameter is defined for each input signal.
17.8.7.2 Identification
GUID-5EEBE11C-C8E3-4A8A-814F-840E137DB5B5 v1
I103IED
BLOCK
19_LEDRS
21_TESTM
22_SETCH
23_GRP1
24_GRP2
25_GRP3
26_GRP4
IEC10000292-2-en.vsd
IEC10000292 V2 EN-US
17.8.7.4 Signals
PID-3975-INPUTSIGNALS v5
17.8.7.5 Settings
PID-3975-SETTINGS v5
I103SUPERV is a function block with defined functions for supervision indications in monitor
direction. This block includes the FunctionType parameter, and the information number parameter is
defined for each output signal.
17.8.8.2 Identification
GUID-C8113B08-3586-412C-A750-606159B1E97E v1
I103SUPERV
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
IEC10000293-1-en.vsd
IEC10000293 V1 EN-US
17.8.8.4 Signals
PID-3976-INPUTSIGNALS v5
17.8.8.5 Settings
PID-3976-SETTINGS v5
I103USRDEF is a function block with user defined input signals in monitor direction. Each instance is
associated with a Function Type (FUN) and each input signal with an Information Number (INF).
Additionally, all input signals may be defined to use relative time and how to respond to a GI request.
The user is responsible for assigning a proper FUN value and proper INF values to all connected
inputs. See Settings for details.
17.8.9.2 Identification
GUID-474FDF39-CEFC-4370-9393-13BE62159969 v2
I103USRDEF
BLOCK
^INPUT1
^INPUT2
^INPUT3
^INPUT4
^INPUT5
^INPUT6
^INPUT7
^INPUT8
RT_START
IEC10000294-3-en.vsdx
IEC10000294 V3 EN-US
17.8.9.4 Signals
PID-6485-INPUTSIGNALS v5
GUID-9E29DE39-EA74-4D62-A2BA-F8E31A3D8757 v2
RT_START registers the positive transition (0->1) of a pulse and sets the time from which relative
time is derived. Relative time is assigned only to inputs where the corresponding TypNo parameter is
set to Relative. The maximum relative time and unit conform to the IEC 60870-5-103 standard.
17.8.9.5 Settings
PID-6485-SETTINGS v5
GUID-86DE9DBA-BE2F-4CC9-B447-1D2D86849EFF v2
The FunctionType parameter associates a particular instance of the function block with a FUN.
Refer to the IEC 60870-5-103 standard for details.
The InfNon parameters are used to associate each individual input signal with a userdefined INF.
Refer to the IEC 60870-5-103 standard for details.
The TypNon parameters determine if messages use absolute or relative time. This adheres to the
TYPE IDENTIFICATION (TYP) message types 1 (time-tagged message) and 2 (time-tagged
message with relative time) of the IEC 60870-5-103 standard.
The GiNon parameters determine whether a message is sent as a part of a GI reply or not. Refer to
the IEC 60870-5-103 standard for details.
I103CMD is a command function block in control direction with pre-defined output signals. The
signals are in steady state, not pulsed, and stored in the IED in case of restart.
17.8.10.2 Identification
GUID-CFD43980-0791-40D1-9136-CF4CCC35549A v1
I103CMD
BLOCK 16-AR
17-DIFF
18-PROT
IEC10000282-1-en.vsd
IEC10000282 V1 EN-US
17.8.10.4 Signals
PID-3969-INPUTSIGNALS v5
PID-3969-OUTPUTSIGNALS v5
17.8.10.5 Settings
PID-3969-SETTINGS v5
I103IEDCMD is a command block in control direction with defined IED functions. All outputs are
pulsed and they are NOT stored. Pulse length is fixed to 400ms.
17.8.11.2 Identification
GUID-0D0B2477-1B0C-48F3-B047-CCF9C7A71856 v1
I103IEDCMD
BLOCK 19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
IEC10000283-1-en.vsd
IEC10000283 V1 EN-US
17.8.11.4 Signals
PID-3788-INPUTSIGNALS v5
PID-3788-OUTPUTSIGNALS v5
17.8.11.5 Settings
PID-3788-SETTINGS v5
I103USRCMD is a command block in control direction with user defined output signals. These
function blocks include the FunctionType parameter for each block in the private range, and the
Information number parameter for each output signal.
17.8.12.2 Identification
GUID-9D6D1636-36C6-4C4E-B157-2D827820DDC7 v1
I103USRCMD
BLOCK ^OUTPUT1
^OUTPUT2
^OUTPUT3
^OUTPUT4
^OUTPUT5
^OUTPUT6
^OUTPUT7
^OUTPUT8
IEC10000284-1-en.vsd
IEC10000284 V1 EN-US
17.8.12.4 Signals
PID-3790-INPUTSIGNALS v5
PID-3790-OUTPUTSIGNALS v5
17.8.12.5 Settings
PID-3790-SETTINGS v5
I103GENCMD is used for transmitting generic commands over IEC 60870-5-103. The function has
two outputs signals CMD_OFF and CMD_ON that can be used to implement double-point command
schemes.
The I103GENCMD component can be configured as either 2 pulsed ON/OFF or 2 steady ON/OFF
outputs. The ON output is pulsed with a command with value 2, while the OFF output is pulsed with a
command value 1. If in steady mode is ON asserted and OFF deasserted with command 2 and vice
versa with command 1. Steady mode is selected by setting PulseLength=0. The I103GENCMD is
retained, and a command in steady mode will be reissued on restart.
17.8.13.2 Identification
GUID-1933A30C-5214-4116-8CD3-91BD975FACED v1
I103GENCMD
BLOCK ^CMD_OFF
^CMD_ON
IEC10000285-1-en.vsd
IEC10000285 V1 EN-US
17.8.13.4 Signals
PID-3970-INPUTSIGNALS v5
PID-3970-OUTPUTSIGNALS v5
17.8.13.5 Settings
PID-3970-SETTINGS v5
17.8.14 IED commands with position and select for IEC 60870-5-103
I103POSCMD
I103POSCMD is a transceiver function that monitors activity on its input signals and interprets any
state transition into commands then sent over an established IEC 60870-5-103 link. Additionally, it
listens for general interrogation (GI) requests and replies to those with a GI response message with
the current state of each connected input.
Input POSITION is a double-indication signal, and it is GI enabled. This means that any state
transition, that is to ON, OFF, intermediate and faulty, is reported spontaneously. However, the
intermediate and faulty states may be suppressed by setting the Report Intermediate Position = Off.
See the settings for RS485 and optical serial communication for more information.
Input SELECT is a single-indication signal, and it is also GI enabled. State transitions to ON and OFF
are reported spontaneously.
When input BLOCK is ON, the function will ignore GI requests and cease all monitoring activity.
Consequently, no transitions will be detected.
The I103POSCMD function is also equipped with three additional commands: Select, Operate and
Cancel. These are hidden in ACT and respond only to the base INF+1, INF+2 and INF+3
respectively. The base INF (Information Number) parameter is an IEC 60870-5-103 identifier that
associates a function in a 103 Master (such as Scada) with its equivalent in the IED.
17.8.14.2 Identification
GUID-ABF81C27-4605-4A15-9CF5-77FF82DE8747 v1
I103POSCMD
BLOCK
POSITION
SELECT
IEC10000286-1-en.vsd
IEC10000286 V1 EN-US
17.8.14.4 Signals
PID-6997-INPUTSIGNALS v1
17.8.14.5 Settings
PID-6997-SETTINGS v1
I103POSCMDV is a transceiver function that monitors activity on its input signals and interprets any
state transition into commands sent over an established IEC 60870-5-103 link. Additionally, it listens
for general interrogation (GI) requests, and replies to those with a GI response message with the
current state of each connected input.
Input POSITION is a double-indication signal, and it is GI enabled. This means that any state
transition, that is to ON, OFF, intermediate and faulty, is reported spontaneously. However, the
intermediate and faulty states may be suppressed by setting the Report Intermediate Position = Off.
See the settings for RS485 and optical serial communication for more information.
When input BLOCK is ON, the function ignores GI requests and ceases all monitoring activity.
Consequently, no transitions will be detected.
17.8.15.2 Identification
GUID-2249B679-03E4-43CC-B690-916246FE6A31 v1
I103POSCMDV
BLOCK
POSITION
IEC15000081-2-en.vsdx
IEC15000081 V2 EN-US
17.8.15.4 Signals
PID-6578-INPUTSIGNALS v5
17.8.15.5 Settings
PID-6578-SETTINGS v6
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
• Autorecloser ON/OFF
• Teleprotection ON/OFF
• Protection ON/OFF
• LED reset
• Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC 60870 standard part 5:
Transmission protocols, and to the section 103: Companion standard for the informative interface of
protection equipment.
The information types are supported when corresponding functions are included in the protection and
control IED.
Be aware of that different cycle times for function blocks must be considered to ensure
correct time stamping.
Number of instances: 1
INF Description
19 LED Reset
23 Activate setting group 1
24 Activate setting group 2
25 Activate setting group 3
26 Activate setting group 4
Number of instances: 1
INF Description
16 Auto-recloser on/off
17 Teleprotection on/off
18 Protection on/off
Number of instances: 4
Function type for each function block instance in private range is selected with parameter
FunctionType.
Information number must be selected for each output signal. Default values are 1 - 8.
INF 1) Description
1 Output signal 01
2 Output signal 02
3 Output signal 03
4 Output signal 04
5 Output signal 05
6 Output signal 06
7 Output signal 07
8 Output signal 08
Status M11874-107 v1
Terminal status indications in monitor direction, I103IED M11874-109 v7
Indication block for status in monitor direction with defined IED functions.
Number of instances: 1
INF Description
19 LED reset
21 TestMode
22 Local Parameter setting
23 Setting group 1 active
24 Setting group 2 active
25 Setting group 3 active
26 Setting group 4 active
Number of instances: 20
Number of instances: 1
Number of instances: 1
INF Description
51 Earth fault forward
52 Earth fault reverse
Number of instances: 1
INF Description
16 Autorecloser active
128 CB on by Autorecloser
130 Autorecloser blocked
Measurands M11874-382 v2
Function blocks in monitor direction for input measurands. Typically connected to monitoring function,
for example to power measurement CVMMXN.
The IED reports all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.
The upper limit is the maximum value that can be encoded into the ASDU (Application Service Data
Unit). Any value higher than this value will be tagged as OVERFLOW. The factors 1.2 and 2.4 are
taken from the 103 standard and require that a rated value to use as base exists, and then use 1.2 or
2.4 times <rated> as maxVal. You can use 2.4 times rated as maxVal, but as there is no way to
propagate value to client, the use of a scale factor on <rated> does not make much difference.
If the client has a hard-coded gain of 1.2 * <rated> then client-scaled-max ::= 1.2 times
<maxVal>/1.2
Resolution is <maxVal> / 4095 and hence the lowest possible maxVal yields the best accuracy.
INF Description
148 IL1
144, 145, IL2
146, 148
148 IL3
147 IN, Neutral current
148 UL1
148 UL2
148 UL3
145, 146 UL1-UL2
147 UN, Neutral voltage
146, 148 P, active power
146, 148 Q, reactive power
148 f, frequency
Example: Input1, Input2, and Input4 are connected, Input3 is not connected.
<Number of information elements> will be 3 (Input3 NOT connected) -1 = 2, that is, only Input1 and
Input2 will be transmitted.
Analog signals, 40-channels: the channel number for each channel has to be specified. Channels
used in the public range are 1 to 8 and with:
Channel number used for the remaining 32 analog signals are numbers in the private range 64 to 95.
Binary signals, 128-channels: for each channel the user can specify a FUNCTION TYPE and an
INFORMATION NUMBER.
M11874-629 v7
Disturbance upload
All analog and binary signals that are recorded with disturbance recorder can be reported to the
master. The last eight disturbances that are recorded are available for transfer to the master. A
successfully transferred disturbance (acknowledged by the master) will not be reported to the master
again.
When a new disturbance is recorded by the IED a list of available recorded disturbances will be sent
to the master, an updated list of available disturbances can be sent whenever something has
happened to disturbances in this list. For example, when a disturbance is deleted (by other client, for
example, SPA) or when a new disturbance has been recorded or when the master has uploaded a
disturbance.
Information sent in the disturbance upload is specified by the standard; however, some of the
information are adapted to information available in disturbance recorder in the IED series.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF (status of fault)
exists. This information element consists of 4 bits and indicates whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
• Bit TEST: the disturbance data have been recorded during normal operation or test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event than start
The only information that is easily available is test-mode status. The other information is always set
(hard coded) to:
Another information element in ASDU23 is the FAN (fault number). According to the standard this is
a number that is incremented when a protection function takes action. FAN is equal to disturbance
number, which is incremented for each disturbance.
ASDU26 / ASDU31
When a disturbance has been selected by the master by sending ASDU24, the protection equipment
answers by sending ASDU26, which contains an information element named NOF (number of grid
faults). This number must indicate fault number in the power system,that is, a fault in the power
system with several trip and auto-reclosing has the same NOF (while the FAN must be incremented).
NOF is just as FAN, equal to disturbance number.
Supported
Electrical Interface
EIA RS-485 Yes
number of loads 32
Optical interface
glass fiber Yes
plastic fiber
Transmission speed
9600 bit/s Yes
19200 bit/s Yes
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
Table continues on next page
Supported
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command Yes
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
The serial communication module (SLM) is used for SPA/IEC 60870-5-103/DNP and LON
communication. This module is a mezzanine module, and is placed assembled on the Numerical
module (NUM). The serial communication module can have connectors for two plastic fiber cables
(snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and glass fiber. Three
different types are available depending on type of fiber.
The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber to the
TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling and connection of the optical fibers. The module is identified
with a number on the label on the module.
M11921-1 v4
Function Value
Protocol IEC 60870-5-103
Communication speed 9600, 19200 Bd
GUID-1A6E066C-6399-4D37-8CA5-3074537E48B2 v3
The IED provides two function blocks enabling several IEDs to send and receive signals via the
interbay bus. The sending function block, MULTICMDSND, takes 16 binary inputs. LON enables
these to be transmitted to the equivalent receiving function block, MULTICMDRCV, which has 16
binary outputs.
The common behavior for all 16 outputs of the MULTICMDRCV is set to either of two modes: Steady
or Pulse.
• 1 = Steady: This mode simply forwards the received signals to the binary outputs.
• 2 = Pulse: When a received signal transitions from 0 (zero) to 1 (one), a pulse with a duration of
exactly one execution cycle is triggered on the corresponding binary output. This means that no
connected function block may have a cycle time that is higher than the execution cycle time of
the particular MULTICMDRCV instance.
SEMOD119976-5 v2
MULTICMDRCV
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
IEC06000007-2-en.vsd
IEC06000007 V2 EN-US
MULTICMDSND
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
IEC06000008-2-en.vsd
IEC06000008 V2 EN-US
PID-400-INPUTSIGNALS v10
PID-399-INPUTSIGNALS v10
PID-400-OUTPUTSIGNALS v10
PID-399-OUTPUTSIGNALS v10
PID-400-SETTINGS v10
PID-399-SETTINGS v10
There are 10 instances of the MULTICMDSND function block. The first two are fast (8 ms cycle time)
while the others are slow (100 ms cycle time). Each instance has 16 binary inputs, to which 16
independent signals can be connected. Connected signals are sent through MULTICMDSND to the
receiving equivalent, MULTICMDRCV, located on a different IED.
The MULTICMDRCV function block has 16 binary outputs, all controlled through the command block
of one or many MULTICMDSND function blocks. There are 60 instances of the MULTICMDRCV
where the first 12 are fast (8 ms), and the others are slow (100 ms). Additionally, the MULTICMDRCV
has a supervision function, which sets the output connector "VALID" to 0 (zero) if its block does not
receive any data within the time defined by tMaxCycleTime.
There can be 6 external log servers to send syslog events to. Each server can be configured with IP
address; IP port number and protocol format. The format can be either syslog (RFC 3164 or RFC
5424) or Common Event Format (CEF) from ArcSight.
17.10.2 Settings
PID-7978-SETTINGS v1
GUID-CFD1D67E-27D3-453C-803C-820E7566CDB1 v1
17.11 IEC61850SIM
Function description Function block name IEC 60617 identification ANSI/IEEE C37.2 device
number
IEC 61850 simulation mode IEC61850SIM - -
This function is indicates simulation mode status to external world. LPHD has simulation status
output but it is not available in ACT, so IEC 61850 SIM component is added and it is just a
placeholder for simulation status which is configurable in ACT. This simulation status is displayed in
LHMI in this navigation mode Main menu -> Test -> IEC61850 simulation -> IEC61850SIM:1.
IEC61850SIM
SIM
IEC20000107 V2 EN-US
17.11.1.4 Signals
PID-7436-OUTPUTSIGNALS v2
17.11.1.5 Settings
PID-7436-SETTINGS v2
Section 18 Security
18.1 Authority check ATHCHCK
18.1.1 Identification
GUID-FBEF319B-94E6-41FB-BB9F-D870E0425128 v3
To safeguard the interests of our customers, both the IED and the tools that are accessing the IED
are protected, by means of authorization handling. The authorization handling of the IED and the
PCM600 is implemented at both access points to the IED:
The IED users can be created, deleted and edited with PCM600 IED user management tool.
IEC12000202 V3 EN-US
There are different levels (or types) of users that can access or operate different areas of the IED
and tools functionality. The pre-defined user types are given in Table 699.
Ensure that the user logged on to the IED has the required access when writing particular
data to the IED from PCM600. For more information about setting user access rights, see
the PCM600 documentation.
Access rights VIEWER OPERATOR ENGINEER INSTALLER SECADM SECAUD RBACMNT ADMINISTRATOR
Config – Basic - - X X - - - -
Config – - - X X - - -
-
Advanced
FileTransfer – - - X X - - -
-
Tools
UserAdministratio - - - - X - X
X
n
Setting – Basic R - X X - - - -
Setting – R - X X - - -
-
Advanced
Control – Basic - X X - - - - -
Control – - X X - - - -
-
Advanced
IEDCmd – Basic - X X - - - - -
IEDCmd – - - X - - - -
-
Advanced
FileTransfer – - X X X X X X
X
Limited
DB Access normal - X X X X X X X
Audit log read - - - - - X - X
Setting – Change - X X X - - -
-
Setting Group
Security Advanced - - - - X - - X
The IED users can be created, deleted and edited only with the IED User Management within
PCM600. The user can only LogOn or LogOff on the local HMI on the IED, there are no users,
groups or functions that can be defined on local HMI.
If the IED is Central Account Management enabled, users can only be created, deleted or
edited in the Central Account Management server. In that case, only the user rights can
be edited using the PCM600 tool. See Cyber Security Deployment Guidelines manual.
At least one user must be included in the UserAdministrator group to be able to write
users, created in PCM600, to IED.
SEMOD176296-5 v10
At delivery the default user is the SuperUser. No Log on is required to operate the IED until a user
has been created with the IED User Management..
Once a user is created and downloaded to the IED, that user can perform a Log on, introducing the
password assigned in the tool.
If there is no user created, an attempt to log on will display a message box: “No user defined!”
If one user leaves the IED without logging off, then after the timeout (set in Main menu/Settings /
General Settings/HMI /Screen/Display Timeout ) elapses, the IED returns to Guest state, when
only reading is possible. The display time out is set to 10 minutes at delivery.
If there are one or more users created with the IED User Management and downloaded into the IED,
then, when a user intentionally attempts a Log on or when the user attempts to perform an operation
that is password protected, the Log on window will appear.
The cursor is focused on the User identity field, so upon pressing the key, the user can change
the user name, by browsing the list of users, with the “up” and “down” arrows. After choosing the right
user name, the user must press the “E” key again. When it comes to password, upon pressing the
key, the following character will show up: “$”. After all the letters are introduced (passwords are
case sensitive) choose OK and press the key again.
If everything is alright at a voluntary Log on, the local HMI returns to the Authorization screen. If the
Log on is OK, when required to change for example a password protected setting, the local HMI
returns to the actual setting folder. If the Log on has failed, then the Log on window opens again, until
either the user makes it right or presses “Cancel”.
The user rights can be edited in the IED by using the PCM600 user tool.
One user can have one or several user roles. By default, the users in Table 701 are created in the
IED, and when creating new users in the CAM server, the predefined roles from Table 702 can be
used.
At delivery, the IED user has full access as SuperUser when using the LHMI and as
Administrator when using FTP or PCM600 until Central Account Management is
activated.
The successful activation of Central Account Management will disable built-in users or remove all
local created users from PCM600.
Management of user credentials and roles is handled on the Central Account Management server
e.g. SDM600. The IED employs two strategies to ensure availability of the authentication system
even if there is a problem with the network or authentication server:
• A substation can be equipped with two redundant authentication servers operating in a hot
standby mode.
• If configured by the security administrator, the IED itself maintains a local replica in the database
with selected users. This database is periodically updated with data from the server and used as
fallback if none of the servers are reachable.
• If there is no replication support in the CAM server, then there is a possibility to configure the
emergency account in the IED, which gets activated when CAM server is offline.
Note that not all users in the SDM600 server are part of the replica. There might be users that are not
assigned to any replication group. IED only replicates those users which are part of replication group
configured in the IED.
All communication between the central management and the IEDs is protected using secure
communication. Customers are required to generate and distribute certificates during the engineering
process of the substation. These certificates ensure mutual trust between IED and CAM server for
example SDM600.
Function Description
Authority status This function is an indication function block for user logon activity.
ATHSTAT User denied attempt to logon and user successful logon are reported.
Authority check To safeguard the interests of our customers, both the IED and the tools that are accessing
ATHCHCK the IED are protected, by means of authorization handling. The authorization handling of the
IED and the PCM600 is implemented at both access points to the IED:
The IED users can be created, deleted and edited only in the CAM server.
Authority management This function enables/disables the maintenance menu. It also controls the maintenance
AUTHMAN menu logon time out.
For more information on the functions Authority Management (AUTHMAN), Authority Status
(ATHSTAT), and Authority Check (ATHCHCK) functions, refer to chapter “Basic IED functions” in the
Technical Manual.
18.2.1 Identification
GUID-7925E6A3-301D-44A5-982F-167805EEA473 v1
This function enables/disables the maintenance menu. It also controls the maintenance menu log on
time out.
18.2.3 Settings
PID-7492-SETTINGS v2
18.3.1 Identification
GUID-C037D0B0-1AA0-4592-9293-92C7EDED3261 v2
The FTP client defaults to the best possible security mode when trying to negotiate with TLS. The
automatic negotiation mode is used by the client to negotiate with explicit TLS via AUTH TLS.
It is only possible to access disturbance records from the IED if FTP without TLS encryption is used.
If clear text FTP is required to read out disturbance recordings, create a specific account
for this purpose with rights only to do File transfer. The password of this user will be
exposed in clear text on the wire.
Setting FTP to OFF on an access point does not switch off FTP as the service will still be used by
PCM600 and FST. So to completely switch off the port number 21 access the following parameters
must be set to OFF.
• FTP = OFF
• PCMAccess = OFF
• FSTAccess = OFF
18.3.3 Settings
PID-6703-SETTINGS v3
18.4.1 Identification
GUID-79C63688-4D7D-4954-AC3C-B9484D084F6F v2
Authority status ATHSTAT function is an indication function block for user log-on activity.
User denied attempt to log-on and user successful log-on are reported.
ATHSTAT
USRBLKED
LOGGEDON
IEC06000503 V3 EN-US
18.4.4 Signals
PID-3773-OUTPUTSIGNALS v6
GUID-87CF079A-64C8-46AE-B7E4-A0B2EEAC92E9 v1
The output signal USRBLKED is not valid if the IED is Centralized Account Management
enabled.
The function does not have any parameters available in Local HMI or in Protection and Control IED
Manager (PCM600)
Authority status (ATHSTAT) function informs about two events related to the IED and the user
authorization:
• the fact that at least one user has tried to log on wrongly into the IED and it was blocked (the
output USRBLKED)
• the fact that at least one user is logged on (the output LOGGEDON)
Whenever one of the two events occurs, the corresponding output (USRBLKED or LOGGEDON) is
activated. The output can for example, be connected on Event (EVENT) function block for LON/
SPA.The signals are also available on IEC 61850 station bus.
Self supervision with internal event list function listens and reacts to internal system events,
generated by the different built-in self-supervision elements. The internal events are saved in an
internal event list presented on the LHMI and in PCM600 event viewer tool.
INTERRSIG
FAIL
WARNING
TSYNCERR
RTCERR
STUPBLK
LHMIERROR
IEC09000787 V4 EN-US
PID-8298-OUTPUTSIGNALS v1
The function does not have any parameters available in the local HMI or PCM600.
M11401-3 v13
The self-supervision operates continuously and includes:
The self-supervision function status can be monitored from the local HMI or from the Event Viewer in
PCM600.
Under the Diagnostics menu in the local HMI, the actual information from the self-supervision
function can be reviewed. The information can be found under Main menu/Diagnostics /Internal
events or Main menu/Diagnostics /IED status/General . The information from the self-supervision
function is also available in the Event Viewer in PCM600.
IEC15000414 V3 EN-US
GUID-B481701F-05B4-4B29-83D4-18F13886FEBE V1 EN-US
Some output signals are available from the INTERRSIG function block. The signals from this function
block are sent as events via IEC 61850 to the station level of the control system. These signals can
also be connected to binary outputs for signalization via output relays or they can be used as
conditions for other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module in the Signal
Matrix tool. Error signals from time synchronization can be obtained from the INTERRSIG function
block via two outputs TSYNCERR and RTCERR .
Self supervision provides several status signals that give information about the internal status of the
IED. For this reason they are also called internal signals. These internal signals, available on local
HMI under Main menu/Diagnostics/IED status/General, can be divided into two groups.
• Standard signals are always presented in the IED, see table 708.
• Hardware dependent internal signals are collected depending on the hardware configuration,
see table 709.
If the RTC is faulty, the IED will start up with a time of 2004-01-01 and start advancing from there.
This time will also be reset to the same date every time the IED is restarted. Provided that the IED is
time synchronized, this is unlikely to be an issue, since the IED will be brought back in sync in a short
time.
When settings are changed in the IED, the protection and control applications restart in order to take
effect of the changes. During restart, internal events get generated and Runtime App error will be
displayed. These events are only indications and will be for short duration during the restart.
The analog signals to the A/D converter is internally distributed into two different converters, one with
low amplification and one with high amplification.
When the signal is within measurable limits on both channels, a direct comparison of the two A/D
converter channels can be performed. If the validation fails, the CPU will be informed and an alarm
will be given for A/D converter failure.
M11963-1 v5
Data Value
Recording manner Continuous, event controlled
List size 40 events, first in-first out
Change lock function CHNGLCK is used to block further changes to the IED configuration and
settings once the commissioning is complete. The purpose is to block inadvertent IED configuration
changes beyond a certain point in time.
CHNGLCK
LOCK* ACTIVE
OVERRIDE
IEC09000946.vsd
IEC09000946 V2 EN-US
PID-3786-INPUTSIGNALS v6
PID-3786-OUTPUTSIGNALS v7
The function, when activated, will still allow the following changes of the IED state that does not
involve reconfiguring of the IED:
• Monitoring
• Reading events
• Resetting events
• Reading disturbance data
• Clear disturbances
• Reset LEDs
• Reset counters and other runtime component states
• Control operations
• Set system time
• Enter and exit from test mode
• Change of active setting group
The binary input signal LOCK controlling the function is defined in ACT or SMT:
Turning off the change lock will override the change lock function until the next reboot of the IED. In
this case, the change lock function cannot be activated, and the Override output will indicate that the
change-lock is overridden.
The Denial of service functionality limits overload on the IED produced by heavy Ethernet network
traffic. The communication facilities must not be allowed to compromise the primary functionality of
the device. All inbound network traffic will be quota controlled so that too heavy network loads can be
controlled. Heavy network load might for instance be the result of malfunctioning equipment
connected to the network.
The denial of service protection is designed to protect the IED from overload when exposed to high
amount of Ethernet network traffic. The communication facilities must not be allowed to compromise
the primary functionality of the device. All inbound network traffic is quota controlled, so that a too
heavy network load can be controlled. Heavy network load might for instance be the result of
malfunctioning equipment connected to the network.
The denial of service functionality in SCHLCCH and RCHLCCH measures the IED load from
communication and, if necessary, limits it from jeopardizing the IED's control and protection
functionality. The function has the following outputs:
• RCHLCCH
• LinkAUp and LinkBUp indicates the Ethernet link status for the rear ports channel A and
B
• DOSLINKA and DOSLINKB indicates that DOS functionality is active on channel A and
channel B
• DOSALARM indicates that DOS functionality is active on the access point
• SCHLCCH
• LINKUP indicates the Ethernet link status
• DOSALARM indicates that DOS functionality is active on the access point
The DOS functionality activates when the inbound traffic rate exceeds 3000 packets per
second.
The time synchronization function is used to select a common source of absolute time for the
synchronization of the IED when it is a part of a protection system. This makes it possible to compare
events and disturbance data between all IEDs within a station automation system and in between
sub-stations. A common source shall be used for IED and merging unit when IEC/UCA 61850-9-2LE
process bus communication is used.
SEMOD55141-5 v7
There are two groups of parameter settings related to time:
• System time
• Synchronization
The System time group relates to setting the on/off and start/end of the Daylight Saving Time (DST)
for the local time zone in relation to Coordinated Universal Time (UTC). The Synchronization group
relates to selecting the coarse and fine synchronization sources.
All the settings and parameters related to time are available via Local HMI under Main menu/
Configuration/Time/System time and via PCM600 under IED Configuration/Time .
MANUALPID-6638-SETTINGS v2
GUID-CD154442-0F80-4B69-8C43-22445FD7F865 v1
PID-6188-SETTINGS v6
PID-6608-SETTINGS v4
PID-6212-SETTINGS v5
PID-3967-SETTINGS v7
PID-3968-SETTINGS v7
PID-4138-SETTINGS v5
PID-6630-SETTINGS v3
If the time synchronization between the different sources of sampled values are lost, then the
protection function blocking behavior is different based on the parameter SyncLostMode.
• NoBlock
• Block
• BlockOnLostUTC
NoBlock
The protection functions are not blocked due to the lost time synchronization. This is mainly used
when all sample values are produced in one source.
Block
The block can be used if there are several data sources that can be synchronized to each other.
However, the relation to UTC time is not required.
As soon as the protection detects a change or uncertainty in time from a data source, the protections
are blocked. This is detected by the jump in sample count or when the data remains unsynchronized.
When a block occurs, the block stays for an extra blocking time after all the sources are
synchronized again, to secure that the time has propagated to the other sources.
Data stream 1
Time shift
Extra blocking time
on-going
Data stream 2
Time shift
Extra blocking time
on-going
Data stream 3
Time shift
Extra blocking time
on-going
IEC19000001 V2 EN-US
BlockOnLostUTC
When BlockOnLostUTC is selected, all the data must be synchronized to UTC, to avoid blocking of
the protection functions.
This cannot be used by the process bus sampled values, since IEC 61859-9-2 LE only contains the
information regarding the synchronized or unsynchronized data.
For example, the BlockOnLostUTC can be used for a phasor measurement unit where the data is
compared between different stations.
PTP(IEEE 1588)
External
synchronization Off
sources On
Time tagging and general synchronization
Slave only
Off
Commu- Protection
LON Events
Time nication and control
SPA regulator functions
Min. pulse
(Setting:
SNTP SW time
see
DNP Technical
manual)
IRIG-B
PPS
*IEC 61850-9-2
IEC16000002-2-en.vsdx
IEC16000002 V2 EN-US
The echo mode of the line differential protection function is based on the hardware clock. Thus, there
is no need to synchronize the hardware clock and the software clock.
Synchronization of the hardware clock to the software clock is necessary only when IRIG B 00X with
optical fiber, IEEE 1344 is used for differential protection. The two clock systems are synchronized by
a special clock synchronization unit with two modes, fast and slow. A special feature, an automatic
fast clock time regulator is used. The automatic fast mode makes the synchronization time as short
as possible during start-up. The Fast and Slow settings are also available on the local HMI.
When the time difference is > 16 μs, the line differential protection function is blocked and the time
regulator for the hardware clock automatically uses a fast mode to synchronize the clock systems.
Time adjustment is made with an exponential function, that is, with big time adjustment steps in the
beginning, and then smaller steps until a time deviation of < 16 μs between the external time system
and the internal differential time system has been reached. The protection function is then enabled
and the synchronization remains in fast mode or switches to slow mode depending on the setting.
This prevents the hardware clock to make too big time steps and allows the ECHO method to "keep
up" so that no block will occur while regaining GPS synchronization.
At start-up a fast adjustment will be used in order to get synchronized as fast as possible.
When GPS synchronization is reached, and the protection is unblocked, slow clock synchronization
mode is activated (if selected).
Synchronization from
a higher level
Function
Optional synchronization of
modules at a lower level
IEC09000342 V2 EN-US
The IED has a built-in real-time clock (RTC) with a resolution of one millisecond. The clock has a
built-in calendar that handles leap years through 2100.
• If the synchronization message, which is similar to the other messages, has an offset compared
to the internal time in the IED, the message is used directly for synchronization, which means,
for adjusting the internal clock to obtain zero offset at the next coming time message.
• If the synchronization message has a large offset compared to the other messages, a spike-filter
in the IED removes this time-message.
• If the synchronization message has a large offset and the following message also has a large
offset, the spike filter does not act and the offset in the synchronization message is compared to
a threshold that defaults to 500 milliseconds. If the offset is more than the threshold, the clock
jumps a whole number of seconds so the remaining offset is less than 500ms. The remaining
offset is then slowly adjusted with 1000 ppm until the offset is removed. With an adjustment of
1000ppm it takes 500 seconds to remove an offset of 500 milliseconds.
Synchronization messages configured as coarse are only used for initial setting of the time. After this
has been done, the messages are checked against the internal time and only an offset of more than
10 seconds resets the time.
Three main alternatives of external synchronization sources are available. The synchronization
message is applied:
• via any of the communication ports of the IED as a telegram message including date and time
• as a minute pulse connected to a binary input
• via IRIG-B or PPS
SNTP provides complete time-information and shall normally be used as fine time synch source only.
• Coarse message is sent every minute and comprises complete date and time, that is, year,
month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
The SLM module is located on the first analog digital conversion module (ADM)
The minute pulse is connected to any channel on any Binary Input Module in the IED. The electrical
characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the substation and if no station
master clock with minute pulse output is available, a simple minute pulse generator can be designed
and used for synchronization of the IEDs. The minute pulse generator can be created using the
logical elements and timers available in the IED.
The definition of a minute pulse is that it occurs one minute after the last pulse. As only the flanks are
detected, the flank of the minute pulse shall occur one minute after the last flank.
Pulse data:
Deviations in the period time (a) larger than 50 ms will cause TSYNCERR.
en05000251.vsd
IEC05000251 V1 EN-US
If contact bounce occurs, only the first pulse will be detected as a minute pulse. The next minute
pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, for example, it is exactly 60 seconds between the pulses, contact
bounces might occur 49 ms after the actual minute pulse without effecting the system. If contact
bounce occurs more than 50 ms, for example, it is less than 59950 ms between the two most
adjacent positive (or negative) flanks, the minute pulse will not be accepted.
To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic BNC connector and
one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface, and
IRIG-B 00x messages can be supplied via either the galvanic interface or the optical interface, where
x (in 00x or 12x) means a number in the range of 0-7.
“00” means that a base band is used, and the information can be fed into the IRIG-B module via the
BNC contact or an optical fiber. “12” means that a 1 kHz modulation is used. In this case the
information must go into the module via the BNC connector.
If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the year. If
the x is 0, 1, 2 or 3, the information contains only the time within the year, and year information has to
be set via PCM600 or local HMI.
The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B clocks, as IRIG-
B previously did not have any year information. IEEE1344 is compatible with IRIG-B and contains
year information and information of the time-zone.
When process bus communication (IEC/UCA 61850-9-2LE protocol) is used, it is essential that the
merging units are synchronized with the hardware time of the IED (see Technical manual, section
Design of the time system (clock synchronization) ). To achieve this, PTP, PPS or IRIG-B can be
used depending of the facilities of the merging unit.
If the merging unit supports PTP, use PTP. If PTP is used in the IED and the merging unit cannot be
synchronized from the IED, then use GPS-based clocks to provide PTP synch as well as sync to the
merging unit.
If synchronization of the IED and the merging unit is based on GPS, set the parameter
SyncLostMode to BlockOnLostUTC in order to provide a block of protection functions whenever the
global common time is lost.
If PTP is not used, use the same synchronization method for the HwSyncSrc as the merging unit
provides. For instance, if the merging unit provides PPS as synchronization, use PPS as HwSyncSrc.
If LDCM in GPS-mode is used, that is, the hardware and software clocks are connected to each
other, HwSyncSrc is not used and other means to synchronize the merging unit to the IED is
required. For instance, FineSyncSource is set to the same source that the merging unit uses.
If the IED is used together with a merging unit and no time synchronization is available,
for example, in the laboratory test, the IED will synchronize to the SV data stream. During
the re-synchronization, the protection functions will be blocked once a second for about
45 ms, and this will continue for up to 10 minutes. To avoid this, configure PTP (IEEE
1588) to On for the access point where the merging unit is configured.
PTP according to IEEE 1588-2008 and specifically its profile IEC/IEEE 61850-9-3 for power utility
automation is a synchronization method that differs from SNTP, for instance, by providing much
better accuracy and by being not predefined. By not predefined is meant that it is not mandatory to
have a predefined synchronization tree, as the master (Grand Master) may shift.
Consider instead PTP as a synchronization grouping, i.e. all devices connected to the PTP group will
be synchronized to the same source or, if there is no external source the group will at least maintain
a common time. The group is synchronized by connecting one or more “Grand Master” clocks to it.
The clocks can be part of the devices in the group or be specialized synchronization devices, as for
instance a GPS clock or similar. If several synchronization devices are connected to the group, the
“Best Master Algorithm” in the PTP protocol will assure that only one is the “Grand Master”. The IED
can act as a synchronization device and supply any synchronization source (like SNTP, SPA) as
clock input, that will synchronize the whole PTP group if there is no better source available in the
group. The IED can be connected to several groups and thereby connect them to each other, by
acting as a “Boundary Clock”. If PTP is “On” on several Access Points, the IED connects the Access
Points via a boundary clock. If PTP is “On” on redundant Access Points, the IED acts as a
“Transparent Clock”.
In a network there may be variety of possible masters that are connected together where the masters
by selection, using the priority of PTP (also called the Best Master Algorithm, or BMC) to determine
which of them that is the best master.
1. Priority 1
setting for each device, default 128, set to a lower number if this device shall be the Grand
Master.
2. GM class
given from the type of device, for instance “6” for a GPS clock, “7” for a GPS clock that has lost
synch during a hold-over time, “187” for a clock that can also be a slave.
3. GM Accuracy
how accurate the time is as a enumerated value
4. Offset Scaled Variance
calculated value that shows the oscillator quality
5. Priority 2
setting for each device, default 128, set to a lower number if this device is preferred to be the
Grand Master, if Priority 1, GM class, GM accuracy and OffsetScaledVariance are the same for
all devices.
6. Identity, that is the MAC-adress of the port.
MAC address of the access points can be seen in LHMI under the settings of each
access point.
To setup a PTP network with no obvious Grand Master, you simply connect the IEDs to one network
and configure PTP to be “on” on all IEDs. On one IED, the one from which you want to set the time in
the station, you set the Priority2 to 127, instead of default 128. Now, this IED has higher priority than
the rest of the IEDs and will thereby act as “Grand Master”.
PTP is not set from TIMESYNCGEN:1 General, as SNTP is. Instead PTP is set via a parameter of
each Access Point. For more information, refer to section Time synchronization.
It shall be noted that an IED synchronized to local time in a PTP network is seen as local
synchronized, if the grand master is not synchronized. If an IED is the grand master
without any synchronization from somewhere else, then this grand master IED is seen as
not synchronized. This is reflected in the time quality of the events in IEC 61850 in the
field ClockNotSynchronized.
M12331-1 v9
Function Value
Time tagging resolution, events and sampled measurement values 1 ms
Time tagging error with synchronization once/min (minute pulse synchronization), ± 1.0 ms typically
events and sampled measurement values
Time tagging error with SNTP synchronization, sampled measurement values ± 1.0 ms typically
GUID-8AEB81D0-1731-46DF-A206-D2E758823575 v2
Supported types of clock Boundary Clock (BC), Ordinary Clock (OC), Transparent Clock
(TC)
Accuracy According to standard IEC/IEEE 61850-9-3
Number of nodes According to standard IEC/IEEE 61850-9-3
Ports supported All rear Ethernet ports
Use the six different groups of settings to optimize the IED operation for different power system
conditions. Creating and switching between fine-tuned setting sets from the local HMI, configurable
binary inputs, IEC 61850, or PCM600/PST. This results in a highly adaptable IED that can be applied
to a variety of power system scenarios.
M12010-3 v3
ACTVGRP
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
SETCHGD
IEC05000433 V5 EN-US
PID-6558-INPUTSIGNALS v6
PID-6558-OUTPUTSIGNALS v6
PID-8211-SETTINGS v1
M12008-8 v12
Parameter setting groups ActiveGroup function has six functional inputs, each corresponding to one
of the setting groups stored in the IED. Activation of any of these inputs changes the active setting
group. Eight functional output signals are available for configuration purposes, so that information on
the active setting group is always available.
A setting group is selected by using the local HMI, from a front connected personal computer,
remotely from the station control or station monitoring system or by activating the corresponding
input to the ActiveGroup function block.
Each input of the function block can be configured to connect to any of the binary inputs in the IED.
To do this PCM600 must be used.
The external control signals are used for activating a suitable setting group when adaptive
functionality is necessary. Input signals that should activate setting groups must be either constantly
active or a pulse exceeding 400 ms.
If an input signal is constantly active, then it will not be possible to change the active
setting group from LHMI, PCM600 or IEC 61850. This ensures that only the active input
signals control which setting group is active. If the user desire to change active setting
group also from LHMI, PCM600 and IEC 61850, then the input signals must be at a
logical zero in the normal state. This behavior is the default.
If the user wants the binary inputs to be the only entity that can change the active setting
group, then set the parameter ActSGChangeMode to BinaryInputOnly. Then, changes
attempted from LHMI, PCM600 and IEC 61850 will be rejected, even when all input
signals are zero.
More than one input may be activated at the same time. In such cases the lower order setting group
has priority. This means that if for example both group four and group two are set to be activated,
group two will be the one activated.
Every time a setting is changed, the output signal SETCHGD is sending a pulse. Activating or
deactivating test mode is made by changing a parameter, consequently this will also cause a pulse
on the SETCHGD output.
The parameter MaxNoSetGrp defines the maximum number of setting groups in use to switch
between.
The output REMSETEN indicates whether setting changes over IEC 61850 are enabled or not. Per
default, this is not enabled, which results in REMSETEN being at a logical low level. If setting
changes via IEC 61850 are enabled, then REMSETEN will be a logical high. The setting changes
over IEC 61850 is enabled with the setting EnableSettings in the IEC 61850-8-1 configuration under
Main menu /Configuration /Communication /Station communication /IEC 61850-8-1 /IEC
61850-8-1 . Please refer to documentation for IEC 61850 for further details.
Switching can only be done within that number of groups. The number of setting groups selected to
be used will be filtered so only the setting groups used will be shown on the Parameter Setting Tool.
ACTIVATE GROUP 6
ACTIVATE GROUP 5
ACTIVATE GROUP 4
ACTIVATE GROUP 3
ACTIVATE GROUP 2
+RL2 ACTIVATE GROUP 1
ACTVGRP
IOx-Bly1
ACTGRP1 GRP1
IOx-Bly2
ACTGRP2 GRP2
IOx-Bly3
ACTGRP3 GRP3
IOx-Bly4
ACTGRP4 GRP4
IOx-Bly5
ACTGRP5 GRP5
IOx-Bly6
ACTGRP6 GRP6
SETCHGD
REMSETEN
IEC05000119 V4 EN-US
When entering IED test mode there is an option to block all functions. Active test mode is indicated
by a flashing yellow Start LED on the LHMI. After that, it is possible to block/unblock arbitrarily
selected functions from the LHMI to perform required tests.
When leaving TESTMODE, all blockings are removed (except for functions that have their block input
active), and the IED resumes normal operation. However, if during TESTMODE operation, power is
removed and later restored, the IED will remain in TESTMODE with the same protection functions
blocked or unblocked as before the power was removed. All testing will be done with actually set and
configured values within the IED. No settings will be changed, thus mistakes are avoided.
Forcing of binary input and output signals is only possible when the IED is in IED test mode.
TESTMODE
IED_TEST TEST
IED_TEST
BLOCK
NOEVENT
INPUT
SETTING
IEC61850
IEC09000219 V3 EN-US
PID-6730-INPUTSIGNALS v1
PID-6730-OUTPUTSIGNALS v1
GUID-D1206681-E341-4F6A-99E4-F168C79E4BE0 v1
M12015-4 v11
Set the IED in test mode by
While the IED is in test mode, the output ACTIVE of the function block TESTMODE is activated. The
outputs of the function block TESTMODE shows the cause of the “Test mode: being in On” state. If
the input from the configuration (OUTPUT signal is activated) or setting from local HMI (SETTING
signal is activated).
While the IED is in test mode, the yellow Start LED will flash and all functions can be blocked
depending on the configuration of the testmode component. Any function can be unblocked
individually regarding functionality and event signalling.
M11828-3 v9
The deblocking operation will reset when exiting the test mode.
The blocking of a function concerns all output signals from the actual function, so no outputs will be
activated.
If the IED is restarted while set to IED TESTMODE by a binary input all functions will be
temporarily unblocked during startup, which might cause unwanted operations.
The TESTMODE function block might be used to automatically block functions when a test handle is
inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) can supply a binary
input which in turn is configured to the TESTMODE function block.
Each of the functions includes the blocking from the TESTMODE function block.
The functions can also be blocked from sending events over IEC 61850 station bus to prevent filling
station and SCADA databases with test events, for example during a commissioning or maintenance
test.
IED identifiers (TERMINALID) function allows the user to identify the individual IED in the system, not
only in the substation, but in a whole region or a country.
Use only characters A-Z, a-z and 0-9 in station, object and unit names.
PID-6801-SETTINGS v1
Product information contains unchangeable data that uniquely identifies the IED.
Product information data is visible on the local HMI under Main menu/Diagnostics/IED status/
Product identifiers and under Main menu/Diagnostics/IED Status/Identifiers:
Product information data is visible on the local HMI under Main menu/Diagnostics/IED status/
Product identifiers and under Main menu/Diagnostics/IED Status/Identifiers.
• ProductVer
• ProductDef
• FirmwareVer
• SerialNo
• OrderingNo
• ProductionDate
• IEDProdType
The function does not have any parameters available in the local HMI or PCM600.
The factory defined settings are very useful for identifying a specific version and very helpful in the
case of maintenance, repair, interchanging IEDs between different Substation Automation Systems
and upgrading. The factory made settings can not be changed by the customer. They can only be
viewed. The settings are found in the local HMI under Main menu/Diagnostics /IED status/Product
identifiers
• IEDProdType
• Describes the type of the IED. Example: REL650
• ProductDef
• Describes the release number from the production. Example: 2.1.0
• FirmwareVer
• Describes the firmware version.
• The firmware version can be checked from Main menu/Diagnostics/IED status/Product
identifiers
• Firmware version numbers run independently from the release production numbers. For
every release number there can be one or more firmware versions depending on the small
issues corrected in between releases.
• ProductVer
• Describes the product version. Example: 2.1.0
1 is the Major version of the manufactured product this means, new platform of the product
2 is the Minor version of the manufactured product this means, new functions or new hardware added to
the product
3 is the Major revision of the manufactured product this means, functions or hardware is either changed
or enhanced in the product
• IEDMainFunType
• Main function type code according to IEC 60870-5-103. Example: 128 (meaning line
protection).
• SerialNo
• OrderingNo
• ProductionDate
The Signal matrix for binary inputs (SMBI) function is used within the Application Configuration Tool
(ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get
information about how binary inputs are brought in for one IED configuration.
SMBI
^VIN1 ^BI1
^VIN2 ^BI2
^VIN3 ^BI3
^VIN4 ^BI4
^VIN5 ^BI5
^VIN6 ^BI6
^VIN7 ^BI7
^VIN8 ^BI8
^VIN9 ^BI9
^VIN10 ^BI10
IEC05000434-2-en.vsd
IEC05000434 V2 EN-US
PID-3940-INPUTSIGNALS v5
PID-3940-OUTPUTSIGNALS v5
The Signal matrix for binary inputs (SMBI) function , see figure 498, receives its inputs from the real
(hardware) binary inputs via the Signal Matrix Tool (SMT) or ACT, and makes them available to the
rest of the configuration via its outputs, BI1 to BI10. The inputs and outputs, as well as the whole
block, can be given a user defined name. These names will be represented in SMT as information
which signals shall be connected between physical IO and SMBI function. The input/output user
defined name will also appear on the respective output/input signal.
The Signal matrix for binary outputs (SMBO) function is used within the Application Configuration
Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get
information about how binary inputs are sent from one IED configuration.
SMBO
BO1 ^BO1
BO2 ^BO2
BO3 ^BO3
BO4 ^BO4
BO5 ^BO5
BO6 ^BO6
BO7 ^BO7
BO8 ^BO8
BO9 ^BO9
BO10 ^BO10
IEC05000439 V3 EN-US
PID-3831-INPUTSIGNALS v5
The Signal matrix for binary outputs (SMBO) function , see figure 499, receives logical signal from
the IED configuration, which is transferring to the real (hardware) outputs, via the Signal Matrix Tool
(SMT) or ACT. The inputs in SMBO are BO1 to BO10 and they, as well as the whole function block,
can be tag-named. The name tags will appear in SMT as information which signals shall be
connected between physical IO and the SMBO.
Signal matrix for analog inputs (SMAI), also known as the preprocessor function block, analyses the
connected four analog signals (three phases and neutral) and calculates all relevant information from
them like the phasor magnitude, phase angle, frequency, true RMS value, harmonics, sequence
components and so on. This information is then used by the respective functions connected to this
SMAI block in ACT (for example protection, measurement or monitoring functions).
SEMOD54868-4 v12
SMAI_20_10
BLOCK AI3P
REVROT AI1
^GRP10L1 AI2
^GRP10L2 AI3
^GRP10L3 AI4
^GRP10N AIN
IEC14000027 V2 EN-US
The number of available task time groups depend on product and configuration. Up to four task time
groups are available in a product. The task time defines the execution repetition rate for the task time
groups. The task times valid for a product are found in PCM600, Application configuration tool.
SEMOD54997-4 v11
SMAI2
BLOCK G2AI3P
REVROT G2AI1
^GRP2L1 G2AI2
^GRP2L2 G2AI3
^GRP2L3 G2AI4
^GRP2N G2N
IEC14000028 V2 EN-US
The number of available task time groups depend on product and configuration. Up to four task time
groups are available in a product. The task time defines the execution repetition rate for the task time
groups. The task times valid for a product are found in PCM600, Application configuration tool.
PID-3405-INPUTSIGNALS v6
PID-3405-OUTPUTSIGNALS v5
PID-3406-INPUTSIGNALS v6
PID-3406-OUTPUTSIGNALS v5
SEMOD130357-4 v3
PID-3406-SETTINGS v5
Every Signal matrix for analog inputs function (SMAI) can receive four analog signals (three phases
and one neutral or residual value), either voltage or current, see figure 500 and figure 501. SMAI
outputs give information about every aspect of the 3ph analog signals acquired (phase angle, RMS
value, frequency and frequency derivates etc. – 244 values in total). The BLOCK input will force all
outputs to value zero if BLOCK is TRUE (1). However, when the disturbance recorder is connected to
the single-phase outputs of SMAI, the sample data to the disturbance recorder will not be blocked.
The disturbance recorder bypasses SMAI to the sample data channels.
System phase rotation and frequency are defined using the PhaseRotation and Frequency settings in
the primary system values PRIMVAL function. Logic 1 in the REVROT input to the SMAI function
means that the phase rotation is changed relative to the set PhaseRotation in PRIMVAL.
The output signal AI1 to AI4 are single phase outputs which directly represent the four inputs
GRPxL1, GRPxL2, GRPxL3 and GRPxN, x=1-12. GxN (x = 1-12) is always calculated residual sum
from the first three inputs. A3P is grouped, three-phase information containing all relevant information
about four connected inputs. Note that all other functions, with a few exceptions, use this output in
configuration. Note that the SMAI function will always calculate the residual sum of current/voltage if
the input GRPxN is not connected in SMT. Applications with a few exceptions shall always be
connected to AI3P.
The SMAI function includes a functionality based on the level of positive sequence voltage,
MinValFreqMeas, to validate if the frequency measurement is valid or not. If the positive sequence
voltage is lower than MinValFreqMeas, the function freezes the frequency output value for 500 ms
and after that the frequency output is set to the nominal value. A signal is available for the SMAI
function to prevent operation due to non-valid frequency values. MinValFreqMeas is set as % of
UBase/√3
If SMAI setting ConnectionType is Ph-Ph, at least two of the inputs GRPxL1, GRPxL2 and GRPxL3,
where 1≤x≤12, must be connected in order to calculate the positive sequence voltage. Note that
phase to phase inputs shall always be connected as follows: L1-L2 to GRPxL1, L2-L3 to GRPxL2,
L3-L1 to GRPxL3. If SMAI setting ConnectionType is Ph-N, all three inputs GRPxL1, GRPxL2 and
GRPxL3 must be connected in order to calculate the positive sequence voltage.
If only one phase-phase voltage is available and SMAI setting ConnectionType is Ph-Ph, the user is
advised to connect two (not three) of the inputs GRPxL1, GRPxL2 and GRPxL3 to the same voltage
input as shown in figure 502 to make SMAI calculate a positive sequence voltage.
SMAI1
BLOCK SPFCOUT SAPTOF
DFTSPFC G1AI3P U3P* TRIP SAPTOF(1)_TRIP
UL1L2 BLOCK START
REVROT G1AI1
PHASEL1 G1AI2 BLKTRIP BLKDMAGN
^GRP1L1 G1AI4 FREQ
TRM_40.CH7(U) PHASEL2
G1N
^GRP1L2
PHASEL3
^GRP1L3
NEUTRAL
^GRP1N
IEC10000060 V4 EN-US
The above described scenario does not work if SMAI setting ConnectionType is Ph-N. If
only one phase-earth voltage is available, the same type of connection can be used but
the SMAI ConnectionType setting must still be Ph-Ph and this has to be accounted for
when setting MinValFreqMeas. If SMAI setting ConnectionType is Ph-N and the same
voltage is connected to all three SMAI inputs, the positive sequence voltage will be zero
and the frequency functions will not work properly.
The outputs from the above configured SMAI block shall only be used for Overfrequency
protection (SAPTOF), Underfrequency protection (SAPTUF) and Rate-of-change
frequency protection (SAPFRC) due to that all other information except frequency and
positive sequence voltage might be wrongly calculated.
In some configurations SMAI may produce incorrectly calculated phase-earth values, when this is the
case, a hint will be available in LHMI with text as below.
Calculated phase-earth values are used from one or more SMAIs configured for phase-phase inputs,
without connection to N input.
However, this configuration, combined with unbalanced three-phase input, results in incorrect
calculated phase-earth values.
This in turn may result in maloperation of functions connected to SMAIs configured in this way, if the
function uses phase-earth based values.
Further, if SUM3PH is connected to such a SMAI, then its output values will be incorrect, and the
connected functions may maloperate.
Summation block 3 phase function 3PHSUM is used to get the sum of two sets of three-phase
analog signals (of the same type) for those IED functions that might need it.
3PHSUM
BLOCK SPFCOUT
BLKGR1 AI3P
BLKGR2 AI1
REVROT AI2
^G1AI3P* AI3
^G2AI3P* AI4
IEC05000441-4-en.vsdx
IEC05000441 V4 EN-US
PID-6428-INPUTSIGNALS v3
PID-6428-OUTPUTSIGNALS v4
SEMOD130361-4 v2
PID-6428-SETTINGS v3
Summation block 3 phase 3PHSUM receives the three-phase signals from Signal matrix for analog
inputs function (SMAI). The BLOCK input will reset all the outputs of the function to 0.
19.10.1 Identification
GUID-B8B3535D-227B-4151-9E98-BEB85F4D54DE v1
The rated system frequency and phase rotation direction are set under Main menu /Configuration /
Power system / Primary Values in the local HMI and PCM600 parameter setting tree.
19.10.3 Settings
PID-1626-SETTINGS v17
IEC04000458 V3 EN-US
M16105-3 v11
Table 746: Designations for 1/2 x 19” casing with 1 TRM slot
1/2x19"
Front view Rear position Module
p40 p31 p30 p5 p4 p3 p1
X11 PSM
P30:1
P30:2
X31 and X32 etc. to X51 and X52 BIM, BOM or IOM
P30:3
X305 LDCM
P31:1
6U X306 LDCM
X311: A, B, C, D SLM
X312 IRIG-B or RS485
P31:2
P30:5
X401 TRM
Rear view
X11 X31 X41 X51 X401
X301
X302
X303
X311
A
X304
B
X305 X312
X306 X313
IEC17000067 V1 EN-US
Module Description
Power supply module (PSM) Including a regulated DC/DC converter that supplies auxiliary
voltage to all static circuits.
Numerical module (NUM) Module for overall application control. All information is processed
or passed through this module, such as configuration, settings and
communication. The module provides four SFPs for Ethernet
traffic.
Local Human machine interface (LHMI) The module consists of LEDs, an LCD, a push button keyboard
and an ethernet connector used to connect a PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the internal circuits
from the VT and CT circuits. It has 12 analog inputs.
Table continues on next page
Module Description
Analog digital conversion module (ADM) The module converts the VT and CT analog signals from the TRM
to digital signals processed by the NUM. Carrier for communication
boards.
Note: TRM module is not included in SAM600-IO, so ADM module
is only used for internal communication carrier for IO modules.
Combined backplane module (CBM) The module has two main purposes: to distribute supply voltages
from the PSM to the other modules and to act as a communication
carrier via its two buses, CompactPCI for fast I/O and
communication and CAN for slow I/O.
Universal backplane module (UBM) The module is used to interconnect the TRM and the ADM. It also
connects the NUM with the LHMI
Module Description
Binary input module (BIM) Module with 16 optically isolated binary inputs
Binary output module (BOM) Module with 24 single outputs or 12 double-pole command outputs
including supervision function
Binary I/O module (IOM) Module with 8 optically isolated binary inputs, 10 outputs and 2 fast
signalling outputs.
Line data communication modules (LDCM), short Modules used for digital communication to remote terminal.
range, medium range
Serial SPA/LON/IEC 60870-5-103 Used for SPA/LON/IEC 60870–5–103 communication
communication modules (SLM)
Optical Ethernet SFP Small form factor pluggable for Ethernet communication
Galvanic RJ45 Ethernet SFP Small form factor pluggable for Ethernet communication
Galvanic RS485 communication module Module used for DNP3 and IEC 60870-5-103 communication
(RS485)
IRIG-B Time synchronization module (IRIG-B) Module with 2 inputs. One is used for handling both pulse-width
modulated signals and amplitude modulated signals and one is
used for optical input type ST for PPS time synchronization.
The numeric processing module (NUM) is a CPU module that handles all protection functions and
logic.
For communication with high speed modules, for example analog input modules and high speed
serial interfaces, NUM is equipped with a Compact PCI bus. NUM is a compact PCI system card,
that is, it controls bus mastering, clock distribution and receives interrupts.
NUM provides up to 4 optical (type LC) or galvanic (type RJ45) Ethernet ports (one basic and three
optional).
Ethernet ports can be configured as four separate or in redundant mode PRP, HSR, or RSTP. The
combination supports two PRP, two HSR networks, or one RSTP network.
The numeric module (NUM) is a high-performance CPU module based on a dual-core processor. It is
6U high and occupies one slot. Contact with the backplane is achieved via a compact PCI connector
and an euro connector.
The NUM has two PC-MIP expansion slots where mezzanine cards, such as the LDCM, can be
mounted. It also has four SFP cages for Ethernet communication. Up to four SFP transceivers for
optical 100BASE-FX or galvanic RJ45 100BASE-TX communication can be mounted in the SFP
cages.
Only SFP transceivers approved by Hitachi Energy (1MRK005500) are compatible with
the SFP cages.
Application code and configuration data are stored in flash memory, and non-volatile RAM is used to
store log data.
The NUM is equipped with a real time clock. It uses a capacitor to keep track of the time when the
IED is not energized.
The NUM is passively cooled, which is possible due to its low power dissipation.
SEMOD55310-2 v16
1) For distances above approximately 60% of maximum specified fiber length special care needs to be taken and fiber
used should have an attenuation <0.25 dB/km
GUID-96676D5D-0835-44DA-BC22-058FD18BDF34 v3
The power supply module is used to provide the correct internal voltages and full isolation between
the IED and the battery system. An internal fail alarm output is available.
M6377-3 v2
There are two types of the power supply module. They are designed for different DC input voltage
ranges see table 752. The power supply module contains a built-in, self-regulated DC/DC converter
that provides full isolation between the terminal and the external battery system.
The DC input is protected against inverse polarity within the rated DC voltage range.
IEC08000476 V2 EN-US
M12286-1 v9
GUID-61AA4AEF-D09C-4BA6-9142-B5CA857C0574 v2
The transformer input module is used to galvanically separate and adapt the secondary currents and
voltages generated by the measuring transformers. The module has twelve inputs in different
combinations of currents and voltage inputs.
The transformer module has 12 input transformers, 7 voltage and 5 current input transformers.
TRM variants are available depending on the product. The rated values and channel type of the
current inputs are selected at order.
Transformer input module for measuring should not be used with current transformers
intended for protection purposes, due to limitations in overload characteristics.
For configuration of the input and output signals, refer to section "Signal matrix for analog inputs
SMAI".
1MRK006501-AF-TRM-IEC-6502P1 V1 EN-US
M16988-1 v11
Table 754: TRM - Energizing quantities, rated values and limits for protection transformer
Description Value
Frequency
Rated frequency fr 50/60 Hz
Operating range fr ± 10%
Current inputs
Rated current Ir 1 or 5 A
Operating range (0-100) x Ir
Description Value
Thermal withstand 100 × Ir for 1 s *)
30 × Ir for 10 s
10 × Ir for 1 min
4 × Ir continuously
Dynamic withstand 250 × Ir one half wave
Burden < 20 mVA at Ir = 1 A
< 150 mVA at Ir = 5 A
*) max. 350 A for 1 s when COMBITEST test switch is included.
Voltage inputs **)
Rated voltage Ur 110 or 220 V
Operating range 0 - 340 V
Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
**) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency
The binary input module has 16 optically isolated inputs and is available in two versions, one
standard and one with enhanced pulse counting capabilities on the inputs to be used with the pulse
counter function. The binary inputs are freely programmable and can be used for the input of logical
signals to any of the functions. They can also be included in the disturbance recording and event-
recording functions. This enables extensive monitoring and evaluation of operation of the IED and for
all associated electrical circuits.
The Binary input module contains 16 optical isolated binary inputs. The voltage level of the binary
input is selected at order.
For configuration of the input signals, refer to section "Signal matrix for binary inputs SMBI".
A signal discriminator detects and blocks oscillating signals. When blocked, a hysteresis function
may be set to release the input at a chosen frequency, making it possible to use the input for pulse
counting. The blocking frequency may also be set.
Well defined input high and input low voltages ensure normal operation at battery supply earth faults,
see figure 507 The figure shows the typical operating characteristics of the binary inputs of the four
voltage levels.
The standard version of binary inputs gives an improved capability to withstand disturbances and
should generally be used when pulse counting is not required. Inputs are debounced by software.
I/O events are time stamped locally on each module for minimum time deviance and stored by the
event recorder if present.
[V]
300
176
144
88
72
38
32
19
17
xx06000391-2-en.vsd
IEC06000391 V2 EN-US
Operation
Operation uncertain
No operation
IEC99000517-ABC V1 EN-US
This binary input module communicates with the Numerical module (NUM).
The design of all binary inputs enables the burn off of the oxide of the relay contact connected to the
input, despite the low, steady-state power consumption, which is shown in figure 508 and 509.
[mA]
50
55 [ms]
en07000104-3.vsd
IEC07000104 V3 EN-US
Figure 508: Approximate binary input inrush current for the standard version of BIM.
[mA]
50
5.5 [ms]
en07000105-1.vsd
IEC07000105 V2 EN-US
Figure 509: Approximate binary input inrush current for the BIM version with enhanced pulse
counting capabilities.
IEC99000503 V3 EN-US
20.2.6.3 Signals
PID-6435-OUTPUTSIGNALS v5
20.2.6.4 Settings
PID-3473-SETTINGS v2
M12576-1 v13
M50609-2 v10
Table 759: BIM - Binary input module with enhanced pulse counting capabilities
The binary output module has 24 independent output relays and is used for trip output or any
signaling purpose.
The binary output module (BOM) has 24 software supervised output relays. Each pair of relays have
a common power source input to the contacts, see figure 511. This should be considered when
connecting the wiring to the connection terminal on the back of the IED.
The high closing and carrying current capability allows connection directly to breaker trip and closing
coils. If breaking capability is required to manage fail of the breaker auxiliary contacts normally
breaking the trip coil current, a parallel reinforcement is required.
For configuration of the output signals, refer to section "Signal matrix for binary outputs SMBO".
Output module
xx00000299.vsd
IEC00000299 V1 EN-US
IEC99000505 V5 EN-US
20.2.7.3 Signals
PID-3439-INPUTSIGNALS v2
PID-3439-OUTPUTSIGNALS v1
20.2.7.4 Settings
PID-3439-SETTINGS v2
M12441-1 v13
Table 765: BOM - Binary output module contact data (reference standard: IEC 61810-1)
The stated operate time for functions include the operating time for the binary inputs and
outputs.
The binary input/output module is used when only a few input and output channels are needed. The
ten standard output channels are used for trip output or any signaling purpose. The two high speed
signal output channels are used for applications where short operating time is essential. Eight
optically isolated binary inputs cater for required binary input information.
M1718-3 v4
The binary input/output module is available in two basic versions, one with unprotected contacts and
one with MOV (Metal Oxide Varistor) protected contacts.
Inputs are designed to allow oxide burn-off from connected contacts, and increase the disturbance
immunity during normal protection operate times. This is achieved with a high peak inrush current
while having a low steady-state current, see figure 508. Inputs are debounced by software.
Well defined input high and input low voltages ensures normal operation at battery supply earth
faults, see figure 507.
The voltage level of the inputs is selected when ordering. Alternative connectors of Ring lug or
Compression type can be ordered.
I/O events are time stamped locally on each module for minimum time deviance and stored by the
event recorder if present.
M1898-3 v3
The binary I/O module, IOM, has eight optically isolated inputs and ten output relays. One of the
outputs has a change-over contact. The nine remaining output contacts are connected in two groups.
One group has five contacts with a common and the other group has four contacts with a common, to
be used as single-output channels, see figure 513.
The binary I/O module also has two high speed output channels where a reed relay is connected in
parallel to the standard output relay.
For configuration of the input and output signals, refer to sections "Signal matrix for binary inputs
SMBI" and "Signal matrix for binary outputs SMBO".
IEC1MRK002801-AA11-UTAN-RAM V2 EN-US
Figure 513: Binary in/out module (IOM), input contacts named XA corresponds to rear
position X31, X41, and so on, and output contacts named XB to rear position X32,
X42, and so on
SEMOD175370-4 v1
The binary input/output module version with MOV protected contacts can for example be used in
applications where breaking high inductive load would cause excessive wear of the contacts.
The test voltage across open contact is lower for this version of the binary input/output
module.
xx04000069.vsd
IEC04000069 V1 EN-US
20.2.8.3 Signals
PID-6434-OUTPUTSIGNALS v4
PID-4049-INPUTSIGNALS v2
20.2.8.4 Settings
PID-4050-SETTINGS v2
PID-4049-MONITOREDDATA v2
M12573-1 v11
The stated operate time for functions include the operating time for the binary inputs and
outputs.
M12318-1 v13
Table 772: IOM - Binary input/output module contact data (reference standard: IEC 61810-1)
Function or quantity Trip and signal relays Fast signal relays (parallel reed
relay)
Binary outputs 10 21)
Max system voltage 250 V AC/DC 250 V DC
Min load voltage 24 V DC —
Test voltage across open contact, 1 min 1000 V rms 800 V DC
Current carrying capacity
Per relay, continuous 8A 8A
Per relay, 1 s 10 A 10 A
Per process connector pin, continuous 12 A 12 A
Making capacity for DC with L/R > 10 ms:
0.2 s
1.0 s 30 A 0.4 A
10 A 0.4 A
Making capacity at resistive load
220–250 V/0.4 A
0.2 s 30 A 110–125 V/0.4 A
1.0 s 10 A 48–60 V/0.2 A
24–30 V/0.1 A
Breaking capacity for AC, cos φ > 0.4 250 V/8.0 A 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A 48 V/1 A
(According to IEC 61810-1) 110 V/0.4 A 110 V/0.4 A
125 V/0.35 A 125 V/0.35 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Breaking capacity for DC with L/R=100ms 110 V / 0.3 A 110 V / 0.3 A
Breaking capacity for DC with resistive load 48 V / 2 A 48 V / 2 A
110 V / 0.5 A 110 V / 0.5 A
125 V / 0.45 A 125 V / 0.45 A
220 V / 0.35 A 220 V / 0.35 A
250 V / 0.3 A 250 V / 0.3 A
Maximum capacitive load - 10 nF
Max operations with inductive load L/R ≤ 40 ms 1000
Max operations with resistive load 2000
Max operations with no load 30 million
Operating time < 6 ms <= 1 ms
M12584-1 v13
Table 773: IOM with MOV and IOM 220/250 V, 110mA - contact data (reference standard: IEC 61810-1)
Function or quantity Trip and Signal relays Fast signal relays (parallel reed
relay)
Binary outputs IOM: 10 IOM: 2
Max system voltage 250 V AC/ DC 250 V DC
Min load voltage 24 V DC -
Test voltage across open contact, 1 min 250 V rms 250 V rms
Current carrying capacity
Per relay, continuous 8A 8A
Per relay, 1 s 10 A 10 A
Per process connector pin, continuous 12 A 12 A
Making capacity for DC with L/R > 10 ms:
0.2 s
1.0 s 30 A 0.4 A
10 A 0.4 A
Making capacity at resistive load
220–250 V/0.4 A
0.2 s 30 A 110–125 V/0.4 A
1.0 s 10 A 48–60 V/0.2 A
24–30 V/0.1 A
Breaking capacity for AC, cos j > 0.4 250 V/8.0 A 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A 48 V/1 A
(According to IEC 61810-1) 110 V/0.4 A 110 V/0.4 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Breaking capacity for DC with L/R=100ms 110 V / 0.3 A 110 V / 0.3 A
Breaking capacity for DC with resistive load 48 V / 2 A 48 V / 2 A
110 V / 0.5 A 110 V / 0.5 A
125 V / 0.45 A 125 V / 0.45 A
220 V / 0.35 A 220 V / 0.35 A
250 V / 0.3 A 250 V / 0.3 A
Maximum capacitive load - 10 nF
Max operations with inductive load L/R ≤ 40 ms 1000 -
Max operations with resistive load 2000
Max operations with no load 30 million -
Operating time < 6 ms <= 1 ms
The Serial and LON communication module (SLM) is used for SPA, IEC 60870-5-103, DNP3 and
LON communication. SLM has two optical communication ports for plastic/plastic, plastic/glass or
glass/glass fiber cables. One port is used for serial communication (SPA, IEC 60870-5-103 or DNP3
port) and the other port is used for LON communication.
SLM is a PMC card and it is factory mounted as a mezzanine card on the first Analog digital
conversion module (ADM). Three variants of SLM are available with different combinations of optical
fiber connectors, see figure 515. The plastic fiber connectors are of snap-in type and the glass fiber
connectors are of ST type.
I
EC0500760=1=en=Or
igi
nal
.psd
IEC05000760 V2 EN-US
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103/DNP3
4 Transmitter, SPA/IEC 60870-5-103/DNP3
A Snap-in connector for plastic fiber
B ST connector for glass fiber
In the following figure, X311 ports A/B are for SPA, IEC103 or DNP3 and X311 ports C/D
are for LON protocol.
IEC21000051 V1 EN-US
M12589-1 v6
SEMOD117441-2 v7
The Galvanic RS485 communication module (RS485) is used for DNP3.0 and IEC 60870-5-103
communication. The module has one RS485 communication port. The RS485 is a balanced serial
communication that can be used either in 2-wire or 4-wire connections. A 2-wire connection uses the
same signal for RX and TX and is a multidrop communication with no dedicated Master or slave. This
variant requires however a control of the output. The 4-wire connection has separated signals for RX
and TX multidrop communication with a dedicated Master and the rest are slaves. No special control
signal is needed in this case.
SEMOD158670-4 v3
RS485 is a PC-MIP card, and it is factory mounted as a mezzanine card on the Analog digital
conversion module (ADM).
Angle
bracket
Screw
1
terminal
X3 2
1
2 RS485
3 PWB
Screw
4
terminal
5
X1
6
Backplane
IEC06000517 V1 EN-US
• Soft grounded: The IO is connected to the GND with an RC net parallel with a MOV
• Two-wire
• Four-wire
A two-wire connection uses the same signal for RX and TX, and is a multidrop communication with
no dedicated master or slave. This variant requires however a control of the output. The four-wire
connection has separate signals for RX and TX multidrop communication with a dedicated master
and the rest are slaves. No special control signal is needed in this case.
DLinkConfirm determines when the stack should ask for link layer confirmations. Since DNP3
supports breaking an application layer message into multiple link layer frames, set to the following
based on the desired operation for a specific communication session:
tDLinkTimeout specifies the maximum amount of time to wait for a link level confirm if requested (that
is, if DLinkConfirm is On). Even if DLinkConfirm is set to Never, this will be used for linktest frame
and request link status if they are sent.
DLinkRetries is the maximum number of link layer retries if data-link layer confirms time up.
tRxToTxMinDel is the minimum time (in seconds) after receiving a character, before another attempt
to transmit a character on this channel. This is generally useful when using a modem or some other
communication device that requires a minimum time between receive and transmit.
Stopbit defines the number of stop bits for the serial port.
Parity defines the parity to use for the serial port it can be set to:
tRTSWarmUp configures transmitter warm-up and warm-down delay times (in milliseconds). If warm-
up is configured to non-zero then at start of the send, the transmitter is On. This means that the line
is driven but the data send of the start is delayed by the warm-up delay time.
tRTSWarmDown specifies that if warm-down is configured to non zero then at end of the send, the
transmitter deactivation is delayed by the warm-down time.
tBackOffDelay specifies that if the data send is started, a check is made if data is being received at
that time. If yes, a back-off timer is started and when it times out, a check is made again to see if line
is idle. If no, a new back-off timer is started. This is repeated until the line is idle and send can start.
Line idle is determined when nothing is received for more than a character time. The back-off time
consists of a configurable fixed time and a random time where the maximum random time is also
configurable. The back-off feature is always on.
tMaxRndDelBkOf specifies the configurable RS485 maximum back-off random time delay in
seconds.
HWCollisionDetect is only used for RS485 networks, thus is only available in RS485DNP
function.
The MSTSERIAL function includes the same settings as the MS1TCP to MS4TCP
functions, except the ChToAssociate setting which is used to select either the serial
optical or RS485 communication interface on hardware modules.
SEMOD158710-2 v3
M16028-3 v4
The Line data communication module (LDCM) is used for communication (binary signal transfer)
between IEDs situated at distances <80 km away, or from an IED to optical-to-electrical converter
with G.703 interface located at distances <3 km away. The IEEE/ANSI standard format is used.
Class 1 laser product. Take adequate measures to protect the eyes. Never look into the
laser beam. Complies to laser safety classification according to IEC 60825-1.
LDCM is a PCMIP type II single width format module. LDCM can be mounted on the:
• ADM
• NUM
1
ST
2 IO-connector
ST
IEC07000087-3-en.vsdx
IEC07000087 V3 EN-US
Figure 518: SR-LDCM layout with two PCI connectors and one I/O ST type connector
1. Receiver
2. Transmitter
IEC06000393-3-en.vsdx
IEC06000393 V3 EN-US
Figure 519: MR-LDCM layout with two PCI connectors and one I/O FC/PC type connector
M12756-1 v14
Class 1 laser product. Take adequate measures to protect the eyes. Never look into the
laser beam. Complies to laser safety classification according to IEC 60825-1.
The IRIG-B time synchronizing module is used for accurate time synchronizing of the IED from a
station clock.
Electrical (BNC) and optical connection (ST) for 0XX and 12X IRIG-B support.
The IRIG-B module has two inputs. One input is for the IRIG-B that can handle both a pulse-width
modulated signal (also called unmodulated) and an amplitude modulated signal (also called sine
wave modulated). The other is an optical input type ST for optical pulse-width modulated signal
(IRIG-B 00X). The IRIG-B module is mounted as a mezzanine card on the Analog digital conversion
module (ADM).
ST
Y2
A1
IEC06000304=1=en=Original.ai
IEC06000304 V2 EN-US
Figure 520: IRIG-B PC-MIP board with top left ST connector for optical IRIG-B 00X 820 nm
multimode fiber optic signal input and lower left BNC connector for IRIG-B signal
input
• IRIG-B. This encoding is based on the legacy of (pre-2004) IRIG-B standard which is without
any time zone information. IRIG-B uses the timecoding available in IRIG-B 00x and IRIG-B 12x,
where x = 0-7. When x is set in the range from 4-7, the year information is provided along with
year and time data.
• 1344. This encoding is based on the current (2004) IRIG-B standard. IED uses the time zone
information from TIMEZONE:1. The setting 1344 refers to the Annex F in IEEE1344, which adds
information regarding quality of the time using the control bits in the IRIG-B message. This
annex also contains the year information with the variable x that ranges from 4-7 in the 2004
version of IRIG-B.
• 1344TZ. This encoding is based on the current (2004) IRIG-B standard. This time zone
information from IRIG-B overrides the TIMEZONE:1 settings. This setting” uses the information
as 1344, overriding the TIMEZONE setting.
• MinusTZ. Encoded IRIG time minus time zone offset equals UTC at all times.
• PlusTZ. Encoded IRIG time plus time zone offset equals UTC at all times.
20.2.12.5 Settings
PID-5187-SETTINGS v5
SEMOD141136-2 v10
M11985-110 v7
IEC08000163 V4 EN-US
IEC08000165 V4 EN-US
Figure 522: Case with protective cover and 19” rack mounting kit
IEC05000503 V4 EN-US
Case size A B C D E F G H I
(mm)
6U, 1/2 x 19” 265.9 223.7 247.5 255.0 205.8 190.5 466.5 232.5 482.6
The G and I dimensions are defined by the 19” rack mounting kit.
M2152-3 v8
IEC08000164 V5 EN-US
IEC08000166 V4 EN-US
Figure 525: Case without protective cover with 19” rack mounting kit
M2152-11 v5
Case size
A B C D E F G H I
(mm)
6U, 1/2 x 19” 265.9 223.7 204.1 249.9 205.8 190.5 466.5 189.1 482.6
The G and I dimensions are defined by the 19” rack mounting kit
A C
E
D
IEC04000465 V4 EN-US
IEC06000182 V3 EN-US
D
B
E
F
C
xx05000505.vsd
IEC05000505 V1 EN-US
Case size A B C D E F G
(mm) ±1 ±1 ±1 ±1 ±1 ±1 ±1
Tolerance
6U, 1/2 x 19” 214.0 259.3 240.4 190.5 34.4 13.2 6.4 diam
IEC04000471 V3 EN-US
The flush mounting kit can be used for the 1/2 x 19” case size.
Only a single case can be mounted in each cut-out on the cubicle panel, for class IP54 protection.
The screws from the IED shall be used to fasten the fasteners to the IED.
Flush mounting cannot be used for side-by-side mounted IEDs when IP54 class must be
fulfilled. Only IP20 class can be obtained when mounting two cases side-by-side in one
(1) cut-out.
To obtain IP54 class protection, an additional factory mounted sealing must be ordered
when ordering the IED.
IEC16000080 V2 EN-US
Use only the screws included in the mounting kit when mounting the plates and the
angles on the IED. Screws with wrong dimension may damage the PCBs inside the IED.
If fiber cables are bent too much, the signal can be weakened. Wall mounting is therefore
not recommended for any communication modules with fiber connection.
2
3
1 4
IEC13000266 V2 EN-US
The IED can be equipped with a rear protection cover recommended to be used with this type of
mounting. See figure 532.
To reach the rear side of the IED, a free space of 80 mm is required on the unhinged side.
3
1
80 mm 2
IEC06000135 V4 EN-US
Figure 532: How to reach the connectors on the rear side of the IED.
The IED can be mounted in a standard 19” cubicle rack by using a mounting kit consisting of two
mounting angles and their fastening screws.
The mounting angles are reversible which enables mounting of the IED either to the left or the right
side of the cubicle.
A separately ordered rack mounting kit for side-by-side mounted IEDs or IEDs together
with RHGS cases should be selected so that the total size equals 19”.
Use only the screws included in the mounting kit when mounting the plates and the
angles on the IED. Screws with wrong dimension may damage the PCBs inside the IED.
1a
1b
IEC04000452-3-en.vsd
IEC04000452 V4 EN-US
IED case size 1/2 x 19” and RHGS cases can be mounted side-by-side up to a maximum size of 19”.
For side-by-side rack mounting, the side-by-side mounting kit together with the 19” rack panel
mounting kit must be used. The mounting kit has to be ordered separately.
Use only the screws included in the mounting kit when mounting the plates and the
angles on the IED. Screws with wrong dimension may damage the PCBs inside the IED.
3 1
2
IEC04000456 V4 EN-US
A 1/2 x 19” size IED can be mounted with a RHGS case (6 or 12). The RHGS case can be used for
mounting a test switch of type RTXP 24. It also has enough space for a terminal base of RX 2 type
for mounting of, for example, a DC-switch or two auxiliary relays.
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
IEC06000180 V3 EN-US
Figure 535: IED (1/2 x 19”) mounted with a RHGS6 case containing a test switch module
equipped with only a test switch and a RX2 terminal base
If IP54 is required it is not allowed to flush mount side by side mounted cases. If your application
demands side-by-side flush mounting, the side-by-side mounting details kit and the 19” panel rack
mounting kit must be used. The mounting kit has to be ordered separately. The maximum size of the
panel cut out is 19”.
Use only the screws included in the mounting kit when mounting the plates and the
angles on the IED. Screws with wrong dimension may damage the PCBs inside the IED.
Please contact factory for special add on plates for mounting FT switches on the side (for
1/2 19" case) or bottom of the relay.
1 2
IEC06000181 V3 EN-US
Figure 536: Side-by-side rack mounting details (RHGS6 side-by-side with 1/2 x 19” IED).
M11778-1 v8
M12327-1 v6
Table 783: Water and dust protection level according to IEC 60529
M11777-1 v8
GUID-1CF5B10A-CF8B-407D-8D87-F4B48B43C2B2 v3
SEMOD53376-2 v6
M12583-1 v8
M16705-1 v18
M16706-1 v15
Description Value
Operating temperature range -25°C to +55°C (continuous)
Short-time service temperature range -40°C to +70°C (<16h)
Note: Degradation in MTBF and HMI performance
outside the temperature range of -25°C to +55°C
Relative humidity <93%, non-condensing
Atmospheric pressure 86 kPa to 106 kPa
Altitude up to 2000 m
Transport and storage temperature range -40°C to +85°C
Test According to
Electromagnetic compatibility (EMC) EN 60255–26
Low voltage (LVD) EN 60255–27
Section 21 Labels
21.1 Labels on IED SEMOD168249-4 v6
5
2
9
3
IEC16000081 V2 EN-US
IEC15000573=2=en=Original.wsdx
IEC15000573 V2 EN-US
1 Warning label
2 Caution label
3 Class 1 laser product label It is used when an optical SFP or an MR LDCM is configured in the
product.
IEC06000575 V1 EN-US
The connection diagrams are delivered in the IED Connectivity package as part of the product
delivery.
In order to assure time selectivity between different overcurrent protections at different points in the
network different time delays for the different protections are normally used. The simplest way to do
this is to use definite time-lag. In more sophisticated applications current dependent time
characteristics are used. Both alternatives are shown in a simple application with three overcurrent
protections operating in series.
Stage 3
Time
Stage 2 Stage 2
Fault point
position
en05000130.vsd
IEC05000130 V1 EN-US
Time
Fault point
position
en05000131.vsd
IEC05000131 V1 EN-US
To assure selectivity between protections there must be a time margin between the operation time of
the protections. This required time margin is dependent of following factors, in a simple case with two
protections in series:
A1 B1
Feeder
I> I>
Time axis
en05000132.vsd
IEC05000132 V1 EN-US
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens
t=t3 is Protection A1 resets
In the case protection B1 shall operate without any intentional delay (instantaneous). When the fault
occurs the protections start to detect the fault current. After the time t1 the protection B1 send a trip
signal to the circuit breaker. The protection A1 starts its delay timer at the same time, with some
deviation in time due to differences between the two protections. There is a possibility that A1 will
start before the trip is sent to the B1 circuit breaker. At the time t2 the circuit breaker B1 has opened
its primary contacts and thus the fault current is interrupted. The breaker time (t2 - t1) can differ
between different faults. The maximum opening time can be given from manuals and test protocols.
Still at t2 the timer of protection A1 is active. At time t3 the protection A1 is reset, that is the timer is
stopped.
In most applications it is required that the times shall reset as fast as possible when the current fed to
the protection drops below the set current level, the reset time shall be minimized. In some
applications it is however beneficial to have some type of delayed reset time of the overcurrent
function. This can be the case in the following applications:
• If there is a risk of intermittent faults. If the current IED, close to the faults, starts and resets
there is a risk of unselective trip from other protections in the system.
• Delayed resetting could give accelerated fault clearance in case of automatic reclosing to a
permanent fault.
• Overcurrent protection functions are sometimes used as release criterion for other protection
functions. It can often be valuable to have a reset delay to assure the release function.
The function can operate in a definite time-lag mode or in a current definite inverse time mode. For
the inverse time characteristic both ANSI and IEC based standard curves are available. Also
programmable curve types are supported via the component inputs: p, A, B, C pr, tr, and cr.
If current in any phase exceeds the set start current value (here internal signal startValue), a timer,
according to the selected operating mode, is started. The component always uses the maximum of
the three phase current values as the current level used in timing calculations.
In case of definite time-lag mode the timer will run constantly until the time is reached or until the
current drops below the reset value (start value minus the hysteresis) and the reset time has
elapsed.
For definite time delay curve ANSI/IEEE Definite time or IEC Definite time are chosen.
The general expression for inverse time curves is according to equation 106.
æ ö
ç A
÷
t[ s ] = ç + B ÷×k
ç æ i öp ÷
çç ÷ -C ÷
è è in > ø ø
EQUATION1189 V1 EN-US (Equation 106)
where:
p, A, B, C are constants defined for each curve type,
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the set start level.
From the general expression of the characteristic the following can be seen:
ææ i öp ö
(top - B × k ) × ç ç ÷ - C ÷ = A×k
è è in > ø ø
EQUATION1190 V1 EN-US (Equation 107)
where:
top is the operating time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according to equation 108,
in addition to the constant time delay:
t
ææ i öp ö
ò ç çè in > ÷ø - C ÷ × dt ³ A × k
0 è ø
EQUATION1191 V1 EN-US (Equation 108)
For the numerical protection the sum below must fulfil the equation for trip.
æ æ i( j ) ö p
n ö
Dt × å ç ç ÷ - C ÷ ³ A× k
j =1 è è in > ø ø
EQUATION1192 V1 EN-US (Equation 109)
where:
j=1 is the first protection execution cycle when a fault has been detected, that
is, when
i
>1
in >
EQUATION1193 V1 EN-US
For inverse time operation, the inverse time characteristic is selectable. Both the IEC and ANSI/IEEE
standardized inverse time characteristics are supported.
For the IEC curves there is also a setting of the minimum time-lag of operation, see figure 542.
Operate
time
tMin
Current
IMin
IEC05000133-3-en.vsd
IEC05000133 V2 EN-US
In addition to the ANSI and IEC standardized characteristics, there are also two additional inverse
curves available; the RI curve and the RD curve.
The RI inverse time curve emulates the characteristic of the electromechanical ASEA relay RI. The
curve is described by equation 110:
æ ö
ç k ÷
t[ s ] = ç
in > ÷
ç 0.339 - 0.235 × ÷
è i ø
EQUATION1194 V1 EN-US (Equation 110)
where:
in> is the set start current for step n
k is set time multiplier for step n
i is the measured current
The RD inverse curve gives a logarithmic delay, as used in the Combiflex protection RXIDG. The
curve enables a high degree of selectivity required for sensitive residual earth-fault current
protection, with ability to detect high-resistive earth faults. The curve is described by equation 111:
æ i ö
t[ s ] = 5.8 - 1.35 × ln ç ÷
è k × in > ø
EQUATION1195 V1 EN-US (Equation 111)
where:
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current
If the curve type programmable is chosen, the user can make a tailor made inverse time curve
according to the general equation 112.
æ ö
ç A
÷
t[ s ] = ç + B ÷×k
ç æ i öp ÷
çç ÷ -C ÷
è è in > ø ø
EQUATION1196 V1 EN-US (Equation 112)
Also the reset time of the delayed function can be controlled. There is the possibility to choose
between three different reset time-lags.
• Instantaneous Reset
• IEC Reset
• ANSI Reset.
If instantaneous reset is chosen the timer will be reset directly when the current drops below the set
start current level minus the hysteresis.
If IEC reset is chosen the timer will be reset after a set constant time when the current drops below
the set start current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault clearance
(when the current drops below the start current level minus the hysteresis). The timer will reset
according to equation 113.
æ ö
ç tr ÷
t [s] = ç ÷×k
çæ i ö ÷
2
çç ÷ -1 ÷
è è in > ø ø
EQUATION1197 V2 EN-US (Equation 113)
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the choice of time
delay characteristic.
For the definite time delay characteristics the possible reset time settings are instantaneous and IEC
constant time reset.
For ANSI inverse time delay characteristics all three types of reset time characteristics are available;
instantaneous, IEC constant time reset and ANSI current dependent reset time.
For IEC inverse time delay characteristics the possible delay time settings are instantaneous and IEC
set constant time reset).
For the programmable inverse time delay characteristics all three types of reset time characteristics
are available; instantaneous, IEC constant time reset and ANSI current dependent reset time. If the
current dependent type is used settings pr, tr and cr must be given, see equation 114:
æ ö
ç tr ÷
t [s] = ç ÷×k
çæ i ö ÷
pr
çç ÷ - cr ÷
è è in > ø ø
EQUATION1198 V2 EN-US (Equation 114)
For RI and RD inverse time delay characteristics the possible delay time settings are instantaneous
and IEC constant time reset.
GUID-F7AA2194-4D1C-4475-8853-C7D064912614 v4
When inverse time overcurrent characteristic is selected, the operate time of the stage
will be the sum of the inverse time delay and the set definite time delay. Thus, if only the
inverse time delay is required, it is important to set the definite time delay for that stage to
zero.
M12388-1 v25
I = Imeasured/Iset
Reset time for Iset = 10%, 195%, 400% of
IBase
Definite reset timer (0.000 - 60.000) s ANSI/IEEE C37.112 ,
0 x Iset - 0.8 x Iset ±2.0% or ±40 ms
whichever is greater
ANSI Extremely Inverse A=28.2, B=0.1217, P=2.0 , tr=29.1
ANSI Very inverse A=19.61, B=0.491, P=2.0 , tr=21.6
ANSI Normal Inverse A=0.0086, B=0.0185, P=0.02, tr=0.46
ANSI Moderately Inverse A=0.0515, B=0.1140, P=0.02, tr=4.85
ANSI Long Time Extremely Inverse A=64.07, B=0.250, P=2.0, tr=30
ANSI Long Time Very Inverse A=28.55, B=0.712, P=2.0, tr=13.46
ANSI Long Time Inverse A=0.086, B=0.185, P=0.02, tr=4.6
I = Imeasured/Iset
Reset time for Iset = 10%, 195%, 400% of
IBase
k = (0.01 - 999.00) in steps of 0.01 *Data evaluated at
A = (0.005 - 200.000) in steps of 0.001 default parameter values
B = (0.00 - 20.00) in steps of 0.01
C = (0.1 - 10.0) in steps of 0.1
P = (0.005 - 3.000) in steps of 0.001
TR = (0.005 - 100.000) in steps of 0.001
CR = (0.1 - 10.0) in steps of 0.1
PR = (0.005 - 3.000) in steps of 0.001
I = Imeasured/Iset
RD type logarithmic inverse characteristic 0.01 ≤ k ≤ 15.00 IEC 60255-151, ±2.0%
1.2 x Iset or ±50 ms whichever is
æ I ö greater
t = 5.8 - ç 1.35 × In ÷
è k ø 0.01 ≤ k ≤ 15.00 IEC 60255-151, ±2.0%
EQUATION1138-SMALL V1 EN-US 1.5 x Iset ≤ I ≤ 20 x Iset or ±40 ms whichever is
greater
I = Imeasured/Iset
GUID-19F8E187-4ED0-48C3-92F6-0D9EAA2B39BB v6
Table 802: ANSI Inverse time characteristics for Sensitive directional residual overcurrent and power protection
Reset characteristic:
tr
t = ×k
(I 2
-1 )
EQUATION1250-SMALL V1 EN-US
I = Imeasured/Iset
ANSI Extremely Inverse A=28.2, B=0.1217, P=2.0 , tr=29.1
ANSI Very inverse A=19.61, B=0.491, P=2.0 , tr=21.6
ANSI Normal Inverse A=0.0086, B=0.0185, P=0.02, tr=0.46
ANSI Moderately Inverse A=0.0515, B=0.1140, P=0.02, tr=4.85
Long Time Extremely Inverse A=64.07, B=0.250, P=2.0, tr=30
Long Time Very Inverse A=28.55, B=0.712, P=2.0, tr=13.46
Long Time Inverse A=0.086, B=0.185, P=0.02, tr=4.6
Table 803: IEC Inverse time characteristics for Sensitive directional residual overcurrent and power protection
I = Imeasured/Iset
IEC Normal Inverse A=0.14, P=0.02
IEC Very inverse A=13.5, P=1.0
IEC Inverse A=0.14, P=0.02
IEC Extremely inverse A=80.0, P=2.0
IEC Short time inverse A=0.05, P=0.04
IEC Long time inverse A=120, P=1.0
Programmable characteristic k = (0.05-2.00) in steps of 0.01
Operate characteristic: A=(0.005-200.000) in steps of 0.001
B=(0.00-20.00) in steps of 0.01
æ A ö C=(0.1-10.0) in steps of 0.1
t = ç P + B÷ × k P=(0.005-3.000) in steps of 0.001
ç (I - C ) ÷ TR=(0.005-100.000) in steps of 0.001
è ø CR=(0.1-10.0) in steps of 0.1
EQUATION1370-SMALL V1 EN-US
PR=(0.005-3.000) in steps of 0.001
Reset characteristic:
TR
t = ×k
(I PR
- CR )
EQUATION1253-SMALL V1 EN-US
I = Imeasured/Iset
The parameter setting TimeChar = Reserved shall not be used, since this parameter
setting is for future use and not implemented yet.
Table 804: RI and RD type inverse time characteristics for Sensitive directional residual overcurrent and power
protection
I = Imeasured/Iset
RD type logarithmic inverse characteristic
æ I ö
t = 5.8 - ç 1.35 × In ÷
è k ø
EQUATION1138-SMALL V1 EN-US
I = Imeasured/Iset
SEMOD116978-2 v11
k
t =
æU -U >ö
ç ÷
è U > ø
EQUATION1436-SMALL V1 EN-US
U> = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of 0.01
k 480
t 2.0
0.035
U Un
32 0.5
Un
IECEQUATION2423 V2 EN-US
k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è U > ø
IECEQUATION2421 V1 EN-US
k
t =
æ U < -U
ö
ç ÷
è U< ø
EQUATION1431-SMALL V1 EN-US
U< = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of 0.01
k × 480
t = + 0.055
2.0
æ 32 × U < -U - 0.5 ö
ç ÷
è U < ø
EQUATION1432-SMALL V1 EN-US
U< = Uset
U = Umeasured
Programmable curve: k = (0.05-1.10) in steps of 0.01
A = (0.005-200.000) in steps of 0.001
é ù B = (0.50-100.00) in steps of 0.01
ê k×A
ú C = (0.0-1.0) in steps of 0.1
t =ê ú+D D = (0.000-60.000) in steps of 0.001
ê æ U < -U ö
P
ú P = (0.000-3.000) in steps of 0.001
êçB × -C÷ ú
ëè U < ø û
EQUATION1433-SMALL V1 EN-US
U< = Uset
U = Umeasured
k
t =
æU -U >ö
ç ÷
è U > ø
EQUATION1436-SMALL V1 EN-US
U> = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of 0.01
k ⋅ 480
t = + 0.035
2.0
32 ⋅ U − U > − 0.5
U >
EQUATION1437-SMALL V2 EN-US
k ⋅ 480
t = + 0.035
3.0
32 ⋅ U − U > − 0.5
U >
EQUATION1438-SMALL V2 EN-US
SEMOD118114-4 v5
A070750 V2 EN-US
A070751 V2 EN-US
A070752 V2 EN-US
A070753 V2 EN-US
A070817 V2 EN-US
A070818 V2 EN-US
A070819 V2 EN-US
A070820 V2 EN-US
A070821 V2 EN-US
A070822 V2 EN-US
A070823 V2 EN-US
A070824 V2 EN-US
A070825 V2 EN-US
A070826 V2 EN-US
A070827 V2 EN-US
GUID-ACF4044C-052E-4CBD-8247-C6ABE3796FA6 V1 EN-US
GUID-F5E0E1C2-48C8-4DC7-A84B-174544C09142 V1 EN-US
GUID-A9898DB7-90A3-47F2-AEF9-45FF148CB679 V1 EN-US
GUID-35F40C3B-B483-40E6-9767-69C1536E3CBC V1 EN-US
GUID-B55D0F5F-9265-4D9A-A7C0-E274AA3A6BB1 V1 EN-US
AC Alternating current
ACC Actual channel
ACT Application configuration tool within PCM600
A/D converter Analog-to-digital converter
ADBS Amplitude deadband supervision
ADM Analog digital conversion module, with time synchronization
AI Analog input
ANSI American National Standards Institute
AP Access Point
AR Autoreclosing
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection
ASDU Application service data unit
AWG American Wire Gauge standard
BBP Busbar protection
BFOC/2,5 Bayonet fiber optic connector
BFP Breaker failure protection
BI Binary input
BIM Binary input module
BOM Binary output module
BOS Binary outputs status
BR External bistable relay
BS British Standards
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks
C37.94 IEEE/ANSI protocol used when sending binary signals between IEDs
CAM Central Account Management
CAN Controller Area Network. ISO standard (ISO 11898) for serial
communication
CB Circuit breaker
CBM Combined backplane module
CCITT Consultative Committee for International Telegraph and Telephony. A United
Nations-sponsored standards body within the International
Telecommunications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
Class C Protection Current Transformer class as per IEEE/ ANSI
CMPPS Combined megapulses per second
MVB Multifunction vehicle bus. Standardized serial bus originally developed for
use in trains.
NCC National Control Centre
NOF Number of grid faults
NUM Numerical module
OCO cycle Open-close-open cycle
OCP Overcurrent protection
OLTC On-load tap changer
OTEV Disturbance data recording initiated by other event than start/pick-up
OV Overvoltage
Overreach A term used to describe how the relay behaves during a fault condition. For
example, a distance relay is overreaching when the impedance presented
to it is smaller than the apparent impedance to the fault applied to the
balance point, that is, the set reach. The relay “sees” the fault but perhaps it
should not have seen it.
PCI Peripheral component interconnect, a local data bus
PCM Pulse code modulation
PCM600 Protection and control IED manager
PC-MIP Mezzanine card standard
PELV circuit Protected Extra-Low Voltage circuit type according to IEC60255-27
PMC PCI Mezzanine card
POR Permissive overreach
POTT Permissive overreach transfer trip
Process bus Bus or LAN used at the process level, that is, in near proximity to the
measured and/or controlled components
PRP Parallel redundancy protocol
PSM Power supply module
PST Parameter setting tool within PCM600
PTP Precision time protocol
PT ratio Potential transformer or voltage transformer ratio
PUTT Permissive underreach transfer trip
RASC Synchrocheck relay, COMBIFLEX
RCA Relay characteristic angle
RISC Reduced instruction set computer
RMS value Root mean square value
RS422 A balanced serial interface for the transmission of digital data in point-to-
point connections
RS485 Serial link according to EIA standard RS485
RTC Real-time clock
RTU Remote terminal unit
SA Substation Automation
SBO Select-before-operate
SC Switch or push button to close