AIR UNIVERSITY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

EXPERIMENT NO 3

Lab Title: Device characteristics of an NMOS transistor in Virtuoso.

Student Name: Abdul Mohsin Reg. No: 200773

Objective: To create the schematic and analyze NMOS transistor in Cadence Virtuoso

LAB ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory

Attributes
(5) (4) (3) (2) (1)

Ability to perform
Experiment without
supervision

Ability to general
understanding of
software

Ability to assimilate
the results.

Total Marks: Obtained Marks:

LAB REPORT ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory

Attributes
(5) (4) (3) (2) (1)

Data presentation

Experimental results

Conclusion

Total Marks: Obtained Marks:

Date: Signature:
Lab no. 3: Device Characteristics an NMOS transistor in virtuoso.
Objective:
NMOS and PMOS are the two crucial components of CMOS ICs. The purpose of this lab is to
understand the operation and the electronic characteristics of NMOS devices.
Here, you must study the following for a MOSFET device in Cadence-Vituoso.
1. Transfer characteristics, IDS - VGS.
a. Identify the threshold region
2. Output characteristics, IDS - VDS, of MOSFET.
a. Identify different regions of operation.
i. Which region could be utilized as a current source, and what are the
nonidealities and challenges?
b. Identify deep triode region and study RON as a function of VGS. What could be the
potential application of this region?
3. Compute transconductance, gm, as a function of the overdrive VGS – Vth

Circuit Schematic Diagram. The circuit diagram, as follows, is the way the I/V characteristics
will be simulated.

Parameters. Inputs: VDD: 3V, VGS: 1.5V, Outputs: I vs Vgs, I vs. Vds, gm
Procedure:
Step 1: Draw the schematic as shown in the figure above in the schematic window.

Step 2: Using ADE set simulation for DC analysis

Step 3: For I vs. Vgs graph, in DC analysis set design variable Vgs to vary from 0V to 3V

Step 4: For I vs. Vdd with varying Vgs, from tools menu select Parametric Analysis and vary
Vdd from 0 to 3.

Step 5: For gm vs. Vgs: from results browser under DC operating points plot gm vs. Vgs graph

Implementation:

Nmos Circuit:
Step 1: Draw the schematic as shown in the figure above in the schematic window.
Step 2: Using ADE set simulation for DC analysis

Step 3: For I vs. Vgs graph, in DC analysis set design variable Vgs to vary from 0V to 3V
Step 4: For I vs. Vdd with varying Vgs, from tools menu select Parametric Analysis and vary
Vdd from 0 to 3.

Step 5: For gm vs. Vgs: from results browser under DC operating points plot gm vs. Vgs graph
Graph of Vth:

Over drive:

Ov= Vgs – Vth

= 1.5-0.6377

=0.86233

Graph:
Discussion:
• First we design circuit then we go to lunch and click on cell view.
• and give value to Vds=3 and Vgs=1.5
• then go to output click on to be plotted and analysis click on DC and save it.
• Then put sweep range give 0 to 3
• Sweep and click on linear and no of step is 10.
• Then Run and graph appears
• Click on Graph go to marker place.
• Select on tools dc opinfo click on Mo file and it give All values of circuit every point but
we find Vth=0.63720653
• And then we find over drive so we know that over drive is equal to Vgs
Minus vth so it give 0.862294.
• Mosfet operate in Triode region.
• In triode region its work as a switch and saturation region is work as a amplifier.
This all we did in this process.

Conclusion:

In this we learn about Device characteristics of an NMOS transistor in Virtuoso.in this lab
we implement nmos circuit and then we and find the value of Vth and also we find
over drive voltage and also find characteristics of nmos.and we also find in which
place mosfet work.