Q1.

Draw functional block diagram of 8085 for data and instruction used for transferring
microprocessor. transfer. data and instruction.
Two clock cycles are An instruction is
required to execute executed in a single
single instruction. cycle.
It is cheaper in cost. It is costly than Von
Neumann Architecture.
CPU can not access CPU can access
instructions and instructions and
read/write at the same read/write at the same
time. time.
It is used in personal It is used in micro
computers and small controllers and signal
computers. processing.

Q2. Name five functional units of 8085 Q5.What is Von Neumann Architecture?
microprocessor. It is a type of digital computer architecture in which
Ans. Accumulator It is an 8-bit register used to the design follows the concept of the computers with
perform arithmetic, logical, I/O & LOAD/STORE stored programs where they store the program data
operations. It is connected to internal data bus & ALU. along with the instruction data in the very same
Arithmetic and logic unit As the name suggests, it memory. The famous physicist and mathematician
performs arithmetic and logical operations like John Von Neumann designed this architecture back in
Addition, Subtraction, AND, OR, etc. on 8-bit data. 1945.
General purpose register There are 6 general purpose Q6.What is Harvard Architecture?
registers in 8085 processor, i.e. B, C, D, E, H & L. Each It is a type of digital computer architecture in which
register can hold 8-bit data. These registers can work the design follows a basic concept of having separate
in pair to hold 16-bit data and their pairing signal paths (buses) and separate storage for data and
combination is like B-C, D-E & H-L. instructions. This type of architecture basically
Stack pointer It is also a 16-bit register works like surfaced to overcome the overall bottleneck of the
stack, which is always incremented/decremented by 2 Von Neumann Architecture.
during push & pop operations. Q7 Write four important differences between
Temporary register It is an 8-bit register, which holds Microprocessor and Microcontroller.
the temporary data of arithmetic and logical
operations.
Flag register It is an 8-bit register having five 1-bit flip-
flops, which holds either 0 or 1 depending upon the
result stored in the accumulator.
Q3. What is the bit size of internal data bus in 8085
microprocessors
In the 8085 microprocessor, The Address bus is 16 bits
(A0-A15) and can transfer a maximum 16 bit address
and hence can address 65,536 different memory
locations. This bus is multiplexed with 8 bit data bus.
Q4. Write three difference between Von Neuman
and Harvard Architecture.
VON NEUMANN HARVARD
ARCHITECTURE ARCHITECTURE
It is ancient computer It is modern computer
architecture based on architecture based on
stored program Harvard Mark I relay
computer concept. based model.
Same physical memory Separate physical Q8.What is a Microprocessor?
address is used for memory address is A microprocessor is a controlling unit of a micro-
instructions and data. used for instructions computer wrapped inside a small chip. It performs
and data. Arithmetic Logical Unit (ALU) operations and
There is common bus Separate buses are communicates with the other devices connected with
it. It is a single Integrated Circuit in which several
functions are combined.
Q9.What is Microcontroller?
A microcontroller is a chip optimized to control
electronic devices. It is stored in a single integrated
circuit which is dedicated to performing a particular
task and execute one specific application.
It is specially designed circuits for embedded
applications and is widely used in automatically
controlled electronic devices. It contains memory,
processor, and programmable I/O.
Q10.Types of Microprocessor
Important types of Microprocessors are:
• Complex Instruction Set Microprocessors
• The Application Specific Integrated Circuit
• Reduced Instruction Set Microprocessors
• Digital Signal Multiprocessors (DSPs)
Q11. Types of Microcontroller
Here are important types of Microcontroller:
• 8 bit Microcontroller
• 16 bit Microcontroller
• 32 bit Microcontroller
• Embedded Microcontroller
• External memory Microcontroller
Q 12. Features of Microprocessor
Here are some important features of Microprocessor:
• Offers built-in monitor/debugger program
with interrupt capability
• Large amount of instructions each carrying
out a different variation of the same operation
• Offers Parallel I/O
• Instruction cycle timer
• External memory interface
Q13. Features of Microcontroller
Here are some important features of Microcontroller:
• Processor reset
• Program and Variable Memory (RAM) I/O pins
• Device clocking central processor
• Instruction cycle timers
Q14. Applications of Microprocessor
Microprocessors are mainly used in devices like:
• Calculators
• Accounting system
• Games machine
• Complex industrial controllers
• Traffic light
• Control data
• Military applications
• Defense systems
• Computation systems
Q15. Applications of Microcontroller
Microcontrollers are mainly used in devices like:
• Mobile phones
• Automobiles
• CD/DVD players
• Washing machines
• Cameras
• Security alarms
• Keyboard controllers
• Microwave oven
• Watches
• Mp3 players
Q16. What is data pointer (DTPR) in 8051?
The Data Pointer (DPTR) in 8051
• The Data Pointer (DPTR) is the 8051s only
user-accessible 16-bit (2-byte) register.
• The Accumulator, “R” registers, and “B”
register are all 1-byte values.
• DPTR, as the name suggests, is used to point
to data. It is used by a number of commands
which allow the 8051 to access external
memory.
• When the 8051 accesses external memory it
will access external memory at the address
indicated by DPTR.
• While DPTR is most often used to point to
data in external memory, many programmers
often take advantage of the fact that it is the
only true 16-bit register available. It is often
used to store 2-byte values which have
nothing to do with memory locations.
Q17. The Stack Pointer (SP) in 8051
• The stack is a section of internal RAM used by
the CPU to store information temporarily. This
information could be data or an address.
• The CPU needs this storage area since there
are only limited number of registers. The
register to access the stack is called Stack
Pointer.
• The stack pointer (SP) is an 8-bit register
within the SFR area, with the address 81H and
it can point an address location between 00h
to FFh.
• Stack pointer is used to hold the address of
Top of the Stack. The address held in the SP is
the location in internal RAM where the last
byte of data was stored by a stack operation.
• This register can hold one 8-bit address at a
time, which is actually the memory location at
top of the stack.
• The stack pointer is initialized to the value 07H
when the 8051 microcontroller is reset.
Q18. The Program Counter (PC) in 8051
• The Program Counter (PC) is a 2-byte address
which tells the 8051 where the next
instruction to execute is found in memory.
• When the 8051 is initialized PC always starts
at 0000h and is incremented each time an
instruction is executed.
• It is important to note that PC isn’t always
incremented by one. Since some instructions
require 2 or 3 bytes the PC will be
incremented by 2 or 3 in these cases.
 • The Program Counter is special in that there is
no way to directly modify its value. That
means, you can’t do something like PC=2000h.
On the other hand, if you execute instruction
LJMP 2000h you have effectively
accomplished the same thing.
Q19. Explain Program Status Word (PSW) register of
8051.
PSW Register in 8051 Microcontroller Program Status
Word
• Flags are single bit register and used to store
the result of certain function after executing
instruction. Flags are grouped inside PSW and
PCON registers.
• PSW register in 8051 microcontroller contains
math flags and PCON contains general user
flags.
• Math flags are grouped in PSW of
microcontroller 8051 and they are Carry(C),
Auxiliary Carry (AC), Over flow (OV), and
Parity (P). The general user flags are GF0 and
GF1 which are grouped in PCON register.
PSW Register in 8051
• The PSW is accessible fully as an 8-bit register,
with the address D0H.
• The bit pattern of this flag register is
Figure 1: Format of PSW register in 8051
Microcontroller
Q20.Define bit- addressable memory and write range
of address of bit addressable memory
AnsOf the 128-byte internal RAM of the 8051, only 16
bytes are bit-addressable. The rest must be accessed
in byte format. The bit-addressable RAM locations are
20H to 2FH. These 16 bytes provide 128 bits of RAM
bit-addressability since 16×8= 128. They are addressed
as 0 to 127 (in decimal) or 00 to 7FH. Therefore, the
bit addresses 0 to 7 are for the first byte of internal
RAM location 20H, and 8 to OFH are the bit addresses
of the second byte of RAM location 21H, and so on.
The last byte of 2FH has bit addresses of 78H to 7FH.
See Figure 5-1 and Example 5-11. Note that internal
RAM locations 20 – 2FH are both byte-addressable
and bit-addressable
Q 21. Write name of different Addressing Modes of
8051 microcontroller.
Immediate addressing mode- In this Immediate
Addressing Mode, the data is provided in the
instruction itself. The data is provided immediately
after the opcode. These are some examples of
Immediate Addressing Mode.
MOVA, #0AFH; MOVR3, #45H;
Register addressing mode - In the register addressing
mode the source or destination data should be
present in a register (R0 to R7). These are some
examples of RegisterAddressing Mode.
MOVA, R5; MOVR2, #45H;
Direct Addressing Mode- In the Direct Addressing
Mode, the source or destination address is specified
by using 8-bit data in the instruction.
MOV80H, R6; MOVR2, 45H;
Register indirect addressing Mode- In this mode, the
source or destination address is given in the register.
By using register indirect addressing mode, the
internal or external addresses can be accessed.
MOV0E5H, @R0; MOV@R1, 80H
Indexed addressing mode In the indexed addressing
mode, the source memory can only be accessed from
program memory only.
MOVCA, @A+PC; MOVCA, @A+DPTR;
Implied Addressing Mode- In the implied addressing
mode, there will be a single operand. These types of
instruction can work on specific registers only
RLA; SWAPA;
Q. 22 Write an assembly language programme for
8051 microcontrollerto add two 8 bit numbers stored
in consecutive memory locations 30H and 31H. Store
the 16 bit result in memory locations 35H (higher
order byte) and 36H(lower order byte).
ORG 00H ; Set the origin address
MOV DPTR, #30H ; Load the address of first number
(30H) into DPTR
MOVX A, @DPTR ; Move the content of address 30H
to accumulator A
INC DPTR ; Increment DPTR to point to the next
memory location (31H)
MOVX B, @DPTR ; Move the content of address 31H
to accumulator B
ADD A, B ; Add the contents of A and B
MOV R2, A ; Move the result to R2 (higher order byte)
MOV A, R2 ; Move the result from R2 back to
accumulator A
MOV @35H, A ; Store the higher order byte at address
35H
MOV A, #00H ; Clear accumulator A
MOV A, B ; Move the content of B to accumulator A
MOV @36H, A ; Store the lower order byte at address
36H
Q.23 Write and assembly language programme for
8051 microcontroller to multiply two 8 bit numbers
stored in consecutive memory locations 40H and
41H. Store the 16 bit result in memory locations 45H
(higher order byte) and 46H (lower order byte).
ORG 00H ; Set the origin address
MOV DPTR, #40H ; Load the address of first number
(40H) into DPTR
MOVX A, @DPTR ; Move the content of address 40H
to accumulator A
INC DPTR ; Increment DPTR to point to the next
memory location (41H)
MOVX B, @DPTR ; Move the content of address 41H
to accumulator B
MUL AB ; Multiply the contents of A and B
MOV R2, A ; Move the result (higher order byte) to R2
MOV R3, B ; Move the carry (lower order byte) to R3
MOV A, R2 ; Move the result from R2 back to
In this case every event for counter operations or
accumulator A
machine cycles for timer operation, the TL1register
MOV @45H, A ; Store the higher order byte at address
will be incremented by 1. When the register pair
45H
overflows from FFH to 00H, then the TF1 of TCON
MOV A, R3 ; Move the carry from R3 to accumulator A
register will be high, also theTL1 will be reloaded with
MOV @46H, A ; Store the lower order byte at address
the content of TH1 and starts the operation again.
46H
Mode 3 of Timer/Counter- Mode 3 is different for
END ; End of the program
Timer0 and Timer1. When the Timer0 is working in
Q.24 What are Special Function Register
mode 3, the TL0 will be used as an 8-bit
A Special Function Register (or Special Purpose
timer/counter. It will be controlled by the standard
Register, or simply Special Register) is a register within
Timer0 control bits, T0 and INT0 inputs. The TH0 is
a microprocessor, which controls or monitors various
used as an 8-bit timer but not the counter. This is
aspects of the microprocessor's function. Depending
controlled by Timer1 Control bit TR1. When the TH0
on the processor architecture, this can include, but is
overflows from FFH to 00H, then TF1 is set to 1. In the
not limited to:
following diagram, we can Timer0 in Mode 3.
• I/O and peripheral control (such as serial ports
or general-purpose IOs)
• timers
• stack pointer
• stack limit (to prevent overflows)
• program counter
• subroutine return address
• processor status (servicing an interrupt,
Q26. Show bit patterns of TMOD SFR in 8051
running in protected mode, etc.) microcontroller
• condition codes (result of previous The Timer Mode (TMOD) Special Function Register
comparisons) (SFR) in the 8051 microcontroller is used to configure
Q 25. Explain Timer Mode 2 and Timer Mode 3 in the operating modes of the timer/counters (Timer 0
8051 microcontroller. and Timer 1). The bit patterns of TMOD SFR determine
Mode 1 of Timer/Counter- The Mode 1 operation is the modes of these timers.
the 16-bit timer or counter. In the following diagram, The TMOD register is an 8-bit register, and the bit
we are using Mode 1 for Timer0. pattern typically looks like this:
Mathematical Copy code
Bit Number: 7 6 5 4 3 2 1 0
TMOD Register: GATE C/T1# M1# C/T0# M0# GATE
C/T1 C/T0
In this case every event for counter operations or Here's the description of each bit:
machine cycles for timer operation, the TH0– TL0 • GATE (Gate Control): Bit 7 and Bit 3. These bits
register-pair will be incremented by 1. When the are used to control the gating of Timer 1 (T1)
register pair overflows from FFFFH to 0000H, then the and Timer 0 (T0). When these bits are set, the
TF0 of TCON register will be high, and it stops the timer is gated; when cleared, the timer runs
timer/counter. irrespective of the status of the external
Mode 2 of Timer/Counter - The Mode 2 operation is signal.
the 8-bit auto reload timer or counter. In the following • C/T1 and C/T0 (Timer/Counter Control): Bit 6
diagram, we are using Mode 2 for Timer1. and Bit 2. These bits determine whether
Timer 1 (T1) and Timer 0 (T0) operate in timer
mode or counter mode. When set, it
configures the respective timer as a timer, and
when cleared, it configures it as a counter.
 • M1 and M0 (Mode Control): Bit 5 and Bit 1.
These bits, along with C/T1 and C/T0,
determine the operating modes (mode 0 to
mode 3) of Timer 1 (T1) and Timer 0 (T0).
• GATE (Gate Control): Bit 4. This bit is unused
in most 8051 variants and often referred to as
a "don't care" bit.
Q27. State names of Interrupt sources of 8051
microcontroller with interrupt vector addresses.
1. External Interrupt 0 (INT0):
• Interrupt Vector Address: 0x0003
• This interrupt is triggered by the INT0
pin (P3.2) of the 8051.
2. External Interrupt 1 (INT1):
• Interrupt Vector Address: 0x001B
• This interrupt is triggered by the INT1
pin (P3.3) of the 8051.
3. Timer 0 Overflow:
• Interrupt Vector Address: 0x000B
• This interrupt is generated when
Timer 0 overflows.
4. Timer 1 Overflow:
• Interrupt Vector Address: 0x0013
• This interrupt is generated when
Timer 1 overflows.
5. Serial Port (UART) Interrupt:
• Interrupt Vector Address: 0x0023
• This interrupt is generated by the
UART when a byte is received or
transmitted.
Q28. Write bit patterns of "IE SFR" in 8051
microcontroller with relevant diagram.
IE (Interrupt Enable)
The IE or Interrupt Enable Register is used to enable or
disable individual interrupts. If a bit is SET, the
corresponding interrupt is enabled and if the bit is
cleared, the interrupt is disabled. The Bit7 of the IE
register i.e., EA bit is used to enable or disable all the
interrupts.
• EA (Global Interrupt Enable/Disable): Bit 7.
This bit globally enables or disables all
interrupts in the 8051 microcontroller. When
EA is set (1), interrupts are enabled, and when
it is cleared (0), interrupts are disabled.
• ES (Serial Port Interrupt Enable/Disable): Bit 4.
This bit enables or disables the interrupt from
the serial port (UART) of the 8051
microcontroller.
• ET1 (Timer 1 Interrupt Enable/Disable): Bit 3.
This bit enables or disables the interrupt from
Timer 1.
• EX1 (External Interrupt 1 Enable/Disable): Bit
2. This bit enables or disables the interrupt
from External Interrupt 1 (INT1).
• ET0 (Timer 0 Interrupt Enable/Disable): Bit 1.
This bit enables or disables the interrupt from
Timer 0.
• EX0 (External Interrupt 0 Enable/Disable): Bit
0. This bit enables or disables the interrupt
from External Interrupt 0 (INT0).
Q29. Write priority list of interrupt sources for 8051
microcontroller.
1. External Interrupt 0 (INT0):
• This interrupt has the highest priority
among the hardware interrupts.
• It is triggered by the INT0 pin (P3.2) of
the 8051.
2. Timer 0 Overflow:
• Timer 0 overflow interrupt takes
priority over Timer 1 overflow.
• Generated when Timer 0 overflows.
3. External Interrupt 1 (INT1):
• This interrupt has lower priority
compared to INT0 but higher than
Timer 1 overflow.
• Triggered by the INT1 pin (P3.3) of the
8051.
4. Timer 1 Overflow:
• Timer 1 overflow interrupt has the
lowest priority among the hardware
interrupts.
• Generated when Timer 1 overflows.
5. Serial Port (UART) Interrupt:
• This interrupt is of higher priority
compared to Timer and Serial Port
interrupts but lower than the external
interrupts (INT0 and INT1).
• Generated by the UART when a byte is
received or transmitted.
Q30. Explain TMOD register.
TMOD (Timer Mode) Register
Both Timer 0 and Timer 1 use the same register to set
the various timer operation modes. It is an 8-bit
register in which the lower 4 bits are set aside for
Timer 0 and the upper four bits for Timers. In each
case, the lower 2 bits are used to set the timer mode
in advance and the upper 2 bits are used to specify
the location.
Gate − When set, the timer only runs while INT(0,1) is
high.
C/T − Counter/Timer select bit.
M1 − Mode bit 1.
M0 − Mode bit 0.
GATE (Gate Control): Bit 7 and Bit 3.
• These bits control the gating of Timer 1 (T1)
and Timer 0 (T0).
• When set (1), the timer is gated, meaning it
will only run when a logic high signal is
present on the respective pin (TR1 for Timer 1
and TR0 for Timer 0).
C/T1 and C/T0 (Timer/Counter Control): Bit 6 and Bit 2
• These bits determine whether Timer 1 (T1)
and Timer 0 (T0) operate in timer mode or
counter mode.
• When set (1), it configures the respective
timer as a timer, counting the internal clock
pulses.
M1 and M0 (Mode Control): Bit 5 and Bit 1.
• These bits, along with C/T1 and C/T0,
determine the operating modes (mode 0 to
mode 3) of Timer 1 (T1) and Timer 0 (T0).
• Different modes provide various
functionalities such as 13-bit or 16-bit
timer/counter, auto-reload, and more.
Q31. Write a program for 8051 to generate a square
wave of 50% duty cycle over port 1.0
To generate a square wave with a 50% duty cycle on
port 1.0 (P1.0) of the 8051 microcontroller, you can
use Timer 0 in mode 1. Mode 1 of Timer 0 is an 8-bit
timer/counter that can be configured to generate
square waveforms. Here's an example program:
ORG 0x0000 ; Define the origin address
MOV TMOD, #01h ; Configure Timer 0 in mode 1
LOOP:
SETB P1.0 ; Set P1.0 high
ACALL DELAY ; Call delay subroutine
CLR P1.0 ; Clear P1.0 low
ACALL DELAY ; Call delay subroutine
SJMP LOOP ; Repeat the loop indefinitely
DELAY:
MOV TH0, #0FCh ; Load high byte of initial value for
the delay
MOV TL0, #0Ch ; Load low byte of initial value for the
delay
SETB TR0 ; Start Timer 0
WAIT:
JNB TF0, WAIT ; Wait until Timer 0 overflows (50% of
the delay)
CLR TF0 ; Clear Timer 0 overflow flag
RET ; Return from the subroutine
Q32. Define baud rate in serial communication
Baud rate is the rate at which the number of signal
elements or changes to the signal occurs per second
when it passes through a transmission medium. The
higher a baud rate is the faster the data is
sent/received.
Baud rate = number of signal elements/total time (in
seconds)
In serial communication, baud rate refers to the speed
at which data is transmitted over a serial
communication link. It is a measure of the number of
signal or symbol changes that occur per second. Baud
rate is expressed in bits per second (bps) and indicates
the rate at which individual bits are transmitted.
Q33. Explain SBUF register.
The SBUF (Serial Buffer) register is a crucial
component in microcontroller and microprocessor
systems that facilitates serial communication. It's
commonly found in devices utilizing UART (Universal
Asynchronous Receiver/Transmitter) or USART
(Universal Synchronous/Asynchronous
Receiver/Transmitter) communication protocols.
The SBUF register serves as a temporary data storage
location during serial communication. When data is
being transmitted, it holds the data to be sent out
serially via the Tx (transmit) pin. Conversely, during
reception, it stores incoming serial data received
through the Rx (receive) pin until the microcontroller
or microprocessor can read and process it.
Q34. Explain Mode 0, 1, 2, 3 in serial communication
in 8051 microcontrollers.
Ans. Serial Data Mode-0 (Baud Rate Fixed)
• In this mode, the serial port works like a shift
register and the data transmission works
synchronously with a clock frequency of fosc
/12.
• Serial data is received and transmitted
through RXD. 8 bits are transmitted/ received
aty a time.
• The shift frequency or baud rate is always
1/12 of the oscillator frequency.
Serial Data Mode-1 (standard UART mode)
(baud rate is variable)
• In mode-1, the serial port functions as a
standard Universal Asynchronous Receiver
Transmitter (UART) mode. 10 bits are
transmitted through TXD or received through
RXD.
• The 10 bits consist of one start bit (which is
usually '0'), 8 data bits (LSB is sent
first/received first), and a stop bit (which is
usually '1'). Once received, the stop bit goes
into RB8 in the special function register SCON.
The baud rate is variable.
Serial Data Mode-2 Multiprocessor
(baud rate is fixed)
• In this mode 11 bits are transmitted through
TXD or received through RXD.
• The various bits are as follows: a start bit
(usually '0'), 8 data bits (LSB first), a
programmable 9 th (TB8 or RB8)bit and a stop
bit (usually '1').
• While transmitting, the 9 th data bit (TB8 in
SCON) can be assigned the value '0' or '1'. For
example, if the information of parity is to be
transmitted, the parity bit (P) in PSW could be
f baud = (2 SMOD /64) fosc
Serial Data Mode-3 - Multi processor mode
(Variable baud rate)
• In this mode 11 bits are transmitted through
TXD or received through RXD.
• The various bits are: a start bit (usually '0'), 8
data bits (LSB first), a programmable 9 th bit
and a stop bit (usually '1').
Mode-3 is same as mode-2, except the fact that the
baud rate in mode-3 is variable (i.e., just as in mode1 f
baud =(2 SMOD /32)*(fosc /12(256TH1)
FROM BOOK
Q.35 Basic concept of 8085 microprocessor
architecture with functional block diagram.
The 8085 microprocessor is an 8-bit microprocessor
introduced by Intel in the late 1970s. It's a
fundamental component in many early computing
devices and laid the groundwork for subsequent
microprocessor architectures. Here's a basic overview
of its architecture:
Functional Block Diagram of 8085 Microprocessor:
1. Arithmetic Logic Unit (ALU):
• Responsible for performing arithmetic
and logical operations.
• Executes operations like addition,
subtraction, AND, OR, etc.
2. Registers:
• Accumulator (A): Primary register for
arithmetic and logic operations.
• General Purpose Registers (B, C, D, E,
H, L): Used for various purposes like
data manipulation, addressing, etc.
• Flag Register: Holds status flags
indicating the results of arithmetic
operations (carry, zero, sign, parity,
etc.).
3. Control Unit:
• Coordinates and controls the flow of
data and instructions within the
processor.
• Generates timing and control signals
necessary for the execution of
instructions.
4. Instruction Register (IR):
• Stores the current instruction being
executed.
5. Program Counter (PC):
• Keeps track of the memory address of
the next instruction to be fetched and
executed.
6. Stack Pointer (SP):
• Manages the stack, used for
temporary storage of data during
subroutine calls and interrupts.
7. Address Bus and Data Bus:
• Address Bus: Carries addresses of
memory locations and I/O devices.
• Data Bus: Carries data between the
microprocessor, memory, and
peripherals.
8. Interrupt Control:
• Handles interrupts, allowing external
devices to interrupt normal program
flow.
Basic Concept:
• Data and Instructions: The 8085 operates on
8-bit data and instructions.
• Instruction Set: It has a relatively simple
instruction set supporting operations like
arithmetic, logic, data transfer, branching, etc.
• Memory: The 8085 can address up to 64KB of
memory (16-bit address bus).
• I/O Interface: It interacts with I/O devices
using specific instructions and ports.
• Timing and Control: The control unit
generates timing signals to synchronize
Q.36 Evolution of Microcontrollers.
1. First Generation: 1970s - 1980s
• The earliest microcontrollers emerged with
limited computational power and memory.
• Typically, 4-bit or 8-bit architectures.
• Examples: Intel 8048, Motorola 6800 series.
2. Second Generation: Late 1980s - Early 1990s:
• Advancements in semiconductor technology
led to more powerful and feature-rich
microcontrollers.
• Increased bit width (8-bit to 16-bit) allowing
for more complex computations.
• Examples: Intel 8051, PIC microcontrollers,
Motorola 68HC11.
3. Third Generation: Late 1990s - Early 2000s:
• Significant enhancements in performance and
integration.
 • Introduction of 32-bit microcontrollers with
higher computational power and larger
memory.
• Integrated with advanced peripherals and
interfaces (USB, Ethernet, CAN, etc.).
• Examples: ARM-based microcontrollers, Atmel
AVR32, Microchip PIC32.
4. Fourth Generation (Recent Trends): 2000s -
Present:
• Continued miniaturization and integration of
components into System-on-Chip (SoC)
designs.
• Increased focus on low power consumption
for IoT and portable devices.
• More advanced connectivity options like
Bluetooth, Wi-Fi, and NFC.
Q.37 Advantages of Microcontrollers
• The flexibility Embedded Operating
System are specifying the processor chips that
are due to the programmable nature.
• In fact, faster speed of execution is fully
integrated into the processor such as a
computer on a chip.
• These devices are operating at a faster speed
to executing the instructions to the general
purpose of microprocessors.
• Programming the logical controllers (PLCs) are
subsets of the microcontrollers that will
design the set of instructions for
manufacturing the robots and also the
industrial equipment planning for specific
automated tasks.
• More than one task may perform the PLCs and
microcontrollers are repetitive for human
attention.
Q.38 Applications of Microcontrollers
We know that microcontrollers are used for most of
the household and industrial applications. The huge
areas of applications are as follows.
• Evolution of Microcontrollers measuring the
physical quality for example force,
acceleration, stress, pressure, velocity an also
strain.
• The microcontroller is based upon the
laboratory instruments to measuring the
voltage, phase angle, energy, frequency and
also power.
• Traffic light controlling system
• Robot ARM positioning control
• As a matter of fact, both the stepper motor
control and DC motor
Q39. Block diagram of Microcomputer, elements of
Microcomputer, types of buses.
Elements of a Microcomputer:
1. CPU (Central Processing Unit): Executes
instructions, performs calculations, and manages data
flow.
2. Memory: RAM (Random Access Memory): Volatile
memory for temporary data storage.
ROM (Read-Only Memory): Non-volatile memory
storing essential instructions.
3. Input Devices: Keyboard, Mouse, Sensors:
Instruments to input data into the microcomputer.
4.Output Devices: Display, Printer, Speakers:
Instruments to receive output from the
microcomputer.
5.Buses: Data Bus: Transfers data between CPU,
memory, and peripherals.
Address Bus: Carries memory addresses.
Control Bus: Manages communication and control
signals.
System Clock: Provides timing signals for
synchronization.
Types of Buses:
Data Bus: Transfers data between the CPU, memory,
and peripherals.
Width can vary (e.g., 8-bit, 16-bit, 32-bit) determining
the amount of data transferred simultaneously.
Address Bus: Carries memory addresses from the CPU
to memory or peripherals.
Determines the maximum memory capacity a
microcomputer can address.
Control Bus: Carries control signals (read, write, etc.)
to coordinate data transfer and operations among
components. Manages signals like clock signals,
interrupts, and control lines for various functions.
Q40. Need Of Microcontroller.
Integration:
• Compactness: They integrate CPU, memory,
I/O ports, timers, and other peripherals on a
single chip, saving space and reducing
component count.
• Cost-Efficiency: Integration reduces the need
for multiple chips and components, leading to
lower manufacturing costs.
Control and Automation:
• Real-time Control: Microcontrollers excel at
real-time operations, making them ideal for
 controlling processes and systems where
timing and responsiveness are critical (e.g.,
robotics, automation).
• Embedded Systems: They power countless
devices like washing machines, microwave
ovens, automotive systems, and more,
managing various functions efficiently.
Flexibility and Customization:
• Programmability: They can be reprogrammed
easily, allowing for flexibility in adapting to
different tasks or updating functionalities
without changing hardware.
• Customization: Developers can tailor the
microcontroller's functionality by
programming it to suit specific application
requirements.
Low Power Consumption:
• Efficiency: Many microcontrollers are
designed for low power consumption, making
them suitable for battery-powered or energy-
efficient applications like IoT devices.
Q41. Family Of Microcontroller.
8051 microcontrollers
In 1981, Intel introduced an 8-bit microcontroller
called the 8051 Microcontroller. It is based on
Harvard architecture and it is used as an embedded
system. It is fabricate using VLSI technology. There are
different types of microcontrollers existing in the
market now a day those are 4-bit, 8-bit, 64-bit & 128-
bit
Feature Of 8051 Microcontroller
• 4KB bytes on-chip program memory (ROM)
• 128 bytes on-chip data memory (RAM)
• Four register banks ( Bank 0- Bank 3)
• 128 user defined software flags
• 8-bit bidirectional data bus
• 16-bit unidirectional address bus
• 32 general purpose registers each of 8-bit
• 2- sixteen bit Timer/Counter ( Timer 0 and
Timer 1)
PIC Microcontroller
• PIC stands for Peripheral Interface
Microcontroller
• PIC microcontroller was developed
in 1993 by Microchip Technology.
• PIC microcontrollers are the worlds
smallest microcontrollers that can be
programmed to carry out a huge range of
tasks.
• It is based on Harvard memory architecture.
• It is basically RISC microcontroller.
ARM Microcontroller
• The ARM stands for Advanced RISC machine .
• It was first introduced by the Acron
computers organization in 1987.
• ARM makes 32-bit and 64-bit RISC multi-core
processors.
• The ARM cortex microcontroller is an
advanced microcontroller in the ARM family,
which is developed by the ARMv7
architecture.
Motorola 68HC11
• The 68HC11 (6811 or HC11 for short) is an 8-
bit microcontroller (µC) family introduced
by Motorola in 1984.
• It descended from the Motorola
6800 microprocessor by way of the 6801.
• It is a CISC (complex instruction set computer)
microcontroller.
AVR Microcontroller
• AVR is another member of microcontroller
family.
• It is developed since 1996 by Atmel and
acquired by Microchip Technology in 2016.
• It is an 8-bit RISC (Reduced Instruction Set
Computer) architecture microcontroller.
Q42. Versions of Microcontroller 8951, 89C1051,
89C2051, 89C4051 with their specifications and
comparison.
1. 8951:
• Bit Width: 8-bit
• Memory: 4 KB of on-chip ROM, 128 bytes of
RAM
• Timers/Counters: Two 16-bit timers/counters
• I/O Ports: 32 I/O pins
• Serial Communication: UART (Universal
Asynchronous Receiver/Transmitter)
• Clock Speed: Typically operates at frequencies
up to 12 MHz
• Special Features: 5 interrupt sources, 8-bit
ADC (Analog-to-Digital Converter)
2. 89C1051:
• Bit Width: 8-bit
• Memory: 4 KB of on-chip Flash memory, 128
bytes of RAM
• Timers/Counters: Two 16-bit timers/counters
• I/O Ports: 15 I/O pins
• Serial Communication: UART
• Clock Speed: Typically operates at frequencies
up to 24 MHz
• Special Features: 2-level interrupt priority, low
power consumption
3. 89C2051:
• Bit Width: 8-bit
• Memory: 2 KB of on-chip Flash memory, 128
bytes of RAM
• Timers/Counters: Two 16-bit timers/counters
• I/O Ports: 15 I/O pins
• Serial Communication: UART
• Clock Speed: Typically operates at frequencies
up to 24 MHz
• Special Features: Low voltage programming,
low power consumption
4. 89C4051:
• Bit Width: 8-bit
• Memory: 4 KB of on-chip Flash memory, 128
bytes of RAM
• Timers/Counters: Two 16-bit timers/counters
• I/O Ports: 15 I/O pins
• Serial Communication: UART
• Clock Speed: Typically operates at frequencies
up to 24 MHz
• Special Features: Two-level interrupt priority,
low voltage programming
Comparison:
• Memory: The 8951 has on-chip ROM, while
the others (89C1051, 89C2051, 89C4051) use
Flash memory, allowing for reprogramming.
• I/O Pins: The 8951 offers more I/O pins (32)
compared to the others (15 pins).
• Memory Capacity: The 89C1051 and 89C4051
have larger Flash memory capacity (4 KB)
compared to 89C2051 (2 KB).
• Clock Speed: All operate at similar
frequencies, with the 89C1051, 89C2051, and
89C4051 capable of higher speeds (up to 24
MHz) compared to the 8951 (up to 12 MHz).
• Special Features: Each variant has its own
specific additional features like interrupt
priority, low power consumption, and
programming capabilities.
Q.43 Block diagram of 8051, function of each block.
Functions of Each Block:
CPU: Executes instructions fetched from memory,
performs arithmetic/logic operations, and controls
data flow.
Memory: Stores program instructions, data, and
special function registers (SFRs) for controlling
peripherals.
I/O Ports: Allows interfacing with external devices for
data input/output.
Timers/Counters: Handles timing, counting, and
generating time delays.
Serial Communication: Facilitates communication with
external devices via UART.
Interrupts: Handles priority-based interrupts, allowing
the CPU to respond to external events promptly.
Clock Circuitry: Provides the timing signals required
for synchronization and operation of various
components within the microcontroller.
Q.44 Pin diagram of microcontroller , function of
each pin.
Functions of Each Pin:
VCC (Pin 40): Power supply pin (usually +5V).
GND/VSS (Pin 20): Ground pin.
Port Pins (P0, P1, P2, P3): Pins 1-32: I/O pins for
general-purpose interfacing.
ALE/PROG (Pin 39):Address Latch Enable: Indicates the
availability of valid address/data on the bus during
external memory access or programming mode.
PSEN (Pin 2):Program Store Enable: Used to fetch code
from external memory during program execution.
EA/VPP (Pin 1):External Access Enable/Voltage
Programming: Connects to VCC for normal operation
or to GND for code execution from an external ROM.
RST (Pin 11):Reset pin: When pulled low, resets the
microcontroller.
XTAL1, XTAL2 (Pins 29, 30):Crystal oscillator input and
output pins for connecting an external crystal for clock
generation.
Interrupt and Timer Pins (P3.2 to P3.7): Pins 14-19:
Used for external interrupts, timer inputs, and serial
communication (RXD, TXD).
Control Pins (RD, WR): Pins 21, 22: Read and Write
control pins for accessing external memory or I/O
devices.
Q45 Difference between Internal and External
Memory
Internal Memory External Memory
Ram is volatile, but Non-volatile in
ROM is non-volatile nature
in nature
It is also known as It is also known as
Primary or main secondary memory
memory
Looks like chips and Look like a storage
is attached to the device or disk that
motherboard inside are portable and
the computer connects to every
computer
Connects internally Connect through Clock Circuit:
by inserting chips or data cable or Synchronization: Provides a stable timing reference for
when the machine is externally to the the microcontroller's operations.
manufacture network Regulates Processing Speed: Controls the rate at
The Data is stored The Data is stored which instructions are executed.
temporarily to access permanently for Crystal Oscillator: A crystal component that generates
files faster long-term stable clock signals.
It is a working It is not a working Clock Generator: Generates clock signals based on the
memory memory crystal's oscillation frequency.
It cannot store It saves a broad Clock Divider: Divides the clock signal to produce
extensive data amount of data different frequencies for internal components.
Non-portable Portable Crystal Resonance: The crystal oscillates at a specific
Ram & Rom Hard Disk & Optical frequency when voltage is applied, providing a stable
Drive time base.
Q47. Internal RAM structure. Q49. Various registers and SFRs of 8051
Basic Structure: General-Purpose Registers (GPRs):
Memory Cells: Accumulator (ACC): Primary register for arithmetic
Fundamental Unit: Each memory cell stores a single and logic operation.
bit (0 or 1). Stores one of the operands during arithmetic/logic
Organization: Arranged in rows and columns forming a operations and accumulates results.
matrix-like structure. B, C, D, E Registers: Function: Additional general-
Addressing: purpose registers. Usage: Support various arithmetic,
Address Space: Divided into memory locations, each logic, and data manipulation operations.
location identified by a unique address. Special Function Registers (SFRs):
Address Width: Determines the total number of P0, P1, P2, P3 (Port Registers): Function: I/O port
addressable locations (2^n, where 'n' is the number of registers. Usage: Control and monitor the status of I/O
address lines). pins (input/output) of the microcontroller.
Data Bus: TCON (Timer/Counter Control): Function: Controls
Pathway for Data: Allows data to be read from or timer and counter operations. Usage: Manages
written to specific memory locations. external interrupts, timer modes, and control flags.
Width: Typically matches the CPU's data bus width (8- TMOD (Timer/Counter Mode): Function: Specifies the
bit, 16-bit, etc.). mode of operation for timers/counters. Usage: Sets
Registers and Buffers: the operating modes (timer/counter) and specifies
Address Register: Holds the address of the current timer/counting functions.
memory location being accessed. TH0, TL0, TH1, TL1 (Timer/Counter Registers):
Data Register: Temporarily stores the data being read Function: Timer/Counter registers. Usage: Hold the
from or written to the memory. values for timer/counter operations.
Control Logic: IE (Interrupt Enable): Function: Enables or disables
Decoding and Timing: Manages the flow of data interrupts. Usage: Controls the activation of interrupt
between the CPU and the memory. sources.
Q48. Reset and clock circuit. IP (Interrupt Priority): Function: Specifies interrupt
Reset Circuit: priority levels. Usage: Sets priority levels for different
Initialization: Resets the microcontroller to a known interrupt sources.
state upon power-up or system reset. PSW (Program Status Word): Function: Contains flags
Clears Registers: Clears internal registers, ensuring a for controlling the CPU and reporting status. Usage:
clean start for the CPU. Flags include carry, auxiliary carry, parity, and overflow
Reset Input (RST): An external pin that initiates a reset flags.
when pulled low. Control Registers:
Reset Generator: A circuit that generates a reset signal SP (Stack Pointer): Function: Points to the top of the
based on power-on, external signals, or watchdog stack memory. Usage: Manages the stack for
timers. subroutine calls and returns.
Power-On Reset (POR): Resets the microcontroller DPTR (Data Pointer): Function: Combined register for
when power is first applied. accessing external data memory. Usage: Used in
External Reset: Triggered by external events (e.g., accessing external memory locations.
pressing a reset button).
Q50. Various addressing modes of 8051
Immediate Addressing: Format: MOV A, #data
Explanation: Data is directly specified within the
instruction itself.
Direct Addressing: Format: MOV A, data_address
Explanation: Data is accessed directly from a specific
memory location.
Register Addressing: Format: MOV A, R0 or MOV A, R1
Explanation: Data is accessed directly from one of the
eight general-purpose registers (R0 to R7).
Register Indirect Addressing: Format: MOV A, @R0 or
MOV A, @R1. Explanation: The content of the
memory location pointed to by a register is accessed
(R0 or R1).
Indexed Addressing (DPTR): Format: MOVX A, @DPTR.
Explanation: Data is accessed from the external
memory using the Data Pointer (DPTR) register.
Bit Addressing: Format: CLR bit address or SETB bit
address. Explanation: Operates on specific bits in the
Special Function Registers (SFRs) or bit-addressable
RAM locations.
Relative Addressing (Jump Instructions): Format: JMP
label or JZ label. Explanation: Instructions use labels as
operands to perform jumps or conditional branches.
Register Bank Addressing: Format: MOV A, @R0 or
MOV A, @R1. Explanation: Accesses data indirectly
through banked registers (used in the 8051's banking
scheme).
Q51.Classification of instructions of 8051
1. Data Transfer Instructions: MOV: Move data from
one location to another within the microcontroller's
memory or between registers and memory.
2. Arithmetic Instructions: ADD, SUB, MUL, DIV:
Perform arithmetic operations like addition,
subtraction, multiplication, and division.
3. Logical Instructions: ANL, ORL, XRL: Perform logical
AND, OR, XOR operations on register/memory
contents. CJNE: Compare and jump if not equal.
4.Branching and Looping Instructions: JMP, JC, JNC,
JZ, JNZ: Jump instructions based on certain conditions
(carry, zero, etc.).
5. Bit Manipulation Instructions: SETB, CLR, CPL: Set,
clear, or complement specified bits in registers or
memory. ANL, ORL, XRL with bit addressing: Perform
logical operations on individual bits.
6. Stack Operation Instructions: PUSH, POP: Push
data onto the stack, pop data off the stack.
7. I/O Instructions: IN, OUT: Input and output
operations for interfacing with external devices.
8. Control Instructions: NOP: No operation.
SJMP, LCALL, RET, RETI: Subroutine and interrupt-
related instructions.
Q52. Data transfer instructions.
1. MOV (Move) Format: MOV destination, source
Examples: MOV A, #data: Move immediate data to the
Accumulator. MOV R0, R1: Move data from one
register to another.
2. MOVC (Move Code) Format: MOVC A, @A+DPTR or
MOVC A, @A+PC. Explanation: Moves a byte of code
from code memory to the Accumulator using the
DPTR or PC as the base address.
3. MOVX (Move External) Format: MOVX A, @DPTR or
MOVX @DPTR, A. Explanation: Moves data between
the Accumulator and external memory using the Data
Pointer (DPTR).
4. MOVX (Move External) for Indirect Addressing
Format: MOVX A, @R0 or MOVX @R0, A. Explanation:
Moves data between the Accumulator and external
memory using Register Indirect Addressing with R0 or
R1.
5. PUSH and POP. Format: PUSH and POP instructions
are used to push data onto the stack or pop data from
the stack.
Q53. Arithmetic and Logical instructions of 8051.
Arithmetic Instructions:
ADD (Addition): Format: ADD A, operand
Explanation: Adds the operand to the Accumulator.
ADDC (Addition with Carry). Format: ADDC A,
operand. Explanation: Adds the operand and the carry
flag to the Accumulator.
SUBB (Subtraction with Borrow): Format: SUBB A,
operand. Explanation: Subtracts the operand and the
carry flag from the Accumulator.
INC (Increment): Format: INC operand. Explanation:
Increments the value of the operand by one.
DEC (Decrement): Format: DEC operand. Explanation:
Decrements the value of the operand by one.
MUL (Multiplication) and DIV (Division): Format: MUL
AB and DIV AB. Explanation: Multiply and divide 8-bit
numbers in the Accumulator and B register.
Logical Instructions:
ANL (AND Logical Operation): Format: ANL
destination, source. Explanation: Performs a bitwise
AND operation between the destination and source
operands.
ORL (OR Logical Operation): Format: ORL destination,
source Explanation: Performs a bitwise OR operation
between the destination and source operands.
XRL (Exclusive OR Logical Operation):
Format: XRL destination, source. Explanation:
Performs a bitwise XOR operation between the
destination and source operands.
CLR (Clear): Format: CLR bit_address. Explanation:
Clears a specific bit in the Special Function Registers
(SFRs) or RAM locations.
Q54. Branching instructions of 8051
1. JMP (Jump): Format: JMP label. Explanation:
Unconditional jump to the specified label/address in
the program.
2. CJNE (Compare and Jump if Not Equal) Format:
CJNE A, operand, label. Explanation: Compares the
Accumulator with the operand and jumps to the
specified label if they are not equal.
3. DJNZ (Decrement and Jump if Not Zero) Format:
DJNZ operand, label. Explanation: Decrements the
operand by 1 and jumps to the specified label if the
result is not zero.
4. JC (Jump if Carry Set) and JNC (Jump if Carry Not
Set) Format: JC label and JNC label. Explanation:
Conditional jump instructions based on the carry flag.
JC jumps if the carry flag is set, and JNC jumps if the
carry flag is not set.
5. JZ (Jump if Zero) and JNZ (Jump if Not Zero) Format:
JZ label and JNZ label. Explanation: Conditional jump
instructions based on the zero flag. JZ jumps if the
zero flag is set, and JNZ jumps if the zero flag is not
set.
6. SJMP (Short Jump) Format: SJMP label Explanation:
Unconditional short jump to the specified label within
a limited range (-128 to +127 bytes from the current
instruction).
Q55. Bit manipulation of 8051
The 8051 microcontroller includes specific instructions
for bit manipulation that allow operations on
individual bits within registers, memory locations, or
I/O ports. These instructions are crucial for setting,
clearing, and testing specific bits, which is often
necessary in embedded systems and interfacing with
peripherals. Here are the main bit manipulation
instructions:
1. SETB (Set Bit): Format: SETB bit_address
Explanation: Sets a specific bit in the Special Function
Registers (SFRs) or RAM locations.
2. CLR (Clear): Format: CLR bit_address
Explanation: Clears a specific bit in the Special
Function Registers (SFRs) or RAM locations.
3. CPL (Complement):
Format: CPL bit_address. Explanation: Complements
(inverts) a specific bit in the Special Function Registers
(SFRs) or RAM locations.
4. ANL (AND Logical Operation with Bit): Format: ANL
destination, #bit. Explanation: Performs a logical AND
operation between the destination operand and a bit
mask.
5. ORL (OR Logical Operation with Bit): Format: ORL
destination, #bit. Explanation: Performs a logical OR
operation between the destination operand and a bit
mask.
6. XRL (Exclusive OR Logical Operation with Bit):
Format: XRL destination, #bit. Explanation: Performs a
logical XOR operation between the destination
operand and a bit mask.
7. RL (Rotate Left): Format: RL A. Explanation: Rotates
the Accumulator left through the carry bit.
8. RR (Rotate Right): Format: RR A. Explanation:
Rotates the Accumulator right through the carry bit.
Q56. Stack, subroutine and interrupt related
instructions of 8051
Stack-Related Instructions:
PUSH (Push Accumulator): Format: PUSH
Explanation: Pushes the contents of the Accumulator
onto the stack.
POP (Pop Accumulator): Format: POP. Explanation:
Pops the topmost value from the stack into the
Accumulator.
PUSH and POP Direct (for Registers R0-R7): Format:
PUSH direct and POP direct. Explanation: Pushes/pops
the contents of the specified register onto/from the
stack.
Subroutine Call and Return Instructions:
CALL (Call Subroutine): Format: CALL address.
Explanation: Jumps to a subroutine located at the
specified address and saves the return address on the
stack.
RET (Return from Subroutine): Format: RET.
Explanation: Returns from a subroutine, retrieving the
return address from the stack.
RETI (Return from Interrupt): Format: RETI.
Explanation: Returns from an interrupt service routine
(ISR) and restores the interrupt state.
Interrupt-Related Instructions:
EI (Enable Interrupts): Format: EI. Explanation: Enables
interrupts, allowing the microcontroller to respond to
interrupts.
DI (Disable Interrupts): Format: DI. Explanation:
Disables interrupts, preventing the microcontroller
from responding to interrupts.
INT (Software Interrupt): Format: INT. Explanation:
Triggers a software-generated interrupt.
Q57.Software development steps.
1. Requirements Gathering:
• Purpose: Understanding and documenting
what the software should accomplish.
• Activities: Interacting with stakeholders,
gathering and analyzing requirements,
defining scope, and creating a Requirements
Specification document.
2. Planning:
• Purpose: Creating a roadmap for the project,
including timelines, resources, and
deliverables.
• Activities: Setting goals, defining project
scope, creating a project plan, allocating
resources, and establishing milestones.
3. Design:
• Purpose: Translating requirements into a
detailed technical design.
• Activities: Creating system architecture, high-
level and detailed design documents, UI/UX
design, database design, and outlining
algorithms or data structures.
4. Implementation (Coding): • Value: 0 = Disable, 1 = Enable.
• Purpose: Writing the actual code based on IE.1 - ET0:
the design specifications. • Purpose: Enable/Disable Timer 0 interrupt.
• Activities: Coding, unit testing, ensuring code • Value: 0 = Disable, 1 = Enable.
quality, and adhering to coding standards. IE.2 - EX1:
5. Testing: • Purpose: Enable/Disable external interrupt 1.
• Purpose: Verifying that the software meets • Value: 0 = Disable, 1 = Enable.
requirements and functions as intended. IE.3 - ET1:
• Activities: Different types of testing (unit • Purpose: Enable/Disable Timer 1 interrupt.
testing, integration testing, system testing, • Value: 0 = Disable, 1 = Enable.
user acceptance testing) to identify and fix IE.4 - ES:
defects. • Purpose: Enable/Disable Serial Port interrupt.
6. Deployment: • Value: 0 = Disable, 1 = Enable.
• Purpose: Releasing the software for users or
IE.5 - Reserved:
clients.
• Purpose: Reserved for future use.
• Activities: Packaging the software, preparing
IE.6 - Reserved:
documentation, setting up environments, and
• Purpose: Reserved for future use.
deploying the software into production or
IE.7 - EA:
distribution channels.
• Purpose: Global interrupt enable/disable
7. Maintenance and Support:
(master switch).
• Purpose: Ensuring the software continues to
• Value: 0 = Disable all interrupts, 1 = Enable all
function and evolve.
interrupts.
• Activities: Bug fixing, updates, enhancements,
PSW Register (Program Status Word):
user support, and addressing issues post-
The PSW register contains flags and control bits
deployment.
representing the processor's status and controlling
Q58. Bit configuration of IP, IE, PSW
certain operations.
IP Register (Interrupt Priority):
PSW.0 - P:
The IP register manages interrupt priority levels in the
8051 microcontrollers. It has various bits allocated to • Purpose: Parity flag.
different interrupt sources, allowing the programmer • Value: Set according to the parity of the
to prioritize interrupts. Accumulator after certain arithmetic
IP.0 - PX0: operations.
• Purpose: Priority level for external interrupt 0. PSW.1 - User-Defined:
• Value: 0 = Low Priority, 1 = High Priority. • Purpose: Available for user-defined purposes.
IP.1 - PT0: PSW.2 - OV:
• Purpose: Priority level for Timer 0 interrupt. • Purpose: Overflow flag.
• Value: 0 = Low Priority, 1 = High Priority. • Value: Set when an arithmetic operation
IP.2 - PX1: generates an overflow.
PSW.3 - RS0:
• Purpose: Priority level for external interrupt 1.
• Purpose: Register bank select 0 for data
• Value: 0 = Low Priority, 1 = High Priority.
pointer.
IP.3 - PT1:
• Value: Selects register bank 0.
• Purpose: Priority level for Timer 1 interrupt.
PSW.4 - RS1:
• Value: 0 = Low Priority, 1 = High Priority.
• Purpose: Register bank select 1 for data
IP.4 - PS:
pointer.
• Purpose: Reserved for future use.
• Value: Selects register bank 1.
IP.5 - P:
PSW.5 - F0:
• Purpose: Reserved for future use.
• Purpose: User-Defined flag.
IP.6 - Reserved:
• Value: User-Defined.
• Purpose: Reserved for future use.
PSW.6 - AC:
IP.7 - Reserved:
• Purpose: Auxiliary Carry flag.
• Purpose: Reserved for future use.
IE Register (Interrupt Enable): • Value: Set when an auxiliary carry occurs in
The IE register controls the enabling or disabling of arithmetic operations.
interrupts in the 8051 microcontrollers. PSW.7 - CY:
IE.0 - EX0: • Purpose: Carry flag.
• Purpose: Enable/Disable external interrupt 0. • Value: Set when an arithmetic operation
generates a carry or borrow.
Q59.Pin diagram of microprocessor
Address bus- A15-A8, it carries the most significant 8-
bits of memory/IO address.
Data bus- AD7-AD0, it carries the least significant 8-bit
address and data bus.
Control and status signals- These signals are used to
identify the nature of operation. There are 3 control
signal and 3 status signals.
Three control signals are RD, WR & ALE.
IO/M- This signal is used to differentiate between IO
and Memory operations, i.e. when it is high indicates
IO operation and when it is low then it indicates
memory operation.
S1 & S0- These signals are used to identify the type of
current operation.
Power supply- There are 2 power supply signals − VCC
& VSS. VCC indicates +5v power supply and VSS
indicates ground signal.
Clock signals- There are 3 clock signals, i.e. X1, X2, CLK
OUT.
Interrupts & externally initiated signals- Interrupts are
the signals generated by external devices to request
the microprocessor to perform a task.
Serial I/O signals- There are 2 serial signals, i.e. SID
and SOD and these signals are used for serial
communication.
Q60.Software development tools like Editor,
Assembler, Linker, Loader and Hex
converters.
1. Editor- Used for writing and editing source code.
Function: Provides a user interface for writing code
with features like syntax highlighting. Examples:
Notepad++.
2. Assembler: Purpose: Translates assembly language
code into machine code (object code). Function:
Converts mnemonic instructions into binary machine
code that the microcontroller can understand.
Examples: Keil μVision, AS31
3. Linker: Purpose: Combines multiple object files and
libraries into a single executable program. Function:
Resolves references between different modules,
Examples: Keil μVision, SDCC (Small Device C
Compiler).
4. Loader: Purpose: Loads the executable program
into the microcontroller's memory. Function: Transfers
the program from the development environment (PC)
to the target microcontroller's memory (RAM or
ROM). Examples: Some IDEs like Keil provide built-in
loaders.
5. Hex Converter: Purpose: Converts binary or object
files into hexadecimal format. Function: Generates a
hexadecimal file that represents the machine code
instructions for programming the microcontroller's
memory (EPROM/Flash). Examples: Utilities provided
by IDEs like Keil, standalone converters.
Q61 . Related SFRs (Special Function Registers) for
Serial Communication in the 8051
Related SFRs (Special Function Registers) for Serial
Communication in the 8051:
1. SCON (Serial Control Register):
• Purpose: Controls the serial port
mode and status.
• Bits: SCON.0 to SCON.7 control
various serial port settings.
2. SBUF (Serial Buffer Register):
• Purpose: Holds the data to be
transmitted or received.
3. PCON (Power Control Register - SM0 and
SM1):
• Purpose: Selects the UART mode
(serial port modes).
Programming Modes:
The 8051 UART supports various modes:
• Mode 0: 8-bit UART, variable baud rate.
• Mode 1: 8-bit UART, fixed baud rate.
Q.62 Interrupts- related SFRs, types, operations
Related SFRs for Interrupts:
IE (Interrupt Enable Register): Purpose: Enables or
disables interrupts globally or individually. Bits: IE.0 to
IE.7 control specific interrupt enable/disable flags for
various sources.
IP (Interrupt Priority Register): Purpose: Sets the
priority levels for different interrupts. Bits: IP.0 to IP.7
determine the priority levels for each interrupt source.
EA (Global Interrupt Enable): Purpose: Globally
enables or disables all interrupts. Bit: EA enables or
disables all interrupts when set or cleared,
respectively.
Interrupt Flags (TF0, TF1, IE0, IE1, RI, TI, etc.): Purpose:
Flags indicating specific interrupt events or conditions.
Bits: TF0, TF1 for Timer 0/1 overflow, IE0, IE1 for
external interrupts, RI/TI for serial communication,
etc.
Operations Related to Interrupts:
Enabling and Disabling Interrupts: Using the EA
(Global Interrupt Enable) bit to enable or disable all
interrupts.
Setting Interrupt Priority Levels: Using IP to set priority
levels for different interrupt sources. Higher values
indicate higher priority.
Clearing Interrupt Flags: Clearing specific interrupt
flags (TI, RI, etc.) after handling interrupts to avoid re-
triggering.
Interrupt Service Routines (ISRs): Writing code to
handle specific interrupt events in ISRs.
Interrupt Vector Table: Contains addresses of the ISR
for each interrupt type.
Types of Interrupts in the 8051:
External Hardware Interrupts (INT0, INT1): Source:
Triggered by external hardware signals on P3.2 (INT0)
and P3.3 (INT1).
Timer Interrupts (TF0, TF1): Source: Generated by
Timer 0 (TF0) and Timer 1 (TF1) overflows.
Serial Communication Interrupts (RI, TI): Source:
Generated by serial communication events (receive -
RI, transmit - TI).
Q63. Operation of Overcurrent Relay:
Ans. Sensing Circuit
Current Measurement
Threshold Setting
Trip Decision
Tripping Action
Time Delay (Optional)
Reset and Restoration
Q64.Speed control of D.C. motor.
Ans. Voltage Control:
2. Armature Voltage Control:
3. Field Flux Control:
4. PWM (Pulse Width Modulation):
5. Feedback Control (Closed-Loop Control):
6. Electronic Speed Controllers (ESC):
7. Using Motor Speed Control Units:
Q64.Microcomputer Block Diagram