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BAsics OF COA
BAsics OF COA
BASICS OF COA
BY: MILKIYAS DUGUMA
1. Digital Systems
Basic Concept
Logic Gates
Closing
Boolean Algebra
Summary
Combination Circuit
Questions and Answers
Sequential Circuits
2. Data Representation
Content Bit, Byte and Words
3. Digital component
4. Register Transfer
5. Micro Operation
A system designed to store, process, and communicate
information in digital form.
Its range of application - process control, communication
Introduction systems, digital instruments, and consumer products
The typical example of Digital System is Digital computer.
NAND GATE
The NOT-AND (NAND) gate which is equal to an AND gate followed by NOR GATE
a NOT gate. The NAND gate gives a high output if any of the inputs are The NOT-OR (NOR) gate which is equal to an OR gate followed
low. by a NOT gate. The NOR gate gives a low output if any of the
inputs are high
Exclusive-OR/ XOR GATE:
The 'Exclusive-OR' gate is a circuit which will
give a high output if one of its inputs is high
but not both of them.
EXCLUSIVE-NOR/Equivalence GATE:
The 'Exclusive-NOR' gate is a circuit that does the inverse
operation to the XOR gate. It will give a low output if one of its
inputs is high but not both of them.
Boolean algebra
Boolean algebra can be considered as an algebra that deals with binary
variables and logic operations. Boolean algebraic variables are
designated by letters such as A, B, x, and y. The basic operations
performed are AND, OR, and complement
Variable used can have only two values. Binary 1 for HIGH and Binary 0 for
Algebra LOW.
ORing of the variables is represented by a plus (+) sign between them. For
example ORing of A, B, C is represented as A + B + C.
2. F2 = x + y'z
Note: To represent a function in a truth table, we need a list of the 2^n combinations of n binary variables.
Diagrammatical Representation of Boolean Algebra
The output of combinational circuit at any instant of time, depends only on the levels present at input
terminals.
The combinational circuit do not use any memory.
Example. The combinational circuit that performs the addition of two bits is called a half adder and the one
that performs the addition of three bits is a full adder
Cont’d
Half Adder
The half adder circuit is designed to add two single bit binary number x and y. It is the basic
building block for addition of two single bit numbers. This circuit has two outputs carry and sum.
'x' and 'y' are the two inputs, and S (Sum) and C (Carry) are the two outputs.
The Carry output is '0' unless both the inputs are 1.
'S' represents the least significant bit of the sum.
Example
Bit and
Bytes
Cont’d
BINARY NUMBER SYSTEM
Characteristics
Uses two digits, 0 and 1.
Also called base 2 number system
Last position in a binary number represents an
x power of the base (2). Example: 2x where x
represents the last position - 1
Cont’d
OCTAL NUMBER SYSTEM
Uses eight digits, 0,1,2,3,4,5,6,7.
Also called base 8 number system
Each position in an octal number represents a 0 power of the base (8). Example: 8 0
Last position in an octal number represents an x power of the base (8). Example: 8 x where x represents the last
position - 1.
HEXADECIMAL NUMBER SYSTEM
Uses 10 digits and 6 letters, 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F.
Letters represents numbers starting from 10. A = 10, B = 11, C = 12, D = 13, E = 14, F = 15.
Also called base 16 number system.
Each position in a hexadecimal number represents a 0 power of the base (16). Example 16 0.
Last position in a hexadecimal number represents an x power of the base (16). Example 16 x where x
represents the last position - 1
CONVERTING FROM ONE BASE TO ANOTHER
i. Conversion from Decimal to Base m
Step 1: Divide the given decimal number by m (the desired base). The result will have a quotient
and a remainder.
Step 2: Divide the quotient by m. Still you get a quotient and a remainder.
Step 3: Repeat step 2 until the quotient becomes 0. You should note that we are conducting
integer division. In integer division n/m, the quotient is 0 whenever n < m.
Step 4: Collect and arrange the remainders in such a way that the first remainder is the least
significant digit and the last remainder is the most significant digit (i.e., RnRn-1 … R2R1).
Example: Convert 47 to binary
CONT’D
Quotient Remainder
47 ÷ 2 23 1
23 ÷ 2 11 1
11 ÷ 2 5 1
5÷2 2 1
2÷2 1 0
1÷2 0 1
In order to convert the given decimal numbers into binary (base 2), they are divided by 2.
Since the quotient becomes 0 at the last division, the division has to stop and we should
collect the remainders starting from the last one. Hence the result is 1011112
II. CONVERSION FROM BASE M TO DECIMAL
D116 = (13 × 161) + (1 × 160); you should be aware that the calculations are in decimal thus the hex
digit D must first be converted into its decimal equivalent (13).
= (13 × 16) + (1 × 1)
= 208 + 1
= 209
It is possible to use decimal number system as an intermediate base to convert from any base to
any other base. However, for conversion from binary to octal or vice versa, there is a very simple
method.
Step 1: Group the binary digits (bits) starting from the rightmost digit. Each group should contain
3 bits. If the remaining bits at the leftmost position are fewer than 3, add 0s at the front.
Step 2: For each 3-bit binary string, find the corresponding octal number
Example 1101111 to Octal
001 101 111
1 5 7
Since we are left with a single bit at the leftmost position, two 0s are added at the front to make
create a three-bit group. The result shows that 11011112 = 1578.
iv. Conversion from Binary to Hexadecimal
One possible way to convert a binary number to hexadecimal, is first to convert the binary
number to decimal and then from decimal to hex. Nevertheless, the simple way to convert binary
numbers to hex is by grouping as used in conversion to octal. Here a single group has 4 bits.
Step 1: Starting from the rightmost bit, group the bits in 4. If the remaining bits at the leftmost
position are fewer than 4, add 0s at the front.
Step 2: For each 4-bit group, find the corresponding hexadecimal number. You can use Table 3-1
to find conversion equivalents.
Example: Convert the binary numbers 1110110001 to hexadecimal.
6 4 7
110 100 111
One’s complement
The one’s complement of binary number is obtained by changing its each 0 into a 1 and each 1 into a 0. It is
also called radix-minus-one complement. For Example, one’s complement of 1002 is 0112 and of 11102 is
00012.
Two’s complement
The two’s complement of binary number is obtained by adding 1 to its 1’s complement.
2’s complement=1’s complement+1.
It is also known as true complement. Suppose we asked to find 2’s complement of 1011 2. Its 1’s complement
is 01002. Next add 1 to get 01012. Hence 2’s complement of 10112 is 01012
1’s complement subtraction
In this method instead of subtracting a number, we add its 1’s complement to the minuend. The last carry
(whether 0 or 1) is added to get the final answer.
RULES
- Compute the ones complement of the subtrahend by changing all its 1s to 0s and all its 0s to 1s.
- Add its complement to the minuend
- Perform the end-around carry of the last 1 or 0
- If there is no end-around carry (i.e. 0 carry), then the answer must be re-complemented and a negative
sign attached to it.
- If the end-around carry is 1, no re-complement is necessary.
Example 1. Suppose we want to subtract 1012 from 1112. The procedure is under:
Ex.
2’s Complement
Subtraction
3. Digital Components
IC, DECODER, ENCODER, REGISTER
Cont’d
DECODERS
A decoder is a combinational circuit that converts binary information from n coded inputs to 2^n
outputs.
Commercial decoders include one or more enable (E) inputs to control the operation of circuit.
Cont’d
ENCODER
An encoder is a digital circuit that performs the inverse operation of
a decoder.
An encoder has 2^n input lines and n output lines. It converts octal
input to binary digits.
Types of Encoders
Priority encoders.
Decimal to BCD encoder.
Octal to binary encoder.
Hexadecimal to binary encoder
Cont’d
MULTIPLEXER
A multiplexer is a combinational circuit that receives binary
information from one of the 2^n input lines and directs it to a single
output line.
Note: A 2^n-to-1 multiplexer has 2^n input data lines and n input
selection lines whose bit combinations determine which input data
are selected for the output
Cont’d
REGISTER
A Register is a fast memory used to accept, store, and transfer data and instructions that are being used
immediately by the CPU.
A Register can also be considered as a group of flip-flops with each flip-flop capable of storing one bit of
information.
A register with n flip-flops is capable of storing binary information of n-bits.
The flip-flops contain the binary information whereas the gates control the flow of information, i.e. when
and how the information?s are transferred into a register.
4. Register Transfer
& Micro Operation
R E G I S T E R T R A N S F E R A N D R E G I S T E R T R A N S F E R L A N G UA G E
BUS AND MEMORY TRANFERS
M I C R O O P E R AT I O N
Cont’d
REGISTER TRANSFER LANGUAGE
A digital computer system exhibits an interconnection of digital modules such as registers, decoders,
arithmetic elements, and Control logic.
These digital modules are interconnected with some common data and control paths to form a complete
digital system.
Digital modules are best defined by the registers and the operations that are performed on the data stored
in them.
The operations performed on the data stored in registers are called Micro-operations.
The internal hardware organization of a digital system is best defined by specifying:
The set of registers and the flow of data between them.
The sequence of micro-operations performed on the data which are stored in the registers.
The control paths that initiates the sequence of micro-operation
CONT’D
The Register Transfer Language is the symbolic representation of notations used to specify the sequence of
micro-operations
Data transfer takes place between processor registers and memory and between processor
registers and input-output systems. These data transfer can be represented by standard
notations given below:
Notations R0, R1, R2..., and so on represent processor registers.
The addresses of memory locations are represented by names such as LOC, PLACE, MEM, etc.
Input-output registers are represented by names such as DATA IN, DATA OUT and so on.
The content of register or memory location is denoted by placing square brackets around the name of the
register or memory location.
CONT’D
REGISTER TRANSFER
Register Transfer- refers to the availability of hardware logic circuits that can
perform a given micro-operation and transfer the result of the operation to the
same or another register.
The memory address register is designated by MAR.
Program Counter PC holds the next instruction's address.
Instruction Register IR holds the instruction being executed.
R1 (Processor Register).
Data Transfer from one register to another register is represented in symbolic form by means of
replacement operator. For instance, the following statement denotes a transfer of the data of
register R1 into register R2.
R2 ← R1
CONT’D
MEMORY TRANSFER
Most of the standard notations used for specifying operations on memory
transfer are:
The transfer of information from a memory unit to the user end is called
a Read operation.
The transfer of new information to be stored in the memory is called a Write operation.
A memory word is designated by the letter M.
We must specify the address of memory word while writing the memory transfer
operations.
The address register is designated by AR and the data register by DR.
Thus, a read operation can be stated as:
CONT’D
BINARY ADDER
The Add micro-operation requires registers that can hold the data and the digital components
that can perform the arithmetic addition.
A Binary Adder is a digital circuit that performs the arithmetic sum of two binary numbers
provided with any length.
A Binary Adder is constructed using full-adder circuits connected in series, with the output carry
from one full-adder connected to the input carry of the next full-adder.
CONT’D
The augend bits (A) and the addend bits (B) are designated by subscript numbers from right to
left, with subscript '0' denoting the low-order bit.
The carry inputs starts from C0 to C3 connected in a chain through the full-adders. C4 is the
resultant output carry generated by the last full-adder circuit.
The output carry from each full-adder is connected to the input carry of the next-high-order full-
adder.
The sum outputs (S0 to S3) generates the required arithmetic sum of augend and addend bits.
The n data bits for the A and B inputs come from different source registers. For instance, data bits
for A input comes from source register R1 and data bits for B input comes from source register
R2.
The arithmetic sum of the data inputs of A and B can be transferred to a third register or to one
of the source registers (R1 or R2).
5. Basic computer design
& Organization