IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS, VOL. 33, NO.

4, APRIL 2023 463

Frequency-Reconfigurable Dual-Band Low-Noise

Amplifier With Interstage Gm-Boosting for
Millimeter-Wave 5G Communication
Seungchan Lee , Member, IEEE, and Songcheol Hong , Member, IEEE

Abstract— A differential low-noise amplifier (LNA) for the 5G

n257 band and a frequency reconfigurable differential LNA for
both the 5G n257 and n260 bands (26.5–29.5 and 37–40 GHz),
fabricated in a 65-nm CMOS process, are presented. Both LNAs
achieve better gain and noise figure performances due to the use
of magnetically coupled gm-boosting in the common-gate stage of
a cascode amplifier. Furthermore, the frequency-reconfigurable
LNA uses frequency reconfigurable matching circuits at the
input, interstage, and output to achieve optimal noise and gain
matchings for each band. The single band LNA has a core chip
area of 0.11 mm2 , a peak gain of 11.9 dB, a 3-dB bandwidth of
5.3 GHz, and a noise figure of 2.79 dB at 28.5 GHz. The dual-band
LNA is capable of dual-band operation due to the reconfiguring Fig. 1. (a) Frequency allocation of 5G NR FR2. (b) Design concept of the
matching circuits with switched coupled inductors (SCIs) and frequency-reconfigurable amplifier.
switched capacitors. It has a core chip area of 0.12 mm2 ,
peak gains of 11.1/8.5 dB, 3-dB bandwidths of 4.8/9.4 GHz, [4], [5], [6], [7], [8], [9], [10]. The first uses wideband
and minimum noise figures of 3.49/4.01 dB at 28.5/38 GHz, circuits and the second uses frequency-reconfigurable circuits.
respectively. Because millimeter-wave 5G frequency bands (24–30 and 37–
Index Terms— 5G communication, CMOS, gm-boosting, 43.5 GHz) are noncontiguous with a large frequency sepa-
millimeter-wave, multiband, reconfigurable. ration as shown in Fig. 1(a), a wideband circuit design for
all bands becomes highly challenging when also seeking to
I. I NTRODUCTION optimize the performance on each frequency band.

A S the 3rd Generation Partnership Project (3GPP) has

released up-to-date standards for millimeter-wave 5G
new radio (NR) FR2 communication, various millimeter-wave
frequency bands are allocated across 24–52.6 GHz (n257
to n261). The use of multiband operation can increase the
available bandwidth, improve communication quality, and
can even enable a global 5G roaming service. However,
the use of a dedicated chip for each band can increase
the cost due to the direct increase in the chip size. Thus,
using multiple bands in those frequency bands with one
chip can be a cost-efficient solution to realize millimeter-
wave 5G for everyday use. Recently, two main approaches
to realize multiple-band chips were presented [1], [2], [3],
Manuscript received 14 October 2022; accepted 29 October 2022. Date of
publication 2 January 2023; date of current version 10 April 2023. This work
was supported in part by the Institute of Information and Communications
Technology Planning and Evaluation (IITP) through the Korean Government
[Ministry of Science and ICT (MSIT)] (Millimeter-Wave Metasurface-Based
Dual-Band Beamforming Antenna-on-Package Technology for 5G Smart-
phone) under Grant 2020-0-00858 and in part by the National Research
Foundation of Korea (NRF) through the Korean Government (MSIT) under
Grant NRF-2020R1A2C2099939. (Corresponding author: Songcheol Hong.)
Seungchan Lee is with the Department of Electrical and Computer Engineer-
ing, University of California at Santa Barbara, Santa Barbara, CA 93106 USA
(e-mail: seungchanlee.93@gmail.com).
Songcheol Hong is with the Department of Electrical Engineering, Korea
Advanced Institute of Science and Technology, Daejeon 34141, South Korea
(e-mail: schong1234@kaist.ac.kr).
Color versions of one or more figures in this letter are available at
https://doi.org/10.1109/LMWT.2022.3220975.
Digital Object Identifier 10.1109/LMWT.2022.3220975
2771-957X © 2023 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.
On the other hand, a frequency-reconfigurable approach can
allow performance optimization at each frequency band at the
cost of additional control functions. It can be matched to the
optimum impedances for desired performance outcomes on
multiple bands. Fig. 1(b) shows the design concept used in
this work for the frequency-reconfigurable low-noise amplifier
(LNA). In this work, we implemented a prototype of this
concept by using the cascode amplifier with gm-boosting
technique and frequency reconfigurable matching networks at
input–output, and internode.
The flow of this work is as follows. The single-band
LNA using the magnetically coupled gm-boosting technique
in a cascode amplifier is described first. Then, a frequency-
reconfigurable dual-band LNA using switched coupled induc-
tors (SCIs) [11], [12], [13] and switched capacitors [14],
[15], [16] for simultaneous gain and noise matchings at
dual-bands with the magnetically coupled gm-boosting tech-
nique is presented.
II. C IRCUIT D ESIGN
A. Gm-Boosted LNA Design
Fig. 2(a) and (b) show the gm-boosting circuits which use
capacitors or inductors. As explained in earlier work [17],
gm-boosting with capacitive coupling requires a small die area
but only has a limited gm-boosting effect. While gm-boosting
with magnetically coupled inductors requires some die area

Authorized licensed use limited to: LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING. Downloaded on January 09,2024 at 05:36:22 UTC from IEEE Xplore. Restrictions apply.
 464 IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS, VOL. 33, NO. 4, APRIL 2023

Fig. 2. Gm-boosting techniques. (a) Capacitive coupling. (b) Magnetic coupling. (c) Single-band LNA with interstage magnetic coupled gm-boosting.
(d) Schematic of the frequency-reconfigurable dual-band LNA.

for the inductors, it can have a greater gm-boosting effect.

A series or parallel inductor at the internode is widely used
to ensure a better noise figure by resonating out the parasitic
capacitances at the node and internode matching effects in
LNA and power amplifier design [18], [19], [20], [21], [22].
In this work, magnetically coupled gm-boosting is introduced
between the gate inductors of a common-gate stage and the
internode inductors of Lp1 and Lp2 in a cascode amplifier to
realize both gm-boosting and interstage matching effects [23],
as shown in Fig. 2(c). In addition, the body-floating technique
is introduced as used in earlier works [24], [25] to improve
P1 dB without sacrificing the noise figure of the LNA.
B. Frequency-Reconfigurable LNA Design
To ensure the optimum performances at broadly separate
frequency bands, frequency-reconfigurable circuits of SCIs
and switched capacitors of SC1 and SC2 are used. Recon-
figurable inductors with SCIs are introduced at the input
and output transmission-line transformers (TLTs) and in the
interstage matching network of the cascode amplifier, as shown
in Fig. 2(d). Specifically, internode inductors are determined
to have the required inductance for each frequency band. This
is explained by (2) in an earlier study [21].
The switched capacitors SC1 and SC2 are introduced
between the gate and source of the common source stage to
optimize the noise figure and gain performances simultane-
ously at different frequency bands. Moreover, for input and
output matching TLTs, we optimized the impedance matching
with the SCIs to have low insertion loss at dual bands.
Fig. 3. Chip photographs of (a) single-band LNA and (b) dual-band LNA.
In particular, as in the input and output matching circuit
layouts shown in Fig. 2(d), the SCIs are located on the core
side of the transformer to minimize the effects outside of
the transformer. The width, spacing, and size of the MCL are
such that they minimize the loss of the matching circuit while
maintaining the optimum impedance at each band. In the SCIs
and switched capacitors, control voltages (VCTRL and VCTRL )
of 1.2 and 0 V are used for the switch on and off bias.
The detailed values of the components are shown in Fig. 2
including the transformers. The VCG is 1.2 V identical to the
VDD voltage to ensure a high gain level, and VCS is set to
0.5 V for high gain and low noise figure.
III. M EASUREMENT R ESULTS
The single-band and frequency-reconfigurable dual-band
LNA was implemented using a 65-nm RF CMOS process.
Fig. 3 shows chip photos of both LNAs, where the core
areas are correspondingly 0.11 and 0.12 mm2 without pads.
Due to the area-efficient layout of the coupled inductors,
the size of the frequency-reconfigurable dual-band LNA is

Authorized licensed use limited to: LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING. Downloaded on January 09,2024 at 05:36:22 UTC from IEEE Xplore. Restrictions apply.
 LEE AND HONG: FREQUENCY-RECONFIGURABLE DUAL-BAND LNA WITH INTERSTAGE Gm-BOOSTING
TABLE I
C OMPARISON TABLE OF THE mm-WAVE LNA S
Fig. 4. Measured S-parameters of (a) single-band LNA and (b) dual-band
LNA. Noise figures of (c) single-band LNA and (d) dual-band LNA. Stability
of (e) single-band LNA and (f) dual-band LNA.
nearly identical to that of the single-band LNA. Both LNAs
were measured using ground-signal-ground (GSG) RF probes,
and all of the losses from the measurement setup were
calibrated and de-embedded. The dc power consumption of
the single-band and dual-band LNAs are 12 and 16.8 mW,
respectively. Fig. 4 shows the measured S-parameters of both
Authorized licensed use limited to: LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING. Downloaded on January 09,2024 at 05:36:22 UTC from IEEE Xplore. Restrictions apply.
465
LNAs. The single-band LNA has a gain of 11.9 dB with a 3-
dB bandwidth of 5.3 GHz, while the dual-band LNA has peak
gains of 11.1 and 8.5 dB with 3-dB bandwidths of 4.8 and
9.4 GHz at 28.5 and 38 GHz. Fig. 4(c) and (d) shows the
measured noise figures which were 2.79 dB at 28.5 GHz
for single-band LNA, and 3.49 and 4.01 dB for dual-band
LNA at 28 and 38 GHz, respectively. Table I compares the
proposed LNAs with those of previously reported mm-wave
LNAs. Using the figure-of-merits (FoMs), the single-band
LNA has good performance, especially for FoM2 which
includes the linearity performance due to the body-floating
and differential configuration. Also, the dual-band LNA shows
better performance than the frequency-reconfigurable LNA
in [1] and comparable to the other LNAs, especially with
FoM2. Specifically, compared to several LNAs using the 65-
nm CMOS process in the literature [4], [5], [27] in Table I,
the single-band LNA in this work shows a better noise figure
due to magnetic-coupled gm-boosting.
IV. C ONCLUSION
A differential single-band and a frequency-reconfigurable
dual-band LNA for the 5G NR FR2 band are presented.
Both LNAs use interstage magnetically coupled gm-boosting
at the common-gate stage to improve the gain and noise
figure. This allows the LNAs to have a larger gain and better
noise figure due to the effects of gm-boosting and interstage
matching. The frequency-reconfigurable dual-band LNA uses
SCIs and switched capacitors to ensure simultaneous gain
and noise matching at the matching networks. Due to the
integrated frequency-reconfigurable circuits at the matching
circuit layouts, the size of the frequency-reconfigurable dual-
band LNA becomes as small as 0.12 mm2 . This is similar to
the size of the single-band LNA at 0.11 mm2 .
ACKNOWLEDGMENT
The authors would like to thank the Integrated Circuit
Design Education Center (IDEC) for support with
computer-aided design (CAD) tools and J. Lim’s support with
measurement.
 466 IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS, VOL. 33, NO. 4, APRIL 2023
R EFERENCES
[1] R. A. Shaheen, T. Rahkonen, and A. Parssinen, “Millimeter-wave
frequency reconfigurable low noise amplifiers for 5G,” IEEE Trans.
Circuits Syst. II, Exp. Briefs, vol. 68, no. 2, pp. 642–646, Feb. 2021.
[2] K. Wang and H. Zhang, “A 22-to-47 GHz 2-stage LNA with 22.2 dB
peak gain by using coupled L-type interstage matching inductors,” IEEE
Trans. Circuits Syst. I, Reg. Papers, vol. 67, no. 12, pp. 4607–4617,
Dec. 2020.
[3] M. K. Hedayati, A. Abdipour, R. S. Shirazi, C. Cetintepe, and
R. B. Staszewski, “A 33-GHz LNA for 5G wireless systems in 28-nm
bulk CMOS,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 65, no. 10,
pp. 1460–1464, Oct. 2018.
[4] S. N. Ali, M. Aminul Hoque, S. Gopal, M. Chahardori, M. A. Mokri,
and D. Heo, “A continually-stepped variable-gain LNA in 65-nm CMOS
enabled by a tunable-transformer for mm-wave 5G communications,” in
IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2019, pp. 926–929.
[5] P. Qin and Q. Xue, “Compact wideband LNA with gain and input
matching bandwidth extensions by transformer,” IEEE Microw. Wireless
Compon. Lett., vol. 27, no. 7, pp. 657–659, Jul. 2017.
[6] C. Li, O. El-Aassar, A. Kumar, M. Boenke, and G. M. Rebeiz, “LNA
design with CMOS SOI process-l.4dB NF K/Ka band LNA,” in IEEE
MTT-S Int. Microw. Symp. Dig., Jun. 2018, pp. 1484–1486.
[7] V. Lammert, P. Sakalas, A. Werthof, R. Weigel, and V. Issakov, “Design
and measurements of a 28 GHz high-linearity LNA in 45 nm SOI-
CMOS,” in Proc. IEEE Int. Conf. Microw., Antennas, Commun. Electron.
Syst. (COMCAS), Nov. 2021, pp. 275–279.
[8] V. Issakov, S. Kehl-Waas, R. Ciocoveanu, W. Simburger, and
A. Geiselbrechtinger, “A 6 KV ESD-protected low-power 24 GHz LNA
for radar applications in SiGe BiCMOS,” in Proc. IEEE BiCMOS
Compound Semiconductor Integr. Circuits Technol. Symp. (BCICTS),
Oct. 2018, pp. 194–197.
[9] A. A. Alhamed and G. M. Rebeiz, “A 28–37 GHz triple-stage
transformer-coupled SiGe LNA with 2.5 dB minimum NF for low power
wideband phased array receivers,” in Proc. IEEE BiCMOS Compound
Semiconductor Integr. Circuits Technol. Symp. (BCICTS), Nov. 2020,
pp. 1–4.
[10] V. Issakov and A. Werthof, “A 10 mW LNA with temperature compen-
sation for 24 GHz radar applications in SiGe BiCMOS,” in Proc. IEEE
BiCMOS Compound Semiconductor Integr. Circuits Technol. Symp.
(BCICTS), Nov. 2020, pp. 1–4.
[11] M. Kossel et al., “LC PLL with 1.2-octave locking range based on
mutual-inductance switching in 45-nm SOI CMOS,” IEEE J. Solid-State
Circuits, vol. 44, no. 2, pp. 436–449, Jan. 2009.
[12] M. Demirkan, S. P. Bruss, and R. R. Spencer, “11.8 GHz CMOS VCO
with 62 tuning range using switched coupled inductors,” in Proc. IEEE
Radio Freq. Integr. Circuits (RFIC) Symp., Jun. 2007, pp. 401–404.
[13] S. Lee, J. Park, and S. Hong, “Millimeter-wave multi-band reconfig-
urable differential power divider for 5G communication,” IEEE Trans.
Microw. Theory Techn., vol. 70, no. 1, pp. 886–894, Jan. 2022.
Authorized licensed use limited to: LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING. Downloaded on January 09,2024 at 05:36:22 UTC from IEEE Xplore. Restrictions apply.
[14] L.-H. Lu, H.-H. Hsieh, and Y.-S. Wang, “A compact 2.4/5.2-GHz CMOS
dual-band low-noise amplifier,” IEEE Microw. Compon. Lett., vol. 15,
no. 10, pp. 685–687, Oct. 2005.
[15] H. Song, H. Kim, K. Han, J. Choi, C. Park, and B. Kim, “A sub-
2 dB NF dual-band CMOS LNA for CDMA/WCDMA applications,”
IEEE Microw. Wireless Compon. Lett., vol. 18, no. 3, pp. 212–214,
Mar. 2008.
[16] V. K. Dao, B. G. Choi, and C. S. Park, “A dual-band CMOS RF front-
end for 2.4/5.2 GHz applications,” in Proc. IEEE Radio Wireless Symp.,
2007, pp. 145–148.
[17] J. Zhang, D. Zhao, and X. You, “A 20-GHz 1.9-mW LNA using Gm-
boost and current-reuse techniques in 65-nm CMOS for satellite commu-
nications,” IEEE J. Solid-State Circuits, vol. 55, no. 10, pp. 2714–2723,
Jun. 2020.
[18] B.-J. Huang, K.-Y. Lin, and H. Wang, “Millimeter-wave low power
and miniature CMOS multicascode low-noise amplifiers with noise
reduction topology,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 12,
pp. 3049–3059, Dec. 2009.
[19] H. Samavati, H. R. Rategh, and T. H. Lee, “A 5-GHz CMOS wireless
LAN receiver front end,” IEEE J. Solid-State Circuits, vol. 35, no. 5,
pp. 765–772, May 2000.
[20] K.-J. Sun, Z.-M. Tsai, K.-Y. Lin, and H. Wang, “A 10.8-GHz CMOS
low-noise amplifier using parallel-resonant inductor,” in IEEE MTT-S
Int. Microw. Symp. Dig., Jun. 2007, pp. 1795–1798.
[21] J. Jang, J. Oh, C. Y. Kim, and S. Hong, “A 79-GHz adaptive-
gain and low-noise UWB radar receiver front-end in 65-nm CMOS,”
IEEE Trans. Microw. Theory Techn., vol. 64, no. 3, pp. 859–867,
Mar. 2016.
[22] J. Park, S. Kang, and S. Hong, “Design of a Ka-band cascode
power amplifier linearized with cold-FET interstage matching network,”
IEEE Trans. Microw. Theory Techn., vol. 69, no. 2, pp. 1429–1438,
Feb. 2021.
[23] S. Guo, T. Xi, P. Gui, D. Huang, Y. Fan, and M. Morgan, “A transformer
feedback Gm -boosting technique for gain improvement and noise reduc-
tion in mm-Wave cascode LNAs,” IEEE Trans. Microw. Theory Techn.,
vol. 64, no. 7, pp. 2080–2090, Jul. 2016.
[24] M.-C. Yeh, Z. M. Tsai, R.-C. Liu, K.-Y. Lin, Y.-T. Chang, and H. Wang,
“Design and analysis for a miniature CMOS SPDT switch using body-
floating technique to improve power performance,” IEEE Trans. Microw.
Theory, vol. 54, no. 1, pp. 31–39, Jan. 2006.
[25] G. S. Shin et al., “Low insertion loss, compact 4-bit phase shifter in
65 nm CMOS for 5G applications,” IEEE Microw. Wireless Compon.
Lett., vol. 26, no. 1, pp. 37–39, Jan. 2016.
[26] V. Chauhan and B. Floyd, “A 24–44 GHz UWB LNA for 5G cellular
frequency bands,” in Proc. 11th Global Symp. Millim. Waves (GSMM),
May 2018, pp. 1–3.
[27] S. Lee, J. Park, and S. Hong, “A Ka-band phase-compensated variable-
gain CMOS low-noise amplifier,” IEEE Microw. Wireless Compon. Lett.,
vol. 29, no. 2, pp. 131–133, Feb. 2019.