17692 Fitch St.

Irvine, California, USA 92614

MANUAL INSERT 1 800 854–2433
for the Tel: 949 251 1800 Fax: 949 756 0756
UPC-32/12
AC LINE SYNC OPTION

GENERAL

This document describes the functionality of a feature implemented into the existing UPC-32/12 power
source controller. This feature is termed AC LINE SYNCHRONIZATION. It allows the UPC-32/12 to be
synchronized to an external AC line voltage source. Note that the "UPC" is the power source controller and
is referred to throughout this document. It is generally equivalent to referring to the Pacific AC Power
Source.

DESCRIPTION

The basic method of synchronization is as follows.

First the UPC is initialized to desired settings (ie; Voltage, Frequency, Transition time (aka Slew time aka
:SOURce:RAMP time) etc.

(NOTE: The :SOURce:RAMP <time> command may be used to control the frequency or voltage slew time.
The range for this transition time is 1mS - 300s.)

The Programmable Output Impedance (Prog. Zo) must be set by the user (or Host Computer) to a
POSITIVE IMPEDANCE to protect the power source during paralleled operation with an external AC voltage
source, (ie; Prog. Zo = 0.5 to 1 ohm). CAUTION: Do NOT use less than 0.1 ohm POSITIVE impedance
while the Power source is connected to the external voltage source. This impedance is the primary
method of overcurrent protection that allows the Pacific AC power source to be paralleled to an external
voltage source.

The amount of re-circulated current (current flowing back into the voltage or power source) can be
calculated as Vdif/R, where Vdif is the difference between Power source output voltage and the external
voltage and R is the programmed impedance plus wiring losses. The re-circulated current must be less than
the power source rating minus load current to avoid overloading the power source.

Two processes described below are required to fully synchronize the UPC-12 to an external AC line voltage
source, in both the frequency and amplitude domains. They are the Frequency Sync and Voltage match
processes, termed FSYNC and VTRACK respectively.

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FSYNC PROCESS

A command is issued to the UPC requesting it to synchronize (phase "LOCK") to the AC line (the external
voltage source). There are 2 parameters used to control this process.

1) Ftarget - the target frequency for the UPC to attempt to synchronize to.

2) Ftolerance - the tolerance (in %) of the target frequency (range is 1-20%)

The UPC measures the period of the external voltage source fundamental frequency using an External
Sync signal (+5vdc TTL type). If the frequency measured is not within the capture range specified, an error
is reported and the request to sync process is aborted. Otherwise the process continues as follows.

The UPC slews its output frequency (based on the slew time if specified) to the frequency of the external
voltage source within approx. 20 seconds and synchronizes to it.

While the FSYNC state is true, the UPC attempts to maintain synchronization accuracy by regularly
measuring the period of the External SYNC signal and updating the UPC's output frequency. This update
cannot occur more often than the period of the SYNC signal being measured. Updates may occur approx.
every 1-3 seconds, but this time may vary and only occurs while no other command or function is being
processed (such as using the setup mode or loading waveforms).

While the FSYNC state is true, an indicator on the V/I meter is displayed that says "FSYNC".

In the event that the measured external Frequency of the external voltage source exceeds Ftarget +/-
Ftolerance, the Output Contactor of the power source will be disabled by the UPC and an error message will
be generated indicating the following.

"ERROR - SYNCHRONIZATION TO EXTERNAL SYNC SIGNAL LOST,

OUTPUT HAS BEEN DISABLED."

WARNING: DO NOT RE-CLOSE the OUTPUT CONTACTOR after an error until the FSYNC and
VTRACK states are re-established! A user program must be re-executed after this error to produce output
power and allow the OUTPUT to be re-ENABLED.

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VTRACK PROCESS

After the FSYNC state has been achieved and verified, the user must perform the following actions to cause
the UPC to "MATCH" its output voltage to that of the external voltage source. This is required ONLY if the
power source output is to be paralleled with an external voltage source.
Two parameters are used to control this process.

1) A voltage offset may be added to the measured external voltage source to set the power source
output voltage.

2) A tolerance (referenced to the external voltage source + the voltage offset) which the output
voltage must be within for the UPC to maintain the VTRACK state.

When invoked, the voltage matching process begins with measuring the voltage of the external voltage
source. This is performed through the use of the EXTERNAL (VOLTAGE) SENSE terminals on the rear of
the Power Source. The measured result is added to the offset voltage and is used as a reference to
program the power source output voltage.

The power source output is measured and if it does not match the reference voltage (external voltage +
offset voltage) then the power source output gets modified (using 80% of the error at a time) to achieve the
desired output voltage in a manner similar to the UPC CSC function.

This process is performed regularly by the UPC so as to maintain voltage tracking.

If the power source output voltage measured is within the tolerance specified (on all output phases), the
VTRACK state becomes true and an indicator on the V/I meter is displayed that says "VTRACK". If the
VTRACK state becomes false, the UPC continues to adjust the output voltage in an attempt to achieve the
VTRACK state.

NOTE: Since voltage metering takes several seconds to complete, the VTRACK indicator on the
front panel and through the Remote Interface may not be valid for several seconds after a change in
the real VTRACK state. Therefore it is important to test the VTRACK indicator several times waiting
a period of at least 6 seconds between queries before assuming that it is valid.

CAUTION: DO NOT USE VTRACK IN A CLOSED LOOP CONFIGURATION. Closed loop is when the
external voltage sense lines are connected to the power source output. A closed loop configuration occurs
while the power source output is connected to an external voltage source and the external voltage sense
lines are connected to the external voltage source. Operating VTRACK in a closed loop configuration
will result in positive or negative feedback occurring at the power source causing the output voltage
to increase or decrease in an UNDESIRABLE MANNER and may DAMAGE THE LOAD AND/OR
POWER SOURCES.

THEREFORE the user must make allowance to disconnect the EXTERNAL (VOLTAGE) SENSE terminals
on the rear of the Power Source from the Power Source output. Typically the EXTERNAL (VOLTAGE)
SENSE terminals are used for metering voltage at the load and for CSC. This capability is not available
while using the EXTERNAL (VOLTAGE) SENSE terminals for the VTRACK function.

NOTE that a VTRACK process can be performed exclusively through the use of a Host computer or
manually by simply measuring the external voltage with a voltmeter and programming the UPC to this same
voltage. In this case DO NOT use the VTRACK function of the UPC.

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At this point the PPSC AC power source is synchronized and matched in both the frequency and amplitude
domains. Now the VTRACK mode must be disabled to prevent using it in a closed loop
configuration. The AC power source output may then be paralleled to the external voltage source.

Changes in UPC programmed frequency will not occur while the UPC is in the FSYNC state.
Changes in UPC programmed voltage will not occur while the UPC is in the VTRACK state.
CSC will be disabled if the VTRACK state is requested.

Stored program and Transient program execution is also NOT allowed if either FSYNC or VTRACK modes
are enabled.

REMEMBER: The FSYNC state must be true before the VTRACK state can be enabled or an error will
occur. Loss of the FSYNC state will cause the VTRACK state to become disabled.

WARNING

The user MUST ENSURE THAT THE PPSC POWER SOURCE AND THE EXTERNAL VOLTAGE
SOURCE ARE MATCHED IN FREQUENCY AND VOLTAGE WHEN THE POWER OUTPUTS ARE
PARALLELED. . Otherwise DAMAGE to POWER SOURCES and/or LOADS may occur. This may be
done by simply verifiying that the FSYNC and VTRACK indicators on the UPCs front panel V/I meter are
displayed. A query of the UPC may be performed to verify the FSYNC and VTRACK states if a remote
interface (ie IEEE-488 or RS-232) is being used. This is in addition to standard ERROR DETECTION.
These commands are described in the REMOTE INTERFACE COMMAND SUMMARY later in this
document.

UNSYNC PROCESS

To allow the UPC to be programmed with a different frequency other than that of the external voltage
source, an "UNSYNC" process must be performed.

This process involves the UPC CPU to switch the CYCLE RESET source from external to internal.

This UNSYNC process must be initiated by the user prior to changing voltage or frequency within the UPC.
This is accomplished by disabling the FSYNC state. Doing this automatically disables the VTRACK state
also. POWER OUTPUTS MUST NOT BE PARALLELED WHEN ENABLING OR DISABLING THE
FSYNC STATE.

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FRONT PANEL CONTROL

The FSYNC state may be controlled through the Front panel of the UPC via a setup menu (fn300). Pressing
+/- changes the FSYNC state. Pressing ENTER moves the cursor through the Ftarget and Ftolerance fields
so they may be edited. This setup screen is shown below.

FSYNC STATE = DISABLED

(Use +/- to toggle, CLEAR to exit)
Target Freq = 50.00 Ext. Freq=49.99
%Tolerance = 20 % Int. Freq=49.98

Pressing EXECUTE simply re-executes the current state shown (for testing purposes). The measured
frequency of the external sync signal is displayed along with the internal DRM frequency. These indicators
are only updated while the cursor is in the "ENABLED/DISABLED" field.

NOTE: The measured frequency of the external sync signal is also displayed as Output "FREQ" on the V/I
meter display of the UPC (and over the Remote Interface) while the FSYNC state is true.

The VTRACK state may be controlled through the Front panel of the UPC via a setup menu (fn301).
Pressing +/- changes the VTRACK state. Pressing ENTER moves the cursor through the offset and
tolerance fields so they may be edited. This setup screen is shown below.

VTRACK STATE = DISABLED

(Use +/- to toggle, EXECUTE when done)
Voffset = 0.0
%Tolerance = 20 %

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REMOTE INTERFACE COMMAND SUMMARY

syntax: Purpose:

:SYSTem:STATe Mode,Ftarget,Ftolerance
- OR -
:SYSTem:STATe Mode,Voffset,Vtolerance - Control states

Mode - requests FSYNC or VTRACK states or both, as follows.

0 = DISABLE both FSYNC and VTRACK.

1 = ENABLE FSYNC
2 = ENABLE VTRACK
-2 = DISABLE VTRACK ONLY

Ftarget - Target frequency for the UPC to attempt to synchronize to.

Ftolerance - the tolerance (in %) of the target frequency (range is 1-20%)

Voffset - voltage added to the measured external voltage used for setting the
power source output voltage. * NOTE: See caution below.

Vtolerance - tolerance allowed for Vtrack state to be maintained.

example: :SYSTem:STATe 1,50,0.15 requests FSYNC state, with a Target frequency

of 50 Hz. and a tolerance of 15%.

* CAUTION: DO NOT USE VTRACK IN A CLOSED LOOP CONFIGURATION. Closed loop

is when the external voltage sense lines are connected to the power source output. A
closed loop configuration occurs while the power source output is connected to an external
voltage source and the external voltage sense lines are connected to the external voltage
source. Operating VTRACK in a closed loop configuration will result in positive or
negative feedback occurring at the power source causing the output voltage to
increase or decrease in an UNDESIRABLE MANNER and may DAMAGE THE LOAD
AND/OR POWER SOURCES.

NOTE: Ftarget, Ftolerance, Voffset and Vtolerance do not apply for DISABLING and are not
required.

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 REMOTE INTERFACE COMMAND SUMMARY (cont)

:SYSTem:STATe? - state query

A "0" returned from the UPC indicates FSYNC and VTRACK disabled.
A "1" returned from the UPC indicates the FSYNC state only is true.
A "2" returned from the UPC indicates the VTRACK state only is true.
A "3" returned from the UPC indicates the FSYNC and VTRACK states are both
true.

NOTE: Since voltage metering takes several seconds to complete, the VTRACK indicator on the
front panel and through the Remote Interface may not be valid for several seconds after a change in
the real VTRACK state. Therefore it is important to test the VTRACK indicator several times waiting
a period of at least 6 seconds between queries before assuming that it is valid.

ERROR DETECTION

NOTE: Confirmation of successful execution of any commands sent to the UPC via the Remote Interface
may be acquired through the use of the :SYSTem:ERRor? query or the *STB? status byte query. See the
UPC OPERATION MANUAL section 5.5.3 for more details on error handling.

:SYSTem:ERRor? Device error query

(Standard command)

*STB? Status Byte query

(Standard command)

See the UPC OPERATION MANUAL section 5 for more details on standard commands.

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EXTERNAL SYNC INPUT SIGNAL REQUIREMENTS

The External Sync input signal into the UPC (female BNC located on the rear panel of the Pacific AC power
source) must have the following characteristics.

0-5 vdc (TTL like) noise free square wave, capable of driving a 330 ohm load. Duty cycle is not critical but
the period and coincedence is critical.

Coincidence of the rising edge of the External Sync signal with the external voltage source Zero degree
point is critical if paralleling the power source output to the external voltage source is to be performed. The
delay between the rising edge and the external voltage source Zero degree point should be
+/- 10uS max. Excessive current flow to or from the power source will be observed if there is too much
delay.

NOTE: The "SYNC OUT" signal on the AUX-IO connector from the UPC is referenced to the UPCs internal
oscillator. It is NOT representative of the Power Source output when using the FSYNC mode.

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BRIEF SUMMARY

A brief summary of a synchronizing and optional power paralleling process is as follows.

This example begins assuming that the users Load is initially connected to only the PPSC AC power source
output.

WARNING: FIRST MAKE SURE ALL WIRING IS CORRECT WITH ALL INPUT AND
OUTPUT POWER DISCONNECTED. SEE FIGURE 1 FOR AN EXAMPLE.

1. Apply Input power to AC Power Source. Insure all OUTPUT CONTACTORS are DISABLED.

2. Set up TRANSITION TIME and any other global settings of the UPC, if desired.

3. Program UPCs Output Frequency and Voltage, along with Power FORM, Coupling, XFMR ratio,
Waveform and Current Limit to the desired values.

4. Set PROGRAMMABLE IMPEDANCE value of UPC if paralleling power outputs is being performed.
A minimum of 0.1 ohms is mandatory, 0.5 ohms preferred, to limit re-circulated current.

At this point power from the AC power source may be applied to the load under test by ENABLING the
OUTPUT CONTACTOR. Voltage, frequency and impedance may be changed to support load testing if
needed prior to synchronizing.

5. Setup the FSYNC parameters either through the front panel setup display (fn300) or via the
:SYSTem:STATe command on the Remote Interface.

6. Setup the VTRACK parameters either through the front panel setup display (fn301) or via the
:SYSTem:STATe command on the Remote Interface. If paralleling power outputs is NOT being
performed, skip the VTRACK setup and function.

7. Request the FSYNC mode via fn300 on the front panel or via the :SYSTem:STATe command on the
Remote Interface. Wait for confirmation on the front panel LCD or through the :SYSTem:STATe? query
command.

8. Request the VTRACK mode if needed via fn301 on the front panel or via the :SYSTem:STATe command
on the Remote Interface. Wait for confirmation on the front panel LCD or through the :SYSTem:STATe?
query command.

9. Immediately disable the VTRACK mode (if used) via fn300 on the front panel or via the :SYSTem:STATe
command on the Remote Interface. This is to prevent using VTRACK in a closed loop configuration.

At this point power from the AC power source may be paralleled to the external voltage source.

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Power source output Frequency may NOT be changed via programming until the FSYNC state has been
unlocked by disabling FSYNC via fn300 on the front panel or via the :SYSTem:STATe command on the
Remote Interface.

Programmed Voltage and Impedance should NOT be changed while in the FSYNC state unless it is to
accomodate fine tuning of the Power source output voltage.

In order to disconnect the AC Power source from the external voltage source in a synchronized manner so
that power source voltage and frequency may be changed, continue with the following steps.

10. Disconnect the external voltage source from the Pacific AC power source.

11. Request the FSYNC mode be disabled via fn300 on the front panel or via the :SYSTem:STATe
command on the Remote Interface. Wait for confirmation on the front panel LCD or through the
:SYSTem:STATe? query command.

Normal operation of the UPC and the AC power source has now been re-established.

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