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ESD 정의 QRT
ESD 정의 QRT
Electrostatic Discharge 개요
큐알티반도체
• Electrostatic Discharge
• LATCH-UP
• LATCH-UP Test 방법
What is ESD ?
ESD Model
ESD Model
HBM Model
R
HV DUT
Supply
C
MM Model
R
HV DUT
Supply
C
• VDD (Power) Mode : VDD Pin을 GND 化하고 Others Pin Zapping.
VDD VDD
V 0V
0V
-V
VSS VSS
VDD VDD
0V V
0V
-V
VSS VSS
VDD VDD
V 0V
0V -V
VSS VSS
CDM Model
EHT
1Ω
LATCH-UP ?
Vdd
Vout +
①
Vss
P+ N+ N+ P+ P+ N+
Rpw ②
⑤ R-n sub
Tr2 Tr4 Tr1 Tr3
③
P -Well
⑥
④
N -Well
I-Test
Isupply Measurement
Isupply Measurement
Sample size 3 3
Pin group
JEDEC AEC-Q-100
CLASS 0 ≤ 250V
CLASS 3B > 8000V
MACHINE MODEL
Sample size 3 3
Pin group
JEDEC AEC-Q-100
CLASS A < 200V
CLASS C ≥ 400V
Sample size 3 3
JEDEC AEC-Q-100
CLASS Ⅰ < 200V
CLASS Ⅳ ≥ 1000V
LATCH-UP TEST
Standard JEDEC AEC-Q-100
Sample size 6 6
Test Temperature
Class Ⅰ or Class Ⅱ Class Ⅱ
Class
Test Matrix
ESD is important
• Distribution of failure modes in silicon ICs