Electric Circuits 1-2 GATE ACADEMY PUBLICATIONg, _1.1 Concept for Parameter of Circuit Element Question 4 Sy | Classify electrical circuit or network. Ans. The behavior of the entire network depends on the behavior and characteristics of its elements. The classification of networks can be shown as, Electrical circuits or networks o : @ I |® lo Active] [Passive] [Linear] [Nonlinear] [Unilateral] [Bilateral] [Lumped] [Disuibwed] Question 2 Define following electrical network : 1. Linear and Non-linear network ICSVTU Dec 2014 (EEE)] 2. Bilateral and Unilateral network [CSVTU May 2009, 2008, Dec 2014 (EEE), 2013 (EEE), 2012] 3. Active and Passive network [CSVTU May 2015 (EE & EEE), 2007, 2007, Dec 2013 (EEE), 2012] 4. Lumped and Distributed network ICSVTU May 2007] Ans. 1. Linear network : A circuit or network whose parameter i.e. elements like resistances, inductances and capacitances are always constant irrespective of the change in time, voltage, temperature etc. is known as linear network. The Ohm’s law can be applied to such network. The mathematical equations of such network can be obtained by using the law of superposition. The response of the various network elements is linear with respect to the excitation applied to them. Non-linear network : A circuit whose parameters change their values with change in time, temperature, voltage etc. is known as non-linear network. The Ohm’s law may not be applied to such network. Such network does not follow the law of superposition. The response of the various elements is not linear with respect to their excitation. The best example is a circuit consisting of a diode where diode current does not vary linearly with the voltage applied to it. 2. Bilateral network : A circuit whose characteristics, behavior is same irrespective of the direction of current through various elements of it, is called bilateral network, Network consisting only resistances is good example of bilateral network, R & HES: ES. —T aGATE ACADEMY PUBLICATIONS ® 1-3 Development of Circuit Concepts Unilateral network : A circuit whose operation, behavior is dependent on the direction of the current through various elements is called unilateral network Circuit consisting diodes, which allows flow of current only in one direction is good example of unilateral circuit, RR, 3. Active elements : The elements that supply energy to the circuit is called active element. Examples of active elements include voltage and current source, generators, and electronic device that require power supplies. A transistor is an active circuit element, meaning that it can amplify power of a signal. On the other hand, transformer is not an active element because it does not amplify the power level and power remains same both in primary and secondary sides. Transformer is an example of passive element. Passive elements : Resistors, inductors, and capacitors are passive elements which take energy from the sources and either convert it to another form or store it in an electric or magnetic field. The three passive circuit elements are shown in figure. REL + 4, Lumped network : A network in which all the network elements are physically separable is known as lumped network. Most of the electric networks are lumped in nature, which consists elements like R, L, C, voltage source etc. Distributed networks : A network in which the circuit elements like resistance, inductance etc. cannot be physically separable for analysis purposes, is called distributed network. The best example of such a network is a transmission line where resistance, inductance and capacitance of a transmission line are distributed all along its length and cannot be shown as separate elements, anywhere in the circuit. [1.2 Passive Element : Resistance, Inductance and Capacitance Question 3 Ans. Explain : 1._Resistance 2. Inductance 3, Capacitance The three basic linear passive elements used in various circuits are Resistance, Inductance and Capacitance. Resistance : It is the property of the material by which tt opposes og the flow of current through it. The resistance of element is denoted ora, soma by the symbol ‘R’. Resistance is measured in ohms()-1-4 GATE ACADEMY PUBLICATIONS + Electric Circuits is gi hm’s law, “The relation between voltage and current is given by O} V=RI Resistor dissipates energy in the form given by, of heat. So power absorbed by the resistor is y P=V1=(LR)L = PR == watts Inductance : Inductance is the element in which energy is shored . oe of electromagnetic field. The inductance is denoted by ‘L’ and ty is meas lenry (H). For inductance, the voltage is proportional to the rate 7 L . change of current. a “s eer r—e a ‘ Capacitance : An element in which energy is stored in the form of electrostatic: field is known as capacitance. The capacitance is denoted by ‘C’ and it is measured in Farads r (F). For capacitor, the voltage is proportional to the charge. —— VacQ=> Ve fide te ; or dv Vat fidt> i=c7- di —=>V=L Yas [L1.3 Active Element : Voltage and Current Source Question 4 Define ideal voltage and current source. ICSVTU May 2008, Dec 2014 (EEE), 2013 (EEE)] Voltages and currents in a circuit are imposed by sources. In practical circuits, There are many types of source, such as batteries and solar cells, but from a circuit analysis viewpoint we need to consider only two ideal sources : the voltage source and the current source. In practical sources can be modeled by a combination of ideal sources and other circuit elements. Ideal voltage source : The circuit symbols for the ideal voltage source are shown in figure The ideal voltage source V, has a voltage V between its terminals (in the direction indicated by the arrow), no matter what current is flowing in the source. For example, an ideal 5 V source has a voltage of 5 V across its terminals, for currents of 1 mA, 1 A or 1000 A. This behavior contrasts with a real source, in which the terminal voltage reduces as the current drawn increases. The current drawn from an ideal voltage source depends only on the circuit to which it is connected, Ideal current source : The ideal current source, shown symbolically on the right in figure, produces the specified current I. ‘Whatever the voltage across the source terminals, An ideal current source / of 2A produces the appropriate voltage across its terminals to ensure that 2A 's Pushed into the circuit to which it is connected. Therefore, the terminalGATE ACADEMY PUBLICATIONS ® 1-5 Development of Circuit Concepts voltage of the ideal current source is determined by the external circuit. Question 5 Ans. Define dependent voltage and current source. ICSVTU May 2016 (EEE)] | Dependent voltage source : A dependent voltage source which changes in some described manner with the conditions on the connected circuit is shown by the diamond-shaped symbol in figure. Since the control of the dependent voltage source is achieved by a voltage or current of some other element in the circuit, and the source can be voltage or current, it follows that there are two possible types of dependent voltage sources, namely : (i) A voltage-dependent voltage source (VDVS) : It produces a voltage as a function of voltages elsewhere in the given circuit. This is called VDVS. It is shown in the figure. V=KY, (i) A current-dependent voltage source (CDVS) : It produces a voltage as a function of current elsewhere in the given circuit. This is called CDVS. It is shown in the figure. V=KI, Dependent current source : A dependent current source which changes in some described manner with the conditions on the connected circuit is shown by the diamond-shaped symbol in figure. Since the control of the dependent current source is achieved by a voltage or current of some other element in the circuit, and the source can be voltage or current, it follows that there are two possible types of dependent current sources, namely : (i) A voltage-dependent current sources (VDCS) : It produces a current as a function of voltage elsewhere in the given circuit. This is called VDCS. It is shown in the figure. (ii) A current-dependent current source (CDCS) : It produces a current as a function of current elsewhere in the given circuit. This is called CDCS, It is shown in theElectric Circuits <6 K is constant and V, and fare the voltage and current respectively, present elsewhere in the given circuit. The dependent source are also known as controlleq sources. [1.4 Duality of Simple Circuit Question 6 What is dual network? Explain the procedure to obtain dual network of given network. ICSVTU May 2011, Dec 2006] Or Explain the principle of duality. ICSVTU May 2015 (EEE), Dec 2008] Or Explain property of duality. ICSVTU Dec 2010, 2011, 2013 (EEE), May 2013] Or Define duality of a circuit with neat diagrams. ICSVTU Dec 2014 (EEE), 2007] Or Explain the graphical procedure of constructing the dual of network. {CSVTU May 2014 (EEB)] ‘Two circuits are duals if the mesh equation that characterize one of them have the same mathematical form as the nodal equation that characterize the other. They are said to be exact duals if each mesh equation of one circuit is numerically identical with the corresponding nodal equation of the other. For example Ohm’s law may be stated in v form as, v=Ri @ oriniformas, i=Gy @) Equation (ji) may be derived from (i) by solving for i and replacing by G note that either equation may be formed from the other by replacing each symbol by its pait opposite i by v, v by i, R by Gand G by R. There is a systematic symmetry of opposite or duality between resistance and conductance, current and voltage and series and parallel. Two circuits are said to be duals of one another if they are described by the sam characterizing equation with dual quantity interchanged. Circuits where the cut set matrix of one corresponds to Tieset matrix of the othe! are the Duals of each other.GATE ACADEMY PUBLICATIONS ® 4 Development of Cit Let us consider the following two circuits shown in figure, By KVL in figure (a), we get dil VaiR+L Et iR+ atc hit By KCL in figure (b), we get dv VG+OF +7 [vat The KVL and KCL of either figure are identical and this illustrates the principle of duality. Conversion of dual electrical circuit : Voltage Current Resistance Conductance Inductance Capacitance Open circuit Short circuit Ind. Voltage source Ind. Current source ‘DVS cpcs CDVS DCS Series Parallel Mesh Node KVL KCL Procedure to obtain dual network : 1. Put a dot per mean loop current i.e. in each mesh of the given network. These interval dots correspond to independent nodes in the dual network. 2. Put one reference dot for reference, outside the circuits. 3. Connect one element from an internal dot to adjoining or to the reference taking only one element at a time. Draw the dual between the same nodes in steps. 5. Magnitude of dual in step 4 will be same only the unit for example (5 2 will be 5B). 6. Clockwise current cutting at a node will reject as current in to the node of the dual.Hlectrie Circuits 4-8 GATE ACADEMY PUBLICATIO\, [1.5 Problem Based on Duality Question 7 / Obtain the dual of the circuit shown in. figure. ISH Sv 3F 10 8A Ans. We first locate nodes 1, 2, 3 and reference node 0 as shown in figure Joining node 1 and 2 we cross the 3F capacitor which is replaced by a 3H inductor. Joining node 2 and 3 we cross the 10 Qresistor which is replaced by 10 Uresistor. Joining node 2 and 0 we cross 15 H inductor which is replaced by 15 F capacitor. Joining node 1 and 0 we cross 5V, voltage source which is replaced by 5A current source and similarly last joining node 3 and 0 we cross 8A current source which is replaced by 8 V voltage source. The dual circuit is redrawn in figure. To verify the polarity of voltage source and direction of the current source we may apply mesh current j,, /, and /, (all in clock wise direction) in the original circuit. The 5V, voltage source produce positive mesh current j,so that its dual is a 5A current source directed from 0 to 1 also i, =-8A in fig has its dual V =-8V 1 3H 2 100 3 SA Question 8 State one limitation of duality. Find the dual of the network graphically and cleat state the steps involved. ICSVTU Dec 2013 (£2)!GATE ACADEMY PUBLICATIONS * 1-9 Development of Circuit Concepts wv) 2F 3A Limitation of duality : The dual networks are not equivalent networks of each other. Principle of duality only implies that circuit equations are of the same mathematical form and the dual networks behave similarly but with interchanged variables. We first locate nodes 1, 2, 3 and reference node 0) as shown in figure Joining node 1 and 2 we cross the 2F capacitor which is replaced by a 2H inductor. Joining node 2 and 3 we cross the 20Qresistor which is replaced by 20 Uresistor. Joining node 2 and 0 we cross 5 H inductor which is replaced by 5 F capacitor. Joining node 1 and 0 we cross 10 V, voltage source which is replaced by 10 A current source and similarly last joining node 3 and 0 we cross 3 A current source which is replaced by 3 V voltage source. The dual circuit is redrawn in figure. ‘To verify the polarity of voltage source and direction of the current source we may apply mesh current i,j, and 4 (all in clock wise direction) in the original circuit. ‘The 10 V, voltage source produce positive mesh current i,0 that its dual is a 10 A current source directed from 0 to 1 also /, = ~3A in figure has its dual V=~3V. Dual networkElectric Circuits 4-10 GATE ACADEMY PUBLICATIONg « Question 9 Draw the dual of the network shown in figure. ICSVTU Dec 2006; ‘ 1E G © bo i ie Ans. First step is to mark the node in each of the loop and a reference node outside the circuit and joining all the node until all the element are crossed. Question 10 Draw the dual of the network shown in figure. [CSVTU May 2011] 20Q 2FGATE ACADEMY PUBLICATIONS ® 1-11 Development of Circuit Concepts Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all node until all the element are crossed. Dual circuit : SF SOA 200 100 Question 11 Draw the dual of network shown in figure. [CSVTU Dec 2010] 10 AH 2A FF ‘Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all nodes until all the elements are crossed.Electric Circuits 4-12 GATE ACADEMY PUBLICATIONs, Dual circuit : 2v@) 1F>S 3H Question 12 Draw the dual of the network shown below. [CSVTU May 2014 (EEE)| 2H 4F @Oia TAt— 20 Sol. Mark the node in each of two loop and a reference node outside the circuit and joining all the nodes until all the elements are crossed Dual circuit : sa) 4HGATE ACADEMY PUBLICATIONS * 1-13 Development of Circuit Concepts Question 13 Draw the dual of the network shown in figure [CSVTU May 2010] 200 ax 10a © 20pF >= 500: 402 SH Ans. Mark the node in each of the loop and a reference node out side the circuit and joining all the nodes until all the elements are crossed. Dual circuit : 1 305 2 400 3 200 $ 20pH 100 =55F Question 14 Construct the dual of the circuit in figure. Ans. Make the node in each of the loop and a reference node outside the circuit and joining all the nodes until all the elements are crossed.GATE ACADEMY PUBLICAT Dual circuit : 6A S.C 10mH Question 15 Draw the dual of the network shown in figure. R, y. R, R, Ans. Mark the node in each of the loop and a refe rence node outside the circuit and joiti"é all nodes until alll the elements are crossed. oeGATE ACADEMY PUBLICATIONS ® 1-15 Development of Circuit Concepts ——— ee _Prrolopment of Cireutt Concerts Dual circuit : Question 16 For the circuit given below in figure find dual L Ry Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all node until all the elements are crossed. Dual circuit :GATE ACADEMY FUBLICATO,, * SS, [CSVTU May 2013, Dec 2914 (Ey the real form with construction Boing fg al to unity for the figure. Electric Circuits 11.6 Normalizing Factor Question 17 (a) What is normalizing factor? (b) Construct the dual of the network in . mesh to node with normalizing factor eq [CSVTU May 2005) Ans. Normalizing factor ; The normalizing factor is an arbitrary selected factor by whig, the numerical value of the dual network are related to two ohmic value in the original network by the relation. yg Where, g* = Therefore in order to maintain the Power invariance between the original and dual circuit. The current source in the dual circuit must be related by the relation, 1=80,= V, = - [By Ohm’s law]GATE ACADEMY PUBLICATIONS ® 4-17 Development of Circuit Concepts ———eeeerwq OT oeOeOrvorsvoaowvvmc Dual circuit : 250 Draw the dual of the given circuit. ICSVTU Dec 2013 (EEE)} (Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all node until all the elements are crossed. 2c0s6tA 38 5B! GATE ACADEMY PUBLIC, Ao 1 Question 19 [CSVTU May 2014 (gp, Draw the dual of the network given below: 2 ISA. ide circuit joi Ans. Mark the node in each of the loop and a reference node outsid| it and joining» node until all the elements are crossed. 6m ‘ z 2. sksp-43--g Dual network : Question 20 Draw the dual of the network shown in figure 10mHGATE ACADEMY PUBLICATION: 1-19 Development of Circuit Concepts Ans. Mark the node in each of the loop and a reference node out side the circuit and joining, all node until all elements are crossed. Dual network : 10m Question 21 Draw the exact dual of circuit given below including variables. Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all node until all the elements are crossed.41-20 GATE ACADEMY PUBLICATIONg » Dual network : Question 22 Draw the exact dual of the circuit shown in figure 2H 10e* v(4) Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all the node until all the elements are crossed.GATE ACADEMY PUBLICATIONS ® 1-24 Development of Circuit Concepts Dual network : Wea Question 23 Draw the dual network for the given network shown in figure 5H SF 20v() ICSVTU Dec 2015 (EE), 2012]Electric Circuits 1-22 GATE ACADEMY PUBLICAT{0) uit Ans. Mark the node in each of the loop and a reference node outside the circuit and joining all the node until all elements are crossed. S.3H ae Dual network : 20A(4) 18 Question 24 Draw the dual of the network shown in figure below, [CSVTU May 2015 (EE), Dec 2015 (EEE)] Sol. Make the node in each of the loop and a reference node outside the circuit and joining all node until all the elements are crossed.GATE ACADEMY PUBLICATIONS ® 1-23 Development of Circuit Concepts en ee Darelopment te ee eee Dual circuit : Question 25 Draw the dual network of network shown in figure. [CSVTU May 2015(EEE)] Sol. Mark the node in each of the loop and a reference node outside the circuit and joining all the nodes until all the elements are crossed.4czk GATE ACADEMY PUBLICATIOys, Question 26 Obtain the dual circuit for the given figure : ICSVTU May 2016(EE}] 5H 1ov( \. b be Sol. Mark the node in each of the loop and a reference node outside the circuit and joining all the node until all elements are crossed. we , Dual network : 1 2H 2 1/202 3 10a (Cf) @®3vGATE ACADEMY PUBLICATIONS ® 1-25 Development of Circuit Concepts Question 27 Find the duel of the network shown in figure below, [CSVTU May 2016(EEE)] 29 “p << Om 25Q Sol. Mark the node in each of the loop and a reference node outside circuit and joining all node until all the elements are crossed. 5unit 2 Network Solution & Reduction CONTENTS Solution of Network Equation of Determination Method of Network Reductions Nodal Analysis Mesh Analysis Super Node Super Mesh Star-Delta Transformation Superposition Theorem Reciprocity Theorem Thevenin’s Theorem Norton’s Theorem Maximum Power Transfer Theorem. Millman’s Theorem (Independent & Dependent Sources). a GATE ACADEMY PUBLICATION. Electine Circuits Joa Ohm's Law eS — Question 4 ‘ Give tion of Ohm’s law. What is Ohm's Law? Give the limita = Ans. [his law gives relationship between the potential difference (V), the current 0 and i es ei {a dc. circuit. Dr. Ohm in 1827 discovered a law called Ohm's Law. resistance (R) of a dic. © ook Law : The current flowing through the electric conductor is di proportional to the potential difference across the conductor and inverseiy proportional to the resistance of the conductor, provided the temperature Temaing constant, Mathematically, Voc => V =1R pul R Where | is the current flowing in amperes, the V is the voltage applied and Ris ty resistance of the conductor. Limitations of Ohm’s Law : The limitations of the Ohm’s law are, (Its not applicable to the nonlinear devices such as diodes, zener diodes, voltage regulators etc. (a) It does not hold good for non-metallic conductors such as silicon carbide etc, | 2.2 Kirehhoft's Law Question 2 Explain Kirchhoff’s law. Ans. In 1847, a German Physicist Kirchhoff formulated two fundamental laws of electricity. ‘These laws are of tremendous importance from network sim; Kirchhoff’s Current Law (KCL) : The law can be stated as, “The total current flowing towards a junction Point is equal to the total away from th junction point.” Another way to state the law is, “The algebraic sum Of all the current meetin, The word algebraic 7 ig at a junction (or node) point ts always zero. Ineans considering the signs of various currents ” = © (All the currents mee ting at a node) = 0GATE ACADEMY PUBLICATION: Network Solution and Reduction Sign convention : Currents flowing towards a junction point are assumed to Pe positive while currents flowing away from a junction point assumed to be negative In figure consider /,currents and [, are positive while J,,/,and J, are negative Applying KCL, J, -J,~1, + 1,~1, =0 or¥(Input currents) = £(Output currents) Kirchhoff’s Voltage Law (KVL): The law can be stated as, “In any network, the algebraic sum of the voltage drops across the circuit elements of any closed path (or loop or mesh) is equal to the algebraic sum of the e.m.f is in the path.“ In other words, “the algebraic sunt of all the branch voltages, around any closed path or closed loop is always zero” . 3 (All the emf's in a closed loop) = 5 (All the voltage drops in a closed loop) Consider a closed path of a complex network with various branch assumed as shown in the Figure. AIR, +B, 1Ry- RL, +E, =0 TRE, +1 Ry + LR, +hR,—E,=0 1.2.3 Problem Based on Kirchhoff's Law Question 3 Using Kirchhoff’s law find “V’ and magnitude of the unknown current j,i, and 4,Electric Circuits At node b from KCL 112 491004, GATE ACADEMY PUBL {CATO 4 ity 8 Again from Ohm's Law, 1 v v me Ad Aandi, A ee! 4 Then from equation (1) Me oF ied ea 4 Vv Ra2V 2 BD So, Fi 1.6840 (current flow from a to n). (8.42) anata (current flow from n to 6), . _ ~8.42 y= =-21A (current flow from ¢ ton). Question 4 Using Kirchhoff’s Law find V,. 5A 89 402 Sol. Labelling voltage and current on rest of the element in the Circuit as shown in figure. 5A 82 49 t At node ‘b’ applying KCL =i ti, i) Applying KVL at first loop 004%, +0, =0 en ii) And from Ohm’s Law, V, =5x8 = 40V So from equation (ii) Vp = 60-40 = 20GATE ACADEMY PUBLICATIONS © 2-5 Network Solution and Reduction 2A fig 10 Atnode’a’ applying KCL, Si, +g y, S=+42 rig 20=1,+8 ¥,=12V Applying KVL at central loop Vag +V,4V, =0 V, =Vo-¥, =20-12=8V Ans. ‘Question 5 Referring to figure | (a) Find =2Aand i,=0A (b) Find i, if i, =2A and i, =2i, (© Find iif i, =i, =i,. Sol. Applying KCL at center node S+i, +i, =3+i, wei (a) From equation (i) i, =5+i, Hi, -3 =5+2+0-3 =4A, (b) From equation (i) i, =34i,-5-i, =3+2-5-2i, i, +2i, =0= 34, =0 i,=0 (©) This situation is impossible, since i,and i,are in opposite direction. The only possible value (zero) is also disallowed as KCL is not satisfied. *. From equation (i) 543. Ans. ‘Question 6 Use Ohm’s law and Kirchhoff’s law on the cireuit of figure. Find ay, Gi) 1, (iy 4, (iv) Power provided by dependent source.ICSVTU May 213 raw the circuit as shown tof the element and redi ‘Sol. Labeling the current on res! i a (Potential difference between point ‘a’ and “b’ is ¥i-Wy-V,=0 V,=V,-V, =2-8=-6V (i) Now KCL at node ‘a’ is ; i,-1+6=1, +1, aan) And from figure n2aia V,=2V and ¥,=8V] Ans. 4,=1,41,4+1,-6 =-1.5+1, 41-6 4, =1,-65 (i) Now KCL at node ’b’ 4,41, +4V, = 1, “1S+1,+4(6)=4 1,=4+24415 =2954 Ast (iii) Put in equation (ii) 4, =295-65 =234 peost ACADEMY PUBLICATIONS. 2-7 Network Solution and Reductio (iv) Power provided by dependent source P=Vd =8x4V, =8x4x-6 =-192W Ane 7 | In the circuit of figure 29 Z + + v®© 2g y¥, 3K, 10 ¥, (a) Calculate ¥, if i =-3A () What voltage would need to replace the 5 V source to obtain V,=-6V if (a) From figure, V, =5V Applying KCL at node ‘b’ i, +3, =i, => -3+3x5=i, (b) Given y, =-6V and i, =0.5A Applying KCL at node y, i, =3V, +i, = i, =3¥, 405 > aa 40.5 =-2.167V ~6= 3, +05 => WV, =-65 0, = ¥, = voltage source so 5 V source is replace by ¥, SeGATE ACADEMY PUBLICATIONS « Klectne Question 8 (a) Use Kitchhott’s and Ohn , ein th current and voltage in ; (b) Calculate the power absorb by e tep procedure to evaluate all the isis by at roce’ ms Law in step P | rn ie tna dacideienwniiandl hun Har ag | ach of the sum is zero. Sol. (a) From the figure ¥=¥,=60V And V, =5i, = 5x3=15V Now applying KVL at center loop V,+¥,+V,=0 => -60+15+V, =0 V,=45V=/, Applying KCL at node, i, =i, +i, => i, =15+9=24A Applying KCL at node 2, i, i +i, =34+24=27A (b) Now power absorb by each element Power absorb at 5 Qresistor, P,, = V, xi, =45x9 =405 Ww Power absorb at 200 resistor, Py. = Vai = 60%3 = 180W Power absorb at 60 V voltage source, Fay =V,xi, = 60x(-27) =-1620W Power absorb at $i dependent voltage source, By, =V; xt, =15%24 = 360W Power absorb at 4 depenitent current source ¥, xi, =45x15=675W So total power absorb = Pay =OW 1620+ 405 +6754 180+360. Proved.GATS ACADEMY PUBLICATIONS © 2-9 Network Solution and Reduction 9 Find i, and i, in the circuit of figure [CSVTU May 2010] ‘Bol. Focusing our attention on the bottom left node we see that i =1A Focusing our attention on the top right node we see that i,=5A Note : Current is flow only in a closed path. Ans. Question 10 Calculate the current “I” through the battery for the network shown is, [CSVTU Dec 2013 (EE)] 19 19 19 10 E NV Sol. Fora wheat-stone bridge F therefore circuit reduce to Note : In wheat stone bridge no current flow through 2 . So, we can eliminate this. 19 19 WWW 19 19 WWW 2x2 -22 W190 Ra 242 Current through battery, I=——=2- Ans.r GATE ACADEMY PUBLICATION , 2-10 Seen of figure (CSVTU May 2012, 2008, Dee 2p, Find i, in the circuit co ; wm - =e md p% Sol. Labeling current on rest of the element in the circuit as shown in figure sin 4 2040 -——> we i & 4ma(} > 34 Assuming current in 5KQ resistor is #,, s0 from KCL i, =4x107 +i, And similarly in 20 kQ resistor is i, , 50 +34 = => i, =H, -34 = 24, Applying KVL in outer loop 5x10? xi, +2010" xi, =0 5x10? x(4x10" +i) +20%10? x(-24) =0 20+5x10"4, ~40x10°4 =0 ~35x10°4, =-20 20 sei O57 am Question 12 cane ga nen Faw by extol he seven cet cent 5Q m eb Eb ie Bol bang lage and ana ee Labeling voltage and current on rest of the element in the circuit as shown in gutFrom the figure V, =20V and J, =4A V, =1.5x1, =15%4=6V ehh) L==4A KVLat first loop, -V, +, +¥, =0 -20+6+V, =0 ¥,=14V 14 wolA KCLatnodea, 1, =1, +1, 121,-1,=4-1=3A V,=2x1, =2x3=6V KVL at center loop Vi+V,4¥,=0 V,=V,-V,=14-6=8V poten 824 44 KCLatnodeb, 1,=1,+1, I,=1,-1, =3-2=1A V,=2.5x1,=25x1=25V So KVL at last loop, -V, +¥, +; =0 V, =¥,-V, =8-25=55V 1=1,=1A Now power absorb by each element Power absorb by 4 A current source, P,, =, x1, =20x(-4)=-80W Power absorb by 1.5 resistor, Ran = "4, =6x4=24W Power absorb by 14Q resistor, Rig = "st =14x1=14W Power absorb by 2 resistor, Pin = 4x1, =6x3 =18W Power absorb by 42 resistor, Pig = Vs %/, =8x2=16W Power absorb by 2.5.2 resistor, Pog =Mxf, = 2.5x1=2.5W Power absorb by /, current source, B, =¥; x1, =5.5x1=5.5W @h=1)2-12 GATE ACADEMY PUBLICATIOng Electric Cireuite Question 13 VTL a ‘s | Determine ¥, and i in the circuit given below, [c Dec 2014 (Ep, at. ae gph | | | nv) Gav | 5. Sol. Current / as shown in figure, _, 40 2r, av (4) av Applying KVL, -12+4i+2V, -4+6/=0 From figure, =~6i From equation (i) and (ii), ~12+41+2x(-61)-4+67=0 -21=16 BA i So, V, =~61=-6x-8=48 V Ans 2.4 Method of Network Reduction Question 14 Explain voltage division rule in a series circuit with the help of suitable example. Ans. Consider a series circuit of two resistors R, and R, connected to source of V volts. R R, ©wes ‘ACADEMY PUBLICATIONS # 3 Network Solution and Reduction ‘As two resistors are connected in series, the current flowing through both the resisto"® jssame, ie. J. Then applying KVL, we get, V=IR+IR, R+R, ‘Total voltage applied is equal to the sum of voltage drops Vy and V,,across R,and R, respectively. v Vey = IR, = ‘nm = AR, Rok” R v x R+R, So in general, voltage drop across any resistor or combination of resistors in a series circuit is equal to the ratio of that resistance value to the total resistance Vege = x multiplied by the source voltage. Question 15 Find the range of R such that the voltage ¥, remains between 9 V and 9.5 V for the circuit shown. [CSVTU Dec 2013 (EE)} 20 ¢ Sol. (i) If voltage drop across Ris 9V I= [y=15-2=06A 10 =%-150 06 6 (ii) IE voltage drop across R is 9.5V R= dy =125-23.-1.25-095=03A =" Range for R from 15Q to 31.662 nge for onGATE ACADEMY PUBLICATIONS * Electric Circuits 2-14 ee Te fe voltage across the three resistances shown in the Fig using voltage division rule, fer EE wre il ne aR RA MO=10V Vea “que =1x20+20V Va ETE BM w=30V six volts. Current through Ris ,and 2, is J,, while total current drawn from source is J; =h+lae R+R, In general, the current in any branch is equal to the ratio of opposite branch resistance to the total resistance value and multiplied by the total current in the circuit. 18 Find the magnitudes of total current, current through R, and R,, if R,=10Q R, =20 Qand V~50 V. using current division rule. RR 10x20 Gog wh Ra RR, 10420 ¥, 754 Ry 667 As per current distribution in parallel circuit, ee Boe TSK 5A A 75x—0_ 2254 = “Rak 10+20 ane, Question 19 the series and connection of resistance in electric circuit. Ans. Series circuit : A series circuit is one in which several resistances are connected one after the other. Such connection is also called end to end connection or cascade connection. There is only one path for the flow of current. Consider the resistances shown in the fig.ACADEMY PUBLICATION, 2-16 GATE tric Cireutte ries. The combination is connecigy dR, are said to be in se The resistances RR, an rent flowing through all of them jg cun voltage V volts. Naturally the Bed far the decoraie ql : a aS eg. the chain of small lights same indicated as | amperes, hain purposes is good example of series combination. Let Vi%; and, be the voltages across the termi respectively Then, VaK th thy Now according to Ohm’s law, }, = /R,.¥, Current through all of them is same i.e. I, V = IR, +1R, + IR, = 1(R, + +R) inals of resistances RR, and 7, TRV, = IR Applying Ohm's law to overall circuit, = J Req Where, Req = equivalent resistance of the circuit. By comparison of equation (ii) and (iii), Req= R+R, +R ie. total or equivalent resistance of the series circuit is arithmetic sum of the resistances connected in series. Parallel circuit : The parallel circuit is one in which several resistances are connected across one another in such a way that one terminal of each is connected to form a junction point while the remaining ends are also joined to form another junction point. Consider a parallel circuit shown in the figure where voltage same current different : In the parallel connecti ection shown, the three resi ‘ resistances are ‘Snnected in parallel and combination is connected acros: etme Im parallel circuit current eee current drawn is say ‘T Second through R, and voltage ‘V’. passing throu sistance i ment posing th rough each resistance is different. Let tota! eee poe ney ‘currents are shown as f,/, and 1, While Devas ee e soon mone i ween cf, tra anda ee ee me ns fo —JEMY PUBLICATIONS. gS ACADEAT PUBLICATIONS *_2-17_Network Solution and Reducil® Now let us study current distribution. Apply Ohm's law to each resistance VaIRV=LR VY = KM, Taha +1-e R Applying ohms law to overall Ckt, v Req Comparing the two equations, aowtial Req RR, A. RR 20 Find Re for the circuit shown in figure. 4Q 10 Sol To get Req, we combine resistors in series and in parallel. The 62 and 392 resistor are in parallel. So their equivalent resistance is 6x3 oO at 62/32 63 The symbol |lis used to indicate a parallel combination. The 19 & 5Q resistor and2 & 2 resistor are in series hence their equivalent resistance is 19+50=62 and 20+20=42. 42 19 29 5a Ra 202 GATE ACADEMY PUBLICATIONs, ‘Thus the circuit is reduced to that in figure below, 4a —— oo 49 62 Ry 82 The 4Q resistor is now in parallel with the 62 resistor in figure their equivaleng resistance is 4x6 QY6Qs =249 sONQe TS 42 i, ES tn 8Q The three resistor are in series hence the e R, =442.448=1440 quivalent resistance for the circuit is Ans. Question 21 * Caleulate the equivalent resistance Rin the circuit in figure, a 10Q 19 in bol. The 39 and 62 resistor are in parallel because they are connected at the same nodes cand b. Hence their combined resistance is 3x6 30) 6Q= =22 3+6 Similarly the 12 and 4Q resistor are in parallel since they are connected at the same two node d and b. Hence 12040 =12%4 39 i244and Reduction 1g ACADEMY PUBLICATIONS. Network Solution ‘Also the 1 and 5Q resistor are in series hence their equivalent resistanc 1N+52=60 With these three combination we can replace the circuit in figure (a) wo, ing eis % > Fig, (a) In figure (a) 39 resistor in parallel with 6Q resistor 3x6 346 =22 Hence, 3Q1) 6Q= 20 20 bo 6 6 Fig. (b) This 20 equivalent resistor is now in series with the 19 resistor to give a combined resistance of 194+22=30 Thus we replace the circuit in figure (c) 100 bo Fig. (0 With that in figure (c) we combine the 20 and 30 resistor in parallel to get 2x3 243 =129 29| [32= 10 aon Fig. (d)r GATE ACADEMY PUBLICATIONS + Electric Cireuits ‘This 1.20 resistor in series with the 1022 resistor so that Question 22 Find the equivalent conductance Gx in the circuit in figure 5s & 68, 8s 12s L e Sol. The 8 s and 12. conductance are in parallel because they are connected to the same Ry =10+12=11.20 ine | node. toyto- 0.125 x 0.0833, =0,050=20s 8 12” 0.125+0.0833 38 a 65 208 The 5 s and 20 s conductance are in series, Since their equivalent conductance is L 1 1 o+to-1o- 5g A= Zands Q a 65 : ‘ea Again 6 s and 4s conductance are i node are in parallel because they are connected to the s#m* 11 _ 0.1660, Geq = = 049 = 9.166%0.25 _ Bs oes cong 701 2=10s ‘Ans Question 23 Use source and resistor combinati ; maton echique find V, and 4 in the given critTE ACADEMY PUBLICATIONS ® 2-24 i Network Solution and Reduction bol. To begin with the 10 and 15 resistor are in parallel because they are connected to the same node, 1 ayisa =10215 ~ 6 10415 Similarly 20Q and 5 resistor are in parallel because they are connected to the same node 20x5S x = =40. WAISQ=7 OS With these two combinations, we can replace the circuit in figure below 4a o 40 6a The 14.0 resistor in series with the 6 Q resistor so that 149+6Q=202 And 40 resistor in series with the 60 resistor so 404+6Q=100GATE ACADEMY PUBLIC, 2-22 BeitnGredis Hence circuit 6A Combine all current source into a single current source using its polarity. Value single current source is 4+6-1=9A 10Q-~+ i, Solving two resistor in parallel 200} tos, = 2010 20419 =5:9570 So V,= Sign cay ‘Ans. Consider a practical voltage Source shoy connected to the load having resistance in the Fig. having intemal vaisyg ACADEMY PUBLICATIONS © 2-23 Network Solution and Reduction Now we can replace voltage source by equivalent current source. The current delivered in above case by voltage source is Vv a i Ri+R, ® Consider an equivalent current source shown in the Fig. The total current is J, both the resistances will take current proportional to their values. From the current division in parallel circuit we can write, R, 1, =x wn ERR, ® vo R+R, a R, +R, Ryt+R, Let internal resistance be, R,, = R,, = R say. Then V=mR,=IR et ig Ry R Re If voltage source is converted in to current source fig (a), then current source I= V/Re With parallel internal resistance equal to Re. If current source is converted in to voltage source fig (b), then voltage source V = ] Ra, with series internal resistance equal to Rs. Note the directions of transformed sources, shown in the Fig. Now this 7, and must be same, so equating equation (i) and (ii),Blectric Circuits 2-24 GATE ACADEMY PUBLICATIONg, R, # ae — v "@) KR oVvG “@ % "Fig. (a) voltage source is converted to current source Ry a 4 f Ee oni & Vv Fig.(b) current source is converted to voltage source The direction of current of equivalent current source is always from negative © positive, intemal to the source. While converting current source to voltage source polarities of voltage is always as positive terminal at top of arrow and negative terminal at bottom of arrow as direction of current is from negative to positive internal to the source. This ensures that current flows from positive to negative terminal in the external circuit. Question 25 Find V,, using source transformation and by applying Kirchhof’s law to the circuit 20 20 40 ‘Sol. Using source conversion to 60 V voltage source and 2Q resistor 20 4Q AWA AWM oa 30a! 20 20 258 80 6ow sp ACADEMY PUBLICATIONS ¢ 2-26 20 4o 30A 1) (t)25a 80 Now converting 30 A current source into voltage source 12 20 4Q Solve series connection Now converting 30 V voltage source into current source 49. [0a wa(t) (f) 259 ; 80 Adding current source 4Q oa asa(f) 32 82 letwork Solution and Reduction2-26 GATE ACADEMY FUBLICATIOg Electric Circuits ‘i tage source ; ing 35 A current source into vo Again converting 35 30 —oa wosv(2) e ob Solve series connection and using KVL 79 105 v@) 1D en. -105+71 +81 =0=> 157 =105 fal aA, 15 Vig =8xI =8%7=56V Sol. “Converting § A and 1 A current source into voltage source and 3Y, dependent oo source in to pede voltage source using source transformation. 40 sv) ovGATE ACADEMY PUBLICATIONS. 2-27 Network Solution and Reduction Solve series connections, 79 262 jibe. SW, 1 Again converting 15 V voltage source into current source 26a he Solve parallel combination of resistance in circuit Tx7 _ 49 = 122-350 Be 747 «14 3 15 Converting 7 current source into voltage source 3.50 7sv(*) ‘The current I can now be found using KVL -7.5+ 3.51-S1V, +261 +21+9=0 1,5431.51-51V, =0 1.5431.51-51x(21) =0 (eV, =2/) 31.51 -102/ =-1.5=> -70.57 =-1.5 1S =a =21.28mA I-95 Ans.GATE ACADEMY io —__._- a ee mm WBestric Gircute Electric Question 27 Use source conversion techraque to ~ the load — Tin the circuit of figure. 30 1.6 V voltage source with a series resistance of 3Q has been converted in to equivaley, source with 30 resistance in parallel 20 10 1 2a(t) sn Zon 3A 30 ‘The two parallel resistance of 30 and 6. can be combined in to a single resistance 3x6 _18 =20 6346 9 2A current 20 10 2a(t) Ct) 2a 3a Again converting 2A current source into voltage source 2220 19 Solve series resistancesNetwork Solution and Reduction gan ACADEMY PUBLICATIONS Converting 4V voltage source into current source io rat) 40 aA 30 Now two current sources can be combine into a single 4A source lo yr 4A 49 30 Converting 4A current source into voltage source 40 10 1v(t) 30 ‘The current I can be found using KVL, -16+4/+11+3/=0= 87=16 => 7=2A Ans. Question 28 Use source transformation and resistance combination to simplify the network untill ‘only two elements remain in the left of terminal a and b. 600 102 120¢0s400rv(~) ws Converting voltage source into current source 10Q 502 2cos400¢A(f)) asGATE ACADEMY PUBLICATION, 120Q can be combined into a single Tesistang Electric Circuits “The two parallel resistance of 6002 and 60x120 _ 7200 _ so = 604120 780° 100 a | ’ Converting current source into voltage source 402 +k Solve series combination of 40 and 102 et ~t_F Again converting voltage source into current source 1.608400" A, 502 500 5 > The two parallel resistances of 50Q can be combined in to single resistance 50x50 _ 2500 =a = = 25 fa 59450" 100 1 Aesems(t) 250aT. ACADEMY, PUBLICATIONS © 2-31 a = Determine J, using source transformation to first simplify the circuit of figure 33k0 |. * ~ a 20mA Network Solution and Reduction. 1 mA current source with parallel resistance of 47kQ and 20 mA current source in ue all resistance of 10k@ has been converted to equivalent voltage source 47k. ‘The current J, can be found using KVL 47+ (47x10°)/, - 41, +(13.3x10")/, +200 =0 -247 =—_ 7 _. --4.096ma Ans. 4 (60.3x10°)—4 Question 30 Determine the power dissipated by the IM resistor using source transformation to first simplify the circuit shown in figure. 1MQ. 200kQ pt : = Ga Farce with a parallel of 100KS2 resistance has been converted into quivalent voltage source. Ma 200k © 100k, 9vG)GATE ACADEMY. PUBLICAn - Electric Circuits itage source, tor and vol Adding 200k and mm 300k 4702 se¥ ov 36 V voltage source with a series of 300K0 resistance has been convene equivalent current source 1MQ ani ov © 470KQ $300k 12pA The two parallel resistance of 470kQ and 300kQcan be combined into six resistance. _ 470300 ‘= °470+300 IMQ 7 kb Again converting current source into ia equivalent voltage source => 1 R =183.1kQ 183.1kQ ov(- + 2.197V, Current I can be found using KVL 941x107 4183,1 13-5750 ya, *10'1~2.197 <9 So power dissipated by the IMO resistop : is Fg = ER = 5.750194): xAxto! e =33.06nwAn is |5Nodal Analysts —_—_ ____—— Explain Nodal analysis. Give the procedure for writing Nodal equation. Nodal analysis provide a general procedure for analyzing circuits showing node voltages as the circuit variables. Choosing node voltages instead of element voltages as circuit variables is convenient and reduces the number of equations one must solve simultaneously. In nodal analysis, we are interested in finding the node voltages. Given a circuit with n nodes without voltage source, the nodal analysis of the involves taking the following procedure : 1. Assume the voltages of the different independent nodes. 2. Write the equations for each node as per Kirchhoff’s current law. 3. Solve the equations to get the node voltages. 4 Calculate the branch currents from the values of node voltages. |26 Problem Based on Nodal Analysis Question 32 For the circuit in figure find the currents through the resistances R, and R,. Roc, ai CUM de es ‘Ans: 80. Tet, Mand N= independent nodes and V, & V,, = voltages of nodes L and M with Tespect to node N. The nodal equations for the node L are + 4-5 UM n20 3 5 10 ¥,-50 VV M0 3 510 2.5V,-Py =50 The nodal equation for the node M are: Wu - Fun uo 5 5 10 ¥y-20 Mua uno 3 5 10 V,+25Vy =20 @ (iiGATE ACADEMY PUBLICATION,, 2-34 Electric Circuits Solving () and we By, =19.050 / 22 ¥, 276 276A Current through, 8 = 79 “Jo Vou 19-95 1 9058 Ang Current through: 8. = 79-79 ee tind branch currents of the circuit of figure by using nodal analysis. Sol. Let, A & B are independent nodes and V, and V, = voltages of nodes A and B wit Tespect to reference node. ‘The nodal equation for the nodes A are: W,-V,=-3 a) The nodal equations for the node B are : OSV, +4, =5 vee i) Solving (i) and (ii), we get, V, =1.334V, V, =5,667V Current through, R, = =0.777A Current through, R, = 47 %s +5) _1 33-5.667+5 9334 h ; =e Current through, &, = £—"s _10-5.667 _1 955.4 4GATE ACADEMY PUBLICATIONS © wigs CI ae — =0445A ¥, Current through, R, ws =1417A on ‘question 34 For the single node pair circuit find i,j, and i, $ol. In the circuit has one non-reference node and one reference node as shown in figure. we assign voltage to the non-reference node Nodal equations at node V, v v 5.64+—-0.V,+—+2=0 56+75 nts And form figure, V, =V So, 1 -100.84+V -1.8V +2V +36=0 1.2V =64.8=> ya Sb -say v ava is 18 OV, =-0.1K54=-54A ¥ 4 6Are ACADEMY PUBLICATIONS GA" Question 35 Find the power absorb > Ref node i In above circuit one non-reference and one reference node as shown and roté equations at node V is 181+ Fo sag And from igure = Vv “aH et S<0 3.27 +47 41509 <9 aR $80 7-8 orn zy ome 08s, , current sours = OB) xy = “Otay 277° SORT asi. Power ac 259 resistor 25 Psa =i xv oY =Hibama “ 3 =3.085kw Power absorb by 100 resistoy Fone “hg XV he. 2732777 Power absorb by 5 A current Source 100 = 771.2kw By =V x5 “71765 01 se5hy, An= = Find : [CSVTU May 2015 (EEE)] (a) i b)% (9) Power at 5 A source in given figure. 5A Gol. In above circuit two non-reference nodes in figure we assign voltage to the two non- reference nodes as shown in figure Atnode 1: arta, +5=0 La a) So equation is, art A iseo From figure, 144 +97, -16V, +360=0 9V, -16V, =—216 a) Atnode2; 4-742-s=0 3. («9 108 BY, ~63+V, -45=0 = AV, = 1089 Fy == 27 Put in equation (i), 9, 16x27 =-216 > 9, =-216+ 432 = 216 > V, =78- nav fa) ) y=K=24V (© Power at 5 A source, By, =(4i-h)*5 = (27-24) x5 =15W Ans.gaa GATE ACADEMY PUBLICATION, Question 37 / For the circuit find 4,4, and 4- 4, i, Sol. First redraw the circuit after labeling the point A, B, C and D as shown in figure we also define a current i, following through the 10 Q resistor In above circuit one non-reference node V is shown. Nodal equations at Vis, wnat 4V +10V -207 +250+V =0 SV =-250 So, v=s0V And 4s =-05A 100 100 ‘The remaining two currents i, and j, are found by using KCL at node A i, =i, +0.2V; + ig ~-2+0ax80-(=7) =-2+10-5=34 Similarly at node D, i, = iy -2.5-+4, 7 25-a8 =-5-25-05=-8A astGATE ACADEMY PUBLICATIONS © Network Solution and Reduction Question 38 Use nodal analysis to find V, in the circuit shown in figure. ae 100.0 ©) 250 Sol. In the figure has three non-reference node as shown, we assign voltage to the three non reference node 202 Coxe ¥, % 1002 ©) 259 From figure V, =V, Atnode 1: Atnode 2: Atnode 3: KW geo 100° 50 20 V, +2¥,-2¥, +5h -5%, ~400=0 BY, -2V, -5¥, = 400 yh Ka, oe 221 44-104 24-250 50 40 40, ~40¥, +8000 ~20000+ 50%, ~507, ~4000 = 0 4O¥, +907, - SOV, = 16000 =~ (ii) WK Wh hoo 7 a 25 10007, -1000%, +5007, ~S00¥, +40000-+8007, = 0 1000, -$007, +23007, = ~40000 eu (ii)ian te 2-40 GATE ACADEMY PUBLICATION, Sol. The circuit in this question has three non-reference nodes, we assign voltages @ Ue three nodes as shown in figure Atnode 1: -12+2V,-20, +¥, 34,-W,-V,=12 Fren Atnode 2 : 44-6 Hug 2 8 4 4V, - AV, +V, -V, +2¥, “40, +7V,-¥, =0 2 Gi) Atnode3: From figure, So ¥,-V, +2¥, -2¥, +BY, -8Y, =0 7 6, -9V, +3V, =0 ole? From equations (i), (ii) and (iii) VW =48V,1,=24V,Network Solution and Reduction For the circuit of figure (a) use nodal ant anal power absorb by the 62) ree na7S#10 determine Yan ¥ (Compute he ol. In the circuit has 4 non-reference nodes we assign voltages of the non- = shown in figure, WA From figure, ¥,=240V, ¥,=60V w-wh 2+ 10= q ere Atnodeb : 2, -W, +¥,-V,+60=0 -2¥,, +34, -V, =-60 =2x240+3¥, -V, = -60 =) Atnode ¢: 2 30 360V, -360¥, +1807, -180V, + 72V, = 3607, +612¥, -180%60=0 360¥, +612¥, = 10800 = From equation (i) and (ii) y, =181.46V, V, =124397 a ¥=V,-% = 240-181.46=5854V V,=V,-Vs 2124.39- 60 = 64.39V 2 % hanhcase (Z| x6 =54283W Kee2-48 GATE ACADEMY PUBLICAT(). Question 44 i Method own in figure by nodal rnd the current in each branch for the network sl ree “ , 82h 30 1a +)10V sa(t) sa 6G) i to the non-ref In above circuit has three non-reference nodes, we assign. voltages non-referen, Sol. node as shown in figure x oe x sa(t) wa 50 ev From figure, ¥, =10V Atnode 1: 51h = 150 + 3¥; +10F; -107, = 13F, -10%, =150 Keo mn) Atnode2: nae yy th ° iN amesK su -SV, + 2, -15x10=0 evel SV, +23V, =150 a From equation (i) and (ii) W=19.88V, , =10843y 19.88 10” 19 = 1 988A 4h; _19,88— 1, =24 _19.88-10.843 seaEe = twork Solution and Reduction 42 Using nodal analysis method, find the voltage across 10 Q resistance in the network in figure. | = [CSVTU May 2011] | Sol In the circuit has two nor-reference nodes, we assi : node as shown in figure. assign voltages to the non-reference heeded, «da Tey AOL 10 20 W- Fromfigue = 1+ 160-4 4Y, +2V, +1201, +, -F, =0 160+ 4Y; + 2K, +120(0.025/, ~0.0257,)+¥, - Ya =0 -160+4Y, + 2K, +34, 37, +h -V = 0 10¥, -4¥, =160 == (i) Atrode2:; B=h, 40 ¥,-V, +2¥,-200=0 V+3¥, =200 a) From equation () and (i) ¥,=49.23V, V, =83.07V Voltage across 10.0 resistor is; = 49-23 V Aaa: “tia Use nodal analysis technique tofind ¥ and é, inthe irouit of Reure.Electric Circuits aes GATE ACADEMY PUBLICAn,,, Sol. In the circuit has 4 non-reference nodes, we assign voltages to the non-referenae» as shown in figure, 502 4 h 10V, +¥,-¥, =0 vel HK Kah Moh 30 50 127, -100 He-¥,) .2(¥4—V,)-100 =0. 2¥, -0.2¥, -100 thy nS +4 oonory, ~02¥, -100)=0 1500¥, ~1500¥, +2250V, ~22S0¥, +1350¥, -13507, ~1350(0.2¥, ~0.2¥, -100) =0 ~1500¥, +5100¥, ~2250v, -1350¥, = 2707, ~270¥, 135000 ~1500¥, + 5100¥, +270¥, ~1350¥, ~2707, = ~135000 + 2280x100 , ~1500V, +53707, -16207, = 90,000 niin ~0.02F, =0~0.W, -08V, =0 From equations (i), (ii) and (iii) a4 V, =-1.886V,V, =15.09V,V, =-3.773V ¥, =0.2¥, -0.2¥, 100 =0.2x-3.773—-0.2x15.09-100 =-103.77V 3.773-15.09 _ YN. 50 50 Find K such that 7, is zero using nodal analysis. LA Assuming two node voltages ¥;, and - KCL at node 1, From figure, And Y-10 WK yao 25 2.5V, -25+ 2, -2%, +5=0 45V, -2¥, = 20 ¥,=10-K ¥, = KV, V, = K(W0-h) ¥, =10K-KV, V, =O (given) V, =10K soni)GATE ACADEMY PUBLICATION, 2-46 Electric Circuits : Put in equation Os ax10K'=20 -20K =20 e Ke-! Question 45 analysis to determine Vj and power being supplied by the d = Use t source a circuit shown in figure. Ics’ fom a Ny VTU ° 50.2 ww ere 200 300 % Qn ba

k= = 3. 25 [-%=6V] =f) CY =k) +» (ii) Ans.2-48 GATE ACADEMY PUBLICATIOy,, Blectnic Circuit ATE ACADEMY PUBLICATION je Cirewita Question 47 The power loss in 1 — source using nodal method. NTU Dec x stor of figure is 25 watt; find the value of k in the depend. 0 resis! Sol. From figure,/, =10V. Given : Power loss in 1.9 resistor =25 W RR=25= fx1=25— B =25— i =5A felis Sv Atnode 1: oth Bont 12424, +¥, - 12+2V, +V,-104kxS = W,+5k=22=> 3x545k=22 [-V, =10V &i, =54] “V, =SV) Sk=22-15=> K= Ans. Question 48 Using. Nodal analysis find the value of « for the circuit shown, the value of power los in 10 resistor is 9 watt, ICSVTU Dec 20031 2 @)10ov From figure, V, =10V Given : power loss in 1.9 resistor is 9 watt RR=9= fx1=9> 2-95 A=3A x1=3V Atnode 1: seh total 1042Y, +7, -¥, bad, = 10+2x3+3-104+ax3=0 ia =3V,¥, =10V&/,=34) tents a=taa67 astqatbaCADEMY PUBLICATIONS ¢ 2-49 Network Solution and Reduction 49 Find i,,é, and the value of dependent source as shown in figure. Gol. In the circuit has one non reference node we assign voltage to the non reference node v i . os fog : “ 4 Ref node atnodev: 2-24 4200 4 3 12 v From figure, = oon . vow y So equation become, —+—+—+20 = an av +2V +4 424040 =0 10v =- 2405 y= -- uy So jm ae? 2 i, =-2j =-2x2=-4A Value of dependent source = 2i = 2x2=4A Ans. Find the current i, using nodal method. ICSVTU May 2013] 122-60 GATE ACADEMY PUBLICANIO, cuit and in given circuit has three non-reference nodes, We agg Sol. Redraw the above circuit and in . voltages to the non-reference node, 42 => Ref node From figure, = 20V, ¥, =2.5i, And 1 4 V, V,-V, V;i-V, a: 4,4-h 2-54 At node rua 3 bi 2 OF, +8¥, -8V, +12¥, -127; =0 ~12V, -8Y, +26, =0 ~12x20-8x2.5i, +267; =0 [:V, =20V,Y, =251) 204, +267, =240=> 20x 4267, =240 57, +267, = 240 => V, = 40. 74V 31 So Ass Question 54 Find the power absorbed by each élement for the circuit shown. ICSVTU Dec 2013 (EE om Qa 2o De | Sol. Redraw the circuit, . Qa BA(4NB ACADEMY PUBLICATIONS 2-51 Network Solution and Reduction Using nodal analysis, Fv Lanai Cinta tite=o v 2 me 1g 2tlt3==15 =15x12 y-215e12_ ayy Power absorbed by 49 resistor = Power absorbed by 7A source=- 30x7 =~ 210W Power absorbed by 8 A source=~30x8 =-240W seen vesign sho at7 Asrt Asuna ee: pores [Question | ere fhe pow dcawcae oy the EA came vous roe Chore in yume by ng the nodal method. ICSVTU Dee 2015(EB)] Sol, in above circuit has three non-reference node, we assign voltage to We ee non-reference Rode as shown in figure, 10V A x & 2aq@)2-52 GATE ACADEMY PUBLICA, . “ m super node. So super node equation is, Node 1 and node 2 for 30+5V, -5V, +3V; + 15V, -15¥, -75=0 SV, +18V, -20¥, = 45 “ KVL at super node, ¥,-V,=10 (i) KCL at node 3, 2V, - 2, +6V, -6V, +3, =0 -2V, -6¥, +11%, =0 From equation (i), (ii) and (iii), V, =13.71V, V, =3,71V, V, =4.51V Power delivered by the 5 A current source is, By =V,x5=3.71x5 =18.55W i ICSVTU May 2015 (EEE), 2015,201 {CSVTU Decl! reference nodes then it is form 4Q Re Inabove example node? and 3 form gM 4 Super ah Node, KCL at super node: 2%, etek ¥, “eee wll‘And KVL at super node, V,-V,-5=0 K-v=5 (ii) From above two equations we obtain the node voltages. 54 Find ¥,,¥, and V, by applying super node method. [CSVTU Dec 2011] te 2 AAW sv ® “ww ——_@)__s} ® tq 3 4A <2 a Sel. In the circuit has three non reference node we assign voltage to the non reference node oi sv Atnode 1; 44+ (Vj -Vy)x3+(V, -Vy)x2=0 —44+.3V, -3V, +2V, -2V, =0 51, -3V, -2¥, =4 Node 2 and node 3 form a super node. So KCL at super node is Wy -B4 Vy x54 4h, V)x2=0 3V, - 3K, +50, +V, +2¥,-2Y, =0 -SV, +8V, +3¥, =0 ass Gf) KVL at super node ¥,-V,+5=0 V,-K=-5 ~~ (ii) Solving equations (i), (ii) and (iii) V, =2.633V,V, =-0.166 VV, = 4.833V Ans,in on the Question 58 a With the help of nodal anal¥='s dissipated in the 2.5 0 resistor. it "4 i eee Sol. Grauit has three non-reference nodes, we assign voltages to the non: In above circuit node. Wy, sa) => Refnode From figure, f= Y,and node 1 and node 3 forma super node So, super node equation is, V-w SA 2 *25*8=0 “BH25K~257, 497 cay 2g 25), -287, 49, = 14 KVL at super node K-V-08v, =0 Vi -K-08r, =9 ¥,-O.8Y,-V,=9GATE ACADEMY PUBLICATIONS © 2-55 Network Solution and Reduction Atnode 2: Bok -8=0 Sh, 3h, +2¥, -80=0 From equations (i), (ii) and (iii) = 2027V,¥, = 25.90V,V, =-0.454V (a) So, (b) Power dissipated i in the 2.5 Q resistor 2 Psa =135%25 -(&) x25 ) x2.5=82.4mW Ans. Question 56 Use nodal analysis to find V, in the circuit shown in figure. Sol. We choose the centre node for our common terminal or reference node since it is connected to the largest number of branches and the left node ‘a’, the upper node ‘b’ the right node ‘c’ and bottom node ‘d' as shown in figure. From figure, ¥, = 150V and V,=—V¥,56 eso so super node equation Node a and node b form supe ¥, te be -500 20 10 i +2007, ~ 200, -12500=0 ~12500=0 125¥, +250¥, -250%, 375¥, +200¥, -200¥, ~ 250%, 200x150 ~-250V, 12500 = 0 P 3750, +200¥, — 375, +200%, ~250¥, = 42500 KVL at super node, ¥, -¥, +100=0 =, =-100 Ke A 3 £+10=0 Atnode d 7 ;: 25V, -25V,, +10¥, +2500 = 0 ~25V, +35¥, = -2500 From equations (ji), (i) and (iii) V, =11.71V,, =111,71V,V, =-63.06V Vv, =150V] GATE ACADEMY PUBLICATION, And V,=-V, =63.06V Ans, Question 57 ~~] For the circuit in figure find the node voltages. aw | 190 | 7S Refnode Sol. Node 1 and node 2 forms super node. So super node equation is at. he +7 Shao 2 4 10 -1600+4007; + 80V; -807, + 200V, +5600+80V, -80¥, =0 400¥; + 2007, = -4000 aU) KVL at super node, /, -V, +2=0 Wi-=-2 we From equation (i) and (ii), Ans: V, =-7.33V,V, =-5.33VSol. Network Solution and Reduction nodal analysis and find J, and¥,. [CSVTUMay 2016(6EB)] v,=-4V 3 1,-1A¢ There are four nodes in the circuit, node four is taken as reference node. v,=-4V ¥, ¥, i" ¥, =10V Node 1 and 3 form a super node, now applying KVL we have, ¥ Sane 2: Also, V,4V,, -% =Oor Fr-4-% =0 W-Ka4 on 1ah-V-4 Also, 21-2 ol, hs , 7 Da (iv) ° V, =—10¥ (given) And ¥,=%-M, =, +10 sesn (¥) Or 51, =V, +20 From equation (iv), ¥, 1-242 3 S21) ay, 200" 10-5V, = 27, +40 Also, _sv,-4V, = 60 coast)2-58 GATE ACADEMY PUBLICATION, Blectric Circuits Solving equation (ii) and (vi), we have -SV,-4¥, = 60 44 And = 80 10 So, V,=V,-V, sere Glay From equation (ii), 44 80, 20 Vi-V,-4=-—-— 4a And T=K-h, gy Question 59 Find the magnitude of Y, and the current supplied by it. Assume loss in 2.0 resistor as 18 watts. ICSVTU May 2014 (EE) given by afi) iNetwork Solution and Reduction . (iii) But in the right most loop, V, is given by V, =i(5+2)=7i=21V Putting the value of V, in (iii), (2x- she 21> Br =2146= 27 ee 60 =8.55V ‘The current supplied by V, is i, and given by 1.3 aS “ =1.35A Ans. In above circuit three non-reference node in figure we assign voltage to the two non- reference nodes as shown in figure, From figure, V, = 10, ¥, = ¥, and ot A i case (i) Applying KCL at node b, -10 %,,, 4-u-4 a 7g ‘ [> ¥. =10] 2, -20+5V, +10 +107, -10¥, -40=0 1, -10¥, =50 4 ~ (ii)Blectric Circuits From equation ¢i) and (i) 17h, -10% vy, = 50 GATE ACADEMY PUBLICATO4 Sol, Atnode1: 2, - “i 03, -2¥, + V,-V)=0 KOS+ j)-V,2+ j)=0 Atnode2; J —j0.5V, + jV, -V,)- 2.230" = = jl, + f0.SV, = 2230" Rearranging the two equation in matrix form 5+) -2+iN][K]_[ ° cy jos \|¥, | [2230° 0 -@+ sl) jecso’ _ +05 | _ x = V, =2.46.2130.62° V jose Y= 1.822- cam) =A_20¢ = PAPAL) «1252161889 ast AGATE ACADEMY PUBLICATIONS ¢ 2-61 Network Solution and Reduction ‘question 62 Using nodal analysis find the node voltage ¥, and Y, in figure below. hy { a 2 Ora a = Yaar Sol. At nodel: —/MW, + fV, +24, -2¥, =0 V(2-fl)-V,2-j4)=0 Atnode2: 244% ys 730" 20 B -A — jl, + j3V, — j3¥, +9230° =0 ~j3V, + j2¥, =-9230° Rearranging the two equation in matrix form @-M ~2-s4)|[h |_| -73 jr ¥, | [-9230° | 0 -@-54) |-9230"j2 | 9230" x(-2+ j4) a a *Ljx(-2+ 74)-UGDx(2-/) HE OY Ans. . a 0 _L-3 -9.230"| = 2-9.230°)x(2= MD) _ rT Y= 7 SpE T8TV Ans. Question 63 Write two node equation for the network shown in figure in matrix form and hence find current through the 4 © resistance. I[CSVTU May 2007]GATE ACADEMY PUBLICATION y y-v-020 na Atnodet: “ayy 5° 5007, 1-100") +24 J8) N04 H ~E)*O+ J9)x5=0 = 15004 -% ie 0, +) 4/800 j20¥, +500, +10%, -10V, + j25V, ~ j25V, =0 =j80¥, + 1507, : (60~ j45)¥, - (10+ 525) + 50%, = ~7500 =) y,-v,+20248° ah 9 Atnode2: #5 Fg —j60V, -V, + 20245?) + V, x j8x—f10+(V, -K) x j8x6 =0 —j60V, + j60V, +12002—45° +80, + 7487, — /48, =0 —j48V; +V,(80— j12) + j60V, = -12002-45° vee (Hi) K B-h-20245* ai +1020? - 4 38 (2+ 75) V,(2+ j5)x j8+(V, -V, 20245") x(2-+ j5) x4 +(V,-V, +1020°)x4x j8=0 Atnote 3: J16V, — 40V, + BV, -8V, -160.245° +j20V, - j20V, -400.2135° + j32V, — 732K; + j320=0 —f3W, -V,(B+ j20) +V, (-32-+ j68) = 4002135" — 7320+160245° —J32V, ~ (8+ j20V, +(-32 + 68)V, = 185.942155.88" The node equation in matrix form, (60-745) -(10+j25) j50 YTV, 7500 (- 48) (80-12) JO ¥, |=| -12002- 45° (-f32) -@+j20) (-32 + j68)||¥, | |185.94.2155.88° Solving equations (i), (ii) and (iii) ¥, =25702-171.40V Hence current through the 422 resistance is, 25702 -171.40° 7 = 64252-1711. 40° A Ans. Find the current through the 4092 resistor for the network shown in below. ICSVTU May 2014 FED"E ACADEMY PUBLICATIONS © 30a 109 ~ 720 fo 400 1020°(~) (S200 Atnode 1, W-1020° %,-2020° | h ep st (30-720) (10+ j20) 40 [F.a0+ j20)x40]-[1020" xao+ J20)x40] +[¥, 0-20) x 40] ~[2020° x(30- j20)x40]+K,[@0-j20)x (10+ j20)] =0 4007, + j800¥, ~4900-— j8000-+1200V, ~ j800Y, ~24000 + j16000+7007, + j400¥, = 0 894.42.263.43xV, -8944.27263.43 + 1442.22. ~33.69F, 28844412 -33,69 + 806 225229.7447; =0 ¥, [804.42.263.43-+1442.222 ~33.69-+806.225.229.744] = 8944.27 £63.43 + 28844.41 2-33.69 V, «(2334.589.86) = 29121.202-15.94 ¥,=12.4732-25.80°V So, current through 400 resistor ye aTsé—2580 =031182-25.80° A lots 40 Question 65 Calculate the power delivered by the source in the circuit shown in figure. ICSVTU Dec 2013(EER))GATE ACADEMY PUBLICATION, i sn nee setrie Cireuite eS 20 Soh Atnodel: (V-K/l4+K+%-K)2-15.720" =0 V, 3+ jl)- JV; 2%, = 15.720" =) Atnode2: — (-Rsl+¥,x2+y-K)2=0 ; {IV +¥,(2+ j3)- jh, =0 won (i) Atnode3: — %-K)2+G-h)2+h0-M=0 -2V, ~ j2V,+%3+)=0 = il) “Arranging in matrix form G+ -A 27 [KH] [15720° -f 24j3 -j2||%]=| 0 2 =p seal ly 0 lis.7Z0° -fl 2 0 2p 2 al 8/2 3+ Jl] 15.720" x(7+ fll) _ 204.70257.52" ‘ A “13+ j2@ ~~ 31.78.2658" ¥, = 6.4412-8.33°V Power absorb by the source, P=V, x cos = 100.06 watt Ans. 2.8 Mesh Analysis ‘Question 66 Explain Mesh analysis, Give the procedure for writing mesh equation. Mesh analysis Provides another general procedure for analyzing circuits, using med currents as the circuit variables. Using mesh currents instead of element current: eta variable are convenient and reduce the number of equations that must tale Simultaneously. Recall that a loop is a closed path with no node passed en Once. A mesh is a loop that does not contain any another loop within it. No analysis applies KCL to find unknown volta iven ci i analy? applies KVL tofind unknown currents, Bn eae while mesh Ans.GATE ACADEMY PUBLICATIONS ® 2 GATEACADEMY FUBLICATIONS® _2-@5__Network Solution and Redustion The procedure for writing the equations is as follows : 1. Assume the smaller number of mesh currents so that at least one mesh current links every elements. As a matter of convenience, all mesh currents are assumed to have a clockwise direction or anticlockwise direction. The number of mesh currents are equal to the number of meshes in the circuit. For each mesh write down the Kirchhoff’s voltage law equation. Where more than. one mesh current flows through an element, the algebraic sum of currents should be used. The algebraic sum of mesh currents may be sum or the difference of the flowing the element depending on the direction of mesh currents. 4, Solve the above equations and from the mesh currents find the branch currents. [zs Problem Based on Mesh Analysis Sol. Question 67 Determine the currents through various resistors of the circuit in figure. Using the concept of mesh currents. 4 L 2 M 62 N suv 1) $29 4)—Rv > Since there are two meshes, let the loop currents be as shown. Applying Kirchhoff’s law for loop 1, we get 24441, +2(1,-1,)=0 61,21, =24 wei) For loop 2, we get 1242, -1,)+6f, =0 21, +8, =-12 soe (il) Solving (i) and (ii), we get ueBa bo 42 Hence current through 49 resistor =< 7A (from L to M). Ans.TEAC cMY . ’ GATE ACADES UBC Electric Circuits Question 68 Use mesh analysis to find current fo 242 Sol. We apply KVL to the three meshes. Forloop1: -24+10(i,~i,)+12( -4) =0 11, ~5i, ~6i, =12 onl Forloop2: 24H, +4(4, -4,) +104, -,) = 0 ~Si, +19, -2i, =0 Forloop3: 41, +12(i, -i,) +4(~i.) =0 But from figure J,~(~1,) MH) +12, ~§) 444-1.) = 0 —h-i, +21, =0 From equations (i) (ii) and (iii) A= 225Ash = 075A,1 =15A ll Sol. Bottom two meshes, mesh] > meshes we define a dodgy q tt! Sh 2 ang Ss wise current ag shone Coen is mesh 3 in each of th in figure,ss ACAD CATIONS © 2-67 Network Solution and Reduction 29 From figure, At loop 1: At loop 2: Mi, 4) -Si+1i, =0 But from figure, i= i, ~i, So that 1G, 4) 5G -i) +4, = 0 Mb, +2)-5(-2-1,) +, =0 7i, +12=0 gees Atloop 3: 2i, +5i+1(,-i)=0 24, +5(i, -i,) + 4) =0 2, +5(-241.71)+(, +2) =0 34, +0.55=0 5-2-0 Magnitude of the current dependent source $1=5(,-i,) = 5241.7) =-1.45V Ans. Current in the 20 resistor is j, =~0.1834. Swestion 70 Determine the mesh current j, and i, in the circuit shown in below figure.