Professional Documents
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EN199902
EN199902
EN199902
£ 2.85
PC TOPICS :
digital audio formats
COM port analyser
printer port extension
microcontrollers’ survey
hhigh-power
igh-power AAFF aamplifier
mplifier
uup
p ttoo 22000
000 W iinto
nto 4 oohm
hm
datalogger
datalogg er
for DMM
using the
the
100-MHz SX
controller
controller
To many c omputer users, async hronous serial c om-
munic ation will always remain something of a mys-
tery. Does the link work or not? Do all the peripherals
have the same settings, and does the right signal
arrive on the right pin? These questions are easily
answered by Com-Watc h® . The system c onsists of an
advanc ed DOS program and a simple passive
adaptor.
COM -Wa t ch ®
p r o b le m sle u t h f o r se r ia l p o r t s
System requirements
IBM PC XT, AT or better
MS-DOS 3.1 or later
Monoc hrome or c olour videoc ard
Minimum 256 kBytes memory free
Floppy disk drive (3.5 in.)
Min. two free serial ports
(If only one port is available, one-way data traf-
fic may be monitored)
SET CHANn IDENT = string WHEN DATA_EVENT [Chann] string [c ontrol] [,c ommand]
Defines a n id entific a tion string for a c ha nnel. Pa ra meter n is Ind ic a tes whic h a c tion ha s to b e ta ken if a sp ec ific situa tion
either 1 or 2. Only the first 10 c harac ters of a string are used by arises.
the program.
The default identifiers are CHANn
CHAN1 IDENT = Channel # 1 This c ommand allows you to optionally spec ify the c hannel. If
CHAN2 IDENT = Channel # 2 no number is supplied, both c hannels are monitored.
tors. 23 23
11 11
24 24
The software 12 12
25 25
COM-Wa tc h is a p rog ra m whic h runs 13 13
GND
DSR
RxD
CTS
DCD
DSR
RxD
CTS
RI
type
1 6 2 7 3 8 4 9 5 1 6 2 7 3 8 4 9 5
K5 K6
a: i ns t al l d:
DTE > DCE DCE > DTE 990013 - 13
Any other drive number may be used,
provided it exists.
After entering
Figure 2a. Circ uit d ia gra m of the a d a p tor used for m ea surem ents in p a ssive m od e
[drive][path] Comwat c h. ex e (RS232 version).
K3 DTE DCE K4
1 TxD– TxD– 1
6 RTS– RTS– 6 the program starts in full-sc reen mode.
2 TxD+ TxD+ 2
If the ha rd wa re ha s b een c onnec ted
7 RTS+ RTS+ 7
3 RxD+ RxD+ 3
up, the measurement session may start.
8 CTS+ CTS+ 8 The sc reen shows quite a few things.
4 RxD– RxD– 4 Fortunately an interac tive and c ontext-
9 CTS– CTS– 9
sensitive Help func tion is available, so
5 GND GND 5
tha t everything will soon b e c lea r.
Table 2 shows the functions assigned to
RxD+
CTS+
RxD–
CTS–
RxD+
CTS+
RxD–
CTS–
GND
GND
various keys.
1 6 2 7 3 8 4 9 5 1 6 2 7 3 8 4 9 5
After connecting the hardware to the
K5 K6
PC, you first have to c onfigure the soft-
wa re. As you c a n see from the ta b le,
DTE > DCE DCE > DTE 990013 - 11
this is done with the aid of function keys
F5 and F6. Once you have entered the
Figure 2b. Circ uit d ia gra m of the a d a p tor used for m ea surem ents in p a ssive m od e
right data, the program is ready for use.
(RS422 version).
Table 1. Signal allocation on 25-pin and 9-pin RS232 connection. Table 2. COM-Watch function keys
D-25 D9 description monitored DTE-DCE FKey Normal + Ctrl
1 sc reening F1 Help Go to position
2 3 transmitted data TxD yes (# 1) DTE →
3 2 rec eived data RxD yes (# 2) ← DCE F2 Save as… Go to Time loc ation
4 7 request to send RTS yes (# 1) DTE → F3 Open … Find…
5 8 c lear to send CTS yes (# 2) ← DCE
6 6 data set ready DSR yes (# 2) ← DCE F4 Calc ulation View/Ac tivity
7 5 massa S.GND -
8 1 data c arrier detec t DCD yes (# 2) ← DCE F5 Settings View/
9 reserved
10 reserved Channel 1 Channel 1
11 free F6 Settings View/
12 data c arrier detec t c h. 2 no ← DCE
13 c lear to send c h. 2 no ← DCE Channel 2 Channel 2
14 transmitted data c h. 2 no DTE →
15 transmitted sign. elem. timing no DTE → F7 View View/Split
16 rec eived data c h. 2 no ← DCE
17 rec eived sig. elem. timing no ← DCE F8 Format Format/
18 free Mnemonic
19 request to send c h. 2 no DTE →
20 4 data term. ready DTR yes (# 1) DTE → F9 Capture Set Start
21 free
22 9 ring indic ator RI yes (# 2) ← DTE Mode marker to
23 data rate selec t no DTE →
24 transm. sign. elem. timing no DTYE → Current position
25 F10 Analyse mode Set End marker
Note: to c urrent
signals proc essed via 1st COM port (# 1) DTE → DCE
signals proc essed via 2nd COM port (# 2) DTE ← DCE position
H5
K4
K2
K6
Fina lly we should mention tha t a
more extensive version of the program
H4
ROTKELE )C(
1-310099
com232 Version
noisreV 232moc
H3
K5
K1
986035-1.
+ Alt + Shift H5
K4
K2
K6
ROTKELE )C(
1-310099
Channel 2 Channel 2
View/Mixed View/Events
H3
Format/ASCII Format/
Hexadec imal
Set Start Set Start
K3
K5
K1
marker to marker to
H2
d ig it a l a u d io f o r m a t s
m o r e s o u n d s f r o m y o u r co m p u t e r
uniform structure
subband 0
All three layers have the same struc -
ture. Their enc od ing tec hniq ue is
known as perc eptual noise shaping or
subband 1 perc eptual subband transform c od-
ing. The enc oder analyses the spec tral
c omponents of an audio signal with
the aid of a filter bank (see Figure 1)
subband 2 and uses a psyc hoac oustic model to
Polyphase determine the disc ernible noise levels.
Subsequently, the information is quan-
Filter tized and enc oded in a manner whic h
ensures that two important c onditions
Bank subband 3
are taken into ac c ount: the maximum
bit stream and the masking effec t.
All three layers use the same filter
subband 4 bank with 32 subbands. They all permit
sampling rates of 32 kHz, 44.1 kHz,
...........
Joint stereo
Many small stereo hi-fi systems use a
c ommon woofer. In spite of this, the lis-
tener gets the impression that the
sound does not emanate from this
loudspeaker, but rather from the satel-
lites. Researc h shows that below a c er-
tain frequenc y the human ear is not
able to judge from whic h direc tion the
sound c omes. Comp ression tec h-
niques c an make use of this property
by not inc luding stereo information
below a c ertain frequenc y. This means
that below that frequenc y the signal is
enc oded in monophonic form only.
Huffman c ode
The enc oding of MPEG-1 Layer 3 uses
a c lassic al tec hnique: the Huffman
c ode. This is used after the ac tual data
c omp ression ha s ta ken p la c e to
enc ode the digital information. It is,
therefore, not a c ompression system
There is m uc h inform a tion a nd m a ny links a t www.m p eg.org.
but a very effic ient enc oding tec h-
nique. The Huffman algorithm gener-
ates a c ode of variable length and a
whole number of bits. Important sig-
nals are alloc ated a short c ode, less
signific ant ones, a longer c ode.
Sinc e Huffman c odes have a spec if- Table 3. Facilities available with MPEG-1 Layer 3
ic header, they c an be dec oded per-
fec tly in spite of the variable length.
Sound quality Bandwidth (kHz) Mode Bit rate (kbit/s)
Dec oding is very fast sinc e use c an be
Compression factor
made of a table. The tec hnique gives
a spac e saving of some 20 per c ent.
The Huffman tec hnique is an ideal Telephone 2.5 mono 8
c omp lement to the p erc ep tion- 1:96
dependent c ompression. In passages
Better than shortwave 4.5 mono 16
c ontaining many frequenc ies simulta-
neously, the p erc ep tion-d ep end ent 1:48
enc oding provides an apprec iable Better then medium wave 7.5 mono 32
reduc tion by eliminating masked sig- 1:24
nals. Sinc e few identic al signals oc c ur,
the Huffman c ode has little effec t. FM radio 11 stereo 56–64
During passages with few different 1:24 – 1:26
sound s, not ma ny ma sking effec ts
Near-CD 15 stereo 96
oc c ur. This is when the Huffman c ode
saves c onsiderable spac e sinc e there 1:16
is muc h redundant information, Suc h CD > 15 stereo 112–128
passages c an, therefore, be repre- 1:12 – 1:14
sented by short c odes. [992001]
Desig n b y V. Him p e
p r in t e r p o r t e x t e n sio n
u p t o 2 5 6 I / O lin e s o n a st a n d a r d p r in t e r p o r t
5V 10
2 3 4 5 6 7 8 9
1 +VS 18
I0 O0
24 2 17
I1 O1
21 3 16 K5
P53 I2 O2
22 4 15 1
P52 I3 O3
23 5 U5 14 2
P51 I4 O4
P50
1 6
I5 ULN O5
13 3
5V 7 2803 12 4
U4 I6 O6
11 2
P20 P40 8 11 5
10 3 I7 O7
P21 P41 VEE 6
K4 9 4
16 P22 P42 9 7
8 8243- 5
15 P23 P43 8
14 STR
MCS48 20
P60 9
13 STR 7 19 10
PROG P61
12 D2 6 18 10
CS P62 11
11 D3 17 1 +VS 18 12
P63 I0 O0
10 D0 2 17 13
16 I1 O1
9 D1 P73 3 16 14
15 I2 O2
8 P72 4 15 15
14 I3 O3
7 P71 5 U6 14 16
13 I4 O4
6 A2 P70 6 ULN 13 17
I5 O5
5 A3 7
2803 12 18
12 I6 O6
4 A0 8 11 19
I7 O7
3 A1 VEE 20
9 8 7 6 5 4 3 2
2 9
2
1 0 COMP
4
6 1 ULN2803
5V
8 RA3 8x 47k
P IN 0 1 18 OUT 0
11
13 IN 1 2 17 OUT 1
15
U7
5V IN 2 3 16 OUT 2
17
7 19
1P=Q IN 3 4 15 OUT 3
3
0
5 IN 4 5 14 OUT 4
20 C5
S1
7
1 2 6 5 U7 IN 5 6 13 OUT 5
74LS688
9
10 47µ
12 Q 10V IN 6 7 12 OUT 6
14 IN 7 8 11 OUT 7
16 1
8 7 3 4 G1 VEE 9 10 +VS
18
7
990025 - 12
Figure 2. Up to 16 of the I/O units shown here c a n b e c onnec ted to the b us unit.
The hardware
Figure 1 shows the design of the bus
unit. This c irc uit c ontains a number of
inverters that adequately buffer the
printer port signals. Sinc e the standard
printer port is intended to func tion pri-
marily as an output port, rec ourse is
made to several c ontrol lines of the
port for input data. The data lines D0
through D3 from the PC are used for
data output, and the c ontrol lines
Ac knowledge, Busy, Paper Empty and
Selec t are used for data input. The
remaining four outputs (D4 through D7)
are used to address the sixteen I/O
modules. Finally, the Strobe signal has Figure 3. The interna l struc ture of the 82C43, a c ontroller with five 4-b it p orts.
Figure 5. The c op p er-tra c k la yout a nd c om p onent overla y for the I/O unit.
WH E N E LE C T RO N IC S WAS YO U N G (2)
Birth of the battery such as Nicholson, Davy and Faraday. It
Count Alessandro Giuseppe Anastasio Volta (1745–1827) also put paid to the belief that animal tissue
belonged to an aristocratic family and was Professor of was needed for the generation of electricity.
Physics at the universities of Como and Pavia. He became It may be said that all this work
interested in a phenomenon described by Galvani in 1786 to in the early part of the 19th century was
the effect that “an electric spark, or contact with copper and experimental. The first reliable, practical
iron, causes a frog’s leg to twitch”. This gave rise to the, for- source of electric current, based on the
tunately short-termed, belief that animal tissue was neces- interactions of carbon and zinc in an elec-
sary for the generation of electricity. trolyte consisting of, among others, ammo-
Experiments showed Volta that an electric current nium chloride, manganese dioxide, zinc
could be generated by bringing different metals into contact chloride and water, was described by the
with each other. There are different versions of which metals French physicist Georges Leclanché in Alessandro Volta (1745 ... 1827)
he used: some writers claim silver and zinc, others, copper 1868. The Leclanché cell, improved many
and zinc. In 1799, he succeeded in making a construction of times since its inception, remains the best known dry or pri-
metal discs, alternately silver (or copper) and zinc, with mary cell in common use today.
brine-soak ed card between them. This ‘voltaic pile’ as it The secondary battery, invented in 1803 by Johann
became known was the first man-made source of electricity. Wolfgang Ritter (1776–1808) consists of discs of one metal
Its invention was made known by Volta to Sir Joseph Banks, separated by circular pieces of cardboard
President of the Royal Society, in a letter in early 1800. In that are moistened in a liquid that cannot
this letter, Volta says that he used 25 mm dia. copper and chemically affect the metal. W hen the
zinc discs. After his invention was made known, Volta did lit- extremities of this pile are link ed to the
tle further work on the device. His name survives, however, in poles of a voltaic pile, it becomes electrified
the SI unit of electric potential difference, the volt. and can be substituted for the latter and it
It is interesting to note that in 1848 Scyffer in his will retain the charge.
Geschichtliche Darstellung der Galvanisms (Historical However, the first practical sec-
Notation of Electric Phenomena) states that others besides ondary battery, the lead-acid battery, was
Volta carried out experiments with dry cells between 1800 produced in 1859 by another French physi-
and 1812, namely Ludick e, Einhof, Ritter, Hachette, Des- cist, Gaston Planté (1834–1889). In spite
ornes, Biot, and others. Several physicists of that era, par- of all sorts of other type of secondary bat-
ticularly Zamboni, expressed as their opinion that the best tery, the lead-acid battery remains the most
performance was not that of Volta but that of De Luc. widely used secondary battery in the world
Be that as it may, Volta’s invention transformed the today.
[905016-1] Volta’s cell
study of electricity and was, therefore, invaluable to men
WH E N E LE C T RO N IC S WAS YO U N G (2)
Birth of the battery such as Nicholson, Davy and Faraday. It
Count Alessandro Giuseppe Anastasio Volta (1745–1827) also put paid to the belief that animal tissue
belonged to an aristocratic family and was Professor of was needed for the generation of electricity.
Physics at the universities of Como and Pavia. He became It may be said that all this work
interested in a phenomenon described by Galvani in 1786 to in the early part of the 19th century was
the effect that “an electric spark, or contact with copper and experimental. The first reliable, practical
iron, causes a frog’s leg to twitch”. This gave rise to the, for- source of electric current, based on the
tunately short-termed, belief that animal tissue was neces- interactions of carbon and zinc in an elec-
sary for the generation of electricity. trolyte consisting of, among others, ammo-
Experiments showed Volta that an electric current nium chloride, manganese dioxide, zinc
could be generated by bringing different metals into contact chloride and water, was described by the
with each other. There are different versions of which metals French physicist Georges Leclanché in Alessandro Volta (1745 ... 1827)
he used: some writers claim silver and zinc, others, copper 1868. The Leclanché cell, improved many
and zinc. In 1799, he succeeded in making a construction of times since its inception, remains the best known dry or pri-
metal discs, alternately silver (or copper) and zinc, with mary cell in common use today.
brine-soak ed card between them. This ‘voltaic pile’ as it The secondary battery, invented in 1803 by Johann
became known was the first man-made source of electricity. Wolfgang Ritter (1776–1808) consists of discs of one metal
Its invention was made known by Volta to Sir Joseph Banks, separated by circular pieces of cardboard
President of the Royal Society, in a letter in early 1800. In that are moistened in a liquid that cannot
this letter, Volta says that he used 25 mm dia. copper and chemically affect the metal. W hen the
zinc discs. After his invention was made known, Volta did lit- extremities of this pile are link ed to the
tle further work on the device. His name survives, however, in poles of a voltaic pile, it becomes electrified
the SI unit of electric potential difference, the volt. and can be substituted for the latter and it
It is interesting to note that in 1848 Scyffer in his will retain the charge.
Geschichtliche Darstellung der Galvanisms (Historical However, the first practical sec-
Notation of Electric Phenomena) states that others besides ondary battery, the lead-acid battery, was
Volta carried out experiments with dry cells between 1800 produced in 1859 by another French physi-
and 1812, namely Ludick e, Einhof, Ritter, Hachette, Des- cist, Gaston Planté (1834–1889). In spite
ornes, Biot, and others. Several physicists of that era, par- of all sorts of other type of secondary bat-
ticularly Zamboni, expressed as their opinion that the best tery, the lead-acid battery remains the most
performance was not that of Volta but that of De Luc. widely used secondary battery in the world
Be that as it may, Volta’s invention transformed the today.
[905016-1] Volta’s cell
study of electricity and was, therefore, invaluable to men
A com p u ter is alw ays too slow. Esp e- the CPU voltage and temperature. The m ay be u sefu l to ow n ers of ‘old er ’
cially if you are a power user running three best known are: com p u ters. It m ay be fou n d at
th e latest softw are, a few m egah ertz Waterfall and Waterfall Pro www.geocities.com/SiliconValley/Vista/7532.
extra are often more than welcome. cpu.simplenet.com/leading_wintech/ The maker of this program claims that
Fortu n ately, you d on ’t h ave to bu y Rain it speeds up nearly all older processors
a new hardware kit to make your com- cpu.simplenet.com/rain10.zip w ith ou t h avin g to in crease th e clock
p u ter a bit faster — th ere are oth er CPUidle frequency. For the rest, the story is a bit
w ays! O verclockin g th e CPU is still www.stud.uni-hannover.de/~ goetz/ murky. None the less, we did give the
among the most popular alternatives. Th ere are also w ays to make th e CPU p rogram a test sp in on a cou p le of
Essen tially, th e CPU is given a clock faster by changing a couple of internal com p u ters in ou r offices. Th e resu lts
sign al th at is faster th an th e on e it is settings. Once a popular method with varied wid ely. No sp eed in crease was
officially rated for by the manufacturer, the earlier CPU generations produced n oticed on n ew er PCs, bu t u sers of
for exam p le, 350 MH z in stead of by Cyrix and AMD, it is no longer nec- older ones with a 486 or older Pentium
300 MHz. This works on nearly all Intel essary with the latest CPU types. O ne at least were under the impression that
CPUs (w ith a few tricks, th ou gh ), as p rogram , CPU booster, sh ou ld be the machine went faster, so we say it’s
w ell as on th ose from AMD an d m en tion ed h ere, h ow ever, becau se it worth trying.
IBM/Cyrix. Lots of in form ation on (995013-1)
overclockin g m eth od s, resu lts an d
related aspects may be found at
www.sysopt.com/overc.html and
www.tomshardware.com/overclock.html.
A major problem with overclocking
is the extra heat the processor will pro-
duce as a result of the higher clock fre-
qu en cy. In creasin g th e size of th e
h eatsin k/fan com bin ation m ay n ot
always be sufficient. Fortunately, a cou-
ple of small programs are available on
th e In tern et th at len d a h elp in g h an d
in p reven tin g early CPU d em ise as a
resu lt of overh eatin g. Basically, th ese
programs insert halt instructions in the
program code when the CPU idles. In
this way, the CPU temperature can be
mad e to d rop by 10-20 d egrees. Some
programs go one step further, provid-
in g extra fu n ction s su ch as gu ard in g
microcontrollers’
survey
news from the world of bit crunchers
general-coverage
receiver
part 2 (final):
construction and operation
Since pub-
lishing the
first instal-
ment of this
article, consid-
erable interest has
been expressed in
the design by many of
our readers. As
always, however, the Before d iscu ssin g th e con stru ction of you may have to refer back to part 1 of
proof of the pudding the general-coverage receiver, we think this article.
it is fair to warn that the project should
is in the eating, and not be attempted by beginners without M AI N R E C E I VE R B O AR D
actually building the any experience in building RF circuits.
But that is not to say you may not try,
The design of the main receiver board
is sh ow n in Figure 4. Th is is a p retty
receiver is no mean assuming that you have considered the large board con tain in g m an y d iscrete
following conditions: com p on en ts. It is double-sided,
job. Fortunately, through-plated an d available read y-
ready-made PCBs are ❍ you can rely on a more experienced
‘ham’ to help you;
mad e from the Publishers (or through
a kit supplier).
available, and the ❍ you are cap able of w orkin g very As you will not have failed to notice,
accurately; th e top sid e of th e board acts as a
receiver is easy-going ❍ you are n ot u n d er th e stress of ground plane which serves to keep RF
on adjustment. meeting deadlines, say, for complet- interference (both radiated and picked-
ing a school project or GCSE assign- up) to a minimum.
ment; Start by mounting the lower-profile
❍ a set of plastic coil adjustment tools is parts on the board. As usual, check the
available; valu e an d , if n ecessary, orien tation of
❍ you are willing and able to obtain all each comp on en t before you mou n t it.
th e p arts as sp ecified , p referably For a ch an ge, th e low p rofile p arts
from a reputed kit supplier. in clu d e th e follow in g ICs: IC1
(TCA440), IC5 (MC145156), IC3
In th e follow in g d iscu ssion s it is (MC3317), an d IC4 (MB501L). Th ese
assumed that the constructor has rea- ICs are n ot m ou n ted in sockets to
sonable experience in build ing RF cir- ensure minimum stray capacitance and
cu its p rin ted -circu it board s. Also, for inductance around their pins.
Design by G. Baars, PE1GIC term s an d abbreviation s u sed h ere, Some components whose mounting
C12
H2
C6 C8 C10 R67 T2 P3
R10 R20
C83 L10
D17
T1 R17 C25 L15 L16
L12
L8 C23 R28
C19 L14
D19 C28
L2
L13 C29
D14 R18
L11
R13
L1
L3
L4
L5
L6
L7
L9
C42
C26 D15
1
R11
R12
C36
C2
C104
R25
C27 R21
R15
C43
R7
C15 R14 C33 D16 R22
C18
IC1
C20 L17 C34 C32
C17 D18
D11
D3
D5
D7
D9
D10
D12
C24
D2
D4
D6
D8
R44
T5 R27
C11
C13
C3
C5
C9
C75 C63
D25 D20 R30
R1
R2
R3
R4
R5
R6
C38 C54
C76 R53 C53 R41
T6 L21
C74 C55 C56
IC2
IC4 C47
R33
Q0 Q1 Q2 Q3 Q4 Q5 L18 C58 R37 D23
R47
C66
C61 C59
L22
R51 C64 X2
R31
C101 L23 C79 C48 C60
R40
R55
R49
IC7 IC5 C57 R38
D21
IC3
IC8 C72
R35 R36
R50
C49 D22 C52
0 +12V X3 R52 C73
H3
C51 R34
H4
SCLK
SDATA
SENABLE
C80
C102 C65 L19
980084-1
R62
1-480089
C91
C90
ROTKELE )C( C92 FM SSB AM
C86
C94
C96 T9
R63
R61
R60
R59
C84
C93
C98
R65
R64
H6
R9 R42 C85
R58
R57
R56
C97
T7
C89
R66 IC6 T10 T8 C88
LS1
H5
T
C99 P5 C87
P1 P2 P4 C95
+12V
0
IC5
6
C12
C10
D14
R6
M1
H11
1
2
+M -M
R7
C11
3
P1
H1
4
IC6
5
R8
T1
C13
Figure 6. Copper track
H12
H5X
H7X
layout and component
C8
mounting plan of the +B
-B
control board. Unlike
the main receiver
IC4
board, this one is sin-
gle-sided. Cut off the
keyboard section.
C6 C7
Q3 Q4 Q2 Q0 Q1 Q5
AM
IC2
IC3
SSB
COMPONENTS LIST
K1
Control board
FM
Resistors:
R1 = 4kΩ7 C14
R2,R3,R4 = 15kΩ
IC1
R5,R9 = 10kΩ
R3
R5
R2
R1
D1
R6 = 100Ω 0.5W
R7 = 150Ω
C2
C1
SCLK
R8 = 22kΩ
SDATA
P1 = 10kΩ preset H
H2X
SENABLE C5
H4
Capacitors:
C3
C1 = 27pF
C2-C8,C10,C12,C13,C14 = 100nF
R4
S1
C9 = 100pF
H20
Semiconductors:
D1-D13 = 1N4148
D14 = 1N4001
R9
H19
H13
T1 = BS170
IC1 = PIC16F84-04/P (order code
K4
K2
C9
986517-1)
IC2 = 74HCT4017
IC3,IC4 = 4015
IC5 = 7812
IC6 = 78L05
980084-2
2-480089
980084-2
(C) ELEKTOR
ROTKELE )C(
Miscellaneous:
K1 = 14-way SIL socket
H18
H14
S3
S4
S5
K5
S7
S8
S9
S11
S12
S13
processor board it is probably easier to prototype, in Figure 7. com p lete p roject from a kit su p p lier,
bu ild u p th an th e receiver board . Th e Like th e m ain receiver board , th e the PCBs and/or the programmed PIC
board is sin gle-sid ed . Th e d esign is control board is available read y-mad e m ay or m ay n ot be in clu d ed , so d o
sh ow n in Figure 6, an d ou r fin ish ed from th e Pu blish ers. If you bu y th e make sure you know what you get!
4 5 6
7 8 9
GENERAL COVERAGE
RECEIVER 0 #
PRESEL. RF GAIN BFO AM/ FM/ SSB 0.15 - 32 MHz VOLUME *
980084 - F
where
mm= 00 – 20; defaults to 00 when the receiver
is switched on
fffff = 150 – 32000 (kHz)
CORRECTIONS
& updates
Eye pattern meter gates in IC4 have been trans- 1N5401. If the charger always should be changed to read
PC Topics Supplement, posed to improve the PCB lay- supplies currents smaller than
March 1999, p. 13. (992002) out. Functionally, this is of no about 1 A, diode D9 may also Flash Designs, Ltd.,
The moving coil meter shown consequence. be an 1N4001 or similar. North Parade House,
in Figure 3 should have a sen- However, one track on the North Parade,
sitivity of 100-200 µA f.s.d. board is missing: that between Bath BA2 4AL.
pin 2 and pin 8 of IC1 General Coverage Receiver Tel. (01225) 448630.
(ADC0804). If this link is January & February 1999
Electronics Freeware added, C1 is effectively con- (980084). We extend our apologies to
May 1999, PC Topics Supple- nected and the circuit will work In the preselector section, the Flash Designs and our readers
ment, p. 4 (990011-1) as described. upper varicap diode, D14, has for any inconvenience caused
The correct url for Digital no dc path. A suggested by the incorrect address infor-
Works is method of improving the mation.
Sealed lead-acid battery behaviour of the varicap (with-
http://www-scm.tees.ac.uk/ charger out modifying the PCB) is to
users/d.j.barker/digital/ May 1999, p. 26-31. replace capacitor C83 (220pF) Electronic Spirit-Level
digital.htm (990037-1) with a wire link. July/August 1998, p. 36
In Table 2 (Component Values), (984038).
the two formulas for R6 should In the circuit diagram, all LEDs
Battery capacity read Flash Designs – (D2 through D10) should be
measurement by PC address information reversed. The PCB layout is all
PC Topics Supplement, 0.45 / I [ohms]. April 1999, New Products, right.
December 1998, p. 14-16. p. 73.
(982093) D9 is missing from the parts In the New Products section,
With reference to the circuit list. As indicated in the circuit the address and telephone
diagram, a number of logic diagram, this diode is a type number of Flash Designs
precision current
gauges
with low-loss sense element
and PWM output
The LM3812/LM3813 1
current gauges from
National Semicon-
ductor are suitable
for application as bat-
tery charge/discharge
gauge, motion con-
trol diagnostics,
power supply load Figure 1. Typical application circuit of an LM3812 (high
sense). That of an LM3813 (low sense) is equally
monitoring and man- straightforward.
agement, and reset-
table smart fuse.
INTRODUCTION ture coefficient 2600 ppm °C–1).
Th e LM3812/LM3813 cu rren t gau ges A Delta Sigm a an alogu e-to-d igital
provid e easy-to-use precision current con verter is in corp orated to p recisely
measurement with virtually zero inser- measure the current and to provide a
tion loss (typ ically 0.004 Ω; tem p era- current averaging function. Current is
M a in pa r a m e t e r s
➩ Ultra low insertion loss (typically 0.004 Ω)
➩ 2–2.5 V supply range
➩ ± 2% accuracy at room temperature (includes accuracy of the internal
sense element) (LM3812-1.0, LM3813-1.0)
➩ Low quiescent current in shutdown mode (typically 2.5 µA)
➩ 50 ms sampling interval
➩ No external sense element required
➩ PWM output indicates the current magnitude and direction
➩ PWM output can be interfaced with microprocessors
➩ Precision delta-sigma current-sense technique
➩ Low temperature sensitivity
➩ Internal filtering rejects false trips
A National Semiconductor ➩ Internal power-on reset (POR)
Application
I sen se = 2.2(D–0.5)(I m ax )
10k
S1 39 AD0 AD3 2 19 A3 A1 9
P0.0 1D A1
9 38 AD1 AD2 3 18 A2 A2 8
RESET P0.1 A2
37 AD2 AD0 4 17 A0 A3 7 11 AD0
DWN P0.2 A3 D0
S2 1 36 AD3 AD1 5 16 A1 A4 6
IC3 12 AD1
P1.0 P0.3 A4 D1
2 35 AD4 AD5 6 15 A5 A5 5 13 AD2
P1.1 P0.4 A5 D2
3 34 AD5 AD4 7 14 A4 A6 4 15 AD3
UP P1.2 P0.5 A6 RAM D3
S3 4 33 AD6 AD6 8 13 A6 A7 3 16 AD4
P1.3 IC1 P0.6 A7 D4
5 32 AD7 AD7 9 12 A7 A8 25 17 AD5
P1.4 P0.7 A8 D5
ENTER 6 A9 24 62256 18 AD6
P1.5 A9 D6
7 30 11 A10 21 19 AD7
P1.6 ALE/P C1 A10 D7
8 1 A11 23
P1.7 21 A8 EN A11
P2.0 A12 2
22 A9 A12 20
C8 12 P2.1 A13 26 CS
INT0 23 A10 A13
13 P2.2 A14 1
INT1 24 A11 A14
100n P2.3
14 T0
25 A12 OE WR
15 P2.4
T1 80C31 26 A13 22 14 27
K1 P2.5
27 A14
P2.6
28 A15
P2.7
17
RD
10 16
RXD WR
11 TXD 29
2x 16 CHAR
PSEN 5V
31
P1 EA/VP
X1 X2
5V
20 19 18
X1 C7
10k 1 28
LCD
20 VPP
A0 10 100n
C3 C2 C5 A0
IC2 A1 9
A1
33p 33p 100n
A2 8
10 A2
11,0592MHz A3 7 11 AD0
A3 D0
5V A4 6 IC4 12 AD1
A4 D1
A5 5 13 AD2
5V A5 D2
R4 D3 A6 4 15 AD3
A6 EPROM D3
4k7
A7 3 16 AD4
R6 A7 D4
BAT85 A8 25
A8 27C256 D5
17 AD5
100Ω
A9 24 18 AD6
K2 A9 D6
BC547B T2 R2 S4 A10 21 19 AD7
R5 BT1 A10 D7
5V ON/OFF
4k7
1 A11 23
4k7 78L05 A11
6 A12 2
D1 K3 3 LP2950-5 A12
2 T1 A13 26
9V D2 IC5 5V A13
7 2 A14 27
A14
3
1N4148 1N4001 CS OE
8
BC557B 1 20 14 22
4 C9 C10
R3
9
4k7
5 470µ 100µ
16V 10V
990024 - 11
Capacitors:
C1 = 10µF 63V radial
C2,C3 = 33pF
C4-C8 = 100nF
K1
C9 = 470µF 16V radial
T
P1
H2
H3
DOWN
C1
C2
UP
ENTER
C8
X1 K2 Semiconductors:
D1 = 1N4148
C3
R1
D2 = 1N4001
T2
IC1 D3 = BAT85
R4
T1 = BC557B
R5
T2 = BC547B
R6
IC1 = 80C31, 80C51 or 87C51 (40-
R3
C7 pin DIL case
IC2 = 74HCT573
D1 IC3 = 62256 (e.g. UMC62256E-70LL)
T1
R2
C4
IC5
C10 Miscellaneous:
K1 = 14-way IDC connector for flat-
cable
IC2
S4
IC3
C5
H4
DC 00. 00 V
00: 00: 08
SX-microcontroller
evaluation system (1)
part 1: introducing
the Scenix SX micro
Figure 1. SX microcon-
Scenix recently released troller architecture. ou tlin e; Typ e Th e in tern al arch itectu re of th ese
the first devices from of SX18AC/DP = DIL p rocessors is sh ow n in Figure 1. Th e
a n ew series of 8-bit microcon trollers. case), or in a 20-p in SSO P case (Typ e processor has several clock oscillators,
Although these early products are still SX20AC/SS). w h ich w ill be d iscu ssed in d etail fu r-
flaw ed by th e od d bu g, th ey allow The larger brother has port C avail- ther on in the series.
designers to get cracking. As far as raw able on pins. It comes in three different An in tern al low-p ow er oscillator
sp eed is con cern ed , th e n ew Scen ix 28-pin cases (SX28AC/SO = small out- m ay be u sed , or an extern al qu artz
products are currently the fastest 8-bit lin e; SX28AC/DP = DIL case, crystal or RC n etw ork m ay be con -
m icrocon trollers you can bu y. At a SX28AC/SS = small scale). The 75-MHz n ected . Next, w e h ave a ÷4 p rescaler.
clock frequ en cy of 50 MH z, th e stan - an d 100-MH z version s h ave th e If this is bypassed, the so-called Turbo
d ard version rockets alon g at a sp eed resp ective typ e d esign ation s Mode is selected, which guarantees the
of 50 MIPs (million instructions per sec- SX28AC75/DP and SX28AC100/DP. fastest program execution. The instruc-
on d ). Mean w h ile, th e first sam p les of
75-MH z version s h ave arrived , an d a
100-MHz version is in the pipeline.
Th e p rice, too, is righ t at less th an Table 1 SX Evaluation System Hardware and software overview
4 US dollars per unit for volume quan-
tities. On the down side, development PICKALOCK Programming adaptor for in-system serial programming
kits, assem blers an d p rogram m in g (ISP) of Scenix SX controllers
ad ap tors for th e SX series are p riced PICKLOC1.DOC Documentation of the PC/PICKALOCK interface
w ell over 250 US d ollars. As you can
see from Table 1, Th e d evelop m en t SX-Demoboard 1 Demonstration board for the SX28AC controller
system w e h ave in m in d is far less SX-Demoboard 2 Demonstration board for the SX18AC controller
costly, an d com p rises ju st abou t an y-
th in g you n eed for a h ead start w ith SXASM.PAS Assembler for SX controllers; source code (Pascal 5.0)
the extremely fast ‘SX’ microcontroller. SXASM.EXE Assembler for SX controllers (executable program)
Datash eets of th e SX p rocessors SXASM.DOC Documentation with assembler
m ay be d ow n load ed from th e Scen ix
w eb site at w w w.scen ix.com . Th ere SXPRO.PAS PC shell for SX-PICKALOCK; source code
you will also find the errata sheets for SXPRO.EXE PC shell for SX-PICKALOCK
the earliest chips. This information was SXPRO.DOC Operation manual
obviously taken into account while the
p resen t d evelop m en t system w as TIPS.DOC Tips for faultfinding
designed.
LED1.SRC Example program: LED flasher using 16-MHz crystal
THE S X PROCES S OR IRC1.SRC LED flasher using internal RC oscillator
FAM I LY RC1.SRC LED flasher using external RC oscillator
As we write this, the SX series consists SERIO1.SRC Serial hexadecimal I/O foe test purposes
of ju st tw o m em bers, w h ich d iffer in SERPWM1.SRC PWM/ADC and LED control
resp ect of th e n u m ber of p orts. Th e SINGEN1.SRC Sine wave generator, 1 kHz, PWM
sm aller version d oes n ot h ave p ort C SINGEN2.SRC ine wave generator, 455 kHz, using R-2R DAC
bon d ed ou t to p in s. It is available 18- MIW1.SRC Multi-wakeup test
p in cases (Typ e SX18AC/SO = sm all
IDLE
FRAME
IDLE
FRAME "0" "1" "1" "0" "1" "0" "1" "0" "1" "0"
1 cycle
1 frame
T0 T1 T2 T3
HIGH
SYNC cycle
LOW
generated by transmitter
generated by SX CHIP
990018 - 12
receiver sample taken here
Figure 2 shows the basic circuit that high in the parts called T0, T2 and T3, C0 = 0110, D11-D0 = 10101…0.
gives the PICKALOCK access to the SX an d low in th e p art called T1. In a ‘0’
processor. To switch the SX chip to ISP cycle, th e O SC2 sign al is h igh d u rin g TRAN S M I S S I O N S P E E D
mode, the voltage at the OSC1 pin has the T0 part, and low in the T1, T2 and The documentation supplied by Scenix
to be raised to 12.5 V. First, h ow ever, T3 parts. The currently active transmit- via their web site states that each inter-
the internal SX oscillator has to be dis- ter defines the state during the T2 and val of T0 to T3 equals a 128-kHz clock.
abled as described in the ISP specifica- T3 parts. The receiver interrogates the In other words, a cycle has a length of
tion which may be found in the docu- level at th e O SC2 in p u t on th e tran si- 4/128,000 seconds or 31.25 (s. On a cou-
mentation supplied by Scenix. tion from T2 to T3. When the SX-PICK- ple of early processors (data code 9818)
Once in ISP mode, the SX processor ALO CK id les, i.e., d oes n ot execu te a clock rate of about 105 kHz was mea-
starts an internal oscillator which con- command s, and the SX chip is in pro- sured. Apparently the internal oscilla-
trols th e com p lete tim in g of th e p ro- gram m in g m od e, th e latter alw ays tor which creates the clock signal was
gram m in g sequ en ce. Data is th en tran sm its fram es con sistin g of a syn c a bit too slow. A sim ilar p oin t w as
exch an ged via th e O SC2 p in , w h ich cycle an d 16 ‘1’ cycles (IDLE fram e in fou n d in th e Errata sh eets abou t th e
acts as a kin d of op en -d rain bu s Figure 3). in tern al RC oscillator w h ich m ay be
together with the O SC2 connection of Th is fram e allow s th e SX-PICK- u sed to clock th e oscillator. Accord in g
th e SX-PICKALO CK an d an in tern al ALO CK to fin d ou t w h en th e fram es to Scenix, 3.2 MHz was reached instead
pull-up resistor inside the SX chip. start. O nce frame synchronisation has of 4 MH z, an d d oin g th e su m s,
been achieved, the SX chip and the SX- 128 kHz x 3.2/4 = 102 kHz, provides a
T W O - WA Y PICKALO CK are read y to start good explanation of the actually mea-
D ATA T R AF F I C exchanging data and commands. Each su red clock rate. Th e u p sh ot w as th at
The serial protocol is based on frames fram e alw ays ‘m oves’ 12 bits of d ata, th e PICKALO CK h ad to be d esign ed
con sistin g of 16 d ata bits. A fram e is an d 4 bits of com m an d in form ation . su ch th at it w ou ld be able to h an d le
divided in 17 cycles, the first one acting Th e first fou r bits (C3 th ou gh C0) in a different bit rates. The current version
as a syn ch ron isation aid . Th e remain - fram e are th e com m an d bits (MSB- accep ts bit rates betw een 95 kH z an d
in g 16 cycles p rovid e th e actu al d ata first). These are always transmitted by 140 kHz, which should be sufficient for
tran sfer. Th e system is illu strated in th e SX-PICKALO CK. Dep en d in g on most, if not all, practical purposes.
Figure 3. th e com m an d , th e n ext 12 bits th en (990018-1)
Every in d ivid u al cycle con sists of travel from th e SX ch ip to th e PICK-
four equally long parts, T0 through T3. ALOCK, or the other way around. The In next month’s instalment we will describe
There are three types of cycle. In a sync available com m an d s are listed in the construction and practical use of the
cycle, th e O SC2 sign al is h igh all th e Table 2. Figu re 3 in d icates a READ SX-PICALOCK, and the demo boards will
tim e. In a ‘1’ cycle, th e O SC2 sign al is frame with the following bit levels: C3- also be described.
The wave file player is yet another circuit that Using modern electronic components,
it is p ossible to p ack a lot of fu n ction s
offers the prospect of several hours of enjoyable on to a relatively sm all circu it board .
Th e circu it is also based on existin g
tinkering. The PC and the soldering iron work as stand ard s. In practice, this means that
partners on this project. You have to admit that the controller works with ‘wav’ (wave)
files. Th ese are fam iliar to every PC
this is an Elektor project in its best form. The u ser. An oth er im p ortan t factor is th at
the configuration of the player is auto-
result is a compact circuit that, on command, m atically d erived from d ata in th e
plays back a sound file that has been previously sou n d files, so th at th e best p ossible
sound quality is always guaranteed.
downloaded via the PC. The wave player can be
used as a programmable doorbell, but it can B AS I C AS S U M P TI O N S
A n u m ber of con sid eration s p layed a
also be used for model railroading or to amuse role in th e d evelop m en t of th e w ave
file player. We wanted it to be compact,
your children. Depending on the desired sam- utilize industry standards and be flexi-
pling frequency and resolution, it can store up to ble in use.
The interface with the PC allows all
43 seconds’ worth of sound. the ‘tunes’ that the player has to repro-
duce to be generated conveniently and
‘mad e to measure’. Depend ing on the
capabilities of the PC used, sound frag-
Design by H. Bonekamp m en ts can be taken from a CD (bu t
A C L O S E R L O O K AT 990015-11
T H E H A R D WA R E
Th e block d iagram of th e h ard w are Figure 1. Block dia-
design is shown in Figure 1. The heart gram of the wave file
of the circuit is an AT90S2313 IC, which oscillator com p on en ts player. address is being sent to
can be connected to a PC via an RS232 are X1, C1 an d C2. Th e th e flash m em ory. In
in terface. O n th e an alogu e sid e w e ‘p lay ’ sw itch is ad d ition , th e d ata are
fin d a D/A con verter, a con figu rable debounced in software, and resistor R4 organ ized so th at th e least p ossible
low-p ass filter an d an ad ju stable ou t- protects the IC against electrostatic dis- am ou n t of tim e is lost in read in g th e
put amplifier. The d ata are stored in a ch arges. Cap acitor C3 su p p resses an y data.
flash m em ory. All th at’s left is th e cou p led -in h igh -frequ en cy sign als. Th e D/A con verter is con n ected to
power supply: from a 9 V input, it pro- LEDs D1 and D2 are connected to one th e CPU via th ree sign al lin es (CLK,
vid es th e circu it w ith 8.4 V an d 5 V of th e con troller ’s I/O p orts via series DIN an d LOAD). Its ou tp u t sign al
w orkin g voltages. Th e u ser in terface resistors. Th e 2-Mbit flash m em ory, (Vou t) is cap acitively cou p led to th e
consists of one switch (‘play ’) and two IC2, is organ ized as 1024 p ages each in p u t of th e low-p ass filter (IC4). Th e
LEDs (‘recording’ and ‘playing’). h old in g 264 bytes. Sin ce it takes 64 LTC1063 chip used here is a switched-
Th an ks to th e p ow er of th e con - clock cycles to read ou t on e p age, it is capacitor device, which filters the ana-
troller used here, the entire hard ware n ot p ossible to sim p ly tran sfer d ata logue signal under control of the CPU.
d esign n eed s on ly five in tegrated cir- d irectly from the flash memory to the A circu it trick is u sed to set th e in p u t
cuits. Figure 2 shows the full schematic D/A converter. A 64-byte circular buffer level to the filter to 2.5 V. The necessary
diagram. The serial interface consists of in RAM is u sed to d eal supplementary voltage
n o m ore th an a sin gle tran sistor an d with this problem. Data Figure 2. From theory is p rovid ed by R8 an d
th ree resistors. Th e h ard w are arou n d are read from the circu- to practice: the com- R9. Resistor R7 p ro-
the CPU can be quickly described. The lar bu ffer w h ile a p age plete circuit requires vid es a relatively high-
only five integrated
circuits.
K1
ISP 5V U+
2 R3
10k
R2 C4 C6 C8 R8
100k
C14 C13
4k7
T1
IC5 1
TxD R1 100n 100n 100n
20 100n VP 220µ
100k 8 6 25V
C7 R10 C12
BC547B 1 19 1 7 1 7 2 VIN 5 LS
RESET IC1 (SCK)PB7 CLK VOUT VIN VOUT 15k
OUT+
2 18 2 IC3 IC4
PD0(RxD) (MISO)PB6 DIN 6 100n 8 470n
3 17 LTC VREF LTC VOS
PD1(TxD) (MOSI)PB5 1063
6 16 3 1257 4 5 4 3 !OUT- 7
PD2(INT0) AT90 PB4 LOAD DOUT CLKIN CLKOUT
7 15 GND1 8Ω
PD3(INT1) S2313 (OCI)PB3 2W
8 14
PD4(T0) PB2 5 3 2
9 13 GND2 VC
PD5(T1) (AIN1)PB1
R4 R5 R11 11 12 R6 R7 6 4
PD6(ICP) (AIN0)PB0
TDA7052A
1k
1k
3k3
15k
100k
XTAL1 XTAL2
C3
5 4 10
X1
10MHz R9
S1 100n D1 C15 P1 D2 C10 C9 C11
C2
4k7
C1
4k7
2µ2 100µ 100n 1n
10V 22p 22p 10V
5V 5V LP2950CZ5.0 U+
32
D3 7...15V
IC6
5 29
SCK IC2 WP C5
28 6 1N4001
RESET SI C16
4 7 100n
CS AT45D021 SO
10µ 10V
990015-12
T
S1
3
C3
H3
H2
R4
C8
R3
R2
D1
R1
IC2
C1
C2
T1
R6
R5
X1
D2
IC1
R11
C4
(C) ELEKTOR
990015-1
ROTKELC16
990015-1
C6
1-510099
IC4
IC3
C5
E )C(
K1
C11
R7
C10
C7
R8
R9 C15
C9
R10
IC6
C12
D3
IC5
P1
C13
+ 0
H4
H1
C14 LS
Titan 2000
High-power hi-fi and
public-address amplifier
It could be argued
that most of the out-
put amplifiers pub-
lished in this maga-
zine lack power.
Although this is a
debatable point, it
was felt that a true
heavyweight output
amplifier would make
a welcome change for
many constructors.
The Titan 2000 can
produce 300 watts
into 8 Ω, 500 watts
into 4 Ω, and
800 watts into 2 Ω.
For those who believe
that music power is a
reputable quantity, the
amplifier can deliver
2000 watts of this
magical power into
Br i e f p a r a m e t e r s
4 Ω. Sine-wave power output 300 W into 8 Ω; 500 W into 4 Ω; 800 W into 2 Ω
Music power* 2000 W into 4 Ω
Harmonic distortion < 0.005%
Slew limiting 85 V µs–1
Open-loop bandwidth 55 kHz
Power bandwidth 1.5 Hz – 220 kHz
Design by T. Giesberts
± 85V
1
regulator auxiliary main power
supply
± 78V power supply
2x 15V
± 70V
T43...T52
T1...T10 T27...T34
T15...T26 T35...T42
protection 0
circuits
thermal
control
fan
15k
1V
330Ω
T47 R13 R18 D4 R24 R25 R26
D10 C16 C4 C8 C20 C21 C17
68Ω
68Ω
68Ω
1k00
270Ω
1V45
0V83
D8 100p 2n2
1N4004 100n 100p 100p 100p
BD712 5V6
30V T43
R16 T15 T16 T17
R63 0W5
1W3 C32 G D E B C E
+78V
150Ω
BF S C B
15k
245A 2µ2
2x T11 B E
R58 63V
C
BC T21...T23=MJE340 E B
270Ω
0V36
T45 639 T46 70V
R22 T29...T31=2SC5171 C
3k3
2mA1 C43 C44 C45
35V
C31 1W T29 T30 T31
39V
C28 C29
53V
R60 R61 R64 T13 100n 100n 100n
15n
15V T21 T22 T23 5V
470µ 100V 220n
12k
22Ω
22Ω
60
BF256C +5V
R59 P2 R36 R39 R40 R41 R78
T9
39V
5k6
2k2
8V4
10Ω
10Ω
10Ω
560Ω
38mV
250Ω
R19 D5 R76
D1 IC2 I
BF256A P4 C6 C10 C9
D9 T44 R5 100Ω
BF871 2 8 6
10k
C30 C33 C34
1V7
330Ω
T35...T38=2SC5359
39V 220µ R74
25V 100µ 1W 100n 15V
47µ 220n 470µ T5 1W3 T35 T36 T37 T38 C42
63V 1W3 100V 25V
100Ω
5k T3 1n
BF R31 R33
R75 R77
245A BD 3 7 5
33Ω 100Ω
22k
R4
T27
220Ω
D3 139 6N136
1N4148 T7 R12
C3 R45 R46 R47 R48 R79
22Ω
JP2
53mV
MUTE
2Ω2
22Ω
0Ω22
0Ω22
0Ω22
0Ω22
1n
45mV
20mV
T1
R10 R11 LS+ LS+ L1
Re1
470Ω 470Ω
R38 R49 R50 R51 R52
JP1 C15
C1 R2
K1
150Ω
2V24
0Ω22
0Ω22
0Ω22
0Ω22
20mV
562Ω R9 100n
470Ω
R34 Re4 Re3 Re2
390Ω
P3
V23042-A2003-B101 R14
R8 R30 2R
500Ω
P1 R
R6
22Ω
5k
22Ω1
1R
45mV
R1 R3
22Ω
C2 T8 T39 T40 T41 T42
53mV
P-IN BF T4 C14
1M
47k
245A LS1
1n T39...T42=2SA1987
T6 T28 C
BD R37 R42 R43 R44
22k
R21 D7 140
220Ω
C13 C12 LS- LS-
10Ω
10Ω
10Ω
560Ω
P5
10k
32mV
R32 R35
R7 T10
D12 R68 C7
C37 C41 100µ 1W 100n 15V
C40
1W3
1V7
39V
470Ω
25V T27...T42 on common heatsink
5k6
220µ
47µ 220n 470µ D2
25V
63V 1W3 5k 100V BF872
-30V
T32 T33 T34
100n 100n 100n
-39V
T49 15V
-53V
70V
R23 P-LS
D16
12k
C35
22Ω
22Ω
C36
3k3
1W C26 R53
470µ 100V 220n 1N4004
T50 T51
1M
-39V
15n
T24...T26=MJE340 2µ2 63V
D11
2x R17 C24
Elektor Electronics
T48 BC
640 BD139 MJE340 2SC5171 2SA1987
1µ
150Ω
15k
245A R15 R20 D6 2 D14
-78V C18 C5 C11 C22 1
2µ2 C23 C19
R67 6 12V
63V
68Ω
68Ω
68Ω
IC1 0W5
1k00
270Ω
1V45
0V83
100p 3
270Ω
0V36
BD711 2n2 100n 100p 100p 100p D15
D13 5V6 R27 R28 R29 4
0W5 OP90G
R66 R71 R55 R54
1N4004
T52 4M7 4M7 C27
1V
15k
330Ω
C25 E B E B B E
D17 B E
T1, T4, T5, T15...T17 = BC560C 2µ2 63V C C C
15Ω 15V C
T2, T3, T6, T18...T20 = BC550C 68n
85V R65 1N4004 990001 - 11
2/99
microsecond, and to which the ampli- works next to impossible. To obtain the transistors T35–T42.
fier can respond. requisite output power, the use of par- Th e offset con trol stage p reven ts
allel n etw orks of symmetrical p airs of an y d irect voltage ap p earin g at th e
DESIGN transistors is inevitable. output of the amplifier.
C O N S I D E R AT I O N S In view of th e foregoin g, bip olar Th e lou d sp eaker is lin ked to th e
Th e Titan 2000 is based on th e ‘com - tran sistors are u sed in th e cu rren t amplifier by three heavy-duty relays.
pact power amplifier ’ published in the am p lifier of th e Titan 2000. H ow ever, The current amplifier operates from
May 1997 issue of this magazine. That th ese can n ot be d riven as read ily as a ± 70 V supply, which is provid ed by
was a typical domestic amplifier with a IGBTs, which means that current drive two 50 V mains transformers. To enable
power output of 50 W into 8 Ω or 85 W in stead of voltage d rive is u sed . Th is th e voltage amp lifier to d rive th e cu r-
in to 4 Ω. Th e sp ecial p rop erty of th is en tails a su bstan tial u p grad in g of th e rent amplifier to its full extent, it needs
fu lly balan ced d esign w as th e u se of d river stages an d th e p reced in g cas- a sligh tly h igh er su p p ly voltage to
cu rren t feed back in stead of voltage code amplifiers (which also consist of a com p en sate for th e in evitable losses
feed back, w h ich resu lted in a fast- cou p le of p arallel-con n ected tran sis- cau sed by in evitable voltage d rop s.
resp on d in g am p lifier w ith a large tors). The good news is that the power This is accomplished by superimposing
op en -loop ban d w id th . Th e am p lifier transistors in the Titan 2000 are consid- a ± 15 V p oten tial from an extern al
performed well both as regards instru- erably less exp en sive th an IGBTs: an auxiliary supply on to the main ± 70 V
m en t test an d m easu rem en ts an d lis- im p ortan t factor w h en eigh t of th ese su p p ly an d d rop p in g th e resu ltin g
ten in g tests. H ow ever, to serve as a devices are used. voltage to ± 78 V with the aid of regu-
basis for the Titan 2000, its output cur- Finally, the protection circuits have lator T43–T52.
rent and drive voltage range had to be been en h an ced in view of th e h igh er Th e com bin ed p rotection circu its
increased substantially. voltages and currents. The circuits pro- constantly compare the input and out-
For a start, the supply voltage has to tectin g again st d irect voltages an d put voltage of the amplifier: any devi-
be m ore th an d ou bled , w h ich m ean s sh ort-circu its are su p p lem en ted by ation from the nominal values leads to
th at tran sistors w ith a h igh er p ow er n etw orks p rotectin g again st overload th e ou tp u t relays d iscon n ectin g th e
ratin g h ave to be u sed in th e p ow er and (too) high temperatures. The latter lou d sp eaker an d th e in p u t relay
supply. The higher supply voltage also is cou p led to a p rop ortion al fan con - decoupling the input signal.
results in larger potential drops across a trol. The thermal protection circuit mon-
n u m ber of com p on en ts, an d th is In sh ort, a large p art of th e Titan itors th e tem p eratu re of th e h eat sin k
mean s th at d issip ation p roblems may 2000 is a virtu ally n ew d esign rath er and, if necessary, switches on a fan. If,
arise. than a modified one. w ith th e fan op eratin g, th e tem p era-
Th e large ou tp u t cu rren t requ ired tu re ap p roach es th e m axim u m p er-
for th e Titan 2000 m akes a com p lete BRIEF DESCRIPTION m issible lim it, th e ou tp u t relays are
redesign of the current amplifier used The block diagram of the Titan 2000 is deenergized and disconnect the loud-
in th e ‘com p act p ow er am p lifier ’ shown in Figure 1. The voltage ampli- speaker.
unavoidable, since that uses insulated- fier consists of input stages T1–T10, and
gate bip olar tran sistors (IGBTs). cascode amplifiers/pre-drivers T15–T26. CIRCUIT DESCRIPTION
Alth ou gh th ese are excellen t d evices, The current amplifier is formed by dri- The circuit diagram of the Titan 2000 is
th e large sp read of th eir gate-em itter ver tran sistors T27–T34, an d ou tp u t shown in Figure 2. In spite of the large
voltage makes their use in parallel net- n u m ber of com p on en ts, th e basic cir-
1M
4x 1N4007 ber, this is a push-pull d esign), so that
K2 470µ
K1 70V 100V 100n th e overall amp lification of in p u t sec-
tion plus cascode amplifiers is ×8500 (a
gain of close to 80 dB).
Current amplifier
70V R2
C2 C4 Since one of the design requirements is
1M
Tr2 4x 1N4007 that the amplifier is to work with loads
470µ
100V 100n K4 d ow n to 1.5 Ω, th e ou tp u t stages con -
D5 D7 sist of four parallel-connected pairs of
F2 85V transistors, T35–T38 and T39–T42. These
160mA T
transistors have a highly linear transfer
D6 D8
characteristic and provide a direct-cur-
ren t am p lification th at rem ain s virtu -
12V / 1VA5 990001 - 13 ally constant for currents up to 7 A.
Like the output transistors, the dri-
ver stages need to remain within their
Figure 3. Circuit dia- safe op eratin g area (SOA), w h ich
cuit is straightforward. gram of the requisite an d T8. In view of th e n ecessitates a th reefold p arallel n et-
As alread y noted in auxiliary power supply. requ isite stability, w ork. Th e tran sistors u sed in th e d ri-
th e p reviou s p ara- d iod e D 1 is th erm ally ver stages are fast typ es
grap h , tran sistors cou p led to T5 an d D 2 (f T = 200 MH z).
T1–T10 form th e in p u t to T6. Setting the bias voltage for the req-
am p lifier, T11 an d T12 are bu ffers, T13 Any imbalance of the input stages is u isite qu iescen t cu rren t is accom -
an d T14 are cu rren t sou rces, T15–T26 com p en sated by m akin g th e cu rren t plished by balanced transistors T27 and
form th e cascod e amp lifier/p re-d river th rou gh T5 equ al to th at th rou gh T6 T28. These transistors are mounted on
stage, T27–T34 are the driver transistors with potentiometer P 2. the same heat sink as the output tran-
in the current amplifier, T35–T42 are the sistors and driver transistors to ensure
output transistors, and T43–T52 form a Cascode amplifiers/pre-drivers good th erm al cou p lin g an d cu rren t
sophisticated supply voltage regulator. Th e large ou tp u t cu rren t of th e Titan con trol. O f cou rse, th e cu rren t rises
2000 n ecessitates a p rop ortion ally during full drive conditions, but drops
Input amplifier large p re-d rive voltage, w h ich is p ro- again to its n om in al level w h en th e
Strictly speaking, the input amplifier is vided by three parallel-connected cas- amp lifier cools off. Th e qu iescen t cu r-
form ed by tran sistors T3–T4. Cascod e cod e am p lifiers, T15–T26. Th e cu rren t rent is set to 200 mA with potentiome-
stages T9–T10 serve m erely to en able through these amplifiers is arranged at ter P 3.
th e in p u t section h an d lin g th e h igh 10–15 m A, bu t th e cu rren t feed back O wing to the large output current,
voltages. These voltages are limited by used may cause this level to be appre- the connection between amplifier out-
zener diodes D5 and D7, which are part ciably higher. This is the reason that the p u t an d lou d sp eaker is n ot arran ged
of th e p oten tial d ivid er th at also sets tran sistors u sed in th e T21–T26 p osi- via a single relay, but via three. Two of
th e op eratin g p oin ts of T21–T26. In tion s are typ es th at can h an d le cu r- th ese, Re 3–Re 4, are con trolled in syn -
view of the requisite stability, the cur- rents of up to 50 mA when their collec- ch ron y by th e p rotection circu its.
ren t th rou gh th e zen er d iod es is h eld tor-emitter voltage is 150 V. When they are deenergized, their dis-
con stan t by cu rren t sou rces T13 an d Th e in p u t section is lin ked to th e abling action is delayed slightly to give
T14. Resistors R22 an d R23 lim it th e cascod e am p lifiers by bu ffers T11 an d the contacts of the third relay, Re2, time
potential across, and thus the d issipa- T12, which results in a lowering of the to op en , w h ich is of im p ortan ce in a
tion in, these field-effect transistors. in p u t im p ed an ce. Th e arran gem en t fault situation.
O therwise, the input section is vir- also en ables an in crease in th e valu es In p u t relay Re 1 is sw itch ed off in
tually identical to that of the ‘compact of R13 and R15, which results in a 3 dB syn ch ron y w ith Re 2 to en su re th at
power amplifier ’. The drop across the in crease in am p lification of th e in p u t there is no input signal by the time Re 3
em itter resistors of bu ffers T1 an d T2 section. and Re 4 are deenergized.
determines the drop across the emitter Th e fu n ction of resistors R19 an d Optoisolator IC2 serves as sensor for
resistors of T3 an d T4, an d con se- R21 is threefold: they limit the dissipa- th e cu rren t p rotection circu its. Th e
qu en tly th e settin g of th e op eratin g tion of th e bu ffers; th ey obviate th e light-emitting diode in it monitors the
p oin t of th e overall in p u t section . To need of an additional voltage to set the voltage across R48–R52 via p oten tial
eliminate the influence of temperature op eratin g p oin t of th e bu ffers; th ey divider R74–R75, so that the positive as
variation s, T1 is th erm ally cou p led to lim it th e m axim u m cu rren t th rou gh w ell as th e n egative ou tp u t cu rren ts
T3 and T2 to T4. th e bu ffers, an d th u s th e cascod e are gu ard ed . Th e u se of an op toisola-
Since the operating point of buffers amplifiers, to a safe value. tor p reven ts earth loop s an d obviates
T1 and T2 is critical, current sources T5 The open-loop amplification of the comp en sation of th e ± 70 V common -
and T6 have been added. The reference Titan 2000 is d eterm in ed solely by mode voltage. The + 5 V supply for the
for th ese cu rren t sou rces is p rovid ed those of the input section and cascode op toisolator is d erived from th e p ro-
by light-emitting diodes (LEDs) D 1 and am p lifiers. Th e am p lification of th e tection circuits.
D 2. Th e cu rren t th rou gh th ese d iod es in p u t section d ep en d s on th e ratios
is d eterm in ed by cu rren t sou rces T7 R13:(R12+ R8) and R15:(R14+ R8) and, Feedback
w ith valu es as sp ecified is ×10 (i.e., a Th e feed back loop ru n s from th e ou t-
Cu r r e n t - f e e d b a ck
In an amplifier using voltage feedback (Figure a), the differential voltage at its inputs is multiplied by the open-loop
amplification. The feedback loop forces the output voltage to a level that, divided by network R1-R2, is equal to the
input voltage.
Whereas an amplifier with voltage feedback has high-impedance inputs, an amplifier with current feedback (Figure
b) has an high-impedance and a low-impedance input. Its input stage consists of a buffer with unitary gain between
the inverting and non-inverting inputs. Essentially, the inverting input is the low-impedance input. The buffer is fol-
lowed by an impedance matching stage that converts the output current of the buffer into a directly proportional out-
put voltage.
The current feedback loop operates as follows. When the potential at the non-inverting input rises, the inverting input
will also rise, resulting in the buffer current flowing through resistor R1. This current, magnified by the impedance
matching stage, will cause the output
voltage of the amplifier to rise until the
output current flowing through resistor R2 a b
U in U in
is equal to the buffer current through R1.
The correct quiescent output voltage can
U out U out
be sustained by a very small buffer cur- A(s) Av=1 R(s)
rent. The closed-loop amplification of the
circuit is determined by the ratio I
(1+ R2):R1.
A interesting property of an amplifier
R2 R2
with current feedback is that the closed-
loop bandwidth is all but independent of
the closed-loop amplification, whereas R1 R1
that of an amplifier with voltage feedback R2
becomes smaller in inverse proportion to Av = 1 + Av = 1 + R2
R1 R1
the closed-loop amplification – a relation 990001 - 14
known as the gain-bandwidth product.
NEXT MONTH
Next mon th ’s secon d an d con clu d in g
in stalm en t of th is article w ill d escribe
details of the protection circuits, the fan
con trol, an d th e con stru ction of th e
am p lifier. Th e in stalm en t w ill also
include detailed specifications and per-
formance characteristics.
[990001-1]
Features:
✔ the distance between the two stations may be quite long
✔ the duration of the stop-over at each of the stations can be preset
✔ no run round loop required
✔ power lines of shuttle circuit and train are isolated
✔ wearfree electronic change-over of direction of travel
✔ standard, inexpensive components are used
Design by M. Metzner
1 10V
10V
IC5
7810
B2
IC4 14V
10V P1 R3 C4 CNY17
10k 2 4
R1 C11 C10 C9 C8
500k 220µ 14 D1
C3
16V
10k
1k
1k
S1 ≥1
4 7 5k6
C2 T5 T3
R BD244 BD243
100n
IC1c T1
3 8 R5
10
9 & 150k BC516
D5 D3
B1
10V 10V P
IC1d T2
12 R8
11 Q
13 & 150k BC516 D6 D4
S2
C1 13
R T6 T4
100n 12 9 R9 R10
IC2b 10V BD244 BD243 B40C3300
IC1b
1k
1k
5 ≥1 R12
4 11 10 IC3
6 & 5k6
1 6 5
R2 RCX CX
16 D2
C6 IC1 = 4093 C7
14 15
10k
IC2
IC2 = 4538
P2 C5 100n 8 2200µ
R4 D3...D6 = 1N4003 25V
10k 2 4
10V 500k 220µ CNY17
980080-11
16V
CIRCUIT DESCRIPTION gate IC1d become high also, the output The track voltage is derived from
To understand the function of the of the gate goes low, and T2 conducts the normal railway power supply set
shuttle service circuit, imagine a train so that the LED in optoisolator IC3 as required for the track speed. The
travelling from A to B. The train can lights. Power transistors T3 and T6 then bridge rectifier, B1, ensures that the
move only when neither of timers IC2a come on and connect the drive voltage supply to power transistors T3–T6 is of
and IC2b is set (see Figure 1). This is with reverse polarity to the rail track. correct polarity at all times. Capacitor
always so when the train is at a stand- The train is then able to leave station C7 smooths the track voltage and
still at station A or B. Pin 3 of the B and travel to station A. short-circuits any spikes on it.
bistable (flip-flop) formed by IC1a and When station A is approached, reed The supply voltage for the control
IC1b is then logic low (0), whereas switch A closes when the locomotive circuit is derived from the normal rail-
pin 4 is logic high (1). Pins 6 and 10 of passes over it. This causes bistable IC1 way lighting supply (14 V a.c.) via
IC2 are also low, while pins 7 and 9 of to change state again, whereupon a bridge rectifier B2 and regulator IC5.
IC2 are high. The inputs of NAND gate similar process as described for station
IC1 are high, but its output is low. This B ensues. Now, however, timer IC2a, CONSTRUCTION
means that T1 conducts whereupon which determines how long the train The control circuit is best built on the
the LED in optoisolator IC4 lights. stops at station A, is triggered. printed-circuit board shown in Fig-
Power transistors T4 and T5 conduct In this manner, the train travels ure 2. Experienced constructors will
and link the drive voltage to the rail continuously between the two stations have no problems in completing the
track. The train is then able to leave (provided the power is switched on). board. Those with less experience
station A and travel to station B. Diodes D1 and D2 indicate which of should pay particular attention to the
When station B is approached, reed the two optoisolators is enabled and polarity of electrolytic capacitors,
switch B closes when the locomotive therefore in which direction the train diodes, ICs, bridge rectifiers, and so on.
passes over it. This causes bistable IC1 is travelling. When the train is at either Wire bridges also need close attention:
to change state, whereupon pin 3 of of the two stations, both LEDs are out. make sure that these are soldered in
IC1 goes high, and pin 4, low. This Because the inverse trigger inputs place before any components are fit-
results in the input (pin 11) of IC2 (pins 5 and 11) of IC2 are used, timers ted.
being triggered, so that its normal out- IC1a and IC1b are triggered by the neg- Although, strictly speaking, power
put (pin 10) goes high at once and the ative edges at pins 3 and 4 of IC1. Since transistors T3–T6 do not need a heat
inverted output (pin 9), low. The out- the timers change state after the set sink during normal operation, it is
put of the NAND gate remains high, time has elapsed, even when the trig- wise to fit them on one to allow for
however, for as long as the timer is set. ger inputs are low, operational errors any unforeseen events.
During this time, darlingtons T2 and are prevented. This is particularly Circuit IC1 should preferably be a
T2, as well as the power circuit, T3–T6, important to avoid a fast moving loco- Type 4093, which has high immunity
remain cut off so that the train cannot motive closing the same reed switch to interference, but a Type 4011 (pin
leave station B. twice in succession or a slow train compatible with a 4093) may also be
When the time set by IC2b has stopping with the locomotive above used.
elapsed, pin 9 of the timer goes high the reed switch/relay and so keeping When the power is switched on for
again, whereupon the inputs of NAND this closed. the first time to the track and the con-
Resistors:
R1–R4 = 10 kΩ
R5, R8 = 150 kΩ
R6, R7, R9, R10 = 1 kΩ
R11, R12 = 5.6 kΩ
P1, P2 = 500 kΩ preset
Capacitors:
C1–C3, C6, C9, C10 = 0.1 µF
C4, C5 = 220 µF, 16 V, radial
C7 = 2200 µF, 25 V, radial
C8 = 1000 µF, 2 V, radial
C11 = 1 µF, 25 V, radial
Semiconductors:
B1 = B40C3000 bridge rectifier
B2 = B40C800 bridge rectifier
D1, D2 = LED, high efficiency
D3–D6 = 1N4003
T1, T2 = BC516
T3, T4 = BD243
T5, T6 = BD244
Integrated circuits:
IC1 = 4093 or 4011 – see text
IC2 = 4538
IC3, IC4 = CNY17-2 trol circuit, the timers are set by the to via an isolating track, small magnets
IC5 = 7810 negative edge at their inverse trigger may be fitted (glued) underneath the
inputs. Therefore, the train will not last carriage instead of the locomotive.
Miscellaneous:
move until the relevant time has This enables the train to be fairly long
S1, S2 = reed switch or reed relay
PC1–PC10 = solder pins elapsed; at the first switch-on, this may while retaining the same distance
PCB Order no. 980080 (see Readers take a little while. between the front or rear of the train
services towards the end of this If the train, on first switch-on, and the terminals of the shuttle track.
issue) moves in the wrong direction and its [980080]
passing over a reed switch has no
effect, the polarity of the track voltage
must be reversed.
Because the circuit is controlled via See also ‘Shuttle Track’ in the July/August
two reed switches or relays as opposed 1996 issue of this magazine.
2
T
T
S2
S1
R2
H4
H1
C2
C1
R1
P1
C3
IC1
C6
C4
980080-1 D1
R3
IC2
C5
R4
R5
R8
P2
T2
T1
R6
R9 R10 R7
C10
D2
IC3 IC4
D3
T3
C11
R12
P
R11
D5
T5
IC5
C8
Q
C7
C9
~
D4
T4
14V
D6
B2
~
T6
Figure 2. The
B1
printed-circuit board
for the shuttle track
1-080089 control.
H2
980080-1
H3
V~
2SC5359 2SA1987
Transistors Transistors
AF, high-power AF, high-power
D ATA S H E E T 2 /9 9 D ATA S H E E T 2 /9 9
2SC5359 2SA1987
MAXIMUM RATINGS (Ta = 25ºC) MAXIMUM RATINGS (Ta = 25ºC)
Silicon NPN Triple Diffused Power Transistor Silicon PNP Triple Diffused Power Transistor
CHARACTERISTIC SYMBOL RATING UNIT CHARACTERISTIC SYMBOL RATING UNIT
Manufacturer Manufacturer
Collector-Base Voltage VCBO 230 V Collector-Base Voltage VCBO –230 V
Toshiba Toshiba
Collector-Emitter Voltage VCEO 230 V Collector-Emitter Voltage VCEO –230 V
Features Features
Emitter-Base Voltage VEBO 5 V Emitter-Base Voltage VEBO –5 V
2/99
❍ High Collector Voltage: VCEO = 230V (Min.) ❍ High Collector Voltage: VCEO = –230V (Min.)
❍ Complementary to 2SA1987 Collector Current IC 15 A ❍ Complementary to 2SC5359 Collector Current IC –15 A
❍ Recommended for 100W High Fidelity Audio Base Current IB 1.5 A ❍ Recommended for 100W High Fidelity Audio Base Current IB –1.5 A
Frequency Amplifier Output Stage Frequency Amplifier Output Stage
Collector Power Dissipation (Tc = 25ºC) PC 180 W Collector Power Dissipation (Tc = 25ºC) PC 180 W
Application Example Junction Temperature Tj 150 ºC Application Example Junction Temperature Tj 150 ºC
High-Power AF Amplifier, High-Power AF Amplifier,
Storage Temperature Range Tstg –55 to + 150 ºC Storage Temperature Range Tstg –55 to + 150 ºC
Elektor Electronics February & March 1999. Elektor Electronics February & March 1999.
69
✃
2SA1987 2SC5359
2/99
Transistors Transistors
AF, high-power AF, high-power
D ATA S H E E T 2 /9 9 D ATA S H E E T 2 /9 9
Elektor Electronics
ELECTRICAL CHARACTERISTICS (Ta = 25ºC) ELECTRICAL CHARACTERISTICS (Ta = 25ºC)
CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Collector Cut-off Current ICBO VCB = –230V, IE = 0 — — –5.0 µA Collector Cut-off Current ICBO VCB = 230V, IE = 0 — — 5.0 µA
Emitter Cut-off Current IEBO VEB = –5V, IC = 0 — — –5.0 µA Emitter Cut-off Current IEBO VEB = 5V, IC = 0 — — 5.0 µA
Collector-Emitter Breakdown Voltage V(BR)CEO IC = –50mA, IB = 0 –230 — — V Collector-Emitter Breakdown Voltage V(BR)CEO IC = 50mA, IB = 0 230 — — V
hFE(1) (Note) VCE = –5V, IC = –1A 55 — 160 — hFE(1) (Note) VCE = 5V, I C = 1A 55 — 160 —
DC Current Gain DC Current Gain
hFE(2) VCE = –5V, IC = –7A 35 70 — — hFE(2) VCE = 5V, I C = 7A 35 87 — —
Collector-Emitter Saturation Voltage VCE(sat) IC = –8A, IB = –0.8A — –1.5 –3.0 V Collector-Emitter Saturation Voltage VCE(sat) IC = 8A, I B = 0.8A — 0.4 3.0 V
Base-Emitter Voltage VBE VCE = –5V, IC = –7A — –1.0 –1.5 V Base-Emitter Voltage VBE VCE = 5V, I C = 7A — 1.0 1.5 V
Transition Frequency fT VCE = –5V, IC = –1A — 30 — MHz Transition Frequency fT VCE = 5V, I C = 1A — 30 — MHz
Collector Output Capacitance Cob VCB = –10V, IE = 0, f = 1MHz — 360 — pF Collector Output Capacitance Cob VCB = 10V, I E = 0, f = 1MHz — 200 — pF
(Note) hFE(1) Classification: R= 55-110; O = 80-160 (Note) hFE(1) Classification: R= 55 -110; O = 80 -160
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