Unit 2: Addressing Methods

and Programs
Hari K.C.
Programming view of a Processor
• It refers to the programming model of a processor.
• Viewing a processor from a programming perspective involves
understanding how the processor executes instructions, manages memory,
and handles data.
• It includes Instruction Set, Registers, Memory Management, Control Flow,
Arithmetic and Logic Unit (ALU), Data Movement.
• Understanding the programming view of a processor is crucial for
optimizing code, designing efficient algorithms, and developing software
that takes advantage of the underlying hardware capabilities.
• Different processor architectures (e.g.,8085, 8086, ARM, MIPS) have their
own unique programming models.
8085 microprocessor programming model
• The Intel 8085 microprocessor is a popular 8-bit microprocessor
introduced in the mid-1970s.
• It has a simple programming model that involves various registers
and instructions to perform operations.
• Here's an overview of the programming model of the 8085
microprocessor:
1. Registers
• The 8085 has six general purpose registers to store 8 bit data; these are
identifies as B, C, D, E, H, L.
• They can be combined as register pairs - BC, DE and HL to perform some
16-bit operations.
• The programmer can use these registers to store or copy data into the
registers by using data copy instructions.

2. Accumulator
• The accumulator is an 8-bit register that is a part of arithmetic/logic
unit(ALU).
• This register is used to store 8-bit data and to perform arithmetic and
logical operations.
• The result of an operation is stored in the accumulator.
• The accumulator is also identified as register A.
3. Flags

•8085 has five flag registers:-

- Sign Flag (S): Sets or Resets based on the result stored in the accumulator.
If the result stored is positive, the flag resets else if the result stored is
negative the flag is set.

- Zero Flag (Z): Sets or Resets based on the result stored in the accumulator.
If the result stored is zero the flag is set else it is reset.

- Auxiliary Carry Flag(AC) :

This flag is set if there is a carry from low nibble(lowest 4 bits) to high nibble(upper 4 bits) or a borrow
from high nibble to low nibble, in the low order 8-bit portion of an addition or subtraction operation.

- Parity Flag (P): This flag is set if there is even parity else it resets.

- Carry Flag (CY): This flag is set if there is a carry bit else it resets.
4. Program Counter (PC)
• This 16-bit register deals with sequencing the execution of instructions this
register is a memory pointer.
• Memory locations have 16-bit addresses and that is why this is a 16 bit
register.
• The function of the PC is to point to the memory address from which the
next byte is to be fetched.
• When a byte(machine code) is being fetched, the program counter is
incremented by one to point to the next memory location.

5. Stack Pointer (SP)

• The stack pointer is also a 16-bit register used as a memory pointer.
• It points to a memory location in R/W memory called a stack.
• The beginning of the stack is defined by loading a 16-bit address in the
stack pointer.
Instruction Set of 8085
• The 8085 microprocessor supports a variety of instructions categorized as
follows:
• Data Transfer Group: Instructions to move data between registers, memory, and
I/O ports. Examples: MOV, LDA, STA, IN, OUT.
• Arithmetic Group: Instructions for arithmetic operations like addition,
subtraction, multiplication, and division. Examples: ADD, SUB, INR, DCR, DAD.
• Logical Group: Instructions for logical operations such as AND, OR, XOR, and
complement. Examples: ANA, XRA, CMA.
• Branch Control Group: Instructions for controlling the program flow using
branching and looping. Examples: CALL, RET, JMP, JC, JZ.
• Stack Group: Instructions to manage the stack. Examples: PUSH, POP, XTHL, SPHL.
• Input/Output Group: Instructions to communicate with input and output
devices. Examples: IN, OUT.
• Machine Control Group: Instructions for interrupt control and halt operations.
Examples: EI, DI, HLT.
Programming Example
ORG 0000H ; Set the origin address

MVI B, 05H ; Load the first number (5) into register B

MVI A, 07H ; Load the second number (7) into register C

ADD B ; Add the contents of B to the accumulator

MOV D, A ; Move the result to register D

STA 3000H ; Store the result in memory location 3000H

HLT ; Halt the processor

• Load the numbers 5 and 7 into registers B and C.
• Add the contents of B (5) to the accumulator.
• Store the accumulator's value into register D.
• Store the result in memory location 3000H.
• Halt the processor.

• This example demonstrates the basic structure of an assembly

program for the 8085 microprocessor, showcasing data transfer,
arithmetic, and memory storage operations.
Data Types and Data representations
A) Data Representations:
Binary representation
Decimal representation
Octal representation
Hexadecimal representation
ASCII , BCD, Graycode, XS3
B) Data Types:
• Numeric data: integers, hexadecimal
• Floating data: decimal , fractional value
• Boolean data: true, false
• Character data: a, b or strings
• Binary: 1,0
• Integer Data Types: Processors work with integer values represented in binary
form. These values can be signed or unsigned. The processor's word size
determines the range of representable integer values. For example, a 32-bit
processor can represent integers from -2^31 to 2^31 - 1 for signed integers.
• Floating-Point Data Types : Some processors have hardware support for floating-
point arithmetic, allowing them to handle real numbers with a fractional
component. Floating-point data types adhere to standards like IEEE 754, which
defines representations for single (float) and double (double) precision floating-
point numbers.
• Character Data Types: Characters are represented using character encodings like
ASCII or Unicode. Processors can manipulate character data by performing
operations on their corresponding binary codes.
• Boolean Data Types: While not represented in the same way as high-level
languages, processors use conditional flags to represent Boolean conditions (e.g.,
zero flag, carry flag) resulting from arithmetic or logic operations.
• Binary Data Types: Processors can manipulate binary data at the bit level, often
useful for tasks like bit masking, bit shifting, and bitwise logical operations.
Complements
• Complements are used in the digital computers in order to simplify
the subtraction operation and for the logical manipulations.
• For each radix-r system (radix r represents base of number system)
there are two types of complements.
S.N. Complement Description
1 Radix Complement The radix complement is
referred to as the r's
complement
2 Diminished Radix The diminished radix
Complement complement is referred to
as the (r-1)'s complement
Binary system complements

• 1's complement
• The 1's complement of a number is found by changing all 1's to 0's
and all 0's to 1’s.
• This is called as taking complement or 1's complement. Example of 1's
Complement is as follows:
2's complement

• The 2's complement of binary number is obtained by adding 1 to the

Least Significant Bit (LSB) of 1's complement of the number.
• 2's complement = 1's complement + 1
• Example of 2's Complement is as follows:
1’s Complement Subtraction
• In subtraction by 1’s complement we subtract two binary numbers
using carried by 1’s complement.
• The steps to be followed in subtraction by 1’s complement are:
i) write down 1’s complement of the subtrahend.
ii) add this with the minuend.
iii) If the result of addition has a carry over then it is dropped and an 1
is added in the last bit.
iv) If there is no carry over, then 1’s complement of the result of
addition is obtained to get the final result and it is negative.
Evaluate:
110101 – 100101

100101
101011 – 111001
Solution:
1’s complement of 111001 is 000110. Hence
Minued - 101011
1’s complement - 000110
110001

• Hence the difference is – 1 1 1 0

Subtraction by 2’s Complement
• With the help of subtraction by 2’s complement method we can easily
subtract two binary numbers.
• The operation is carried out by means of the following steps:
(i) At first, 2’s complement of the subtrahend is found.
(ii) Then it is added to the minuend.
(iii) If the final carry over of the sum is 1, it is dropped and the result is
positive.
(iv) If there is no carry over, the two’s complement of the sum will be
the result and it is negative.
Evaluate:

(i) 110110 - 10110

Solution:
The numbers of bits in the subtrahend is 5 while that of minuend is 6. We make the
number of bits in the subtrahend equal to that of minuend by taking a `0’ in the sixth place
of the subtrahend.
Now, 2’s complement of 010110 is (101101 + 1) i.e.101010. Adding this with the minuend.

1 10110 Minuend
1 01010 2’s complement of subtrahend
Carry over 1 1 00000 Result of addition

After dropping the carry over we get the result of subtraction to be 100000.
10110 – 11010
Solution:
2’s complement of 11010 is (00101 + 1) i.e. 00110. Hence
Minued - 10110
2’s complement of subtrahend - 00110
Result of addition - 11100

As there is no carry over, the result of subtraction is negative and is

obtained by writing the 2’s complement of 11100 i.e.(00011 + 1) or
00100.
Hence the difference is – 100.
Fixed point representations
Fixed point representation
In computing, fixed-point number representation is a real data
type for a number. With the help of fixed number
representation, data is converted into binary form, and then
data is processed, stored and used by the system.

Sign bit -The fixed-point numbers in binary uses a sign bit. A

positive number has a sign bit 0, while a negative number has a
8 bits = 1Sign bit + 4 bits(integral) + 3bits (fractional
sign bit 1.
part)
Integral Part – The integral part is of different lengths at
16 bits = 1Sign bit + 9 bits(integral) +6 bits (fractional
different places. It depends on the register's size, like in an 8-bit
part)
register, integral part is 4 bits.
32 bits = 1Sign bit + 15 bits(integral) + 9 bits (fractional
Fractional part – Fractional part is also of different lengths at
part)
different places. It depends on the register's size, like in an 8-bit
register, integral part is of 3 bits.
Convert 4.5 to fixed point
Step 1:- Convert the number into binary form.
4.5 = 100.1
Step 2:- Represent binary number in Fixed point notation
Floating point representations
• To discard the limitation of fixed-point notation, floating-point
number representation was developed by scientists.
• The computer system uses floating-point numbers representation to
convert input data into binary form.
• The binary form number is converted into ‘scientific notation,' and
then this scientific notation is converted into floating-point
representation.
Convert number = 376.423 to floating point number

Number in scientific = 37.6423 x 10^1 or 3.76423 x 10^2

BCD and Gray Code
• Binary Coded Decimal or BCD is simply the 4-bit binary code representation of a
decimal digit with each decimal digit replaced in the integer and fractional parts with its
binary equivalent.
• BCD Code uses four bits to represent the 10 decimal digits of 0 to 9.
• Standard binary coded decimal code is commonly known as a weighted 8421 BCD code,
with 8, 4, 2 and 1 representing the weights of the different bits starting from the most
significant bit (MSB) and proceeding towards the least significant bit (LSB).
• The weights of the individual positions of the bits of a BCD code are: 23 = 8, 22 = 4, 21 =
2, 20 = 1.
• The main advantage of the Binary Coded Decimal system is that it is a fast and efficient
system to convert the decimal numbers into binary numbers as compared to the pure
binary system. But the BCD code is wasteful as many of the 4-bit states (10-to-16) are not
used but decimal displays have important applications.
Advantages of BCD Codes

•It is very similar to decimal system.

•We need to remember binary equivalent of decimal numbers 0 to 9 only.

Disadvantages of BCD Codes

•The addition and subtraction of BCD have different rules.

•The BCD arithmetic is little more complicated.
•BCD needs more number of bits than binary to represent the decimal number. So BCD is less efficient
than binary.

Applications
• used in digital voltmeter
• used in digital clock
• used in traditional computer
Gray code
• The reflected binary code or Gray code is an ordering of the binary numeral
system such that two successive values differ in only one bit (binary digit).
• Gray codes are very useful in the normal sequence of binary numbers
generated by the hardware that may cause an error or ambiguity during
the transition from one number to the next.
• So, the Gray code can eliminate this problem easily since only one bit
changes its value during any transition between two numbers.
• Gray code is not weighted that means it does not depends on positional
value of digit.
• This cyclic variable code that means every transition from one value to the
next value involves only one bit change.
 For n = 1 bit For n = 2 bit For n = 3 bit

Binary Gray Binary Gray Binary Gray

0 0 00 00 000 000

1 1 01 01 001 001

10 11 010 011

11 10 011 010

100 110

101 111

110 101

111 100
Decimal Binary Gray Code

0 000 000

1 001 001

2 010 011

3 011 010

4 100 110

5 101 111

6 110 101

7 111 100
• Gray codes are widely used to prevent spurious output
from electromechanical switches and to facilitate error correction in digital
communications such as digital terrestrial television and some cable
TV systems.
• It is also used for asynchronous FIF0 pointer.
• Used for high speed decode circuit.
• When Gray code are used in computers to address program memory , the
computer uses less power because fever address line change as the
program counter advances.
• Gray code also play a vital role in error correction.
Alphanumeric code, 8421,2421 and Hamming
code
• ASCII, stands for American Standard Code for Information
Interchange.
• It's a 7-bit character code where every single bit represents a unique
character.
2421 BCD Code
• This code also a 4 bit application code where the binary weights carry
2, 4, 2, 1 from left to right.
Hamming Code
• Hamming code is a block code that is capable of detecting up to two
simultaneous bit errors and correcting single-bit errors.
• It was developed by R.W. Hamming for error correction.
• In this coding method, the source encodes the message by inserting
redundant bits within the message.
• These redundant bits are extra bits that are generated and inserted at
specific positions in the message itself to enable error detection and
correction.
• When the destination receives this message, it performs
recalculations to detect errors and find the bit position that has error.
 Example of Hamming code
• Suppose the data to be transmitted is 1011001, the bits will be placed
as follows:

Determining the Parity bits:

R1 bit is calculated using parity check at all the bits positions
whose binary representation includes a 1 in the least significant
position. R1: bits 1, 3, 5, 7, 9, 11

To find the redundant bit R1, we check for even parity. Since
the total number of 1’s in all the bit positions corresponding to
R1 is an even number the value of R1 (parity bit’s value) = 0
• R2 bit is calculated using parity check at all the bits positions whose
binary representation includes a 1 in the second position from the
least significant bit. R2: bits 2,3,6,7,10,11

To find the redundant bit R2, we check for even parity. Since the total number of 1’s in all the
bit positions corresponding to R2 is odd the value of R2(parity bit’s value)=1
• R4 bit is calculated using parity check at all the bits positions whose
binary representation includes a 1 in the third position from the least
significant bit. R4: bits 4, 5, 6, 7
To find the redundant bit R4, we check for even parity. Since
the total number of 1’s in all the bit positions corresponding to
R4 is odd the value of R4(parity bit’s value) = 1
• R8 bit is calculated using parity check at all the bits positions whose binary representation
includes a 1 in the fourth position from the least significant bit. R8: bit 8,9,10,11

To find the redundant bit R8, we check for even parity. Since
the total number of 1’s in all the bit positions corresponding to
R8 is an even number the value of R8(parity bit’s value)=0.
Thus, the data transferred is:
Error Detection code
• The parity generating technique is one of the most widely used error detection
techniques for the data transmission.
• In digital systems, when binary data is transmitted and processed , data may be
subjected to noise so that such noise can alter 0s (of data bits) to 1s and 1s to 0s.
• Hence, parity bit is added to the word containing data in order to make number
of 1s either even or odd.
• Thus it is used to detect errors , during the transmission of binary data .
• The message containing the data bits along with parity bit is transmitted from
transmitter node to receiver node.
• At the receiving end, the number of 1s in the message is counted and if it doesn’t
match with the transmitted one, then it means there is an error in the data.
Parity generator and checker
• A parity generator is a combinational logic circuit that generates the
parity bit in the transmitter.
• On the other hand, a circuit that checks the parity in the receiver is
called parity checker.
• A combined circuit or devices of parity generators and parity
checkers are commonly used in digital systems to detect the single bit
errors in the transmitted data word.
• The sum of the data bits and parity bits can be even or odd . In even
parity, the added parity bit will make the total number of 1s an even
amount whereas in odd parity the added parity bit will make the total
number of 1s odd amount.
• The basic principle involved in the implementation of parity circuits is
that sum of odd number of 1s is always 1 and sum of even number of
1s is always zero.
• Such error detecting and correction can be implemented by using Ex-
OR gates (since Ex-OR gate produce zero output when there are even
number of inputs).
• To produce two bits sum, one Ex-OR gate is sufficient whereas for
adding three bits two Ex-OR gates are required as shown in below
figure.
Parity Generator
• It is combinational circuit that accepts an n-1 bit stream data and generates
the additional bit that is to be transmitted with the bit stream.
• This additional or extra bit is termed as a parity bit.
• In even parity bit scheme, the parity bit is ‘0’ if there are even number of
1s in the data stream and the parity bit is ‘1’ if there are odd number of
1s in the data stream.
• In odd parity bit scheme, the parity bit is ‘1’ if there are even number of 1s
in the data stream and the parity bit is ‘0’ if there are odd number of 1s in
the data stream. Let us discuss both even and odd parity generators.
Even Parity Generator
• Let us assume that a 3-bit message is to be transmitted with an even
parity bit.
• Let the three inputs A, B and C are applied to the circuits and output
bit is the parity bit P.
• The total number of 1s must be even, to generate the even parity bit
P.
• The figure below shows the truth table of even parity generator in
which 1 is placed as parity bit in order to make all 1s as even when
the number of 1s in the truth table is odd.
• The K-map simplification for 3-bit message even parity generator is
• From the above truth table, the simplified expression of the parity bit
can be written as:
• The above expression can be implemented by using two Ex-OR gates.
• The logic diagram of even parity generator with two Ex – OR gates is
shown below.
• The three bit message along with the parity generated by this circuit
which is transmitted to the receiving end where parity checker circuit
checks whether any error is present or not.
• To generate the even parity bit for a 4-bit data, three Ex-OR gates are
required to add the 4-bits and their sum will be the parity bit.
Odd Parity Generator

• Let us consider that the 3-bit data is to be transmitted with an odd

parity bit.
• The three inputs are A, B and C and P is the output parity bit. The
total number of bits must be odd in order to generate the odd parity
bit.
• In the given truth table below, 1 is placed in the parity bit in order to
make the total number of bits odd when the total number of 1s in the
truth table is even.
• The truth table of the odd parity generator can be simplified by using K-
map as:
• The output parity bit expression for this generator circuit is obtained
as:
P=A⊕BΘC

The above Boolean expression can be implemented by using one Ex-OR

gate and one Ex-NOR gate in order to design a 3-bit odd parity
generator.
• The logic circuit of this generator is shown in below figure , in which .
two inputs are applied at one Ex-OR gate, and this Ex-OR output and
third input is applied to the Ex-NOR gate , to produce the odd parity
bit. It is also possible to design this circuit by using two Ex-OR gates
and one NOT gate.
Arithmetic Operations
• Arithmetic operations are fundamental operations performed by a
computer's central processing unit (CPU) to manipulate numerical
data.
• These operations are the basis for mathematical calculations and are
essential for a wide range of applications.
• Addition: Addition is a basic arithmetic operation that combines two
or more numbers to produce a sum.
• In binary arithmetic, addition involves carrying over a carry bit if the
sum of two bits exceeds the base (2 in binary).
• Example: if A= 23H and B=36H , Then A+B= ?
• let's convert the hexadecimal values to binary and then perform the
addition:
• A = 23H = 0010 0011 in binary .
• B = 36H = 0011 0110 in binary.
0010 0011
+ 0011 0110
--------------
0110 1001
so, 0110 1001 = 69H
• Subtraction: Subtraction involves finding the difference between two numbers.
• In binary arithmetic, subtraction can involve borrowing a borrow bit if the
minuend bit is less than the corresponding subtrahend bit.
• The computer used 2’s Complement subtraction.
• Let's consider an example of 2's complement subtraction using decimal
numbers to make it more intuitive.
• Subtract 27H from 42H using 2's complement subtraction.
• Convert 42 to binary: 42 = 01000010 in binary
• Convert 27 to binary: 27 = 00100111 in binary
• Find the 2's complement of subtrahend 27:
• Invert the bits (change 0s to 1s and 1s to 0s): 00100111 -> 11011000
• Add 1 to the inverted result: 11011000 + 1 = 11011001
• Add to minuend
• 11011001 + 01000010 = 1 00011011
• Ignore the carry: 00011011 = 1BH
• Multiplication: Multiplication is the process of repeatedly adding a
number to itself a certain number of times.
• In binary arithmetic, multiplication is based on bitwise operations
and shifts, and it involves partial products that are added to produce
the final result.
• binary multiplication of 05H and 07 H
• Convert 05H to binary: 05H = 00000101 in binary
• Convert 07H to binary: 07H = 00000111 in binary
• Perform binary multiplication:
• 00000101 (05H) × 00000111 (07H) = 23H
• Division: Division is the process of finding how many times one
number (the divisor) is contained within another number (the
dividend).
• Division can be more complex and often involves multiple
subtractions and comparisons to determine the quotient and
remainder.
Incrementer ( A ß A +1)
Basic Operational concepts
• Computer architecture encompasses the fundamental concepts that
dictate how a computer's hardware components are organized and
how they interact to execute instructions and perform tasks.
• Here are some of the basic operational concepts in computer
architecture:
• Instruction Execution Cycle: The instruction execution cycle, also
known as the fetch-decode-execute cycle, is the basic process
through which a computer's central processing unit (CPU) fetches an
instruction from memory, decodes it to determine the operation to
be performed, and then executes the operation.
• This cycle is repeated for each instruction in a program.
• Registers: Registers are small, fast storage locations within the CPU
that hold data and instructions temporarily during processing.
• They play a crucial role in data manipulation, control flow, and
arithmetic operations.
• Common types of registers include general-purpose registers, special-
purpose registers (like program counters and flags), and floating-point
registers.
• Memory Hierarchy: Memory hierarchy refers to the organization of
various levels of memory with varying speeds and sizes.
• It includes registers, cache memory, main memory (RAM), and
secondary storage (hard drives, solid-state drives).
• The hierarchy aims to optimize data access speed and storage
capacity by placing frequently accessed data in faster, smaller
memories.
• Data and Instruction Formats: Computer instructions and data are
represented in specific formats.
• Data formats include integers, floating-point numbers, characters,
and more. Instructions are encoded in binary formats that include an
opcode (operation code) specifying the operation to be performed
and operands for the operation.
• Addressing Modes: Addressing modes define how operands are
specified in instructions.
• Common addressing modes include immediate (directly specifying a
value), register (using a CPU register as an operand), direct (specifying
a memory address), and indirect (using the content of a memory
location as an operand).
Bus structures
• A computer consist of set of components or module of three basic
types, (processor , memory, I/O) that communicate with each other.
The collection of path connecting various module is called Bus
structure. Example: Internal bus, System bus, Input-Output bus.
• The interconnection structure must support the following type of
transfer :

1. Memory to processor

2. Processor to memory

3. I/O to processor

4. Processor to I/O

5. I/O to or from memory.

Traditional bus structure
High speed modern bus structure
 System Bus Types of system bus:
1.Address bus
2.Data bus
Address Bus: 3.Control bus
1.Address bus carry the memory address while reading from
writing into memory.
2.Address bus carry I/O post address or device address from
I/O port. Control Bus:
3.In uni-directional address bu only the CPU could send address Different types of control signals are used in a bus:
and other units could not address the microprocessor. 1.Memory Read: This signal, is issued by the CPU or DMA
controller when performing a read operation with the
Data Bus: memory.
1.Data bus carry the data. 2.MemoryWrite: This signal is issued by the CPU when
2.Data bus is a bidirectional bus. performing a write operation with the memory.
3.Data bus fetch the instructions from memory. 3.I/O Read: This signal is issued by the CPU when it is reading
4.Data bus used to store the result of an instruction into from an input port.
memory. 4.I/O Write: This signal is issued by the CPU when writing into
5.Data bus carry commands to an I/O device controller or an output port.
port. 5.Ready: The ready is an input signal to the CPU generated in
6.Data bus carry data from a device controller or port. order to synchronize the show memory or I/O ports with the
7.Data bus issue data to a device controller or port. fast CPU.
 Instruction cycle and Machine cycle
• The processing time requires for single instruction is called instruction
cycle.
• The computer takes a certain period to complete this task i.e.,
instruction fetching, decoding and executing on the basis of clock
speed. Such a time period is called Instruction cycle and consists
three cycles namely fetch and decode and Execute cycle.
• It consist of fetch cycle, decode cycle and execute cycle.
• Fetch cycle is used to read the instruction from the memory.
• Decode cycle is used to decode and identify the function of
instruction.
• Execute cycle is used to run the instruction
such that performing the required operation,
storing the result in registers or in memory.
Instruction cycle state diagram

:
• Instruction address calculation (iac):
Determine the address of the next instruction to be executed. Usually, this involves adding a fixed
number to the address of the previous instruction. For example, if each instruction is 16 bits long
and memory is organized into 16-bit words, then add 1 to the previous address. If, instead, memory
is organized as individually addressable 8-bit bytes, then add 2 to the previous address.
• Instruction fetch (if):
Read instruction from its memory location into the processor.
• Instruction operation decoding (iod):
Analyze instruction to determine type of operation to he performed and operand(s) to be used.
• Operand address calculation (oac):
If the operation involves reference to an operand in memory or available via I/O. then determine
the address of the operand.
• Operand fetch (of):
Fetch the operand from memory or read it in from I/O,
• Data operation (do):
Perform the operation indicated in the instruction.
• Operand store (os):
Write the result into memory or out to I/O
 Machine Cycle
The time required by the microprocessor to complete an
operation of accessing memory or input/output devices is
called machine cycle.

One time period of frequency of microprocessor is

called t-state.

A t-state is measured from the falling edge of one clock

pulse to the falling edge of the next clock pulse.

Fetch cycle takes four t-states and execution cycle takes

three t-states.
Example: Opcode fetch Machine cycle
Microoperations and RTL
• The operations to be performed at one unit time( One T state) is
microoperation.
• It is a set of 1 or 2 operations that can be accomplished with a single
clock pulse.

Register Transfer Language:

It is a symbolic notation for microoperation.
It is a HDL( hardware description language) in which the
microoperation define literally is expressed in a language that can be
used to transfer the data among the registers is called RTL.
Data transfer through microoperation
• Let us consider the digital system with two 1 bit registers X and Y.
• Xç Y , copying the contents of register Y to X.

• Microoperation just specify the transfer to be made not on how to

copy data.
• There are two types of Connection:
a) Direct Connection(Register tranfer)
b) Creating a Bus
Direct Connection
• The set of microoperation is sufficient for designing its data path, the
connection between components used for data transfer.
• Direct connection is also called as Direct path.

Q X D Q Y D
Creating a Bus(bus transfer)
• Using a Bus , data are transferred from one register to other registers.

D X Q

D Y Q
• RTL uses a compact notation
Condition : Microoperation

so, the transfer can be written as:-

α:XßY

Q X D Q Y D
LD

CLK α CLK
Use direct connection to show the data
transfer:
1) α : X ß Y ß Z
2) α : Xß Y , Z ßY
Arithmetic and logic micro operations
• ADDITION : Xß X+ Y
• SUBTRACTION : X ß X – Y OR X ß X + Y’ + 1
• INCREMENT: X ßX +1
• DECREMENT : X ß X -1
• AND’ING : X ß X ^ Y
• OR’ING : X ß X ∨ 𝑌
• XOR : X ß X ⨁ Y
• NOT : X ß X’
Shift operations
4 TYPES OF SHIFT

1) LINEAR SHIFT
2) CIRCULAR SHIFT
3) ARITHMETIC SHIFT
4) DECIMAL SHIFT
LINEAR SHIFT
• Linear shift left:
if X = 1011, then performing linear shift left.
shl(X) = 0110

• Linear shift right:

if X = 1011, then performing linear shift right
shr(X) = 0101
Circular shift
Circular shift left:
if X = 1011
then, Cil(X) = 0111

Circular shift right

if X = 1011
then, Cir(X) = 1101
Arithmetic shift
• Arithmetic shift left
if X = 1011
then
ashl(X) = 1110

Arithmetic shift right

if X= 1011
then ashr(X) = 1101
Decimal shift
• It act like linear shift but it works for block of bits rather than single bits.

Decimal shift left:

if X = 1001 0111
then dshl(X) = 0111 0000

Decimal shift right:

if X = 1001 0111
then dshr(X) = 0000 1001
Arithmetic logic shift unit
Thank you!!!