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TL431
TL431
TL431
Series
Programmable Output Voltage to 36 V Voltage Reference Tolerance: 0.4%, Typ @ 25C (TL431B) Low Dynamic Output Impedance, 0.22 Typical Sink Current Capability of 1.0 mA to 100 mA Equivalent FullRange Temperature Coefficient of 50 ppm/C Typical Temperature Compensated for Operation over Full Rated Operating Temperature Range Low Output Noise Voltage
8 1
8 1
ORDERING INFORMATION
Device TL431CLP, ACLP, BCLP TL431CP, ACP, BCP TL431CDM, ACDM, BCDM TL431CD, ACD, BCD TL431ILP, AILP, BILP TL431IP, AIP, BIP TL431IDM, AIDM, BIDM TL431ID, AID, BID TA = 40 to +85C 40 85C TA = 0 to +70C 70C Operating Temperature Range Package TO92 Plastic Micro8
8 1
8 7 6 5
TL431, A, B Series
Symbol
Cathode (K) Reference (R) 800 Anode (A) Reference (R) 800 20 pF
3.28 k 20 pF 7.2 k
150 4.0 k 10 k
+ 2.5 Vref
Unit V mA mA C C
Tstg PD
65 to +150
C W
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, JunctiontoAmbient Thermal Resistance, JunctiontoCase Symbol RJA RJC D, LP Suffix Package 178 83 P Suffix Package 114 41 DM Suffix Package 240 Unit C/W C/W
TL431, A, B Series
ELECTRICAL CHARACTERISTICS (TA = 25C, unless otherwise noted.)
TL431I Characteristic Ch i i Reference Input Voltage (Figure 1) VKA = Vref, IK = 10 mA TA = 25C TA = Tlow to Thigh (Note 1) Reference Input Voltage Deviation Over Temperature Range (Figure 1, Notes 1, 2) VKA= Vref, IK = 10 mA Ratio of Change in Reference Input Voltage to Change in Cathode to Anode Voltage IK = 10 mA (Figure 2), VKA = 10 V to Vref VKA = 36 V to 10 V Reference Input Current (Figure 2) IK = 10 mA, R1 = 10 k, R2 = TA = 25C TA = Tlow to Thigh (Note 1) Reference Input Current Deviation Over Temperature Range (Figure 2, Note 1, 4) IK = 10 mA, R1 = 10 k, R2 = Minimum Cathode Current For Regulation VKA = Vref (Figure 1) OffState Cathode Current (Figure 3) VKA = 36 V, Vref = 0 V Dynamic Impedance (Figure 1, Note 3) VKA = Vref, IK = 1.0 mA to 100 mA f 1.0 kHz Symbol S b l Vref 2.44 2.41 Vref 2.495 7.0 2.55 2.58 2.44 2.423 2.495 3.0 2.55 2.567 mV Min Typ Max Min TL431C Typ Max Unit V
DVref DVKA
Iref Iref 1.8 0.8 4.0 6.5 2.5 1.8 0.4 4.0 5.2 1.2 1.4 1.0 2.7 2.0 1.4 1.0 2.7 2.0
mV/V
mA nA
NOTES: 1. Tlow = 40C for TL431AIP TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431AIDM, TL431IDM, TL431BIDM = 0C for TL431ACP, TL431ACLP, TL431CP, TL431CLP, TL431CD, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM Thigh = +85C for TL431AIP, TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431IDM, TL431AIDM, TL431BIDM = +70C for TL431ACP, TL431ACLP, TL431CP, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM 2. The deviation parameter Vref is defined as the difference between the maximum and minimum values obtained over the full operating ambient temperature range that applies. Vref max Vref = Vref max Vref min TA = T2 T1
Vref min T1 T2
Ambient Temperature
The average temperature coefficient of the reference input voltage, Vref is defined as:
D Vref
ppm V ref _C
x 10 6 ref D TA (V @ 25_C) A ref Vref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature. (Refer to Figure 6.)
ref
@ 25_C
X 10 6
+DT
V ref
Example : DV V
K When the device is programmed with two external resistors, R1 and R2, (refer to Figure 2) the total dynamic impedance of the circuit is defined as: |Z KA |
+ DDVIKA
[ |ZKA|
) R1 R2
TL431, A, B Series
ELECTRICAL CHARACTERISTICS (TA = 25C, unless otherwise noted.)
TL431AI Characteristic Ch i i Reference Input Voltage (Figure 1) VKA = Vref, IK = 10 mA TA = 25C TA = Tlow to Thigh Reference Input Voltage Deviation Over Temperature Range (Figure 1, Notes 1, 2) VKA= Vref, IK = 10 mA Ratio of Change in Reference Input Voltage to Change in Cathode to Anode Voltage IK = 10 mA (Figure 2), VKA = 10 V to Vref VKA = 36 V to 10 V Reference Input Current (Figure 2) IK = 10 mA, R1 = 10 k, R2 = TA = 25C TA = Tlow to Thigh (Note 1) Reference Input Current Deviation Over Temperature Range (Figure 2, Note 1) IK = 10 mA, R1 = 10 k, R2 = Minimum Cathode Current For Regulation VKA = Vref (Figure 1) OffState Cathode Current (Figure 3) VKA = 36 V, Vref = 0 V Dynamic Impedance (Figure 1, Note 3) VKA = Vref, IK = 1.0 mA to 100 mA f 1.0 kHz Symbol S b l Vref 2.47 2.44 Vref 2.495 7.0 2.52 2.55 2.47 2.453 2.495 3.0 2.52 2.537 2.483 2.475 2.495 2.495 3.0 2.507 2.515 mV Min Typ Max Min TL431AC Typ Max Min TL431B Typ Max Unit V
DVref DVKA
Iref Iref 1.8 0.8 4.0 6.5 2.5 1.8 0.4 4.0 5.2 1.2 1.1 0.4 2.0 4.0 1.2 1.4 1.0 2.7 2.0 1.4 1.0 2.7 2.0 1.4 1.0 2.7 2.0
mV/V
mA nA
NOTES: 1. Tlow = 40C for TL431AIP TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431AIDM, TL431IDM, TL431BIDM = 0C for TL431ACP, TL431ACLP, TL431CP, TL431CLP, TL431CD, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM Thigh = +85C for TL431AIP, TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431IDM, TL431AIDM, TL431BIDM = +70C for TL431ACP, TL431ACLP, TL431CP, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM 2. The deviation parameter Vref is defined as the difference between the maximum and minimum values obtained over the full operating ambient temperature range that applies. Vref max Vref = Vref max Vref min TA = T2 T1
Vref min T1 T2
Ambient Temperature
The average temperature coefficient of the reference input voltage, Vref is defined as:
D Vref
ppm V ref _C
V x 10 6 ref (V @ 25_C) A A ref Vref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature. (Refer to Figure 6.)
ref
@ 25_C
X 10 6
+DT
V ref
Example : DV V
K When the device is programmed with two external resistors, R1 and R2, (refer to Figure 2) the total dynamic impedance of the circuit is defined as: |Z KA |
+ DDVIKA
[ |ZKA|
) R1 R2
TL431, A, B Series
Figure 1. Test Circuit for VKA = Vref
Input VKA
IK
Vref
R2 Vref
KA
+ Vref 1 ) R1 ) Iref S R1 R2
VKA IK
IMin
1.0
1.0
2.0
3.0
200 1.0
2.0
3.0
TL431, A, B Series
Figure 8. Change in Reference Input Voltage versus Cathode Voltage
Vref , REFERENCE INPUT VOLTAGE (mV) IK = 10 mA TA = 25C 8.0 Ioff , OFFSTATE CATHODE CURRENT (nA) 0 1.0 k 100 10 1.0 0.1 0.01 55 VKA = 36 V Vref = 0 V VKA Ioff
16
Input R1 IK Vref
VKA
Input
24
R2
32
10
20
30
40
25
25
50
75
100
125
1.0
0.1 1.0 k
10 k
1.0 M
10 M
25
25
50
75
100
125
40 Input 20
Output
100
10 k
100 k
TL431, A, B Series
Figure 14. Pulse Response
3.0 VOLTAGE SWING (V) 2.0 1.0 0 5.0 0 0 4.0 Input 8.0 t, TIME (s) 12 16 20 TA = 25_C Output 140 220 Output 50 Gnd IK , CATHODE CURRENT (mA) Input Monitor Pulse Generator f = 100 kHz 120 100 80 Stable 60 40 20 0 100 pF 1000 pF 0.01 F 0.1 F 1.0 F 10 F D C A) VKA = Vref B) VKA = 5.0 V @ IK = 10 mA C) VKA = 10 V @ IK = 10 mA D) VKA = 15 V @ IK = 10 mA D) TA = 25C Stable A B B A
Figure 17. Test Circuit For Curves B, C, And D of Stability Boundary Conditions
150 IK V+ 10 k CL
TYPICAL APPLICATIONS
Figure 18. Shunt Regulator
V+ R1 Vout
R2 R2 V out
+ 1 ) R1 R2
ref
V out
+ 1 ) R1 R2
ref
TL431, A, B Series
Figure 20. Output Control for a ThreeTerminal Fixed Regulator
MC7805 Out In Common R1
V+
Vout
R2 R2
V out
V+
Iout
V+
I I out V + Rref
Sink
+ VRref
S
CL
RS
R2 R2 V out(trip)
+ 1)
R1 V ref R2 V out(trip)
+ 1 ) R1 R2
ref
TL431, A, B Series
Figure 26. Voltage Monitor
V+ l R1 R3 Vout
Vout Vin R2 R4 Vth = Vref Vin < Vref > Vref V V ref ref Vout V+ 2.0 V
+ 1 ) R1 R2 Upper Limit + 1 ) R3 R4
Lower Limit
5.0 k 1%
50 k 1% 10 k V
500 k 1%
5.0 M 1%
470 F
1.0 k V
100 k V Range RX Rx
1.0 M V
+ Vout D
W
V
5.0 V Range
56 k
10 k
TL431, A, B Series
Figure 30. High Efficiency StepDown Switching Converter
150 mH @ 2.0 A TIP115 1.0 k 4.7 k MPSA20 2200 F 4.7 k 0.1 F 2.2 k 10 51 k 4.7 k 1N5823 0.01F 100 k 470 F + Vout = 5.0 V Iout = 1.0 A
Vin = 10 V to 20 V
Test Line Regulation Load Regulation Output Ripple Output Ripple Efficiency
Conditions Vin = 10 V to 20 V, Io = 1.0 A Vin = 15 V, Io = 0 A to 1.0 A Vin = 10 V, Io = 1.0 A Vin = 20 V, Io = 1.0 A Vin = 15 V, Io = 1.0 A
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TL431, A, B Series
APPLICATIONS INFORMATION
The TL431 is a programmable precision reference which is used in a variety of ways. It serves as a reference voltage in circuits where a nonstandard reference voltage is needed. Other uses include feedback control for driving an optocoupler in power supplies, voltage monitor, constant current source, constant current sink and series pass regulator. In each of these applications, it is critical to maintain stability of the device at various operating currents and load capacitances. In some cases the circuit designer can estimate the stabilization capacitance from the stability boundary conditions curve provided in Figure 15. However, these typical curves only provide stability information at specific cathode voltages and at a specific load condition. Additional information is needed to determine the capacitance needed to optimize phase margin or allow for process variation. A simplified model of the TL431 is shown in Figure 31. When tested for stability boundaries, the load resistance is 150 W. The model reference input consists of an input transistor and a dc emitter resistance connected to the device anode. A dependent current source, Gm, develops a current whose amplidute is determined by the difference between the 1.78 V internal reference voltage source and the input transistor emitter voltage. A portion of Gm flows through compensation capacitance, CP2. The voltage across CP2 drives the output dependent current source, Go, which is connected across the device cathode and anode. Model component values are: Vref = 1.78 V Gm = 0.3 + 2.7 exp (IC/26 mA) where IC is the device cathode current and Gm is in mhos Go = 1.25 (Vcp2) mhos. Resistor and capacitor typical values are shown on the model. Process tolerances are 20% for resistors, 10% for capacitors, and 40% for transconductances. An examination of the device model reveals the location of circuit poles and zeroes: 1 1 P1 7.96 kHz 2p R C 2p * 1.0 M * 20 pF GM P1 P2
Z1
In addition, there is an external circuit pole defined by the load: 1 P L 2p R C L L Also, the transfer dc voltage gain of the TL431 is:
G Example 1: I C
+ GMRGMGoRL
+ GMRGMGoRL + (2.138)(1.0 M)(1.25 m)(230) + 615 + 56 dB 8.25 k Loop gain + G + 218 + 47 dB 8.25 k ) 15 k
G
The resulting transfer function Bode plot is shown in Figure 32. The asymptotic plot may be expressed as the following equation: 1 jf 500 kHz Av 615 1 jf 1 jf 8.0 kHz 60 kHz
The Bode plot shows a unity gain crossover frequency of approximately 600 kHz. The phase margin, calculated from the equation, would be 55.9 degrees. This model matches the OpenLoop Bode Plot of Figure 12. The total loop would have a unity gain frequency of about 300 kHz with a phase margin of about 44 degrees.
11
TL431, A, B Series
Figure 31. Simplified TL431 Device Model
VCC
RL
CL 3 Cathode RP2 10 M Rref 16 GM RGM 1.0 M CP1 20 pF RZ1 15.9 k Go 1.0 mmho CP2 0.265 pF
Vref 1.78 V +
Anode
Note that the transfer function now has an extra pole formed by the load capacitance and load resistance. Note that the crossover frequency in this case is about 250 kHz, having a phase margin of about 46 degrees. Therefore, instability of this circuit is likely. Figure 33. Example 2 Circuit Open Loop Gain Plot
TL431 OPENLOOP BODE PLOT WITH LOAD CAP 80 Av, OPENLOOP GAIN (dB)
60 40 20 0 20
f, FREQUENCY (Hz)
IC = 7.5 mA, RL = 2.2 kW, CL = 0.01 mF. Cathode tied to reference input pin. An examination of the data sheet stability boundary curve (Figure 15) shows that this value of load capacitance and cathode current is on the boundary. Define the transfer gain. The DC gain is:
Example 2.
101
102
103
104
105
106
f, FREQUENCY (Hz)
The resulting open loop Bode plot is shown in Figure 33. The asymptotic plot may be expressed as the following equation: 1 jf 500 kHz Av 615 1 jf 1 jf 1 jf 8.0 kHz 60 kHz 7.2 kHz
) )
With three poles, this system is unstable. The only hope for stabilizing this circuit is to add a zero. However, that can only be done by adding a series resistance to the output capacitance, which will reduce its effectiveness as a noise filter. Therefore, practically, in reference voltage applications, the best solution appears to be to use a smaller value of capacitance in low noise applications or a very large value to provide noise filtering and a dominant pole rolloff of the system.
12
TL431, A, B Series
OUTLINE DIMENSIONS
LP SUFFIX PLASTIC PACKAGE CASE 2904 (TO92) ISSUE AE
A R P
SEATING PLANE
L K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. DIMENSION F APPLIES BETWEEN P AND L. DIMENSION D AND J APPLY BETWEEN L AND K MINIMUM. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. DIM A B C D F G H J K L N P R V INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.022 0.016 0.019 0.045 0.055 0.095 0.105 0.015 0.020 0.500 0.250 0.080 0.105 0.100 0.115 0.135 MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.41 0.55 0.41 0.48 1.15 1.39 2.42 2.66 0.39 0.50 12.70 6.35 2.04 2.66 2.54 2.93 3.43
X X G H V
1
D J C SECTION XX N N
B
1 4
F
NOTE 2
A L
C T
SEATING PLANE
J N D K
M
M T A B
G 0.13 (0.005)
M M
13
TL431, A, B Series
OUTLINE DIMENSIONS
DM SUFFIX PLASTIC PACKAGE CASE 846A02 (Micro8) ISSUE D
NOTES: 6. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 7. CONTROLLING DIMENSION: MILLIMETER. 8. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 9. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028
PIN 1 ID
G D 8 PL 0.08 (0.003)
M
T B
SEATING PLANE
0.038 (0.0015) H
C J L
DIM A B C D G H J K L
D
5
E
1 4
0.25
h B C e A
SEATING PLANE
X 45 _
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_
L 0.10 A1 B 0.25
M
C B
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TL431, A, B Series
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TL431, A, B Series
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TL431/D