The document outlines topics to be covered in Module 1, including differentiating microprocessors and microcontrollers, explaining the architecture of ARM-based microcontrollers through diagrams, describing the ARM core dataflow model and CPSR register fields, explaining the modes of operation and pipeline stages of ARM processors, discussing interrupts and exceptions, vector tables, Von Neumann and Harvard architectures with caching, and the RISC and ARM design philosophies through important rules and principles.
The document outlines topics to be covered in Module 1, including differentiating microprocessors and microcontrollers, explaining the architecture of ARM-based microcontrollers through diagrams, describing the ARM core dataflow model and CPSR register fields, explaining the modes of operation and pipeline stages of ARM processors, discussing interrupts and exceptions, vector tables, Von Neumann and Harvard architectures with caching, and the RISC and ARM design philosophies through important rules and principles.
The document outlines topics to be covered in Module 1, including differentiating microprocessors and microcontrollers, explaining the architecture of ARM-based microcontrollers through diagrams, describing the ARM core dataflow model and CPSR register fields, explaining the modes of operation and pipeline stages of ARM processors, discussing interrupts and exceptions, vector tables, Von Neumann and Harvard architectures with caching, and the RISC and ARM design philosophies through important rules and principles.
2. With a neat diagram explain the ARM based embedded device microcontroller. 3. Explain ARM core dataflow model with a neat diagram. 4. Explain the various fields in current program status register (CPSR) with neat diagram. 5. Explain the various modes of operation of ARM processor. 6. With neat diagram explain the various blocks in a 3 stage pipeline of ARM processor organization. Explain briefly pipeline execution characteristics. 7. Explain interrupt, exception and vector table. 8. Discuss the following with neat diagrams a. Von Neumann architecture with cache b. Harvard architecture with TCM 9. Explain RISC design philosophy. Explain the important design rules of RISC philosophy. 10. Explain ARM design philosophy