COURSEPACK

SCHEME
The scheme is an overview of work-integrated learning opportunities and gets students out
into the real world. This will give what a course entails.

Course Title Introduction to Digital Systems Course Type Integrated

Course Code G2UC101B Class B.Tech
Activity Credits Credit Hours Total Number of Assessment in
Classes per Semester Weightage
Lecture 2 2
Instruction Tutorial

Practical
Practical
Tutorial
Theory
delivery

study
Self-
Practical 1 2

SEE
CIE
Self-study
Total 3 4
30 15 50% 50%
Course Lead Mrs. Divya Sharma Course
Coordinator
Names Theory Practical
Course Dr. Usha Chauhan, Dr. Jeba Das, Dr. Rashid Dr. Usha Chauhan, Dr. Jeba Das, Dr.
Instructors Ansari, Dr. Kuldeep, Dr. K. Midya, Mr. PK Rashid Ansari, Dr. Kuldeep, Dr. K.
Srivastav Midya, Mr. PK Srivastav

COURSE OVERVIEW

This course has been designed to make the students know about the fundamental principles of digital
electronics and gain familiarity with the available IC chips. This subject aims to give a background in
the broad field of digital systems design and microprocessors.

PREREQUISITE COURSE

PREREQUISITE COURSE No
REQUIRED
If, yes please fill in the Details Prerequisite Prerequisite
course code course name

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 COURSE OBJECTIVE

• To familiarize with number system and binary operations.

•To build simple logic circuits using basic gates as well as able to simplify
Boolean functions by using the basic Boolean properties.

• To design simple combinational logics using basic gates and to optimize Boolean
logic using Karnaugh maps.

• To introduce the basic sequential logic components: SR Latch, D Flip-Flop and

their usage and make the students able to analyse sequential logic circuits.

COURSE OUTCOMES (COs)

After the completion of the course, the student will be able to:

CO No. Course Outcomes

101.1 UNDERSTAND the basic concepts of digital electronics.
101.2 APPLY the basic knowledge acquired through Boolean expressions & logic
structures in Digital System Design.
101.3 ANALYZE the digital circuits and optimize it based on the applications.
101.4 DESIGN & Implementation of digital systems using suitable digital components.

BLOOM’S LEVEL OF THE COURSE OUTCOMES:

INTEGRATED
Remember Understand Apply Analyse Evaluate Create
CO No.
KL1 KL 2 KL 3 KL 4 KL 2 KL 6
101.1 ×
101.2 ×
101.3 ×
101.4 ×

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PROGRAM OUTCOMES (POs):

PO1 Engineering knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals, and an engineering specialization to the solution of complex engineering
problems.

PO2 Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.

PO3 Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.

PO4 Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis
of the information to provide valid conclusions.

PO5 Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering
activities with an understanding of the limitations.

PO6 The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant
to the professional engineering practice.

PO7 Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.

PO8 Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.

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PO9 Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.

PO10 Communication: Communicate effectively on complex engineering activities with the

engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give
and receive clear instructions.

PO11 Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member
and leader in a team, to manage projects and in multidisciplinary environments.

PO12 Life-long learning: Recognize the need for, and have the preparation and ability to engage
in independent and life- long learning in the broadest context of technological change.

PSO1 Electronic System Development: Develop real time applications using Printed Circuit
Board and Integrated Circuits.
PSO2 Communication System Development: Develop Communication Systems and
applications using IoT, Artificial Intelligence and Machine Learning algorithms.

COURSE ARTICULATION MATRIX

The Course articulation matrix indicates the correlation between Course Outcomes and Program
Outcomes and their expected strength of mapping in three levels (low, medium, and high).
PO10

PO11

PO12

PSO1

COs#/ PSO2
PO1

PO2

PO3

PO4

PO5

PO6

PO7

PO8

PO9

POs

101.1 3 1
101.2 3
3 1
101.3 2
3 1
101.4 3 3 2 1 2 1 1 2
3 2
Note: 1-Low, 2-Medium, 3-High

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 COURSE ASSESSMENT
The course assessment patterns are the assessment tools used both in formative and summative
examinations.

Assessment CIE
Tools QUIZ1 CAT1 QUIZ2 CAT2 LAB LAB Course- Total
based CIE
/AAT AAT EXAM
Project marks SEE

Integrated X X X X

0 30 0 30 20 20 0 100 100

* Assignment, Quiz, Class test, SWAYAM/NPTEL/MOOCs and etc.

COURSE CONTENT
THEORY+ PRACTICAL

Content
Syllabus/Course contents:
Number Systems & Boolean Algebra
Decimal, binary, octal, hexadecimal number system and conversion, signed numbers, 1s and
2s complement codes, Binary arithmetic, Binary logic functions, Boolean laws, truth tables,
associative and distributive properties, De-Morgan’s theorems, realization of switching
functions using logic gates.

Combinational Logic:
Switching equations (Mathematical operations), canonical logic forms, sum of product &
product of sums, Karnaugh maps, two, three and four variable Karnaugh maps, simplification
of expressions, mixed logic combinational circuits, multiple output functions.
Introduction to combinational circuits, code conversions, decoder, encoder, priority encoder,
multiplexers & De-multiplexer, binary adder, Subtractor, BCD adder.
Sequential Logic & Circuits:
Latch, flip-flops, clocked and edge triggered flip-flops, timing specifications, asynchronous and
synchronous counters counter design, Registers, types of registers. Analysis of simple
synchronous sequential circuits.

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PRACTICAL

• Verification of the truth tables of TTL gates.

• Verify the NAND and NOR gates as universal logic gates.
• Design and verification of the truth tables of Half and Full adder circuits.
• Design and verification of the truth tables of Half and Full subtractor circuits.
• Verification of the truth table of the Multiplexer 74150.
• Verification of the truth table of the De-Multiplexer 74154.
• Design and test of an S-R flip-flop using NOR/NAND gates.
• Verify the truth table of a J-K flip-flop (7476).

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LESSON PLAN FOR COMPREHENSIVE COURSES
FOR THEORY 15 weeks * 3 Hours = 45 Classes) (1credit = 1Lecture Hour)
FOR PRACTICAL 15 weeks * 2Hours = 30 Hours lab sessions (1 credit = 2 lab hours)

L-No Topic for Delivery Tutorial/ Skill Competency

Practical
Plan
1 Introduction to digital Tutorial Apply the Concept of Students will
electronics number system be able to
2 Decimal, binary, octal, Tutorial design and
hexadecimal number system implement
and conversion- code various types
conversion Problems of
3 Verification of the truth table Practical Optimization of logic combinationa
of TTL Logic gates. circuits using Boolean l circuits &
4 Binary arithmetic – Addition Tutorial function sequential
& Subtraction simplification circuits.
5 Boolean laws, truth tables, Tutorial
expression, circuit
6 Verify the NAND and NOR Practical
gates as Universal logic gates
7 De-Morgan’s theorems Tutorial
8 realization of switching Tutorial
functions using logic gates
9 Design and Verification of Practical Design combinational
the truth table of Half and circuit for various
Full adder circuit. applications in digital
systems
10 Switching equations Tutorial Analyze simplified
(Mathematical operations) form of Boolean
11 canonical logic forms, sum Tutorial function
of product & product of sums
12 Design and Verification of Practical Design combinational
the truth table of Half and circuit for various
Full subtractor circuit. applications in digital
systems
13 canonical logic forms, sum Tutorial Analyze simplified
of product & product of sums form of Boolean
14 Karnaugh maps, two, three Tutorial function
and four variable Karnaugh
maps
15 Verification of the truth table Practical Design combinational
of Multiplexer 74150 circuit for various
applications in digital
systems
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16 k-map problems Tutorial Analyze simplified
form of Boolean
function
17 Introduction to Tutorial Design combinational
combinational circuits circuit for various
18 Verification of the truth table Practical applications in digital
of De-Multiplexer 74154 systems
19 Decoder & encoder Tutorial
20 multiplexers Tutorial
21 Design and test of an S-R Practical Design 1 bit memory
flip-flop using NOR/NAND using various Flip-
gates Flops
22 De-multiplexer Tutorial Design combinational
23 binary adder & Subtractor Tutorial circuit for various
applications in digital
systems
24 Verify the truth table of J-K Practical Design 1 bit memory
flip-flop(7476) using various Flip-
Flops
25 BCD adder Tutorial Design combinational
26 carry look ahead adder Tutorial circuit for various
applications in digital
systems
27 Verify the truth table of d Practical Design 1 bit memory
flip-flop(7474) using various Flip-
Flops
28 Binary comparator Tutorial Design combinational
29 Arithmetic Logic Units Tutorial circuit for various
applications in digital
systems
30 Design of MOD-10, UP and Practical Design different types
DOWN Counter of counter circuits
31 Introduction to sequential Tutorial Design 1 bit memory
circuits using various Flip-
32 Latch, flip-flops- T & D Tutorial Flops
33 Design digital systems by Practical
choosing suitable modeling
tools.
34 JK flipflop Tutorial
35 SR flipflop Tutorial
36 Value Added Project by Practical Design different types
students group of counter circuits
37 clocked and edge triggered Tutorial
flip-flops, timing
specifications
38 asynchronous and Tutorial
synchronous counters
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 counter design
39 Value Added Project by Practical
students group
40 UP, DOWN, UP/Down Tutorial
counter
41 Introduction to Registers, Tutorial Design of registers to
types of registers save and move data
42 Value Added Project by Practical
students group
43 Analysis of simple Tutorial
synchronous sequential
circuits
44 Analysis of simple Tutorial
synchronous sequential
circuits
45 Value Added Project by Practical
students group

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 BIBLIOGRAPHY

Text Book - Mano, Morris. "Digital logic." Computer Design.

Reference Books - Modern digital electronics by R.P Jain, TMH

Digital fundamentals by Floyd and Jain, Pearson

SWAYAM/NPTEL/MOOCsCertification-
https://onlinecourses.swayam2.ac.in/cec23_cs11/preview
https://onlinecourses.nptel.ac.in/noc21_ee10/preview

Journals/Magazines/Govt. Reports/Gazatte/Industry Trends -

http://www.engpaper.com/electronics.html
http://www.newelectronics.co.uk/digital-magazine/

PROBLEM-BASED LEARNING

Exercises in Problem-based Learning (Assignments)

S. Problem Statement KL
No
1 K2
Identify the operation performed by the following gates
(a) (b)

2 “NAND & NOR gates called universal gates”, Illustrate. K3

3 Recognize the highest single digit number in the following number system: K2
(a) Decimal Number System
(b) Binary Number System
(c) Octal Number System
(d) Hexadecimal Number System
Write the smallest TWO digit number in the following number systems
a. Binary
b. Octal
c. Hexadecimal

4 Differentiate Signed Binary number and Unsigned Binary number? K2

Represent +127 and -127 using 8-bit 1’s compliment form.

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5 Solve the following using Binary Arithmetic operations: K3
(a) Addition: (b) Subtraction:
0 1 1 1 1 1 0
+ 1 0 1 - 1 0 0 1
------------------------------- ---------------------------------
------------------------------- ---------------------------------

6 Write the symbol, truth table, Boolean expression for following logic gates: K2
(i) NAND Gate (ii) XOR Gate

7 Subtract (5)10 from (9)10, Using 2’s complement method. K2

Subtract (9)10 from (4)10, Using 2’s complement method.
8 With neat sketch, realize the expression Y = AB + CD by NAND gates K3
only.
9 Sketch the equivalent circuit of NAND, AND & NOT logics using NOR K2
gate.
10 Y = ABC + BC’D + A’BC K3

Simplify this equation and realize using basic gates.

Realize the simplified equation using only NOR gates.
11 (A) Implement 8:1 multiplexer with the help of its truth table and Boolean K2
expression.
(B) Make a combinational circuit that converts a 4-bit Gray Code number to
4-bit straight binary number.
12 Represent the decimal number 27, 396, 1046 in binary using (i) Binary code K3
(ii) BCD code (iii) Excess-3 Code (iv) Gray Code.
13 Make a K-map for the function f= AB+AC’+C+AD+AB’C+ABC. (b) K3
Express ‘f’ in standard SOP form.
14 Minimize the four-variable logic function using K-Map, K3
.
15 Minimize the four-variable logic function using K-Map, K3

.
16 Minimize the four-variable logic function using K-Map, K3
.
Minimize the four-variable logic function using K-Map,
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 .
17 Convert AB+AC’+BC into standard SOP form. K4
Convert (A+B).(A+C).(B+C’) into standard POS form.
18 Design a Binary-to-Gray code converter. K4
19 Design a Gray-to-Binary code converter. K4
20 Design a BCD to Excess-3 code converter using minimum number of K4
NAND gates and justify In what way is a BCD adder different from a
binary adder?
21 Design a full adder using two half adders. K4
22 Explain a full subtractor circuit and find out its outputs. Show how it can be K4
realized using two half subtractors.
23 Draw and explain the circuit diagram of BCD adder. K4
24 Design a 4:1 multiplexer using NAND gates only. K4
25 Implement 3:8 Decoder with the help of its truth table and Boolean K4
expression.
26 Implement 8:3 Encoder with the help of its truth table and Boolean K4
expression.
27 Design a combinational circuit that converts a 4-bit Gray Code number to 4- K2
bit straight binary number.
28 What is the difference between encoder and decoder? Outline their K2
limitations.
29 Design a logic circuit that has three inputs, A,B and C, and whose output K4
will be HIGH when a majority of the inputs are HIGH.
30 Design a logic circuit that will allow a signal to pass to the output only K4
when control inputs B & C are both HIGH, otherwise, the output will stay
LOW.
31 Consider the SOP equation x=A'BC'D + A'BCD' + AB'CD' + AB'CD + K3
ABC'D' = ABC'D + ABCD'.
(a) Use a K-map to produce the simplest SOP solution.
(b) How can you represent the above equation using XOR gates in
combination with other gates? Draw a circuit diagram of your solution using
XOR gates.
32 (A) Draw a logic implementation of clocked RS flipflop. K2
(B) Differentiate between a latch & a flipflop.
(C) Compare T flipflop with D flipflop.
33 (a) Differentiate between asynchronous & synchronous counter. K2

(b) Is PRESET & CLEAR are asynchronous input? Justify your answer.
34 1. Draw a logic implementation of clocked JK flipflop. K3

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 2. Write down the applications of Flipflops & counters.
35 What are counter with arbitrary count sequence? Briefly describe the K2
process for designing a counter with a given arbitrary count sequence.
36 List down the different types of flip flop. What do you mean by edge K2
triggered flipflop?
37 Differentiate between UP, DOWN & UP/DOWN counter. K2
38 A) Calculate (a) 1-bit (b) 2-bit (c) 3-bit Excess-3 codes and tabulate along K3
with their equivalent decimal numbers.
(B) Minimize the four-variable logic function using K-Map, f(A,B,C,D) =
(A+B+C’+D’).(A’+C+D’).(A’+B+C’+D’).(B’+C’).(B’+C).(A+B’).(B’+D’)
39 Minimize the four-variable logic function using K-Map, f(A,B,C,D) = K3
SOP(0,1,2,3,5,7,8,9,11,14) and realize it using NOR gates only.
40 Design a logic circuit that will allow a signal to pass to the output only K4
when control inputs B & C are both HIGH, otherwise, the output will stay
LOW.

STUDENT-CENTERED LEARNING (SELF-LEARNING TOWARDS LIFE-LONG-LEARNING)

Self-Learning (it’s a typical course-based project to be carried out by a whole class in groups of four
students each; they should exhibit higher level KLs)

The students, in a group, are expected to conceive an idea based on the content (objectives/outcomes)
and apply the suitable knowledge to demonstrate their learning.

A list of 30-40 project statements can be offered to the students to choose or students can conceive their
own ideas (teamwork), design and develop the product/process/service and implement the same.

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A) COURSE-BASED PROJECT (Psychomotor skills)

To enhance their skill set in the integrated course, the students are advised to execute course-based
design projects. Some sample projects are given below:

LNo Suggested Projects Statement KL

1 Design a self-correcting vehicle logic circuit K6
2 Design a Logisim circuit to turn on light. K6
3 Using the 2-bit adder, implement a 4-bit & 8-bit adder in Logisim. K4
4 Implement the half adder circuit on the breadboard. K4
5 Implement the full adder circuit on the breadboard. K4
6 DeMorgan’s Law: K3

Show that DeMorgan’s Law is correct for two variables, (A’B’)’ = truth table.

Does DeMorgan’s Law hold for 3 variables? What about 4 variables?

7 The operations AND, OR, and NOT are universal in that any Boolean function K3
can be implemented using just these three gates.

1. Prove by construction that the NAND gate is universal by

creating AND, OR, and NOT gates using only the NAND gate.
2. Prove by construction that the NOR gate is also universal.
3. Why are the AND and OR gate not universal? (e.g. what simple
operation cannot be created with just an AND or OR gate?)

8 For inputs A and B, show how to use an XOR gate to create a NOT gate if B is K2
1, and a buffer if B is 0.
9 XOR is sometimes called an “odd” function because the result of an XOR is 1 K2
if the number of 1’s the minterm is odd, the xor is 1, otherwise it is 0. Show
that this is true for 3 and 4 variable XOR functions, e.g. A ⊕ B ⊕ C, and A ⊕
B ⊕ C ⊕ D.
10 Implement the 2-to-4 decoder using 7404 (NOT) an 7808 (AND) chips on your K4
breadboard.
11 Implement the 2-to-4 decoder circuit with a 74139 chip on your breadboard. K4
12 Implement a 1-to-2 decoder in Logisim. Implement this circuit on your K4
breadboard.
13 Implement a 3-to-8 decoder using NOT and AND gates in Logisim. Show that K4
it is correct by showing it generates the same output as a 3-to-8 Decoder found
in the Plexors menu of Logisim.
14 In Logisim, implement a 3-to-8 decoder using two 2-to-4 decoders, and as K4
many AND gates as you need. Compare the total number of AND gates in the

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 circuit to the number of AND gates used to implement the 3-to-8 decoder with
2-input AND gates.
15 Answer the following questions. K2

a. How many output lines would a 4 input decoder have?

b. How many output lines would a 5 input decoder have?
c. For an N-to-X decoder, specify X as a function of N (e.g. specify the
number of output lines as a function of the number of input lines for a
decoder).
16 Implement a 1 bit 4-to-1 MUX using the 74139 decoder chip. This will require K4
both the 74139 decoder and 7404 inverter chip.
17 Implement the 1 bit 4-to-1 MUX using the 74139 decoder chip, but do not use K4
an inverter on the 74139 output. Instead use the enable low outputs from the
74139 chip directly. This allows the circuit to be implemented using only 3
chips, a 74139, a 7402, and a 7432 chip.
18 Implement a 1 bit 4-to-1 MUX using the 74153 chip. K4
19 Explain how a 1 bit 4-to-1 MUX can calculate any binary Boolean function. K4
Because the MUX can calculate the result of any Boolean function, we call the
MUX a univeral operation.
20 In Logism implement an 8 bit 4-to-1 MUX using 8 , 4-to-1 MUXes. K4
21 In Logisim implement an 8-to-1 MUX using 2 4-to-1 MUXes and a 2-to-1 K4
MUX.
22 In Logisim implement an 8-to-1 MUX using 4 2-to-1 MUXes and a 4-to-1 K4
MUX
23 In Logisim implement a circuit, but which produces output which is the K4
opposite of the input switch (e.g. the LEDs are 0 when the switch is 1, and 1
when the switch is 0). Change the program in the breadboard to match this new
logic.
24 Implement the D latch to include an enable line using Logisim. The enable line K4
will be used to control when the D latch is set, so it is only set if the clock and
enable line are high.
25 Implement the D latch to include a synchronous clear line using Logisim. will K4
set the value of the D latch to 0 on the next clock pulse.
26 Implement a D flip-flop using the 7475 chip. K4
27 Implement the following up counters in Logisim: K4

1. Mod 6 counter
2. Mod 8 counter
3. Mod 10 (decade) counter.

28 Implement a Mod 4 down counter, or a counter which counts 11->10->01->00- K4

>11. This counter will require that you modify the state diagram, state
transition table, and your program. For this problem submit the state diagram,
state transition table, Logisim diagram, and implemented circuit.
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 29 Implement a D flip-flop using the 7475 chip. K4
30 Implement a Mod 4 up counter using the 74153 chip to implement the next K4
state logic.
31 Turning ON/OFF appliances by a sound of clap K4
32 Automatic Street Light K4
33 Temperature Display using LCD K4
34 Rain Alarm K4
35 Automatic wiper design K4

SELF-LEARNING THROUGH MOOCs (Cognitive Skills):

https://onlinecourses.swayam2.ac.in/cec23_cs11/preview
https://onlinecourses.nptel.ac.in/noc21_ee10/preview

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