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Basics of FVF
Basics of FVF
The basic FVF cell [1] is a modification of the source follower. It is frequently
used as a voltage buffer. In case of source follower shown in Fig.6 (a) [1] if
body effect is neglected the circuit follows the input voltage with a dc level
shift, i.e., Vo=Vi + VSGM1, where VSGM1 is the source-to-gate voltage of
transistor M1. Concerning large-signal behaviour, this circuit can sink large
current from the load, but the biasing current source limits the sourcing
capability. A drawback of this circuit is that current through transistor M1
depends on the output current, so that VSGM1 is not constant and, hence, for
resistive loads, the voltage gain is less than unity. A similar problem occurs
with capacitive loads at high frequencies.
Fig.2 (a) Flipped voltage follower Fig.2 (b) Open loop gain analysis of FVF cell
The circuit in Fig.2 (b) also operates as a source follower where the current
through transistor M1 is held constant, independent on the output current. It
could be described as a voltage follower with shunt feedback topology.
Neglecting body effect and the short channel effect, and by keeping VSGM
constant, voltage gain is obtained as unity.
Unlike the conventional voltage follower, the circuit in Fig.1 (b) is able to
source a large amount of current, but its sinking capability is limited by the
biasing current source Ib . The large sourcing capability is due to the low
impedance at the output node which is given by
rout = 1/gm1 gm2 ro1 (1)
(5)
Substituting Vs1 from eq. (5)in eq. (2) and rearranging Vy and Iy
(6)
(7)
Using approximation gm1 ro1 >> 1 (8)
gm2 ro2 >> 1 (9)
(10)
The resistance ROLY can be calculated directly using the output resistance of
common gate amplifier ( 1+gmro)Rs +ro
For the above circuit ro =ro1, Rs=ro2, gm=gm1
Gives ( 1+gm1ro1)Rs +ro2 (11)
Using approximation as given in (8) and (9)
ROLY= rb( ׀׀gm1 ro1ro2) (12)
Resistance at node X
(13)
(14)
(15)
(17)
(18)
(19)
2
= (22)
𝑔𝑚1𝑔𝑚2 𝑟𝑜1
(23)
(24)
In both cases it is observed that CLX R is a very low resistance.
VALID RANGE OF OPERATION FOR THE INPUT SIGNAL
FVF can be operated at a very low voltage supply.
From Fig.6 (b)
VSDM2 = VSM2- VDM2 =VDD -VSM1 (25)
(26)
Where Io is the drain current (Ib in this case), kp = µnCox, and VTP is the
transistor threshold voltage. For saturation of M2
(27)
(28)
Now, assuming M2 is in saturation, and neglecting second order effects, the
condition of saturation for transistor M1 is given by the following analysis:
(29)
(30)
(31)
From Eq. (29) and (30) we get the valid range of operation for the input signal
(32)
It is clear from (32) that the valid input signal range decreases with the
transistor threshold voltage, which limits the applications of the FVF in deep
submicron technologies. A dc level shifter between node Y and the gate of
transistor M2 can be used to overcome this problem but at the cost of increased
power consumption, and reduced bandwidth.