The diode does not operate until the source voltage reaches 0.7 V due to the battier potential.

The bridge
rectifier utilises two diodes at once, hence the peak output voltage is given by:
𝑉𝑝𝑒𝑎𝑘 = 𝑉𝑚𝑎𝑖𝑛𝑠 − 1.4 𝑉

fig. 3

(iii) To obtain a stable and constant DC voltage, we need to filter the full-wave signal. To do so, we can
attach a capacitor in parallel with the load resistor as shown in fig. 4. Originally, the capacitor is not charged.
When the diodes 𝐷2 and 𝐷4 are in forward bias, the capacitor starts charging. The charging lasts until the
input achieves its peak value, 𝑉𝑝𝑒𝑎𝑘 . After the source voltage reaches its peak, it starts to decrease. Once
the source voltage is less than 𝑉𝑝𝑒𝑎𝑘 , the voltage across the capacitor surpasses the input voltage, switches
off the diodes, and results in the capacitor discharging through the load until the next peak is reached.

fig. 4

2. (i) For 𝑉𝑆 = 0 𝑉 ⇒ 𝐼𝐵 = 0 𝐴, the BJT will be in cutoff(acts as an open switch), therefore no current will flow
through the transistor. Since there is no collector current, the LED does not emit light.
For 𝑉𝑆 = 5 𝑉, the transistor is on. We know that 𝑉𝐵𝐸 ≅ 0.7 𝑉 and therefore:
𝑉𝑅𝐵 = 𝑉𝑆 − 𝑉𝐵𝐸 = 5 𝑉 − 0.7 𝑉 = 4.3 𝑉

𝑠𝑖𝑛𝑐𝑒 𝑅𝐵 = 103 Ω

𝑉𝑅𝐵
𝐼𝐵 =
𝑅𝐵

4.3 𝑉
=
103 Ω

= 4.3 𝑚𝐴

(ii) When the input voltage is 0 V, the BJT is in cutoff, therefore it performances as an open switch and no
current will flow through. This results in the LED being off. On the other hand, if the voltage in is 5 V, the
BJT saturates, meaning the BJT is in forward bias and the resulting collector through the LED causes to
emit light.
3. The voltage 𝑉𝐷𝑆 𝑠𝑎𝑡 for which the transistor enters into the saturation region is given by:
𝑉𝐷𝑆 𝑠𝑎𝑡 = 𝑉𝑂𝑉
= 𝑉𝐺𝑆 − 𝑉𝑡
= 2.5 𝑉 − 1 𝑉
= 1.5 𝑉
The current 𝐼𝐷 , obtained into the saturation region is given by:
1
𝐼𝐷 = ∙ 𝐾 ∙ 𝑉2
2 𝑛 𝑂𝑉
1
= ∙ 𝐾 ∙ 𝑉2
2 𝑛 𝐷𝑆 𝑠𝑎𝑡
1 𝐴
= ( × 10−3 2 ) × (1.52 𝑉 2 )
2 𝑉
= 1.12 𝑚𝐴
The zero depth of this channel at the drain end provides rise to term channel pinch-off. Increasing 𝑣𝐷𝑆
beyond the saturation value has no result on the channel form and charge and the current through the
channel stays at a constant achieved value for 𝑣𝐷𝑆 = 𝑉𝑂𝑉 .

4. From the figure, we see that the source is grounded (𝑉𝑆 = 0 𝑉), and the gate voltage is 𝑉𝐺 = 1.8 𝑉. The
formula for the drain current is:
1 ′ 𝑊 2
𝐼𝐷 = ∙ 𝑘 ∙ ( ) ∙ 𝑉𝑂𝑉 (1)
2 𝑛 𝐿
And for the resistance:
𝑉𝐷𝐷 − 𝑉𝐷𝑆 𝑉𝐷𝐷 − 𝑉𝐷𝑆
𝑅𝐷 = ⇒ 𝐼𝐷 = (2)
𝐼𝐷 𝑅𝐷
Combining (1) and (2), we get:
𝑉𝐷𝐷 − 𝑉𝐷𝑆 1 ′ 𝑊 2
= ∙ 𝑘𝑛 ∙ ( ) ∙ 𝑉𝑂𝑉
𝑅𝐷 2 𝐿
𝑊
𝑉𝐷𝐷 − 𝑉𝐷𝑆 = 𝑘𝑛′ ∙ 𝑅𝐷 ∙ ( ) ∙ (𝑉𝐺𝑆 − 𝑉𝑡 )2 (3)
𝐿
We know that:
𝑉𝐷𝑆 ≥ 𝑉𝑂𝑉
𝑉𝐷 − 𝑉𝑆 ≥ 𝑉𝐺𝑆 − 𝑉𝑡
𝑉𝐷 − 𝑉𝑆 ≥ 𝑉𝐺 − 𝑉𝑆 − 𝑉𝑡
𝑉𝐷 − 0 ≥ 1.8 − 0 − 0.5
𝑉𝐷 ≥ 1.3
When we are at the edge of saturation we have: 𝑉𝐷 = 1.3 𝑉
Hence equation (3) becomes:
𝑊 𝑉𝐷𝐷 − 𝑉𝐷
𝑅𝐷 ∙ ( ) = 2 ∙ ′
𝐿 𝑘𝑛 ∙ (𝑉𝐺𝑆 − 𝑉𝑡 )2
2 ∙ (1.8 − 1.3)
= Ω
0.4 ∙ 10−3 ∙ (1.8 − 0.5)2
= 1.48 kΩ

5. Firstly, we can calculate the emitter current:

0.7 − (−10)
𝐼𝐸 = 𝐴
104
10.7
= 𝐴
104
= 1.07 𝑚𝐴
Using the emitter current and 𝛽, we can calculate the collector current:
𝛽
𝐼𝐶 = ∙𝐼
𝛽+1 𝐸
50
= ∙ 1.07 ∙ 10−3 𝐴
50 + 1
= 1.05 𝑚𝐴
Using the collector current, we can calculate the base current:
𝐼𝐶
𝐼𝐵 =
𝛽
1.05 ∙ 10−3
= 𝐴
50
= 2.1 ∙ 10−5 𝐴
= 21 𝜇𝐴
Hence, knowing the collector current, we can calculate the collector voltage:
10 − 𝑉𝐶
𝐼𝐶 =
5 ∙ 103
⇒ 𝑉𝐶 = 10 − 5 ∙ 103 ∙ 𝐼𝐶

= (10 − 5 ∙ 103 ∙ 1.05 ∙ 10−3 )𝑉

= 4.75 𝑉
References:
(‘The Full-Wave Bridge Rectifier - Last Minute Engineers’, 20/12/2020)
Anon (n.d.) The Full-Wave Bridge Rectifier - Last Minute Engineers [online]. Available from:
https://lastminuteengineers.com/the-full-wave-bridge-rectifier/?cv=1 (Accessed 20 December 2020).