AN ADVANCED AUTOMATIC TOLL-GATE

CONTROLLER SYSYEM BASED ON CARD BY

ACCESS USING VERILOG HDL

A Major Project Report Submitted to

JNTU Hyderabad in partial fulfillment of
the requirements for the award of the degree

BACHELOR OF TECHNOLOGY
In
ELECTRONICS AND COMMUNICATION ENGINEERING

Submitted by

BODDU SRIJA 18RG1A04C6

CHETTI RISHIKA 18RG1A04D3

GANDHAM PRASANNA LAKSHMI 18RG1A04D7

GOLLAPELLY RAMYA 18RG1A04D9

Under the Guidance of

Ms. K.MANASA
B.Tech., M.Tech
Associate Professor

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

MALLA REDDY COLLEGE OF ENGINEERING FOR WOMEN
(Approved by AICTE New Delhi and Affiliated to JNTUH)
ALL B.Tech Programs (CSE,ECE) Accredited by NBA
An ISO 9001: 2015 Certified Institution
Maisammaguda, Medchal (M), Hyderabad-500100, T.S. JUNE 2022
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
MALLA REDDY COLLEGE OF ENGINEERING FOR WOMEN

(Approved by AICTE New Delhi and Affiliated to JNTUH)

ALL B.Tech Programs (CSE,ECE) Accredited by NBA
An ISO 9001: 2015 Certified Institution
Maisammaguda, Medchal (M), Hyderabad-500100, T.S.
JUNE 2022

CERTIFICATE

This is to certify that, the major-project entitled “ IMPLEMENTATION OF

HIGH SPEED LOW POWER COMBINATIONAL AND SEQUENTIAL
CIRCUIT USING REVERSIBLE LOGIC ’’ has been submitted by Boddu
Srija (18RG1A04C6), Chetti Rishika(18RG1A04D3), Gandham Prasanna
lakshmi (18RG1A04D7), Gollapelly Ramya(18RG1A04D9) in partial
fulfillment of the requirements for the award of BACHELOR OF
TECHNOLOGY IN ELECTRONICS & COMMUNICATION ENGINEERING.
This record of bonafide work carried out by them under my guidance and
supervision. The result embodied in this mini project report has not been
submitted to any other University or Institute for the award of any degree.

Ms.K.MANASA Dr .Archek Praveen Kumar

Associate Professor Head of the Department
Project Guide
 External Examiner
ACKNOWLEDGEMENT
The Major Project work carried out by our team in the Department of
Electronics and Communication Engineering, Malla Reddy College of
Engineering for Women, Hyderabad. This work is original and has not
been submitted in part or full for any degree or diploma of any other
university.

We wish to acknowledge our sincere thanks to our project guide Ms.

K.Manasa Associate Professor in Department of Electronics &
Communication Engineering for formulating the problem, analysis,
guidance and her continuous supervision during the project work.

We acknowledge our sincere thanks to Dr. Archek Praveen Kumar,

Professor, Head of the ECE Department, Dr.Kanaka Durga Returi, Dean
Academics and Professor in Department of Computer Science Engineering
and Dr. Vaka Murali Mohan, Principal and Professor in Department of
Computer Science Engineering, MRCEW for their kind cooperation in
making this Major Project work a success.

We extend our gratitude to our beloved Chairman Sri. Ch. Malla

Reddy and our Secretary Sri. Ch. Mahender Reddy for their kind
cooperation in providing the infrastructure for successful completion of our
major project work

We convey our special thanks to the entire Teaching faculty and

nonteaching staff members of the Electronics & Communication
Engineering Department for their support in making this project work a
success.

BODDU SRIJA (18RG1A04C6)

CHETTI RISHIKA (18RG1A04D3)
GANDHAM PRASANNA LAKSHMI (18RG1A04D7)
GOLLAPELLY RAMYA (18RG1A04D9)
 INDEX
ABSTRACT iii
LIST OF FIGURES iv
LIST OF TABLES v
1. INTRODUCTION 1
2. LITERATURE REVIEW 8
3. OVERVIEW OF THE PROPOSAL 9
4. EXISTING SYSTEM 10
5. PROPOSED SYSTEM 12
5.1 Smart Card Technology 12
5.2 Desirable Features in a Smart Card Reader 16
5.3 Types of Chip Cards 17
5.4 Memory Cards 18
6. INTRODUCTION TO VERILOG 22
6.1 History 23
6.2 Major Capabilities 23
6.3 Synthesis 24

7. RESULT 32
8. CONCLUSION 37
9. FUTURESCOPE 38

10. REFERENCE 39

i
 ABSTRACT
This project is an innovative electronic toll gate system that provides the ultimate solution
for collecting the tax on highway roads. This enables the drivers to be charged for the
travel on the highways, while simplifying the monitoring and collection of toll fees. This
powerful smart card functions as an in tax collecting meter, eliminating the need to search
for coins when passing at the toll gates. This project also provides an efficient alternative to
coin-operated meters and pay and display ticketing systems. Simple and cost-effective to
implement, this project operates as a stand-alone system or alongside traditional toll gate
systems to eliminate fraud and reduce cash handling.x

ii
 LIST OF FIGURES
FIG.NO FIGURE NAME PAGE NO
6-1 : Mixed level modelling 24

6-2 : The synthesis process 25

6-3 : Typical design process 26

iii
iv
 CHAPTER – 1

INTRODUCTION
Smart cards have been around for a while now and it has been mainly
used to store some kind of monetary value. Currently smart cards can be seen
in the transportation, telecommunication and retail sectors. This project aims
to design a toll gate system chip using smart card technology that can be
usable in collecting the toll tax without any human involvement. The smart
card will be used as means for identification, security and cash.

This project is an innovative electronic toll gate system that provides

the ultimate solution for collecting the tax on highway roads. This enables the
drivers to be charged for the travel on the highways, while simplifying the
monitoring and collection of toll fees. This powerful smart card functions as
an in tax collecting meter, eliminating the need to search for coins when
passing at the toll gates. This project also provides an efficient alternative to
coin-operated meters and pay and display ticketing systems. Simple and cost-
effective to implement, this project operates as a stand-alone system or
alongside traditional toll gate systems to eliminate fraud and reduce cash
handling.

In general, a smart card is an integrated circuit card with memory

capable of making decisions. A smart card, chip card or integrated circuit card
(ICC), is defined as any pocket-sized card with embedded integrated circuits
which can process information. In this project, we are using a contact smart
card where the information inside the card is communicated with the card
reader by inserting card into the card reader.

The person, who drives on the highway roads, should purchase the toll
passes so as to gain the access to travel on the highway roads. This card
contains the amount for the toll tax. The smart card readers will be fixed
everywhere to the toll gates. If a person wants to travel on the highway road,

1
he has to insert his smart card into the reader before entering the highway
road. The reader reads the card and passes the data to the microcontroller.
The controller calculates the toll tax and automatically deducts this amount
from the driver smart card. If the balance is low in the card, a buzzer alert
will be indicated and the user has to recharge the card for the toll tax
payments. The amount of balance deducted will be visualized on LCD display.

After the amount has been deducted from the user smart card, the
system allows the user to travel on the highway road by opening the gate. The
operation of the gate is controlled by rotating the stepper motor fixed to the
gate. The gate will be closed automatically after a small delay

INTRODUCTION TO VLSI
Very-large-scale integration (VLSI) is the process of creating integrated
circuits by combining thousands of transistor-based circuits into a single
chip. VLSI began in the 1970s when complex semiconductor and
communication technologies were being developed. The microprocessor is a
VLSI device. The term is no longer as common as it once was, as chips have
increased in complexity into the hundreds of millions of transistors.

OVERVIEW :

The first semiconductor chips held one transistor each. Subsequent advances
added more and more transistors, and, as a consequence, more individual
functions or systems were integrated over time. The first integrated circuits
held only a few devices, perhaps as many as ten diodes, transistors, resistors
and capacitors, making it possible to fabricate one or more logic gates on a
single device. Now known retrospectively as "small-scale integration" (SSI),
improvements in technique led to devices with hundreds of logic gates, known
as large-scale integration (LSI), i.e. systems with at least a thousand logic
gates. Current technology has moved far past this mark and today's
microprocessors have many millions of gates and hundreds of millions of
individual transistors.

2
 At one time, there was an effort to name and calibrate various
levels of large-scale integration above VLSI. Terms like Ultra-large-scale
Integration (ULSI) were used. But the huge number of gates and transistors
available on common devices has rendered such fine distinctions moot. Terms
suggesting greater than VLSI levels of integration are no longer in widespread
use. Even VLSI is now somewhat quaint, given the common assumption that
all microprocessors are VLSI or better.

As of early 2008, billion-transistor processors are commercially

available, an example of which is Intel's Montecito Itanium chip. This is
expected to become more commonplace as semiconductor fabrication moves
from the current generation of 65 nm processes to the next 45 nm
generations. Another notable example is NVIDIA’s 280 GPU.

This microprocessor is unique in the fact that its 1.4 Billion

transistor count, capable of a teraflop of performance, is almost entirely
dedicated to logic (Itanium's transistor count is largely due to the 24MB L3
cache). Current designs, as opposed to the earliest devices, use extensive
design automation and automated logic synthesis to lay out the transistors,
enabling higher levels of complexity in the resulting logic functionality.
Certain high-performance logic blocks like the SRAM cell, however, are still
designed by hand to ensure the highest efficiency (sometimes by bending or
breaking established design rules to obtain the last bit of performance by
trading stability).

WHAT IS VLSI ?

VLSI stands for "Very Large Scale Integration". This is the field
which involves packing more and more logic devices into smaller and smaller
areas.
VLSI

 Simply we say Integrated circuit is many transistors on one chip.

 Design/manufacturing of extremely small, complex circuitry using

modified semiconductor material

3
  Integrated circuit (IC) may contain millions of transistors, each a few
mm in size

 Applications wide ranging: most electronic logic devices

History of Scale Integration

 late 40s Transistor invented at Bell Labs

 late 50s First IC (JK-FF by Jack Kilby at TI)
 early 60s Small Scale Integration (SSI)
 10s of transistors on a chip
 late 60s Medium Scale Integration (MSI)
 100s of transistors on a chip
 early 70s Large Scale Integration (LSI)
 1000s of transistor on a chip
 early 80s VLSI 10,000s of transistors on a
 chip (later 100,000s & now 1,000,000s)
 Ultra LSI is sometimes used for 1,000,000s
 SSI - Small-Scale Integration (0-102)
 MSI - Medium-Scale Integration (102-103)
 LSI - Large-Scale Integration (103-105)
 VLSI - Very Large-Scale Integration (105-107)
 ULSI - Ultra Large-Scale Integration (>=107)
Advantages of ICs over discrete components
While we will concentrate on integrated circuits , the
properties of integrated circuits-what we can and cannot efficiently put in an
integrated circuit-largely determine the architecture of the entire system.
Integrated circuits improve system characteristics in several critical ways. ICs
have three key advantages over digital circuits built from discrete
components:

 Size. Integrated circuits are much smaller-both transistors and

wires are shrunk to micrometer sizes, compared to the millimeter
or centimeter scales of discrete components. Small size leads to
advantages in speed and power consumption, since smaller

4
 components have smaller parasitic resistances, capacitances,
and inductances.

 Speed. Signals can be switched between logic 0 and logic 1 much

quicker within a chip than they can between chips.
Communication within a chip can occur hundreds of times faster
than communication between chips on a printed circuit board.
The high speed of circuits on-chip is due to their small size-
smaller components and wires have smaller parasitic
capacitances to slow down the signal.

 Power consumption. Logic operations within a chip also take

much less power. Once again, lower power consumption is largely
due to the small size of circuits on the chip-smaller parasitic
capacitances and resistances require less power to drive them.

VLSI and systems

These advantages of integrated circuits translate into advantages at the
system level:

 Smaller physical size. Smallness is often an advantage in

itself-consider portable televisions or handheld cellular
telephones.

 Lower power consumption. Replacing a handful of standard

parts with a single chip reduces total power consumption.
Reducing power consumption has a ripple effect on the rest of
the system: a smaller, cheaper power supply can be used;
since less power consumption means less heat, a fan may no
longer be necessary; a simpler cabinet with less shielding for
electromagnetic shielding may be feasible, too.

 Reduced cost. Reducing the number of components, the power

supply requirements, cabinet costs, and so on, will inevitably
reduce system cost. The ripple effect of integration is such that
the cost of a system built from custom ICs can be less, even

5
 though the individual ICs cost more than the standard parts
they replace.

Understanding why integrated circuit technology has such profound influence

on the design of digital systems requires understanding both the technology
of IC manufacturing and the economics of ICs and digital systems.

Applications
 Electronic system in cars.
 Digital electronics control VCRs
 Transaction processing system, ATM
 Personal computers and Workstations
 Medical electronic systems
Applications of VLSI

Electronic systems now perform a wide variety of tasks in daily

life. Electronic systems in some cases have replaced mechanisms that
operated mechanically, hydraulically, or by other means; electronics are
usually smaller, more flexible, and easier to service. In other cases electronic
systems have created totally new applications. Electronic systems perform a
variety of tasks, some of them visible, some more hidden:

 Personal entertainment systems such as portable MP3 players

and DVD players perform sophisticated algorithms with
remarkably little energy.

 Electronic systems in cars operate stereo systems and

displays; they also control fuel injection systems, adjust
suspensions to varying terrain, and perform the control
functions required for anti-lock braking (ABS) systems.

 Digital electronics compress and decompress video, even at

high-definition data rates, on-the-fly in consumer electronics.

 Low-cost terminals for Web browsing still require

sophisticated electronics, despite their dedicated function.

 Personal computers and workstations provide word-

processing, financial analysis, and games. Computers include

6
 both central processing units (CPUs) and special-purpose
hardware for disk access, faster screen display, etc.

 Medical electronic systems measure bodily functions and

perform complex processing algorithms to warn about
unusual conditions. The availability of these complex systems,
far from overwhelming consumers, only creates demand for
even more complex systems.

The growing sophistication of applications continually pushes the design

and manufacturing of integrated circuits and electronic systems to new
levels of complexity. And perhaps the most amazing characteristic of this
collection of systems is its variety-as systems become more complex.

7
 CHAPTER – 2

LITERATURE REVIEW

 M.SUNANDHA,PREMKUMAR : It is to layout a device, which

mechanically identifies an approaching cars and file vehicle number,
time and automatically opens the toll gate and a predetermined
amount is automatically deduced from its account.
 Now a days there is a massive rush close to toll gate for paying tax.
For that reason automation in toll gate with radio frequency
identification tag emerges as a resounding method to the guide toll
collection approach hired at tollgates which is a step in the direction
of enhancing the tracking of automobiles, traveling in predetermine
routes.

8
 CHAPTER – 3

OVERVIEW OF THE PROPOSAL

The objective of the project is to develop a toll gate management system

chip. The chip should be placed into a system which consists of a smart card
reader, microcontroller, the interfacing unit to allow the communication
between the microcontroller and smart card module, the buzzer and the relay.

The first semiconductor chips held one transistor each. Subsequent

advances added more and more transistors, and, as a consequence, more
individual functions or systems were integrated over time. The first integrated
circuits held only a few devices, perhaps as many as ten diodes, transistors,
resistors and capacitors, making it possible to fabricate one or more logic
gates on a single device. Now known retrospectively as "small-scale
integration" (SSI), improvements in technique led to devices with hundreds of
logic gates, known as large-scale integration (LSI), i.e. systems with at least a
thousand logic gates.

9
 CHAPTER – 4

EXISTING SYSTEM
There are two methods of collecting tax presently used they are First is the
traditional manual method where one person collects money and issues a
receipt. The other one is the Smart Card method where the person needs to
show the smart card to the system installed at the toll tax department to
open the Gate.

B. Drawbacks of Existing System: Both the above mentioned method for

collecting tax is time consuming method. Chances of escaping the payment
of tax are there. It leads to queuing up of following vehicles.

C. History of Automatic Toll Tax: Design and development of a “RFID

Based Automatic Toll Plaza” which is based on microcontroller, RFID
technology and load cell to save the time at toll plaza and having cashless
operation As the name implies “RFID Based Automatic Toll Plaza” the key
theme of our project is the automation. So here we will just take the
overlook of what is mean by Automation. In simple words the Automation
means the human being from the process with the machines. Before going
further we just take the overlook of history of the toll plazas.

So before the 90’s decade the toll plazas were fully manual controlled.
Means there are total four people for operating the Toll gate in this two
people will be used for opening & closing of the gate & another two are for
reception of the money & data keeping etc. Semi Automatic Toll plazas were
launched after the introduction of Express ways in 1995, in which data is
stored in computers and gate operation is automatic, only two personals are
required for single booth. But here we are going to see the human less toll
plaza. Active wave Inc has currently deployed a system of active tag vehicle
monitoring solution. Active wave vehicle products have a range of 30 meters
and operate in the 916 – 927 MHz for the transmit operations and 433 MHz
for the receive link. Active wave products are currently equipped with 256
Kbits of fixed memory. The tag is powered with a replaceable 3V batteryand

10
the total weight is 14 grams. Elementary signals are shown with the help of
blinking LEDs and beeping sounds. Smart key Access Control Systems have
a client – server model based system with an SQL server handling multiple
vehicle monitoring systems. They have designed a user interface using the
Microsoft .NET Framework. Smart key also operate in the 900MHz band but
have a small range of 30 meters. RFID based toll collection system uses
active RFID tag which uses car battery power. The implementation is divided
into the design of two modules- the Vehicle Module (Active Tag) and the
Base Module. The two modules communicate via RF modem connected to
each module.

11
 CHAPTER – 5

PROPOSED SYSTEM
5.1 Smart Card Technology:

A Smart Card is a plastic card the size of a credit card with an integrated
circuit built into it. This integrated circuit may consist only of EEPROM in the
case of a memory card, or it may also contain ROM, RAM and even a CPU.

A smart card, a type of chip card is a plastic card embedded with a computer
chip that stores and transacts data between users. This data is associated
with either value or information or both and is stored and processed within
the card's chip, either a memory or microprocessor. The card data is
transacted via a reader that is part of a computing system. Smart card-
enhanced systems are in use today throughout several key applications,
including healthcare, banking, entertainment and transportation. To various
degrees, all applications can benefit from the added features and security that
smart cards provide.

Smart cards are portable data cards that must communicate with another
device to gain access to a display device or a network. Cards can be plugged
into a reader, commonly referred to as a card terminal, or they can operate
using radio frequencies (RF).

When the smart card and the card reader come into contact, each identifies
itself to the other by sending and receiving information. If the messages
exchanged do not match, no further processing takes place. So, unlike
ordinary bank cards, smart cards can defend themselves against

12
unauthorized users and uses in innovative security measures.

Specifications of a smart card

Smarts cards may have up to 8 kilobytes of RAM, 346 kilobytes of ROM, 256
kilobytes of programmable ROM and a 16-bit microprocessor. The smart card
uses a serial interface and receives its power from external sources like a card
reader. The processor uses a limited instruction set for applications such as
cryptography.

Characteristics of smart card:

A "SMART CARD" is also characterized as follows:
 Dimensions are normally credit card size. The ID-1 of ISO/IEC 7810
standard defines them as 85.60 × 53.98 mm. Another popular size is
ID-000 which is 25 x 15 mm. Both are .76 mm thick.
 Contains a security system with tamper-resistant properties (e.g. a
secure crypto processor, secure file system, human-readable features)
and is capable of providing security services (e.g. confidentiality of
information in the memory).
 Asset managed by way of a central administration system which
interchanges information and configuration settings with the card
through the security system. The latter includes card hot listing,
updates for application data.
 Card data is transferred to the central administration system through
card reading devices, such as ticket rea
 Readers, ATMs etc.

13
 Smart card readers:

Smart Card Readers are also known as card programmers (because they can
write to a card), card terminals, card acceptance device (CAD) or an interface
device (IFD). There is a slight difference between the card reader and the
terminal. The term 'reader' is generally used to describe a unit that interfaces
with a PC for the majority of its processing requirements. In contrast, a
'terminal' is a self-contained processing device.
Smart cards are portable data cards that must communicate with another
device to gain access to a display device or a network. Cards can be plugged
into a reader, commonly referred to as a card terminal, or they can operate
using radio frequencies (RF).
When the smart card and the card reader come into contact, each
identifies itself to the other by sending and receiving information. If the
messages exchanged do not match, no further processing takes place. So,
unlike ordinary bank cards, smart cards can defend themselves against
unauthorized users and uses in innovative security measures.
Communicating with a Smart Card Reader
The reader provides a path for the application to send and receive commands
from the card. There are many types of readers available, such as serial, PC
Card, and standard keyboard models.

14
Each manufacturer provides a different protocol for communication with the
reader.
 First you have to communicate with the reader.
 Second, the reader communicates with the card, acting as the
intermediary before sending the data to the card.
 Third, communication with a smart card is based on the APDU format.
The card will process the data and return it to the reader, which will
then return the data to its originating source.
The following classes are used for communicating with the reader:

 ISO command classes for communicating with 7816 protocol

 Classes for communicating with the reader
 Classes for converting data to a manufacturer-specific format
 An application for testing and using the cards for an intended and
specific purpose.
Readers come in many forms, factors and capabilities. The easiest way to
describe a reader is by the method of its interface to a PC. Smart card readers
are available that interface to RS232 serial ports, USB ports, PCMCIA slots,
floppy disk slots, parallel ports, infrared IRDA ports and keyboards and
keyboard wedge readers. Card readers are used to read data from - and write
data to - the smart card.

15
Another difference in reader types is on-board intelligence and capabilities.
An extensive price and performance difference exists between an industrial
strength reader that supports a wide variety of card protocols and the less
expensive win-card reader that only works with microprocessor cards and
performs all processing of the data in the PC.

To process a smart card, the computer has to be equipped with a smart card
reader possessing the following mandatory features:
1. Smart Card Interface Standard - ISO 7816 is an international standard
that describes the interface requirements for contact-type smart cards.
These standards have multiple parts. For instance, part 1, 2 and 3 are
applicable to card readers. Part 1 defines the physical characteristics of
the card. Part 2 defines dimension and location of smart card chip
contacts. Part 3 defines the electronic signals and transmission
protocols of the card. Card readers may be referred to as conforming to
ISO 7816 1/2/3, or in its simplified term, ISO 7816.
2. Driver - This refers to the software used by the operating system (OS)
of a PC for managing a smart card and applicable card reader. To read
a smart ID card, the driver of the card reader must be PC/SC compliant
which is supported by most card reader products currently available. It
should be noted that different OS would require different drivers. In
acquiring card readers, the compatibility between the driver and the OS
has to be determined and ensured.

5.2 Desirable Features in a Smart Card Reader

Card Contact Types refers to how the contact between a card reader and a
smart card is physically made. There are two primary types of contact: landing
contact and friction contact (also known as sliding or wiping).
1. For card readers featuring friction contact, the contact part is fixed. The
contact wipes on the card surface and the chip when a card is inserted.
2. For card readers featuring the landing type, the contact part is movable.
The contact "lands" on the chip after a card is wholly inserted.

16
Smart card readers are also used as smart card programmers to configure
and personalize integrated circuit cards. These programmers not only read
data, but also put data into the card memory. This means that not only CPU
based smart cards, but also simple memory cards can be programmed using
a smart card reader. Of course the card reader must support the appropriate
protocol such as the asynchronous T=0, T=1 or synchronous I2C protocols.

5.3 Types of Chip Cards

Smart cards are defined according to
1) How the card data is read and written
2) The type of chip implanted within the card and its capabilities.
There is a wide range of options to choose from when designing your system.

17
Contact Cards
This is the most common type of smart card. The electrical contacts, located
on the outside of the card, connect to a card reader when the card is inserted.
In this project, we are using a contact smart card where the information inside
the card is communicated with the card reader by inserting the card into the
reader.
The below figure defines the pinout of the smart card. This comprises of gold
plated contact pads which makes contact with the reader.

Electrical characteristics of smart card pinout:

C1-VCC: Power supply input.

C2-RST: Either used itself (reset signal supplied from the interface device) or
in combination with an internal reset control circuit. If internal reset is
implemented, the voltage supply on Vcc is mandatory.
C3-CLK: Clocking or timing signal.
C4-GND: Ground (reference voltage).
C6-VPP: Programming voltage input.
C7-I/O: Input or Output for serial data to the integrated circuit inside the
card.

5.4 Memory Cards

Memory cards have no sophisticated processing power and cannot manage
files dynamically. All memory cards communicate to readers through
synchronous protocols. In all memory cards, the reading and writing is done

18
to a fixed address on the card. There are three primary types of memory cards:
1) Straight, 2) Protected and 3) Stored Value.
1. Straight Memory Cards
These cards just store data and have no data processing capabilities. These
cards are the lowest cost per bit for user memory. They should be regarded
as floppy disks of varying sizes without the lock mechanism. These cards
cannot identify themselves to the reader, so the host system has to know what
type of card is being inserted into a reader. These cards are easily duplicated
and cannot be tracked by on-card identifiers.
2. Protected / Segmented Memory Cards
These cards have built-in logic to control the access to the memory of the
card. These devices can be set to write protect some or the entire memory
array and thus sometimes referred to as Intelligent Memory cards. Some of
these cards can be configured to restrict access to both reading and writing.
This is usually done through a password or system key. Segmented memory
cards can be divided into logical sections for planned multi-functionality.
These cards are not easily duplicated but can possibly be impersonated by
hackers. They typically can be tracked by an on-card identifier.
3. Stored Value Memory Cards
These cards are designed for the specific purpose of storing value or tokens.
The cards are either disposable or rechargeable. Most cards of this type
incorporate permanent security measures at the point of manufacture. These
measures can include password keys and logic that are hard-coded into the
chip by the manufacturer. The memory arrays on these devices are set up as
decrements or counters. There is little or no memory left for any other
function. For simple applications such as a telephone card, the chip has 60
or 12 memory cells, one for each telephone unit. A memory cell is cleared each
time a telephone unit is used. Once all the memory units are used, the card
becomes useless and is thrown away. This process can be reversed in the case
of rechargeable cards.
CPU/MPU Microprocessor Multifunction Cards
These cards have on-card dynamic data processing capabilities. Multifunction
smart cards allocate card memory into independent sections or files assigned
to a specific function or application. Within the card, a microprocessor or

19
microcontroller chip is present that manages this memory allocation and file
access. This type of chip is similar to those found inside all personal
computers and when implanted in a smart card, manages data in organized
file structures, via a card operating system (COS). Unlike other operating
systems, this software controls access to the on-card user memory.

This capability permits different and multiple functions and/or different

applications to reside on the card, allowing businesses to issue and maintain
a diversity of products through the card. One example of this is a debit card
that also enables building access on a college campus.

Multifunction cards benefit issuers by enabling them to market their

products and services via state-of-the-art transaction and encryption
technology. Specifically, the technology enables secure identification of users
and permits information updates without replacement of the installed base of
cards, simplifying program changes and reducing costs. For the card user,
multifunction means greater convenience and security, and ultimately,
consolidation of multiple cards down to a select few that serve many purposes.

There are many configurations of chips in this category including chips

that support cryptographic PKI functions with on board math co-processors
or Java virtual machine hardware blocks. As a rule of thumb, the more
functions the higher the cost.

Contactless Cards
These are smart cards that employ a radio frequency (RFID) between
card and reader without physical insertion of the card. Instead the card is
passed along the exterior of the reader and read. Types include proximity
cards which are implemented as a read-only technology for building access.
These cards function with a limited memory and communicate at 125 MHz.
True read & write contactless cards were first used in transportation for quick
decrementing and re-loading of fare values where their lower security was not
an issue. They communicate at 13.56 MHz, and conform to the ISO14443
standard. These cards are often straight memory types. They are also gaining

20
popularity in retail stored value, since they can speed-up transactions and
not lower transaction processing revenues (i.e. VISA and MasterCard), like
traditional smart cards.

WORKING PROCEDURE:
The Project Toll gate control is an exclusive project that enables the user to
pay the toll gate bill.The working of this project starts when the user tries to
cross the toll gate. The tollgate is closed automatically, when traveller comes
towards gate. There is lcd display like “PLEASE PAY THE TOLL GATE TAX”.
The traveller insert the smart card in the smart card reader. The value of toll
tax will be decremented from the total amount in the smart card.

The microcontroller first checks the balance in the smart card whenever the
card is inserted. If the balance is less than the toll tax, the microcontroller
detects this and sends a signal to the LCD to display a message as “Invalid
Card” on the LCD display and the card will not be accepted. If thebalance is
greater than or equal to the toll gate tax, then this card is accepted

Advantages

Cost effective

Illegal transformations will be reduced.

Total toll tax amount will be reached to the government.

21
 CHAPTER – 6

INTRODUCTION TO VERILOG
Verilog HDL is a hardware description language that can be used to model a
digital system at many levels of abstraction ranging from the algorithmic-level
to the gate-level to the switch-level. The complexity of the digital system being
modeled could vary from that of a simple gate to a complete electronic digital
system, or anything in between. The digital system can be described
hierarchically and timing can be explicitly modeled within the same
description.

The Verilog HDL language includes capabilities to describe the

behavior-al nature of a design, the dataflow nature of a design, a design's
structural composition, delays and a waveform generation mechanism
including aspects of response monitoring and verification, all modeled using
one single language. In addition, the language provides a programming
language interface through which the internals of a design can be accessed
during simulation including the control of a simulation run.

The language not only defines the syntax but also defines very clear
simulation semantics for each language construct. Therefore, models written
in this language can be verified using a Verilog simulator. The language
inherits many of its operator symbols and constructs from the C
programming language. Verilog HDL provides an extensive range of modeling
capabilities, some of which are quite difficult to comprehend initially.
However, a core subset of the language is quite easy to leam and use. This is
sufficient to model most applications.

22
6.1 History:

The verilog HDL language was first developed by Gateway Design

Automation in 1983 as hardware are modleling language for their simulator
product, At that time ,twas a propnetary language. Because of the popularity
of the,simulator product, Verilog HDL gained acceptance as a usable and
practical language by a number of designers. In an effort to increase the
popularity of the language, the language was placed in the public domain in
1990. Open verilog International (OVI) was formed to promote Verilog. In 1992
OVI decided to pursue standardization of verilog HDL as an IEEE standard.
This effort was succeful and the language became an IEEE standard in 1995.
The complete standard is described in the verilog hardware description
language reference manual. The standard is called std 1364-1995.

6.2 Major Capabilities:

Listed below are the majort capabilities of the verilog hardware

description:

 Primitive logic gates, such as and, or and nand, are built-in into the
language.
 Flexibility of creating a user-defined primitive (UDP). Such a primitive
could either be a combinational logic primitive or a sequential logic
primitive.
 Switch-level modeling primitive gates, such as pmos and nmos, are also
built-in into the language.
 Explicit language constructs are provided for specifying pin-to-pin
delays, path delays and timing checks of a design.
 A design can be modeled in three different styles or in a mixed style.
These styles are: behavioral style - modeled using procedur-al
constructs; dataflow style - modeled using continuous assign-ments;
and structural style - modeled using gate and module instantiations.
 There are two data types in Verilog HDL; the net data type and the
register data type. The net type represents a physical connection

23
 between structural elements while a register type represents an
abstract data storage element.
 Figure.6-1 shows the mixed-level modeling capability of Verilog HDL,
that is, in one design, each module may be modeled at a different level.

Fig:6-1 Mixed level modelling

 Verilog HDL also has built-in logic functions such as & (bitwise-and)
and I (bitwise-or).

 High-level programming language constructs such as condition- als,

case statements, and loops are available in the language.

 Notion of concurrency and time can be explicitly modeled.

 Powerful file read and write capabilities fare provided.

 The language is non-deterministic under certain situations, that is, a

model may produce different results on different simulators; for
example, the ordering of events on an event queue is not defined by the
standard.

24
6.3 SYNTHESIS:

Synthesis is the process of constructing a gate level netlist from a

register-transfer level model of a circuit described in Verilog HDL. Figure.2-2
shows such a process. A synthesis system may as an intermediate step,
generate a netlist that is comprised of register-transfer level blocks such as
flip-flops, arithmetic-logic-units, and multiplexers, interconnected by wires.
In such a case, a second program called the RTL module builder is necessary.
The purpose of this builder is to build, or acquire from a library of predefined
components, each of the required RTL blocks in the user-specified target
technology.

FIG 6.2 THE SYNTHESIS PROCESS

Having produced a gate level netlist, a logic optimizer reads in the netlist and
optimizes the circuit for the user-specified area and timing constraints. These
area and timing constraints may also be used by the module builder for
appropriate selection or generation of RTL blocks. In this book, we assume
that the target netlist is at the gate level. The logic gates used in the
synthesized netlists are described in Appendix B. The module building and
logic optimization phases are not described in this book.

25
 The above figure shows the basic elements ofVerilog HDL and the
elements used in hardware. A mapping mechanism or a construction
mechanism has to be provided that translates the Verilog HDL elements into
their corresponding hardware elements as shown in figure.6-3

FIG 6.4 TYPICAL DESIGN PROCESS

4

26
 CODE:

module toll_fsm ( input clk, rst,

insertcard,oneway,twoway,

input [15:0] pin ,

output reg gate,alaram,

output reg[1:0]light );

parameter red=2'd0,green =2'd1;

parameter vehicle
=4'd0,scancard1=4'd1,scancard2=4'd2,enter_amount=4'd3,invalid=4'd4,tran
saction_failed=4'd5,

way1=4'd6,way2=4'd7,transaction_complete=4'd8;

parameter amt1=16'd25,amt2=16'd40;

reg [15:0] cardpin=16'd1234;

reg [15:0] balance=16'd2000;

reg [3:0]next_state;

always @(posedge clk or posedge rst)

begin

if(rst) begin

next_state<=vehicle;

27
 light<=red;

gate<=1'd1;

alaram<=1'd0;

end

else

case (next_state)

vehicle: if (oneway==1'd1 && twoway==1'd0)

begin

next_state<=way1;

light<=red;

gate<=1'd1;

alaram<=1'd0;

end

else if (oneway==1'd0 && twoway==1'd1)

begin

next_state<=way2;

light<=red;

gate<=1'd1;

alaram<=1'd0;

end

else

next_state<=vehicle;

28
way1:if (insertcard==1'd1)

next_state<=scancard1;

else

next_state<=way1;

scancard1:

begin

if (pin==cardpin && balance!=16'd0)

begin

balance<=balance-amt1;

next_state<=transaction_complete;

end

else

begin

next_state<=invalid;

end

end

//2way

way2:if (insertcard==1'd1)

next_state<=scancard2;

else

next_state<=way2;

29
scancard2:begin

if (pin==cardpin && balance!=16'd0)

begin

balance<=balance-amt2;

next_state<=transaction_complete;

end

else

next_state<=invalid;

end

invalid:

begin

next_state<=transaction_failed;

end

transaction_complete:

begin

next_state<=vehicle;

light<=green;

gate<=1'd0;

alaram<=1'd0;

end

30
 transaction_failed:

begin

next_state<=vehicle;

light<=red;

gate<=1'd1;

alaram<=1'd1;

end

endcase

end

endmodule

SOFTWARE REQUIRED:

Xilinx

• Xilinx software is used by the VHDL/VERILOG designers for performing

Synthesis operation. Any simulated code can be synthesized and
configured on FPGA. Synthesis is the transformation of VHDL code into
gate level net list. It is an integral part of current design flows.

• LANGUAGE USED: VERILOG

31
CHAPTER – 7

RESULT

FIG: RTL SCHEMATIC

32
FIG: RTL SCHEMATIC

33
• FIG: VIEW TECHNOLOGY SCHEMATIC

34
FIG: 1 WAY SIMULATION

35
FIG: 2 WAY SIMULATION

36
 CHAPTER – 8
CONCLUSION
• The Electronic Toll collection system is a design scheme. It is low cost,
high security, far communication and efficiency, etc.

• It not only improves the passage ability of expressway but also

improves the technology level of charge.

• Electronic toll collection system using smart card is an effective

measure to reduce management costs and fees, at the same time,
greatly reduce noise and pollutant emission of toll station.

• In the design of the proposed Electronic toll collection (ETC) system,

real time toll collection and anti-theft solution system have been
designed. This reduces the manual labour and delays that often occur
on roads.

• This system of collecting tolls is eco friendly and also results in

increased toll lane capacity. Also an anti-theft solution system module
which prevents passing of any defaulter vehicle is implemented, thus
assuring security on the roadways.

37
 CHAPTER – 9
FUTURE SCOPE
1. Automatic Vehicle Identification: The automatic vehicle identification
(AVI) component of this system refers to the technologies that
determine the identification or ownership of the vehicle so that the toll
will be charged to the corresponding customer.

2. Automatic Vehicle Classification: Vehicle type and class may have

differentiated toll amount. The vehicle type may include light vehicles
like the passenger car or heavy vehicles like recreational vehicles. A
vehicle’s class can be determined by the physical attributes of the
vehicle, the number of occupants in the vehicle, the number of axles
in the vehicles and the purpose for which the vehicle is being used at
the time of classification.

3. Video Enforcement System: When used for electronic toll collection,

the video enforcement system (VES) captures images of the license
plates of vehicles that pass through an electronic tollbooth without a
valid electronic tag. Although the deployment of these technologies
makes the initial cost of installation very high, but there exits huge
benefits accompanied with such high investment.

38
 CHAPTER – 10

REFERENCE
Edward B. Panganiban, Jennifer C. Dela Cruz, “RFID-Based Vehicle
Monitoring System”,School of EECE, Mapua University, IEEE 2017.

[2] M. Sarbini, S. Hassan, T. Jiann, PM. Ahmad, “Design of an RFID-based

speed monitoring system for road vehicles in Brunei Darussalam”, IEEE
2014, pp. 219-223.

[3] C.R. Kumar, B. Vijayalakshmi, C. Ramesh, C. Pandian, “Vehicle Theft

Alarm and Tracking The Location Using RFID & GPS”, International Journal
of Emerging Technology and Advanced Engineering Website: www.ijetae.com
ISO Certified Journal 2013, pp. 525528. [4] Sanchit Agarwal, Shachi Gupta,
Nidheesh Sharma, “Electronic Toll Collection System Using Barcode Laser
Technology”, International Journal of Emerging Trends & Technology in
Computer Science (IJETTCS), Vol 3, 2014 [5] D. Kiranmayi, “Vehicle
Monitoring System Using RFID”, DuruguKiranmayi / (IJCSIT) International
Journal of Computer Science and Information Technologies, Vol. 7 (3), 2016,
pp. 1444-1447

[6] R. Karthikayeni1, P. KeerthikaBala2, K. Vignesh, “toll plaza payment

using QR code”, International Research Journal of Engineering and
Technology, 2018.

[7] Aishwarya Agarwal, “Automatic License Plate Recognition using

Raspberry Pi,” IEEE International Interdisciplinary Conference on Science
Technology Engineering Management Singapore, 22nd, 23rd April 2017.

[8] Persad, Khali, C. Michael Walton, and Shahriyar Hussain. Toll Collection
Technology and Best Practices. No. Product 0-5217-P1. 2007.

[9] Li, Shuguang, et al. "Video-based traffic data collection system for
multiple vehicle types." IET Intelligent Transport Systems 8.2 (2013): 164-
174

39