111 電子學考古題大破解

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111 中興電機系
電子學
1. (a) In the Fig., use the small-signal model of the diode to find the
value of R ，so that Vo  2.8V when I L  0 , and Vo changes by
10mV per 1 mA of load current. (5%) (b) Find the value of I S of D .
【111 中興電機】

【解】：

2. For the circuit as shown in the Fig., in which mode does this
npn BJT operate? If   100 , find I E ， I B ， I C ，and VC .(10%)
【111 中興電機】

【解】：

3. For the circuit given in the Fig., the MOSFET is specified to

have Vt  0.7V and nCox (W / L)  20mA / V 2 . Neglect the
channel length modulation effect. (a) If I D  0.1mA ，
VS  1V ，VD  2V ，and VDD  3V ，find the values of RS and
RD .(6%) (b) If a current of 1A is used in the voltage divider,
find the values of RG1 and RG 2 . (6%) (c) Find the
transconductance g m of the MOSFET at the bias point. (3%)
【111 中興電機】
【解】：

1
 111 電子學考古題大破解
Copyright by @戰神劉明彰

4. For the current mirror-loaded MOS differential amplifier of the Fig. ,all the
transistors work in saturation. vG1 and vG 2 are the differential inputs. Vo is the
output. The overdrive voltages of Q1 and Q2 are the same as VOV . (a) If Q1 and
Q2 exhibit a (W / L) N mismatch of (W / L) N , and Q3
and Q4 also exhibit a (W / L) P mismatch of
(W / L) P ，derive the expression of the worst-case total
offset voltage ( VOS ) in terms of (W / L) N ， (W / L) N ，
(W / L) P ， (W / L) P ，and VOV . (16%) (b) If the DC
components of vG1 and vG 2 are 0.6V and those of the
source of Q1 and Q2 are 0V . The threshold voltages
( Vth ) of all transistors are the same as 0.4V . The Early voltages of all transistors are
the same as 10V . Find the value of the differential voltage gain. (Note: The
transistors are matched. (8%) (c) If the W / L ratios of NMOS transistors are
accurate to within  1% of normal，what is the accuracy limitation of the W / L
ratios of PMOS transistors to achieve VOS  5mV ? (6%) 【111 中興電機】
【解】：

5. The simplified small-signal model of transistor is shown in the Fig.(a), and you
can use the model to solve the following problems. In Figs.(b) and (c)，we
assume all transistors are with g m  12.5mA / V and ro  16K and VB1 … VB 6
are the bias voltages.
(a) The amplifier shown in Fig.(b)employs a cascode stage and a CS stage，and a
compensation capacitor CC  10 pF is introduced in the circuit. The output has
the load capacitance, that is CL  1 pF . The transfer function of the amplifier is
s
(1  )
Vo ( s) Z
given as follows ： H ( s)   AM Determine the
Vi ( s) s s
(1  )(1  )
A B
low-frequency gain AM ，the dominant pole(  A )，the non-dominant pole(  B ),
and the zero  Z . (Note: The poles and zero are in rad/s.) (20%)
(b) Fig. (c) shows the amplifier with two feedback resistors R1  2K and
V
R2  2K . Determine the voltage gain o and the output resistance Rof . (15%)
Vi
【111 中興電機】

2
 111 電子學考古題大破解
Copyright by @戰神劉明彰

【解】：