IEEE TRANSACTIONS ON SMART GRID, VOL. 14, NO.
4, JULY 2023
Multi-Layer Smart Fault Protection
for Secure Smart Grids
Mostafa Bakkar , Santiago Bogarra , Felipe Córcoles, Javier Iglesias, and Wael Al Hanaineh
Abstract—The trend toward Smart grid (SG) is increasing sig-
nificantly by incorporating Distributed Generators (DGs), which
leads to new challenges, especially in protection systems. SGs
should strengthen robust environments against cybersecurity
threats. So, the cybersecurity of future SGs is essential. This
paper proposes a multi-layer protection scheme for the Medium
Voltage (MV) Distribution System (DS), especially with reconfig-
urable SGs. The main protection algorithm is based on Artificial
Intelligence (AI), utilizing the communication between all pro-
tective devices (PDs) in the grid, whereas as backup protection,
another AI algorithm employs the communication between the
PDs in the same line. Then, as alternative protection to provide
the protection system with another level of security in case of
communication issues or cyberattacks, a third algorithm based
on the local data of each PDs is proposed. Both simulations using
MATLAB S IMULINK and experimental results utilizing a scaled
physical grid validated the protection algorithms. The scaled grid
has been designed for the smart grid in order to test the behavior
of the protection scheme experimentally.
Index Terms—Artificial neural network-based relay, distribu-
tion system, microgrids, medium voltage distribution system,
protection strategies, smart grid protection.
I. I NTRODUCTION
ECENTLY, a significant increase in the Distributed
R Generator (DG) penetration in the Distribution System
(DS) has been noticed, especially with the presence of new
loads. So, maintaining the DG connected to the DS during
faults becomes essential. Therefore, achieving a Smart Grid
(SG) protection scheme has been critical, particularly with
microgrid incorporation. However, there are several barriers
to completing this task [1]. The DG penetrations into DS can
affect the power flow on the grid due to several power gener-
ation points, as well as the relay short-circuits current value,
which influences the Protective Devices (PDs) settings [2], [3].
The difficulties in detecting fault current and voltage profiles
Manuscript received 21 April 2022; revised 19 August 2022 and
7 November 2022; accepted 12 December 2022. Date of publication
16 December 2022; date of current version 21 June 2023. Paper no.
TSG-00553-2022. (Corresponding author: Mostafa Bakkar.)
Mostafa Bakkar, Santiago Bogarra, and Felipe Córcoles are with
the Department of Electrical Engineering, Polytechnical University in
Catalonia, 08222 Terrassa, Spain (e-mail: mostafa.bakkar@upc.edu;
santiago.bogarra@upc.edu; felipe.corcoles@upc.edu).
Javier Iglesias is with ABB Power Grids Spain S.A.U., 28037 Madrid,
Spain (e-mail: javier.iglesias@hitachienergy.com).
Wael Al Hanaineh is with the Department of Electrical Engineering,
Polytechnical University in Catalonia, 08019 Barcelona, Spain (e-mail:
wael.hasan.ahmad.al.hanaineh@upc.edu).
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TSG.2022.3229848.
Digital Object Identifier 10.1109/TSG.2022.3229848
1949-3053 
c 2022 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
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3125
with high penetration of DG-based inverters are highlighted
in [4].
Switching to an SG will make power more adaptable to
demand increase, ability to integrate DGs, efficient, and reli-
able. However, the potential for power grid risks significantly
raised. As a result, electric operators must be vigilant and
establish multiple levels of protection. So, there is an increase
in the research effort to improve SG protection [5], [6], [7].
In [8], [9], a survey regarding SG vulnerability points and
types is presented. Also, [10], [11] investigate cyber-security
in SGs to diagnose the potential vulnerabilities along with their
impact. In [12], the threats and potential solutions of SGs have
been analyzed, focusing on cyberattack types. The dynamic
behaviors of SGs are moderated and evaluated to address this
problem, which is influenced by DGs or system reconfigu-
ration to distinguish between natural smart grid changes and
real-time attacks [13]. In [14], new ways for detecting mis-
leading data cyber-attacks in the physical layers of smart grids
have been developed. However, this strategy depends on the
analysis of the protection data, which is time-consuming.
Standards prescribe that DGs should be disconnected if the
CB supplying the feeder connected to the DGs is tripped, as
mentioned in [15]. Utility requirements justify anti-islanding
protection; however, it reduces the DG’s benefits. Anti-islanding
protection is one of the main concerns in grids with DG, and
its solution continues to be an issue, although several passive
and active approaches can be found. However, these methods
can face several limitations as setting the thresholds must be
chosen strictly, may create power quality problems, slow detec-
tion time, and some challenges to implementation [16]. With
high DG penetration, the DG disconnection will be minimized
in the near future; under the circumstances of no islanding
occurring. So, DGs should be allowed to exploit them using a
droop-based control to make them behave as traditional syn-
chronous generators with huge inertia [17]. However, in the
event of islanding and a reclosing operation is performed,
one of the following scenarios must be satisfied. (1) The DGs
inside the island are disconnected. According to IEEE Standard
1547-2018, the DG must identify the island and trip within
two seconds of its development [18]. (2) A synchronism check
is performed [19]. Synchronizing check relay supervises the
closing of circuit breakers and does not allow improper syn-
chronizing [20]. (3) The inverter can endure the transients of
an out-of-synchronism reclosing. Inverter tripping should not
occur if the Phase Locked Loop (PLL) loses synchronism.
Within a couple of cycles, the PLL should resynchronize with
the grid and be able to inject the demanded current [21].
 3126
Artificial Intelligent techniques significantly improve the
protection of SGs especially utilizing communication, due
to the introduction of standards such as IEC 61850 and
Ethernet-based communication capabilities [22] or wireless
networks [23]. In addition, adaptive protection allows relays to
respond to changes in the DS. However, the complexity of this
process is significant, and an appropriate communication chan-
nel is required, particularly with grid reconfigurations and DG
penetration into DS. In [24], [25], [26], [27], [28], different
proposals to use communication to update the OverCurrent
Relay (OCR) and Differential relay (DR) settings with the
incorporation of DG have been presented. Another idea is
to use a multi-agent technique to adapt the settings of OCR
and DR [29], [30]. However, the complexity of relay settings
adjustment under different grid scenarios remains a limitation.
Various backup protection strategies have been proposed. As
in [31], [32], a device failure detection algorithm is proposed
based on communication between PDs. However, the limi-
tations of communication problems have not been avoided.
It can be concluded that the protection strategies based on
communication can have severe limitations if the communica-
tion system is interrupted due to system faults, discrepancies,
and hacking. So, backup protection is needed. In [33], a fault
location strategy depends on the ratio of positive and negative-
sequence voltages; however, the inverter-based DG has not
been considered.
Another trend is to propose strategies to back up and support
communication failure. Mainly because using communication
in the protection strategies introduces more challenges [34].
In addition, to protect smart grids, different privacy issues and
security requirements need to be discussed [35], [36]. In [37],
a differential pilot protection is proposed to avoid commu-
nication problems. This approach employs a multiresolution
morphological gradient to determine the arrival time of the
fault traveling wave and a nonlinear filtering algorithm to pre-
process the communicated samples. However, the algorithm
has been verified for the DC grid. In [38], a strategy based
on distance relay using impedance calculation is proposed.
The strategy can be improved further if it can be made adap-
tive. In [39], a backup protection strategy is proposed based
on comparing the phase difference of positive-sequence cur-
rent fault components between the main and slave feeders.
The strategy is focused on transmission lines radial grid for
non-based inverter DG. In [40], a non-communication dual
settings directional OCR is proposed for a DS that requires to
be updated in case of reconfiguration.
As the aforementioned studies show, an alternative protec-
tion strategy that can operate for reconfigurable DSs with high
DG penetration is still needed. The author’s previous work [41]
presents an AI protection scheme based on two strategies. The
first strategy, the Centralised algorithm (CE), employs commu-
nication between all protective devices (PDs) in the grid. The
second strategy is named Zone algorithm (ZO), based on the
communication between the PDs in the same line.
For the CE algorithm, the fundamental concept is to use
the positive-sequence current (i+ ) data as inputs to the
CE. Variations in short circuit current in each PD must be
included in the Artificial Neural Networks (ANN) training.
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IEEE TRANSACTIONS ON SMART GRID, VOL. 14, NO. 4, JULY 2023
The major benefits of this system are that it consolidates the
entire system’s security into a single device, performing state
estimation and security evaluations. On the other side, com-
munication issues or CE unit failure will result in a loss of
protection while restoring services. In order to improve the
system’s redundancy, ZO is cooperating with CE. Every PD
decides locally, utilizing the data acquired from the peer PD
on the same line. The significant advantages of this algorithm
are its flexibility to adapt to any alterations in the grid and the
less training time compared to CE.
However, both protection strategies are based on commu-
nication; therefore, as a continuation of the author’s previous
work, regarding overcurrent protection based on ANNs for
smart distribution networks, a third-level protection strategy is
proposed in this paper, as shown in Fig. 2. This third level of
protection is named Local algorithm (LO), which functions as
supporting and alternative protection to provide the protection
system with a high degree of dependability in case of com-
munication or cyber-attacks vulnerabilities. The LO is based
on the local information of each PD and without any commu-
nication between PDs. This protection strategy allows for the
location and isolation of faults considering various types of
faults, changing load consumption, DG penetration, different
fault locations, low and high fault resistance, which provide
more secure and redundant protection. The LO compared to
other protection algorithms, can provide a more secure, alter-
native supportive, and more economical protection strategy as
no communication is needed; moreover, it is easy to be adapted
to different grids without the need for training. In addition, LO
guarantees protection if the other two levels of protection do
not function properly.
Since the proposed LO algorithm is based on reclosing
operations, therefore in the case of islanding, a synchronism
check should perform; otherwise, the DGs on the island are
disconnected.
In order to validate the proposed LO protection algo-
rithm, its behavior has been analyzed and simulated, then
demonstrated experimentally. It is essential to highlight that
the characteristics of the influence of inverter-based gener-
ators have been considered (small transient duration, low
short-circuit current, and reversible power flow).
As shown in Fig. 2, the multi-layers priority algorithm is
presented. Before running the CE algorithm, the inputs and
communication signals from all PDs must be checked for
availability. If some of the signals did not receive at CE then
a delay will be formed, and the signals are rechecked utilizing
variable “a” (that goes from 0 → 1) to ensure that the system
is not experiencing a transitory problem. The CE decision is
performed if the signals are received (Layer 1). At the same
time, the ZO algorithm will be executed (Layer 2). In this case,
the inputs and communication of the peer PDs are sent to ZO;
then, the decision is performed. Both CE and ZO decisions
are compared to give an extra level of reliability. Moreover,
the third layer of protection (LO algorithm) can be activated
using two signals the ‘Activation signal and the ‘Emergency
signal’. If the input or communication signals of CE and ZO
from layer 1 and layer 2 are not received (due to vulnera-
bility or communication problems), the ‘Activation signal’ is
 BAKKAR et al.: MULTI-LAYER SMART FAULT PROTECTION FOR SECURE SGs
Fig. 1. Single line diagram of the analyzed DS with DG penetration and LO.
Fig. 2. PD multi-layer priority algorithm.
generated automatically at each PD (layer 3). In addition, the
LO algorithm at the third layer of protection can be activated
manually using an external signal called an ‘Emergency sig-
nal’. This signal is generated at each PD, as shown in the red
box of Fig. 2 (layer 3).
First, the proposed LO protection algorithm is presented.
Second, the validation analysis of the proposed protection
algorithm is discussed. Third, the experimental results are
discussed. Finally, the conclusion of the paper is presented.
II. L OCAL P ROTECTION A LGORITHM
LO is an alternative protection (third layer) algorithm for the
first two layers of protection, which supports the SG in case of
vulnerability due to loss of communication between controllers
and PDs or cyberattacks. In this algorithm, all communications
between the PDs are not required; then, the protection system
can work properly in case of communication loss. Each PD
should be able to detect if the fault is located in the pro-
tected line or another line by using only the local information
of the PD. The algorithm uses the sequence components of
voltages of each PD during fault conditions. Furthermore the
developed algorithm can be applied to other DS grid configu-
rations. In Fig. 1, the single-line diagram of the analyzed DS
is shown, with DG penetration. The HV grid rated voltage is
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3127
66 kV which is transformed to 20 kV through an HV/MV
transformer, isolated using a zig-zag transformer to create an
artificial neutral (YNd11 grounded through zig-zag) [42]. The
rated power of the grid is 25 MVA, where various DGs are
connected at different buses through an MV/LV transformer
configuration (D11yg). Table I shows the grid parameters.
Each PD consists of a relay where the algorithm is executed
and a CB. The relay structure is presented in the right corner
of Fig. 1.
The main focus of this paper is to study the effect of a
high penetration level of inverter-based DGs. However, in the
case of a grid with rotating machines operating as DGs,
the proposed algorithm is able to function as well, because
the current imposed from the rotating generators should be
higher and maintained for a longer time than in the case of
inverter-based DGs [25]. Therefore, during a fault, a reduc-
tion in the voltage is observed, and the same strategy of LO
algorithm is applied.
The VSI controller’s response was implemented under grid
faults combining the capabilities of LVRT and the specifi-
cations of the Spanish grid code. Two scenarios have been
considered: the first imposes only a positive-sequence current,
and the second imposes both positive and negative-sequence
currents. The strategies have been studied to offer more
reactive power injections, which will help to support the grid
 3128
TABLE I
G RID PARAMETERS
TABLE II
ANN FAULT C LASSIFICATION PARAMETERS
Fig. 3. Flowchart of fault classification algorithm.
during symmetrical and unsymmetrical faults [31]. Different
control strategies for a grid-connected inverter have been
employed, and the output voltage behavior during symmetri-
cal and unsymmetrical voltage sags has been analyzed [17]. In
addition, the importance of complying with grid code require-
ments for DGs operating in a faulty grid with both balanced
and unbalanced conditions, as well as ensuring the power con-
verter voltage and current limits are not exceeded have been
demonstrated [43].
Different fault location algorithm has been used for each
type of fault. Because the sequence components would change
based on the fault type (symmetrical/unsymmetrical), a fault
classification technique is essential before implementing the
proposed LO algorithm. During any type of fault, the three
phases are disconnected in the MV grid.
A. Fault Classification Algorithm
In this work, ANN is chosen to be the tool to identify the
fault type. The main merit of using ANN in this application
is the fast and reliable decision and the availability to use the
same ANN in different grid voltage levels; then, a prepro-
cessing stage will be implemented, adapting the input signals.
The flowchart of the fault classification algorithm is shown
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IEEE TRANSACTIONS ON SMART GRID, VOL. 14, NO. 4, JULY 2023
in Fig. 3. In the pre-processing stage, the three abc instanta-
neous fundamental voltages (va (t), vb (t), and vc (t)) are divided
by the base values of the system in order always to obtain pu
values that are easier to adapt to the ANN to different grid volt-
age levels. In distribution grids, the allowable voltage drops
equal 7.5% [44]; therefore, if the voltage drop at any phase is
less than 0.925 pu, this will be considered a fault. This value
can be adjustable depending on the condition of the analyzed
grid. In order to identify the ground fault, the zero-sequence
voltage is used (v0 ), which is obtained from the abc voltages,
as in the case of two-phase fault, the zero-sequence voltage is
approximately equal to 0; however, in the case of two-phase
to ground faults, the zero-sequence voltage is larger than 0.
These data are sent to an ANN to make the correct decision,
corresponding to the fault type (0 → no fault, and 10 →
three-phase fault) as seen in Fig. 3. Table II shows the trained
fault classification ANN parameters. The ANN is trained for
about 1000 cases to manage parameter changes that impact
the algorithm’s decision.
B. LO Algorithm Procedure
The values of the sequence voltages at each bus have been
utilized by the LO algorithm. By using the under-voltage relay,
two points with the same voltage are obtained, which means
two PDs could disconnect simultaneously. So, to disconnect
only the PD at the faulted line, an improvement with an addi-
tional algorithm will be used named the recloser algorithm.
The main idea of the algorithm is to open and close after a
specific time interval (delay). The flowchart of the LO algo-
rithm is shown in Fig. 4. This flowchart can be explained as
follow: [1] the type of fault is determined, [2] depending on
the type of fault (symmetrical or unsymmetrical), the positive-
sequence voltage (v+ ) or the negative-sequence voltage (v− )
is utilized to tripped the two PDs with the same voltage, [3]
one of the two tripped PDs is connected, if the PD is exposed
to the fault then it trips, [4] then the other PD is connected
after a delay to test the fault existence that is explained in
Section II-C.
In the case of a single-phase fault, one end of the faulted
line can be located by using negative-sequence voltage during
the fault. During the fault, the negative-sequence voltage of the
two PDs at one end of the faulted line (DL3) will be higher
than any other negative-sequence voltage values of other lines;
then the recloser algorithm will be implemented to disconnect
the PD at the faulted line. Therefore, the highest value means
faster disconnection. The next step is disconnecting the PD
with the highest negative-sequence voltage and analyzing the
grid after the disconnection. After the disconnection of one end
 BAKKAR et al.: MULTI-LAYER SMART FAULT PROTECTION FOR SECURE SGs
Fig. 4. Flowchart of the proposed LO algorithm.
Fig. 5. Negative-sequence voltage profile during single-phase fault with
one DG connected at bus 3 (a) the first disconnection, (b) the second
disconnection.
of the faulted line, the highest value of the negative-sequence
voltage will be obtained at the other end of the faulted line,
which is used in the case of a single-phase fault to isolate the
faulted line.
Fig. 5 shows the negative-sequence voltage profile corre-
sponding toa single-phase to ground fault. It can be illustrated
that the v− at the faulted line (DL4) has the highest value,
so a first disconnection can be implemented, and then, using
the same strategy, the other end of the faulted line (DL4) is
disconnected. Similar behavior is obtained when the fault is at
DL1, as seen in Fig. 5. In the case of two-phase or two-phase
to ground faults, the same idea applied in the case of single-
phase is used utilizing the negative-sequence voltage during
the fault.
In the case of a three-phase fault, positive-sequence voltage
is used to distinguish the location of the fault and disconnect
one end of the faulted line. The PD that detects a three-phase
fault with the lowest positive-sequence voltage is the first to
trip. After the first disconnection, the same criteria are used
again to disconnect the other end of the faulted line. Fig. 6
shows the voltage profile in the case of a three-phase fault.
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3129
Fig. 6. Positive-sequence voltage profile during three-phase fault with
one DG connected at bus 3 (a) the first disconnection, (b) the second
disconnection.
For example, during a three-phase fault at DL3, the lowest
positive-sequence voltage is at bus 4. Therefore, the PDs con-
nected to bus 4 will trip (PD6, PD7). Then, the same criterion
is used to disconnect the other end of DL3. As PD6 is already
disconnected, the lowest positive-sequence value is at bus 3,
so the PD connected to bus 3 will trip (PD4, PD5). The main
idea of the algorithm is to use the recloser to open and close
after some time. The exact idea of the recloser algorithm is
explained in the following subsection. The sequence compo-
nents shown in Fig. 5 and Fig. 6 are measured at each PD
connected to each bus. So, each PD is associated with a bus.
The equation used for the definite time-voltage characteris-
tic curve is based on IEEE definite time standard [45], [46].
The disconnection of the first PD is based on the magni-
tude of the definite time curve of the positive-sequence or
negative-sequence voltages. The selected definite time curve
depends on fault type, as shown in Fig. 7. Then, the discon-
nection of the second PD depends on the fault type algorithm.
The curve has been designed according to positive- and
negative-sequence voltages for different grid configurations
and scenarios. For example, the positive-sequence voltage is
utilized during a symmetrical fault at DL3 (Fig. 1). The low-
est positive-sequence voltage is at PD6 and PD7 (voltage at
bus 4 in Fig. 6 (a)), and according to Fig. 7(a), the lowest
value means fast disconnection. Therefore, PD6 and PD7 are
disconnected, then utilizing the recloser algorithm, only PD6
is tripped, and PD7 is reconnected because, during the second
disconnection (Fig. 7 (b)), only PD6 detects the fault.
On the other hand, as some distribution lines are relatively
short and the impedance of the medium voltage DS is rela-
tively low, the voltage difference between both ends of the
distribution line could be slight. However, as both ends of
the line have to be disconnected, the proposed LO protection
algorithm utilizing the recloser algorithm can operate. In this
example, PD5 will disconnect because its positive-sequence
voltage is the second lowest voltage, as seen in Fig. 6 (a).
In case of a relay fails to trip due to any malfunctioning.
This case can be analyzed as seen in Fig. 6, for example,
during a three-phase fault at DL4 with one DG connected at
bus 3, the lowest value of the positive-sequence voltage is at
bus 5. Therefore, the PD connected to that bus (PD8) must
trip at (v+ ≈ 0.21 pu → ≈ 0.11 s) obtained from Fig. 7(a). If
the corresponding PDs connected to bus 5 (PD8) did not trip,
then the PD at the other end of the faulted line (bus 4) will
trip, which is PD7, because it has the second lowest value out
 3130
Fig. 7. Definite time curve (a) Positive-sequence voltage, (b) Negative-
sequence voltage.
of all the positive-sequence voltage values and so on, as can
be seen in Fig. 6(a), so the PDs connected to bus 4 will trip
at (v+ ≈ 0.29 pu → ≈ 0.19 s).
The main merit of utilizing the LO algorithm is operat-
ing without communication, and even during a configuration
change, the LO can operate because the configuration change
will not affect the algorithm’s strategy. In this case, depending
on the type of fault, the sequence voltages are utilized, and
the corresponding curve is used to obtain the appropriate trip
time. In future work, the algorithm can be studied and adapted
for single-phase grids to guarantee the functionality of the LO
algorithm in other grid types, such as LV distribution grids.
C. Recloser Algorithm
According to the standard of high voltage switchgear,
alternating current circuit breakers, ratified by the Spanish
Association for Standardization, more than one reclosing step
can be achieved. Besides, the reclosing time can last from
multiple periods to seconds [47]. The problems of applying
the conventional reclosing methods in the distribution system
with DG penetration have been discussed in the literature [19].
Nevertheless, in the proposed reclosing strategy, only one step
is needed, which lasts for a short period (milliseconds), and
no unbalance is detected, neither by simulation results nor
experimentally (Fig. 9, Fig. 15, and Fig. 16). In an inverter-
based DG, the difference in the RMS value between transient
and steady-state is slight [17]; therefore, the voltage recovery
is fast. Moreover, in the authors’ previous work [17], [48],
the three-phase inverter injected currents are calculated for
symmetrical and unsymmetrical voltage sags. In addition, the
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Fig. 8. Recloser algorithm explanation when the fault (a) at the end of the
DL, (b) at the middle of the DL.
demonstration of complying with grid code standards and
ensuring power converter voltage and current limitations have
been presented
As shown in Fig. 8, two signals are used; the first is to turn
on and off the PD and the second is to indicate if there is a
fault or no-fault seen by the PD. As shown in Fig. 1, if there
is a fault at DL3, PD6 and PD7 have the same under-voltage,
so both of them could disconnect simultaneously. If PD6 is
faster than PD7, both disconnect, but PD6 will be connected
again after a fixed delay. If there is a fault, then PD6 will
disconnect permanently, and after a longer fixed delay, PD7
will connect, as presented in Fig. 8(a). On the other hand, if
PD7 is faster than PD6, at first, both of them disconnect due to
under-voltage. Then PD7 will connect first; in this case, there
is no fault seen by PD7 because PD6 is still disconnected,
so that PD7 will continue connected. After a delay, PD6 will
connect and see the fault so that PD6 will disconnect again.
In case of fault at the middle of the line, as seen in Fig. 8(b),
four PDs will have the same under-voltage (connected to the
two buses at the end of the faulted line), and the recloser
algorithm will be applied for each end of the line.
III. VALIDATION OF L OCAL P ROTECTION A LGORITHM
Different fault types at different locations are tested to verify
the proposed LO protection algorithm. Fig. 9 shows the abc
voltages, abc currents, and trip signals for the analyzed grid,
with unsymmetrical faults at DL5 with two DGs (Fig. 9(a)),
and with unsymmetrical faults at DL1 without DGs (Fig. 9(b)).
In order to analyze the effect of DG penetration on the ana-
lyzed grid, Fig. 9 is presented during unsymmetrical faults
that occurred at DL1 and DL5. Fig. 9(a) represents the grid
in the case of two DGs and a single-phase to ground fault
occurred at DL5 at (0.5 s). In this case, both PDs (PD8, PD9)
will trip at the same time (0.9 s) (blue arrows in Fig. 9(a)),
as both of them are exposed to the same negative-sequence
voltage (0.06 pu) that corresponds to (0.4 s) as seen in Fig. 7
(red line). Then, the recloser algorithm will be applied, in this
case, PD9 is closed before PD8, because PD9 is exposed to
 BAKKAR et al.: MULTI-LAYER SMART FAULT PROTECTION FOR SECURE SGs 3131

Fig. 9. abc voltages, abc currents, and trip signals for LO (a) with 2 DGs during 1 ph to ground (AG) at DL5, (b) without DG during 2 ph (BC) at DL1.

the fault, and when it closes again, it will still have exposed
to the fault, and as a consequence PD9 will trip, after that
at (0.935 s) (Fig. 9(a)) PD8 will be connected again and at
that time the fault will be cleared so it will remain connected.
The same idea is repeated for PD10 and PD11, because they
are connected to the same bus, so both will measure the same
negative-sequence voltage. Then, using the recloser algorithm,
PD10 will be connected first, then trips as it is exposed to
the fault, unlike PD11, which will be connected after a delay
(0.015 s).
In order to verify the effectiveness of the LO algorithm,
the sequence components of the PDs with the corresponding
trip time have been presented as seen in Fig. 9. For example,
if a two-phase fault occurred at DL1, the negative-sequence
voltage at PD1 is equal v− = 0.88 pu, and at PD2 is equal
v− = 0.94 pu. These values correspond to a trip time equal
t = 0.14 s for PD1, and t = 0.12 s for PD2, as shown on the
right side of Fig. 9.
A more precise interpretation of the LO with the recloser
process could be obtained from Fig. 10 when a symmetri-
cal fault occurs at DL3. These figures show the fault and
trip signals in all the PDs connected to buses at the end of
the faulted line. As seen in Fig. 10(a), the protection algo-
rithm depends on the definite-time curve corresponding to the
positive-sequence voltage. The fault signal at PD4 and PD5 is
the same because they are connected to the same bus (bus 3). Fig. 10. Analyzed grid with 2 DGs during 3 ph (abc) at DL3, (a) fault,
The same happens for PD6 and PD7 connected to bus 4. (b) trip.
Fig. 10(b) shows the trip signals of the same PDs. It is shown
that the two PDs connected to the same bus trip at the same
time, in this case, PD6 and PD7 have the first disconnection conclusion can be obtained during an unsymmetrical fault; the
because they have the same minimum positive-sequence value, only difference is that the protection algorithm, in this case,
and PD4 and PD5 have the second disconnection because the depends on the negative-sequence voltage.
positive-sequence value is higher than for the other two PDs A wide range of fault resistance (r) values have been tested
(PD6 and PD7). After that, the recloser algorithm is applied by from milliohms to several ohms; for example, Fig. 11 corre-
connecting PD6, which is exposed to the fault, so it trips again. sponds to a single-phase to ground fault (BG) at DL4 with r =
After the disconnection of PD6, PD7 is connected, then PD7 5 , and r = 0.1 . As seen in Fig. 11, the change in the fault
is not exposed to the fault, and it does not trip. The previous resistance affects the value of the trip time as the sequence

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 3132
Fig. 11. abc voltages, abc currents, and trip signals for LO with 2 DGs during single-phase to ground fault (BG) at DL4 (a) with fault resistance r = 5 ,
(b) with fault resistance r = 0.1 .
Fig. 12. Complete analyzed grid.
voltage is changed (for example, the negative-sequence volt-
age at bus 5 when r = 0.1  is v− = 0.09 pu → t = 0.37 s,
and when r = 5  is v− = 0.04 pu → t = 0.4 s). As shown
in the figure, the algorithm can operate, as the change in the
fault resistance will not affect the utilized strategy, as, during
the fault, both ends of the faulted line are disconnected from
the grid. The algorithm is based first on identifying the type
of fault, and second, the disconnection is done based on the
magnitude of the sequence voltage during the fault.
IV. E XPERIMENTAL VALIDATION
This section presents the experimental verification of the
proposed algorithms by using a scaled physical grid in a
different grid configuration.
In order to verify the proposed algorithm practically, an
equivalent model has been built in the laboratory to give the
same response and dynamic behavior of the analyzed grid.
The grid has been studied with different configurations, with
and without DGs, as shown in Fig. 12. A complete grid con-
sisting of three lines has been designed to emulate the real
analyzed grid. DL1 is equivalent to one DL, DL2 is equiv-
alent to two DLs, and DL3 is equivalent to three DLs. In
order to implement the proposed algorithm, a numerical relay
based on DSP has been used to process the measurement data
obtained from the sensors, then execute the algorithms, and
finally give the appropriate decision (trip signals). The Solid
State Relay (SSR) and the DSP are both used to represent
the PD in the analyzed grid. It consists of an input DC cir-
cuit and an output AC circuit. The device’s operating voltage
ranges from 4 VDC to 32 VDC, which supports an operating
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IEEE TRANSACTIONS ON SMART GRID, VOL. 14, NO. 4, JULY 2023
voltage range from 48-660 V. This wide range gives flexi-
bility to the control signal. Moreover, the turn on/off time is
very fast, which is approximately half a cycle. The grid was
built in the laboratory with aggregated lines to simplify the
test but not affect the complete analysis due to the symmetry.
Nevertheless, similar behavior has been obtained. In addition,
to emulate the impedance of the main grid, an inductor is
added before bus 1 to emulate the grid, as shown in Fig. 12.
The protection scheme is tested with other grid configurations
changing load consumption, different fault locations, and fault
types.
A. Calculation of System Parameters
It can be observed that the idea is to obtain the same
voltages, currents, and impedances in pu in the implemented
laboratory system with perfect agreement with the real system.
The real DS grid base values are: VBase = 20kV, SBase = 25
MVA, and IBase = 721.69 A. The base values for both systems
are shown in Table III. These values are chosen to give the
same pu voltage and current during steady-state in both grids,
so the same behavior is tested. The idea is to fix the laboratory
base values to work with reduced voltages and currents; nev-
ertheless, the pu results are the same as those obtained in the
real grid. Table IV shows the laboratory grid parameters, and
Table III compares these parameters with the analyzed real
grids.
B. Experimental Results
An equivalent system has been built experimentally
in the laboratory, as shown in Fig. 13. Three DSPs
TMS320F28335 have been used to implement the CE, ZO,
and LO protection algorithms. The inverter control was imple-
mented using ControlDesk and dSPACE DS1104. All the pro-
tection algorithms and inverter control have been programmed
using MATLAB software.
Fig. 14 shows the trip signals of the LO protection algorithm
for symmetrical faults when the fault is located at F1 and F2.
If the fault is at F1, PD2 is disconnected first as the minimal
value of the v+ is at bus 2. Then, PD1 will disconnect because,
after the tripping of PD2, the minimal value of the v+ is at
bus 1.
 BAKKAR et al.: MULTI-LAYER SMART FAULT PROTECTION FOR SECURE SGs
Fig. 13. Complete laboratory setup.
Fig. 14. Digital output of LO with DG during Three-phase fault at F1 and F2.
Fig. 15 shows the abc voltages, currents, and trip signals
at PD1 and PD2 located at each end of DL1. The behavior
of the LO algorithm for a three-phase fault is presented. PD2
will be disconnected first as the fault is at the end of the line
(see Fig. 12). In this case, the fault is supplied from two loca-
tions (the main grid and the DG). As shown on the right side
of Fig. 15, the positive-sequence voltage is presented with the
corresponding trip time for PD1 and PD2 to show the experi-
mental performance of the LO algorithm during a symmetrical
fault at F1.
The protection algorithms have been tested for both sym-
metrical (three-phase) and unsymmetrical (single-phase to
ground) faults. During steady-state, fault, and recovery peri-
ods, the error percentage between simulation and experimental
measurements is 5% for instantaneous abc voltages and 2%
for instantaneous abc currents. In order to show the behav-
ior of the recloser algorithm, the two PDs connected to bus 2
(PD2 and PD3) are studied. Due to the lack of PDs, the focus
is on one side of the DL. Fig. 16 shows the behavior of the
LO algorithm when the fault is at F1 and with the recloser
algorithm. During the fault, the minimum value of the v+ is
at bus 2, so PD2 and PD3 are tripped simultaneously as both
of them are connected to the same bus. Then, the recloser
algorithm is applied. If PD2 is faster than PD3, then PD2 will
connect first, and because it is exposed to the fault, it tripped
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3133
TABLE III
C OMPARISON B ETWEEN R EAL G RID AND L ABORATORY G RID
PARAMETERS
TABLE IV
L ABORATORY S YSTEM PARAMETERS
again (green trip signal in Fig. 16). After that, PD3 is con-
nected, and because it is not at the faulted line, then it will
remain connected (blue trip signal in Fig. 16).
V. C ONCLUSION
This paper proposes an additional protection level for MV
DS smart grid that can be used with high DG penetra-
tion. The proposed protection level avoids communication
problems and undesirable tripping to have a more secure
and redundant protection system in case of vulnerability or
cyberattacks. The LO has been proposed independently of
the communication between the PD. The main advantage of
this algorithm is the independence in the decision of each
PD, which eliminates communication problems. Furthermore,
the LO algorithm serves as an alternative and supportive
protection for (CE/ZO) protection algorithms in case of emer-
gency or cyberattacks. The Local protection algorithm (LO)
 3134
Fig. 15. Behavior of LO control for three-phase fault at F1.
Fig. 16. Behavior of LO with recloser for the three-phase fault at F1.
is developed to locate the exact fault location based solely on
local measurements gathered at each PD, and make decisions
locally according to the signals received. According to the type
(symmetrical or unsymmetrical), different algorithms will be
applied depending on the calculation of the sequence com-
ponents. In order to analyze the proposed protection scheme,
various cases have been studied, including different fault loca-
tions and fault types. Furthermore, a comparison of simulation
results and the experimental implementation shows strong reli-
ability and accuracy of the proposed algorithms in different
grid scenarios with and without DG penetration. The proposed
protection strategies can provide a more secure and depend-
able system against system faults, discrepancy, and hacking.
Apart from the fast answer, one of the main advantages is
that it can be used with different grid configurations, so it is
suitable protection in case of grid reconfiguration.
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3135
Mostafa Bakkar received the B.Sc. degree in
mechatronics engineering from the Alexandria
Higher Institute of Engineering and Technology,
Alexandria, Egypt, in 2008, the M.Sc. degree in elec-
trical and control engineering from Arab Academy
for Science, Technology and Maritime Transport,
Alexandria, in 2014, and the Ph.D. degree from the
Department of Electrical Engineering, Universitat
Politècnica de Catalunya, Barcelona, Spain, in
February 2022. His research interests include fault
diagnosis, power system protection, artificial intelli-
gence applications in power systems, smart grids, distributed power genera-
tion, grid code integration, inverter control strategies, and renewable energy
systems.
Santiago Bogarra was born in Gavá, Spain, in
May 1966. He received the Ph.D. degree in elec-
trical engineering from the Polytechnic University
of Catalonia, Barcelona, Spain, in 2002. Since
1996, he has been with the Polytechnic University
of Catalonia, where he is an Associate Professor
of Electrical Engineering. He has published more
than 40 conference and journal papers. His current
research interests include electric aircraft and dis-
tributed generators connected to distributed power
systems, further main areas of research are lightning
protection and power system quality.
Felipe Córcoles was born in Almansa, Spain, in
1964. He received the B.S. degree in industrial engi-
neering and the Ph.D. degree in engineering from
the Universitat Politècnica de Catalunya, Barcelona,
Spain, in 1990 and 1998, respectively, where he
has been a Professor with the Electrical Engineering
Department since 1992. His research interest lies in
the areas of electrical machines and power system
quality.
Javier Iglesias received the Master of Science
degree in power systems engineering from the
Polytechnical University in Catalonia (UPC), Spain,
and the Ph.D. degree from the UPC and the
University of Bath, U.K. He has more than eighteen
years of experience in the consulting area. He has
conducted planning and power system studies (pro-
tection coordination, harmonic, filter design, stability
studies, and integration of renewables) for electri-
cal utilities and independent power producers. From
February 2021, he is responsible for Global Product
Specialist for Solid State Transformer, Medium Voltage DC, and DC grid
distribution applications.
Wael Al Hanaineh received the B.Sc. degree in
electrical engineering from the University of Jordan,
Jordan, in 2016, and the M.Sc. degree in electri-
cal and renewable energy engineering from German
Jordanian University, Jordan, in 2019. He is cur-
rently pursuing the Ph.D. degree in electrical engi-
neering with the Technical University of Catalonia,
Barcelona, Spain. His research interests are in the
areas of fault detection, power system protection,
power quality, smart grid applications, electric vehi-
cles, and integration of renewable energy systems.