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5 4 3 2 1

2022 ADL Block Diagram (Roadster - ZGN) 1


HDMI 2.1
SODIMM1 VBIOS
DDR5 4800MHz HDMI Re-driver PG.48 HDMI Conn.
Max. 32GB Reverse PG.21 16M PG.30 PG.49
PI3HDX12211ZHEX
Channel A
SODIMM2
Max. 32GB Standard PG.22
DDR5 4800MHz

Channel B
Alder lake-P SPI HDMI

+ PCIe
D D
X8 NVIDIA VRAM
GN20-E3 Max-P GN20-E3 256M x 16 X 6 pcs gDDR6
GN20-E5/E6/E7 256M x 16 X 8 pcs gDDR6
PCIe SSD
M.2 2280
PCIe Gen4 x4 Alder lake-PCH GN20-E5/E6/E7 Max-Q
GN20-P1 Max-P
GN20-P1 256M x 16 x 4pcs gDDR6
PG.38~41
PG.25 ~37
PG.53
PG.2 ~15
DDS eDP
PCIe SSD PCIe Gen4 x4 eDP
M.2 2280 eDP Mux PG.44 Panel Conn. PG.45
PG.55 PI3DPX8121ZLDEX
USB2
U2-P2
TCP0 Thunderbolt Re-timer Type C Conn.
DMIC Audio HDA Intel Burnside Bridge PG.76
SMBUs JHL8040R
PG.45 PG.64 PG.74
ALC3324
SMBUs
MIC/HP
SMBUs CC
C PD Controller PG.73 C

Speaker Combo Jack CCG6


CYPD6127-48LQXI SMBUs To EC
PG.66 PG.66

BC1.2 PG.78
SLGC55544CVTR
I2C
USB3 U3-P1 U3 Re-driver (A) U3 type A Conn.
PG.78 (Port A)
PG.79
PS8811QFN36GTR2-A3
G-Sensor (D5/D7) G-Sensor (D5/D7) USB2 U2-P1
D/B PG.97 M/B PG.91
U2-P3
USB3 U3-P2 U3 Re-driver (B)
PG.80 U3 type A Conn.
Touch EMR (D5/D7) (Port B)
I2C PS8811QFN36GTR2-A3 PG.81
D/B PG.97
PG.97
(D5/D7) I/O Conn.
StylusEMR (D5/D7) I2C 1. Eye Tracker U2-P5
2. 3D Display U2-P4
B
D/B PG.97 B

USB2 P4/P5
I2C
P6 P10 P8 P7 P9

CCD FingerPrinter USB keyboard Card Reader D.B.


SPI PG.45 PG.88 PG.87 SD3.0 PG.96

CNVi WLAN PG.68 RJ45


Turbo Key TouchPad ROM dTPM PG.69
CNVi/Discrete
PG.87 PG.88 PG.19 PG.20
LAN Card Reader D5/D7
PS2 E3100G PG.68 SD7.0 PG.96

EC eSPI PCIe P4 P9 P11


IT5570
PG.86
Power : H45 (Watt)
Package: BGA1744
SMB Size:50x25x1.3 (mm)
A A
FAN Keyboard LED LED Driver
PG.93 PG.87 PG.88 ene6K5130 PG.89

RTC
K.B. B.L. K.B. RGB B.L. PG.93
Turbo Key Card Reader
PG.87 PG.87 Quanta Computer Inc.
Daughter Board 1 Daughter Board 2 PROJECT : ZGN
Size Document Number Rev
Custom ZGN Block Diagram A1A

Date: Monday, March 21, 2022 Sheet 1 of 150


5 4 3 2 1
5 4 3 2 1

W3
U053A

BE8
2
[44] INT_eDP_TXP3 DDIA_TXP_3 TCP0_TXRX_P1 TCP0_TXRX_P1[74]
AA3 BE6
[44] INT_eDP_TXN3 DDIA_TXN_3 TCP0_TXRX_N1 TCP0_TXRX_N1[74]
AA1 BG8
[44] INT_eDP_TXP2 DDIA_TXP_2 TCP0_TXRX_P0 TCP0_TXRX_P0[74]
AB1 BG6
[44] INT_eDP_TXN2 DDIA_TXN_2 TCP0_TXRX_N0 TCP0_TXRX_N0[74]
AB3 AY3
eDP x4 Lanes [44]
[44]
INT_eDP_TXP1
INT_eDP_TXN1
AD3 DDIA_TXP_1 TCP0_TX_P1 BB3
TCP0_TX_P1[74]
TCP0_TX_N1 [74] TCP0
AF1 DDIA_TXN_1 TCP0_TX_N1 BD3
[44] INT_eDP_TXP0 DDIA_TXP_0 TCP0_TX_P0 TCP0_TX_P0[74]
D AD1 BE3 D
[44] INT_eDP_TXN0 DDIA_TXN_0 TCP0_TX_N0 TCP0_TX_N0 [74]
BB1
TCP0_AUX_P TCP0_AUX_DP [74]
AF3 BD1
[44] INT_eDP_AUXP DDIA_AUXP TCP0_AUX_N TCP0_AUX_DN [74]
AG3
[44] INT_eDP_AUXN DDIA_AUXN AV8
PEN_RESET ER23 TCP1_TXRX_P1 AV6
STYLUS-EMR [97] PEN_RESET PEN_I2C_IRQ ET23 GPP_E22/DDPA_CTRLCLK/DNX_FORCE_RELOAD TCP1_TXRX_N1 AY8
[97] PEN_I2C_IRQ GPP_E23/DDPA_CTRLDATA TCP1_TXRX_P0 AY6
CPU_EDP_HPD EV25 TCP1_TXRX_N0 AP3
[44] CPU_EDP_HPD
AP6
GPP_E14/DDSP_HPDA/DISP_MISC_A TCP1_TX_P1
TCP1_TX_N1
AR3
AU3
TCP1
[150] IN_CLK DDIB_TXP_3 TCP1_TX_P0
AP8 AW 3
[150] IN_CLK# DDIB_TXN_3 TCP1_TX_N0
AM6 AR1
[150] IN_D0 DDIB_TXP_2 TCP1_AUX_P
AM8 AU1
[150] IN_D0# DDIB_TXN_2 TCP1_AUX_N
AK6
[150] IN_D1 DDIB_TXP_1
AK8 BN8
[150] IN_D1# DDIB_TXN_1 TCP2_TXRX_P1 TCP2_TXRX_P1[150]
AH6 BN6
[150] IN_D2 DDIB_TXP_0 TCP2_TXRX_N1 TCP2_TXRX_N1[150]
AH8 BL8
[150] IN_D2# DDIB_TXN_0 TCP2_TXRX_P0 TCP2_TXRX_P0[150]
BL6
DDPB AE6 TCP2_TXRX_N0 BK3
TCP2_TXRX_N0[150]
TP158
TP159
AE8 DDIB_AUXP
DDIB_AUXN
TCP2_TX_P1
TCP2_TX_N1
BM3
BG3
TCP2_TX_P1[150]
TCP2_TX_N1 [150] TCP2
TCP2_TX_P0 TCP2_TX_P0[150]
EK46 BH3
[150] DPB_DDCCLK GPP_H15/DDPB_CTRLCLK/PCIE_LINK_DOW N TCP2_TX_N0 TCP2_TX_N0 [150]
EL46 BH1
[150] DPB_DDCDATA GPP_H17/DDPB_CTRLDATA TCP2_AUX_P TCP2_AUX_DP [150]
BK1
HDMI_HPD_CON TCP2_AUX_N TCP2_AUX_DN [150]
EB47
[150] HDMI_HPD_CON GPP_A18/DDSP_HPDB/DISP_MISCB BW 8
DV54 TCP3_TXRX_P1 BW 6
STYLUS-EMR [97] PEN_PDCT_IN
[97] PEN_FWE_OUT
DV52 GPP_A21/DDPC_CTRLCLK TCP3_TXRX_N1 BU8
GPP_A22/DDPC_CTRLDATA TCP3_TXRX_P0 BU6
C ER26 TCP3_TXRX_N0 BU3 C

TCP0
[74] TBT_LSX0_TXD
[14,74] TBT_LSX0_RXD
ET26 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD/BSSB_LS0_RX
GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD/BSSB_LS0_TX Strap pin
TCP3_TX_P1
TCP3_TX_N1
BV3
BN3
TCP3
EL26 TCP3_TX_P0 BR3
[15] BOARD_ID11 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD/BSSB_LS1_RX TCP3_TX_N0
EN26 BR1
[14] TBT_LSX1_RXD GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD/BSSB_LS1_TX Strap pin TCP3_AUX_P
R945 *Short_0201 BU1
[150] WWAN_RST_EC_ODL TCP3_AUX_N
FC37
[150] TBT_LSX2_TXD GPP_D9/ISH_SPI_CS#/DDP3_CTRLCLK/TBT_LSX2_TXD/BSSB_LS2_RX/GSPI2_CS0#
EV37 AL3
[14] TBT_LSX2_RXD GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/TBT_LSX2_RXD/BSSB_LS2_TX/GSPI2_CLK Strap pin VSS_AL3 AM1 TCP_RCOMP R739 2.2K_0.5%_2
EY37 TCP_RCOMP
[15] BOARD_ID13 GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/TBT_LSX3_TXD/BSSB_LS3_RX/GSPI2_MISO
FA37 AF32 DSI_DE_TE_2
[14] TBT_LSX3_RXD
R949 *Short_0201 GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/TBT_LSX3_RXD/BSSB_LS3_TX/GSPI2_MOSI Strap pin DISP_UTILS_2
[150] WWAN_PERST_EC_L
HDMI_HPD_CON_NV_Q DY54 AJ1 DDIA_RCOMP
TCP1_DDI1_HPD_Q EB49 GPP_A17/DISP_MISCC DDIA_RCOMP AL1 DDIB_RCOMP
DP_HPD_PCH_Q EB51 GPP_A19/DDSP_HPD1/DISP_MISC1 DDIB_RCOMP
GPP_A20/DDSP_HPD2/DISP_MISC2 DJ1 DISP_UTILS R738 R737 R202
TypeA-BC1.2 [79] USB_OC1#
USB_OC1# DY47 DISP_UTILS_1 TP091
150_1%_2 150_1%_2 *100K_1%_2
USB_OC2# DY49 GPP_A14/USB_OC1#/DDSP_HPD3/DISP_MISC3
TypeA-BC1.2_N [81] USB_OC2# GPP_A15/USB_OC2#/DDSP_HPD4/DISP_MISC4
PCH_DISP_ON ET21
[44] PCH_DISP_ON PCH_LVDS_BLON VDDEN
EN21
eDP [32,44] PCH_LVDS_BLON
[44] PCH_DPST_PWM
PCH_DPST_PWM EL21 EDP_BKLTEN
EDP_BKLTCTL
1 OF 22

CPU_ADL_P_1744P

B B

USB_OC +3V_DEEP_SUS
HDMI_HPD DP Reserve +3V
+3V

R291 10K_1%_2 USB_OC1#


R003
R278 10K_1%_2 USB_OC2# **1M_1%_2

R938

2
*1M_1%_2

2
3 1 DP_HPD_PCH_Q
[32] DP_HPD_PCH
3 1 HDMI_HPD_CON_NV_Q
+3V [48] HDMI_HPD_CON_NV
Q25 **PJA138K
eDP Q32 *PJA138K
R955 *0_5%_2
R933 *10K_1%_2 PCH_DPST_PWM R951 *Short_0201

R775 100K_1%_2 CPU_EDP_HPD

Disable Termination Concept D Reserve


R277 100K_1%_2 HDMI_HPD_CON

R849 100K_1%_2 DP_HPD_PCH_Q TBT_HPD +3V


+3V_DEEP_SUS R940 *10K_1%_2 PEN_I2C_IRQ

[No need for iTBT]


A R939 10K_1%_2 PEN_RESET A

R002
1M_1%_2
Glitch Free
2

[73] TBTA_HPD 3 1 TCP1_DDI1_HPD_Q Quanta Computer Inc.


R932 100K_1%_2 PCH_DISP_ON
R001
Q26 2N7002K PROJECT : ZGN
R934 100K_1%_2 PCH_LVDS_BLON 100K_1%_2 Size Document Number Rev
Custom ADL-P 1/14 (DDI/TBT/eDP) A1A

Date: Thursday, May 26, 2022 Sheet 2 of 150


5 4 3 2 1
5 4 3 2 1

DDR CHANNEL A
ALDER LAKE Processor DDR5 (NIL) 3
DDR CHANNEL B
U053B
U053C
DDR4 / LP4x / LP5_ascend / LP5_descend / DDR5
DDR4(IL) / DDR4(NIL) / DDR5(NIL) / LP4x-LP5(NIL)
DH58 CD49 DDR4(IL) / DDR4(NIL) / DDR5(NIL) / LP4x-LP5(NIL) DDR4 / LP4x / LP5_ascend / LP5_descend / DDR5
[21] M_0_DQ_0_7 DDR0_DQ_0_7/DDR0_DQ_0_7/DDR0_DQ_0_7/DDR0_DQ_0_7 DDR0_CLK_P_1/DDR3_CLK_P/DDR3_CLK_P/DDR3_CLK_P/DDR1_CLK_P_1 M_1_CLKP1 [21] BB58 V48
DG57 CD48 [22] M_2_DQ_0_7 M_3_CLKP1 [22]
[21] M_0_DQ_0_6 DDR0_DQ_0_6/DDR0_DQ_0_6/DDR0_DQ_0_6/DDR0_DQ_0_6 DDR0_CLK_N_1/DDR3_CLK_N/DDR3_CLK_N/DDR3_CLK_N/DDR1_CLK_N_1 M_1_CLKN1 [21] BA57 DDR0_DQ_4_7/DDR1_DQ_0_7/DDR2_DQ_0_7/DDR4_DQ_0_7 DDR1_CLK_P_1/DDR7_CLK_P/DDR7_CLK_P/DDR7_CLK_P/DDR3_CLK_P_1 V49
DH56 CH61 [22] M_2_DQ_0_6 M_3_CLKN1 [22]
[21] M_0_DQ_0_5 DDR0_DQ_0_5/DDR0_DQ_0_5/DDR0_DQ_0_5/DDR0_DQ_0_5 NC/DDR2_CLK_P/DDR2_CLK_P/DDR2_CLK_P/DDR1_CLK_P_0 M_1_CLKP0 [21] BB56 DDR0_DQ_4_6/DDR1_DQ_0_6/DDR2_DQ_0_6/DDR4_DQ_0_6 DDR1_CLK_N_1/DDR7_CLK_N/DDR7_CLK_N/DDR7_CLK_N/DDR3_CLK_N_1 AB61
DG60 CF61 M_1_CLKN0 [21] [22] M_2_DQ_0_5 M_3_CLKP0 [22]
[21] M_0_DQ_0_4 DDR0_DQ_0_4/DDR0_DQ_0_4/DDR0_DQ_0_4/DDR0_DQ_0_4 NC/DDR2_CLK_N/DDR2_CLK_N/DDR2_CLK_N/DDR1_CLK_N_0 BA60 DDR0_DQ_4_5/DDR1_DQ_0_5/DDR2_DQ_0_5/DDR4_DQ_0_5 NC/DDR6_CLK_P/DDR6_CLK_P/DDR6_CLK_P/DDR3_CLK_P_0 Y61
DL60 CN49 [22] M_2_DQ_0_4 M_3_CLKN0 [22]
[21] M_0_DQ_0_3 DDR0_DQ_0_3/DDR0_DQ_0_3/DDR0_DQ_0_3/DDR0_DQ_0_3 NC/DDR1_CLK_P/DDR1_CLK_P/DDR1_CLK_P/DDR0_CLK_P_1 M_0_CLKP1 [21] BE60 DDR0_DQ_4_4/DDR1_DQ_0_4/DDR2_DQ_0_4/DDR4_DQ_0_4 NC/DDR6_CLK_N/DDR6_CLK_N/DDR6_CLK_N/DDR3_CLK_N_0 AG49
DK56 CN48 [22] M_2_DQ_0_3 M_2_CLKP1 [22]
D [21] M_0_DQ_0_2 DDR0_DQ_0_2/DDR0_DQ_0_2/DDR0_DQ_0_2/DDR0_DQ_0_2 NC/DDR1_CLK_N/DDR1_CLK_N/DDR1_CLK_N/DDR0_CLK_N_1 M_0_CLKN1 [21] BD56 DDR0_DQ_4_3/DDR1_DQ_0_3/DDR2_DQ_0_3/DDR4_DQ_0_3 NC/DDR5_CLK_P/DDR5_CLK_P/DDR5_CLK_P/DDR2_CLK_P_1 AG48 D
DL57 CU61 [22] M_2_DQ_0_2 M_2_CLKN1 [22]
[21] M_0_DQ_0_1 DDR0_DQ_0_1/DDR0_DQ_0_1/DDR0_DQ_0_1/DDR0_DQ_0_1 DDR0_CLK_P_0/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK_P_0 M_0_CLKP0 [21] BE57 DDR0_DQ_4_2/DDR1_DQ_0_2/DDR2_DQ_0_2/DDR4_DQ_0_2 NC/DDR5_CLK_N/DDR5_CLK_N/DDR5_CLK_N/DDR2_CLK_N_1 AL61
DK58 CR61 [22] M_2_DQ_0_1 M_2_CLKP0 [22]
[21] M_0_DQ_0_0 DDR0_DQ_0_0/DDR0_DQ_0_0/DDR0_DQ_0_0/DDR0_DQ_0_0 DDR0_CLK_N_0/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK_N_0 M_0_CLKN0 [21] BD58 DDR0_DQ_4_1/DDR1_DQ_0_1/DDR2_DQ_0_1/DDR4_DQ_0_1 DDR1_CLK_P_0/DDR4_CLK_P/DDR4_CLK_P/DDR4_CLK_P/DDR2_CLK_P_0 AJ61
DA58 [22] M_2_DQ_0_0 M_2_CLKN0 [22]
[21] M_0_DQ_1_7 DDR0_DQ_1_7/DDR0_DQ_1_7/DDR0_DQ_1_7/DDR0_DQ_1_7 AR58 DDR0_DQ_4_0/DDR1_DQ_0_0/DDR2_DQ_0_0/DDR4_DQ_0_0 DDR1_CLK_N_0/DDR4_CLK_N/DDR4_CLK_N/DDR4_CLK_N/DDR2_CLK_N_0
CY57 CF51 [22] M_2_DQ_1_7
[21] M_0_DQ_1_6 DDR0_DQ_1_6/DDR0_DQ_1_6/DDR0_DQ_1_6/DDR0_DQ_1_6 NC/DDR3_CKE_0/DDR3_WCK_P/DDR3_WCK_P/NC AP57 DDR0_DQ_5_7/DDR1_DQ_1_7/DDR2_DQ_1_7/DDR4_DQ_1_7 AB51
DB56 CH51 [22] M_2_DQ_1_6
[21] M_0_DQ_1_5 DDR0_DQ_1_5/DDR0_DQ_1_5/DDR0_DQ_1_5/DDR0_DQ_1_5 NC/DDR3_CKE_1/DDR3_WCK_N/DDR3_WCK_N/NC AR56 DDR0_DQ_5_6/DDR1_DQ_1_6/DDR2_DQ_1_6/DDR4_DQ_1_6 NC/DDR7_CKE_0/DDR7_WCK_P/DDR7_WCK_P/NC Y51
CY60 CE57 [22] M_2_DQ_1_5
[21] M_0_DQ_1_4 DDR0_DQ_1_4/DDR0_DQ_1_4/DDR0_DQ_1_4/DDR0_DQ_1_4 NC/DDR2_CKE_0/DDR2_WCK_P/DDR2_WCK_P/NC AP60 DDR0_DQ_5_5/DDR1_DQ_1_5/DDR2_DQ_1_5/DDR4_DQ_1_5 NC/DDR7_CKE_1/DDR7_WCK_N/DDR7_WCK_N/NC W57
A_0 DE60 CF58 [22] M_2_DQ_1_4
[21] M_0_DQ_1_3 DDR0_DQ_1_3/DDR0_DQ_1_3/DDR0_DQ_1_3/DDR0_DQ_1_3 NC/DDR2_CKE_1/DDR2_WCK_N/DDR2_WCK_N/NC AV60 DDR0_DQ_5_4/DDR1_DQ_1_4/DDR2_DQ_1_4/DDR4_DQ_1_4 NC/DDR6_CKE_0/DDR6_WCK_P/DDR6_WCK_P/NC Y58
DD56 CR51
[21] M_0_DQ_1_2
DE57 DDR0_DQ_1_2/DDR0_DQ_1_2/DDR0_DQ_1_2/DDR0_DQ_1_2 NC/DDR1_CKE_0/DDR1_WCK_P/DDR1_WCK_P/NC CU51
B_0 [22] M_2_DQ_1_3
AU56 DDR0_DQ_5_3/DDR1_DQ_1_3/DDR2_DQ_1_3/DDR4_DQ_1_3 NC/DDR6_CKE_1/DDR6_WCK_N/DDR6_WCK_N/NC AL51
[21] M_0_DQ_1_1 DDR0_DQ_1_1/DDR0_DQ_1_1/DDR0_DQ_1_1/DDR0_DQ_1_1 NC/DDR1_CKE_1/DDR1_WCK_N/DDR1_WCK_N/NC [22] M_2_DQ_1_2 DDR0_DQ_5_2/DDR1_DQ_1_2/DDR2_DQ_1_2/DDR4_DQ_1_2 NC/DDR5_CKE_0/DDR5_WCK_P/DDR5_WCK_P/NC
DD58 CR58 AV57 AJ51
[21] M_0_DQ_1_0 DDR0_DQ_1_0/DDR0_DQ_1_0/DDR0_DQ_1_0/DDR0_DQ_1_0 NC/DDR0_CKE_0/DDR0_WCK_P/DDR0_WCK_P/NC [22] M_2_DQ_1_1 DDR0_DQ_5_1/DDR1_DQ_1_1/DDR2_DQ_1_1/DDR4_DQ_1_1 NC/DDR5_CKE_1/DDR5_WCK_N/DDR5_WCK_N/NC
DG50 CP57 AU58 AJ58
[21] M_0_DQ_2_7 DDR1_DQ_0_7/DDR0_DQ_2_7/DDR0_DQ_2_7/DDR1_DQ_0_7 NC/DDR0_CKE_1/DDR0_WCK_N/DDR0_WCK_N/NC [22] M_2_DQ_1_0 DDR0_DQ_5_0/DDR1_DQ_1_0/DDR2_DQ_1_0/DDR4_DQ_1_0 NC/DDR4_CKE_0/DDR4_WCK_P/DDR4_WCK_P/NC
DG47 BA50 AH57
[21] M_0_DQ_2_6 DDR1_DQ_0_6/DDR0_DQ_2_6/DDR0_DQ_2_6/DDR1_DQ_0_6 DDR4(IL) / DDR4(NIL) / DDR5(NIL) / LP4x-LP5(NIL) [22] M_2_DQ_2_7 DDR1_DQ_4_7/DDR1_DQ_2_7/DDR2_DQ_2_7/DDR5_DQ_0_7 NC/DDR4_CKE_1/DDR4_WCK_N/DDR4_WCK_N/NC
DH48 BN51 AY47
[21] M_0_DQ_2_5 DDR1_DQ_0_5/DDR0_DQ_2_5/DDR0_DQ_2_5/DDR1_DQ_0_5 DDR1_DQSP_3/DDR0_DQSP_7/DDR1_DQSP_3/DDR3_DQSP_1 M_1_DQSP3 [21] [22] M_2_DQ_2_6 DDR1_DQ_4_6/DDR1_DQ_2_6/DDR2_DQ_2_6/DDR5_DQ_0_6 DDR4(IL) / DDR4(NIL) / DDR5(NIL) / LP4x-LP5(NIL)
DG53 BL51 BB48 N51 M_3_DQSP3 [22]
[21] M_0_DQ_2_4 DDR1_DQ_0_4/DDR0_DQ_2_4/DDR0_DQ_2_4/DDR1_DQ_0_4 DDR1_DQSN_3/DDR0_DQSN_7/DDR1_DQSN_3/DDR3_DQSN_1 M_1_DQSN3 [21] [22] M_2_DQ_2_5 DDR1_DQ_4_5/DDR1_DQ_2_5/DDR2_DQ_2_5/DDR5_DQ_0_5 DDR1_DQSP_7/DDR1_DQSP_7/DDR3_DQSP_3/DDR7_DQSP_1
DL53 BW51 BA53 L51
[21] M_0_DQ_2_3 M_1_DQSP2 [21] [22] M_2_DQ_2_4 DDR1_DQ_4_4/DDR1_DQ_2_4/DDR2_DQ_2_4/DDR5_DQ_0_4 DDR1_DQSN_7/DDR1_DQSN_7/DDR3_DQSN_3/DDR7_DQSN_1 M_3_DQSN3 [22]
DK48 DDR1_DQ_0_3/DDR0_DQ_2_3/DDR0_DQ_2_3/DDR1_DQ_0_3 DDR1_DQSP_2/DDR0_DQSP_6/DDR1_DQSP_2/DDR3_DQSP_0 BU51 BE53 N61
[21] M_0_DQ_2_2 M_1_DQSN2 [21] [22] M_2_DQ_2_3 DDR1_DQ_4_3/DDR1_DQ_2_3/DDR2_DQ_2_3/DDR5_DQ_0_3 DDR1_DQSP_6/DDR1_DQSP_6/DDR3_DQSP_2/DDR7_DQSP_0 M_3_DQSP2 [22]
DM47 DDR1_DQ_0_2/DDR0_DQ_2_2/DDR0_DQ_2_2/DDR1_DQ_0_2 DDR1_DQSN_2/DDR0_DQSN_6/DDR1_DQSN_2/DDR3_DQSN_0 BL61 BD48 L61
[21] M_0_DQ_2_1 M_1_DQSP1 [21] [22] M_2_DQ_2_2 DDR1_DQ_4_2/DDR1_DQ_2_2/DDR2_DQ_2_2/DDR5_DQ_0_2 DDR1_DQSN_6/DDR1_DQSN_6/DDR3_DQSN_2/DDR7_DQSN_0 M_3_DQSN2 [22]
DL50 DDR1_DQ_0_1/DDR0_DQ_2_1/DDR0_DQ_2_1/DDR1_DQ_0_1 DDR0_DQSP_3/DDR0_DQSP_5/DDR1_DQSP_1/DDR2_DQSP_1 BN61 BE47 A43
[21] M_0_DQ_2_0 M_1_DQSN1 [21] [22] M_2_DQ_2_1 DDR1_DQ_4_1/DDR1_DQ_2_1/DDR2_DQ_2_1/DDR5_DQ_0_1 DDR0_DQSP_7/DDR1_DQSP_5/DDR3_DQSP_1/DDR6_DQSP_1 M_3_DQSP1 [22]
CY50 DDR1_DQ_0_0/DDR0_DQ_2_0/DDR0_DQ_2_0/DDR1_DQ_0_0 DDR0_DQSN_3/DDR0_DQSN_5/DDR1_DQSN_1/DDR2_DQSN_1 BU61 BE50 A44
[21] M_0_DQ_3_7 M_1_DQSP0 [21] [22] M_2_DQ_2_0 DDR1_DQ_4_0/DDR1_DQ_2_0/DDR2_DQ_2_0/DDR5_DQ_0_0 DDR0_DQSN_7/DDR1_DQSN_5/DDR3_DQSN_1/DDR6_DQSN_1 M_3_DQSN1 [22]
CY47 DDR1_DQ_1_7/DDR0_DQ_3_7/DDR0_DQ_3_7/DDR1_DQ_1_7 DDR0_DQSP_2/DDR0_DQSP_4/DDR1_DQSP_0/DDR2_DQSP_0 BW61 AP50 A49
[21] M_0_DQ_3_6 M_1_DQSN0 [21] [22] M_2_DQ_3_7 DDR1_DQ_5_7/DDR1_DQ_3_7/DDR2_DQ_3_7/DDR5_DQ_1_7 DDR0_DQSP_6/DDR1_DQSP_4/DDR3_DQSP_0/DDR6_DQSP_0 M_3_DQSP0 [22]
DB48 DDR1_DQ_1_6/DDR0_DQ_3_6/DDR0_DQ_3_6/DDR1_DQ_1_6 DDR0_DQSN_2/DDR0_DQSN_4/DDR1_DQSN_0/DDR2_DQSN_0 DC51 AP47 A51
[21] M_0_DQ_3_5 M_0_DQSP3 [21] [22] M_2_DQ_3_6 DDR1_DQ_5_6/DDR1_DQ_3_6/DDR2_DQ_3_6/DDR5_DQ_1_6 DDR0_DQSN_6/DDR1_DQSN_4/DDR3_DQSN_0/DDR6_DQSN_0 M_3_DQSN0 [22]
DA53 DDR1_DQ_1_5/DDR0_DQ_3_5/DDR0_DQ_3_5/DDR1_DQ_1_5 DDR1_DQSP_1/DDR0_DQSP_3/DDR0_DQSP_3/DDR1_DQSP_1 DB51 AR48 AU51
[21] M_0_DQ_3_4 M_0_DQSN3 [21] [22] M_2_DQ_3_5 DDR1_DQ_5_5/DDR1_DQ_3_5/DDR2_DQ_3_5/DDR5_DQ_1_5 DDR1_DQSP_5/DDR1_DQSP_3/DDR2_DQSP_3/DDR5_DQSP_1 M_2_DQSP3 [22]
DE53 DDR1_DQ_1_4/DDR0_DQ_3_4/DDR0_DQ_3_4/DDR1_DQ_1_4 DDR1_DQSN_1/DDR0_DQSN_3/DDR0_DQSN_3/DDR1_DQSN_1 DK51 AP53 AR51
[21] M_0_DQ_3_3 M_0_DQSP2 [21] [22] M_2_DQ_3_4 DDR1_DQ_5_4/DDR1_DQ_3_4/DDR2_DQ_3_4/DDR5_DQ_1_4 DDR1_DQSN_5/DDR1_DQSN_3/DDR2_DQSN_3/DDR5_DQSN_1 M_2_DQSN3 [22]
DC48 DDR1_DQ_1_3/DDR0_DQ_3_3/DDR0_DQ_3_3/DDR1_DQ_1_3 DDR1_DQSP_0/DDR0_DQSP_2/DDR0_DQSP_2/DDR1_DQSP_0 DH51 AV53 BD51
[21] M_0_DQ_3_2 M_0_DQSN2 [21] [22] M_2_DQ_3_3 DDR1_DQ_5_3/DDR1_DQ_3_3/DDR2_DQ_3_3/DDR5_DQ_1_3 DDR1_DQSP_4/DDR1_DQSP_2/DDR2_DQSP_2/DDR5_DQSP_0 M_2_DQSP2 [22]
DE47 DDR1_DQ_1_2/DDR0_DQ_3_2/DDR0_DQ_3_2/DDR1_DQ_1_2 DDR1_DQSN_0/DDR0_DQSN_2/DDR0_DQSN_2/DDR1_DQSN_0 DB61 AU48 BB51
[21] M_0_DQ_3_1 M_0_DQSP1 [21] [22] M_2_DQ_3_2 DDR1_DQ_5_2/DDR1_DQ_3_2/DDR2_DQ_3_2/DDR5_DQ_1_2 DDR1_DQSN_4/DDR1_DQSN_2/DDR2_DQSN_2/DDR5_DQSN_0 M_2_DQSN2 [22]
DE50 DDR1_DQ_1_1/DDR0_DQ_3_1/DDR0_DQ_3_1/DDR1_DQ_1_1 DDR0_DQSP_1/DDR0_DQSP_1/DDR0_DQSP_1/DDR0_DQSP_1 DC61 AW47 AR61
[21] M_0_DQ_3_0 M_0_DQSN1 [21] [22] M_2_DQ_3_1 DDR1_DQ_5_1/DDR1_DQ_3_1/DDR2_DQ_3_1/DDR5_DQ_1_1 DDR0_DQSP_5/DDR1_DQSP_1/DDR2_DQSP_1/DDR4_DQSP_1 M_2_DQSP1 [22]
BU58 DDR1_DQ_1_0/DDR0_DQ_3_0/DDR0_DQ_3_0/DDR1_DQ_1_0 DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1 DH61 AV50 AU61
[21] M_1_DQ_0_7 M_0_DQSP0 [21] [22] M_2_DQ_3_0 DDR1_DQ_5_0/DDR1_DQ_3_0/DDR2_DQ_3_0/DDR5_DQ_1_0 DDR0_DQSN_5/DDR1_DQSN_1/DDR2_DQSN_1/DDR4_DQSN_1 M_2_DQSN1 [22]
BT57 DDR0_DQ_2_7/DDR0_DQ_4_7/DDR1_DQ_0_7/DDR2_DQ_0_7 DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0 DK61 C49 BB61
[21] M_1_DQ_0_6 M_0_DQSN0 [21] [22] M_3_DQ_0_7 DDR0_DQ_6_7/DDR1_DQ_4_7/DDR3_DQ_0_7/DDR6_DQ_0_7 DDR0_DQSP_4/DDR1_DQSP_0/DDR2_DQSP_0/DDR4_DQSP_0 M_2_DQSP0 [22]
BU56 DDR0_DQ_2_6/DDR0_DQ_4_6/DDR1_DQ_0_6/DDR2_DQ_0_6 DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0 E48 BD61
[21] M_1_DQ_0_5 [22] M_3_DQ_0_6 DDR0_DQ_6_6/DDR1_DQ_4_6/DDR3_DQ_0_6/DDR6_DQ_0_6 DDR0_DQSN_4/DDR1_DQSN_0/DDR2_DQSN_0/DDR4_DQSN_0 M_2_DQSN0 [22]
BT60 DDR0_DQ_2_5/DDR0_DQ_4_5/DDR1_DQ_0_5/DDR2_DQ_0_5 DDR4 / LP4x / LP5_ascend / LP5_descend / DDR5 CM60 F49
[21] M_1_DQ_0_4 DDR0_DQ_2_4/DDR0_DQ_4_4/DDR1_DQ_0_4/DDR2_DQ_0_4 DDR0_MA_5/DDR0_CA_5/DDR0_CA_6/DDR0_CA_0/NC [22] M_3_DQ_0_5 DDR0_DQ_6_5/DDR1_DQ_4_5/DDR3_DQ_0_5/DDR6_DQ_0_5 DDR4 / LP4x / LP5_ascend / LP5_descend / DDR5
BY60 CL55 B48 AE60
[21] M_1_DQ_0_3 DDR0_DQ_2_3/DDR0_DQ_4_3/DDR1_DQ_0_3/DDR2_DQ_0_3 DDR0_MA_7/DDR0_CA_4/DDR0_CA_5/DDR0_CA_1/NC [22] M_3_DQ_0_4 DDR0_DQ_6_4/DDR1_DQ_4_4/DDR3_DQ_0_4/DDR6_DQ_0_4 DDR1_MA_5/DDR4_CA_5/DDR4_CA_6/DDR4_CA_0/NC
BW56 CM57 B52 AE55
[21] M_1_DQ_0_2 DDR0_DQ_2_2/DDR0_DQ_4_2/DDR1_DQ_0_2/DDR2_DQ_0_2 DDR0_MA_6/DDR0_CA_3/DDR0_CA_4/DDR0_CS_1/NC [22] M_3_DQ_0_3 DDR0_DQ_6_3/DDR1_DQ_4_3/DDR3_DQ_0_3/DDR6_DQ_0_3 DDR1_MA_7/DDR4_CA_4/DDR4_CA_5/DDR4_CA_1/NC
BY57 CP60 F51 AF57
[21] M_1_DQ_0_1 DDR0_DQ_2_1/DDR0_DQ_4_1/DDR1_DQ_0_1/DDR2_DQ_0_1 DDR0_MA_8/DDR0_CA_2/DDR0_CA_3/DDR0_CS_0/DDR0_CA_9 M_0_A9 [21] [22] M_3_DQ_0_2 DDR0_DQ_6_2/DDR1_DQ_4_2/DDR3_DQ_0_2/DDR6_DQ_0_2 DDR1_MA_6/DDR4_CA_3/DDR4_CA_4/DDR4_CS_1/NC
BW58 CU58 E52 AH60 M_2_A9 [22]
[21] M_1_DQ_0_0 DDR0_DQ_2_0/DDR0_DQ_4_0/DDR1_DQ_0_0/DDR2_DQ_0_0 NC/DDR0_CA_1/DDR0_CA_1/DDR0_CA_5/DDR0_CA_0 M_0_A0 [21] [22] M_3_DQ_0_1 DDR0_DQ_6_1/DDR1_DQ_4_1/DDR3_DQ_0_1/DDR6_DQ_0_1 DDR1_MA_8/DDR4_CA_2/DDR4_CA_3/DDR4_CS_0/DDR2_CA_9
BL58 CU56 C51 AL56
[21] M_1_DQ_1_7 M_0_A1 [21] [22] M_3_DQ_0_0 DDR0_DQ_6_0/DDR1_DQ_4_0/DDR3_DQ_0_0/DDR6_DQ_0_0 NC/DDR4_CA_1/DDR4_CA_1/DDR4_CA_5/DDR2_CA_1 M_2_A1 [22]
BK57 DDR0_DQ_3_7/DDR0_DQ_5_7/DDR1_DQ_1_7/DDR2_DQ_1_7 NC/DDR0_CA_0/DDR0_CA_0/DDR0_CA_6/DDR0_CA_1 CM47 E41 AL58
[21] M_1_DQ_1_6 M_0_A10 [21] [22] M_3_DQ_1_7 DDR0_DQ_7_7/DDR1_DQ_5_7/DDR3_DQ_1_7/DDR6_DQ_1_7 NC/DDR4_CA_0/DDR4_CA_0/DDR4_CA_6/DDR2_CA_0 M_2_A0 [22]
BL56 DDR0_DQ_3_6/DDR0_DQ_5_6/DDR1_DQ_1_6/DDR2_DQ_1_6 DDR0_BA_1/DDR1_CA_5/DDR1_CA_6/DDR1_CA_0/DDR0_CA_10 CM53 C42 AE47
[21] M_1_DQ_1_5 M_0_A8 [21] [22] M_3_DQ_1_6 DDR0_DQ_7_6/DDR1_DQ_5_6/DDR3_DQ_1_6/DDR6_DQ_1_6 DDR1_BA_1/DDR5_CA_5/DDR5_CA_6/DDR5_CA_0/DDR2_CA_10 M_2_A10 [22]
BK60 DDR0_DQ_3_5/DDR0_DQ_5_5/DDR1_DQ_1_5/DDR2_DQ_1_5 DDR0_MA_16/DDR1_CA_4/DDR1_CA_5/DDR1_CA_1/DDR0_CA_8 CT46 F43 AE53
C
[21] M_1_DQ_1_4 M_0_A7 [21] [22] M_3_DQ_1_5 DDR0_DQ_7_5/DDR1_DQ_5_5/DDR3_DQ_1_5/DDR6_DQ_1_5 DDR1_MA_16/DDR5_CA_4/DDR5_CA_5/DDR5_CA_1/DDR2_CA_8 M_2_A8 [22] C
BP60 DDR0_DQ_3_4/DDR0_DQ_5_4/DDR1_DQ_1_4/DDR2_DQ_1_4 DDR0_MA_15/DDR1_CA_3/DDR1_CA_4/DDR1_CS_1/DDR0_CA_7 CP53 B41 AK46
[21] M_1_DQ_1_3 M_0_A11 [21] [22] M_3_DQ_1_4 DDR0_DQ_7_4/DDR1_DQ_5_4/DDR3_DQ_1_4/DDR6_DQ_1_4 DDR1_MA_15/DDR5_CA_3/DDR5_CA_4/DDR5_CS_1/DDR2_CA_7 M_2_A7 [22]
BN56 DDR0_DQ_3_3/DDR0_DQ_5_3/DDR1_DQ_1_3/DDR2_DQ_1_3 DDR0_MA_14/DDR1_CA_2/DDR1_CA_3/DDR1_CS_0/DDR0_CA_11 CW47 B46 AH53
A_1 [21] M_1_DQ_1_2 DDR0_DQ_3_2/DDR0_DQ_5_2/DDR1_DQ_1_2/DDR2_DQ_1_2 DDR0_CS_1/DDR1_CA_1/DDR1_CA_1/DDR1_CA_5/DDR0_CA_2 M_0_A2 [21] [22] M_3_DQ_1_3
F44 DDR0_DQ_7_3/DDR1_DQ_5_3/DDR3_DQ_1_3/DDR6_DQ_1_3 DDR1_MA_14/DDR5_CA_2/DDR5_CA_3/DDR5_CS_0/DDR2_CA_11 AM47
M_2_A11 [22]
BP57 CV53 [22] M_3_DQ_1_2 M_2_A2 [22]
[21] M_1_DQ_1_1 DDR0_DQ_3_1/DDR0_DQ_5_1/DDR1_DQ_1_1/DDR2_DQ_1_1 DDR0_ODT_1/DDR1_CA_0/DDR1_CA_0/DDR1_CA_6/DDR0_CA_3 M_0_A3 [21] E46 DDR0_DQ_7_2/DDR1_DQ_5_2/DDR3_DQ_1_2/DDR6_DQ_1_2 DDR1_CS_1/DDR5_CA_1/DDR5_CA_1/DDR5_CA_5/DDR2_CA_2 AM53
BN58 CC60 M_2_A3 [22]
[21] M_1_DQ_1_0
BT50 DDR0_DQ_3_0/DDR0_DQ_5_0/DDR1_DQ_1_0/DDR2_DQ_1_0 DDR0_CKE_0/DDR2_CA_5/DDR2_CA_6/DDR2_CA_0/NC CB55 B_1 [22] M_3_DQ_1_1
C45 DDR0_DQ_7_1/DDR1_DQ_5_1/DDR3_DQ_1_1/DDR6_DQ_1_1 DDR1_ODT_1/DDR5_CA_0/DDR5_CA_0/DDR5_CA_6/DDR2_CA_3 T55
[21] M_1_DQ_2_7 DDR1_DQ_2_7/DDR0_DQ_6_7/DDR1_DQ_2_7/DDR3_DQ_0_7 DDR0_CKE_1/DDR2_CA_4/DDR2_CA_5/DDR2_CA_1/NC [22] M_3_DQ_1_0 DDR0_DQ_7_0/DDR1_DQ_5_0/DDR3_DQ_1_0/DDR6_DQ_1_0 DDR1_CKE_0/DDR6_CA_5/DDR6_CA_6/DDR6_CA_0/NC
BT47 CC57 L58 T60
[21] M_1_DQ_2_6 DDR1_DQ_2_6/DDR0_DQ_6_6/DDR1_DQ_2_6/DDR3_DQ_0_6 DDR0_BG_0/DDR2_CA_3/DDR2_CA_4/DDR2_CS_1/NC [22] M_3_DQ_2_7 DDR1_DQ_6_7/DDR1_DQ_6_7/DDR3_DQ_2_7/DDR7_DQ_0_7 DDR1_CKE_1/DDR6_CA_4/DDR6_CA_5/DDR6_CA_1/NC
BU48 CE60 K57 W60
[21] M_1_DQ_2_5 M_1_A4 [21] [22] M_3_DQ_2_6 DDR1_DQ_6_6/DDR1_DQ_6_6/DDR3_DQ_2_6/DDR7_DQ_0_6 DDR1_BG_0/DDR6_CA_3/DDR6_CA_4/DDR6_CS_1/DDR3_CA_4 M_3_A4 [22]
BT53 DDR1_DQ_2_5/DDR0_DQ_6_5/DDR1_DQ_2_5/DDR3_DQ_0_5 DDR0_BG_1/DDR2_CA_2/DDR2_CA_3/DDR2_CS_0/DDR1_CA_4 CH56 L56 U57
[21] M_1_DQ_2_4 DDR1_DQ_2_4/DDR0_DQ_6_4/DDR1_DQ_2_4/DDR3_DQ_0_4 DDR0_MA_12/DDR2_CA_1/DDR2_CA_1/DDR2_CA_5/DDR1_CA_12 M_1_A12 [21] [22] M_3_DQ_2_5 DDR1_DQ_6_5/DDR1_DQ_6_5/DDR3_DQ_2_5/DDR7_DQ_0_5 DDR1_BG_1/DDR6_CA_2/DDR6_CA_3/DDR6_CS_0/NC
BY53 CH58 K60 AB58
[21] M_1_DQ_2_3 M_1_A7 [21] [22] M_3_DQ_2_4 DDR1_DQ_6_4/DDR1_DQ_6_4/DDR3_DQ_2_4/DDR7_DQ_0_4 DDR1_MA_12/DDR6_CA_1/DDR6_CA_1/DDR6_CA_5/DDR3_CA_7 M_3_A7 [22]
BW48 DDR1_DQ_2_3/DDR0_DQ_6_3/DDR1_DQ_2_3/DDR3_DQ_0_3 DDR0_MA_9/DDR2_CA_0/DDR2_CA_0/DDR2_CA_6/DDR1_CA_7 CC53 P60 AC60
[21] M_1_DQ_2_2 M_1_CS1 [21] [22] M_3_DQ_2_3 DDR1_DQ_6_3/DDR1_DQ_6_3/DDR3_DQ_2_3/DDR7_DQ_0_3 DDR1_MA_9/DDR6_CA_0/DDR6_CA_0/DDR6_CA_6/DDR3_CA_11 M_3_A11 [22]
CA47 DDR1_DQ_2_2/DDR0_DQ_6_2/DDR1_DQ_2_2/DDR3_DQ_0_2 NC/DDR3_CA_5/DDR3_CA_6/DDR3_CA_0/DDR1_CS_1 CC47 N56 T53
[21] M_1_DQ_2_1 M_1_CS0 [21] [22] M_3_DQ_2_2 DDR1_DQ_6_2/DDR1_DQ_6_2/DDR3_DQ_2_2/DDR7_DQ_0_2 NC/DDR7_CA_5/DDR7_CA_6/DDR7_CA_0/DDR3_CS_1 M_3_CS1 [22]
BY50 DDR1_DQ_2_1/DDR0_DQ_6_1/DDR1_DQ_2_1/DDR3_DQ_0_1 NC/DDR3_CA_4/DDR3_CA_5/DDR3_CA_1/DDR1_CS_0 CE53 P57 T47
[21] M_1_DQ_2_0 M_1_A0 [21] [22] M_3_DQ_2_1 DDR1_DQ_6_1/DDR1_DQ_6_1/DDR3_DQ_2_1/DDR7_DQ_0_1 NC/DDR7_CA_4/DDR7_CA_5/DDR7_CA_1/DDR3_CS_0 M_3_CS0 [22]
BJ50 DDR1_DQ_2_0/DDR0_DQ_6_0/DDR1_DQ_2_0/DDR3_DQ_0_0 NC/DDR3_CA_3/DDR3_CA_4/DDR3_CS_1/DDR1_CA_0 CH46 N58 W53
[21] M_1_DQ_3_7 M_1_A6 [21] [22] M_3_DQ_2_0 DDR1_DQ_6_0/DDR1_DQ_6_0/DDR3_DQ_2_0/DDR7_DQ_0_0 NC/DDR7_CA_3/DDR7_CA_4/DDR7_CS_1/DDR3_CA_0 M_3_A0 [22]
BJ47 DDR1_DQ_3_7/DDR0_DQ_7_7/DDR1_DQ_3_7/DDR3_DQ_1_7 NC/DDR3_CA_2/DDR3_CA_3/DDR3_CS_0/DDR1_CA_6 CK47 K50 AA46
[21] M_1_DQ_3_6 M_1_A8 [21] [22] M_3_DQ_3_7 DDR1_DQ_7_7/DDR1_DQ_7_7/DDR3_DQ_3_7/DDR7_DQ_1_7 NC/DDR7_CA_2/DDR7_CA_3/DDR7_CS_0/DDR3_CA_6 M_3_A6 [22]
BL48 DDR1_DQ_3_6/DDR0_DQ_7_6/DDR1_DQ_3_6/DDR3_DQ_1_6 DDR0_MA_10/DDR3_CA_1/DDR3_CA_1/DDR3_CA_5/DDR1_CA_8 CJ53 F58 AC47
[21] M_1_DQ_3_5 M_1_A10 [21] [22] M_3_DQ_3_6 DDR1_DQ_7_6/DDR1_DQ_7_6/DDR3_DQ_3_6/DDR7_DQ_1_6 DDR1_MA_10/DDR7_CA_1/DDR7_CA_1/DDR7_CA_5/DDR3_CA_8 M_3_A8 [22]
BK53 DDR1_DQ_3_5/DDR0_DQ_7_5/DDR1_DQ_3_5/DDR3_DQ_1_5 DDR0_BA_0/DDR3_CA_0/DDR3_CA_0/DDR3_CA_6/DDR1_CA_10 F54 AC53
[21] M_1_DQ_3_4 [22] M_3_DQ_3_5 DDR1_DQ_7_5/DDR1_DQ_7_5/DDR3_DQ_3_5/DDR7_DQ_1_5 DDR1_BA_0/DDR7_CA_0/DDR7_CA_0/DDR7_CA_6/DDR3_CA_10 M_3_A10 [22]
BP53 DDR1_DQ_3_4/DDR0_DQ_7_4/DDR1_DQ_3_4/DDR3_DQ_1_4 CV60 L48
[21] M_1_DQ_3_3 DDR1_DQ_3_3/DDR0_DQ_7_3/DDR1_DQ_3_3/DDR3_DQ_1_3 DDR0_MA_3/DDR0_CS_1/DDR0_CS_0/DDR0_CA_3/DDR0_CS_1 M_0_CS1 [21] [22] M_3_DQ_3_4 DDR1_DQ_7_4/DDR1_DQ_7_4/DDR3_DQ_3_4/DDR7_DQ_1_4
BN48 CR56 H56 AM57
[21] M_1_DQ_3_2 M_0_A12 [21] [22] M_3_DQ_3_3 DDR1_DQ_7_3/DDR1_DQ_7_3/DDR3_DQ_3_3/DDR7_DQ_1_3 DDR1_MA_3/DDR4_CS_1/DDR4_CS_0/DDR4_CA_3/DDR2_CS_1 M_2_CS1 [22]
BP47 DDR1_DQ_3_2/DDR0_DQ_7_2/DDR1_DQ_3_2/DDR3_DQ_1_2 DDR0_MA_4/DDR0_CS_0/DDR0_CA_2/DDR0_CA_2/DDR0_CA_12 CU48 K53 AJ56
[21] M_1_DQ_3_1 M_0_A5 [21] [22] M_3_DQ_3_2 DDR1_DQ_7_2/DDR1_DQ_7_2/DDR3_DQ_3_2/DDR7_DQ_1_2 DDR1_MA_4/DDR4_CS_0/DDR4_CA_2/DDR4_CA_2/DDR2_CA_12 M_2_A12 [22]
BP50 DDR1_DQ_3_1/DDR0_DQ_7_1/DDR1_DQ_3_1/DDR3_DQ_1_1 DDR0_MA_13/DDR1_CS_1/DDR1_CS_0/DDR1_CA_3/DDR0_CA_5 CM50 P50 AK48
[21] M_1_DQ_3_0 M_0_A6 [21] [22] M_3_DQ_3_1 DDR1_DQ_7_1/DDR1_DQ_7_1/DDR3_DQ_3_1/DDR7_DQ_1_1 DDR1_MA_13/DDR5_CS_1/DDR5_CS_0/DDR5_CA_3/DDR2_CA_5 M_2_A5 [22]
DDR1_DQ_3_0/DDR0_DQ_7_0/DDR1_DQ_3_0/DDR3_DQ_1_0 DDR0_ODT_0/DDR1_CS_0/DDR1_CA_2/DDR1_CA_2/DDR0_CA_6 CJ57 P53 AE50
M_1_A9 [21] [22] M_3_DQ_3_0 DDR1_DQ_7_0/DDR1_DQ_7_0/DDR3_DQ_3_0/DDR7_DQ_1_0 DDR1_ODT_0/DDR5_CS_0/DDR5_CA_2/DDR5_CA_2/DDR2_CA_6 M_2_A6 [22]
DDR0_ACT_N/DDR2_CS_1/DDR2_CS_0/DDR2_CA_3/DDR1_CA_9 CF56 AC57
M_1_A2 [21] DDR1_ACT_N/DDR6_CS_1/DDR6_CS_0/DDR6_CA_3/DDR3_CA_9 M_3_A9 [22]
NC/DDR2_CS_0/DDR2_CA_2/DDR2_CA_2/DDR1_CA_2 CH48 Y56
M_1_A3 [21] NC/DDR6_CS_0/DDR6_CA_2/DDR6_CA_2/DDR3_CA_2 M_3_A2 [22]
DDR0_PAR/DDR3_CS_1/DDR3_CS_0/DDR3_CA_3/DDR1_CA_3 CC50 AA48
M_1_A1 [21] DDR1_PAR/DDR7_CS_1/DDR7_CS_0/DDR7_CA_3/DDR3_CA_3 M_3_A3 [22]
DDR0_MA_2/DDR3_CS_0/DDR3_CA_2/DDR3_CA_2/DDR1_CA_1 T50
DDR1_MA_2/DDR7_CS_0/DDR7_CA_2/DDR7_CA_2/DDR3_CA_1 M_3_A1 [22]
CV50 M_0_A4 [21]
DDR0_CS_0/NC/DDR1_CS_1/DDR1_CA_4/DDR0_CA_4 CJ50 AM50
M_1_A5 [21] DDR1_CS_0/NC/DDR5_CS_1/DDR5_CA_4/DDR2_CA_4 M_2_A4 [22]
DDR0_MA_0/NC/DDR3_CS_1/DDR3_CA_4/DDR1_CA_5 CV57 AC50
M_0_CS0 [21] DDR1_MA_0/NC/DDR7_CS_1/DDR7_CA_4/DDR3_CA_5 M_3_A5 [22]
DDR0_MA_1/NC/DDR0_CS_1/DDR0_CA_4/DDR0_CS_0 CJ60 AM60
M_1_A11 [21] DDR1_MA_1/NC/DDR4_CS_1/DDR4_CA_4/DDR2_CS_0 M_2_CS0 [22]
DDR0_MA_11/NC/DDR2_CS_1/DDR2_CA_4/DDR1_CA_11 AB56
DDR1_MA_11/NC/DDR6_CS_1/DDR6_CA_4/DDR3_CA_12 M_3_A12 [22]
BF61 DDR0_ALERT_N [21]
DDR4 / DDR5 DDR0_ALERT_N BG60 BG57
TP97 DDR4 / DDR5 DDR1_ALERT_N DDR1_ALERT_N [22]
DDR4 DDR0_VREF_CA0 BG55
DDR4 DDR1_VREF_CA0 TP99
BG50 3 OF 22
DDR4 DDR_VTT_CTL TP100
EE53 DRAM_RESET#
DRAM_RESET#
CPU_ADL_P_1744P
A56 DDR_RCOMP0 R842 100_1%_2
B DDR_COMP_1 B56 B
DDR_COMP_2 Place close to Chipset
2 OF 22

CPU_ADL_P_1744P

VDD2 = 1.1V
+VDD2_1.1V_1.2V_SUS

R843
470_1%_2

DRAM_RESET# R844 *Short_0201 DDR_DRAMRST# [21,22]

C774
*0.1u/6.3V_2

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom ADL-P 2/14 (DDR5 I/F) A1A

Date: Thursday, May 26, 2022 Sheet 3 of 150


5 4 3 2 1
5 4 3 2 1

4
U053V

H_CATERR# AF15 R6 XDP_TRST#


DG3 CATERR# PROC_JTAG_TRST# U8 XDP_TMS_CPU TP018
[86] EC_PECI PECI PROC_JTAG_TMS TP020
H_PROCHOT# R194 499_1%_2 PROCHOT#_CPU AK32 AA6 XDP_TDO_CPU
[13,73,86,112,141] H_PROCHOT# PM_THRMTRIP# AH32 PROCHOT# PROC_JTAG_TDO W8 XDP_TDI_CPU TP021
D THERMTRIP# PROC_JTAG_TDI N6 XDP_TCK TP090 D
PROC_JTAG_TCK TP014
R751 49.9_1%_2 CPU_POPI_RCOMP DV60
R741 49.9_1%_2 PCH_OPI_RCOMP DG1 PROC_POPIRCOMP N8 PCH_JTAGX R153 *Short_0201 XDP_TCK
DV11 DMI_RCOMP PCH_JTAGX U6 PCH_TMS R181 *Short_0201 XDP_TMS_CPU Intel DCI
TP163 TP_3 PCH_JTAG_TMS PCH_TDO XDP_TDO_CPU
DV10 AA8 R200 *Short_0201
TP164 TP_2 PCH_JTAG_TDO W6 PCH_TDI XDP_TDI_CPU
R183 *Short_0201
ET14 PCH_JTAG_TDI FB6 PCH_TCK
[14] DBG_PMODE DBG_PMODE Strap pin PCH_JTAG_TCK TP094
R8 PCH_TRST# R177 *Short_0201 XDP_TRST#
EB56 PCH_PROC_TRST#
WLAN_WAKE# [15] BOARD_ID9 GPP_B4/PROC_GP3/ISH_GP5B CPU_PREQ#
EB57 L6
[61] WLAN_WAKE# CCD_PWR_EN FB23 GPP_B3/PROC_GP2/ISH_GP4B PROC_PREQ# L8 CPU_PRDY# TP015
[45] CCD_PWR_EN GPP_E7/PROC_GP1 PROC_PRDY# TP016
TPD_INT#_PCH EY23
CCD-RTD3 [88] TPD_INT#_PCH GPP_E3/PROC_GP0 AF25
PCH_WLAN_RST# EAR# CPU_EAR [8]
WLAN-RTD3 ET46
[14,61] PCH_WLAN_RST# EL48 GPP_H2 Strap pin 3.3V EN28 TOUCH_PWR_EN
CCD-MIPI
[14] MIPICCD_LED EK48 GPP_H1 Strap pin Strap pin GPP_F7 ET28
TOUCH_PWR_EN [45]
Reset_M.2SSD1# [53]
Touch Screen-RTD3
[14] MIPICCD_SHUTDOWN GPP_H0 Strap pin GPP_F9/BOOTMPC EF28
Ligh Sensor (D5/D7) [91] AML_INT#
AML_INT# DY61
Strap pin GPP_F10 Reset_M.2SSD2# [55] SSD-For debug purpopsal
DW 56 GPP_B15/TIME_SYNC0/ISH_GP7
[14,64,86] ACZ_SPKR GPP_B14/SPKR/TIME_SYNC1/SATA_LED#/ISH_GP6 Strap pin
22 OF 22

CPU_ADL_P_1744P

C C

THERMAL TRIP MIPI 60 PU


+VCC1P05_PROC
+3V_DEEP_SUS

VCC_CFG_PU_OUT TPD_INT#_PCH
3

R942 2.2K_1%_2
2 Q30
[86,141] IMVP_PWRGD CPU_PRDY# R154 *100_1%_2 AML_INT# R310 *2.2K_1%_2
DMG301NU-7
WLAN_WAKE# R111 200K_1%_2
1

R888 *100K_1%_2 +VCC1P05_PROC

CPU_PREQ# R151 *51_1%_2


R889 R193
B 1K_1%_2 1K_1%_2 +VCC1P05_PROC B

Q31 H_CATERR# R152 1K_1%_2


METR3904-G
2

H_PROCHOT# R188 1K_1%_2

3 1 PM_THRMTRIP#
[86,113,123] SYS_SHDN#

[93] PM_THRMTRIP#

Debug Purposal DCI +VCC1P05_PROC PD


CCD_PWR_EN R952 100K_1%_2
XDP_TDO_CPU R197 51_1%_2
TOUCH_PWR_EN R318 100K_1%_2
PCH_TMS R180 *51_1%_2

PCH_TDO R201 *100_1%_2


A H_CATERR# A
TP160 PCH_TDI R187 *51_1%_2

PROCHOT#_CPU XDP_TDI_CPU R076 *51_1%_2


TP161

PM_THRMTRIP#
XDP_TCK R150 51_1%_2
Quanta Computer Inc.
TP162 PCH_TCK R780 *51_1%_2

PCH_TRST#
PROJECT : ZGN
R176 *51_1%_2
Size Document Number Rev
Custom ADL-P 3/14 (CPU MISC/JTA) A1A

Date: Thursday, May 26, 2022 Sheet 4 of 150


5 4 3 2 1
5 4 3 2 1

5
+VCC_CORE

+VCCIN: 70A +VDD2_1.1V_1.2V_SUS +VCC_GT


C788 *330U_2.5V_3528H2.1_max

+
+VCC_CORE U053O
U053M
C291 1u/10V_2 AD61 CP44
BA44 CF8 AG61 VDD2_1 VCCGT_1 CR45
BB43 VCCCORE_1 VCCCORE_51 CF9 C372 1u/10V_2 AN61 VDD2_2 VCCGT_2 CT44
BB45 VCCCORE_2 VCCCORE_52 CG14 AP41 VDD2_3 VCCGT_3 CU43
BC44 VCCCORE_3 VCCCORE_53 CG4 C371 1u/10V_2 AP44 VDD2_4 VCCGT_4 CU45
BD43 VCCCORE_4 VCCCORE_54 CH1 C314 10u/6.3V_4 C376 10u/6.3V_4 C325 47u/6.3V_6 AR43 VDD2_5 VCCGT_5 CV4
D BD45 VCCCORE_5 VCCCORE_55 CH3 C366 1u/10V_2 AR45 VDD2_6 VCCGT_6 CV44 D
BE44 VCCCORE_6 VCCCORE_56 CK11 C352 10u/6.3V_4 C375 10u/6.3V_4 C380 47u/6.3V_6 AT44 VDD2_7 VCCGT_7 CW 1
BH43 VCCCORE_7 VCCCORE_57 CK12 C358 1u/10V_2 AU43 VDD2_8 VCCGT_8 CW 11
BK43 VCCCORE_8 VCCCORE_58 CK4 C364 10u/6.3V_4 C367 10u/6.3V_4 C310 47u/6.3V_6 AU45 VDD2_9 VCCGT_9 CW 12
BK44 VCCCORE_9 VCCCORE_59 CK6 C357 1u/10V_2 AV44 VDD2_10 VCCGT_10 CW 3
BL45 VCCCORE_10 VCCCORE_60 CK8 C365 10u/6.3V_4 C327 10u/6.3V_4 C329 47u/6.3V_6 AY61 VDD2_11 VCCGT_11 CW 6
BM44 VCCCORE_11 VCCCORE_61 CK9 C373 1u/10V_2 BH61 VDD2_12 VCCGT_12 CW 8
BN11 VCCCORE_12 VCCCORE_62 CL1 C360 10u/6.3V_4 C342 10u/6.3V_4 C341 47u/6.3V_6 BR61 VDD2_13 VCCGT_13 CW 9
BN12 VCCCORE_13 VCCCORE_63 CL14 C282 1u/10V_2 CA61 VDD2_14 VCCGT_14 CY14
BN45 VCCCORE_14 VCCCORE_64 CL3 C361 10u/6.3V_4 C354 10u/6.3V_4 C339 47u/6.3V_6 CC44 VDD2_15 VCCGT_15 CY4
BP14 VCCCORE_15 VCCCORE_65 CM11 C293 1u/10V_2 CD43 VDD2_16 VCCGT_16 CY44
BR11 VCCCORE_16 VCCCORE_66 CM12 C307 10u/6.3V_4 C319 10u/6.3V_4 C304 47u/6.3V_6 CD61 VDD2_17 VCCGT_17 DA1
BR12 VCCCORE_17 VCCCORE_67 CM4 C300 1u/10V_2 CE44 VDD2_18 VCCGT_18 DA3
BT14 VCCCORE_18 VCCCORE_68 CM6 C347 10u/6.3V_4 C330 10u/6.3V_4 C323 47u/6.3V_6 CF43 VDD2_19 VCCGT_19 DA43
BT44 VCCCORE_19 VCCCORE_69 CM8 C316 1u/10V_2 CF45 VDD2_20 VCCGT_20 DB45
BU11 VCCCORE_20 VCCCORE_70 CM9 C377 *10u/6.3V_4 C344 *47u/6.3V_6 CG44 VDD2_21 VCCGT_21 DC1
BU12 VCCCORE_21 VCCCORE_71 CN1 C334 10u/6.3V_4 CH45 VDD2_22 VCCGT_22 DC11
BU43 VCCCORE_22 VCCCORE_72 CN14 C353 *10u/6.3V_4 CK61 VDD2_23 VCCGT_23 DC12
BU45 VCCCORE_23 VCCCORE_73 CN3 C351 10u/6.3V_4 CN61 VDD2_24 VCCGT_24 DC3
BV14 VCCCORE_24 VCCCORE_74 CP1 C322 *10u/6.3V_4 CW 61 VDD2_25 VCCGT_25 DC4
BV44 VCCCORE_25 VCCCORE_75 CP11 C302 10u/6.3V_4 DF61 VDD2_26 VCCGT_26 DC44
BW 12 VCCCORE_26 VCCCORE_76 CP12 C336 *10u/6.3V_4 J61 VDD2_27 VCCGT_27 DC6
BW 43 VCCCORE_27 VCCCORE_77 CP3 C338 1u/10V_2 C317 10u/6.3V_4 R61 VDD2_28 VCCGT_28 DC8
BW 45 VCCCORE_28 VCCCORE_78 CP4 C320 *10u/6.3V_4 V61 VDD2_29 VCCGT_29 DC9
BY1 VCCCORE_29 VCCCORE_79 CP6 C337 1u/10V_2 C311 10u/6.3V_4 VDD2_30 VCCGT_30 DD1
BY44 VCCCORE_30 VCCCORE_80 CP8 C363 *10u/6.3V_4 AR14 VCCGT_31 DD14
VCCCORE_31 VCCCORE_81 +VCC1.05_OUT VCC1P05_PROC_OUT_1 VCCGT_32
CA1 CP9 C333 1u/10V_2 AT12 DD3
CA3 VCCCORE_32 VCCCORE_82 CR4 C312 *10u/6.3V_4 VCC1P05_PROC_OUT_2 VCCGT_33 DD43
CB12 VCCCORE_33 VCCCORE_83 C328 1u/10V_2 From AU14 TP043
CM44 VCCGT_34 DD45
CC14 VCCCORE_34 CT3 C332 *10u/6.3V_4 EA14 RSVD_TP_33 VCCGT_35 DE11
VCCCORE_35 VCC_SENSE VCORE_SENSE [141] TP058 RSVD_TP_49 VCCGT_36
C CC3 CT1 C345 1u/10V_2 DE12 C
CD11 VCCCORE_36 VSS_SENSE VCORESS_SENSE [141] E61 VCCGT_37 DE4
C348 *10u/6.3V_4 +VCC1P8_PROC
CD12 VCCCORE_37 R9 CPU_SVID_DAT G61 VCC1P8_PROC_8 VCCGT_38 DE6
CD6 VCCCORE_38 VIDSOUT U9 CPU_SVID_CLK H59 VCC1P8_PROC_9 VCCGT_39 DE8
CD8 VCCCORE_39 VIDSCK W9 CPU_VIDALERT# AH44 VCC1P8_PROC_10 VCCGT_40 DE9
CD9 VCCCORE_40 VIDALERT# AJ45 VCC1P8_PROC_1 VCCGT_41 DF1
CE1 VCCCORE_41 AU14 AK44 VCC1P8_PROC_2 VCCGT_42 DF14
VCCCORE_42 VCC1P05_PROC_OUT_3 +VCC1.05_OUT VCC1P8_PROC_3 VCCGT_43
CE14 AL45 DF3
CE3 VCCCORE_43 DJ6 VCCSTPWRGOOD_SX R049 *Short_0201 AM41 VCC1P8_PROC_4 VCCGT_44 DG4
VCCCORE_44 VCCST_PW RGD_SX VCCST_PWRGD_TCSS [16] VCC1P8_PROC_5 VCCGT_45
CE4 AM44
CF1 VCCCORE_45 AN43 VCC1P8_PROC_6
CF11 VCCCORE_46 VCC1P8_PROC_7
CF12 VCCCORE_47 CV1
CF3 VCCCORE_48 [141] VCCGT_SENSE CV3 VCCGT_SENSE
VCCCORE_49 [141] VSSGT_SENSE VSSGT_SENSE
CF6
VCCCORE_50 15 OF 22
13 OF 22
CPU_ADL_P_1744P
CPU_ADL_P_1744P

+VCC_CORE +VDD2_1.1V_1.2V_SUS +VCC_GT

C798 *15p/25V_2 C794 *15p/25V_2


+VCC1P05_PROC
C799 *15p/25V_2 C795 *15p/25V_2
B B
C800 *15p/25V_2 C796 *3.3p/25V_2 C411 C418 C405 C391 C399 C386 C369
47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6 47u/6.3V_6
C801 *15p/25V_2 C797 *3.3p/25V_2

R189 R178 C802 *15p/25V_2


Ra 56.2_1%_2 100_1%_2
C803 *15p/25V_2 +VCC_GT

CPU_VIDALERT# R190 *Short_0201


H_CPU_SVIDALERT# [141]
CPU_SVID_CLK R207 *Short_0201
H_CPU_SVIDCLK [141]
CPU_SVID_DAT R179 *Short_0201
H_CPU_SVIDDAT [141]
C785 C786 C787 C381 C355 C359
*22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6
ALERT# needs to Place between CLK and DAT
Ra Neen check value
+VCC_GT

VCCCORE [PDG.0.81] VCCGT [PDG.0.81] VCC1P8_PROC [PDG.0.81] VDD2 [PDG.0.81] C783 C784
10u/6.3V_4 10u/6.3V_4
IA Core Graphic CPU PCIe DDR PHY
A A
Primary Side Secondary Side Primary Side Secondary Side Primary or Secondary Side Primary Side Secondary Side
330uF 7343 x 3 22uF 0402 x 6 330uF 7343 x 2 22uF 0402 x 6 1uF 0402 x1 1uF 0402 x 2 Placeholder 0402 x2
47uF 0603 x 8 47uF 0603 x 7 10uF 0402 x 2 10uF 0402 x 1 10uF 0402 x 3 Quanta Computer Inc.
22uF 0402 x 2 22uF 0402 x 2 Placeholder 0402 x1 1uF 0402 x 4 PROJECT : ZGN
LDO side
Placeholder 0603 x 1 Placeholder 0402/0603 x1 10uF 0402 x 2 Size Document Number Rev
Custom ADL-P 4/14 (VCCIN/VDDQ) A1A
Placeholder 0603 x2 Date: Thursday, May 26, 2022 Sheet 5 of 150
5 4 3 2 1
5 4 3 2 1

6
U053F

UART0_TXD EN48 EY28


BIOS UART Log TP151 UART0_RXD EN46 GPP_H11/UART0_TXD/M2_SKT2_CFG1 GPP_D14/ISH_UART0_TXD/I2C4B_SCL EV28 MIPICCD_EN [150]
TP152 RTC_DET# GPP_H10/UART0_RXD/M2_SKT2_CFG0 GPP_D13/ISH_UART0_RXD/I2C4B_SDA NFC_SCL
P-sensor EL41 EY36 NFC
[11] RTC_DET# 5GorAP_P_INT# EK41 GPP_H13/I2C7_SCL/UART0_CTS#/M2_SKT2_CFG3/ISH_GP7B/DEVSLP1B GPP_D16/ISH_UART0_CTS#/I2C7B_SCL EW 36 NFC_SDA NFC_SCL [150]
D [150] 5GorAP_P_INT# GPP_H12/I2C7_SDA/UART0_RTS#/M2_SKT2_CFG2/ISH_GP6B/DEVSLP0B GPP_D15/ISH_UART0_RTS#/I2C7B_SDA NFC_SDA [150] D

Privacy Panel EW 30 3.3V FA34 G-sensor_INT#_MB


[150] Privacy_EN EV34 GPP_D18/UART1_TXD/ISH_UART1_TXD GPP_D3/ISH_GP3/BK3/SBK3 EY30 G-sensor_INT#_DB G-sensor_INT#_MB [91]
USB KB Reset [87] USBKB_reset GPP_D17/UART1_RXD/ISH_UART1_RXD GPP_D2/ISH_GP2/BK2/SBK2 EY31 SENSOR_MODE2_PCH G-sensor_INT#_DB [91]
TP_I2C_SCL EH46 GPP_D1/ISH_GP1/BK1/SBK1 EV31 SENSOR_MODE1_PCH SENSOR_MODE2_PCH [91] G-Sensor (D5/D7)
[88] TP_I2C_SCL TP_I2C_SDA GPP_H5/I2C0_SCL GPP_D0/ISH_GP0/BK0/SBK0 SENSOR_MODE1_PCH [91]
Touch PAD EF46
[88] TP_I2C_SDA GPP_H4/I2C0_SDA 3.3V DR61 GPP_RCOMP R747 200_1%_2
EH43 GPPC_RCOMP
[45,97] TSN_I2C_SCL EF43 GPP_H7/I2C1_SCL
Touch Screen [45,97] TSN_I2C_SDA GPP_H6/I2C1_SDA
ISH_I2C0_SCL DT57
Sensor (D5/D7) [91] ISH_I2C0_SCL
ISH_I2C0_SDA DT56 GPP_B6/ISH_I2C0_SCL/I2C2_SCL
[91] ISH_I2C0_SDA GPP_B5/ISH_I2C0_SDA/I2C2_SDA

[91] TOF_ISH_I2C1_SCL
TOF_ISH_I2C1_SCL DR56 IISS
TOF_ISH_I2C1_SDA DR58 GPP_B8/ISH_I2C1_SCL/I2C3_SCL
TOF [91] TOF_ISH_I2C1_SDA GPP_B7/ISH_I2C1_SDA/I2C3_SDA
CNVi/WWAN R921 *0_5%_2 EN43
[61] CNV_MFUART2_TXD EL43 GPP_H9/I2C4_SCL/CNV_MFUART2_TXD
R922 *0_5%_2
(Co-existence) [61] CNV_MFUART2_RXD GPP_H8/I2C4_SDA/CNV_MFUART2_RXD 1.8V
R976 *0_5%_2 DN60
[150] MIPICCD_I2C_SCL DN57 GPP_B17/I2C5_SCL/ISH_I2C2_SCL
MIPICCD R977 *0_5%_2
[150] MIPICCD_I2C_SDA GPP_B16/I2C5_SDA/ISH_I2C2_SDA 3.3V
PEN_I2C_SCL 6 OF 22
[97] PEN_I2C_SCL PEN_I2C_SDA
STYLUS-EMR (D5/D7) [97] PEN_I2C_SDA CPU_ADL_P_1744P

C C

+3V

RTC_DET# R744 *1M_1%_2


ISH_I2C0 ISH_GPx ISH_I2C1 ISH_GP4
PCH PCH

+3V_DEEP_SUS
ISH_GP3
G-Sensor M/B TOF

B
ISH_GP2 NFC_SCL B
NFC R777 *2.2K_1%_2
G-Sensor D/B NFC_SDA R787 *2.2K_1%_2

5GorAP_P_INT# R898 *2.2K_1%_2

ISH_GP7 PEN_I2C_SCL
STYLUS-EMR (D5/D7) R321 *2.2K_1%_2
AML D/B PEN_I2C_SDA R937 *2.2K_1%_2

TOF_ISH_I2C1_SCL R892 *2.2K_1%_2


TOF_ISH_I2C1_SDA R893 *2.2K_1%_2
TOF
ISH_I2C0_SCL R890 *2.2K_1%_2
ISH_I2C0_SDA R891 *2.2K_1%_2
G-sensor / D.R for G-sensor_INT#_DB R811 *2.2K_1%_2
AML (D5/D7), P-sensor G-sensor_INT#_MB R897 *2.2K_1%_2

SENSOR_MODE1_PCH R1003 *2.2K_1%_2


SENSOR_MODE2_PCH R1004 *2.2K_1%_2

TP_I2C_SCL R829 2.2K_1%_2


TOUCH PAD TP_I2C_SDA R824 2.2K_1%_2

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom ADL-P 5/14 (I2C/ISH) A1A

Date: Thursday, May 26, 2022 Sheet 6 of 150


5 4 3 2 1
5 4 3 2 1

U053P
U053Q DC47
DC54
U053R

VSS_DC47 VSS_ED58
ED58
ED6 U053S
7
BF58 CD58 DC57 VSS_DC54 VSS_ED6 ED60
A3 AL15 BG1 VSS_BF58 VSS_CD58 CE51 DC59 VSS_DC57 VSS_ED60 ED8 F56 M36
A10 VSS_A3 VSS_AL15 AL17 BG12 VSS_BG1 VSS_CE51 CE55 DE44 VSS_DC59 VSS_ED8 EE16 F59 VSS_F56 VSS_M36 M47
A21 VSS_A10 VSS_AL17 AL22 BG44 VSS_BG12 VSS_CE55 CF47 DE51 VSS_DE44 VSS_EE16 EE43 F9 VSS_F59 VSS_M47 M57
A23 VSS_A21 VSS_AL22 AL4 BG52 VSS_BG44 VSS_CF47 CF49 DE55 VSS_DE51 VSS_EE43 EE51 FA40 VSS_F9 VSS_M57 M59
A25 VSS_A23 VSS_AL4 AL41 BG9 VSS_BG52 VSS_CF49 CF54 DF43 VSS_DE55 VSS_EE51 EF13 FA7 VSS_FA40 VSS_M59 N1
D A26 VSS_A25 VSS_AL41 AL54 BH4 VSS_BG9 VSS_CF54 CG57 DF46 VSS_DF43 VSS_EF13 EF8 FB1 VSS_FA7 VSS_N1 N4 D
A28 VSS_A26 VSS_AL54 AM11 BH46 VSS_BH4 VSS_CG57 CG59 DF48 VSS_DF46 VSS_EF8 EH13 FB14 VSS_FB1 VSS_N4 N40
A30 VSS_A28 VSS_AM11 AM3 BH48 VSS_BH46 VSS_CG59 CH11 DF58 VSS_DF48 VSS_EH13 EH8 FB26 VSS_FB14 VSS_N40 N41
A31 VSS_A30 VSS_AM3 AM51 BH58 VSS_BH48 VSS_CH11 CH12 DG11 VSS_DF58 VSS_EH8 EK21 FB42 VSS_FB26 VSS_N41 N48
A33 VSS_A31 VSS_AM51 AM55 BJ51 VSS_BH58 VSS_CH12 CH54 DG12 VSS_DG11 VSS_EK21 EK28 FB48 VSS_FB42 VSS_N48 N54
A40 VSS_A33 VSS_AM55 AM9 BJ55 VSS_BJ51 VSS_CH54 CH6 DG51 VSS_DG12 VSS_EK28 EK36 FB59 VSS_FB48 VSS_N54 N9
A47 VSS_A40 VSS_AM9 AN17 BJ6 VSS_BJ55 VSS_CH6 CH8 DG55 VSS_DG51 VSS_EK36 EK43 FB61 VSS_FB59 VSS_N9 P11
A53 VSS_A47 VSS_AN17 AN40 BJ8 VSS_BJ6 VSS_CH8 CH9 DG6 VSS_DG55 VSS_EK43 EK51 FC2 VSS_FB61 VSS_P11 P16
A60 VSS_A53 VSS_AN40 AN46 BJ9 VSS_BJ8 VSS_CH9 CJ14 DG8 VSS_DG6 VSS_EK51 EK56 FC55 VSS_FC2 VSS_P16 P21
AA11 VSS_A60 VSS_AN46 AN48 BL11 VSS_BJ9 VSS_CJ14 CJ4 DG9 VSS_DG8 VSS_EK56 EK58 FC56 VSS_FC55 VSS_P21 P26
AA21 VSS_AA11 VSS_AN48 AN58 BL4 VSS_BL11 VSS_CJ4 CJ44 DH4 VSS_DG9 VSS_EK58 EL13 FC58 VSS_FC56 VSS_P26 P3
AA26 VSS_AA21 VSS_AN58 AP1 BL54 VSS_BL4 VSS_CJ44 CK1 DH54 VSS_DH4 VSS_EL13 EL4 FC60 VSS_FC58 VSS_P3 P31
AA31 VSS_AA26 VSS_AP1 AP15 BL9 VSS_BL54 VSS_CK1 CK3 DJ47 VSS_DH54 VSS_EL4 EL6 G21 VSS_FC60 VSS_P31 P35
AA35 VSS_AA31 VSS_AP15 AP20 BM1 VSS_BL9 VSS_CK3 CK43 DJ57 VSS_DJ47 VSS_EL6 EL8 G25 VSS_G21 VSS_P35 P47
AA40 VSS_AA35 VSS_AP20 AP22 BM14 VSS_BM1 VSS_CK43 CK46 DJ59 VSS_DJ57 VSS_EL8 EN13 G28 VSS_G25 VSS_P47 P51
AA44 VSS_AA40 VSS_AP22 AP25 BM47 VSS_BM14 VSS_CK46 CK48 DK14 VSS_DJ59 VSS_EN13 EN8 G31 VSS_G28 VSS_P51 P55
AA57 VSS_AA44 VSS_AP25 AP35 BM57 VSS_BM47 VSS_CK48 CK51 DK54 VSS_DK14 VSS_EN8 EP14 G34 VSS_G31 VSS_P55 R12
AA59 VSS_AA57 VSS_AP35 AP51 BM59 VSS_BM57 VSS_CK51 CK55 DL10 VSS_DK54 VSS_EP14 ER1 G42 VSS_G34 VSS_R12 R17
AB16 VSS_AA59 VSS_AP51 AP55 BN1 VSS_BM59 VSS_CK55 CK58 DL11 VSS_DL10 VSS_ER1 ER13 G43 VSS_G42 VSS_R17 R22
AB21 VSS_AB16 VSS_AP55 AP9 BN54 VSS_BN1 VSS_CK58 CM52 DL13 VSS_DL11 VSS_ER13 ER21 G50 VSS_G43 VSS_R22 R27
AB26 VSS_AB21 VSS_AP9 AR4 BN9 VSS_BN54 VSS_CM52 CN46 DM4 VSS_DL13 VSS_ER21 ER28 H1 VSS_G50 VSS_R27 R32
AB31 VSS_AB26 VSS_AR4 AR54 BP4 VSS_BN9 VSS_CN46 CN58 DM41 VSS_DM4 VSS_ER28 ER3 H13 VSS_H1 VSS_R32 R37
AB35 VSS_AB31 VSS_AR54 AT47 BP51 VSS_BP4 VSS_CN58 CP51 DM46 VSS_DM41 VSS_ER3 ER36 H16 VSS_H13 VSS_R37 R44
AB54 VSS_AB35 VSS_AT47 AT57 BP55 VSS_BP51 VSS_CP51 CP55 DM48 VSS_DM46 VSS_ER36 ER43 H18 VSS_H16 VSS_R44 R48
AC4 VSS_AB54 VSS_AT57 AT59 BR43 VSS_BP55 VSS_CP55 CR43 DM51 VSS_DM48 VSS_ER43 ER51 H34 VSS_H18 VSS_R48 R58
AC40 VSS_AC4 VSS_AT59 AT6 BR46 VSS_BR43 VSS_CR43 CR47 DM55 VSS_DM51 VSS_ER51 ER61 H37 VSS_H34 VSS_R58 T1
AC44 VSS_AC40 VSS_AT6 AT8 BR48 VSS_BR46 VSS_CR47 CR49 DM58 VSS_DM55 VSS_ER61 ER8 H52 VSS_H37 VSS_T1 T11
AC51 VSS_AC44 VSS_AT8 AU54 BR58 VSS_BR48 VSS_CR49 CR54 DM6 VSS_DM58 VSS_ER8 EU11 H58 VSS_H52 VSS_T11 T16
AC55 VSS_AC51 VSS_AU54 AV11 BR6 VSS_BR58 VSS_CR54 CT11 DM61 VSS_DM6 VSS_EU11 EU56 H6 VSS_H58 VSS_T16 T21
AC6 VSS_AC55 VSS_AV11 AV4 BR8 VSS_BR6 VSS_CT11 CT57 DN13 VSS_DM61 VSS_EU56 EU58 H8 VSS_H6 VSS_T21 T26
C AC8 VSS_AC6 VSS_AV4 AV9 BR9 VSS_BR8 VSS_CT57 CT59 DN40 VSS_DN13 VSS_EU58 EU8 H9 VSS_H8 VSS_T26 T3 C
AD21 VSS_AC8 VSS_AV9 AW 1 BT4 VSS_BR9 VSS_CT59 CT6 DN8 VSS_DN40 VSS_EU8 EV14 J11 VSS_H9 VSS_T3 T31
AD26 VSS_AD21 VSS_AW 1 AW 14 BT51 VSS_BT4 VSS_CT6 CT8 DP46 VSS_DN8 VSS_EV14 EV20 J14 VSS_J11 VSS_T31 T35
AD31 VSS_AD26 VSS_AW 14 AW 51 BT55 VSS_BT51 VSS_CT8 CT9 DP49 VSS_DP46 VSS_EV20 EV26 J17 VSS_J14 VSS_T35 T40
AD35 VSS_AD31 VSS_AW 51 AW 55 BU54 VSS_BT55 VSS_CT9 CU4 DT13 VSS_DP49 VSS_EV26 EV33 J20 VSS_J17 VSS_T40 T52
AD46 VSS_AD35 VSS_AW 55 AY1 BU9 VSS_BU54 VSS_CU4 CU54 DT52 VSS_DT13 VSS_EV33 EV39 J21 VSS_J20 VSS_T52 U16
AD48 VSS_AD46 VSS_AY1 AY43 BV1 VSS_BU9 VSS_CU54 CV14 DT8 VSS_DT52 VSS_EV39 EV4 J25 VSS_J21 VSS_U16 U21
AD58 VSS_AD48 VSS_AY43 AY46 BV47 VSS_BV1 VSS_CV14 CW 43 DV13 VSS_DT8 VSS_EV4 EV45 J28 VSS_J25 VSS_U21 U26
AE12 VSS_AD58 VSS_AY46 AY48 BV57 VSS_BV47 VSS_CW 43 CW 46 DV4 VSS_DV13 VSS_EV45 EV52 J31 VSS_J28 VSS_U26 U31
AE17 VSS_AE12 VSS_AY48 AY51 BV59 VSS_BV57 VSS_CW 46 CW 48 DV44 VSS_DV4 VSS_EV52 EV59 J36 VSS_J31 VSS_U31 U35
AE22 VSS_AE17 VSS_AY51 AY55 BW 4 VSS_BV59 VSS_CW 48 CW 51 DV49 VSS_DV44 VSS_EV59 EW 61 J39 VSS_J36 VSS_U35 U44
AE27 VSS_AE22 VSS_AY55 AY58 BW 54 VSS_BW 4 VSS_CW 51 CW 55 DV56 VSS_DV49 VSS_EW 61 EY14 J47 VSS_J39 VSS_U44 U46
AE32 VSS_AE27 VSS_AY58 AY9 BW 9 VSS_BW 54 VSS_CW 55 CW 58 DV58 VSS_DV56 VSS_EY14 EY20 J48 VSS_J47 VSS_U46 V3
AE37 VSS_AE32 VSS_AY9 B34 BY3 VSS_BW 9 VSS_CW 58 CY51 DV6 VSS_DV58 VSS_EY20 EY26 J51 VSS_J48 VSS_V3 V40
AE40 VSS_AE37 VSS_B34 B4 C1 VSS_BY3 VSS_CY51 CY55 DV8 VSS_DV6 VSS_EY26 EY3 J55 VSS_J51 VSS_V40 V41
AE44 VSS_AE40 VSS_B4 B43 C21 VSS_C1 VSS_CY55 D11 DW 14 VSS_DV8 VSS_EY3 EY33 K4 VSS_J55 VSS_V41 V51
AE52 VSS_AE44 VSS_B43 B50 C25 VSS_C21 VSS_D11 D14 DW 25 VSS_DW 14 VSS_EY33 EY39 L12 VSS_K4 VSS_V51 V55
AE9 VSS_AE52 VSS_B50 B58 C28 VSS_C25 VSS_D14 D17 DW 35 VSS_DW 25 VSS_EY39 EY4 L13 VSS_L12 VSS_V55 V58
AF4 VSS_AE9 VSS_B58 B61 C31 VSS_C28 VSS_D17 D20 DY13 VSS_DW 35 VSS_EY4 EY45 L15 VSS_L13 VSS_V58 W1
AF46 VSS_AF4 VSS_B61 BA4 C34 VSS_C31 VSS_D20 D21 DY33 VSS_DY13 VSS_EY45 EY52 L17 VSS_L15 VSS_W 1 W 11
AG1 VSS_AF46 VSS_BA4 BB12 C40 VSS_C34 VSS_D21 D25 DY36 VSS_DY33 VSS_EY52 EY56 L18 VSS_L17 VSS_W 11 W 16
AG51 VSS_AG1 VSS_BB12 BB54 C47 VSS_C40 VSS_D25 D28 DY38 VSS_DY36 VSS_EY56 EY58 L20 VSS_L18 VSS_W 16 W 21
AG55 VSS_AG51 VSS_BB54 BB6 C9 VSS_C47 VSS_D28 D31 DY52 VSS_DY38 VSS_EY58 EY59 L22 VSS_L20 VSS_W 21 W 26
AG58 VSS_AG55 VSS_BB6 BB8 CA14 VSS_C9 VSS_D31 D4 DY8 VSS_DY52 VSS_EY59 EY6 L23 VSS_L22 VSS_W 26 W 31
AH9 VSS_AG58 VSS_BB8 BB9 CA43 VSS_CA14 VSS_D4 D53 E43 VSS_DY8 VSS_EY6 EY9 L27 VSS_L23 VSS_W 31 W 35
AJ3 VSS_AH9 VSS_BB9 BC14 CA46 VSS_CA43 VSS_D53 D56 E50 VSS_E43 VSS_EY9 F21 L30 VSS_L27 VSS_W 35 W 44
AJ41 VSS_AJ3 VSS_BC14 BC47 CA48 VSS_CA46 VSS_D56 D58 EB13 VSS_E50 VSS_F21 F23 L33 VSS_L30 VSS_W 44 Y12
AJ47 VSS_AJ41 VSS_BC47 BC57 CA51 VSS_CA48 VSS_D58 D59 EB26 VSS_EB13 VSS_F23 F26 L35 VSS_L33 VSS_Y12 Y17
AJ49 VSS_AJ47 VSS_BC57 BC59 CA55 VSS_CA51 VSS_D59 D9 EB31 VSS_EB26 VSS_F26 F28 L36 VSS_L35 VSS_Y17 Y22
AJ54 VSS_AJ49 VSS_BC59 BD4 CA58 VSS_CA55 VSS_D9 DA11 EB8 VSS_EB31 VSS_F28 F30 L38 VSS_L36 VSS_Y22 Y27
B AK20 VSS_AJ54 VSS_BD4 BD54 CB4 VSS_CA58 VSS_DA11 DA12 EC21 VSS_EB8 VSS_F30 F33 L40 VSS_L38 VSS_Y27 Y32 B
AK25 VSS_AK20 VSS_BD54 BE1 CB6 VSS_CB4 VSS_DA12 DA6 EC28 VSS_EC21 VSS_F33 F4 L54 VSS_L40 VSS_Y32 Y37
AK30 VSS_AK25 VSS_BE1 BE12 CB8 VSS_CB6 VSS_DA6 DA8 ED13 VSS_EC28 VSS_F4 F40 L9 VSS_L54 VSS_Y37 Y4
AK37 VSS_AK30 VSS_BE12 BE51 CB9 VSS_CB8 VSS_DA8 DA9 ED4 VSS_ED13 VSS_F40 F46 M16 VSS_L9 VSS_Y4 Y45
AK4 VSS_AK37 VSS_BE51 BE55 CC1 VSS_CB9 VSS_DA9 DB14 ED56 VSS_ED4 VSS_F46 F47 M21 VSS_M16 VSS_Y45 Y47
AK57 VSS_AK4 VSS_BE55 BE9 CC52 VSS_CC1 VSS_DB14 DB4 VSS_ED56 VSS_F47 F52 M26 VSS_M21 VSS_Y47 Y49
AK59 VSS_AK57 VSS_BE9 BF46 CD46 VSS_CC52 VSS_DB4 DB54 VSS_F52 M31 VSS_M26 VSS_Y49 Y54
AK9 VSS_AK59 VSS_BF46 BF48 VSS_CD46 VSS_DB54 18 OF 22 M32 VSS_M31 VSS_Y54
VSS_AK9 VSS_BF48 17 OF 22 M34 VSS_M32
16 OF 22 CPU_ADL_P_1744P VSS_M34
CPU_ADL_P_1744P 19 OF 22
CPU_ADL_P_1744P
CPU_ADL_P_1744P

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom ADL_P 6/14 (GND) A1A

Date: Monday, March 21, 2022 Sheet 7 of 150


5 4 3 2 1
5 4 3 2 1

U053U

8
+VCC1P05_PROC
EAR CFG15 AF37 A58 RSVD_TP_1 TP086
CFG14 AH35 CFG_15 RSVD_TP_1 B59 RSVD_TP_19 TP088
Stall CPU reset sequence CFG13 AF35 CFG_14 RSVD_TP_19 D61 RSVD_TP_37 TP087
until de-asserted: CFG12 AH37 CFG_13 RSVD_TP_37
- 1 = (Default) Normal R182 CFG11 AH25 CFG_12 AF40 RSVD_TP_4 TP023
CFG_11 RSVD_TP_4 RSVD_TP_5 U053T VCC_CFG_PU_OUT
Operation; No stall. 1K_1%_2 CFG10 AF20 AH40 TP027
CFG9 AH22 CFG_10 RSVD_TP_5
- 0 = Stall CFG8 AK17 CFG_9 DG44 RSVD_TP_38 TP046 EF48 BF43 TP_RSVD_22 TP039
CFG7 AJ15 CFG_8 RSVD_TP_38 DH43 RSVD_TP_40 TP049 RSVD_17 RSVD_TP_22 AA9 TP_RSVD_2 TP019
CFG6 AH17 CFG_7 RSVD_TP_40 EF51 RSVD_TP_2 DJ9 TP_RSVD_43 TP047
[4] CPU_EAR CFG_6 RSVD_18 RSVD_TP_43
CFG5 AG15 BB11
CFG4 AD11 CFG_5 VSS_129 BE11 TP095 TP_RSVD_55 FB58 DJ12 TP_RSVD_42 TP052
D CFG3 AC12 CFG_4 VSS_142 TP069 TP_RSVD_53 EY61 RSVD_TP_55 RSVD_TP_42 AV12 D
R184 CFG2 AA12 CFG_3 FB3 RSVD_TP_53 VCC_CFG_PU_OUT CH43 TP_RSVD_32 TP042
CFG1 AD16 CFG_2 RSVD_23 FC6 EH48 RSVD_TP_32 DH14 TP_RSVD_39 TP050
*1K_1%_2 CFG_1 RSVD_25 RSVD_21 RSVD_TP_39
CFG0 AA16 EF53 DW32 TP_RSVD_44 TP055
CFG_0 DY5 RSVD_TP_47 TP093 RSVD_19 RSVD_TP_44 BH14 TP_RSVD_23 TP038
R733 49.9_1%_2 CFG_RCOMP F8 RSVD_TP_47 DY6 RSVD_TP_48 TP092 TP048 TP_RSVD_41 DJ11 RSVD_TP_23 DW37 TP_RSVD_45 TP053
MoW-WW50 CFG_RCOMP RSVD_TP_48 RSVD_TP_41 RSVD_TP_45 AL37 TP_RSVD_9 TP029
CFG17 AF22 FC9 TP056 TP_RSVD_50 EB16 RSVD_TP_9
TP157 CFG16 AF17 CFG_17 RSVD_27 FC7 TP054 TP_RSVD_46 DY18 RSVD_TP_50
CFG_16 RSVD_26 RSVD_TP_46
MBP3# AF12 FB4 20 OF 22
EAR-STALL/NOT STALL RESET SEQUENCE MBP2# AH12 BPM#_3 RSVD_TP_54 FC4
BPM#_2 RSVD_TP_56 CPU_ADL_P_1744P
AFTER PCU PLL IS LOCKED MIPI60_BPM1
MIPI60_BPM0
AK12
AL12 BPM#_1 3.3V DT61
CFG0 BPM#_0 Strap pin GPP_B18/ADR_COMPLETE PEN_GPIO0 [14,97] STYLUS-EMR (D5/D7)
1: (DEFAULT) NORMAL OPERATION; NO STALL AK27 R4
R1005 *Short_0201 AH27 RSVD_5 RSVD_28 AC9 RSVD_TP_3 TP089
RSVD_3 RSVD_TP_3
CFG0 R155 *0_5%_2 CFG0_R AY12 DL1
TP034 RSVD_TP_16 AT9 VSS_AY12 RSVD_11 DL3
TP036 RSVD_TP_15 AT11 RSVD_TP_16 RSVD_12
TP033 RSVD_TP_13 AP11 RSVD_TP_15 EU61
R157 TP032 RSVD_TP_14 AP12 RSVD_TP_13 RSVD_22 EC18
*1K_1%_2 TP037 RSVD_TP_20 BA14 RSVD_TP_14 RSVD_14 SKTOCC_N -> H_PRESENT_N U053D
RSVD_TP_20 DV46 +3VPCU +3V_DEEP_SUS
RSVD TP044
TP045
RSVD_TP_36
RSVD_TP_35
CT12
CR14 RSVD_TP_36
VSS_DV46
TP_4
DV42
DT47
TP_4
TP_1
TP057
TP051
AF27
AH20 RSVD_1
TP065 RSVD_TP_52 EK18 RSVD_TP_35 TP_1 CB11 RSVD_TP_31 TP041 AK22 RSVD_2
TP061 RSVD_TP_51 EH18 RSVD_TP_52 RSVD_TP_31 BW11 RSVD_TP_30 TP040 R728 R137 AK40 RSVD_4
RSVD_TP_51 RSVD_TP_30 AL30 RSVD_6
*10K_1%_2 *10K_1%_2
C PCH/ PCH LESS MODE SELECTION TP026 RSVD_TP_6 AL25 AK35 SKTOCC# AL40 RSVD_7 C
TP030 RSVD_TP_10 AN25 RSVD_TP_6 SKTOCC# BG47 RSVD_8
RSVD_TP_10 AN27 RSVD_TP_11 TP022 SKTOCC# R192 *0_5%_2 BG53 RSVD_9
CFG1 RSVD_TP_11 AL27 RSVD_TP_7 TP024
RSMRST# [16,86]
DT42 RSVD_10
1: (DEFAULT) NORMAL OPERATION RSVD_TP_7 Q012 RSVD_13

3
EE46
0: PCH-LESS MODE AL35 RSVD_TP_8 TP031 2 EF33 RSVD_15
CFG1 RSVD_TP_8 AN35 RSVD_TP_12 TP035 EH41 RSVD_16
*PJA138K
RSVD_TP_12 R730 RSVD_20
EL51 *10K_1%_2 4 OF 22

1
3.3V GPP_T3 EN51
BOARD_ID16 [15]
BOARD_ID15 [15]
R169 GPP_T2 CPU_ADL_P_1744P
*1K_1%_2 21 OF 22

CPU_ADL_P_1744P

RSVD VCC_CFG_PU_OUT

PCIE PORT BIFURCATION STRAPS NO SVID PROTOCOL CAPABLE VR CONNECTED PM SYNC LEGACY R156 *1K_1%_2 CFG0_R
LANE Reversal for PEG D1:F0 CFG[6:5] CFG12
CFG9 R165 *1K_1%_2 CFG1
11: DEVICE1 FUNTION 0 ENBLED 1: (DEFAULT) PMSYNC 2.0
CFG2 10: DEVICE1 FUNCTION0, DEVICE1 FUNCTION 1 ENBLED 1: VRS SUPPORTING SVID PROTOCOL ARE PRESENT 0: LEGACY R162 1K_1%_2 CFG2
1: (DEFAULT)NORMAL OPERATION 0: NO VR SUPPORTING SVID IS PRESENT. THE CHIP
0: LANE REVERSAL WILL NOT GENERATE (OR RESPOND TO) SVID ACTIVITY R160 *1K_1%_2 CFG3
CFG2 CFG12
CFG5 CFG6 CFG9 R158 *1K_1%_2 CFG4

R159 *1K_1%_2 CFG5


R168 R212
B *1K_1%_2 R210 R206 R198 *1K_1%_2 R161 *1K_1%_2 CFG6 B
*1K_1%_2 *1K_1%_2 *1K_1%_2
PCIE Gen5(x8) R170 *1K_1%_2 CFG7
RSVD MoW-WW50 RSVD R163 *1K_1%_2 CFG8

R171 1K_1%_2 CFG9


PEG DEFER TRAINING SAFE MODE BOOT
PHYSICAL_DEBUG_ENABLED(DFX PRIVACY) CFG7
PMSYNC AYNC MODE- PM SYNC R166 1K_1%_2 CFG10
1: (DEFAULT) PEG TRAIN IMMEEDIATELY FOLLOWING XXRESETB DEASSERTION CFG10 CFG13 R174 *1K_1%_2 CFG11
CFG3 0: PEG WAIT FOR BIOS FOR TRAINING 1: POWER FEATURES ACTIVATED DURING RESETT 1: (DEFAULT)SYNCHCRONOUS (1 24 MHZ CYCLE PER BIT)
1: DISABLED 0: POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT 0: ASYNC - 4-24MHZ CYCLES PER BIT R172 *1K_1%_2 CFG12
0: ENABLED ACTIVATED
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR CFG7 CFG13 R164 *1K_1%_2 CFG13
CFG3 CFG10
R167 1K_1%_2 CFG14

R216 R204 R175 1K_1%_2 CFG15


R195 *1K_1%_2 R213 *1K_1%_2
*1K_1%_2 *1K_1%_2 R220 10K_1%_2 MIPI60_BPM0

R219 10K_1%_2 MIPI60_BPM1


RSVD RSVD MoW-WW50 RSVD R215 10K_1%_2 MBP2#

R209 10K_1%_2 MBP3#


PHYSICAL_DEBUG_ENABLED(DFX PRIVACY) ALLOW THE USE OF NOA ON LOCKED UNITS DMI AC COUPLING - JUST A PLACE HOLDER.
CFG4 CFG8 NOT APPLICABLE FOR ULX-ULT PEG60 Lane Reversal PEG62 Lane Reversal
CFG11 CFG14 CFG15 CFG[17:16] R173 *51_1%_2 CFG16
A 1: DISABLED 1: DISABLED(DEFAULT): IN THHIS CASE, NOA WILL BE A
DISABLE IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS 1:(DEFAULT)DMI WILL BE CONFIGURED AS HALF SWING DC 1: (Default) Normal 1: (Default) Normal
0: ENABLED COUPLED 0: Reversed 0: Reversed
0: ENABLED: NOA WILL BE AVAILABLE REGARDLESS OF 0: DMI WILL BE CONFIGURED AS FULL SWING AC COUPLED CFG14 CFG15
CFG4 CFG11
THE LOCKING OF THE UNIT
Quanta Computer Inc.
CFG8 R214 *1K_1%_2 R205 R203
R185
*1K_1%_2
R211
*1K_1%_2
*1K_1%_2 *1K_1%_2 PROJECT : ZGN
RSVD RSVD RSVD PCIE Gen4 (CHA) PCIE Gen4 (CHB) RSVD Size
Custom
Document Number
ADL-P 7/14 (RSVD/XDP)
Rev
A1A

Date: Thursday, May 26, 2022 Sheet 8 of 150


5 4 3 2 1
5 4 3 2 1

C441 *15p/25V_2
U053E
9
EG56 EL38 PCH_SMB_CLK
[19] PCH_SPI1_CLK SPI0_CLK GPP_C0/SMBCLK PCH_SMB_CLK [21]
EC59 EK38 PCH_SMB_DATA
[14,19] PCH_SPI_IO3
EC61 SPI0_IO3 Strap pin GPP_C1/SMBDATA EN38
PCH_SMB_DATA [21] Memory SPD
[14,19] PCH_SPI_IO2 SPI0_IO2 Strap pin Strap pin GPP_C2/SMBALERT# GPP_C2_SMBALERT# [14]
EF59 R121 *Short_0201
D
SPI [19] PCH_SPI1_SO
EF57 SPI0_MISO EE38 SMB_SML0_CLK_R GPS_DISABLE# [150] D
[14,19] PCH_SPI1_SI SPI0_MOSI Strap pin GPP_C3/SML0CLK
EG58 EF38 SMB_SML0_DAT_R
TP271
EF61 SPI0_CS1# 3.3V SMB0-BBR GPP_C4/SML0DATA EH38
TBT BBR
[19] PCH_SPI_CS0#
EF56 SPI0_CS0# Strap pin GPP_C5/SML0ALERT# NFC_DWL_REQ_PCH [14] NFC
[20] SPI_TPM_CS# SPI0_CS2# ET38 PD_I2C_SCL
GPP_C6/SML1CLK PD_I2C_SCL [73]
FC28 ER38 PD_I2C_SDA
SMART CARD [150] SmartCard_ON
EF23 GPP_E11/THC0_SPI1_CLK/GSPI0_CLK SMB1-PD GPP_C7/SML1DATA EF41
PD_I2C_SDA [73] TBT PD
TPM-PIRQ [20] TPM_PIRQ#
EE23 GPP_E2/THC0_SPI1_IO3 Strap pin GPP_B23/SML1ALERT#/PCHHOT# PEN_GPIO1 [14,97] STYLUS-EMR
WLAN Enable [61] RF_EN_PCH
EL23 GPP_E1/THC0_SPI1_IO2 DT49 ESPI_CLK_R R249 33_1%_2 (D5/D7)
[15] RAM_ID1 GPP_E12/THC0_SPI1_IO1/I2C0A_SDA/GSPI0_MISO GPP_A9/ESPI_CLK ESPI_CLK [86]
EN23 DP52 ESPI_3_R R238 33_1%_2
[15] RAM_ID2 FA28 GPP_E13/THC0_SPI1_IO0/I2C0A_SCL/GSPI0_MOSI GPP_A3/ESPI_IO3/SUSACK# DT54 ESPI_2_R R255 33_1%_2
ESPI_3 [86] ESPI
MB ID (Onboard RAM) [15] RAM_ID3 EY25 GPP_E10/THC0_SPI1_CS#/GSPI0_CS0# GPP_A2/ESPI_IO2/SUSWARN#/SUSPWRDNACK DT44 ESPI_1_R R253 33_1%_2
ESPI_2 [86]
NFC [150] NFC_RST# EH23 GPP_E17/THC0_SPI1_INT# GPP_A1/ESPI_IO1 DP51 ESPI_0_R R237 33_1%_2
ESPI_1 [86]
[14] GPP_E6 GPP_E6/THC0_SPI1_RST# Strap pin GPP_A0/ESPI_IO0 ESPI_0 [86]
DP44 ESPI_CS#_R R245 *Short_0201
R1000 *0_5%_2 DGPU_HOLD_RST# EN33 1.8V GPP_A4/ESPI_CS0# DT46
ESPI_CS# [86]

MsHybrid
[20] TPM_PWR_EN# [25] DGPU_HOLD_RST# GPU_EVENT#_R EN36 GPP_F11/THC1_SPI2_CLK/GSPI1_CLK 3.3V GPP_A23/ESPI_CS1# DT51 ESPI_RESET#_R R256 *Short_0201 ESPI_RESET# [86]
RAM_INTERLEAVED [15]
GPU_EVENT# R1002 *Short_0201 DGPU_PWROK_Q EL36 GPP_F15/GSXSRESET#/THC1_SPI2_IO3 GPP_A10/ESPI_RESET# DP47
[31] DGPU_PWROK_Q GPP_F14/GSXDIN/THC1_SPI2_IO2 GPP_A5/ESPI_ALERT0# RAM_ONBOARD_A [15]
[31] DGPU_PWR_EN DGPU_PWR_EN ET33 DP54
GPP_F13/GSXSLOAD/THC1_SPI2_IO1/GSPI1_MISIO/I2C1A_SDA GPP_A6/ESPI_ALERT1# RAM_ONBOARD_B [15]
[15] MBID_DGPU_PRSNT# EL31
TOUCH_EN EL33 GPP_F12/GSXDOUT/THC1_SPI2_IO0/GSPI1_MOSI/I2C1A_SCL
[45,97] TOUCH_EN GPP_F16/GSXCLK/THC1_SPI2_CS#/GSP1_CS0#
ET36
Touch Screen [45,97] TOUCH_INT#
TOUCH_RST# ER33 GPP_F18/THC1_SPI2_INT#
[45,97] TOUCH_RST# GPP_F17/THC1_SPI2_RST#
EE26
[61] CLINK_CLK EF26 CL_CLK
C-Link [61] CLINK_DATA EH26 CL_DATA
[61] CLINK_RESET CL_RST#
5 OF 22

CPU_ADL_P_1744P
C +3V_DEEP_SUS C

PCH_SMB_CLK R834 2.2K_1%_2

+3V_DEEP_SUS Memory SPD TP165

TP166
PCH_SMB_DATA R821 2.2K_1%_2

R351 Control by PD PD_I2C_SDA R375 2.2K_1%_2


S5 499_1%_2 PD TP167
PD_I2C_SCL R374 2.2K_1%_2
TP168
2

SMB_SML0_CLK_R Q58 1 3 *PJA138K


TP169 SMB_SML0_CLK [74]
+3V

R958 *Short_0201
GPU_EVENT# R335 *100K_1%_2
+3V_DEEP_SUS
TBT B.B
PCH-SMB0 GPU TP155
DGPU_PWROK_Q R339 10K_1%_2

DGPU_PWR_EN R145 10K_1%_2


TP154
R343 DGPU_HOLD_RST# R320 100K_1%_2
TP153
499_1%_2
B B
2

SMB_SML0_DAT_R Q59 1 3 *PJA138K


TP170 SMB_SML0_DAT [74]

R957 *Short_0201

ESPI_CS#_R R239 75K_1%_2


ESPI ESPI_RESET#_R R254 *100K_1%_2

Glitch Free
+3V_DEEP_SUS

TOUCH_RST# R974 100K_1%_2


TOUCH
5

TOUCH_EN R973 100K_1%_2

PCH_SMB_CLK Q82A 4 3 *PJX138K 2ND_MBCLK [61,73,86,93]

A
+3V_DEEP_SUS
EC SMBUs2 A

Quanta Computer Inc.


2

PCH_SMB_DATA Q82B 1 6 *PJX138K 2ND_MBDATA [61,73,86,93] PROJECT : ZGN


Size Document Number Rev
Custom ADL-P 8/14 (SMBus/SPI) A1A

Date: Thursday, May 26, 2022 Sheet 9 of 150


5 4 3 2 1
5 4 3 2 1

HDD
[150]
[150]
PCIE_TXP12/SATA1_TXP
PCIE_TXN12/SATA1_TXN
DY10
DY11
EA4
U053I

PCIE12_TXP/SATA1_TXP
PCIE12_TXN/SATA1_TXN
USB2P_10
USB2N_10
EM5
EM6 USBP10+ [61]
USBP10- [61] BT
10
[150] PCIE_RXP12/SATA1_RXP PCIE12_RXP/SATA1_RXP
EA6 EL18
[150] PCIE_RXN12/SATA1RXN PCIE12_RXN/SATA1RXN USB2P_9 USBP9+ [96]
EN18 Card Reader
EB10 USB2N_9 USBP9- [96]
[96] PCIE_TXP11 EB11 PCIE11_TXP/SATA0_TXP EN1
SD7.0 (D5/D7) [96] PCIE_TXN11
EC5 PCIE11_TXN/SATA0_TXN USB2P_8 EN3 USBP8+ [88]
[96] PCIE_RXP11 EC6 PCIE11_RXP/SATA0_RXP USB2N_8 USBP8- [88] Finger Print
D [96] PCIE_RXN11 PCIE11_RXN/SATA0_RXN ER16 D
SSD-Gen3#2 ED10 USB2P_7 ET16 USBP7+ [87]
wSATA [150] PCIE_TXP10
ED11 PCIE10_TXP/UFS11_TXP USB2N_7 USBP7- [87] KB /TSN(D.R)
[150] PCIE_TXN10 PCIE10_TXN/UFS11_TXN
EC1 EP4
[150] PCIE_RXP10 PCIE10_RXP/UFS11_RXP USB2P_6 USBP6+ [45]
EC3 EP6 CCD
[150] PCIE_RXN10 PCIE10_RXN/UFS11_RXN USB2N_6 USBP6- [45]
EF10 FA15
[68] PCIE_TXP9 PCIE9_TXP/UFS10_TXP USB2P_5 USBP5+ [97]
EF11 FC15 EYE Tracker (D5/D7)
[68] PCIE_TXN9 PCIE9_TXN/UFS10_TXN USB2N_5 USBP5- [97]
LAN [68] PCIE_RXP9 EF5
EF6 PCIE9_RXP/UFS10_RXP ER5
[68] PCIE_RXN9 PCIE9_RXN/UFS10_RXN USB2P_4 USBP4+ [97]
ER6 3D display (D5/D7)
EH10 USB2N_4 USBP4- [97]
[150] PCIE_TXP8 PCIE8_TXP
EH11 ER18
[150] PCIE_TXN8 PCIE8_TXN USB2P_3 USBP3+ [81]
SD7.0 EF1 ET18 TypeA#2(MB)
[150] PCIE_RXP8 PCIE8_RXP USB2N_3 USBP3- [81]
EF3
[150] PCIE_RXN8 PCIE8_RXN EH16
USB2P_2 USBP2+ [73]
EL10 EK16 TypeC#1
[150] PCIE_TXP7 PCIE7_TXP USB2N_2 USBP2- [73]
EL11
[150] PCIE_TXN7 PCIE7_TXN
LAN EG4 EL16
[150] PCIE_RXP7 PCIE7_RXP USB2P_1 USBP1+ [79]
EG6 EN16 TypeA#1(MB) + BC1.2
[150] PCIE_RXN7 PCIE7_RXN USB2N_1 USBP1- [79]
SSD-Gen3#2 EN10 FC25 TOF_INT#
woSATA [150] PCIE_TXP6
EN11 PCIE6_TXP GPP_E9/USB_OC0#/ISH_GP4 DY51 TOF_RESET# TOF_INT# [91]
[150] PCIE_TXN6
EJ5 PCIE6_TXN GPP_A16/USB_OC3#/ISH_GP5 TOF_RESET# [150] TOF
[150] PCIE_RXP6 PCIE6_RXP 5G_CARD_PWR_CTL
EJ6 FA25
[150] PCIE_RXN6 PCIE6_RXN GPP_E5/DEVSLP1/SRCCLK_OE6# TBT_FORCE_PWR_GPPE4 5G_CARD_PWR_CTL [150]
FC22 R781 33_1%_2
ER10 GPP_E4/DEVSLP0/SRCCLK_OE9# TBT_FORCE_PWR [73,74]
[150] PCIE_TXP5 PCIE5_TXP PCIE_RCOMPP
ER11 DY1
[150] PCIE_TXN5 PCIE5_TXN MPHY_RCOMPP PCIE_RCOMPN
EJ1 DY3 R749 100_1%_2
[150] PCIE_RXP5 PCIE5_RXP MPHY_RCOMPN
EJ3
[150] PCIE_RXN5 PCIE5_RXN USB_VBUSSENSE
C EF18 R331 10K_1%_2 C
FB10 USB_VBUSSENSE EF16 USB_ID R273 10K_1%_2
[61] PCIE_TXP4 PCIE4_TXP/USB32_4_TXP USB_ID USB2_COMP
FA9 FB20 R789 113_1%_2
[61] PCIE_TXN4 PCIE4_TXN/USB32_4_TXN USB2_COMP
WLAN EV16
[61] PCIE_RXP4 PCIE4_RXP/USB32_4_RXP
EY16 DL8 R110 *100K_1%_2
[61] PCIE_RXN4 PCIE4_RXN/USB32_4_RXN UFS_RESET#
EW 11
[97]
[97]
[97]
USB32_TX3+
USB32_TX3-
USB32_RX3+
EY11
EW 17
PCIE3_TXP/USB32_3_TXP
PCIE3_TXN/USB32_3_TXN
PCIE3_RXP/USB32_3_RXP
5G & TOF
EY17
EYE Tracker (D5/D7) [97] USB32_RX3- PCIE3_RXN/USB32_3_RXN
FA12 5G_CARD_PWR_CTL R790 *100K_1%_2
[80] USB32_TX2+ PCIE2_TXP/USB32_2_TXP +3V_DEEP_SUS
FC12
[80] USB32_TX2- PCIE2_TXN/USB32_2_TXN TOF_INT#
FA18 R796 *10K_1%_2
TypeA#2(MB) [80]
[80]
USB32_RX2+
USB32_RX2-
FC18 PCIE2_RXP/USB32_2_RXP
PCIE2_RXN/USB32_2_RXN
EV12 Config to GPIO, OCx no need PU
[78] USB32_TX1+ PCIE1_TXP/USB32_1_TXP
EY12
[78] USB32_TX1- PCIE1_TXN/USB32_1_TXN
EV19 R108 *10K_1%_2
TypeA#1(MB) + BC1.2 [78]
[78]
USB32_RX1+
USB32_RX1-
EY19 PCIE1_RXP/USB32_1_RXP
PCIE1_RXN/USB32_1_RXN TOF_RESET# R924 *10K_1%_2
9 OF 22

CPU_ADL_P_1744P
U053H

A20 C33 PEG_TXP7_C C666 EV@0.22u/6.3V_2


[55] PEG_TXP3_G4 PCIEX4_A_TX_P_3 PCIEX8_TX_P_7 PEG_TXP7[25]
C20 D33 PEG_TXN7_C C665 EV@0.22u/6.3V_2
[55] PEG_TXN3_G4 PCIEX4_A_TX_N_3 PCIEX8_TX_N_7 PEG_TXN7 [25]
M22 J33 PEG_TXP6_C C668 EV@0.22u/6.3V_2
[55] PEG_RXP3_G4 PCIEX4_A_RX_P_3 PCIEX8_TX_P_6 PEG_TXN6_C PEG_TXP6[25]
M24 G33 C667 EV@0.22u/6.3V_2
[55] PEG_RXN3_G4 PCIEX4_A_RX_N_3 PCIEX8_TX_N_6 PEG_TXP5_C PEG_TXN6 [25]
B C30 C670 EV@0.22u/6.3V_2 B
PCIEX8_TX_P_5 PEG_TXN5_C PEG_TXP5[25]
G20 D30 C669 EV@0.22u/6.3V_2
[55] PEG_TXP2_G4 PCIEX4_A_TX_P_2 PCIEX8_TX_N_5 PEG_TXP4_C PEG_TXN5 [25]
F20 J30 C674 EV@0.22u/6.3V_2
[55] PEG_TXN2_G4 PCIEX4_A_TX_N_2 PCIEX8_TX_P_4 PEG_TXP4[25]
V22 G30 PEG_TXN4_C C673 EV@0.22u/6.3V_2
[55] PEG_RXP2_G4 PCIEX4_A_RX_P_2 PCIEX8_TX_N_4 PEG_TXP3_C PEG_TXN4 [25]
U22 C26 C676 EV@0.22u/6.3V_2
SSD-Gen4#2 [55] PEG_RXN2_G4 PCIEX4_A_RX_N_2 PCIEX8_TX_P_3 D26 PEG_TXN3_C C675 EV@0.22u/6.3V_2
PEG_TXP3[25]
PCIEX8_TX_N_3 PEG_TXP2_C PEG_TXN3 [25]
A17 J26 C678 EV@0.22u/6.3V_2
[55] PEG_TXP1_G4 PCIEX4_A_TX_P_1 PCIEX8_TX_P_2 PEG_TXN2_C PEG_TXP2[25]
C17 G26 C677 EV@0.22u/6.3V_2
[55] PEG_TXN1_G4 PCIEX4_A_TX_N_1 PCIEX8_TX_N_2 PEG_TXN2 [25]
AC22 C23 PEG_TXP1_C C680 EV@0.22u/6.3V_2
[55] PEG_RXP1_G4 PCIEX4_A_RX_P_1 PCIEX8_TX_P_1 PEG_TXN1_C PEG_TXP1[25]
AA22 D23 C679 EV@0.22u/6.3V_2
[55] PEG_RXN1_G4 PCIEX4_A_RX_N_1 PCIEX8_TX_N_1 PEG_TXP0_C PEG_TXN1 [25]
J23 C681 EV@0.22u/6.3V_2
G17 PCIEX8_TX_P_0 G23 PEG_TXN0_C PEG_TXP0[25]
C682 EV@0.22u/6.3V_2
[55] PEG_TXP0_G4
[55] PEG_TXN0_G4
F17 PCIEX4_A_TX_P_0 PCIEX8_TX_N_0 PEG_TXN0 [25] d-GPU(X8)
M18 PCIEX4_A_TX_N_0 M39
[55] PEG_RXP0_G4 PCIEX4_A_RX_P_0 PCIEX8_RX_P_7 PEG_RXP7 [25]
M19 M37
[55] PEG_RXN0_G4 PCIEX4_A_RX_N_0 PCIEX8_RX_N_7 PEG_RXN7 [25]
U37
PCIEX8_RX_P_6 PEG_RXP6 [25]
PCIE4_RCOMPN F6 V37
PCIE4A_RCOMPP PCIEX4_RCOMP_N PCIEX8_RX_N_6 PEG_RXN6 [25]
R735 2.2K_0.5%_2 A6 AA37
PCIEX4_A_RCOMP_P_1 PCIEX8_RX_P_5 PEG_RXP5 [25]
C6 AC37
PCIE4B_RCOMPP PCIEX4_A_RCOMP_P_2 PCIEX8_RX_N_5 PEG_RXN5 [25]
R736 2.2K_0.5%_2 A5 U32
PCIEX4_B_RCOMP_P_1 PCIEX8_RX_P_4 PEG_RXP4 [25]
D6 V32
PCIEX4_B_RCOMP_P_2 PCIEX8_RX_N_4 PEG_RXN4 [25]
AA32
PCIEX8_RX_P_3 PEG_RXP3 [25]
A14 AC32
[53] PCIEX4_B_TX_P_3 PCIEX4_B_TXP_3 PCIEX8_RX_N_3 PEG_RXN3 [25]
C14 M29
[53] PCIEX4_B_TX_N_3 PCIEX4_B_TXN_3 PCIEX8_RX_P_2 PEG_RXP2 [25]
V17 M27
[53] PCIEX4_B_RX_P_3 PCIEX4_B_RXP_3 PCIEX8_RX_N_2 PEG_RXN2 [25]
U17 U27
[53] PCIEX4_B_RX_N_3 PCIEX4_B_RXN_3 PCIEX8_RX_P_1 PEG_RXP1 [25]
V27
PCIEX8_RX_N_1 PEG_RXN1 [25]
G14 AA27
[53] PCIEX4_B_TX_P_2 PCIEX4_B_TXP_2 PCIEX8_RX_P_0 PEG_RXP0 [25]
F14 AC27
[53] PCIEX4_B_TX_N_2 PCIEX4_B_TXN_2 PCIEX8_RX_N_0 PEG_RXN0 [25]
AC17
[53] PCIEX4_B_RX_P_2 PCIEX4_B_RXP_2 PCIEX8_RCOMP_P_1_2
A AA17 A8 A
[53] PCIEX4_B_RX_N_2 PCIEX4_B_RXN_2 PCIEX8_RCOMP_P_1 C8
SSD-Gen4#1 [53] PCIEX4_B_TX_P_1
A11 PCIEX8_RCOMP_P_2 D8
C11 PCIEX4_B_TXP_1 PCIEX8_RCOMP_N R734
[53] PCIEX4_B_TX_N_1 PCIEX4_B_TXN_1
M13 150_1%_2
[53] PCIEX4_B_RX_P_1 PCIEX4_B_RXP_1
[53] PCIEX4_B_RX_N_1
M14
PCIEX4_B_RXN_1 Quanta Computer Inc.
G11 PCIEX8_RCOMP_N
[53]
[53]
PCIEX4_B_TX_P_0
PCIEX4_B_TX_N_0
F11
V12
PCIEX4_B_TXP_0
PCIEX4_B_TXN_0
PROJECT : ZGN
[53] PCIEX4_B_RX_P_0 PCIEX4_B_RXP_0
U12
[53] PCIEX4_B_RX_N_0 PCIEX4_B_RXN_0 Size Document Number Rev
8 OF 22 Custom ADL-P 10/14(USB/PCIE/SAT) A1A

CPU_ADL_P_1744P Date: Monday, March 21, 2022 Sheet 10 of 150


5 4 3 2 1
5 4 3 2 1

CLK_REQ/Strap Pin(CLG)

11
U053J

AD41 FC46
AB41 CSI_D_DP_1/CSI_C_DP_2 CNV_W T_D1P FA46 WT_LANE1_DP [61]
AG41 CSI_D_DN_1/CSI_C_DN_2 CNV_W T_D1N EV43 WT_LANE1_DN [61]
AF41 CSI_D_DP_0/CSI_C_DP_3 CNV_W T_D0P EY43 WT_LANE0_DP [61] CNVi-Tx
J41 CSI_D_DN_0/CSI_C_DN_3 CNV_W T_D0N EV47 WT_LANE0_DN [61]
L41 CSI_D_CLK_P CNV_W T_CLKP EY47 WT_CLK_DP [61] CNVi-Tx Clock Glitch Free
CSI_D_CLK_N CNVi CNV_W T_CLKN WT_CLK_DN [61]
P44 EV40
[150] MIPI_CSI_DP1 CSI_C_DP_1 CNV_W R_D1P WR_LANE1_DP [61]
M44 EY40
[150] MIPI_CSI_DN1 CSI_C_DN_1 CNV_W R_D1N WR_LANE1_DN [61]
T41 EW 42 CNV_RF_RESET# R328 75K_1%_2
[150] MIPI_CSI_DP0
P41 CSI_C_DP_0 CNV_W R_D0P EY42 WR_LANE0_DP [61] CNVi-Rx
D
[150] MIPI_CSI_DN0
J44 CSI_C_DN_0 CSI x2 CNV_W R_D0N FA43 WR_LANE0_DN [61] D
[150]
[150]
MIPI_CSI_CLKP
MIPI_CSI_CLKN
K44 CSI_C_CLK_P CNV_W R_CLKP FC43 WR_CLK_DP [61] CNVi-Rx Clock
CSI_C_CLK_N CNV_W R_CLKN WR_CLK_DN [61]
W 41 FC40 CNV_WT_RCOMP R788 150_1%_2
AA41 CSI_B_DP_1 CNV_W T_RCOMP +1.8V_DEEP_SUS
C38 CSI_B_DN_1 EK33 CNV_BRI_RSP
A38 CSI_B_DP_0
Strap pin
GPP_F1/CNV_BRI_RSP/UART2_RXD EH33 CNV_BRI_DT_R R274 *Short_0201
CNV_BRI_RSP [61] CNVi-BT
G39 CSI_B_DN_0 GPP_F0/CNV_BRI_DT/UART2_RTS# ER31 CNV_BRI_DT [14,61] CNV_BRI_RSP R316 *20K_1%_2
F39 CSI_B_CLK_P
Strap pin
GPP_F3/CNV_RGI_RSP/UART2_CTS# EN31 CNV_RGI_DT_R R345 *Short_0201
CNV_RGI_RSP [61] CNVi-RF
CSI_B_CLK_N GPP_F2/CNV_RGI_DT/UART2_TXD CNV_RGI_DT [14,61] CNV_RGI_RSP R317 *20K_1%_2
C36 EF36
A36 CSI_A_DP_1/CSI_B_DP_2 GPP_F5/MODEM_CLKREQ/CRF_XTAL_CLKREQ EH36 MODEM_CLKREQ [61]
R920 *0_5%_2
G37 CSI_A_DN_1/CSI_B_DN_2 GPP_F6/CNV_PA_BLANKING ET31 CNV_PA_BLANKING [61]
R336 *Short_0201
CSI_A_DP_0/CSI_B_DP_3 GPP_F4/CNV_RF_RESET# NFC_IRQ [150]
E37
F36 CSI_A_DN_0/CSI_B_DN_3 CNV_RF_RESET#
G36 CSI_A_CLK_P CNV_RF_RESET# [61]
CSI_A_CLK_N
R731 150_1%_2 CSI_RCOMP A55
B54 CSI_RCOMP_1
CSI_RCOMP_2
ET41
[15] BOARD_ID5 ER41 GPP_H22/IMGCLKOUT3
[15] BOARD_ID6 EN41 GPP_H21/IMGCLKOUT2
[15] BOARD_ID7
[150] WWAN_WAKE_ODL
FA31 GPP_H20/IMGCLKOUT1 3.3V
GPP_D4/IMGCLKOUT0/BK4/SBK4
10 OF 22
For M.S BIOS must disable unuse port, so the ME/BIOS shoudl be different
CPU_ADL_P_1744P

C U053K +3V C
5G_CARD_PWR_EC [150]
DP1 DY46 R919 *0_5%_2 PCIE_CLKREQ_6# R806 10K_1%_2
[68] CLK_PCIE_LANP CLKOUT_PCIE_P6 GPP_A12/SATAXPCIE1/SATAGP1/SRCCLKREQ9B# UART_WAKE_N [61]
(6) LAN DP3 EV22 R120 *Short_0201
[68] CLK_PCIE_LANN CLKOUT_PCIE_N6 3.3V GPP_E0/SATAXPCIE0/SATAGP0/SRCCLKREQ9# EY22 BOARD_ID12 [15] PCIE_CLKREQ_5# R326 10K_1%_2
DU5 GPP_E16/RSVD_TP/SRCCLKREQ8# EB54 BOARD_ID10 [15]

(5) SD7.0 (D5/D7)


[96] CLK_PCIE_SDP
[96] CLK_PCIE_SDN
DU6 CLKOUT_PCIE_P5 1.8V GPP_A8/SRCCLKREQ7# EF31 PCIE_CLKREQ_6# RAM_TYPE1 [15]
(6) LAN PCIE_CLKREQ_4# R776 10K_1%_2
CLKOUT_PCIE_N5 GPP_F19/SRCCLKREQ6# ET43 PCIE_CLKREQ_5# PCIE_CLKREQ_6# [68]
DP5 GPP_H23/SRCCLKREQ5# ER48 PCIE_CLKREQ_4# PCIE_CLKREQ_5# [96] (5) SD7.0 PCIE_CLKREQ_3# R817 10K_1%_2
(4) dGPUx8
[25] CLK_VGA_P
DP6 CLKOUT_PCIE_P4 GPP_H19/SRCCLKREQ4# FC34 PCIE_CLKREQ_3# PCIE_CLKREQ_4# [25] (2) dGPUx8
[25] CLK_VGA_N CLKOUT_PCIE_N4/UFS_REF_CLK Gen4 GPP_D8/SRCCLKREQ3# FC31 PCIE_CLKREQ_2# PCIE_CLKREQ_3# [55] (3) SSD-Gen4#2 PCIE_CLKREQ_2# R361 10K_1%_2
DN10 GPP_D7/SRCCLKREQ2# FB36 PCIE_CLKREQ_1# PCIE_CLKREQ_2# [150] (4) SSD-Gen3#2
(3) SSD-Gen4#2
[55] CLK_PCIE_SSD-VGA_2P DN11 CLKOUT_PCIE_P3 GPP_D6/SRCCLKREQ1# FB29 PCIE_CLKREQ_0# PCIE_CLKREQ_1# [61] (1) WLAN PCIE_CLKREQ_1# R812 10K_1%_2
[55] CLK_PCIE_SSD-VGA_2N CLKOUT_PCIE_N3 Gen4 GPP_D5/SRCCLKREQ0# PCIE_CLKREQ_0# [53] (0) SSD-Gen4#1
DR4 EV6 XTAL_38P4M_OUT PCIE_CLKREQ_0# R841 10K_1%_2
[150] CLK_PCIE_SSD2P CLKOUT_PCIE_P2 XTAL_OUT XTAL_38P4M_IN
(2) SSD2-Gen3#2 DR6 EV8
[150] CLK_PCIE_SSD2N CLKOUT_PCIE_N2 XTAL_IN
DU1 EJ61
[61] CLK_PCIE_WLANP CLKOUT_PCIE_P1 GPD8/SUSCLK SUSCLK_32K [61]
(1) WLAN [61] CLK_PCIE_WLANN
DU3
CLKOUT_PCIE_N1 EV58 RTC_X2
DT10 RTCX2 EV56 RTC_X1
(0) SSD-Gen4#1
[53] CLK_PCIE_SSD1P
[53] CLK_PCIE_SSD1N
DT11 CLKOUT_PCIE_P0
CLKOUT_PCIE_N0 Gen4
RTCX1
FA55 RTC_RST#
RTC Clock 32.768KHz
RTCRST# Crystal Components with Surrounding 10 mil Wide GND Shield Trace
R742 60.4_1%_2 CLK_BIASREF DJ3 FB56 SRTC_RST#
XCLK_BIASREF SRTCRST# Break Out:4-10 mil Wide GND Shield Trace
EB52 RTC_X1 C447 18p/25V_2
1.8V GPP_A7/SRCCLK_OE7# EW 23
RAM_TYPE0 [15]
3.3V GPP_E15/RSVD_TP/SRCCLK_OE8# RAM_ID0 [15]
R329
11 OF 22 Check Y1@0_5%_2
B CPU_ADL_P_1744P Y1/Y4 all need RTC_X1_R
B

pilot run A to C1

1
R330 Y4 Y1
10M_5%_2 Y4@32.768KHZ/20ppm Y1@32.768KHZ/20ppm

Check

2
RTC_X2_R
RTC Circuitry(RTC) +3V_RTC
Y4 for C2/RAMP
RTC Power trace width 20mils. R322
Y1@0_5%_2
RTC_RST#
R814 20K_1%_2 RTC_RST# RTC_X2 C443 18p/25V_2
1

J4 3 2
CLR_CMOS [86] Crystal 38.4MHz
C760 *JUMP
1u/10V_2 Q22 C761 10p/25V_2 XTAL_38P4M_IN_R R783 *Short_0201 XTAL_38P4M_IN
2

2N7002KTB
1

R389 *Short_0201 +3V_RTC_2 2


+3VPCU +3V_RTC SRTC_RST#
3 R820 20K_1%_2

2
1
R436 1K_1%_2 +3V_RTC_1 1
+BAT_RTC
1

SRTC_RST# Y3 R802
D008 BAT54CW J5 38.4MHZ/20ppm 200K_1%_2
C464 C764 *JUMP
3

1u/10V_2 1u/10V_2
2

4
3
A 2 A

C762 12p/25V_2 XTAL_38P4M_OUT_R R782 *Short_0201 XTAL_38P4M_OUT


RTC_DET# [6]
Q23 R846
1
3

*2N7002KTB 100K_1%_2
2
Q019 Quanta Computer Inc.
*2N7002K
R431 PROJECT : ZGN
1

*2M_1%_2
Size Document Number Rev
Custom ADL-P 11/14(CSI/CNVi/CLK) A1A

Date: Thursday, May 26, 2022 Sheet 11 of 150


5 4 3 2 1
5 4 3 2 1

U053G
ACZ_SDOUT [14]
PU/PD
12
LCDVCC_CTL_PCH EY34 ER56 BIT_CLK R792 33_1%_2
[44] LCDVCC_CTL_PCH GPP_D19/I2S_MCLK1_OUT 3.3V GPP_R0/HDA_BCLK/I2S0_SCLK/DMIC_CLK_B0/HDAPROC_BCLK EP60 ACZ_SYNC R386 33_1%_2
BIT_CLK_AUDIO [64]
ACZ_SYNC_AUDIO [64]
+3V
EV53 GPP_R1/HDA_SYNC/I2S0_SFRM/DMIC_CLK_B1 ER57 ACZ_SDOUT R492 33_1%_2 VCCST_OVERRIDE R743 *100K_1%_2
VGA_DDS [44] PWM_OUT_EN
[32] MUX_CTRL_PCH
EY53 GPP_S0/SNDW0_CLK/I2S1_SCLK Strap pin GPP_R2/HDA_SDO/I2S0_TXD/HDAPROC_SDO ER59 ACZ_SDOUT_AUDIO [64]
ACZ_SDIN0_AUDIO [64]
GPP_S1/SNDW0_DATA/I2S1_SFRM GPP_R3/HDA_SDI0/I2S0_RXD/HDAPROC_SDI R918 *0_5%_2 SmartCard_PWRSV# R362 *10K_1%_2
FA50 1.8V ER53 ACZ_RST# R363 33_1%_2
PCM_CLK [61]
DMIC [45] DMIC_CLK0_1V8
[45] DMIC_DATA0_1V8
FC50 GPP_S2/SNDW1_CLK/DMIC_CKL_A0/I2S1_TXD GPP_R4/HDA_RST#/I2S2_SCLK/DMIC_CLK_A0 ET53 ACZ_RST#_AUDIO [64]
Panel_OD_PCH [45]
SYS_RESET# R342 *10K_1%_2
GPP_S3/SNDW1_DATA/DMIC_DATA0/I2S1_RXD GPP_R5/HDA_SDI1/I2S2_SFRM/DMIC_DATA0 EB44
EV50 GPP_R6/I2S2_TXD/DMIC_CLK_A1 EB46 GPP_R7 BOARD_ID8 [15] +3V_DEEP_SUS
R917 *0_5%_2
[15] BOARD_ID1
EY50 GPP_S4/SNDW2_CLK/DMIC_CLK_B0 1.8V GPP_R7/I2S2_RXD/DMIC_DATA1 R968 *0_5%_2
PCM_IN [61]
[15] BOARD_ID2 GPP_S5/SNDW2_DATA/DMIC_CLK_B1 PCH_TBT_PERST# CCG6SF_OC_FAULT_SoC [73]
DV51 R793 10K_1%_2
EW48 3.3V GPP_A11/PMC_I2C_SDA DV47 R923 *Short_0201
[15] BOARD_ID3 EY48 GPP_S6/SNDW3_CLK/DMIC_CLK_A1 GPP_A13/PMC_I2C_SCL BT_OFF_PCH# [61] GPP_E8 R807 *10K_1%_2
[15] BOARD_ID4 GPP_S7/SNDW3_DATA/DMIC_DATA1 FA53 SNDW_RCOMP
SNDW_RCOMP_1 FC53 R813 200_1%_2 LAN_WAKE#_GPD2 R382 10K_1%_2
D D
SNDW_RCOMP_2
7 OF 22 PCIE_WAKE# R368 8.2K_1%_2
CPU_ADL_P_1744P BATLOW# R785 10K_1%_2
U053L ADP_PRES_OUT
R104 *100K_1%_2 VCCDSW_3P3 R772 100K_1%_2

SLP_SUS#_EC EN53 EM61 R959 *Short_0201 PD_I2C_INT# R391 10K_1%_2


[16,21,22,86,123] SLP_SUS#_EC SLP_SUS# GPD3/PWRBTN# DNBSWON# [86]
EM56 BATLOW#
PTP_PWR_EN# EG60 GPD0/BATLOW# EJ59 ADP_PRES_OUT CPU_C10_GATE# R350 *100K_1%_2
TouchPad [88] PTP_PWR_EN#
SUSC# EP56 GPD10/SLP_S5# GPD1/ACPRESENT AC_PRESENT_EC [86]
[16,21,22,86,114,146] SUSC# GPD5/SLP_S4# PD_I2C_INT#
SUSB# EM59 EA56 R344 100K_1%_2
[16,86,124] SUSB#
SLP_A# EM57 GPD4/SLP_S3# PD - ALERT GPP_B11/PMCALERT# ER46 CPU_C10_GATE#
PD_I2C_INT# [73]
SLP_WLAN#_R EJ57 GPD6/SLP_A# GPP_H18/PROC_C10_GATE# ET48 SmartCard_PWRSV# RSMRST#_R R931 100K_1%_2
GPD9/SLP_WLAN# 3.3V GPP_H3/SX_EXIT_HOLDOFF# SmartCard_PWRSV# [150]
AP_SLP_S0_L DW59 ET51 PCIE_WAKE# SYS_PWROK R103 100K_1%_2
[20,61,86] AP_SLP_S0_L SLP_LAN# GPP_B12/SLP_S0# WAKE# PCIE_WAKE# [96]
[150] SLP_LAN# EK53
SLP_LAN# EP58 LAN_WAKE#_GPD2 PCH_PWROK_R R393 100K_1%_2
R925 *Short_0201 RSMRST#_R EH53 GPD2/LAN_WAKE# EJ56 LAN_DIS#
[16] RSMRST#_PCH SYS_RESET# EK26 RSMRST# 3.3V GPD11/LANPHYPC PROCPWRGD R225 *10K_1%_2
PLTRST#_PCH DW57 SYS_RESET# EK60
GPP_B13/PLTRST# Strap pin GPD7 BOARD_ID14 [14,15]
R130 *0_5%_2 LCDVCC_CTL_PCH R971 100K_1%_2
PCH_DSWROK GPP_E8 WWAN_RF_DISABLE_ODL [150]
EE48 FA22 R131 *Short_0201
SYS_PWROK DSW_PWROK GPP_E8/SLP_DRAM# SLP_DRAM# [114,146] LAN_DIS#
EK23 R769 *30.1K_1%_4
PCH_PWROK_R EH51 SYS_PWROK DJ8 H_VCCST_PWRGD R236 60.4_1%_2 H_VCCST_PWRGD_R
[16] PCH_PWROK_R PCH_PWROK VCCST_PWRGD VCCST_OVERRIDE GPP_E8
DK4 VCCST_OVERRIDE [16] R1019 100K_1%_2
R926 1M_1%_2 INTRUDER# DY44 VCCST_OVERRIDE
+3V_RTC INTRUDER#
EL53 EH28 PCH_TBT_PERST# R954 100K_1%_2
[14] INPUT3VSEL SPIVCCIOSEL Strap pin 3.3V GPP_F20/EXT_PWR_GATE# EH31
MBID_VPRO_DET [15]
GC6FBEN_Q [32] ____GC63.0 Don't Need
PROCPWRGD BG11 GPP_F21/EXT_PWR_GATE2# R966 *Short_0201
PROCPWRGD MIPI_PWR_MS# [150]
12 OF 22
CPU_ADL_P_1744P +1.8V_DEEP_SUS

C GPP_R7 C
R467 *100K_1%_2
PLTRST# (Buffer) +3V_DEEP_SUS DSW_PWROK
C462 0.1u/6.3V_2

R930 *0_5%_2 RSMRST#_R Glitch Free


5

U022
PLTRST#_PCH 1
4 PCH_DSWROK R398 *0_5%_2 +3V_DEEP_SUS
PLTRST# [20,25,53,55,61,68,96] [16] PCH_DSWROK DPWROK_EC [16,86]
2
R956 AP_SLP_S0_L R752 100K_1%_2
*100K_1%_2 *MC74VHC1G08DFT2G R839 R396
3

100K_1%_2 100K_1%_2 R399 C477 R753 *100K_1%_2


*1M_1%_2 *0.01u/10V_2
ACZ_RST# R352 100K_1%_2
R338 *Short_0201
SLP_SUS#_EC R369 100K_1%_2

PTP_PWR_EN# R970 100K_1%_2

SUSC# R015 100K_1%_2


BBR Reset SYS_PWROK
SUSB# R805 100K_1%_2
+3V_DEEP_SUS
SLP_A# R005 100K_1%_2

SYS_PWROK EC_SYS_PWROK [86] SLP_WLAN#_R R975 100K_1%_2

C775 SLP_LAN# R031 100K_1%_2


0.1u/6.3V_2
5

U56 R927 BIT_CLK R778 *100K_1%_2


PCH_TBT_PERST# 1 *10K_1%_2
4 C529 22p/25V_2
PLTRST#_PCH TCP_RETIMER_PERST# [74]
2
B
PCH_PWROK R929 *Short_0201
B

*MC74VHC1G08DFT2G R847
3

*100K_1%_2

R838 *0_5%_2
PCH_PWROK_R R392 *0_5%_2
PCH_PWROK [16,86] LAN WAKE
S3
PCIE_WAKE# R1016 *Short_0201

S0ix-D3 Cold
VCCST_PWRGD LAN_WAKE#_GPD2 R1015 *0_5%_2 LAN_WAKE# [68]
+3V_DEEP_SUS
VRON_IMVP9
+3V_DEEP_SUS +VCC1P05_PROC C780 *0.1u/6.3V_2
VRON_IMVP9 R100 *0_5%_2

5
R865 *0_5%_4 1
[16,86] HWPG
R866
R762 4
2
HWPG_VDDR [86,114]
WoWLAN
1K_1%_2 DRAM_PWR_GOOD [21,22,86]
+3V_DEEP_SUS 47K_1%_2 R999 *0_5%_2
H_VCCST_PWRGD_R +3V_DEEP_SUS
For Dis. module only

3
C664 0.1u/6.3V_2 +3V_DEEP_SUS U61 *MC74VHC1G08DFT2G
5

C779 0.1u/6.3V_2
1 Q29A
3

4 Q29B R614
SUSB# 2 1 SUSB# 10K_1%_2
5 2 VRON_IMVP9 4
[141] VRON_IMVP9
U41 2 [61] SLP_WLAN_PWR#
VRON [86]
3

MC74VHC1G08DFT2G R394

3
100K_1%_2 PJX138K PJX138K
4

U60 MC74VHC1G08DFT2G 2 SLP_WLAN#_R


R997
A A
100K_1%_2
R109 *100_1%_2 D74 1 2 *RB500V-40 Q55

1
2N7002KTB

TP177
SLP_SUS#_EC
TP180
SUSB#
TP182
RSMRST#_R TP185
PCH_DSWROK
TP188
PROCPWRGD
TP247
CPU_C10_GATE#
Quanta Computer Inc.
SYS_PWROK H_VCCST_PWRGD
TP181
AP_SLP_S0_L
TP183
SYS_RESET# TP186
PCH_PWROK_R
TP189
VCCST_OVERRIDE
PROJECT : ZGN
PLTRST#_PCH TP187 TP190
SUSC# Size Document Number
TP179 TP184 Rev
Custom ADL-P 12/14(PM/HDA/SD3.0) A1A

Date: Thursday, May 26, 2022 Sheet 12 of 150


5 4 3 2 1
5 4 3 2 1

+VCCIN_AUX U053N
+VCCIN_AUX: 32A

C410

C414
47u/6.3V_6

47u/6.3V_6
C390

C378
22u/6.3V_6

22u/6.3V_6
C388

C383
10u/6.3V_4

10u/6.3V_4 C402 10u/6.3V_4


AL20
AL32
AN20
AN22
AN30
AN32
VCCIN_AUX_1
VCCIN_AUX_2
VCCIN_AUX_3
VCCIN_AUX_4
VCCIN_AUX_5
VCCPRIM_1P8_1
VCCPRIM_1P8_2
VCCPRIM_1P8_3
VCCPRIM_1P8_4
VCCPRIM_1P8_5
DW 20 1300mA
DW 22
DW 27
DW 30
DY21
DY23
C424

C420
*1u/10V_2

*1u/10V_2
+1.8V_DEEP_SUS

13
C253 47u/6.3V_6 C379 22u/6.3V_6 C315 10u/6.3V_4 C387 10u/6.3V_4 AN37 VCCIN_AUX_6 VCCPRIM_1P8_6 DY26
AP17 VCCIN_AUX_7 VCCPRIM_1P8_7 DY28
C409 47u/6.3V_6 C306 22u/6.3V_6 C297 10u/6.3V_4 C415 10u/6.3V_4 AP27 VCCIN_AUX_8 VCCPRIM_1P8_8 DY31
AP30 VCCIN_AUX_9 VCCPRIM_1P8_9 EB18
C395 22u/6.3V_6 C313 10u/6.3V_4 C305 10u/6.3V_4 AP32 VCCIN_AUX_10 VCCPRIM_1P8_12 EB21
AP37 VCCIN_AUX_11 VCCPRIM_1P8_13 EB23
D C394 22u/6.3V_6 C238 10u/6.3V_4 B3 VCCIN_AUX_12 VCCPRIM_1P8_14 EB28 D
D3 VCCIN_AUX_13 VCCPRIM_1P8_15 EC14
C296 22u/6.3V_6 C298 10u/6.3V_4 E1 VCCIN_AUX_14 VCCPRIM_1P8_16 EC16
F1 VCCIN_AUX_33 VCCPRIM_1P8_17 EC23
C294 22u/6.3V_6 C416 10u/6.3V_4 F3 VCCIN_AUX_36 VCCPRIM_1P8_18 EC26
G3 VCCIN_AUX_37 VCCPRIM_1P8_19 EE14
C417 22u/6.3V_6 C404 10u/6.3V_4 H4 VCCIN_AUX_38 VCCPRIM_1P8_20 EE28 R269 *1M_1%_2
J1 VCCIN_AUX_39 VCCPRIM_1P8_21 EG14
C389 22u/6.3V_6 C412 10u/6.3V_4 J3 VCCIN_AUX_40 VCCPRIM_1P8_22 FB33 C422 *0.1u/6.3V_2
L1 VCCIN_AUX_41 VCCPRIM_1P8_23
C393 22u/6.3V_6 C384 10u/6.3V_4 L3 VCCIN_AUX_42 DV41 202mA
VCCIN_AUX_43 VCCPRIM_3P3_1 +3V_DEEP_SUS
N3 DW 40
C396 22u/6.3V_6 VCCIN_AUX_44 VCCPRIM_3P3_2 EB33 C427 *1u/10V_2
DH45 VCCPRIM_3P3_3 EC31
DJ41 VCCIN_AUX_15 VCCPRIM_3P3_5 EC33 C423 *0.1u/6.3V_2
+VCCIN_AUX DJ44 VCCIN_AUX_16 VCCPRIM_3P3_6 EE31
DK40 VCCIN_AUX_17 VCCPRIM_3P3_7
DK43 VCCIN_AUX_18 FB45
C790 *15p/25V_2 Follow RVP DK45 VCCIN_AUX_19 RSVD_24
DL44 VCCIN_AUX_20 FB52 +VCCLDOSTD_OUT_0P85 C765 2.2u/10V_4
C791 *15p/25V_2 DM1 VCCIN_AUX_21 VCCLDOSTD_0P85
+VCCIN_AUX_FIL DM14 VCCIN_AUX_22 EJ14 165mA VCCA_CLKLDO_1V8 R831 *Short_0402
VCCIN_AUX_23 VCCA_CLKLDO_1P8_1 +1.8V_DEEP_SUS
C792 *15p/25V_2 DM43 EM14
DP41 VCCIN_AUX_24 VCCA_CLKLDO_1P8_2 R827 *Short_0402 C769 47u/6.3V_6
C793 *15p/25V_2 DP42 VCCIN_AUX_25 FB39
DR14 VCCIN_AUX_26 VCCDPHY_1P24 +VCCDPHY_1P24 C763 4.7u/6.3V_4
DR40 VCCIN_AUX_27 BN43
DT41 VCCIN_AUX_28 RSVD_TP_28 AY11 TP195
C748 C750
DU14 VCCIN_AUX_29 RSVD_TP_18 BP44 TP196
47u/6.3V_6 10u/6.3V_4 VCCIN_AUX_30 RSVD_TP_29 TP197
DU40 BL12
C DV2 VCCIN_AUX_31 RSVD_TP_27 CN43 TP198 C
ED2 VCCIN_AUX_32 RSVD_TP_34 BJ11 TP199
EL2 VCCIN_AUX_34 RSVD_TP_24 TP200
VCCIN_AUX_35 +VCC1.05_OUT_PCH
P1 EB36
VCCIN_AUX_FLTR VCCPRIM1P05_OUT_PCH_1 EC36 R384 *Short_0402
+1.05V_EXT +VNN_EXT VCCPRIM1P05_OUT_PCH_3 +VCCDSW_1P05 C455 +3V_RTC
AH30 EE41 1u/10V_2
[144] VSS_AUX_SENSE AF30 VSSINAUX_SENSE VCCDSW _1P05 V1 C466 1u/10V_2
[144] VCC_AUX_SENSE VCCINAUX_SENSE VCC_MIPILP EB38 TP201
R315 *100K_1%_2 EF21 VCCPRIM1P05_OUT_PCH_2 EE36 C467 0.1u/6.3V_2 VCCDSW_3P3
EH21 VCC_VNNEXT_1P05_1 VCCPRIM1P05_OUT_PCH_4
VCC_VNNEXT_1P05_2 EC38 202mA +VCCRTC C425 *1u/10V_2
R283 *100K_1%_2 EE18 VCCRTC EB42 4mA R978 *Short_0402
VCC_V1P05EXT_1P05_1 VCCPDSW _3P3 VCCPGPPR_3.3V_1.8V +3V_DEEP_SUS
EE21 EE33 5mA
VCC_V1P05EXT_1P05_2 VCCPGPPR R835 *0_5%_4
VRALERT# DT59
Audio EB41
+3V_S5
VNN_CTRL GPP_B2/VRALERT# VCCPRIM_3P3_4 +3V_DEEP_SUS
EK31 DY41
[124] VNN_CTRL V1P05_CTRL GPP_F22/VNN_CTRL VCCPRIM_1P8_10
EL28 DY42 C772 *1u/10V_2
[124] V1P05_CTRL GPP_F23/V1P05_CTRL VCCPRIM_1P8_11 +1.8V_DEEP_SUS
R757 *Short_0201 VCCAUX_VID0_R EA60 EU1
[16,144] VCCIN_AUX_VID0 VCCAUX_VID1_R GPP_B0/CORE_VID0 VCC1P05_PROC_1
R755 *Short_0201 EA58 EU4 R260 *Short_0201
[16,144] VCCIN_AUX_VID1 GPP_B1/CORE_VID1 VCC1P05_PROC_2 +VCC1P05_PROC +1.8V_DEEP_SUS

Use of VID gives power savings of 30mW in Sx and S0ix states. EV3 R271 *0_5%_2
VCC1P05_OUT_FET_1 +VCC1.05_OUT_FET +3V_DEEP_SUS
EW 1
VCC1P05_OUT_FET_2 EY1
+1.8V_DEEP_SUS VCC1P05_OUT_FET_3
AM15
CPU
DDI PHY VCC_DISPIO +VCC1.05_OUT
VCCAUX_VID0_R VCCAUX_VID0_R R756 100K_1%_2 BJ12
TP193 RSVD_TP_25 TP202
BK14 Connect CPU_C10_GATE# as EN for VCCMIPI_LP Switch if powered by
VCCAUX_VID1_R VCCAUX_VID1_R RSVD_TP_26 TP203
R754 100K_1%_2 BF14 1.24V. If MIPI DSI not used, please leave VCCMIPI_LP (Pin# V1) floating
B TP194 RSVD_TP_21 TP204 B
VNN_CTRL VNN_CTRL 14 OF 22 and connect VCC_DISPIO (Pin# AM15) with VCC1P05_PROC_OUT (Pin#
R935 100K_1%_2
TP191 AR14, AT12, AU14)
V1P05_CTRL V1P05_CTRL R936 100K_1%_2 CPU_ADL_P_1744P
TP192

Platform state VNN_CTRL VNNEXT_1P05 Platform state VNN_CTRL V1P05EXT_1P05 PCH Throttling
+VCC1P05_PROC +3V_DEEP_SUS
S0 0 0.78 S0 0 1.05 +3V_S5 +3V_DEEP_SUS

S0I2.X 0 0.78 S0I2.X,S0i3.0-1 0 1.05 +VCC1P05_PROC +3V_DEEP_SUS


R748 R825 *Short_0805
SOi3.X 1 0.7 SOi3.2-4 1 0.96 *100K_1%_2
2

SX 0 1.05 SX 0 1.05
Q56 1 3 *PJE8406 VRALERT#
[4,73,86,112,141] H_PROCHOT#

SLP_SUS# VID1 VID0 SLP_S0# VCCIN_AUX Comments D76 1 2 *RB500V-40


+1.8V_S5 +1.8V_DEEP_SUS

0 X X X OFF FIVR input is OFF R967 *0_5%_2


[73] CCG6_PCH_PROCHOT#
R850 *Short_0805
A
1 0 0 0 0 S0ix +VCC1P05_PROC A

Retention FIVR voltage, no


1 0 1 1 1.1 VCCIN_AUX FIVRs active in CPU
+3VPCU
Quanta Computer Inc.
2

1 1 0 1 1.65 Low current mode


Q57 *PJE8406
3 1
1 1 1 1 1.8 High current mode
[112] BC_PCH_THROTTING#
PROJECT : ZGN
D75 1 2 *RB500V-40
Size Document Number Rev
Leakage from VCCIN_AUX is expected behavior when CORE_VID[1:0]=00; this Custom ADL_P 13/14(PCH POWER) A1A
leakage voltage may be as high as 1.15 V during Sx and S0ix states. Date: Thursday, May 26, 2022 Sheet 13 of 150
5 4 3 2 1
5 4 3 2 1

TOP SWAP OVERRIDE M.2 CNVi Mode Select TBT LSX PINS VCCIO CONFIGURATION
High: TOP SWAP ENABLED
Low: DISABLED
WEAK INTERNAL PD 20K
+3V_DEEP_SUS
RSVD VCCDSW_3P3

R774
High: Integrated CNVi disabled
Low: Integrated CNVi enabled
An external pull-up or
pull-down is required
+1.8V_DEEP_SUS
High: 3.3V
Low: 1.8V
NO INTERNAL PU/PD
GPP_E19
+3V_DEEP_SUS

GPP_E21
+3V_DEEP_SUS
14
*4.7K_1%_2 Enable by device driven low R340
R759 100K_1%_2
*4.7K_1%_2 [12,15] BOARD_ID14 R346 R324
*4.7K_1%_2 *4.7K_1%_2
[4,64,86] ACZ_SPKR [11,61] CNV_RGI_DT
D GPD7 R773
[2,74] TBT_LSX0_RXD [2] TBT_LSX1_RXD D
*20K_1%_2 GPP_F2 TCP Intel B.B/1.8V no use
GPP_B14/SPKR R761 iPD R334
*20K_1%_2 *4.7K_1%_2 R333 R319
iPD *20K_1%_2 *20K_1%_2
iPD iPD

TLS CONFIDENTIALITY XTAL FREQUENCE SEL NO REBOOT +3V_DEEP_SUS +3V_DEEP_SUS


HIGH - TLS CONFIDENTIALITY ENABLE +3V_DEEP_SUS GPP_D10 GPP_D12
LOW - TLS CONFIDENTIALITY DISABLE High: 24MHZ HIGH - NO REBOOT
WEAK INTERNAL PD 20K +3V_DEEP_SUS (25 MHZ WHEN XTAL FREQ DIVIDER NON ZERO)
Low: 38.4MHZ (DEFAULT) +1.8V_DEEP_SUS LOW- REBOOT ENABLED R809 R797
WEAK INTERNAL PD 20K WEAK INTERNAL PD 20K *4.7K_1%_2 *4.7K_1%_2
R347 R1021
*VPRO@4.7K_1%_2 SAMPLING- PCH_PWROK *4.7K_1%_2 [2] TBT_LSX2_RXD [2] TBT_LSX3_RXD
R262
*4.7K_1%_2 [8,97] PEN_GPIO0 no use no use
[9] GPP_C2_SMBALERT#
R808 R800
[11,61] CNV_BRI_DT
*20K_1%_2 *20K_1%_2
GPP_B18 R750 iPD iPD
GPP_C2/SMBALERT# R354 R265 *20K_1%_2
*20K_1%_2 GPP_F0 *20K_1%_2 iPD
iPD iPD
C C

(RSVD) ITP PMODE (RSVD) CONSENT STRAP (RSVD) A0 PERSONALITY STRAP JTAG ODT Disable CPUNSSC CLOCK FREQ HVM ONLY
High: DFXTESTMODE DISABLED(DEFAULT) +3V_DEEP_SUS +3V_DEEP_SUS +1.8V_DEEP_SUS +3V_DEEP_SUS High: 19.2MHz CLOCK FROM INTERNAL DIVIDER
Low: DFXTESTMODE ENABLED +VCC1.05_OUT_FET PU is required PU is required PU is required Low: 38.4MHz CLOCK FROM DIRECT CRYSTAL (Default)
WEAK INTERNAL PU 20K WEAK INTERNAL PD 20K +3V_DEEP_SUS

R985 R358 R988


R357 R984 100K_1%_2 *20K_1%_2 20K_1%_2
GPP_B23/SML1ALERT#
1K_1%_2 100K_1%_2
ipu R289
[9,19] PCH_SPI_IO2 [9,19] PCH_SPI_IO3 [9] GPP_E6 *4.7K_1%_2
[4] DBG_PMODE TP068
[9,97] PEN_GPIO1
R986 R987
ITP_PMODE R337 *4.7K_1%_2 *4.7K_1%_2
*1K_1%_2 R292
*20K_1%_2

Flash Descriptor Security Override 3V SELECT STRAP (RSVD) BOOT HALT


High: DISABLE GPP_R2 +3V_DEEP_SUS Reserve Reserve
Low: ENABLE 0 = SPI voltage is 3.3V (4.7K ohm pull-down to GND) High: DISABLE
B +1.8V_DEEP_SUS +3V_DEEP_SUS 1 = SPI voltage is 1.8V (4.7K ohm pull-up to DSW_PWROK) Low: ENABLE B
WEAK INTERNAL PD 20K
External pull-up is required.
VCCDSW_3P3 R294
4.7K_1%_2

R327 R502
4.7K_1%_2 *4.7K_1%_2 [9,19] PCH_SPI1_SI R301 *Short_0201 GPP_F7 GPP_F10
R823
EC- Hi Disable the Override *4.7K_1%_2
SPI0_MOSI
3

R299
2 Q016 R819 4.7K_1%_2 *4.7K_1%_2
[86] ME_WR# [12] INPUT3VSEL
PJA138K

PCH
1

iPD
[12] ACZ_SDOUT

Boot Strap 0/1/2/3


Boot Strap 0 GPP_C5 Boot Strap 1 GPP_H0 Boot Strap 2 GPP_H1 Boot Strap 3 GPP_H2
Table +3V_DEEP_SUS Table +3V_DEEP_SUS Table +3V_DEEP_SUS Table +3V_DEEP_SUS
Boot Strap 4-bit boot strap configuration encodings

A
0000 BIOS/CSME on SPI , eSPI is enabled A
R979 R300 R303 R980
*4.7K_1%_2 *4.7K_1%_2 *4.7K_1%_2 *4.7K_1%_2
0010 BIOS/CSME on SPI , eSPI is disabled
[9] NFC_DWL_REQ_PCH [4] MIPICCD_SHUTDOWN [4] MIPICCD_LED [4,61] PCH_WLAN_RST#

0100 BIOS on eSPI Peripheral Channel; CSME on master SPI Quanta Computer Inc.
R981 R297 R982 R983
iPD *20K_1%_2 iPD *20K_1%_2 iPD *20K_1%_2 iPD *20K_1%_2 1000 BIOS/CSME on eSPI PROJECT : ZGN
Size Document Number Rev
1100 BIOS on eSPI peripheral Channel; CSME on slave SPI Custom ADL-P 9/14 (HW STRAP) A1A

Date: Thursday, May 26, 2022 Sheet 14 of 150


5 4 3 2 1
5 4 3 2 1

MBID Option Value to meet project requirement

[12] BOARD_ID1
TPM +1.8V_MBID
RAM_INTERLEAVED
15 +1.8V_MBID

Low High [9] RAM_INTERLEAVED


ID.NO Function
R795 TPM_N@100K_1%_2 R803 TPM@100K_1%_2 Function Low High R899 100K_1%_2 R900 *100K_1%_2

0=No 1=Yes [12] BOARD_ID2


SmartCard
BOARD_ID1 TPM TPM_N@ TPM@ 0=No 1=Yes [11] RAM_TYPE0
RAM_TYPE0
RAM_INTERLEAVED
R794 100K_1%_2 R801 *100K_1%_2 R901 100K_1%_2 R902 *100K_1%_2

BOARD_ID2 SmartCard 0=No 1=Yes 5G/LTE RAM_TYPE1 / RAM_TYPE0


SM_N@ SM@ [12] BOARD_ID3 00 / 01 / 10 /11
D RAM_TYPE0 [11] RAM_TYPE1
RAM_TYPE1 D

R804 100K_1%_2 R791 *100K_1%_2


00=DDR4, 01=LPDDR4 R903 *100K_1%_2 R904 100K_1%_2
BOARD_ID3 5G/LTE 0=No 1=Yes
5G_LTE_N@ 5G_LTE@ 10=DDR5, 11=LPDDR5
[12] BOARD_ID4
HDD RAM_TYPE1
[9] RAM_ONBOARD_A
RAM_ONBOARD_A
BOARD_ID4 HDD 0=No 1=Yes R867 100K_1%_2 R868 *100K_1%_2 R905 100K_1%_2 R906 *100K_1%_2
HDD_N@ HDD@ XX@ XX@ 0=No 1=Yes
RAM_ONBOARD_A
[11] BOARD_ID5
FingerPrint +3V_MBID
FingerPrint 0=No 1=Yes [9] RAM_ONBOARD_B
RAM_ONBOARD_B
BOARD_ID5 FP_N@ FP@ 0=No 1=Yes
R869 *100K_1%_2 R870 FP@100K_1%_2 XX@ XX@ RAM_ONBOARD_B R907 100K_1%_2 R908 *100K_1%_2

BOARD_ID6 0=No 1=Yes Touch Screen +3V_MBID


Touch Screen Cable/DB [11] BOARD_ID6 [11] RAM_ID0
RAM_ID0
XX@ XX@ RAM_ID0
R871 TSN_N@100K_1%_2 R872 TSN@100K_1%_2 R909 *100K_1%_2 R910 *100K_1%_2
BOARD_ID7 CCD 0=MIPI 1=USB
Cable/DB XX@ Project list Config
[11] BOARD_ID7
CCD R953 *Short_0201 XX@ RAM_ID1 [9] RAM_ID1
RAM_ID1
MIPICCD_DET# [150]

0=AES 1=EMR R873 *100K_1%_2 R874 100K_1%_2 R911 *100K_1%_2 R912 *100K_1%_2
BOARD_ID8 PEN Type AES@ EMR@ XX@ XX@ RAM_ID2
[12] BOARD_ID8
PEN Socket define low for all pin [9] RAM_ID2
RAM_ID2
0=ON/OFF 1=RGB
BOARD_ID9 KB backlight KBL_ONOFF_NUSB@ KBL_RGB_NUSB@ R875 *100K_1%_2 R876 *100K_1%_2 +1.8V_MBID R913 *100K_1%_2 R914 *100K_1%_2
XX@ XX@ RAM_ID3
0=No 1=Yes KB backlight RAM_ID3
BOARD_ID10 HapticTouchPAD Hap-TP_N@ Hap-TP@
[4] BOARD_ID9 [9] RAM_ID3
R877 KBL_1Z@100K_1%_2 R878 KBL_3Z@100K_1%_2 R915 *100K_1%_2 R916 *100K_1%_2

BOARD_ID11 NV DDS 0=No 1=Yes HapticTouchPAD


DDS_N@ DDS@ [11] BOARD_ID10
C R879 100K_1%_2 R880 *100K_1%_2 C

BOARD_ID12 KB Type 0=Non-USB IF 1=USB IF


USBKB_N@ USBKB@
[2] BOARD_ID11
NV DDS

BOARD_ID13 0=No 1=Yes R246 N_DDS@100K_1%_2 R247 DDS@100K_1%_2


CPU Type i5@ i7@

[11] BOARD_ID12
KB Type
BOARD_ID14 0=No (default) 1=Yes
GPU_ID0 E6_P1@ E3@ R267 KB@100K_1%_2 R279 UKB@100K_1%_2

BOARD_ID15 0=No (default) 1=Yes [2] BOARD_ID13


GPU_ID1 E6_E3@ P1@
R266 i5@100K_1%_2 R268 i7@100K_1%_2

BOARD_ID16 0=No 1=Yes (default)


14"/16" 14"(ZGF) 16"(ZGN) [12,14] BOARD_ID14
Reserve
R960 E6_P1@100K_1%_2 R961 E3@100K_1%_2 VCCDSW_3P3

[8] BOARD_ID15
Reserve
R962 E6_E3@100K_1%_2 R963 P1@100K_1%_2

[8] BOARD_ID16
Reserve
R964 *100K_1%_2 R965 100K_1%_2

+3V_MBID R993 *0_5%_4 +3V_DEEP_SUS


R994 *Short_0402 +3V
B B

+1.8V_MBID R995 *0_5%_4 +1.8V_DEEP_SUS


+3V R996 *Short_0402 +1.8V
R349 *IV@10K_1%_2

[9] MBID_DGPU_PRSNT# R360 EV@10K_1%_2

DGPU_PRSNT#
0= DIS EV@
1=UMA IV@

+3V_MBID

R252 *VPRO@10K_1%_2

[12] MBID_VPRO_DET R240 10K_1%_2

A A
VPRO_DET#
1= SUPPORT VPRO@
0=NO SUPPROT VPRO_N@

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C ADL-P 14/14 (BLANK) A1A

Date: Thursday, May 26, 2022 Sheet 15 of 150


5 4 3 2 1
5 4 3 2 1

VCC1P05 EN
+3V_S5 +3V_S5
16
R859 R860
100K_1%_2 100K_1%_2

+3V_S5
R851 *Short_0201
[5] VCCST_PWRGD_TCSS

3
Q27B +3V_DEEP_SUS
D +3V_DEEP_SUS D
R852 *Short_0201 2 SSM6N43FU Q27A
[12] VCCST_OVERRIDE
5 SSM6N43FU
C781 0.1u/6.3V_2
C782 0.1u/6.3V_2
1.05V
VCC1P05 EN

5
R857

5
100K_1%_2 3V3_VCCST_OVERRIDE 2
4 PM_SLP_VCCST_OVRD_R R855 *Short_0201 VCCIN_AUX_MIPI60_OVRD_R 2
PM_SLP_S3_S4_VCCST_N 1 4 VCC1P05_EN_R R856 *Short_0201
VCCIN_AUX_VCC1P05_PRSNT_3P3V 1 VCC1P05_EN_LS_R [123]
U62
74AUP1G32SE-7 U63

3
74AUP1G32SE-7

3
[12,16,21,22,86,123] SLP_SUS#_EC R991 *0_5%_2 R861
100K_1%_2
[12,21,22,86,114,146] SUSC# R990 *0_5%_2

[12,16,86,124] SUSB# R989 *Short_0201


+3V_S5 +3V_S5

+3V_DEEP_SUS R992 *0_5%_2 R863 R862


100K_1%_2 100K_1%_2
+1.8V_DEEP_SUS R853 *Short_0201 C776 0.1u/6.3V_2

don't change to short pad

3
5

6
Q28A
2 5 SSM6N43FU
[13,144] VCCIN_AUX_VID1 VCCIN_AUX_VALID
4 R854 *Short_0201 2
1
[13,144] VCCIN_AUX_VID0
U59 Q28B
+3V_S5

4
74AUP1G32SE-7 R864

1
100K_1%_2 SSM6N43FU
+1.8V_DEEP_SUS +1.8V_DEEP_SUS
C C

+VCC1P8_PROC EN +1.8V_DEEP_SUS
VCCIN_AUX_VALID

R858
10K_1%_2
AP2121AK-1.8TRG1 (1.5V Hi)
D73 1 2 RB500V-40
[12,16,86,124] SUSB# VCC1P8_CPU_EN [123]

Surprise Power Down


VCCST(+VCC1P05_PROC) - HWPG
(EC must take RSMRST# low with DPWROK_EC too)
B B
3V_LDO

3V_LDO
5 U65
1
[8,86] RSMRST# 3V_LDO
4

5
[12,16,21,22,86,123] SLP_SUS#_EC 2 U68
1
[12,86] PCH_PWROK
MC74VHC1G08DFT2G 4 PCH_PWROK_R [12]
3

5
U66 VIN_SENSE 2
1
R1092 4 RSMRST#_PCH [12] MC74VHC1G08DFT2G

3
1K_1%_2 VIN_SENSE 2

MC74VHC1G08DFT2G

3
+3V_S5

PCH_DSWROK R1086 *Short_0201 1 2


+3V_S5
D83 RB500V-40
R459
*10K_1%_2
+VCC1P05_PROC
R400
Vbatt min. 12V +VIN R1093 *1M_1%_4
100K_1%_2 HWPG Trigger: 10V 3V_LDO
HWPG [12,86]

5
3V_LDO 3V_LDO
3

R402 3.2V min. U67


15K_1%_2 +1.05V_PWRGD_G2 2 1
[12,86] DPWROK_EC PCH_DSWROK
R472 R1090 R1032 4
VIN_SENSE PCH_DSWROK [12]
100K_1%_2 24.9K_1%_2 *24.9K_1%_4 2
3

+1.05V_PWRGD_G1 2 Q42 Q45 MC74VHC1G08DFT2G

3
A METR3904-G 2N7002K R1026 R1089 A
R1091 R1030 *1M_1%_4 1M_1%_2
1

R1020 499K_1%_2 *499K_1%_4 R1031


C789 100K_1%_2 100K_1%_2
8

0.1u/6.3V_2
Trigger:1.6V 3
+ 1 VIN_SENSE
2
-
U69A
Quanta Computer Inc.
4

R1087 R1028 AS393MTR-G1 5


*100K_1%_4 R1027 R1088 + 7
100K_1%_2
*1M_1%_4 1M_1%_2 6
-
PROJECT : ZGN
U69B
AS393MTR-G1 Size Document Number Rev
C VCCST/VCCSTG POWER SWITHC A1A

Date: Thursday, May 26, 2022 Sheet 16 of 150


5 4 3 2 1
5 4 3 2 1

17
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 17 of 150


5 4 3 2 1
5 4 3 2 1

18
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 18 of 150


5 4 3 2 1
5 4 3 2 1

19
D RB1 *Short_0201 PCH_SPI1_SO_R RB2 15_1%_2 SPI1_SO_R D
[9] PCH_SPI1_SO
RB3 *Short_0201 PCH_SPI1_SI_R RB4 15_1%_2 SPI1_SI_R
[9,14] PCH_SPI1_SI
RB5 *Short_0201 PCH_SPI_IO3_R RB6 49.9_1%_2 SPI_IO3_R
PCH [9,14]
[9,14]
PCH_SPI_IO3
PCH_SPI_IO2 RB7
RB9
*Short_0201
*Short_0201
PCH_SPI_IO2_R
PCH_SPI_CS0#_R
RB8
RB10
49.9_1%_2
*Short_0201
SPI_IO2_R
SPI_CS0#_R
ROM
[9] PCH_SPI_CS0#
RB11 *Short_0201 PCH_SPI1_CLK_R RB12 15_1%_2 SPI1_CLK_R
[9] PCH_SPI1_CLK

RB13 100_1%_2
PCH_SPI_CLK_EC [86]
[20] TPM_SPI1_CLK RB14 TPM@15_1%_2 RB15 *Short_0201
PCH_SPI_CS0#_EC [86]
RB16 TPM@15_1%_2 RB17 100_1%_2
TPM [20] TPM_SPI1_SI
[20] TPM_SPI1_SO RB18 TPM@15_1%_2 RB19 100_1%_2
PCH_SPI_SI_EC [86]
PCH_SPI_SO_EC [86] EC

C C
For Glitch Free

PCH_SPI1_CLK RB20 100K_1%_2

+3VSPI +3VSPI

CNB1
UB1 RB21 *Short_0402 8 5 SPI1_SI_R
+3V_S5 VCC DI(IO0)
BIOS_32M SPI_IO2_R 3 2 SPI1_SO_R
SPI1_SI_R 5 8 +3VSPI RB22 *0.01_1%_4 SPI_IO3_R 7 WP(IO2) DO(IO1) 1 SPI_CS0#_R
DI(IO0) VCC +3V_DEEP_SUS HOLD(IO3) CS
SPI1_SO_R 2 3 SPI_IO2_R 4 6 SPI1_CLK_R
SPI_CS0#_R 1 DO(IO1) WP(IO2) 7 SPI_IO3_R GND CLK
SPI1_CLK_R 6 CS HOLD(IO3) 4 *BIOS-SO8-Socket
CLK GND 9
TPAD CB1
0.1u/6.3V_2 BIOS Socket (SIOC)
BIOS ROM (WSON) DG008000011 for SOIC8 (16M)
B CB2 B
22p/25V_2

CN16 +3VSPI CNB2


*50950-0084N-001 SPI_CS0#_R 1 8 +3VSPI
SPI1_SI_R 5 8 CS VCC
SPI1_SO_R 2 5 8 3 SPI_IO2_R SPI1_SO_R 2 7 SPI_IO3_R
SPI_CS0#_R 1 2 3 7 SPI_IO3_R IO1/DO IO3/HOLD
SPI1_CLK_R 6 1 7 4 SPI_IO2_R 3 6 SPI1_CLK_R
nc#2

nc#1

6 4 IO2/WP CLK
5 SPI1_SI_R
4 IO0/DI

H1

H2
10

GND
*BIOS-WSON-Socket
BIOS Socket (WSON)

10
DFHS08FS060 for WSON 8x6 (32M)
BIOS Socket (WSON)
DFHS08FS046 for WSON 6x5 (16M)

Vender Size P/N WSON8


A A
Winbond 32M AKE3JF-KN01 W25Q256JVEIN
MAX 32M AKE3JZ-KZ01 MX25L25673GZ4I-08G
Quanta Computer Inc.
Winbond 16M AKE3DF-KN01 W25Q128JVSIQ(SOIC) PROJECT : ZGN
Size Document Number Rev
B BIOSROM A1A

Date: Thursday, May 26, 2022 Sheet 19 of 150


5 4 3 2 1
5 4 3 2 1

20
TPM_VDD
TPM NPCT750 TPM_VDD
10mil
+3V_S5 RK11 TPM@2.2_5%_6

RE
RK20 TPM_XXX@0_5%_4 CK1 CK2 CK3 CK4 CK5
TPM@10u/6.3V_4 TPM@0.1u/6.3V_2 TPM@0.1u/6.3V_2 TPM@0.1u/6.3V_2 TPM@0.1u/6.3V_2

1 3
RD
RK21 TPM_XXX@0_5%_4 TPM_VDD QK2
CK6 *DMP2130L-7

2
PN

22
*0.1u/6.3V_2

1
UK1 TPM_XXX@NPCT750_SLB9670_ST33TPH
RF

VHIO#2
VHIO#1

VSB
D D
RK2 *TPM@0_5%_4 RC CK7 *1000p/25V_2
[12,61,86] AP_SLP_S0_L 30 2 [9] TPM_PWR_EN#
RK17 TPM_XXX@0_5%_4
29 SCL/GPIO1 NC#1 3
RK6 TPM@0_5%_2 TPM_PIRQ#_C 18 SDA/GPIO0 NC#2 5
[9] TPM_PIRQ# PIRQ/GPIO2 NC#3 PP_2
7
NC#4 9 TPK2
RK7 TPM@0_5%_2 19 NC#5 10
[19] TPM_SPI1_CLK SCLK NC#6
RK8 TPM@0_5%_2 21 11
[19] TPM_SPI1_SI TPM_MISO 24 MOSI/GPIO7 NC#7 12
RK9 TPM@0_5%_2 RB
[19] TPM_SPI1_SO TPM_SCS# MISO NC#8
RK10 TPM@0_5%_2 20 14 RK18 TPM_XXX@0_5%_4 TPM_VDD
[9] SPI_TPM_CS# SCS/GPIO5 NC#9 15
NC#11 25
6 NC#12 26
13 GPIO3 NC#13 27
TPK1 PP 4 GPIO4 NC#14 28
PP/GPIO6 NC#15 31
NC#16 32 RF PN
TPM RA RB RC RD RE

GND#2
GND#1
NC#17 TPM_VDD

EPAD
[12,25,53,55,61,68,96] PLTRST# 17
PLTRST
NPCT750AADYX Stuff NC NC Stuff Stuff Reserve ------------------
RK3 1 2 TPM@10K_1%_2 TPM_MISO

33
23
16
NOTE: ST33TPHF20SPI NC NC Stuff NC NC NC ------------------ RK4 1 2 TPM@10K_1%_2 TPM_SCS#
- Place 0.1 uF capacitors as close as possible to the device power pins. RK5 1 2 TPM@10K_1%_2 TPM_PIRQ#_C
- VHIO can be either +3.3V or +1.8V. RA SLB9670/SLB9672 Stuff Stuff Stuff Stuff Stuff NC ------------------
- It is recommended to connect VHIO to V_RUN. RK19
TPM_XXX@0_5%_4
- VALW can be either +3.3V or +1.8V.
- VALW power rail should be powered whenever the system is powered
by any power source.
- For details regarding the TPM power sequence, see the NPCT75x
Datasheet and Board Design Guidelines.
C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C TPM & HOLE A1A

Date: Monday, March 21, 2022 Sheet 20 of 150


5 4 3 2 1
5 4 3 2 1

DDR5 SODIMM (Reverse) 21


To DDR5 PMIC
JM1001A +5V_DDR
JM1001B
92 102 JM1001C RM1017 *Short_0402
[3] M_1_DQ_0_3 DQ31_A DQS4_A_P CHA_DIMM0_SA +5V_DDR SUSON [22,86,113,114,123,144,146]
91 100 260 171 2 1
[3] M_1_DQ_0_0 88 DQ30_A DQS4_A_N 83 [3] M_0_DQ_2_3 259 DQ31_B DQS4_B_P 169 PCH_SMBCLK_1V8 4 HSA VIN_BULK_1 3 RM1001 *0_5%_4 SLP_SUS#_EC [12,16,22,86,123]
D [3] M_1_DQ_0_1 87 DQ29_A DQS3_A_P 81 M_1_DQSP0 [3] [3] M_0_DQ_2_0 256 DQ30_B DQS4_B_N 251 [22] PCH_SMBCLK_1V8 PCH_SMBDATA_1V8 6 HSCL VIN_BULK_3 D
0 [3] M_1_DQ_0_2 80 DQ28_A B3
DQS3_A_N 64 M_1_DQSN0 [3] [3] M_0_DQ_2_2 255 DQ29_B DQS3_B_P 249 M_0_DQSP2 [3] [22] PCH_SMBDATA_1V8 HSDA 8 DRAM0_PWR_EN RM1002 *0_5%_4
[3] M_1_DQ_0_5 77 DQ27_A DQS2_A_P 62 M_1_DQSP1 [3] 2 [3] M_0_DQ_2_1 248 DQ28_B B3DQS3_B_N 232 M_0_DQSN2 [3] PWR_EN 7 DRAM0_PWR_GOOD RM1024 *Short_0402
SUSC# [12,16,22,86,114,146]
DRAM_PWR_GOOD [12,22,86]
[3] M_1_DQ_0_4 76 DQ26_A DQS2_A_N 41 M_1_DQSN1 [3] [3] M_0_DQ_2_4 245 DQ27_B DQS2_B_P 230 M_0_DQSP3 [3] PWR_GOOD
[3] M_1_DQ_0_7 73 DQ25_A DQS1_A_P 39 M_1_DQSP2 [3] [3] M_0_DQ_2_5 244 DQ26_B DQS2_B_N 209 M_0_DQSN3 [3] 163 263
[3] M_1_DQ_0_6 DQ24_A DQS1_A_N M_1_DQSN2 [3] [3] M_0_DQ_2_6 DQ25_B DQS1_B_P M_0_DQSP0 [3] [3,22] DDR_DRAMRST# RESET_N MP1
72 22 241 207 CM1001 *0.1u/6.3V_2 264
[3] M_1_DQ_1_0 69 DQ23_A DQS0_A_P 20 M_1_DQSP3 [3] [3] M_0_DQ_2_7 240 DQ24_B DQS1_B_N 190 M_0_DQSN0 [3] 5 MP2
[3] M_1_DQ_1_1 68 DQ22_A DQS0_A_N M_1_DQSN3 [3] [3] M_0_DQ_3_3 237 DQ23_B DQS0_B_P 188 M_0_DQSP1 [3] 128 RFU_5 265
[3] M_1_DQ_1_3 65 DQ21_A 108 DDR0_ALERT_N_R [3] M_0_DQ_3_2 236 DQ22_B DQS0_B_N M_0_DQSN1 [3] Place this cap within 200mil 143 RFU_128 NC_1 266
1 [3] M_1_DQ_1_2 58 DQ20_A B2ALERT_N [3] M_0_DQ_3_0 233 DQ21_B B2 144 M_0_A12 M_0_A[12:0] [3] from SODIMM RFU_143 NC_2
[3] M_1_DQ_1_5 57 DQ19_A 127 M_1_A12 M_1_A[12:0] [3] 3 [3] M_0_DQ_3_1 226 DQ20_B CA12_B 145 M_0_A11 9 136 +3V
[3] M_1_DQ_1_6 54 DQ18_A CA12_A 126 M_1_A11 [3] M_0_DQ_3_5 225 DQ19_B CA11_B 146 M_0_A10 10 VSS_9 VSS_136 141
[3] M_1_DQ_1_7 53 DQ17_A CA11_A 125 M_1_A10 [3] M_0_DQ_3_7 222 DQ18_B CA10_B 149 M_0_A9 13 VSS_10 VSS_141 142 DRAM_PWR_GOOD RM1003 *100K_1%_2
[3] M_1_DQ_1_4 50 DQ16_A CA10_A 122 M_1_A9 [3] M_0_DQ_3_4 221 DQ17_B CA9_B 150 M_0_A8 14 VSS_13 VSS_142 147
[3] M_1_DQ_2_0 49 DQ15_A CA9_A 121 M_1_A8 [3] M_0_DQ_3_6 218 DQ16_B CA8_B 151 M_0_A7 17 VSS_14 VSS_147 148
[3] M_1_DQ_2_2 46 DQ14_A CA8_A 120 M_1_A7 [3] M_0_DQ_0_3 217 DQ15_B CA7_B 152 M_0_A6 18 VSS_17 VSS_148 153
[3] M_1_DQ_2_3 45 DQ13_A CA7_A 119 M_1_A6 [3] M_0_DQ_0_0 214 DQ14_B CA6_B 155 M_0_A5 21 VSS_18 VSS_153 154
2 [3] M_1_DQ_2_1 38 DQ12_A B1 CA6_A 116 M_1_A5 [3] M_0_DQ_0_1 213 DQ13_B B1 CA5_B 156 M_0_A4 24 VSS_21 VSS_154 159
[3] M_1_DQ_2_4 35 DQ11_A CA5_A 115 M_1_A4 0 [3] M_0_DQ_0_2 206 DQ12_B CA4_B 157 M_0_A3 25 VSS_24 VSS_159 160
[3] M_1_DQ_2_5 34 DQ10_A CA4_A 114 M_1_A3 [3] M_0_DQ_0_4 203 DQ11_B CA3_B 158 M_0_A2 28 VSS_25 VSS_160 166
[3] M_1_DQ_2_6 31 DQ09_A CA3_A 113 M_1_A2 [3] M_0_DQ_0_5 202 DQ10_B CA2_B 162 M_0_A1 29 VSS_28 VSS_166 167
[3] M_1_DQ_2_7 30 DQ8_A CA2_A 109 M_1_A1 [3] M_0_DQ_0_6 199 DQ9_B CA1_B 164 M_0_A0 32 VSS_29 VSS_167 170
[3] M_1_DQ_3_1 27 DQ7_A CA1_A 107 M_1_A0 [3] M_0_DQ_0_7 198 DQ8_B CA0_B 33 VSS_32 VSS_170 173
[3] M_1_DQ_3_2 26 DQ6_A CA0_A [3] M_0_DQ_1_2 195 DQ7_B 175 36 VSS_33 VSS_173 174
[3] M_1_DQ_3_3 23 DQ5_A B0 103 [3] M_0_DQ_1_1 194 DQ6_B CB3_B 176 37 VSS_36 VSS_174 177
3 [3] M_1_DQ_3_0 16 DQ4_A CB3_A 99 [3] M_0_DQ_1_0 191 DQ5_B ECC CB2_B 172 40 VSS_37 VSS_177 178
[3] M_1_DQ_3_7 15 DQ3_A ECC CB2_A 96 1 [3] M_0_DQ_1_3 184 DQ4_B (UDIMM) CB1_B 168 43 VSS_40 VSS_178 181
[3] M_1_DQ_3_6 12 DQ2_A (UDIMM) CB1_A 95 [3] M_0_DQ_1_4 183 DQ3_B CB0_B 44 VSS_43 VSS_181 182
[3] M_1_DQ_3_4 11 DQ1_A CB0_A [3] M_0_DQ_1_7 180 DQ2_B B0 138
M_0_CLKP1 [3]
47 VSS_44 VSS_182 185
[3] M_1_DQ_3_5 DQ0_A 132 [3] M_0_DQ_1_6 179 DQ1_B CK1_B_P 140 48 VSS_47 VSS_185 186
CK1_A_P M_1_CLKP1 [3] [3] M_0_DQ_1_5 DQ0_B CK1_B_N M_0_CLKN1 [3] VSS_48 VSS_186
134 137 51 189
CK1_A_N M_1_CLKN1 [3] CK0_B_P M_0_CLKP0 [3] VSS_51 VSS_189
131 252 139 52 192
CK0_A_P M_1_CLKP0 [3] DM3_B_N CK0_B_N M_0_CLKN0 [3] VSS_52 VSS_192
84 133 229 55 193
DM3_A_N CK0_A_N M_1_CLKN0 [3] DM2_B_N VSS_55 VSS_193
61 210 165 56 196
DM2_A_N DM1_B_N CS1_B_N M_0_CS1 [3] VSS_56 VSS_196
42 110 187 161 59 197
DM1_A_N CS1_A_N M_1_CS1 [3] DM0_B_N CS0_B_N M_0_CS0 [3] VSS_59 VSS_197
19 106 60 200
DM0_A_N CS0_A_N M_1_CS0 [3] VSS_60 VSS_200
63 201
C 66 VSS_63 VSS_201 204 C
D5AR0-26201-1P40 67 VSS_66 VSS_204 205
D5AR0-26201-1P40 70 VSS_67 VSS_205 208
71 VSS_70 VSS_208 211
74 VSS_71 VSS_211 212
75 VSS_74 VSS_212 215
78 VSS_75 VSS_215 216
79 VSS_78 VSS_216 219
82 VSS_79 VSS_219 220
85 VSS_82 VSS_220 223
86 VSS_85 VSS_223 224
89 VSS_86 VSS_224 227
90 VSS_89 VSS_227 228
93 VSS_90 VSS_228 231
94 VSS_93 VSS_231 234
DDR5 CRC / Parity error indicator 97
98
VSS_94
VSS_97
VSS_98
VSS_234
VSS_235
VSS_238
235
238
101 239
104 VSS_101 VSS_239 242
+1.8V_DEEP_SUS 105 VSS_104 VSS_242 243
111 VSS_105 VSS_243 246
112 VSS_111 VSS_246 247
+1.8V 117 VSS_112 VSS_247 250
RM1006 118 VSS_117 VSS_250 253
*0_5%_4 123 VSS_118 VSS_253 254
124 VSS_123 VSS_254 257
129 VSS_124 VSS_257 258
CHA_DIMM0_SA VSS_129 VSS_258
130 261
135 VSS_130 VSS_261 262
RM1020 VSS_135 VSS_262
RM1008
10K_1%_2
OD *2.2K_1%_2
D5AR0-26201-1P40

2
DDR0_ALERT_N_R QM1003 1 3 *PJA138K
10K ,15.4K,23.2K,35.7K DDR5_ALERT# [22]

RM1021 *0_5%_2
B B

CPU CKE0/1 CKE0/1 RM1018 *0_5%_4 DDR0_ALERT_N [3]


CH.A DIMM1 CH.B DIMM2
(JM1001) (JM1002) Place these Caps near So-Dimm
+5V_DDR +5V_DDR +5V_DDR

CM1002 *22u/6.3V_6 CM1003 47u/6.3V_6 CM1025 *15p/25V_2

CM1004 *22u/6.3V_6 CM1005 47u/6.3V_6 CM1023 *15p/25V_2

CM1006 10u/6.3V_4 CM1024 *3.3p/25V_2


+1.8V
CM1007 10u/6.3V_4 CM1026 *3.3p/25V_2
Debug purposal CM1008 10u/6.3V_4

CM1009 *10u/6.3V_4
RM1004
OD 2.2K_1%_2
+3V_DEEP_SUS CM1010 *1u/10V_2

RVP: 47uFx2+10uFx3+1uFx1
2

CM1011 *1u/10V_2
PCH_SMBDATA_1V8 QM1001 1 3 PJA138K
PCH_SMB_DATA [9]

DRAM0_PWR_EN
TP171
RM1005 *0_5%_2

+1.8V
DRAM0_PWR_GOOD
Memeoy Size Note [619501 - P.112]
A
TP172
Channels A and B can be mapped for physical channel 0 and 1 respectively or vice versa; A

DDR0_ALERT_N_R
however, channel A size should be greater or equal to channel B size.
TP175
RM1007
OD 2.2K_1%_2 +3V_DEEP_SUS
2

PCH_SMBCLK_1V8 QM1002 1 3 PJA138K


PCH_SMB_CLK [9] Quanta Computer Inc.
PROJECT : ZGN
RM1009 *0_5%_2
Size Document Number Rev
Custom DDR5 CA DIMM0-RVS(4H)B A1A
Date: Thursday, May 26, 2022 Sheet 21 of 150
5 4 3 2 1
5 4 3 2 1

DDR5 SODIMM (Standard)


22
To DDR5 PMIC
+5V_DDR

JM1002A JM1002C RM1016 *Short_0402


D JM1002B CHB_DIMM1_SA +5V_DDR SUSON [21,86,113,114,123,144,146] D
2 1
92 102 4 HSA VIN_BULK_1 3 RM1010 *0_5%_4
[3] M_3_DQ_2_3 DQ31_A DQS4_A_P [21] PCH_SMBCLK_1V8 HSCL VIN_BULK_3 SLP_SUS#_EC [12,16,21,86,123]
91 100 260 171 6
[3] M_3_DQ_2_0 88 DQ30_A DQS4_A_N 83 [3] M_2_DQ_2_0 259 DQ31_B DQS4_B_P 169 [21] PCH_SMBDATA_1V8 HSDA 8 DRAM1_PWR_EN RM1011 *0_5%_4 SUSC# [12,16,21,86,114,146]
[3] M_3_DQ_2_1 87 DQ29_A DQS3_A_P 81 M_3_DQSP2 [3] [3] M_2_DQ_2_2 256 DQ30_B DQS4_B_N 251 PWR_EN 7 DRAM1_PWR_GOOD RM1025 *Short_0402
2 [3] M_3_DQ_2_2 80 DQ28_A B3DQS3_A_N 64 M_3_DQSN2 [3] [3] M_2_DQ_2_3 255 DQ29_B B3DQS3_B_P 249 M_2_DQSP2 [3] PWR_GOOD DRAM_PWR_GOOD [12,21,86]
[3] M_3_DQ_2_4 77 DQ27_A DQS2_A_P 62 M_3_DQSP3 [3] 2 [3] M_2_DQ_2_1 248 DQ28_B DQS3_B_N 232 M_2_DQSN2 [3]
[3,21] DDR_DRAMRST#
163 263
[3] M_3_DQ_2_5 76 DQ26_A DQS2_A_N 41 M_3_DQSN3 [3] [3] M_2_DQ_2_4 245 DQ27_B DQS2_B_P 230 M_2_DQSP3 [3] RESET_N MP1 264
CM1012 *0.1u/6.3V_2
[3] M_3_DQ_2_7 73 DQ25_A DQS1_A_P 39 M_3_DQSP0 [3] [3] M_2_DQ_2_7 244 DQ26_B DQS2_B_N 209 M_2_DQSN3 [3] 5 MP2
[3] M_3_DQ_2_6 72 DQ24_A DQS1_A_N 22 M_3_DQSN0 [3] [3] M_2_DQ_2_6 241 DQ25_B DQS1_B_P 207 M_2_DQSP0 [3] Place this cap within 200mil 128 RFU_5 265
[3] M_3_DQ_3_2 69 DQ23_A DQS0_A_P 20 M_3_DQSP1 [3] [3] M_2_DQ_2_5 240 DQ24_B DQS1_B_N 190 M_2_DQSN0 [3] from SODIMM 143 RFU_128 NC_1 266
[3] M_3_DQ_3_1 68 DQ22_A DQS0_A_N M_3_DQSN1 [3] [3] M_2_DQ_3_3 237 DQ23_B DQS0_B_P 188 M_2_DQSP1 [3] RFU_143 NC_2
[3] M_3_DQ_3_3 65 DQ21_A B2 108 DDR1_ALERT_N_R [3] M_2_DQ_3_2 236 DQ22_B DQS0_B_N M_2_DQSN1 [3] 9 136
3 [3] M_3_DQ_3_0 58 DQ20_A ALERT_N [3] M_2_DQ_3_1 233 DQ21_B 144 M_2_A12 M_2_A[12:0] [3]
10 VSS_9 VSS_136 141
[3] M_3_DQ_3_5 57 DQ19_A 127 M_3_A12 M_3_A[12:0] [3] 3 [3] M_2_DQ_3_0 226 DQ20_B B2 CA12_B 145 M_2_A11 13 VSS_10 VSS_141 142
[3] M_3_DQ_3_4 54 DQ18_A CA12_A 126 M_3_A11 [3] M_2_DQ_3_6 225 DQ19_B CA11_B 146 M_2_A10 14 VSS_13 VSS_142 147
[3] M_3_DQ_3_6 53 DQ17_A CA11_A 125 M_3_A10 [3] M_2_DQ_3_5 222 DQ18_B CA10_B 149 M_2_A9 17 VSS_14 VSS_147 148
[3] M_3_DQ_3_7 50 DQ16_A CA10_A 122 M_3_A9 [3] M_2_DQ_3_4 221 DQ17_B CA9_B 150 M_2_A8 18 VSS_17 VSS_148 153
[3] M_3_DQ_0_1 49 DQ15_A CA9_A 121 M_3_A8 [3] M_2_DQ_3_7 218 DQ16_B CA8_B 151 M_2_A7 21 VSS_18 VSS_153 154
[3] M_3_DQ_0_0 46 DQ14_A CA8_A 120 M_3_A7 [3] M_2_DQ_0_3 217 DQ15_B CA7_B 152 M_2_A6 24 VSS_21 VSS_154 159
[3] M_3_DQ_0_3 45 DQ13_A CA7_A 119 M_3_A6 [3] M_2_DQ_0_0 214 DQ14_B CA6_B 155 M_2_A5 25 VSS_24 VSS_159 160
0 [3] M_3_DQ_0_2 38 DQ12_A B1 CA6_A 116 M_3_A5 [3] M_2_DQ_0_1 213 DQ13_B CA5_B 156 M_2_A4 28 VSS_25 VSS_160 166
[3] M_3_DQ_0_5 35 DQ11_A CA5_A 115 M_3_A4 0 [3] M_2_DQ_0_2 206 DQ12_B B1 CA4_B 157 M_2_A3 29 VSS_28 VSS_166 167
[3] M_3_DQ_0_6 34 DQ10_A CA4_A 114 M_3_A3 [3] M_2_DQ_0_5 203 DQ11_B CA3_B 158 M_2_A2 32 VSS_29 VSS_167 170
[3] M_3_DQ_0_4 31 DQ09_A CA3_A 113 M_3_A2 [3] M_2_DQ_0_4 202 DQ10_B CA2_B 162 M_2_A1 33 VSS_32 VSS_170 173
[3] M_3_DQ_0_7 30 DQ8_A CA2_A 109 M_3_A1 [3] M_2_DQ_0_7 199 DQ9_B CA1_B 164 M_2_A0 36 VSS_33 VSS_173 174
[3] M_3_DQ_1_3 27 DQ7_A CA1_A 107 M_3_A0 [3] M_2_DQ_0_6 198 DQ8_B CA0_B 37 VSS_36 VSS_174 177
[3] M_3_DQ_1_2 26 DQ6_A CA0_A [3] M_2_DQ_1_3 195 DQ7_B 175 40 VSS_37 VSS_177 178
[3] M_3_DQ_1_1 23 DQ5_A 103 [3] M_2_DQ_1_0 194 DQ6_B CB3_B 176 43 VSS_40 VSS_178 181
1 [3] M_3_DQ_1_0 16 DQ4_A B0 CB3_A 99 [3] M_2_DQ_1_1 191 DQ5_B B0 CB2_B 172 44 VSS_43 VSS_181 182
[3] M_3_DQ_1_7 15 DQ3_A CB2_A 96 1 [3] M_2_DQ_1_2 184 DQ4_B ECC CB1_B 168 47 VSS_44 VSS_182 185
[3] M_3_DQ_1_4 DQ2_A ECC CB1_A [3] M_2_DQ_1_5 DQ3_B (UDIMM) CB0_B VSS_47 VSS_185
12 95 183 48 186
[3] M_3_DQ_1_6 11 DQ1_A (UDIMM) CB0_A [3] M_2_DQ_1_6 180 DQ2_B 138 51 VSS_48 VSS_186 189
[3] M_3_DQ_1_5 DQ0_A [3] M_2_DQ_1_7 DQ1_B CK1_B_P M_2_CLKP1 [3] VSS_51 VSS_189
132 179 140 52 192
CK1_A_P M_3_CLKP1 [3] [3] M_2_DQ_1_4 DQ0_B CK1_B_N M_2_CLKN1 [3] VSS_52 VSS_192
134 137 55 193
CK1_A_N M_3_CLKN1 [3] CK0_B_P M_2_CLKP0 [3] VSS_55 VSS_193
131 252 139 56 196
CK0_A_P M_3_CLKP0 [3] DM3_B_N CK0_B_N M_2_CLKN0 [3] VSS_56 VSS_196
84 133 229 59 197
DM3_A_N CK0_A_N M_3_CLKN0 [3] DM2_B_N VSS_59 VSS_197
C 61 210 165 60 200 C
DM2_A_N DM1_B_N CS1_B_N M_2_CS1 [3] VSS_60 VSS_200
42 110 187 161 63 201
DM1_A_N CS1_A_N M_3_CS1 [3] DM0_B_N CS0_B_N M_2_CS0 [3] VSS_63 VSS_201
19 106 66 204
DM0_A_N CS0_A_N M_3_CS0 [3] VSS_66 VSS_204
67 205
70 VSS_67 VSS_205 208
D5AS0-26201-1P40 71 VSS_70 VSS_208 211
D5AS0-26201-1P40 74 VSS_71 VSS_211 212
75 VSS_74 VSS_212 215
78 VSS_75 VSS_215 216
79 VSS_78 VSS_216 219
82 VSS_79 VSS_219 220
85 VSS_82 VSS_220 223
86 VSS_85 VSS_223 224
89 VSS_86 VSS_224 227
90 VSS_89 VSS_227 228
93 VSS_90 VSS_228 231
94 VSS_93 VSS_231 234
97 VSS_94 VSS_234 235
98 VSS_97 VSS_235 238
101 VSS_98 VSS_238 239
104 VSS_101 VSS_239 242
105 VSS_104 VSS_242 243
111 VSS_105 VSS_243 246
112 VSS_111 VSS_246 247
117 VSS_112 VSS_247 250
118 VSS_117 VSS_250 253
123 VSS_118 VSS_253 254
124 VSS_123 VSS_254 257
DDR5 CRC / Parity error indicator 129
130
VSS_124
VSS_129
VSS_257
VSS_258
258
261
135 VSS_130 VSS_261 262
VSS_135 VSS_262

+1.8V D5AS0-26201-1P40

B OD B

RM1022
+1.8V_DEEP_SUS *2.2K_1%_2

2
DDR1_ALERT_N_R QM1004 1 3 *PJA138K DDR5_ALERT# [21]
RM1012
*0_5%_4

CHB_DIMM1_SA RM1023 *0_5%_2


Place these Caps near So-Dimm
RM1013 +5V_DDR +5V_DDR
23.2K_1%_4 RM1019 *0_5%_4 DDR1_ALERT_N [3]
CM1013 *22u/6.3V_6 CM1014 47u/6.3V_6

CM1015 *22u/6.3V_6 CM1016 47u/6.3V_6

CM1017 10u/6.3V_4

10K,15.4K 23.2K ,35.7K CM1018 10u/6.3V_4

CM1019 10u/6.3V_4

CM1020 *10u/6.3V_4

Debug purposal CM1021 *1u/10V_2


RVP: 47uFx2+10uFx3+1uFx1
CM1022 *1u/10V_2

A A
DRAM1_PWR_EN
TP173
CPU CKE0/1 CKE0/1
DRAM1_PWR_GOOD
CH.A DIMM1 CH.B DIMM2 TP174
(JM1001) (JM1002)
DDR1_ALERT_N_R
TP176

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom DDR5 CB DIMM0-RVS(4H)B A1A
Date: Thursday, May 26, 2022 Sheet 22 of 150
5 4 3 2 1
5 4 3 2 1

23
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 23 of 150


5 4 3 2 1
5 4 3 2 1

24
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 24 of 150


5 4 3 2 1
5 4 3 2 1

DG:1.8V UG6A
+1V_GFX [28,29,34,131]
+1.8V_AON [26,30,31,32,35,38,39,40,41,45,48,126,130,131]
25
+1.8V_AON GN20-E7 1.0V
BGA2714
COMMON +1V_GFX

1.8V 1/24 PCI_EXPRESS


CG356 EV@22u/6.3V_6
[31] DGPU_PWROK RG76 BR31 PEX_WAKE CG526 EV@22u/6.3V_6 PEX_DVDD/PEX_CVDD
QG9 EV@10K_1%_2 PEX_DVDD BF32 CG334 EV@1u/10V_2 CG524 EV@10u/6.3V_4
EV@PJE8406 PEGX_RST# BT30 BF34 CG345 EV@1u/10V_2 CG527 EV@10u/6.3V_4

2
3V PEX_RST PEX_DVDD
BF35 CG352 EV@1u/10V_2 CG361 EV@10u/6.3V_4
UNDER GPU: [6x1uF + 2x4.7uF]
D
PEX_DVDD D
3 1 PEX_CLKREQ BP31 BF37 CG351 EV@1u/10V_2
[11] PCIE_CLKREQ_4# PEX_CLKREQ PEX_DVDD
BG32
NEAR GPU: [3x10uF + 2x22uF]
PEX_DVDD CG350 EV@1u/10V_2
[11] CLK_VGA_P BJ30 PEX_REFCLK PEX_DVDD BG34 CG332 EV@1u/10V_2
BK30 PEX_REFCLK PEX_DVDD BG35 CG523 EV@4.7u/6.3V_4
[11] CLK_VGA_N
PEX_DVDD BG37 CG322 EV@4.7u/6.3V_4
CG390 EV@0.22u/6.3V_2 PEG_RXP0_C BL31 PEX_TX0 PEX_DVDD BH32
[10] PEG_RXP0 PEG_RXN0_C
CG389 EV@0.22u/6.3V_2 BM31 PEX_TX0 PEX_DVDD BH34
[10] PEG_RXN0
PEX_DVDD BH35
BR32 PEX_RX0 PEX_DVDD BH37
[10] PEG_TXP0
[10] PEG_TXN0 BT32 PEX_RX0

CG377 EV@0.22u/6.3V_2 PEG_RXP1_C BJ32 PEX_TX1


[10] PEG_RXP1 PEG_RXN1_C
[10] PEG_RXN1 CG376 EV@0.22u/6.3V_2 BK32 PEX_TX1
PEX_CVDD BF31
[10] PEG_TXP1 BP33 PEX_RX1 PEX_CVDD BG31
BR33 PEX_RX1 PEX_CVDD BH31
[10] PEG_TXN1
CG388 EV@0.22u/6.3V_2 PEG_RXP2_C BL33 PEX_TX2
[10] PEG_RXP2 PEG_RXN2_C
CG387 EV@0.22u/6.3V_2 BM33 PEX_TX2
[10] PEG_RXN2
BR34 PEX_RX2
[10] PEG_TXP2
BT34 PEX_RX2
[10] PEG_TXN2
CG375 EV@0.22u/6.3V_2 PEG_RXP3_C BJ34 PEX_TX3
[10] PEG_RXP3 PEG_RXN3_C
[10] PEG_RXN3 CG374 EV@0.22u/6.3V_2 BK34 PEX_TX3

BP35 PEX_RX3
[10] PEG_TXP3
[10] PEG_TXN3 BR35 PEX_RX3

CG386 EV@0.22u/6.3V_2 PEG_RXP4_C BL35 PEX_TX4


[10] PEG_RXP4 PEG_RXN4_C
CG385 EV@0.22u/6.3V_2 BM35 PEX_TX4
[10] PEG_RXN4

[10] PEG_TXP4 BR36 PEX_RX4


BT36 PEX_RX4
[10] PEG_TXN4
CG373 EV@0.22u/6.3V_2 PEG_RXP5_C BJ36 PEX_TX5 +1.8V_AON
[10] PEG_RXP5 PEG_RXN5_C
CG372 EV@0.22u/6.3V_2 BK36 PEX_TX5
[10] PEG_RXN5
C CG395 EV@22u/6.3V_6 C
BP37 BF38 CG398 EV@22u/6.3V_6
[10] PEG_TXP5
[10] PEG_TXN5 BR37
PEX_RX5
PEX_RX5
PEX_HVDD
PEX_HVDD BF40 CG367 EV@1u/10V_2 CG397 EV@4.7u/6.3V_4 CG394 EV@10u/6.3V_4 PEX_HVDD/PEX_PLL_HVDD
PEX_HVDD BF41 CG379 EV@1u/10V_2 CG399 EV@4.7u/6.3V_4 CG404 EV@10u/6.3V_4
CG384 EV@0.22u/6.3V_2 PEG_RXP6_C BL37 BG38 CG331 EV@1u/10V_2 CG402 EV@10u/6.3V_4
[10] PEG_RXP6
CG383 EV@0.22u/6.3V_2 PEG_RXN6_C BM37
PEX_TX6 PEX_HVDD
BG40 CG391 EV@1u/10V_2
UNDER GPU: [9x1uF + 2x4.7uF]
[10] PEG_RXN6 PEX_TX6 PEX_HVDD
PEX_HVDD BG41 CG381 EV@1u/10V_2 NEAR GPU: [3x10uF + 2x22uF]
[10] PEG_TXP6 BR38 PEX_RX6 PEX_HVDD BG43 CG315 EV@1u/10V_2
BT38 PEX_RX6 PEX_HVDD BG44 CG368 EV@1u/10V_2
[10] PEG_TXN6
PEX_HVDD BH38 CG378 EV@1u/10V_2
CG371 EV@0.22u/6.3V_2 PEG_RXP7_C BJ38 PEX_TX7 PEX_HVDD BH40 CG318 EV@1u/10V_2
[10] PEG_RXP7 PEG_RXN7_C
CG370 EV@0.22u/6.3V_2 BK38 PEX_TX7 PEX_HVDD BH41
[10] PEG_RXN7
PEX_HVDD BH43
BP39 PEX_RX7 PEX_HVDD BH44
[10] PEG_TXP7
BR39 PEX_RX7
[10] PEG_TXN7
+1.8V_AON
BL39 PEX_TX8
BM39 PEX_TX8
PEX_PLL_HVDD BF43 +PEX_PLL_HVDD RG107 EV@0_5%_4
BR40 PEX_RX8
BT40 PEX_RX8
CG408 EV@1u/10V_2
BJ40 PEX_TX9
BK40 PEX_TX9

BP41 PEX_RX9
BR41 PEX_RX9

BL41 PEX_TX10
BM41 PEX_TX10

BR42 PEX_RX10
BT42 PEX_RX10

BJ42 PEX_TX11
BK42 PEX_TX11

BP43 PEX_RX11
B B
BR43 PEX_RX11

BL43 PEX_TX12
BM43 PEX_TX12

BR44 PEX_RX12
BT44 PEX_RX12

BJ44
BK44
PEX_TX13
PEX_TX13
GPU PEX RST#
BP45 PEX_RX13
BR45 PEX_RX13

BL45 PEX_TX14 +1.8V_AON


BM45 PEX_TX14 PEX_CVDD_SENSE BK46

BR46 PEX_RX14
3V 1.8V
BT46 PEX_RX14 RG75
*EV@Short_0201
BL47 PEX_TX15
BM47 PEX_TX15 CG396 EV@0.1u/6.3V_2

BP47 PEX_RX15 PEX_TERMP BT50 PEX_TERMP RG137 EV@2.49K_1%_2

5
BR47 PEX_RX15
1
[9] DGPU_HOLD_RST# PEGX_RST#
4 RG68 *EV@Short_0201 PEGX_RST# [31,32]
[12,20,53,55,61,68,96] PLTRST# 2

3
UG1 RG69
EV@NL17SZ08DFT2G EV@100K_1%_2

A A

PEGX_RST#
TP205
DGPU_HOLD_RST#
TP206

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C GN20E-1/10 (PCIE) A1A

Date: Thursday, May 26, 2022 Sheet 25 of 150


5 4 3 2 1
5 4 3 2 1

26
+FBVDDQ_MEM [27,35,38,39,40,41,130]
+FBA_PLL_AVDD [27]
+1.8V_AON [25,30,31,32,35,38,39,40,41,45,48,126,130,131]

UG6B UG6C
GN20-E7 GN20-E7
BGA2714 BGA2714
COMMON COMMON
VMA_DQ[63:0] [39] VMB_DQ[63:0]
2/24 FBA 3/24 FBB
[38] VMA_DQ[63:0] FBB_CMD[52:0] [39]
VMA_DQ0 FBA_CMD0 FBA_CMD[52:0] [38] VMB_DQ0 FBB_CMD0
AC51 FBA_D0 CA8_A FBA_CMD0 Y53 D37 FBB_D0 CA8_A FBB_CMD0 B37
VMA_DQ1 AB48 FBA_D1 CA0_A FBA_CMD1 AA56 FBA_CMD1 VMB_DQ1 J37 FBB_D1 FBB_CMD1 A37 FBB_CMD1
CA0_A
VMA_DQ2 AC52 FBA_D2 CA9_A FBA_CMD2 AB55 FBA_CMD2 VMB_DQ2 G37 FBB_D2 FBB_CMD2 A38 FBB_CMD2
CA9_A
VMA_DQ3 AC49 FBA_D3 RST* FBA_CMD3 AB56 FBA_CMD3 VMB_DQ3 F37 FBB_D3 FBB_CMD3 D38 FBB_CMD3
RST*
VMA_DQ4 AF52 FBA_D4 CA9_B FBA_CMD4 AC56 FBA_CMD4 VMB_DQ4 H38 FBB_D4 FBB_CMD4 A39 FBB_CMD4
CA9_B
VMA_DQ5 AC54 FBA_D5 CA0_B FBA_CMD5 AC53 FBA_CMD5 VMB_DQ5 E38 FBB_D5 CA0_B FBB_CMD5 B40 FBB_CMD5
D VMA_DQ6 D
AE51 FBA_D6 CA8_B FBA_CMD6 AD56 FBA_CMD6 VMB_DQ6 F40 FBB_D6 CA8_B FBB_CMD6 A40 FBB_CMD6
VMA_DQ7 AF51 FBA_D7 CA2_B FBA_CMD7 AE55 FBA_CMD7 VMB_DQ7 D40 FBB_D7 CA2_B FBB_CMD7 A41 FBB_CMD7
VMA_DQ8 W51 FBA_D8 CA4_B FBA_CMD8 AE56 FBA_CMD8 VMB_DQ8 F34 FBB_D8 CA4_B FBB_CMD8 D41 FBB_CMD8
VMA_DQ9 W50 FBA_D9 CABI_B FBA_CMD9 AF56 FBA_CMD9 VMB_DQ9 J34 FBB_D9 CABI_B FBB_CMD9 A42 FBB_CMD9
VMA_DQ10 W53 FBA_D10 CABI_A FBA_CMD10 AF53 FBA_CMD10 VMB_DQ10 D34 FBB_D10 CABI_A FBB_CMD10 B43 FBB_CMD10
VMA_DQ11 Y54 AG56 FBA_CMD11 VMB_DQ11 G34 A43 FBB_CMD11

FBA-CH0

FBB-CH0
FBA_D11 CA4_A FBA_CMD11 FBB_D11 CA4_A FBB_CMD11
VMA_DQ12 Y52 FBA_D12 CA2_A FBA_CMD12 AH55 FBA_CMD12 VMB_DQ12 E35 FBB_D12 CA2_A FBB_CMD12 A44 FBB_CMD12
VMA_DQ13 Y51 FBA_D13 CA1_A FBA_CMD13 AH56 FBA_CMD13 VMB_DQ13 K34 FBB_D13 CA1_A FBB_CMD13 D44 FBB_CMD13
VMA_DQ14 Y49 FBA_D14 CKE_A FBA_CMD14 AJ56 FBA_CMD14 VMB_DQ14 H35 FBB_D14 CKE_A FBB_CMD14 A45 FBB_CMD14
VMA_DQ15 AB51 FBA_D15 CA5_A FBA_CMD15 AJ53 FBA_CMD15 VMB_DQ15 K35 FBB_D15 CA5_A FBB_CMD15 B46 FBB_CMD15
VMA_DQ16 AM54 FBA_D16 CA5_B FBA_CMD16 AK56 FBA_CMD16 VMB_DQ16 G47 FBB_D16 CA5_B FBB_CMD16 A46 FBB_CMD16
VMA_DQ17 AL51 FBA_D17 CKE_B FBA_CMD17 AL55 FBA_CMD17 VMB_DQ17 E44 FBB_D17 CKE_B FBB_CMD17 A47 FBB_CMD17
VMA_DQ18 AM52 FBA_D18 CA1_B FBA_CMD18 AL56 FBA_CMD18 VMB_DQ18 F46 FBB_D18 CA1_B FBB_CMD18 D47 FBB_CMD18
VMA_DQ19 AJ54 FBA_D19 CA7_B FBA_CMD19 AM56 FBA_CMD19 VMB_DQ19 F44 FBB_D19 CA7_B FBB_CMD19 A48 FBB_CMD19
VMA_DQ20 AM47 FBA_D20 CA3_B FBA_CMD20 AM53 FBA_CMD20 VMB_DQ20 E46 FBB_D20 CA3_B FBB_CMD20 B49 FBB_CMD20
VMA_DQ21 AM51 FBA_D21 CA6_B FBA_CMD21 AN56 FBA_CMD21 VMB_DQ21 C47 FBB_D21 CA6_B FBB_CMD21 A49 FBB_CMD21
VMA_DQ22 AP50 FBA_D22 CA6_A FBA_CMD22 AP55 FBA_CMD22 VMB_DQ22 E47 FBB_D22 CA6_A FBB_CMD22 B50 FBB_CMD22
VMA_DQ23 AM49 FBA_D23 CA7_A FBA_CMD23 AP56 FBA_CMD23 VMB_DQ23 C49 FBB_D23 CA7_A FBB_CMD23 A50 FBB_CMD23
VMA_DQ24 AF54 FBA_D24 CA3_A FBA_CMD24 AR56 FBA_CMD24 VMB_DQ24 G40 FBB_D24 CA3_A FBB_CMD24 C50 FBB_CMD24
VMA_DQ25 AF49 FBA_D25 FBA_CMD25_NC AR53 VMB_DQ25 C41 FBB_D25 FBB_CMD25_NC A51
VMA_DQ26 AH51 FBA_D26 FBA_CMD26_NC AT56 VMB_DQ26 E41 FBB_D26 FBB_CMD26_NC B52
VMA_DQ27 AF47 FBA_D27 DEBUG0 FBA_CMD27 AR55 VMB_DQ27 F41 FBB_D27 C52
DEBUG0 FBB_CMD27
VMA_DQ28 AJ52 FBA_D28 FBA_CMD28 BM56 FBA_CMD28 VMB_DQ28 F43 FBB_D28 Y56 FBB_CMD28
CA8_B CA8_B FBB_CMD28
VMA_DQ29 AJ51 FBA_D29 FBA_CMD29 BM55 FBA_CMD29 VMB_DQ29 C44 FBB_D29 W56 FBB_CMD29
CA0_B CA0_B FBB_CMD29
VMA_DQ30 AH48 FBA_D30 FBA_CMD30 BL56 FBA_CMD30 VMB_DQ30 H41 FBB_D30 W55 FBB_CMD30
CA9_B CA9_B FBB_CMD30
VMA_DQ31 AJ49 FBA_D31 FBA_CMD31 BK55 FBA_CMD31 VMB_DQ31 H44 FBB_D31 FBB_CMD31 V56 FBB_CMD31
RST* RST*
VMA_DQ32 BA49 FBA_D32 FBA_CMD32 BK56 FBA_CMD32 VMB_DQ32 L51 FBB_D32 U53 FBB_CMD32
CA9_A CA9_A FBB_CMD32
VMA_DQ33 BD47 FBA_D33 CA0_A FBA_CMD33 BJ56 FBA_CMD33 VMB_DQ33 L52 FBB_D33 CA0_A FBB_CMD33 U56 FBB_CMD33
VMA_DQ34 BD54 FBA_D34 CA8_A FBA_CMD34 BJ55 FBA_CMD34 VMB_DQ34 N51 FBB_D34 CA8_A FBB_CMD34 T56 FBB_CMD34
VMA_DQ35 BD52 FBA_D35 CA2_A FBA_CMD35 BH56 FBA_CMD35 VMB_DQ35 L49 FBB_D35 CA2_A FBB_CMD35 T55 FBB_CMD35
VMA_DQ36 BC51 FBA_D36 CA4_A FBA_CMD36 BG53 FBA_CMD36 VMB_DQ36 L54 FBB_D36 CA4_A FBB_CMD36 R56 FBB_CMD36
VMA_DQ37 BD51 FBA_D37 CABI_A FBA_CMD37 BG56 FBA_CMD37 VMB_DQ37 N47 FBB_D37 CABI_A FBB_CMD37 P53 FBB_CMD37
VMA_DQ38 BF51 FBA_D38 CABI_B FBA_CMD38 BF56 FBA_CMD38 VMB_DQ38 P51 FBB_D38 CABI_B FBB_CMD38 P56 FBB_CMD38
VMA_DQ39 BD49 BF55 FBA_CMD39 VMB_DQ39 P49 N56 FBB_CMD39
FBA-CH1

FBB-CH1
FBA_D39 CA4_B FBA_CMD39 FBB_D39 CA4_B FBB_CMD39
VMA_DQ40 BG52 FBA_D40 CA2_B FBA_CMD40 BE56 FBA_CMD40 VMB_DQ40 T51 FBB_D40 CA2_B FBB_CMD40 N55 FBB_CMD40
VMA_DQ41 BG51 FBA_D41 CKE_B FBA_CMD41 BD53 FBA_CMD41 VMB_DQ41 P52 FBB_D41 CKE_B FBB_CMD41 M56 FBB_CMD41
VMA_DQ42 BG54 FBA_D42 CA5_B FBA_CMD42 BD56 FBA_CMD42 VMB_DQ42 P54 FBB_D42 CA5_B FBB_CMD42 L53 FBB_CMD42
C VMA_DQ43 BF49 FBA_D43 CA5_A FBA_CMD43 BC56 FBA_CMD43 VMB_DQ43 U47 FBB_D43 CA5_A FBB_CMD43 L56 FBB_CMD43 C
VMA_DQ44 BJ54 FBA_D44 CKE_A FBA_CMD44 BC55 FBA_CMD44 VMB_DQ44 U51 FBB_D44 CKE_A FBB_CMD44 K56 FBB_CMD44
VMA_DQ45 BG50 FBA_D45 CA1_A FBA_CMD45 BB56 FBA_CMD45 VMB_DQ45 U52 FBB_D45 CA1_A FBB_CMD45 K55 FBB_CMD45
VMA_DQ46 BJ52 FBA_D46 CA3_A FBA_CMD46 BA53 FBA_CMD46 VMB_DQ46 U54 FBB_D46 CA3_A FBB_CMD46 J56 FBB_CMD46
VMA_DQ47 BK53 FBA_D47 CA7_A FBA_CMD47 BA56 FBA_CMD47 VMB_DQ47 U49 FBB_D47 CA7_A FBB_CMD47 H53 FBB_CMD47
VMA_DQ48 AP51 FBA_D48 CA6_A FBA_CMD48 AY56 FBA_CMD48 VMB_DQ48 D52 FBB_D48 CA6_A FBB_CMD48 H56 FBB_CMD48
VMA_DQ49 AP53 FBA_D49 CA6_B FBA_CMD49 AY55 FBA_CMD49 VMB_DQ49 C53 FBB_D49 CA6_B FBB_CMD49 G56 FBB_CMD49
VMA_DQ50 AR52 FBA_D50 CA3_B FBA_CMD50 AW56FBA_CMD50 VMB_DQ50 C54 FBB_D50 CA3_B FBB_CMD50 G55 FBB_CMD50
VMA_DQ51 AR54 FBA_D51 CA7_B FBA_CMD51 AV53 FBA_CMD51 VMB_DQ51 C55 FBB_D51 CA7_B FBB_CMD51 E56 FBB_CMD51
VMA_DQ52 AU51 FBA_D52 CA1_B FBA_CMD52 AV56 FBA_CMD52 VMB_DQ52 D55 FBB_D52 CA1_B FBB_CMD52 B54 FBB_CMD52
VMA_DQ53 AR51 FBA_D53 FBA_CMD53_NC AU56 VMB_DQ53 D54 FBB_D53 FBB_CMD53_NC B53
VMA_DQ54 AV51 FBA_D54 FBA_CMD54_NC AU55 VMB_DQ54 F56 FBB_D54 FBB_CMD54_NC A52
VMA_DQ55 AR49 FBA_D55 DEBUG1 FBA_CMD55 AV55 VMB_DQ55 F49 FBB_D55 DEBUG1 FBB_CMD55 E55
VMA_DQ56 AV49 FBA_D56 VMB_DQ56 G53 FBB_D56
VMA_DQ57 AV54 FBA_D57 VMB_DQ57 H49 FBB_D57
VMA_DQ58 AY51 FBA_D58 VMB_DQ58 H51 FBB_D58
VMA_DQ59 AV52 FBA_D59 VMB_DQ59 G51 FBB_D59
VMA_DQ60 AY48 FBA_D60 VMB_DQ60 H52 FBB_D60
VMA_DQ61 BA54 FBA_D61 VMB_DQ61 H54 FBB_D61
VMA_DQ62 BA52 FBA_D62 FBA_CLK0 AP48 VMB_DQ62 K48 FBB_D62 FBB_CLK0 K44
VMA_DQ63 VMA_CLK0 [38] VMB_DQ63 VMB_CLK0 [39]
BA51 FBA_D63 FBA_CLK0 AP47 VMA_CLK0# [38] K51 FBB_D63 FBB_CLK0 J44 VMB_CLK0# [39]
FBA_CLK1 AR48 FBB_CLK1 J46
VMA_CLK1 [38] VMB_CLK1 [39]
FBA_CLK1 AR47 VMA_CLK1# [38] FBB_CLK1 K46 VMB_CLK1# [39]
[38] FBA_DBI[7:0] FBA_DBI0 [39] FBB_DBI[7:0] FBB_DBI0
AE50 FBA_DQM0 F38 FBB_DQM0
FBA_DBI1 AB50 FBA_DQM1 FBB_DBI1 F35 FBB_DQM1
FBA_DBI2 AL50 FBA_DQM2 FBA_WCK01 AE48 FBB_DBI2 G46 FBB_DQM2 FBB_WCK01 J40
FBA_DBI3 AH50 AE47 VMA_WCK01 [38] FBB_DBI3 G43 K40 VMB_WCK01 [39]
FBA_DQM3 FBA_WCK01 VMA_WCK01# [38] FBB_DQM3 FBB_WCK01 VMB_WCK01# [39]
FBA_DBI4 BC50 FBA_DQM4 FBA_WCKB01 AC48 FBB_DBI4 N50 FBB_DQM4 FBB_WCKB01 K38
FBA_DBI5 VMA_WCKB01 [38] FBB_DBI5 VMB_WCKB01 [39]
BF50 FBA_DQM5 FBA_WCKB01 AC47 T50 FBB_DQM5 FBB_WCKB01 J38
FBA_DBI6 AU50 AL48 VMA_WCKB01# [38] FBB_DBI6 E49 J43 VMB_WCKB01# [39]
FBA_DQM6 FBA_WCK23 VMA_WCK23 [38] FBB_DQM6 FBB_WCK23 VMB_WCK23 [39]
FBA_DBI7 AY50 FBA_DQM7 FBA_WCK23 AL47 FBB_DBI7 K50 FBB_DQM7 FBB_WCK23 K43
AJ48 VMA_WCK23# [38] K41 VMB_WCK23# [39]
FBA_WCKB23 VMA_WCKB23 [38] FBB_WCKB23 VMB_WCKB23 [39]
FBA_WCKB23 AJ47 FBB_WCKB23 J41
[38] FBA_EDC[7:0] FBA_EDC0 VMA_WCKB23# [38] [39] FBB_EDC[7:0] FBB_EDC0 VMB_WCKB23# [39]
AE53 FBA_DQS_WP0 FBA_WCK45 BA47 C38 FBB_DQS_WP0 FBB_WCK45 P47
FBA_EDC1 AB53 BA48 VMA_WCK45 [38] FBB_EDC1 C35 P48 VMB_WCK45 [39]
FBA_DQS_WP1 FBA_WCK45 VMA_WCK45# [38] FBB_DQS_WP1 FBB_WCK45 VMB_WCK45# [39]
FBA_EDC2 AL53 FBA_DQS_WP2 FBA_WCKB45 BC48 FBB_EDC2 D46 FBB_DQS_WP2 FBB_WCKB45 T48
FBA_EDC3 AH53 BC47 VMA_WCKB45 [38] FBB_EDC3 D43 T47 VMB_WCKB45 [39]
FBA_DQS_WP3 FBA_WCKB45 VMA_WCKB45# [38] FBB_DQS_WP3 FBB_WCKB45 VMB_WCKB45# [39]
FBA_EDC4 BC53 FBA_DQS_WP4 FBA_WCK67 AU48 FBB_EDC4 N53 FBB_DQS_WP4 FBB_WCK67 K47
B FBA_EDC5 VMA_WCK67 [38] FBB_EDC5 VMB_WCK67 [39] B
BF53 FBA_DQS_WP5 FBA_WCK67 AU47 T53 FBB_DQS_WP5 FBB_WCK67 J47
FBA_EDC6 AU53 AV48 VMA_WCK67# [38] FBB_EDC6 E53 L47 VMB_WCK67# [39]
FBA_DQS_WP6 FBA_WCKB67 VMA_WCKB67 [38] FBB_DQS_WP6 FBB_WCKB67 VMB_WCKB67 [39]
FBA_EDC7 AY53 FBA_DQS_WP7 FBA_WCKB67 AV47 FBB_EDC7 K53 FBB_DQS_WP7 FBB_WCKB67 L48
VMA_WCKB67# [38] VMB_WCKB67# [39]

BN37 GND BN44 GND


BN38 GND BN45 GND
BN39 GND BN46 GND
BN4 GND BN47 GND
BN40 GND +FBA_PLL_AVDD +1.8V_AON BN48 GND +FBA_PLL_AVDD
BN41 GND BN6 GND
BN42 GND BN9 GND
BN43 GND FB_PLLVDD AC46 +FBA_PLL_AVDD LG2 1 2 EV@HCB1005KF-330T30_3A BP1 GND FB_PLLVDD L17 +FBA_PLL_AVDD
FB_PLLVDD AE11
FB_PLLVDD AP46

CG98
CG407 EV@22u/6.3V_6
CG406 EV@4.7u/6.3V_4 FB_PLLVDD EV@1u/10V_2

CG197 EV@1u/10V_2 UNDER GPU: [6x1uF]


CG198 EV@1u/10V_2
CG123 EV@1u/10V_2
CG184 EV@1u/10V_2 NEAR GPU: [1x22uF + 1x4.7uF]
CG305 EV@1u/10V_2
CG245 EV@1u/10V_2

A
CKE_A CKE_B RESET A

CKE_A CKE_B RESET


+FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM FBA_CMD3 FBB_CMD3
FBA_CMD31 +FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM FBB_CMD31

RG37 RG50 RG39 RG51 RG132 RG28


EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 RG3
EV@10K_1%_2
RG21
EV@10K_1%_2
RG17
EV@10K_1%_2
RG20
EV@10K_1%_2
RG25
EV@10K_1%_2
RG11
EV@10K_1%_2 Quanta Computer Inc.
FBA_CMD14
FBA_CMD44
FBA_CMD17
FBA_CMD41 FBB_CMD14 FBB_CMD17
PROJECT : ZGN
FBB_CMD44 FBB_CMD41
Size Document Number Rev
C Memory-FB/AB A1A

Date: Monday, March 21, 2022 Sheet 26 of 150


5 4 3 2 1
5 4 3 2 1

+FBVDDQ_MEM [26,35,38,39,40,41,130]
+FBA_PLL_AVDD [26]

UG6D
GN20-E7
BGA2714
COMMON
Channel D is not use for GN20-E3
UG6E
GN20-E7
BGA2714
COMMON
27
4/24 FBC 5/24 FBD
[40] VMC_DQ[63:0] FBC_CMD[52:0] [40] [41] VMD_DQ[63:0] FBD_CMD[52:0] [41]
VMC_DQ0 F7 FBC_D0 CA8_A FBC_CMD0 B5 FBC_CMD0 VMD_DQ0 AR4 FBD_D0 CA8_A FBD_CMD0 AU1 FBD_CMD0
VMC_DQ1 H5 FBC_D1 CA0_A FBC_CMD1 A5 FBC_CMD1 VMD_DQ1 AP8 FBD_D1 CA0_A FBD_CMD1 AU4 FBD_CMD1
VMC_DQ2 F8 FBC_D2 CA9_A FBC_CMD2 C5 FBC_CMD2 VMD_DQ2 AP6 FBD_D2 CA9_A FBD_CMD2 AT1 FBD_CMD2
VMC_DQ3 G5 FBC_D3 RST* FBC_CMD3 A6 FBC_CMD3 VMD_DQ3 AR6 FBD_D3 RST* FBD_CMD3 AR2 FBD_CMD3
VMC_DQ4 H8 FBC_D4 CA9_B FBC_CMD4 B7 FBC_CMD4 VMD_DQ4 AM6 FBD_D4 CA9_B FBD_CMD4 AR1 FBD_CMD4
VMC_DQ5 E8 FBC_D5 CA0_B FBC_CMD5 A7 FBC_CMD5 VMD_DQ5 AP3 FBD_D5 CA0_B FBD_CMD5 AP1 FBD_CMD5
VMC_DQ6 C8 FBC_D6 CA8_B FBC_CMD6 A8 FBC_CMD6 VMD_DQ6 AP5 FBD_D6 CA8_B FBD_CMD6 AP4 FBD_CMD6
VMC_DQ7 D10 FBC_D7 CA2_B FBC_CMD7 D8 FBC_CMD7 VMD_DQ7 AM9 FBD_D7 CA2_B FBD_CMD7 AN1 FBD_CMD7
D VMC_DQ8 D
D2 FBC_D8 CA4_B FBC_CMD8 A9 FBC_CMD8 VMD_DQ8 AU5 FBD_D8 CA4_B FBD_CMD8 AM2 FBD_CMD8
VMC_DQ9 E1 FBC_D9 CABI_B FBC_CMD9 B10 FBC_CMD9 VMD_DQ9 AV6 FBD_D9 CABI_B FBD_CMD9 AM1 FBD_CMD9
VMC_DQ10 C2 FBC_D10 CABI_A FBC_CMD10 A10FBC_CMD10 VMD_DQ10 AV9 FBD_D10 CABI_A FBD_CMD10 AL1FBD_CMD10
VMC_DQ11 D3 A11FBC_CMD11 VMD_DQ11 AU3 AL4FBD_CMD11

FBC-CH0

FBD-CH0
FBC_D11 CA4_A FBC_CMD11 FBD_D11 CA4_A FBD_CMD11
VMC_DQ12 C3 FBC_D12 CA2_A FBC_CMD12 D11FBC_CMD12 VMD_DQ12 AU6 FBD_D12 CA2_A FBD_CMD12 AK1FBD_CMD12
VMC_DQ13 B4 FBC_D13 CA1_A FBC_CMD13 A12FBC_CMD13 VMD_DQ13 AU8 FBD_D13 CA1_A FBD_CMD13 AJ2FBD_CMD13
VMC_DQ14 E4 FBC_D14 CKE_A FBC_CMD14 B13FBC_CMD14 VMD_DQ14 AU10 FBD_D14 CKE_A FBD_CMD14 AJ1FBD_CMD14
VMC_DQ15 D5 FBC_D15 CA5_A FBC_CMD15 A13FBC_CMD15 VMD_DQ15 AR7 FBD_D15 CA5_A FBD_CMD15 AH1FBD_CMD15
VMC_DQ16 F17 FBC_D16 CA5_B FBC_CMD16 A14FBC_CMD16 VMD_DQ16 AF6 FBD_D16 CA5_B FBD_CMD16 AH4FBD_CMD16
VMC_DQ17 E14 FBC_D17 CKE_B FBC_CMD17 D14FBC_CMD17 VMD_DQ17 AH5 FBD_D17 CKE_B FBD_CMD17 AG1FBD_CMD17
VMC_DQ18 C14 FBC_D18 CA1_B FBC_CMD18 A15FBC_CMD18 VMD_DQ18 AH3 FBD_D18 CA1_B FBD_CMD18 AF2FBD_CMD18
VMC_DQ19 H14 FBC_D19 CA7_B FBC_CMD19 B16FBC_CMD19 VMD_DQ19 AF9 FBD_D19 CA7_B FBD_CMD19 AF1FBD_CMD19
VMC_DQ20 E17 FBC_D20 CA3_B FBC_CMD20 A16FBC_CMD20 VMD_DQ20 AE6 FBD_D20 CA3_B FBD_CMD20 AE1FBD_CMD20
VMC_DQ21 F16 FBC_D21 CA6_B FBC_CMD21 A17FBC_CMD21 VMD_DQ21 AE8 FBD_D21 CA6_B FBD_CMD21 AE4FBD_CMD21
VMC_DQ22 C17 FBC_D22 CA6_A FBC_CMD22 D17FBC_CMD22 VMD_DQ22 AE5 FBD_D22 CA6_A FBD_CMD22 AD1FBD_CMD22
VMC_DQ23 H17 FBC_D23 CA7_A FBC_CMD23 A18FBC_CMD23 VMD_DQ23 AE10 FBD_D23 CA7_A FBD_CMD23 AC2FBD_CMD23
VMC_DQ24 F10 FBC_D24 CA3_A FBC_CMD24 B19FBC_CMD24 VMD_DQ24 AL6 FBD_D24 CA3_A FBD_CMD24 AC1FBD_CMD24
VMC_DQ25 G10 FBC_D25 FBC_CMD25_NC A19 VMD_DQ25 AL3 FBD_D25 FBD_CMD25_NC AB1
VMC_DQ26 C11 FBC_D26 FBC_CMD26_NC A20 VMD_DQ26 AL5 FBD_D26 FBD_CMD26_NC AB4
VMC_DQ27 E11 FBC_D27 DEBUG0 FBC_CMD27 B20 VMD_DQ27 AL8 FBD_D27 DEBUG0 FBD_CMD27 AB2
VMC_DQ28 F11 FBC_D28 FBC_CMD28 A36FBC_CMD28 VMD_DQ28 AJ6 FBD_D28 FBD_CMD28 G2 FBD_CMD28
CA8_B CA8_B
VMC_DQ29 F13 FBC_D29 FBC_CMD29 D35FBC_CMD29 VMD_DQ29 AL10 FBD_D29 FBD_CMD29 G1 FBD_CMD29
CA0_B CA0_B
VMC_DQ30 F14 FBC_D30 FBC_CMD30 A35FBC_CMD30 VMD_DQ30 AH6 FBD_D30 FBD_CMD30 G3 FBD_CMD30
CA9_B CA9_B
VMC_DQ31 H11 FBC_D31 FBC_CMD31 A34FBC_CMD31 VMD_DQ31 AH8 FBD_D31 FBD_CMD31 H1 FBD_CMD31
RST* RST*
VMC_DQ32 F26 FBC_D32 FBC_CMD32 B34FBC_CMD32 VMD_DQ32 T5 FBD_D32 FBD_CMD32 H2 FBD_CMD32
CA9_A CA9_A
VMC_DQ33 E26 FBC_D33 CA0_A FBC_CMD33 A33FBC_CMD33 VMD_DQ33 T6 FBD_D33 CA0_A FBD_CMD33 J1 FBD_CMD33
VMC_DQ34 H26 FBC_D34 CA8_A FBC_CMD34 D32FBC_CMD34 VMD_DQ34 P6 FBD_D34 CA8_A FBD_CMD34 K4 FBD_CMD34
VMC_DQ35 D28 FBC_D35 CA2_A FBC_CMD35 A32FBC_CMD35 VMD_DQ35 T8 FBD_D35 CA2_A FBD_CMD35 K1 FBD_CMD35
VMC_DQ36 C26 FBC_D36 CA4_A FBC_CMD36 A31FBC_CMD36 VMD_DQ36 T3 FBD_D36 CA4_A FBD_CMD36 K2 FBD_CMD36
VMC_DQ37 E29 FBC_D37 CABI_A FBC_CMD37 B31FBC_CMD37 VMD_DQ37 N5 FBD_D37 CABI_A FBD_CMD37 L1 FBD_CMD37
VMC_DQ38 F28 FBC_D38 CABI_B FBC_CMD38 A30FBC_CMD38 VMD_DQ38 N3 FBD_D38 CABI_B FBD_CMD38 L2 FBD_CMD38
VMC_DQ39 G28 D29FBC_CMD39 VMD_DQ39 N6 M1 FBD_CMD39
FBC-CH1

FBD-CH1
FBC_D39 CA4_B FBC_CMD39 FBD_D39 CA4_B FBD_CMD39
VMC_DQ40 F31 FBC_D40 CA2_B FBC_CMD40 A29FBC_CMD40 VMD_DQ40 L6 FBD_D40 CA2_B FBD_CMD40 N4 FBD_CMD40
VMC_DQ41 K29 FBC_D41 CKE_B FBC_CMD41 A28FBC_CMD41 VMD_DQ41 N8 FBD_D41 CKE_B FBD_CMD41 N1 FBD_CMD41
VMC_DQ42 H29 FBC_D42 CA5_B FBC_CMD42 B28FBC_CMD42 VMD_DQ42 K6 FBD_D42 CA5_B FBD_CMD42 P1 FBD_CMD42
VMC_DQ43 J28 FBC_D43 CA5_A FBC_CMD43 A27FBC_CMD43 VMD_DQ43 L9 FBD_D43 CA5_A FBD_CMD43 P2 FBD_CMD43
VMC_DQ44 D31 FBC_D44 CKE_A FBC_CMD44 D26FBC_CMD44 VMD_DQ44 K3 FBD_D44 CKE_A FBD_CMD44 R1 FBD_CMD44
C VMC_DQ45 G31 FBC_D45 CA1_A FBC_CMD45 A26FBC_CMD45 VMD_DQ45 K5 FBD_D45 CA1_A FBD_CMD45 T4 FBD_CMD45 C
VMC_DQ46 E32 FBC_D46 CA3_A FBC_CMD46 A25FBC_CMD46 VMD_DQ46 J2 FBD_D46 CA3_A FBD_CMD46 T1 FBD_CMD46
VMC_DQ47 H31 FBC_D47 CA7_A FBC_CMD47 B25FBC_CMD47 VMD_DQ47 K8 FBD_D47 CA7_A FBD_CMD47 U1 FBD_CMD47
VMC_DQ48 F19 FBC_D48 CA6_A FBC_CMD48 A24FBC_CMD48 VMD_DQ48 AC7 FBD_D48 CA6_A FBD_CMD48 U2 FBD_CMD48
VMC_DQ49 K17 FBC_D49 CA6_B FBC_CMD49 D23FBC_CMD49 VMD_DQ49 AE3 FBD_D49 CA6_B FBD_CMD49 V1 FBD_CMD49
VMC_DQ50 C20 FBC_D50 CA3_B FBC_CMD50 A23FBC_CMD50 VMD_DQ50 AC6 FBD_D50 CA3_B FBD_CMD50 W4 FBD_CMD50
VMC_DQ51 J19 FBC_D51 CA7_B FBC_CMD51 A22FBC_CMD51 VMD_DQ51 AC4 FBD_D51 CA7_B FBD_CMD51 W1 FBD_CMD51
VMC_DQ52 E20 FBC_D52 CA1_B FBC_CMD52 B22FBC_CMD52 VMD_DQ52 AB3 FBD_D52 CA1_B FBD_CMD52 Y1 FBD_CMD52
VMC_DQ53 F20 FBC_D53 FBC_CMD53_NC A21 VMD_DQ53 AB5 FBD_D53 FBD_CMD53_NC Y2
VMC_DQ54 K20 FBC_D54 FBC_CMD54_NC D20 VMD_DQ54 AB6 FBD_D54 FBD_CMD54_NC AA1
VMC_DQ55 H20 FBC_D55 DEBUG1 FBC_CMD55 B23 VMD_DQ55 AB8 FBD_D55 DEBUG1 FBD_CMD55 W2
VMC_DQ56 G22 FBC_D56 VMD_DQ56 W6 FBD_D56
VMC_DQ57 F22 FBC_D57 VMD_DQ57 W8 FBD_D57
VMC_DQ58 C23 FBC_D58 VMD_DQ58 W5 FBD_D58
VMC_DQ59 D22 FBC_D59 VMD_DQ59 Y6 FBD_D59
VMC_DQ60 E23 FBC_D60 VMD_DQ60 W3 FBD_D60
VMC_DQ61 F23 FBC_D61 VMD_DQ61 U9 FBD_D61
VMC_DQ62 F25 FBC_D62 FBC_CLK0 K22 VMD_DQ62 U6 FBD_D62 FBD_CLK0 AC10
VMC_DQ63 VMC_CLK0 [40] VMD_DQ63 VMD_CLK0 [41]
H23 FBC_D63 FBC_CLK0 J22 T10 FBD_D63 FBD_CLK0 AC9
VMC_CLK0# [40] VMD_CLK0# [41]
FBC_CLK1 K23 FBD_CLK1 AB10
[40] FBC_DBI[7:0] VMC_CLK1 [40] [41] FBD_DBI[7:0] VMD_CLK1 [41]
FBC_CLK1 J23 VMC_CLK1# [40] FBD_CLK1 AB9 VMD_CLK1# [41]
FBC_DBI0 G7 FBC_DQM0 FBD_DBI0 AM7 FBD_DQM0
FBC_DBI1 E3 FBC_DQM1 FBD_DBI1 AV7 FBD_DQM1
FBC_DBI2 G16 FBC_DQM2 FBC_WCK01 K13 FBD_DBI2 AF7 FBD_DQM2 FBD_WCK01 AP9
FBC_DBI3 G13 J13 VMC_WCK01 [40] FBD_DBI3 AJ7 AP10 VMD_WCK01 [41]
FBC_DQM3 FBC_WCK01 VMC_WCK01# [40] FBD_DQM3 FBD_WCK01 VMD_WCK01# [41]
FBC_DBI4 F29 FBC_DQM4 FBC_WCKB01 K11 FBD_DBI4 P7 FBD_DQM4 FBD_WCKB01 AR9
FBC_DBI5 F32 J11 VMC_WCKB01 [40] FBD_DBI5 L7 AR10 VMD_WCKB01 [41]
FBC_DQM5 FBC_WCKB01 VMC_WCKB01# [40] FBD_DQM5 FBD_WCKB01 VMD_WCKB01# [41]
FBC_DBI6 G19 FBC_DQM6 FBC_WCK23 J16 FBD_DBI6 Y7 FBD_DQM6 FBD_WCK23 AH10
FBC_DBI7 VMC_WCK23 [40] FBD_DBI7 VMD_WCK23 [41]
G25 FBC_DQM7 FBC_WCK23 K16 U7 FBD_DQM7 FBD_WCK23 AH9
J14 VMC_WCK23# [40] AJ10 VMD_WCK23# [41]
[40] FBC_EDC[7:0] FBC_WCKB23 VMC_WCKB23 [40] [41] FBD_EDC[7:0] FBD_WCKB23 VMD_WCKB23 [41]
FBC_WCKB23 K14 FBD_WCKB23 AJ9
FBC_EDC0 D7 K31 VMC_WCKB23# [40] FBD_EDC0 AM4 P10 VMD_WCKB23# [41]
FBC_DQS_WP0 FBC_WCK45 VMC_WCK45 [40] FBD_DQS_WP0 FBD_WCK45 VMD_WCK45 [41]
FBC_EDC1 B3 FBC_DQS_WP1 FBC_WCK45 J31 FBD_EDC1 AV4 FBD_DQS_WP1 FBD_WCK45 P9
FBC_EDC2 VMC_WCK45# [40] FBD_EDC2 VMD_WCK45# [41]
D16 FBC_DQS_WP2 FBC_WCKB45 K32 AF4 FBD_DQS_WP2 FBD_WCKB45 N10
FBC_EDC3 D13 J32 VMC_WCKB45 [40] FBD_EDC3 AJ4 N9 VMD_WCKB45 [41]
FBC_DQS_WP3 FBC_WCKB45 VMC_WCKB45# [40] FBD_DQS_WP3 FBD_WCKB45 VMD_WCKB45# [41]
FBC_EDC4 C29 FBC_DQS_WP4 FBC_WCK67 K25 FBD_EDC4 P4 FBD_DQS_WP4 FBD_WCK67 Y10
FBC_EDC5 C32 J25 VMC_WCK67 [40] FBD_EDC5 L4 Y9 VMD_WCK67 [41]
FBC_DQS_WP5 FBC_WCK67 VMC_WCK67# [40] FBD_DQS_WP5 FBD_WCK67 VMD_WCK67# [41]
FBC_EDC6 D19 FBC_DQS_WP6 FBC_WCKB67 J26 FBD_EDC6 Y4 FBD_DQS_WP6 FBD_WCKB67 W9
B FBC_EDC7 VMC_WCKB67 [40] FBD_EDC7 VMD_WCKB67 [41] B
D25 FBC_DQS_WP7 FBC_WCKB67 K26 U4 FBD_DQS_WP7 FBD_WCKB67 W10
VMC_WCKB67# [40] VMD_WCKB67# [41]

BP32 GND BP48 GND


BP34 GND BR1 GND
BP36 GND BR12 GND
BP38 GND BR15 GND
BP40 GND +FBA_PLL_AVDD BR18 GND +FBA_PLL_AVDD
BP42 GND BR2 GND
BP44 GND BR21 GND
BP46 GND FB_PLLVDD L35 +FBA_PLL_AVDD BR24 GND FB_PLLVDD T46 +FBA_PLL_AVDD

CG106 CG152
EV@1u/10V_2 EV@1u/10V_2

CKE_A CKE_B RESET CKE_A CKE_B RESET


A A

FBC_CMD3 FBD_CMD3
+FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM FBC_CMD31 +FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM +FBVDDQ_MEM FBD_CMD31

RG109 RG115
RG4 RG19 RG18 RG5 RG10 RG108 RG36 RG22 RG38 RG23 EV@10K_1%_2 EV@10K_1%_2
EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2 EV@10K_1%_2
Quanta Computer Inc.
FBC_CMD14
FBC_CMD44
FBC_CMD17
FBC_CMD41
FBD_CMD14
FBD_CMD44
FBD_CMD17
FBD_CMD41
PROJECT : ZGN
Size Document Number Rev
C Memory-FB/CD A1A

Date: Monday, March 21, 2022 Sheet 27 of 150


5 4 3 2 1
5 4 3 2 1

UG6R
GN20-E7
BGA2714
COMMON
28
+1V_GFX [25,29,34,131]
+1.8V_AON [25,26,30,31,32,35,38,39,40,41,45,48,126,130,131]
7/24 IFPAB
Remove,No support DPIN
+CORE_PLLVDD [29,30]
DL-DVI DVI/HDMI DP

IFPA_AUX BT10
SDA SDA
SCL SCL IFPA_AUX BT11

D D
IFPA_L3 BR20
IFPAB_RSET BH23 TXC TXC BP20
RG58 *EV@1K_1%_2 IFPAB_RSET IFPA_L3
TXC TXC

+CORE_PLLVDD
TXD0 TXD0 IFPA_L2 BP22
BR22
TCP0/DP0
TXD0 TXD0 IFPA_L2
+CORE_PLLVDD R1037 *EV@0_5%_6 BH22 IFPAB_PLLVDD

BT22
1.8V TXD1
TXD1
TXD1
TXD1
IFPA_L1
IFPA_L1 BT23
CG353 R1039
EV@1u/10V_2 0.4A EV@10K_1%_2
BR23
TXD2 TXD2 IFPA_L0
TXD2 TXD2 IFPA_L0 BP23

IFPB_AUX BR11
SDA
SCL IFPB_AUX BP11

+1V_GFX
IFPB_L3 BL22
TXC
R1038 EV@0_5%_6 BF14 IFP_IOVDD IFPB_L3 BM22
TXC
BF13 IFP_IOVDD

CG335 CG319 CG320 CG325


BF16
BF17
IFP_IOVDD TXD3 TXD0 IFPB_L2 BK22
BJ22
TCP1/DP1
IFP_IOVDD TXD3 TXD0 IFPB_L2
EV@4.7u/6.3V_4 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2

IFPB_L1 BK23
TXD4 TXD1
TXD4 TXD1 IFPB_L1 BL23

TXD5 TXD2 IFPB_L0 BK25


C BJ25 C
[IFP_IOVDD_x] IFPAB
TXD5 TXD2 IFPB_L0

1uF-0402/0201W-x5
4.7u-0603-x3
1u-0402/0201W-x5

UG6S
GN20-E7 GN20-E7
BGA2714 BGA2714
COMMON COMMON UG6T
8/24 IFPC 9/24 IFPD

IFPC_RSET
HDMI/Re-Driver
RG56 EV@1K_1%_2 BH20 IFPCD_RSET
DVI/HDMI DP DVI/HDMI DP
+CORE_PLLVDD

+CORE_PLLVDD
eDP
BH19 IFPCD_PLLVDD IFPC_AUX BM10 IFPD_AUX BL11
SDA GPU_DDCDATA [48] SDA GPU_eDP_AUXN [44]
BL10 BM11
1.8V SCL IFPC_AUX GPU_DDCCLK [48] SCL IFPD_AUX GPU_eDP_AUXP [44]
CG354
B
0.4A EV@1u/10V_2 TXC IFPC_L3 BK17
BL17 GPU_CLK# [48] TXC IFPD_L3 BT16
BT17
GPU_eDP_TXN3 [44]
B

TXC IFPC_L3 GPU_CLK [48] TXC IFPD_L3 GPU_eDP_TXP3 [44]

IFPC_L2 BL19 IFPD_L2 BR17


TXD0 GPU_D0# [48] TXD0 GPU_eDP_TXN2 [44]
TXD0 IFPC_L2 BM19 GPU_D0 [48] TXD0 IFPD_L2 BP17 GPU_eDP_TXP2 [44]
IFPC IFPC_L1 BK19 IFPD IFPD_L1 BP19
TXD1 GPU_D1# [48] TXD1 GPU_eDP_TXN1 [44]
TXD1 IFPC_L1 BJ19 GPU_D1 [48] TXD1 IFPD_L1 BR19 GPU_eDP_TXP1 [44]
IFPC_L0 BK20 TXD2 IFPD_L0 BT19 GPU_eDP_TXN0 [44]
TXD2 GPU_D2# [48]
IFPC_L0 BL20 IFPD_L0 BT20
+1V_GFX TXD2 GPU_D2 [48] +1V_GFX TXD2 GPU_eDP_TXP0 [44]
1.0V 0.4A
BF19 IFP_IOVDD BF22 IFP_IOVDD
BF20 IFP_IOVDD Near the GPU BF23 IFP_IOVDD

CG343 CG336 CG326 CG324 CG330 CG317


EV@4.7u/6.3V_4 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2

Under the GPU


Under the GPU
GPU_eDP_AUXN

GPU_eDP_AUXP

RG156 RG157
EV@100K_1%_2 EV@100K_1%_2
GPU_DDCDATA
GPU_DDCCLK

A A

RG154 RG155
*EV@100K_1%_2 *EV@100K_1%_2

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C Display-ABCD A1A

Date: Monday, March 21, 2022 Sheet 28 of 150


5 4 3 2 1
5 4 3 2 1

29
Option No support DP,remove

UG6U UG6V
Remove,No dupport DPIN
GN20-E7
BGA2714 JS-GN20 mini DP GN20-E7
BGA2714
COMMON
D
COMMON JS-GN20 D
10/24 IFPE 6/24 IFPF
DVI/HDMI DP

DVI/HDMI DP
RG57 *EV@1K_1%_2 IFPEF_RSET BH17 BJ11 INT_DP_AUXN
1.8V IFPEF_RSET SDA
SCL
IFPE_AUX
IFPE_AUX BK11 INT_DP_AUXP
IFPF_AUX BK10
+CORE_PLLVDD SDA
IFPF_AUX BJ10
SCL
IFPE_L3 BL13
+CORE_PLLVDD TXC DP_D3# [150]
R1040 *EV@0_5%_6 BH16 IFPEF_PLLVDD IFPE_L3 BM13 DP_D3 [150]
TXC
IFPF_L3 BP13
TXC
TXD0 IFPE_L2 BK13 IFPF_L3 BR13
DP_D2# [150] TXC
CG355 R1041 IFPE_L2 BJ13
EV@1u/10V_2 EV@10K_1%_2
TXD0

BK14
DP_D2 [150]
TXD0 IFPF_L2 BT13
BT14
TCP2
TXD1 IFPE_L1 DP_D1# [150] TXD0 IFPF_L2
BL14
IFPE
TXD1 IFPE_L1 DP_D1 [150] IFPF BR14
TXD1 IFPF_L1
TXD2 IFPE_L0 BL16 DP_D0# [150] IFPF_L1 BP14
+1V_GFX TXD1
TXD2 IFPE_L0 BM16
DP_D0 [150]
BP16
+1V_GFX
1.0V
1.0V 0.4A BG19
TXD2
TXD2
IFPF_L0
IFPF_L0 BR16
R1043 EV@0_5%_6 IFP_IOVDD
R1042 *EV@Short_0603 BG13 IFP_IOVDD BG20 IFP_IOVDD
BG14 IFP_IOVDD BG16 IFP_IOVDD
BG23 BG17
0.4A IFP_IOVDD
CG369 CG380 CG393 CG321
IFP_IOVDD

EV@4.7u/6.3V_4 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2


CG358
EV@1u/10V_2

Under GPU Near the GPU Under the GPU

C C

Option No support DP,remove


NC -->PT300SE no use +3V +3V

RG106 RG93
*EV@10K_1%_2 *EV@10K_1%_2

3
GC6 LOW 5
6

QG15A
RG94 *EV@0_5%_2 RG99 *EV@10K_1%_2 2 *EV@PJX138K CG401
[31,126] NVVDD_PGOOD

4
*EV@0.01u/10V_2
QG15B
*EV@PJX138K
1

+1.8V_AON
B 3V B
5

INT_DP_AUXN 4 3
INT_DP_AUXN_Q [150]
QG8A
*EV@2N7002KDW
RG74
*EV@100K_1%_2
2

INT_DP_AUXP 1 6
INT_DP_AUXP_Q [150]
QG8B
*EV@2N7002KDW
RG73
*EV@100K_1%_2

For DP port , prevent backdrive leakage current into GPU while HDMI mode

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C Display-EF A1A

Date: Thursday, May 26, 2022 Sheet 29 of 150


5 4 3 2 1
5 4 3 2 1

+CORE_PLLVDD
UG6X
GN20-E7
BGA2714
COMMON

13/24 XTAL/PLL
+1.8V_AON [25,26,31,32,35,38,39,40,41,45,48,126,130,131]

30
TO IFPx_PLLVDD +CORE_PLLVDD BG22 SP_PLLVDD

BG25 VID_PLLVDD UG6W


GN20-E7
CG338 CG342 BGA2714
COMMON
EV@1u/10V_2 EV@1u/10V_2 JS-GN20
14/24 MISC 2

STRAP0 BM5 STRAP0 ROM_CS BP7 ROM_CS


D D
STRAP1 BN5 STRAP1
STRAP2 BP4 STRAP2 ROM_SI BR7 ROM_SI
BF9 GPCADC_AVDD STRAP3 BP3 STRAP3 ROM_SO BT8 ROM_SO
STRAP4 BR3 STRAP4 ROM_SCLK BT7 ROM_SCLK
+1.8V_AON STRAP5 BR4 STRAP5

LG1 1 2 EV@HCB1005KF-330T30_3A +CORE_PLLVDD BF25 CORE_PLL_AVDD

CG306 CG299 CG339 CG344


EV@22u/6.3V_6 EV@4.7u/6.3V_4 EV@1u/10V_2 EV@1u/10V_2

XTALSSIN BK8 EXT_REFCLK_FL XTALOUTBUFF BP5 XTALOUTBUFF

BT5 XTALIN XTALOUT BR5 VGA_XTALOUT_R

RG146
EV@10K_1%_2 RG141
RG145 EV@100K_1%_2
*EV@Short_0201

VGA_XTALIN 1 3 VGA_XTALOUT XTALOUT_RC


2 4 RG148 *EV@Short_0201

CG520 YG1
EV@10p/25V_2 EV@27MHZ/10ppm CG519
EV@10p/25V_2 Description Size P/N GPU ROM_CS_R TPG52
Vendor
WND W25Q16JWSNIQ 16Mb AKE58ZN0N03 ROM_SO TPG50

C MAX MX25U1633FM1I 16Mb AKE58ZP0Z00 ROM_SI_R TPG54 C

ROM_SCLK_R TPG53

GPIO26_SPI_WP# TPG51

+1.8V_AON

0 1 2 3 4 5
+1.8V_AON +1.8V_AON

RG82 RG81 RG80 RG162 RG161 RG160


EV_XXX@100K_1%_2 EV_XXX@100K_1%_2 EV_XXX@100K_1%_2 EV@100K_1%_2 *EV@100K_1%_2 EV_DDS_GSYNC@100K_1%_2
RG116
STRAP0 EV@10K_1%_2
STRAP1 CG518
STRAP2 EV@0.1u/6.3V_2
UG7 GPIO26_SPI_WP# [32]
STRAP3
STRAP4 ROM_SI RG136 EV@33_1%_2 ROM_SI_R 5 8
STRAP5 ROM_SO 2 SPI_SI VCC RG122 EV@10K_1%_2 RG118 *EV@10K_1%_2
ROM_CS ROM_CS_R SPI_SO +1.8V_AON
RG121 EV@33_1%_2 1
ROM_SCLK RG135 EV@33_1%_2 ROM_SCLK_R 6 CS# 3
SPI_SCK WP#

RG77 RG72 RG71 RG153 RG152 RG151 4 7 RG133 EV@10K_1%_2


GND SPI_HOLD +1.8V_AON
EV_XXX@100K_1%_2 EV_XXX@100K_1%_2 EV_XXX@100K_1%_2 *EV@100K_1%_2 EV@100K_1%_2 EV_N_DDS_GSYNC_N@100K_1%_2

EV_XXX@VBIOS
sop8-5_99-1_27
AKE58ZP0Z00

B B

STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE ROM_SO ROM_SI ROM_SCLK FS_OVERT Strap
L L L 0 0 0 0 L L L FS_OVERT# function DISABLED

Non-GSYNC L L H 0 0 0 1 L L H FS_OVERT# function ENABLED(Default)

L H L 0 0 1 0
L H H 0 0 1 1
H L L 0 1 0 0
+1.8V_AON
GSYNC H L H 0 1 0 1

STRAP2 STRAP1 STRAP0


L H L RG138 RG117 RG142
*EV@100K_1%_2 *EV@10K_1%_2 EV@100K_1%_2
L L H ROM_SI
ROM_SO
L L L ROM_SCLK
L M L
H L H RG134 RG123 RG143
EV@100K_1%_2 EV@10K_1%_2 *EV@100K_1%_2

A
VRAM Table for GN20-E GDDR6 A

RAMCFG
[2:0] DESCRIPTION Vendor Vendor P/N TOP P/N QB P/N
2 (0x2) IC SGRAM(180P)H56C8H24AIR-S2C STNBS Hynix H56C8H24AIR-S2C AKG5QGUTW43
1 (0x1) IC SGRAM(180P)MT61K256M32JE(DC1940)STNBS Micron MT61K256M32JE AKG5QGDTL08
0 (0x0) IC SGRAM(180P)K4Z80325BC-HC(DC2001)STNBS Samsung K4Z80325BC-HC AKG58G0T519 Quanta Computer Inc.
9 (0x9) Samsung
PROJECT : ZGN
5 (0x5) IC SGRAM(180P) H56G32CS4DX005(BGA)STNBS Hynix C-die H56G32CS4DX005 AKG5QGUTW50
Size Document Number Rev
C Display-EF A1A

Date: Thursday, May 26, 2022 Sheet 30 of 150


5 4 3 2 1
5 4 3 2 1

(2) NVVDD ENABLE


(3) PEX_VDD_ENABLE (4) FBVDDQ ENABLE (1) 1V8_AON ENABLE
31
+1.8V_AON +1.8V_AON +1.8V

RG96 RG95
RG90 *EV@Short_0201 *EV@0_5%_2
*EV@10K_1%_2
D +1.8V +1.8V D
+1.8V
5

5
DGPU_PWR_EN 1 DGPU_PWR_EN 1 CG403
4 NVVDD_CORE1 4 EV@0.1u/6.3V_2
+1V_GFX_EN [131]

5
2 PEXVDD_EN_U 2
[32] NVVDD_EN DGPU_PWR_EN
UG8 CG525 UG9 2 2
[131] +1V_GFX_PG 4 [9] DGPU_PWR_EN 4
EV@NL17SZ08DFT2G EV@0.1u/6.3V_2 EV@NL17SZ08DFT2G
FBVDD_EN [130] 1V8_AON_EN [131]
3

3
GC6FBEN 1 PS_FBVDD_PGOOD 1
[31,32] GC6FBEN
UG2 UG3
EV@NL17SZ32DFT2G EV@NL17SZ32DFT2G

3
(DGPU_PWR_EN) --> 1V8_AON(VPP) -->(NVVDD_EN) --> NVVDD --> (NVVDD_PG) --> PEXVDD (1V_GFX) --> FBVDD --> (FBVDD_PG) --> (DGPU_PWROK_Q) --> (PEX_RST#)

NVVDD_CORE1

OVER TEMP. DG6


EV@RB500V-40
C 1 2 DG5 1 2 EV@RB500V-40 +1V_GFX_EN_1 [131] C
[32] DGPU_OVT#

[25,32] PEGX_RST#
DG4 2 EV@RB500V-40 NVVDD_CORE1_EN [126]
1
RG181
EV@10K_1%_2 RG83 EV@75K_1%_2
+1.8V_AON
3

RG89 CG400
NVVDD_PG_LOOP_OVT 2 QG20 R1034 *EV@75K_1%_4 *EV@12.1K_1%_2 R1035 EV@820p/50V_4
EV@PJE8406 *EV@12.1K_1%_4
3

RG182
6

EV@10K_1%_2 5

2 QG21A
[29,126] NVVDD_PGOOD PEXVDD_EN_U
QG21B EV@PJX138K DG3 1 2 EV@RB500V-40
4

EV@PJX138K
1

RG177 EV@100K_1%_2 RG179 R1036 CG528


*EV@12.1K_1%_2 *EV@12.1K_1%_4 EV@0.01u/50V_4
R1033 *EV@100K_1%_4
[31,32] GC6FBEN

NVVDD POWER GOOD LOOPBACK PEX_VDD_ENABLE


![ !(NVVDD_PGOOD || GC6FBEN) && (PEGX_RST#) ]
B B

POWER GOOD

+1.8V_AON

+1.8V RG87 RG98 *EV@Short_0201


EV@10K_1%_2
3V +1.8V 1.8V
DGPU_PWROK RG97 *EV@0_5%_2
+1.8V_AON DGPU_PWROK [25,31] +1.8V_AON
RG104
3

EV@10K_1%_2 QG13

2
QG14A EV@PJE8406
5 EV@PJX138K DGPU_PWROK_Q 3 1
[9] DGPU_PWROK_Q DGPU_PWROK [25,31]
RG88
DG1
6

EV@10K_1%_2
A NVVDD_PGOOD 1 A
4

3 2 CG405
2 *EV@0.1u/6.3V_2
[130] PS_FBVDD_PGOOD
QG14B
EV@PJX138K
1

EV@BAT54AW-L

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C POWER SEQ. A1A

Date: Monday, March 21, 2022 Sheet 31 of 150


5 4 3 2 1
5 4 3 2 1

PU/PD +1.8V_AON

32
MUX_CNTL_INTERNAL RG165 EV@10K_1%_2
LCD_BL_PWM GPIO3
UG6Q RG167 EV@100K_1%_2 GPIO7
LCD_VDD RG147 EV@10K_1%_2 iGPU_BL_EN RG175 EV@100K_1%_2
GN20-E7 GPIO11 GPIO13
BGA2714 LCD_BLEN RG149 EV@100K_1%_2 FRM_LCK# RG176 EV@10K_1%_2
GPIO21 GPIO5
COMMON PWM_SW_SELECT RG166 EV@10K_1%_2 GPIO16 NVVDD_EN
12/24 MISC 1 RG150 EV@10K_1%_2 GPIO4
THER_ALERT# RG128 EV@10K_1%_2 GPIO9
PWR_LEVEL RG174 EV@10K_1%_2 GPIO12
OVERT# BK7 OVERT I2CS_SCL BL8 GFx_SCL GC6FBEN RG180 EV@10K_1%_2 ADC_MUX_SEL RG54 EV@2.2K_1%_2 GPIO22
GFx_SDA GPIO1
I2CS_SDA BL7
MEM_VDD_CTRL RG65 EV@10K_1%_2 GPIO14_IFPA_HPD_TBT RG184 EV@10K_1%_2
MEM_VREF_CTL GPIO8 GPIO15_IFPB_HPD_TBT GPIO14
BG8 TS_VREF RG125 EV@100K_1%_2 GPIO10 RG183 EV@10K_1%_2
BM7 I2CC_SCL_GFX GPIO24_IFPF_HPD GPIO15
I2CC_SCL RG144 EV@10K_1%_2
BN7 I2CC_SDA_GFX FBVDD_PSI GPIO24
I2CC_SDA RG126 EV@10K_1%_2
GPIO25
I2CB_SCL_G RG105 EV@4.7K_1%_2
I2CB_SCL BN8 I2CB_SCL_G FBVDD_PSI RG127 *EV@10K_1%_2 I2CB_SDA_G RG79 EV@4.7K_1%_2
BM8 I2CB_SDA_G GPIO25 I2CC_SCL_GFX
I2CB_SDA RG84 EV@2K_1%_2
D
I2CC_SDA_GFX RG102 EV@2K_1%_2 D
GFx_SCL RG100 EV@2K_1%_2
TPG55 THERMDN BR8 THERMDN GFx_SDA RG86 EV@2K_1%_2

TPG57 THERMDP BP8 THERMDP

+3V
NVVDD_PWM_VID GPIO0 BP2 NVVDD_PWM_GPU
NVVDD_PWM_GPU [126]
DDS 3V
CG522 *EV@47p/25V_2 GC6_FB_EN GPIO1 BN3 GC6FBEN 1.8V
GC6FBEN [31]
BN2 5
[129] GPU_ADC_INP
BP10 ADC_IN
UNUSED
DISP_MUX_CNTL
GPIO2
GPIO3 BM4 MUX_CNTL_INTERNAL
NVVDD_EN
SMBUs (Level shift) MUX_CNTL_INTERNAL RG169 *EV@Short_0201 1
BR10 ADC_IN MSVDD_EN(Split Rail)/ NVVDD_EN(Merged Rail) GPIO4 BM3 4
[129] GPU_ADC_INN FRM_LCK# NVVDD_EN [31] MUX_CNTL [44]
FRAME_LOCK* GPIO5 BM2 RG173 *EV@Short_0201 2
NVVDD_PSI FRM_LCK# [45] MUX_CNTL [12,32] MUX_CTRL_PCH
CG521 *EV@47p/25V_2 NVVDD_PSI* GPIO6 BM1 UG11
LCD_BL_PWM NVVDD_PSI [126] TPG830 MUX_CNTL_INTERNAL
LCD_BL_PWM GPIO7 BL1 3 EV@M74VHC1GT32DFT2G
MEM_VDD_CTRL LCD_BL_PWM [44] TPG180 MUX_CTRL_PCH
MEM_VDD_CTL GPIO8 BK6 1.8V-By Design !! Take care "OR gate VIH" !!
THER_ALERT# MEM_VDD_CTRL [130] TPG220 PWM_SW_SELECT
THERM_ALERT* GPIO9 BK5
BK4 MEM_VREF_CTL TPG210 PWM_SW_SELECT_Q
MEM_VREF_CTL GPIO10 MEM_VREF_CTL [130]
TPG56 JTAG_TCK BP25 BK3 LCD_VDD TPG61 iGPU_BL_EN
JTAG_TCK LCD_VDD GPIO11 LCD_VDD [44]
TPG60 JTAG_TMS BN25 BK2 PWR_LEVEL TPG160
JTAG_TMS PWR_LEVEL GPIO12
TPG59 JTAG_TDI BT25 JTAG_TDI IGPU_BL_EN GPIO13 BK1 iGPU_BL_EN
TPG58 JTAG_TDO BR25 JTAG_TDO HPD_IFPA* GPIO14 BJ6 GPIO14_IFPA_HPD_TBT +3V
JTAG_TRST# BM25 BJ5 GPIO15_IFPB_HPD_TBT TPG834
RG67 EV@10K_1%_2 JTAG_TRST HPD_IFPB* or LED_BIN1 GPIO15 1.8V 3V
BJ4 PWM_SW_SELECT TPG833
DISP_MUX_PWM_CNTL GPIO16
HPD_IFPD* GPIO17 BJ3 GPIO17_IFPD_HPD_EDP iGPU info. dGPU the backlight status 5
BJ2 GPIO18_IFPE_HPD_DP TPG835 PWM_SW_SELECT
HPD_IFPE* GPIO18 RG172 *EV@Short_0201 1
JTAG_SEL BL25 BJ1 TPG831 4
TPG49 NVJTAG_SEL GPIO19 PWM_SW_SELECT_Q [44]
UNUSED GPIO20 BH1 RG170 *EV@Short_0201 2
LCD_BLEN +1.8V_AON [12,32] MUX_CTRL_PCH
LCD_BLEN GPIO21 BG7 UG10
ADC_MUX_SEL LCD_BLEN [44]
ADC_MUX_SEL GPIO22 BG6 3 EV@M74VHC1GT32DFT2G
ADC_MUX_SEL [129]
UNUSED GPIO23 BG5 1.8V-By Design !! Take care "OR gate VIH" !!
HPD_IFPF* GPIO24 BG4 GPIO24_IFPF_HPD
JTAG_SEL BG3 FBVDD_PSI TPG832

2
FBVDD_PSI* GPIO25
BG2 GPIO26_SPI_WP# FBVDD_PSI [130] 1.8V 3V
ROM_WP* GPIO26 GPIO26_SPI_WP# [30]
BG1 GPIO27_IFPC_HPD_HDMI iGPU_BL_EN 1 3
HPD_IFPC* GPIO27
BF1 TPG836 PCH_LVDS_BLON [2,44] 1.8V 3V
MSVDD_PWM_VID GPIO28
NVVDD_EN(Split Rail)/ NC (Merged Rail) GPIO29 BF2 QG25 RG85 *EV@Short_0201
BF3 [25,31,32] PEGX_RST#
RG66 MSVDD_PSI* GPIO30 EV@PJE8406
EV@10K_1%_2 UNUSED GPIO31 BF4

5
GPIO32 BF5
C GPIO33 BF6 C
GPIO34 BF7 I2CB_SCL_G 4 3
BF8 eDP_I2C_CLK [45]
UNUSED GPIO35
I2CB (Panel)

2
QG10A
EV@PJX138K
(for PSR) I2CB_SDA_G 1 6
eDP_I2C_DATA [45]
QG10B EV@PJX138K

+1.8V_AON
Remove,No dupport DPIN SMBUs (Level shift)
1.8V

RG48
EV@10K_1%_2 3V TBT DPI0 HPD RG103 *EV@Short_0201
GPIO17_IFPD_HPD_EDP
eDP HPD(For G-Sync) [25,31,32] PEGX_RST#

5
3

I2CC_SCL_GFX 4 3
2 GPIO17_IFPD_HPD_EDP_Q RG49 EV@100K_1%_2
ULT_EDP_HPD [44]
I2CC (GPU only) MBCLK1_GPU [86,126]

2
QG12A
(for OVR-PM Bus) EV@PJX138K
1

QG4 I2CC_SDA_GFX 1 6
MBDATA1_GPU [86,126]
EV@METR3904-G RG47 CG333
EV@100K_1%_2 *EV@220p/25V_2 1.8V QG12B +3V
EV@PJX138K
RG1 *EV@Short_0201
MBCLK1_OVRM [129]
RG2 *EV@Short_0201
MBDATA1_OVRM [129]

+1.8V_AON
From Conn. to GPU/PCH Remove,No dupport DPIN
B B
1.8V 1.8V 3V_LDO
RG59
EV@10K_1%_2 RG101 *EV@Short_0201
[25,31,32] PEGX_RST#
Mini-DP HPD TBT DPI1 HPD

5
GPIO18_IFPE_HPD_DP
3V
I2CS (System)
3

GFx_SCL 4 3
2 GPIO18_IFPE_HPD_DP_Q GPUT_CLK [86]
RG61 *EV@100K_1%_2
DP_HPD_PCH [2] (for Thermal reporint)

2
QG11A
EV@PJX138K
1

QG6 GFx_SDA 1 6
GPUT_DATA [86]
*EV@METR3904-G RG60 CG365
*EV@100K_1%_2 **EV@220p/25V_2 QG11B
EV@PJX138K

+1.8V_AON
Remove,No dupport DPIN GC6 2.1 FB enable (Level shift)-PCH DGPU THERMAL ALERT
1.8V
RG52
EV@10K_1%_2
HDMI-HPD
GPIO27_IFPC_HPD_HDMI TBT DPI2 HPD
3V +3V
3V
3

+1.8V_AON
2 GPIO27_IFPC_HPD_HDMI_Q RG55 EV@10K_1%_2
HDMI_HPD_GPU [48] GC6FBEN_Q [12]
RG171
1

*EV@10K_1%_2 1.8V 3V

2
QG5 RG53 CG360

3
EV@METR3904-G EV@100K_1%_2 *EV@220p/25V_2
2 THER_ALERT# 1 3 DGPU_THER_ALERT# [86]
A
QG22 A
1.8V *EV@2N7002K QG18 *EV@PJE8406

1
3

GC6FBEN 2 QG23
*EV@PJE8406
+1.8V_AON
1

GPU Throttling
PEGX_RST# [25,31,32]
2

OD - EC
+1.8V_AON RG129 EV@10K_1%_2 RG130 EV@10K_1%_2 +1.8V_AON
PWR_LEVEL 1 3
Quanta Computer Inc.
DGPU_OPP#_PROCHOT# [86]
2

OVERT# DGPU_OVT#
QG24 EV@PJE8406 PROJECT : ZGN
1 3 1.8V OD - Charger/ Type C
DGPU_OVT# [31]
RG168 *EV@0_5%_2 Size Document Number Rev
QG19
EV@PJE8406 2 1 Custom GPIO A1A
GPU_THROTTING# [73,112]
DG2 EV@RB500V-40
Date: Monday, March 21, 2022 Sheet 32 of 150
5 4 3 2 1
5 4 3 2 1

UG6G
UG6H
GN20-E7
UG6I
GN20-E7
BGA2714
UG6J
GN20-E7
BGA2714
33
COMMON COMMON
UG6F GN20-E7
BGA2714 JS-GN20
BGA2714 COMMON
GN20-E7 24/24 GND_5/5 23/24 GND_4/5
COMMON
BGA2714 21/24 GND_3/5
COMMON
16/24 GND_2/5 H7 GND GND R41 BR6 GND GND F30
15/24 GND_1/5 B39 GND GND BE6 H9 GND GND R42 BR9 GND GND F33
AK8 GND GND AR42 B41 GND GND BE8 J10 GND GND R43 BT2 GND GND F36
A2 GND GND AE35 AL13 GND GND AR43 B42 GND GND BF52 J17 GND GND R44 BT3 GND GND F39
A3 GND GND AE36 AL14 GND GND AR44 B44 GND GND BF54 J20 GND GND R47 C1 GND GND F4
A54 GND GND AE37 AL15 GND GND AR5 B45 GND GND BG12 J29 GND GND R49 C10 GND GND F42
A55 GND GND AE38 AL16 GND GND AR50 B47 GND GND BG15 J35 GND GND R51 C13 GND GND F45
D D
AA10 GND GND AE39 AL17 GND GND AR8 B48 GND GND BG18 J4 GND GND R53 C16 GND GND F47
AA13 GND GND AE40 AL18 GND GND AT10 B51 GND GND BG21 J49 GND GND R55 C19 GND GND F48
AA14 GND GND AE41 AL19 GND GND AT2 B55 GND GND BG24 J51 GND GND R6 C22 GND GND F51
AA15 GND GND AE42 AL2 GND GND AT4 B56 GND GND BG30 J53 GND GND R8 C25 GND GND F53
AA16 GND GND AE43 AL20 GND GND AT47 B6 GND GND BG33 J55 GND GND T2 C28 GND GND F55
AA17 GND GND AE44 AL21 GND GND AT49 B8 GND GND BG36 J6 GND GND T49 C31 GND GND F6
AA18 GND GND AE49 AL22 GND GND AT51 B9 GND GND BG39 J8 GND GND T52 C34 GND GND F9
AA19 GND GND AE52 AL23 GND GND AT53 BA14 GND GND BG42 K12 GND GND T54 C37 GND GND G11
AA2 GND GND AE54 AL24 GND GND AT55 BA15 GND GND BG49 K15 GND GND T7 C4 GND GND G14
AA20 GND GND AE7 AL25 GND GND AT6 BA16 GND GND BG55 K18 GND GND T9 C40 GND GND G17
AA21 GND GND AE9 AL26 GND GND AT8 BA17 GND GND BH2 K19 GND GND U10 C43 GND GND G20
AA22 GND GND AF10 AL27 GND GND AU14 BA18 GND GND BH4 K21 GND GND U13 C46 GND GND G23
AA23 GND GND AF3 AL28 GND GND AU15 BA19 GND GND BH51 K24 GND GND U14 C56 GND GND G26
AA24 GND GND AF48 AL29 GND GND AU16 BA20 GND GND BH53 K27 GND GND U15 C7 GND GND G29
AA25 GND GND AF5 AL30 GND GND AU17 BA21 GND GND BH55 K28 GND GND U16 D12 GND GND G32
AA26 GND GND AF50 AL31 GND GND AU18 BA22 GND GND BH6 K30 GND GND U17 D15 GND GND G35
AA27 GND GND AF55 AL32 GND GND AU19 BA23 GND GND BH8 K33 GND GND U18 D18 GND GND G38
AA28 GND GND AF8 AL33 GND GND AU2 BA24 GND GND BJ12 K36 GND GND U19 D21 GND GND G4
AA29 GND GND AG10 AL34 GND GND AU20 BA25 GND GND BJ14 K37 GND GND U20 D24 GND GND G41
AA30 GND GND AG13 AL35 GND GND AU21 BA26 GND GND BJ15 K39 GND GND U21 D27 GND GND G44
AA31 GND GND AG14 AL36 GND GND AU22 BA27 GND GND BJ17 K42 GND GND U22 D30 GND GND G49
AA32 GND GND AG15 AL37 GND GND AU23 BA28 GND GND BJ18 K45 GND GND U23 D33 GND GND G52
AA33 GND GND AG16 AL38 GND GND AU24 BA29 GND GND BJ20 K49 GND GND U24 D36 GND GND G54
AA34 GND GND AG17 AL39 GND GND AU25 BA30 GND GND BJ21 K52 GND GND U25 D39 GND GND G8
AA35 GND GND AG18 AL40 GND GND AU26 BA31 GND GND BJ23 K54 GND GND U26 D4 GND GND H10
AA36 GND GND AG19 AL41 GND GND AU27 BA32 GND GND BJ24 K7 GND GND U27 D42 GND GND H12
AA37 GND GND AG2 AL42 GND GND AU28 BA33 GND GND BJ31 K9 GND GND U28 D45 GND GND H13
AA38 GND GND AG20 AL43 GND GND AU29 BA34 GND GND BJ33 L10 GND GND U29 D48 GND GND H15
AA39 GND GND AG21 AL44 GND GND AU30 BA35 GND GND BJ35 L3 GND GND U3 D49 GND GND H16
AA4 GND GND AG22 AL49 GND GND AU31 BA36 GND GND BJ37 L5 GND GND U30 D51 GND GND H18
AA40 GND GND AG23 AL52 GND GND AU32 BA37 GND GND BJ39 L50 GND GND U31 D53 GND GND H19
AA41 GND GND AG24 AL54 GND GND AU33 BA38 GND GND BJ41 L55 GND GND U32 D6 GND GND H21
AA42 GND GND AG25 AL7 GND GND AU34 BA39 GND GND BJ43 L8 GND GND U33 D9 GND GND H22
AA43 GND GND AG26 AL9 GND GND AU35 BA40 GND GND BJ45 M10 GND GND U34 E10 GND GND H24
AA44 GND GND AG27 AM10 GND GND AU36 BA41 GND GND BJ53 M2 GND GND U35 E13 GND GND H25
AA47 GND GND AG28 AM3 GND GND AU37 BA42 GND GND BJ9 M4 GND GND U36 E16 GND GND H27
AA49 GND GND AG29 AM48 GND GND AU38 BA43 GND GND BK31 M47 GND GND U37 E19 GND GND H28
C AA51 GND GND AG30 AM5 GND GND AU39 BA50 GND GND BK33 M49 GND GND U38 E2 GND GND H3 C
AA53 GND GND AG31 AM50 GND GND AU40 BA55 GND GND BK35 M51 GND GND U39 E22 GND GND H30
AA55 GND GND AG32 AM55 GND GND AU41 BB47 GND GND BK37 M53 GND GND U40 E25 GND GND H32
AA6 GND GND AG33 AM8 GND GND AU42 BB49 GND GND BK39 M55 GND GND U41 E28 GND GND H33
AA8 GND GND AG34 AN10 GND GND AU43 BB51 GND GND BK41 M6 GND GND U42 E31 GND GND H34
AB47 GND GND AG35 AN13 GND GND AU49 BB53 GND GND BK43 M8 GND GND U43 E34 GND GND H36
AB49 GND GND AG36 AN14 GND GND AU52 BB55 GND GND BK45 N14 GND GND U44 E37 GND GND H37
AB52 GND GND AG37 AN15 GND GND AU54 BC14 GND GND BK54 N16 GND GND U48 E40 GND GND H39
AB54 GND GND AG38 AN16 GND GND AU7 BC15 GND GND BL12 N18 GND GND U5 E43 GND GND H4
AB7 GND GND AG39 AN17 GND GND AU9 BC16 GND GND BL15 N2 GND GND U50 E5 GND GND H40
AC13 GND GND AG4 AN18 GND GND AV10 BC17 GND GND BL18 N20 GND GND U55 E52 GND GND H42
AC14 GND GND AG40 AN19 GND GND AV3 BC18 GND GND BL2 N22 GND GND U8 E7 GND GND H43
AC15 GND GND AG41 AN2 GND GND AV5 BC19 GND GND BL21 N24 GND GND V10 F1 GND GND H45
AC16 GND GND AG42 AN20 GND GND AV50 BC20 GND GND BL24 N26 GND GND V2 F12 GND GND H46
AC17 GND GND AG43 AN21 GND GND AV8 BC21 GND GND BL30 N28 GND GND V4 F15 GND GND H47
AC18 GND GND AG44 AN22 GND GND AW10 BC22 GND GND BL32 N29 GND GND V47 F18 GND GND H48
AC19 GND GND AG47 AN23 GND GND AW14 BC23 GND GND BL34 N31 GND GND V49 F2 GND GND H50
AC20 GND GND AG49 AN24 GND GND AW15 BC24 GND GND BL36 N33 GND GND V51 F21 GND GND H55
AC21 GND GND AG51 AN25 GND GND AW16 BC25 GND GND BL38 N35 GND GND V53 F24 GND GND H6
AC22 GND GND AG53 AN26 GND GND AW17 BC26 GND GND BL4 N37 GND GND V55 F27 GND
AC23 GND GND AG55 AN27 GND GND AW18 BC27 GND GND BL40 N39 GND GND V6
AC24 GND GND AG6 AN28 GND GND AW19 BC28 GND GND BL42 N41 GND GND V8
AC25 GND GND AG8 AN29 GND GND AW2 BC29 GND GND BL44 N43 GND GND W13
AC26 GND GND AH2 AN30 GND GND AW20 BC30 GND GND BL46 N48 GND GND W14
AC27 GND GND AH47 AN31 GND GND AW21 BC31 GND GND BL55 N52 GND GND W15
AC28 GND GND AH49 AN32 GND GND AW22 BC32 GND GND BL6 N54 GND GND W16
AC29 GND GND AH52 AN33 GND GND AW23 BC33 GND GND BL9 N7 GND GND W17
AC3 GND GND AH54 AN34 GND GND AW24 BC34 GND GND BM14 P3 GND GND W18
AC30 GND GND AH7 AN35 GND GND AW25 BC35 GND GND BM17 P5 GND GND W19
AC31 GND GND AJ13 AN36 GND GND AW26 BC36 GND GND BM20 P50 GND GND W20
AC32 GND GND AJ14 AN37 GND GND AW27 BC37 GND GND BM23 P55 GND GND W21
AC33 GND GND AJ15 AN38 GND GND AW28 BC38 GND GND BM30 P8 GND GND W22
AC34 GND GND AJ16 AN39 GND GND AW29 BC39 GND GND BM32 R10 GND GND W23
AC35 GND GND AJ17 AN4 GND GND AW30 BC40 GND GND BM34 R13 GND GND W24
AC36 GND GND AJ18 AN40 GND GND AW31 BC41 GND GND BM36 R14 GND GND W25
AC37 GND GND AJ19 AN41 GND GND AW32 BC42 GND GND BM38 R15 GND GND W26
AC38 GND GND AJ20 AN42 GND GND AW33 BC43 GND GND BM40 R16 GND GND W27
AC39 GND GND AJ21 AN43 GND GND AW34 BC49 GND GND BM42 R17 GND GND W28
B B
AC40 GND GND AJ22 AN44 GND GND AW35 BC52 GND GND BM44 R18 GND GND W29
AC41 GND GND AJ23 AN47 GND GND AW36 BC54 GND GND BM46 R19 GND GND W30
AC42 GND GND AJ24 AN49 GND GND AW37 BD15 GND GND BM48 R2 GND GND W31
AC43 GND GND AJ25 AN51 GND GND AW38 BD16 GND GND BN10 R20 GND GND W32
AC44 GND GND AJ26 AN53 GND GND AW39 BD19 GND GND BN11 R21 GND GND W33
AC5 GND GND AJ27 AN55 GND GND AW4 BD20 GND GND BN12 R22 GND GND W34
AC50 GND GND AJ28 AN6 GND GND AW40 BD23 GND GND BN13 R23 GND GND W35
AC55 GND GND AJ29 AN8 GND GND AW41 BD24 GND GND BN14 R24 GND GND W36
AC8 GND GND AJ3 AP2 GND GND AW42 BD27 GND GND BN15 R25 GND GND W37
AD10 GND GND AJ30 AP49 GND GND AW43 BD30 GND GND BN16 R26 GND GND W38
AD2 GND GND AJ31 AP52 GND GND AW47 BD33 GND GND BN17 R27 GND GND W39
AD4 GND GND AJ32 AP54 GND GND AW49 BD34 GND GND BN18 R28 GND GND W40
AD47 GND GND AJ33 AP7 GND GND AW51 BD37 GND GND BN19 R29 GND GND W41
AD49 GND GND AJ34 AR13 GND GND AW53 BD38 GND GND BN20 R30 GND GND W42
AD51 GND GND AJ35 AR14 GND GND AW55 BD41 GND GND BN21 R31 GND GND W43
AD53 GND GND AJ36 AR15 GND GND AW6 BD42 GND GND BN22 R32 GND GND W44
AD55 GND GND AJ37 AR16 GND GND AW8 BD48 GND GND BN23 R33 GND GND W52
AD6 GND GND AJ38 AR17 GND GND AY47 BD50 GND GND BN24 R34 GND GND W54
AD8 GND GND AJ39 AR18 GND GND AY49 BD55 GND GND BN30 R35 GND GND W7
AE13 GND GND AJ40 AR19 GND GND AY52 BE10 GND GND BN31 R36 GND GND Y3
AE14 GND GND AJ41 AR20 GND GND AY54 BE2 GND GND BN32 R37 GND GND Y48
AE15 GND GND AJ42 AR21 GND GND B1 BE4 GND GND BN33 R38 GND GND Y5
AE16 GND GND AJ43 AR22 GND GND B11 BE49 GND GND BN34 R39 GND GND Y50
AE17 GND GND AJ44 AR23 GND GND B12 BE51 GND GND BN35 R4 GND GND Y55
AE18 GND GND AJ5 AR24 GND GND B14 BE53 GND GND BN36 R40 GND GND Y8
AE19 GND GND AJ50 AR25 GND GND B15 BE55 GND GND BR30
AE2 GND GND AJ55 AR26 GND GND B17
AE20 GND GND AJ8 AR27 GND GND B18
AE21 GND GND AK10 AR28 GND GND B2
AE22 GND GND AK2 AR29 GND GND B21
AE23 GND GND AK4 AR3 GND GND B24
AE24 GND GND AK47 AR30 GND GND B26
AE25 GND GND AK49 AR31 GND GND B27
AE26 GND GND AK51 AR32 GND GND B29
AE27 GND GND AK53 AR33 GND GND B30
AE28 GND GND AK55 AR34 GND GND B32
AE29 GND GND AK6 AR35 GND GND B33
A AE30 GND GND B38 AR36 GND GND B35 A
AE31 GND GND BH13 AR37 GND GND B36
AE32 GND AR38 GND GND AR40
AE33 GND AR39 GND GND AR41
AE34 GND

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C GND A1A

Date: Monday, March 21, 2022 Sheet 33 of 150


5 4 3 2 1
5 4 3 2 1

UG6M
GN20-E7
BGA2714
UG6N
GN20-E7
BGA2714
NVVDD [126,127]
+1V_GFX [25,28,29,131]

UG6K
GN20-E7
BGA2714
NVVDD
UG6L
GN20-E7
BGA2714 NVVDD
Near GPU 34
COMMON NVVDD COMMON NVVDD COMMON COMMON NVVDD 3+1=4 X 330u
NVVDD 17/24 VDD_1/2
NVVDD 18/24 VDD_2/2 11/24 XVDD 22/24 VDDMS
CG171 EV@330U_2.5V_3528H2.1_max
AB14 VDD VDD AF29 AK38 VDD VDD AP39 CONFIGURABLE AY27 VDDMS VDDMS AB13

+
AB15 VDD VDD AF30 AK39 VDD VDD AP40 POWER CHANNELS AY28 VDDMS VDDMS AB44
AB16 AF31 AK40 AP41 NVVDD AY29 AD13 CG202 EV@560u/2V_7343H1.9

+
VDD VDD VDD VDD (NC on substrate) VDDMS VDDMS
AB17 VDD VDD AF32 AK41 VDD VDD AP42 NVVDD AY30 VDDMS VDDMS AD44
AB18 VDD VDD AF33 AK42 VDD VDD AP43 AY31 VDDMS VDDMS AF13
AB19 AF34 AK43 P14 AY32 AF44 CG201 EV@330u/2V_7343H1.9

+
VDD VDD VDD VDD VDDMS VDDMS
AB20 VDD VDD AF35 AM14 VDD VDD P15 AY1 XVDD_1 XVDD_88 BT52 AY33 VDDMS VDDMS AH13
D D
AB21 VDD VDD AF36 AM15 VDD VDD P16 AY2 XVDD_2 XVDD_89 BR52 AY34 VDDMS VDDMS AH44
AB22 VDD VDD AF37 AM16 VDD VDD P17 AY3 XVDD_3 XVDD_90 BN50 AY35 VDDMS VDDMS AK13 CG170 EV@330U_2.5V_3528H2.1_max
AB23 VDD VDD AF38 AM17 VDD VDD P18 AY4 XVDD_4 XVDD_91 BM49 AY36 VDDMS VDDMS AK44

+
AB24 VDD VDD AF39 AM18 VDD VDD P19 AY5 XVDD_5 XVDD_92 BL48 AY37 VDDMS VDDMS AM13
AB25 VDD VDD AF40 AM19 VDD VDD P20 AY6 XVDD_6 XVDD_93 BK47 AY38 VDDMS VDDMS AM44
AB26 VDD VDD AF41 AM20 VDD VDD P21 AY7 XVDD_7 XVDD_94 BJ46 AY39 VDDMS VDDMS AP13
AB27 VDD VDD AF42 AM21 VDD VDD P22 AY8 XVDD_8 AY40 VDDMS VDDMS AP44 NVVDD
AB28 VDD VDD AF43 AM22 VDD VDD P23 AY9 XVDD_9 AY41 VDDMS VDDMS AT13 NVVDD
AB29 VDD VDD AH14 AM23 VDD VDD P24 AY10 XVDD_10 XVDD_95
BT54 AY42 VDDMS VDDMS AT14 4+3=7 X 47u 37+29=66 X 1u
AB30 VDD VDD AH15 AM24 VDD VDD P25 AY11 XVDD_11 XVDD_96 BR53 AY43 VDDMS VDDMS AT15
AB31 VDD VDD AH16 AM25 VDD VDD P26 XVDD_97 BP52 AY44 VDDMS VDDMS AT16 CG180 EV@47u/6.3V_8 CG289 EV@1u/10V_2
AB32 VDD VDD AH17 AM26 VDD VDD P27 XVDD_98 BN51 BA13 VDDMS VDDMS AT17 CG211 EV@47u/6.3V_8 CG222 EV@1u/10V_2
AB33 VDD VDD AH18 AM27 VDD VDD P28 BA1 XVDD_12 XVDD_99 BM50 BA44 VDDMS VDDMS AT18 CG166 EV@47u/6.3V_8 CG283 EV@1u/10V_2
AB34 VDD VDD AH19 AM28 VDD VDD P29 BA2 XVDD_13 XVDD_100 BL49 BB13 VDDMS VDDMS AT19 CG181 EV@47u/6.3V_8 CG268 EV@1u/10V_2
AB35 VDD VDD AH20 AM29 VDD VDD P30 BA3 XVDD_14 XVDD_101 BJ47 BB14 VDDMS VDDMS AT20 CG300 EV@1u/10V_2
AB36 VDD VDD AH21 AM30 VDD VDD P31 BA4 XVDD_15 XVDD_102 BH46 BB15 VDDMS VDDMS AT21 CG304 EV@1u/10V_2
AB37 VDD VDD AH22 AM31 VDD VDD P32 BA5 XVDD_16 XVDD_103 BG45 BB16 VDDMS VDDMS AT22 CG193 EV@47u/6.3V_8 CG113 EV@1u/10V_2
AB38 VDD VDD AH23 AM32 VDD VDD P33 BA6 XVDD_17 XVDD_104 BF44 BB17 VDDMS VDDMS AT23 CG168 EV@47u/6.3V_8 CG150 EV@1u/10V_2
AB39 VDD VDD AH24 AM33 VDD VDD P34 BA7 XVDD_18 BB18 VDDMS VDDMS AT24 CG195 EV@47u/6.3V_8 CG151 EV@1u/10V_2
AB40 VDD VDD AH25 AM34 VDD VDD P35 BA8 XVDD_19 BB19 VDDMS VDDMS AT25 CG147 EV@1u/10V_2
AB41 VDD VDD AH26 AM35 VDD VDD P36 BA9 XVDD_20 XVDD_105 BT55 BB20 VDDMS VDDMS AT26 12+11=23 X 10u CG149 EV@1u/10V_2
AB42 VDD VDD AH27 AM36 VDD VDD P37 BA10 XVDD_21 XVDD_106 BR54 BB21 VDDMS VDDMS AT27 CG241 EV@10u/6.3V_4 CG140 EV@1u/10V_2
AB43 VDD VDD AH28 AM37 VDD VDD P38 BA11 XVDD_22 XVDD_107 BP53 BB22 VDDMS VDDMS AT28 CG227 EV@10u/6.3V_4 CG117 EV@1u/10V_2
AD14 VDD VDD AH29 AM38 VDD VDD P39 XVDD_108 BN52 BB23 VDDMS VDDMS AT29 CG258 EV@10u/6.3V_4 CG103 EV@1u/10V_2
AD15 VDD VDD AH30 AM39 VDD VDD P40 XVDD_109 BL50 BB24 VDDMS VDDMS AT30 CG225 EV@10u/6.3V_4 CG115 EV@1u/10V_2
AD16 VDD VDD AH31 AM40 VDD VDD P41 BB2 XVDD_23 XVDD_110 BK49 BB25 VDDMS VDDMS AT31 CG238 EV@10u/6.3V_4 CG205 EV@1u/10V_2
AD17 VDD VDD AH32 AM41 VDD VDD P42 BB4 XVDD_24 XVDD_111 BJ48 BB26 VDDMS VDDMS AT32 CG239 EV@10u/6.3V_4 CG217 EV@1u/10V_2
AD18 VDD VDD AH33 AM42 VDD VDD P43 BB6 XVDD_25 XVDD_112 BH47 BB27 VDDMS VDDMS AT33 CG229 EV@10u/6.3V_4 CG183 EV@1u/10V_2
AD19 VDD VDD AH34 AM43 VDD VDD T14 BB8 XVDD_26 XVDD_113 BG46 BB28 VDDMS VDDMS AT34 CG252 EV@10u/6.3V_4 CG176 EV@1u/10V_2
AD20 VDD VDD AH35 AP14 VDD VDD T15 BB10 XVDD_27 BB29 VDDMS VDDMS AT35 CG274 EV@10u/6.3V_4 CG284 EV@1u/10V_2
AD21 VDD VDD AH36 AP15 VDD VDD T16 BB30 VDDMS VDDMS AT36 CG210 EV@10u/6.3V_4 CG188 EV@1u/10V_2
AD22 VDD VDD AH37 AP16 VDD VDD T17 XVDD_114 BR55 BB31 VDDMS VDDMS AT37 CG273 EV@10u/6.3V_4 CG301 EV@1u/10V_2
AD23 VDD VDD AH38 AP17 VDD VDD T18 BC1 XVDD_28 XVDD_115 BP54 BB32 VDDMS VDDMS AT38 CG257 EV@10u/6.3V_4 CG316 EV@1u/10V_2
AD24 VDD VDD AH39 AP18 VDD VDD T19 BC2 XVDD_29 XVDD_116 BN53 BB33 VDDMS VDDMS AT39 CG259 EV@10u/6.3V_4 CG311 EV@1u/10V_2
AD25 VDD VDD AH40 AP19 VDD VDD T20 BC3 XVDD_30 XVDD_117 BM52 BB34 VDDMS VDDMS AT40 CG272 EV@10u/6.3V_4 CG298 EV@1u/10V_2
AD26 VDD VDD AH41 AP20 VDD VDD T21 BC4 XVDD_31 XVDD_118 BL51 BB35 VDDMS VDDMS AT41 CG269 EV@10u/6.3V_4 CG310 EV@1u/10V_2
AD27 VDD VDD AH42 AP21 VDD VDD T22 BC5 XVDD_32 XVDD_119 BK50 BB36 VDDMS VDDMS AT42 CG256 EV@10u/6.3V_4 CG313 EV@1u/10V_2
C AD28 VDD VDD AH43 AP22 VDD VDD T23 BC6 XVDD_33 XVDD_120 BJ49 BB37 VDDMS VDDMS AT43 CG242 EV@10u/6.3V_4 CG287 EV@1u/10V_2 C
AD29 VDD VDD AK14 AP23 VDD VDD T24 BC7 XVDD_34 XVDD_121 BG47 BB38 VDDMS VDDMS AT44 CG255 EV@10u/6.3V_4 CG294 EV@1u/10V_2
AD30 VDD VDD AK15 AP24 VDD VDD T25 BC8 XVDD_35 XVDD_122 BF46 BB39 VDDMS VDDMS AU13 CG228 EV@10u/6.3V_4 CG309 EV@1u/10V_2
AD31 VDD VDD AK16 AP25 VDD VDD T26 BC9 XVDD_36 BB40 VDDMS VDDMS AU44 CG243 EV@10u/6.3V_4 CG295 EV@1u/10V_2
AD32 VDD VDD AK17 AP26 VDD VDD T27 BC10 XVDD_37 BB41 VDDMS VDDMS AV13 CG270 EV@10u/6.3V_4 CG267 EV@1u/10V_2
AD33 VDD VDD AK18 AP27 VDD VDD T28 BC11 XVDD_38 XVDD_123 BR56 BB42 VDDMS VDDMS AV14 CG223 EV@10u/6.3V_4 CG231 EV@1u/10V_2
AD34 VDD VDD AK19 AP28 VDD VDD Y34 XVDD_124 BP55 BB43 VDDMS VDDMS AV15 CG226 EV@10u/6.3V_4 CG145 EV@1u/10V_2
AD35 VDD VDD AK20 AP29 VDD VDD Y35 XVDD_125 BN54 BB44 VDDMS VDDMS AV16 CG288 EV@1u/10V_2
AD36 VDD VDD AK21 AP30 VDD VDD Y36 BD1 XVDD_39 XVDD_126 BM53 BC13 VDDMS VDDMS AV17 2 X 4.7u CG312 EV@1u/10V_2
AD37 VDD VDD AK22 AP31 VDD VDD Y37 BD2 XVDD_40 XVDD_127 BK51 BC44 VDDMS VDDMS AV18 CG340 EV@1u/10V_2
AD38 VDD VDD AK23 AP32 VDD VDD Y38 BD3 XVDD_41 XVDD_128 BJ50 BD13 VDDMS VDDMS AV19 CG271 EV@4.7u/6.3V_4 CG341 EV@1u/10V_2
AD39 VDD VDD AK24 AP33 VDD VDD Y39 BD4 XVDD_42 XVDD_129 BH49 BD14 VDDMS VDDMS AV20 CG240 EV@4.7u/6.3V_4 CG260 EV@1u/10V_2
AD40 VDD VDD AK25 AP34 VDD VDD Y40 BD5 XVDD_43 XVDD_130 BG48 BD17 VDDMS VDDMS AV21 CG186 EV@1u/10V_2
AD41 VDD VDD AK26 AP35 VDD VDD Y41 BD6 XVDD_44 XVDD_131 BF47 BD18 VDDMS VDDMS AV22 CG138 EV@1u/10V_2
AD42 VDD VDD AK27 AP36 VDD VDD Y42 BD7 XVDD_45 BD21 VDDMS VDDMS AV23 CG282 EV@1u/10V_2
AD43 VDD VDD AK28 AP37 VDD VDD Y43 BD8 XVDD_46 BD22 VDDMS VDDMS AV24 CG254 EV@1u/10V_2
AF14 VDD VDD AK29 AP38 VDD BD9 XVDD_47 XVDD_132 BP56 BD25 VDDMS VDDMS AV25 CG218 EV@1u/10V_2
AF15 VDD VDD AK30 BD10 XVDD_48 XVDD_133 BN55 BD26 VDDMS VDDMS AV26 CG237 EV@1u/10V_2
AF16 VDD VDD AK31 BD11 XVDD_49 XVDD_134 BM54 BD28 VDDMS VDDMS AV27 CG285 EV@1u/10V_2
AF17 VDD VDD AK32 XVDD_135 BL53 BD29 VDDMS VDDMS AV28 CG302 EV@1u/10V_2
AF18 VDD VDD AK33 VDD_SENSE BT48 VGPU_CORE_SENSE [34,126] XVDD_136 BK52 BD31 VDDMS VDDMS AV29 CG126 EV@1u/10V_2
AF19 VDD VDD AK34 GND_SENSE BR48 +1V_GFX XVDD_137 BJ51 BD32 VDDMS VDDMS AV30 CG114 EV@1u/10V_2
VSS_GPU_SENSE [34,126]
AF20 VDD VDD AK35 XVDD_138 BF48 BD35 VDDMS VDDMS AV31 CG142 EV@1u/10V_2
AF21 VDD VDD AK36 BT26 XVDD_50 XVDD_139 BE47 BD36 VDDMS VDDMS AV32 CG122 EV@1u/10V_2
AF22 VDD VDD AK37 BR26 XVDD_51 XVDD_140 BD46 BD39 VDDMS VDDMS AV33 CG133 EV@1u/10V_2
AF23 VDD VDD V29 BP26 XVDD_52 BD40 VDDMS VDDMS AV34 CG135 EV@1u/10V_2
AF24 VDD VDD V30 BN26 XVDD_53 BD43 VDDMS VDDMS AV35 CG132 EV@1u/10V_2
AF25 VDD VDD V31 BM26 XVDD_54 BD44 VDDMS VDDMS AV36 CG125 EV@1u/10V_2
AF26 VDD VDD V32 BL26 XVDD_55 N13 VDDMS VDDMS AV37 CG134 EV@1u/10V_2
AF27 VDD VDD V33 BK26 XVDD_56 N15 VDDMS VDDMS AV38 CG148 EV@1u/10V_2
AF28 VDD VDD V34 BJ26 XVDD_57 N17 VDDMS VDDMS AV39 CG246 EV@1u/10V_2
T29 VDD VDD V35 BH26 XVDD_58 N19 VDDMS VDDMS AV40 CG200 EV@1u/10V_2
T30 VDD VDD V36 BG26 XVDD_59 N21 VDDMS VDDMS AV41 CG160 EV@1u/10V_2
T31 VDD VDD V37 BF26 XVDD_60 N23 VDDMS VDDMS AV42 CG111 EV@1u/10V_2
T32 VDD VDD V38 N25 VDDMS VDDMS AV43 CG297 EV@1u/10V_2
T33 VDD VDD V39 N27 VDDMS VDDMS AV44 CG286 EV@1u/10V_2
T34 VDD VDD V40 BR27 XVDD_61 N30 VDDMS VDDMS AW13 CG307 EV@1u/10V_2
T35 VDD VDD V41 BN27 XVDD_62 N32 VDDMS VDDMS AW44 CG296 EV@1u/10V_2
B B
T36 VDD VDD V42 BL27 XVDD_63 N34 VDDMS VDDMS AY13 CG314 EV@1u/10V_2
T37 VDD VDD V43 BJ27 XVDD_64 N36 VDDMS VDDMS AY14
T38 VDD VDD Y14 BG27 XVDD_65 N38 VDDMS VDDMS AY15
T39 VDD VDD Y15 N40 VDDMS VDDMS AY16
T40
T41
T42
VDD
VDD
VDD
VDD
VDD
VDD
Y16
Y17
Y18
BT28
BR28
XVDD_66
XVDD_67
N42
N44
P13
VDDMS
VDDMS
VDDMS
VDDMS
VDDMS
VDDMS
AY17
AY18
AY19
Under GPU
T43 VDD VDD Y19 BP28 XVDD_68 P44 VDDMS VDDMS AY20
V14 VDD VDD Y20 BN28 XVDD_69 T13 VDDMS VDDMS AY21
V15 VDD VDD Y21 BM28 XVDD_70 T44 VDDMS VDDMS AY22
V16 VDD VDD Y22 BL28 XVDD_71 V13 VDDMS VDDMS AY23
V17 VDD VDD Y23 BK28 XVDD_72 V44 VDDMS VDDMS AY24
V18 VDD VDD Y24 BJ28 XVDD_73 Y13 VDDMS VDDMS AY25
V19 VDD VDD Y25 BH28 XVDD_74 Y44 VDDMS VDDMS AY26
V20 VDD VDD Y26 BG28 XVDD_75
V21 VDD VDD Y27 BF28 XVDD_76
V22 VDD VDD Y28
V23 VDD VDD Y29
V24 VDD VDD Y30 BT29 XVDD_77 VDDMS_SENSE BP49 VDDMS_SENSE RG140 *EV@0_5%_2
GNDMS_SENSE VGPU_CORE_SENSE [34,126]
V25 VDD VDD Y31 BR29 XVDD_78 GNDMS_SENSE BR49 RG139 *EV@0_5%_2 VSS_GPU_SENSE [34,126]
V26 VDD VDD Y32 BP29 XVDD_79
V27 VDD VDD Y33 BN29 XVDD_80
V28 VDD BM29 XVDD_81
BL29 XVDD_82
BK29 XVDD_83
BJ29 XVDD_84
BH29 XVDD_85
BG29 XVDD_86
BF29 XVDD_87

NVVDD MSVDD
UNDER GPU UNDER GPU
[37x1uF + 2x4.7uF + 12x10uF + 4x47uF] [29x1uF + 11x10uF + 3x47uF]
Col-ayout Col-ayout
A
NVVDD +1V_GFX
[3x330uF] [1x330uF] A

or or
CG548 15p/25V_2 CG551 *15p/25V_2 [12x1uF + 3x4.7uF + 3x10uF + 16x47uF] [4x10uF + 4x47uF]
CG549 15p/25V_2 CG554 *3.3p/25V_2

CG550 15p/25V_2

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C POWER A1A

Date: Thursday, May 26, 2022 Sheet 34 of 150


5 4 3 2 1
5 4 3 2 1

35
+1.8V_AON [25,26,30,31,32,38,39,40,41,45,48,126,130,131]
+FBVDDQ_MEM [26,27,38,39,40,41,130]

UG6P
GN20-E7
+FBVDDQ_MEM
Under GPU UG6O
BGA2714
COMMON
8 X 10u 24 X 1u GN20-E7
+1.8V_AON
BGA2714
D +FBVDDQ_MEM +FBVDDQ_MEM COMMON D

AB11
19/24 FBVDDQ

L19
CG209 EV@10u/6.3V_4 20/24 NC/1V8 Under GPU NEAR GPU
FBVDDQ FBVDDQ 5 X 10u 9 X 22u CG179 EV@10u/6.3V_4
AB46 FBVDDQ FBVDDQ L20 CG121 EV@10u/6.3V_4 AV1 NC 1V8 BF10
AC11 FBVDDQ FBVDDQ L22 CG441 EV@10u/6.3V_4 CG214 EV@10u/6.3V_4 AV2 NC 1V8 BF11
AE46 FBVDDQ FBVDDQ L23 CG442 EV@10u/6.3V_4 CG169 EV@10u/6.3V_4 BG9 NC 1V8 BG10
AF11 FBVDDQ FBVDDQ L25 CG439 EV@10u/6.3V_4 CG164 EV@10u/6.3V_4 BH10 NC 1V8 BG11 CG346 CG348 CG327 CG323 CG347 CG328 CG329
AF46 FBVDDQ FBVDDQ L26 CG109 EV@10u/6.3V_4 CG102 EV@10u/6.3V_4 BH11 NC EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@4.7u/6.3V_4 EV@4.7u/6.3V_4
AH11 FBVDDQ FBVDDQ L28 CG157 EV@10u/6.3V_4 CG215 EV@10u/6.3V_4 BH14 NC
AH46 FBVDDQ FBVDDQ L29 BJ16 NC
AJ11 FBVDDQ FBVDDQ L31 BJ7 NC
AJ46 FBVDDQ FBVDDQ L32 CG104 EV@1u/10V_2 BJ8 NC RSVD_1 A4
AL11 FBVDDQ FBVDDQ L34 CG244 EV@22u/6.3V_6 CG107 EV@1u/10V_2 BK16 NC RSVD_2 A53
AL46 FBVDDQ FBVDDQ L37 CG45 EV@22u/6.3V_6 CG248 EV@1u/10V_2 BN49 NC RSVD_3 BN1
AM11 FBVDDQ FBVDDQ L38 CG105 EV@22u/6.3V_6 CG232 EV@1u/10V_2 BP50 NC RSVD_4 BN56
AM46 FBVDDQ FBVDDQ L40 CG443 EV@22u/6.3V_6 CG119 EV@1u/10V_2 BR50 NC RSVD_5 BT4
AP11 FBVDDQ FBVDDQ L41 CG440 EV@22u/6.3V_6 CG187 EV@1u/10V_2 BR51 NC RSVD_6 BT53
AR11 FBVDDQ FBVDDQ L43 CG5 EV@22u/6.3V_6 CG100 EV@1u/10V_2 BT51 NC RSVD_7 D1
AR46 FBVDDQ FBVDDQ L44 CG279 EV@22u/6.3V_6 CG97 EV@1u/10V_2 D50 NC RSVD_8 D56
AU11 FBVDDQ FBVDDQ L46 CG452 EV@22u/6.3V_6 CG108 EV@1u/10V_2 E50 NC
AU46 FBVDDQ FBVDDQ N11 CG453 EV@22u/6.3V_6 CG276 EV@1u/10V_2 F50 NC +1.8V_AON
AV11 FBVDDQ FBVDDQ N46 CG251 EV@1u/10V_2 G50 NC
AV46 FBVDDQ FBVDDQ P11 CG124 EV@1u/10V_2 G6 NC
AY46 FBVDDQ FBVDDQ P46 CG265 EV@1u/10V_2 N49 NC FUSE_SRC BH25 +FP_FUSE_GPU RG64 *EV@Short_0402
BA46 FBVDDQ FBVDDQ T11 CG293 EV@1u/10V_2
BC46 FBVDDQ FBVDDQ U11 CG281 EV@1u/10V_2
K10 FBVDDQ FBVDDQ U46 CG212 EV@1u/10V_2 CG392
L11 FBVDDQ FBVDDQ W11 CG199 EV@1u/10V_2 EV@2.2u/10V_4
L13 FBVDDQ FBVDDQ W46 CG191 EV@1u/10V_2
L14
L16
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
Y11
Y46 Near GPU CG112
CG216
CG235
EV@1u/10V_2
EV@1u/10V_2
EV@1u/10V_2
CG93 EV@1u/10V_2
CG96 EV@1u/10V_2
CG92 EV@1u/10V_2

C
1V8 C

E54 FBVDDQ_SENSE
FBVDDQ_SENSE FBVDDQ_SENSE [130] UNDER GPU
[2x1uF]
W49 FB_VREF_PROBE
NEAR GPU
FB_VREF RG30 EV@2.49K_1%_2
[3x1uF + 2x4.7uF]
CG165 EV@3.3p/25V_2

FB_CAL_PD_VDDQ W47 FB_CAL_PD_VDDQ RG34 EV@40.2_1%_2 +FBVDDQ_MEM

FB_CAL_PU_GND Y47 FB_CAL_PU_GND RG35 EV@40.2_1%_2 +1.8V_AON +FBVDDQ_MEM +FBVDDQ_MEM

FB_CALTERM_GND W48 FB_CAL_TERM_GND RG31 EV@40.2_1%_2 CG529 *15p/25V_2 CG537 15p/25V_2 CG545 15p/25V_2

CG530 *15p/25V_2 CG538 15p/25V_2 CG546 15p/25V_2

CG531 *15p/25V_2 CG539 15p/25V_2 CG547 15p/25V_2


PLACE CLOSE TO GPU BALLS
CG532 *15p/25V_2 CG540 15p/25V_2

CG533 *15p/25V_2 CG541 15p/25V_2

CG534 *15p/25V_2 CG542 15p/25V_2

CG535 *15p/25V_2 CG543 15p/25V_2

CG536 *15p/25V_2 CG544 15p/25V_2

CG555 *15p/25V_2
FBVDDQ-GPU side
CG556 *15p/25V_2
UNDER GPU
B [24x1uF + 8x10uF] B

NEAR GPU
[5x10uF + 9x22uF]

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C POWER A1A

Date: Monday, March 21, 2022 Sheet 35 of 150


5 4 3 2 1
5 4 3 2 1

36
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 36 of 150


5 4 3 2 1
5 4 3 2 1

Hole
HOLE1

8
HOLE2

5
7
8
HOLE3
*hg-tc236i150bc315d110p2 *HG-TIC236BC315D110P2 *HG-C315D118P2
7 6 6
5
7
8
HOLE5

6
5
HOLE6

7
8
HOLE7
*HG-TIC236BC315D110P2 *hg-tc236i150bc315d110p2 *HG-TIC236BC315D110P2
6
5
HOLE8
*SPAD-C315NP
Clip
HOLE34 HOLE35
37
D D
4 9 4 9 4 9 4 4 9 4 *o-pt316e-1 *o-pt316e-2
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
HOLE10 HOLE11 HOLE12
HOLE9 *HG-TIC236BC315D110P2
*HG-C315D118P2 *o-zgn-b-2p2
*H-C315D118P2 7 6 7 6 HOLE13 HOLE14 HOLE15 HOLE16
8 5 8 5 *H-O122X98D122X98N *spad-c315np *hg-tbc315ic177d177p2
*HG-TC236IC110BC315D110P2 HOLE46
9 4 9 4 4 7 6 7 6 HOLE36 *spad-re866x197np
8 5 8 5 *H-O130X98D130X98N
9 4 9 4
1
2
3

1
2
3

1
2
3
1

1
2
3

1
2
3

1
C C

1
HOLE30 HOLE31 HOLE32
*h-s157d157n h-tc217ibc197d138p2 h-tc217ibc197d138p2
HOLE20 HOLE21 HOLE22
H-TC217IBC134D134P2 *H-TC197IC157BC276D157P2
*H-TC197IC157BC276D157P2
HOLE37 HOLE38 HOLE39
*spad-re315x236np *spad-pt316e-2np *spad-re787x197np
1

1
HOLE23 HOLE24 HOLE25
*H-TC197IC157BC276D157P2
*H-TC197IC157BC276D157P2
*H-TC197IC157BC276D157P2
HOLE26
*H-TC197IC157BC276D157P2
HOLE40 HOLE41 HOLE42
HOLE48 HOLE49 *spad-re1417x197np *spad-pt316e-1np *spad-re591x236np
B B
*2D-BARCODE-8X8-S *2D-BARCODE-8X8-S
1

1
HOLE27 HOLE28 1

1
*H-TC197IC157BC276D157P2HOLE4
*H-TC197IC157BC276D157P2
*H-O122X98D122X98N
HOLE43 HOLE44 HOLE45
*spad-re1024x276np *spad-re323x159np *spad-re669x236np
1

1
HOLE50

A
HOLE47
*spad-c315np
*SPAD-C236NP
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
1

LTE DB
1

A A1A

Date: Thursday, May 26, 2022 Sheet 37 of 150


5 4 3 2 1
5 4 3 2 1

MEMORY: FBA Partition 31..0 x16 Dual Channel DRAM


[26,38] FBA_DBI[7:0]
40OHM_NETCLASS1
[26,38] FBA_EDC[7:0]
40OHM_NETCLASS1
38
+FBVDDQ_MEM [26,27,35,39,40,41,130] FBA_DBI0 FBA_EDC0
+1.8V_AON [25,26,30,31,32,35,39,40,41,45,48,126,130,131] FBA_DBI1 FBA_EDC1
FBA_DBI2 FBA_EDC2
FBA_DBI3 FBA_EDC3
FBA_DBI4 FBA_EDC4
+FBVDDQ_MEM FBA_DBI5 FBA_EDC5
VRAMG6A FBA_DBI6 FBA_EDC6
A11 FBA_DBI7 FBA_EDC7
A13 VSS#A11
A2 VSS#A13 A1
A4 VSS#A2 VDD#A1 A14 [26,38] FBA_CMD[52:0]
B1 VSS#A4 VDD#A14 E10
B14
C10
VSS#B1
VSS#B14
VSS#C10
VDD#E10
VDD#E5
VDD#H13
E5
H13
CH0[CMD0~24]
C12 H2
C3 VSS#C12 VDD#H2 L13
D VSS#C3 VDD#L13 [26] VMA_DQ[31:0] D
C5 L2
D1 VSS#C5 VDD#L2 P10
D12 VSS#D1 VDD#P10 P5
D14 VSS#D12 VDD#P5 V1 VRAMG6D
D3 VSS#D14 VDD#V1 V14 +FBVDDQ_MEM
E11 VSS#D3 VDD#V14 VRAMG6C FBA_CMD1 H3 K1 FBA_VREFC
VSS#E11 VRAMG6B CA0_A VREFC
Around DRAM 22u*6 , 10u*2
E4 FBA_CMD13 G11
F1 VSS#E4 B10 NORMAL FBA_CMD12 G4 CA1_A
F12 VSS#F1 VDDQ#B10 B5 NORMAL VMA_DQ3 N2 FBA_CMD24 H12 CA2_A CG261 CG161 CG206 CG482 CG486 CG129 CG484 CG230
F14 VSS#F12 VDDQ#B5 C1 VMA_DQ12 G2 VMA_DQ7 P3 DQ0_B/DQ6_B FBA_CMD11 H5 CA3_A RG29
F3 VSS#F14 VDDQ#C1 C11 VMA_DQ13 B3 DQ0_A/DQ7_A VMA_DQ1 M2 DQ1_B/DQ4_B FBA_CMD15 H10 CA4_A EV@1K_1%_2 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@10u/6.3V_4 EV@10u/6.3V_4
G1
G12
VSS#F3
VSS#G1
VSS#G12
VDDQ#C11
VDDQ#C14
VDDQ#C4
C14
C4 CH0[BYTE1]
VMA_DQ15
VMA_DQ14
F2
E3
DQ1_A/DQ2_A
DQ2_A/DQ6_A
DQ3_A/DQ4_A
CH0[BYTE0] VMA_DQ0
VMA_DQ6
P2
U3
DQ2_B/DQ7_B
DQ3_B/DQ5_B
DQ4_B/DQ2_B
FBA_CMD22
FBA_CMD23
J12
J11
CA5_A
CA6_A
CA7_A
VMA_DQ9 VMA_DQ2 FBA_CMD0
G14
G3
H11
VSS#G14
VSS#G3
VDDQ#E1
VDDQ#E14
E1
E14
F11 QD8~15 VMA_DQ10
VMA_DQ11
B4
B2
E2
DQ4_A/DQ0_A
DQ5_A/DQ3_A
QD0~7 VMA_DQ4
VMA_DQ5
V3
U4
U2
DQ5_B/DQ1_B
DQ6_B/DQ0_B
FBA_CMD2
FBA_CMD10
J4
J3
J5
CA8_A
CA9_A
H4 VSS#H11 VDDQ#F11 F4 VMA_DQ8 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBA_CMD14 G10 CABI_n_A N5 SNN_FBA_TCK0 TPG34
L11 VSS#H4 VDDQ#F4 H1 DQ7_A/DQ1_A FBA_EDC0 T2 CKE_n_A TCK F10 SNN_FBA_TDI0 TPG41
L4 VSS#L11 VDDQ#H1 H14 FBA_EDC1 C2 FBA_DBI0 R2 EDC0_B TDI N10 SNN_FBA_TDO0 TPG39
M1 VSS#L4 VDDQ#H14 J13 FBA_DBI1 D2 EDC0_A DBI0_N_B FBA_CMD5 L3 TDO F5 SNN_FBA_TMS0 TPG33
M12 VSS#M1 VDDQ#J13 J2 DBI0_N_A VMA_WCK01 R4 FBA_CMD18 M11 CA0_B TMS +FBVDDQ_MEM
M14 VSS#M12 VDDQ#J2 K13 VMA_WCKB01 D4 [26] VMA_WCK01 VMA_WCK01# R5 WCK_t_B/NC FBA_CMD7 M4 CA1_B
VSS#M14 VDDQ#K13 [26] VMA_WCKB01 WCK_t_A [26] VMA_WCK01# WCK_c_B/NC CA2_B Close to DRAM 10u*4
M3 K2 VMA_WCKB01# D5 FBA_CMD20 L12
N1 VSS#M3 VDDQ#K2 L1 [26] VMA_WCKB01# WCK_c_A FBA_CMD8 L5 CA3_B
N12 VSS#N1 VDDQ#L1 L14 FBA_CMD16 L10 CA4_B CG488 CG490 CG492 CG494
N14 VSS#N12 VDDQ#L14 N11 X16 X8 VMA_DQ20 P13 FBA_CMD21 K12 CA5_B J14 FBA_ZQ_1_A RG40 EV@121_1%_2
N3 VSS#N14 VDDQ#N11 N4 VMA_DQ24 B11 VMA_DQ18 U13 DQ8_B/DQ13_B FBA_CMD19 K11 CA6_B ZQ_A K14 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4
P11 VSS#N3 VDDQ#N4 P1 VMA_DQ29 G13 DQ8_A NC VMA_DQ23 M13 DQ9_B/DQ11_B FBA_CMD6 K4 CA7_B ZQ_B
P4
R1
VSS#P11
VSS#P4
VSS#R1
VDDQ#P1
VDDQ#P14
VDDQ#T1
P14
T1
CH0[BYTE3] VMA_DQ31 E13
VMA_DQ28 F13
DQ9_A/DQ15_A
DQ10_A/DQ13_A
DQ11_A/DQ14_A
NC
NC
CH0[BYTE2] VMA_DQ22
VMA_DQ16
N13
U12
DQ10_B/DQ15_B
DQ11_B/DQ14_B
DQ12_B/DQ10_B
FBA_CMD4
FBA_CMD9
K3
K5
CA8_B
CA9_B
CABI_n_B
FBA_ZQ_1_B RG41 EV@121_1%_2

VMA_DQ26 E12 VMA_DQ19 FBA_CMD17


R12
R14
R3
VSS#R12
VSS#R14
VDDQ#T11
VDDQ#T14
T11
T14
T4
QD24~31 VMA_DQ25 B12
VMA_DQ30 B13
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
QD16~23 VMA_DQ21
VMA_DQ17
P12
V12
U11
DQ13_B/DQ12_B
DQ14_B/DQ9_B
M10
CKE_n_B

T10 VSS#R3 VDDQ#T4 U10 VMA_DQ27 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B FBA_CMD3 J1


T12 VSS#T10 VDDQ#U10 U5 DQ15_A/DQ9_A NC FBA_EDC2 T13 RESET_n G5 SNN_FBA_RFU_G5 TPG31
T3 VSS#T12 VDDQ#U5 FBA_EDC3 C13 FBA_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBA_RFU_M5 TPG35
T5 VSS#T3 +1.8V_AON FBA_DBI3 D13 EDC1_A GND DBI1_n_B VMA_CLK0# K10 NC#M5 +1.8V_AON
VSS#T5 DBI1_n_A VMA_WCK23 [26] VMA_CLK0# VMA_CLK0 CK_c
U1 NC R11 J10 1u*4
U14 VSS#U1 A10 VMA_WCKB23 D11 [26] VMA_WCK23 VMA_WCK23# R10 WCK1_t_B [26] VMA_CLK0 CK_t
V11 VSS#U14 VPP#A10 A5 [26] VMA_WCKB23 VMA_WCKB23# D10 WCK1_t_A NC [26] VMA_WCK23# WCK1_c_B
VSS#V11 VPP#A5 [26] VMA_WCKB23# WCK1_c_A EV@MT61K256M32JE-16:A
V13 V10 NC
VSS#V13 VPP#V10 EV@MT61K256M32JE-16:A
V2 V5 EV@MT61K256M32JE-16:A CG208 CG130 CG137 CG224
V4 VSS#V2 VPP#V5
VSS#V4 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2

EV@MT61K256M32JE-16:A

C C

+FBVDDQ_MEM
DRAM x16 1.8V VPP
Close to DRAM 1u*18 CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
[18x1uF + 4x10uF] [4x1uF]
AROUND DRAM
CG196 CG192 CG74 CG177 CG264 CG207 CG85 CG190 CG167 CG159 CG249 CG262 CG497 CG479 CG480 CG496 CG263 CG118 [2x10uF + 6x22uF]
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 UNDER OR AROUND DRAM
Option --> [1x220uF]

MEMORY: FBA Partition 63..32 x16 Dual Channel DRAM


40OHM_NETCLASS1 40OHM_NETCLASS1
[26,38] FBA_DBI[7:0] [26,38] FBA_EDC[7:0]
FBA_DBI0 FBA_EDC0
+FBVDDQ_MEM FBA_DBI1 FBA_EDC1
VRAMG8A FBA_DBI2 FBA_EDC2
A11 FBA_DBI3 FBA_EDC3
A13 VSS#A11 FBA_DBI4 FBA_EDC4
A2 VSS#A13 A1 FBA_DBI5 FBA_EDC5
A4 VSS#A2 VDD#A1 A14 FBA_DBI6 FBA_EDC6 FBA_VREFC RG185 *EV@Short_0201 FBA_VREFC_H
B1 VSS#A4 VDD#A14 E10 FBA_DBI7 FBA_EDC7
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13 [26,38] FBA_CMD[52:0]
B C5 VSS#C3 VDD#L13 L2 B
D1
D12
VSS#C5
VSS#D1
VSS#D12
VDD#L2
VDD#P10
VDD#P5
P10
P5
[26] VMA_DQ[63:32] CH1[CMD28~52]
D14 V1
D3 VSS#D14 VDD#V1 V14
E11 VSS#D3 VDD#V14
E4 VSS#E11
F1 VSS#E4 B10
F12 VSS#F1 VDDQ#B10 B5
F14 VSS#F12 VDDQ#B5 C1 VRAMG8C VRAMG8D
F3 VSS#F14 VDDQ#C1 C11 +FBVDDQ_MEM
G1 VSS#F3 VDDQ#C11 C14 VRAMG8B NORMAL FBA_CMD33 H3 K1 FBA_VREFC_H
VSS#G1 VDDQ#C14 CA0_A VREFC Around DRAM 22u*6 , 10u*2
G12 C4 VMA_DQ35 N2 FBA_CMD45 G11
G14 VSS#G12 VDDQ#C4 E1 NORMAL VMA_DQ34 P3 DQ0_B/DQ6_B FBA_CMD35 G4 CA1_A
G3
H11
VSS#G14
VSS#G3
VSS#H11
VDDQ#E1
VDDQ#E14
VDDQ#F11
E14
F11 CH1[BYTE1]
VMA_DQ45
VMA_DQ42
G2
B3 DQ0_A/DQ7_A
DQ1_A/DQ2_A
CH1[BYTE0] VMA_DQ37
VMA_DQ38
M2
P2
DQ1_B/DQ4_B
DQ2_B/DQ7_B
DQ3_B/DQ5_B
FBA_CMD46
FBA_CMD36
H12
H5
CA2_A
CA3_A
CA4_A
RG131
CG499 CG291 CG189 CG162 CG303 CG290 CG509 CG508

VMA_DQ43 VMA_DQ36 FBA_CMD43


H4
L11
L4
VSS#H4
VSS#L11
VDDQ#F4
VDDQ#H1
F4
H1
H14 QD40~47 VMA_DQ47
VMA_DQ41
F2
E3
B4
DQ2_A/DQ6_A
DQ3_A/DQ4_A
QD32~39 VMA_DQ33
VMA_DQ32
U3
V3
U4
DQ4_B/DQ2_B
DQ5_B/DQ1_B
FBA_CMD48
FBA_CMD47
H10
J12
J11
CA5_A
CA6_A
*EV@1K_1%_2 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@10u/6.3V_4 EV@10u/6.3V_4

M1 VSS#L4 VDDQ#H14 J13 VMA_DQ44 B2 DQ4_A/DQ0_A VMA_DQ39 U2 DQ6_B/DQ0_B FBA_CMD34 J4 CA7_A


M12 VSS#M1 VDDQ#J13 J2 VMA_DQ46 E2 DQ5_A/DQ3_A DQ7_B/DQ3_B FBA_CMD32 J3 CA8_A
M14 VSS#M12 VDDQ#J2 K13 VMA_DQ40 A3 DQ6_A/DQ5_A FBA_EDC4 T2 FBA_CMD37 J5 CA9_A
M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A FBA_DBI4 R2 EDC0_B FBA_CMD44 G10 CABI_n_A N5 SNN_FBA_TCK1 TPG46
N1 VSS#M3 VDDQ#K2 L1 FBA_EDC5 C2 DBI0_N_B CKE_n_A TCK F10 SNN_FBA_TDI1 TPG44
N12 VSS#N1 VDDQ#L1 L14 FBA_DBI5 D2 EDC0_A VMA_WCK45 R4 TDI N10 SNN_FBA_TDO1 TPG43
VSS#N12 VDDQ#L14 DBI0_N_A [26] VMA_WCK45 VMA_WCK45# WCK_t_B/NC FBA_CMD29 TDO SNN_FBA_TMS1 +FBVDDQ_MEM
N14 N11 R5 L3 F5 TPG45
N3 VSS#N14 VDDQ#N11 N4 VMA_WCKB45 D4 [26] VMA_WCK45# WCK_c_B/NC FBA_CMD52 M11 CA0_B TMS
VSS#N3 VDDQ#N4 [26] VMA_WCKB45 WCK_t_A CA1_B Close to DRAM 10u*4
P11 P1 VMA_WCKB45# D5 FBA_CMD40 M4
P4 VSS#P11 VDDQ#P1 P14 [26] VMA_WCKB45# WCK_c_A FBA_CMD50 L12 CA2_B
R1 VSS#P4 VDDQ#P14 T1 VMA_DQ51 P13 FBA_CMD39 L5 CA3_B CG503 CG505 CG506 CG507
R12 VSS#R1 VDDQ#T1 T11 X16 X8 VMA_DQ49 U13 DQ8_B/DQ13_B FBA_CMD42 L10 CA4_B
R14
R3
VSS#R12
VSS#R14
VSS#R3
VDDQ#T11
VDDQ#T14
VDDQ#T4
T14
T4 CH1[BYTE3]
VMA_DQ60
VMA_DQ56
B11
G13 DQ8_A
DQ9_A/DQ15_A
NC
CH1[BYTE2] VMA_DQ50
VMA_DQ52
M13
N13
DQ9_B/DQ11_B
DQ10_B/DQ15_B
DQ11_B/DQ14_B
FBA_CMD49
FBA_CMD51
K12
K11
CA5_B
CA6_B
CA7_B
ZQ_A
ZQ_B
J14
K14
FBA_ZQ_2_A RG43 EV@121_1%_2 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4
VMA_DQ59 VMA_DQ53 FBA_CMD28
T10
T12
T3
VSS#T10
VSS#T12
VDDQ#U10
VDDQ#U5
U10
U5
QD56~63 VMA_DQ57
VMA_DQ63
E13
F13
E12
DQ10_A/DQ13_A
DQ11_A/DQ14_A
NC
NC
NC
QD48~55 VMA_DQ54
VMA_DQ48
U12
P12
V12
DQ12_B/DQ10_B
DQ13_B/DQ12_B
FBA_CMD30
FBA_CMD38
K4
K3
K5
CA8_B
CA9_B
FBA_ZQ_2_B RG46 EV@121_1%_2

T5 VSS#T3 +1.8V_AON VMA_DQ62 B12 DQ12_A NC VMA_DQ55 U11 DQ14_B/DQ9_B FBA_CMD41 M10 CABI_n_B
U1 VSS#T5 VMA_DQ58 B13 DQ13_A/DQ10_A NC DQ15_B/DQ8_B CKE_n_B
U14 VSS#U1 A10 VMA_DQ61 A12 DQ14_A/DQ11_A NC FBA_EDC6 T13
V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC FBA_DBI6 R13 EDC1_B FBA_CMD31 J1
V13 VSS#V11 VPP#A5 V10 FBA_EDC7 C13 DBI1_n_B RESET_n G5 SNN_FBA_RFU_G5_1 TPG48
V2 VSS#V13 VPP#V10 V5 FBA_DBI7 D13 EDC1_A GND VMA_WCK67 R11 NC#G5 M5 SNN_FBA_RFU_M5_1 TPG47
VSS#V2 VPP#V5 DBI1_n_A [26] VMA_WCK67 VMA_WCK67# WCK1_t_B VMA_CLK1# NC#M5 +1.8V_AON
V4 NC R10 K10
VSS#V4 VMA_WCKB67 D11 [26] VMA_WCK67# WCK1_c_B [26] VMA_CLK1# VMA_CLK1 J10 CK_c
[26] VMA_WCKB67 VMA_WCKB67# D10 WCK1_t_A NC [26] VMA_CLK1 CK_t 1u*4
[26] VMA_WCKB67# WCK1_c_A EV@MT61K256M32JE-16:A
NC
EV@MT61K256M32JE-16:A
EV@MT61K256M32JE-16:A
CG362 CG349 CG139 CG131
EV@MT61K256M32JE-16:A
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2
A A

+FBVDDQ_MEM
Close to DRAM 1u*18 DRAM x16 1.8V VPP
CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
[18x1uF + 4x10uF] [4x1uF]
CG510 CG511 CG512 CG513 CG517 CG516 CG515 CG514 CG359 CG363 CG337 CG250 CG364 CG247 CG366 CG127 CG308 CG146 AROUND DRAM
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2
[2x10uF + 6x22uF]
UNDER OR AROUND DRAM
Quanta Computer Inc.
Option --> [1x220uF] PROJECT : ZGN
Size Document Number Rev
D GDDR6 A1A

Date: Thursday, May 26, 2022 Sheet 38 of 150


5 4 3 2 1
5 4 3 2 1

MEMORY: FBB Partition 31..0 x16 Dual Channel DRAM


+FBVDDQ_MEM [26,27,35,38,40,41,130] 40OHM_NETCLASS1 40OHM_NETCLASS1
39
+1.8V_AON [25,26,30,31,32,35,38,40,41,45,48,126,130,131] [26,39] FBB_DBI[7:0] [26,39] FBB_EDC[7:0]
FBB_DBI0 FBB_EDC0
FBB_DBI1 FBB_EDC1
FBB_DBI2 FBB_EDC2
FBB_DBI3 FBB_EDC3
+FBVDDQ_MEM FBB_DBI4 FBB_EDC4
VRAMG1A FBB_DBI5 FBB_EDC5
A11 FBB_DBI6 FBB_EDC6
A13 VSS#A11 FBB_DBI7 FBB_EDC7
A2 VSS#A13 A1
A4 VSS#A2 VDD#A1 A14
B1 VSS#A4 VDD#A14 E10
B14 VSS#B1 VDD#E10 E5 [26,39] FBB_CMD[52:0]
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13
D C5
D1
VSS#C3
VSS#C5
VSS#D1
VDD#L13
VDD#L2
VDD#P10
L2
P10 [26] VMB_DQ[31:0] CH0[CMD0~24] D

D12 P5
D14 VSS#D12 VDD#P5 V1
D3 VSS#D14 VDD#V1 V14
E11 VSS#D3 VDD#V14 VRAMG1D
E4 VSS#E11
F1 VSS#E4 B10 VRAMG1B VRAMG1C FBB_CMD1 H3 K1 FBB_VREFC
F12 VSS#F1 VDDQ#B10 B5 FBB_CMD13 G11 CA0_A VREFC
F14 VSS#F12 VDDQ#B5 C1 NORMAL NORMAL FBB_CMD12 G4 CA1_A +FBVDDQ_MEM
VSS#F14 VDDQ#C1 VMB_DQ12 VMB_DQ3 FBB_CMD24 CA2_A 22u*6 , 10u*2
F3 C11 G2 N2 H12 Around DRAM
G1
G12
VSS#F3
VSS#G1
VSS#G12
VDDQ#C11
VDDQ#C14
VDDQ#C4
C14
C4 CH0[BYTE1]
VMB_DQ10
VMB_DQ14
B3
F2
DQ0_A/DQ7_A
DQ1_A/DQ2_A
DQ2_A/DQ6_A
CH0[BYTE0] VMB_DQ4
VMB_DQ2
P3
M2
DQ0_B/DQ6_B
DQ1_B/DQ4_B
DQ2_B/DQ7_B
FBB_CMD11
FBB_CMD15
H5
H10
CA3_A
CA4_A
CA5_A
RG15
EV@1K_1%_2
VMB_DQ13 VMB_DQ0 FBB_CMD22
G14
G3
H11
VSS#G14
VSS#G3
VDDQ#E1
VDDQ#E14
E1
E14
F11 QD8~15 VMB_DQ15
VMB_DQ11
E3
B4
B2
DQ3_A/DQ4_A
DQ4_A/DQ0_A
QD0~7 VMB_DQ6
VMB_DQ7
P2
U3
V3
DQ3_B/DQ5_B
DQ4_B/DQ2_B
FBB_CMD23
FBB_CMD0
J12
J11
J4
CA6_A
CA7_A
CG428

EV@22u/6.3V_6
CG430

EV@22u/6.3V_6
CG415

EV@22u/6.3V_6
CG416

EV@22u/6.3V_6
CG414

EV@22u/6.3V_6
CG1

EV@22u/6.3V_6
CG19

EV@10u/6.3V_4
CG17

EV@10u/6.3V_4
H4 VSS#H11 VDDQ#F11 F4 VMB_DQ8 E2 DQ5_A/DQ3_A VMB_DQ1 U4 DQ5_B/DQ1_B FBB_CMD2 J3 CA8_A
L11 VSS#H4 VDDQ#F4 H1 VMB_DQ9 A3 DQ6_A/DQ5_A VMB_DQ5 U2 DQ6_B/DQ0_B FBB_CMD10 J5 CA9_A
L4 VSS#L11 VDDQ#H1 H14 DQ7_A/DQ1_A DQ7_B/DQ3_B FBB_CMD14 G10 CABI_n_A N5 FBB_FB_TCK0 TPG15
M1 VSS#L4 VDDQ#H14 J13 FBB_EDC1 C2 FBB_EDC0 T2 CKE_n_A TCK F10 FBB_FB_TDI0 TPG3
M12 VSS#M1 VDDQ#J13 J2 FBB_DBI1 D2 EDC0_A FBB_DBI0 R2 EDC0_B TDI N10 FBB_FB_TDO0 TPG17
M14 VSS#M12 VDDQ#J2 K13 DBI0_N_A DBI0_N_B FBB_CMD5 L3 TDO F5 FBB_FB_TMS0 TPG1
M3 VSS#M14 VDDQ#K13 K2 VMB_WCKB01 D4 VMB_WCK01 R4 FBB_CMD18 M11 CA0_B TMS
N1 VSS#M3 VDDQ#K2 L1 [26] VMB_WCKB01 VMB_WCKB01# D5 WCK_t_A [26] VMB_WCK01 VMB_WCK01# R5 WCK_t_B/NC FBB_CMD7 M4 CA1_B +FBVDDQ_MEM
N12 VSS#N1 VDDQ#L1 L14 [26] VMB_WCKB01# WCK_c_A [26] VMB_WCK01# WCK_c_B/NC FBB_CMD20 L12 CA2_B
VSS#N12 VDDQ#L14 CA3_B
Close to DRAM 10u*4
N14 N11 FBB_CMD8 L5
N3 VSS#N14 VDDQ#N11 N4 X16 X8 FBB_CMD16 L10 CA4_B
P11 VSS#N3 VDDQ#N4 P1 VMB_DQ25 B11 VMB_DQ23 P13 FBB_CMD21 K12 CA5_B J14 FBB_ZQ_1_A RG7 EV@121_1%_2 CG432 CG434
P4 VSS#P11 VDDQ#P1 P14 VMB_DQ30 G13 DQ8_A NC VMB_DQ22 U13 DQ8_B/DQ13_B FBB_CMD19 K11 CA6_B ZQ_A K14 CG436 CG438
R1
R12
VSS#P4
VSS#R1
VSS#R12
VDDQ#P14
VDDQ#T1
VDDQ#T11
T1
T11
CH0[BYTE3] VMB_DQ31 E13
VMB_DQ28 F13
DQ9_A/DQ15_A
DQ10_A/DQ13_A
DQ11_A/DQ14_A
NC
NC
CH0[BYTE2] VMB_DQ16
VMB_DQ17
M13
N13
DQ9_B/DQ11_B
DQ10_B/DQ15_B
DQ11_B/DQ14_B
FBB_CMD6
FBB_CMD4
K4
K3
CA7_B
CA8_B
CA9_B
ZQ_B
FBB_ZQ_1_B RG12 EV@121_1%_2
EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4
VMB_DQ29 E12 VMB_DQ20 FBB_CMD9
R14
R3
T10
VSS#R14
VSS#R3
VDDQ#T14
VDDQ#T4
T14
T4
U10
QD24~31 VMB_DQ27 B12
VMB_DQ24 B13
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
QD16~23 VMB_DQ19
VMB_DQ21
U12
P12
V12
DQ12_B/DQ10_B
DQ13_B/DQ12_B
FBB_CMD17
K5
M10 CABI_n_B
CKE_n_B
T12 VSS#T10 VDDQ#U10 U5 VMB_DQ26 A12 DQ14_A/DQ11_A NC VMB_DQ18 U11 DQ14_B/DQ9_B
T3 VSS#T12 VDDQ#U5 DQ15_A/DQ9_A NC DQ15_B/DQ8_B FBB_CMD3 J1
T5 VSS#T3 +1.8V_AON FBB_EDC3 C13 FBB_EDC2 T13 RESET_n G5 SNN_FBB_RFU_G5 TPG7
U1 VSS#T5 FBB_DBI3 D13 EDC1_A GND FBB_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBB_RFU_M5 TPG11
U14 VSS#U1 A10 DBI1_n_A NC DBI1_n_B VMB_CLK0# K10 NC#M5 +1.8V_AON
V11 VSS#U14 VPP#A10 A5 VMB_WCKB23 D11 VMB_WCK23 R11 [26] VMB_CLK0# VMB_CLK0 J10 CK_c
VSS#V11 VPP#A5 [26] VMB_WCKB23 VMB_WCKB23# WCK1_t_A [26] VMB_WCK23 VMB_WCK23# WCK1_t_B [26] VMB_CLK0 CK_t 1u*4
V13 V10 D10 NC R10
V2 VSS#V13 VPP#V10 V5 [26] VMB_WCKB23# WCK1_c_A NC [26] VMB_WCK23# WCK1_c_B
VSS#V2 VPP#V5 EV@MT61K256M32JE-16:A
V4 EV@MT61K256M32JE-16:A
VSS#V4 EV@MT61K256M32JE-16:A
CG70 CG357 CG6 CG63

EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2

EV@MT61K256M32JE-16:A

C C

+FBVDDQ_MEM
Close to DRAM 1u*18
DRAM x16 1.8V VPP
CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
CG24 CG49 CG36 CG51 CG39 CG27 CG10 CG56 CG66 CG68 CG32 CG40 CG42 CG16 CG57 CG59 CG410 CG409 [18x1uF + 4x10uF] [4x1uF]
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 AROUND DRAM
[2x10uF + 6x22uF]
UNDER OR AROUND DRAM
Option --> [1x220uF]

MEMORY: FBB Partition 63..32 x16 Dual Channel DRAM


40OHM_NETCLASS1 40OHM_NETCLASS1
[26,39] FBB_DBI[7:0] [26,39] FBB_EDC[7:0]
FBB_DBI0 FBB_EDC0
+FBVDDQ_MEM FBB_DBI1 FBB_EDC1
VRAMG4A FBB_DBI2 FBB_EDC2
A11 FBB_DBI3 FBB_EDC3
A13 VSS#A11 FBB_DBI4 FBB_EDC4
A2 VSS#A13 A1 FBB_DBI5 FBB_EDC5
A4 VSS#A2 VDD#A1 A14 FBB_DBI6 FBB_EDC6
B1 VSS#A4 VDD#A14 E10 FBB_DBI7 FBB_EDC7 FBB_VREFC RG186 *EV@Short_0201 FBB_VREFC_H
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13
VSS#C3 VDD#L13 [26,39] FBB_CMD[52:0]
C5 L2
D1 VSS#C5 VDD#L2 P10
D12 VSS#D1 VDD#P10 P5
B D14
D3
VSS#D12
VSS#D14
VSS#D3
VDD#P5
VDD#V1
VDD#V14
V1
V14
[26] VMB_DQ[63:32]
CH1[CMD28~52] B

E11
E4 VSS#E11
F1 VSS#E4 B10
F12 VSS#F1 VDDQ#B10 B5
F14 VSS#F12 VDDQ#B5 C1 VRAMG4D
F3 VSS#F14 VDDQ#C1 C11 VRAMG4C
G1 VSS#F3 VDDQ#C11 C14 VRAMG4B FBB_CMD33 H3 K1 FBB_VREFC_H
G12 VSS#G1 VDDQ#C14 C4 NORMAL FBB_CMD45 G11 CA0_A VREFC
G14 VSS#G12 VDDQ#C4 E1 NORMAL VMB_DQ34 N2 FBB_CMD35 G4 CA1_A +FBVDDQ_MEM
G3 VSS#G14 VDDQ#E1 E14 VMB_DQ47 G2 VMB_DQ36 P3 DQ0_B/DQ6_B FBB_CMD46 H12 CA2_A
Around DRAM 22u*6 , 10u*2
H11
H4
VSS#G3
VSS#H11
VSS#H4
VDDQ#E14
VDDQ#F11
VDDQ#F4
F11
F4 CH1[BYTE1]
VMB_DQ40
VMB_DQ43
B3
F2
DQ0_A/DQ7_A
DQ1_A/DQ2_A
DQ2_A/DQ6_A
CH1[BYTE0] VMB_DQ37
VMB_DQ38
M2
P2
DQ1_B/DQ4_B
DQ2_B/DQ7_B
DQ3_B/DQ5_B
FBB_CMD36
FBB_CMD43
H5
H10
CA3_A
CA4_A
CA5_A
RG24
*EV@1K_1%_2
VMB_DQ46 VMB_DQ33 FBB_CMD48
L11
L4
M1
VSS#L11
VSS#L4
VDDQ#H1
VDDQ#H14
H1
H14
J13 QD40~47 VMB_DQ42
VMB_DQ45
E3
B4
B2
DQ3_A/DQ4_A
DQ4_A/DQ0_A
QD32~39 VMB_DQ35
VMB_DQ32
U3
V3
U4
DQ4_B/DQ2_B
DQ5_B/DQ1_B
FBB_CMD47
FBB_CMD34
J12
J11
J4
CA6_A
CA7_A
CG466
EV@22u/6.3V_6
CG468
EV@22u/6.3V_6
CG470
EV@22u/6.3V_6
CG472
EV@22u/6.3V_6
CG474
EV@22u/6.3V_6
CG460
EV@22u/6.3V_6
CG458
EV@10u/6.3V_4
CG457
EV@10u/6.3V_4
M12 VSS#M1 VDDQ#J13 J2 VMB_DQ44 E2 DQ5_A/DQ3_A VMB_DQ39 U2 DQ6_B/DQ0_B FBB_CMD32 J3 CA8_A
M14 VSS#M12 VDDQ#J2 K13 VMB_DQ41 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBB_CMD37 J5 CA9_A
M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A FBB_EDC4 T2 FBB_CMD44 G10 CABI_n_A N5 SNN_FBB_TCK1 TPG27
N1 VSS#M3 VDDQ#K2 L1 FBB_EDC5 C2 FBB_DBI4 R2 EDC0_B CKE_n_A TCK F10 SNN_FBB_TDI1 TPG19
N12 VSS#N1 VDDQ#L1 L14 FBB_DBI5 D2 EDC0_A DBI0_N_B TDI N10 SNN_FBB_TDO1 TPG20
N14 VSS#N12 VDDQ#L14 N11 DBI0_N_A VMB_WCK45 R4 FBB_CMD29 L3 TDO F5 SNN_FBB_TMS1 TPG24
N3 VSS#N14 VDDQ#N11 N4 VMB_WCKB45 D4 [26] VMB_WCK45 VMB_WCK45# R5 WCK_t_B/NC FBB_CMD52 M11 CA0_B TMS
P11 VSS#N3 VDDQ#N4 P1 [26] VMB_WCKB45 VMB_WCKB45# D5 WCK_t_A [26] VMB_WCK45# WCK_c_B/NC FBB_CMD40 M4 CA1_B
VSS#P11 VDDQ#P1 [26] VMB_WCKB45# WCK_c_A FBB_CMD50 CA2_B +FBVDDQ_MEM
P4 P14 L12
R1 VSS#P4 VDDQ#P14 T1 FBB_CMD39 L5 CA3_B
VSS#R1 VDDQ#T1 CA4_B Close to DRAM 10u*4
R12 T11 X16 X8 VMB_DQ51 P13 FBB_CMD42 L10
R14 VSS#R12 VDDQ#T11 T14 VMB_DQ63 B11 VMB_DQ48 U13 DQ8_B/DQ13_B FBB_CMD49 K12 CA5_B J14 FBB_ZQ_2_A RG112 EV@121_1%_2
R3
T10
VSS#R14
VSS#R3
VSS#T10
VDDQ#T14
VDDQ#T4
VDDQ#U10
T4
U10
CH1[BYTE3] VMB_DQ59
VMB_DQ56
G13
E13
DQ8_A
DQ9_A/DQ15_A
DQ10_A/DQ13_A
NC
NC
CH1[BYTE2] VMB_DQ50
VMB_DQ53
M13
N13
DQ9_B/DQ11_B
DQ10_B/DQ15_B
DQ11_B/DQ14_B
FBB_CMD51
FBB_CMD28
K11
K4
CA6_B
CA7_B
CA8_B
ZQ_A
ZQ_B
K14
CG464 CG462 CG459 CG447
VMB_DQ57 VMB_DQ54 FBB_CMD30 FBB_ZQ_2_B
T12
T3
T5
VSS#T12
VSS#T3
VDDQ#U5
U5

+1.8V_AON
QD56~63 VMB_DQ62
VMB_DQ58
F13
E12
B12
DQ11_A/DQ14_A
DQ12_A
NC
NC
NC
QD48~55 VMB_DQ52
VMB_DQ49
U12
P12
V12
DQ12_B/DQ10_B
DQ13_B/DQ12_B
FBB_CMD38
FBB_CMD41
K3
K5
M10
CA9_B
CABI_n_B
RG111 EV@121_1%_2 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4

U1 VSS#T5 VMB_DQ60 B13 DQ13_A/DQ10_A NC VMB_DQ55 U11 DQ14_B/DQ9_B CKE_n_B


U14 VSS#U1 A10 VMB_DQ61 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B
V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC FBB_EDC6 T13 FBB_CMD31 J1
V13 VSS#V11 VPP#A5 V10 FBB_EDC7 C13 FBB_DBI6 R13 EDC1_B RESET_n G5 SNN_FBB_RFU_G5_1 TPG23
V2 VSS#V13 VPP#V10 V5 FBB_DBI7 D13 EDC1_A GND DBI1_n_B NC#G5 M5 SNN_FBB_RFU_M5_1 TPG26
V4 VSS#V2 VPP#V5 DBI1_n_A NC VMB_WCK67 R11 VMB_CLK1# K10 NC#M5
VSS#V4 VMB_WCKB67 D11 [26] VMB_WCK67 VMB_WCK67# WCK1_t_B [26] VMB_CLK1# VMB_CLK1 CK_c
R10 J10
[26] VMB_WCKB67 VMB_WCKB67# D10 WCK1_t_A NC [26] VMB_WCK67# WCK1_c_B [26] VMB_CLK1 CK_t +1.8V_AON
[26] VMB_WCKB67# WCK1_c_A NC
EV@MT61K256M32JE-16:A EV@MT61K256M32JE-16:A 1u*4
EV@MT61K256M32JE-16:A
EV@MT61K256M32JE-16:A

CG120 CG91 CG82 CG128


EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2

A A

+FBVDDQ_MEM
Close to DRAM 1u*18

DRAM x16 1.8V VPP


CG141 CG90 CG81 CG144 CG143 CG86 CG78 CG76 CG475 CG476 CG444 CG445 CG451 CG75 CG80 CG110 CG99 CG89
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
[18x1uF + 4x10uF] [4x1uF]
AROUND DRAM
[2x10uF + 6x22uF] Quanta Computer Inc.
UNDER OR AROUND DRAM
Option --> [1x220uF] PROJECT : ZGN
Size Document Number Rev
D GDDR6 A1A

Date: Thursday, May 26, 2022 Sheet 39 of 150


5 4 3 2 1
5 4 3 2 1

MEMORY: FBC Partition 31..0x16 Dual Channel DRAM 40


+FBVDDQ_MEM [26,27,35,38,39,41,130]
+1.8V_AON [25,26,30,31,32,35,38,39,41,45,48,126,130,131] 40OHM_NETCLASS1 40OHM_NETCLASS1
[27,40] FBC_DBI[7:0] [27,40] FBC_EDC[7:0]
FBC_DBI0 FBC_EDC0
FBC_DBI1 FBC_EDC1
FBC_DBI2 FBC_EDC2
+FBVDDQ_MEM FBC_DBI3 FBC_EDC3
VRAMG3A FBC_DBI4 FBC_EDC4
A11 FBC_DBI5 FBC_EDC5
A13 VSS#A11 FBC_DBI6 FBC_EDC6
A2 VSS#A13 A1 FBC_DBI7 FBC_EDC7
A4 VSS#A2 VDD#A1 A14
B1 VSS#A4 VDD#A14 E10
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13 [27,40] FBC_CMD[52:0]
C12 VSS#C10 VDD#H13 H2
D C3
C5
VSS#C12
VSS#C3
VSS#C5
VDD#H2
VDD#L13
VDD#L2
L13
L2
[27] VMC_DQ[31:0]
CH0[CMD0~24] D

D1 P10
D12 VSS#D1 VDD#P10 P5
D14 VSS#D12 VDD#P5 V1
D3 VSS#D14 VDD#V1 V14
E11 VSS#D3 VDD#V14
E4 VSS#E11 VRAMG3D
F1 VSS#E4 B10 VRAMG3B VRAMG3C +FBVDDQ_MEM
F12 VSS#F1 VDDQ#B10 B5 FBC_CMD1 H3 K1 FBC_VREFC
VSS#F12 VDDQ#B5 CA0_A VREFC
Around DRAM 22u*6 , 10u*2
F14 C1 NORMAL NORMAL FBC_CMD13 G11
F3 VSS#F14 VDDQ#C1 C11 VMC_DQ11 G2 VMC_DQ3 N2 FBC_CMD12 G4 CA1_A
G1
G12
VSS#F3
VSS#G1
VSS#G12
VDDQ#C11
VDDQ#C14
VDDQ#C4
C14
C4 CH0[BYTE1]
VMC_DQ15
VMC_DQ14
B3
F2
DQ0_A/DQ7_A
DQ1_A/DQ2_A
DQ2_A/DQ6_A
CH0[BYTE0] VMC_DQ4
VMC_DQ1
P3
M2
DQ0_B/DQ6_B
DQ1_B/DQ4_B
DQ2_B/DQ7_B
FBC_CMD24
FBC_CMD11
H12
H5
CA2_A
CA3_A
CA4_A
CG54 CG4 CG23 CG422 CG427 CG425 CG423 CG426
VMC_DQ13 VMC_DQ7 FBC_CMD15
G14
G3
H11
VSS#G14
VSS#G3
VDDQ#E1
VDDQ#E14
E1
E14
F11 QD8~15 VMC_DQ9
VMC_DQ10
E3
B4
B2
DQ3_A/DQ4_A
DQ4_A/DQ0_A
QD0~7 VMC_DQ2
VMC_DQ6
P2
U3
V3
DQ3_B/DQ5_B
DQ4_B/DQ2_B
FBC_CMD22
FBC_CMD23
H10
J12
J11
CA5_A
CA6_A
RG16
EV@1K_1%_2
EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@10u/6.3V_4 EV@10u/6.3V_4

H4 VSS#H11 VDDQ#F11 F4 VMC_DQ12 E2 DQ5_A/DQ3_A VMC_DQ5 U4 DQ5_B/DQ1_B FBC_CMD0 J4 CA7_A


L11 VSS#H4 VDDQ#F4 H1 VMC_DQ8 A3 DQ6_A/DQ5_A VMC_DQ0 U2 DQ6_B/DQ0_B FBC_CMD2 J3 CA8_A
L4 VSS#L11 VDDQ#H1 H14 DQ7_A/DQ1_A DQ7_B/DQ3_B FBC_CMD10 J5 CA9_A
M1 VSS#L4 VDDQ#H14 J13 FBC_EDC1 C2 FBC_EDC0 T2 FBC_CMD14 G10 CABI_n_A N5 SNN_FBC_TCK0 TPG12
M12 VSS#M1 VDDQ#J13 J2 FBC_DBI1 D2 EDC0_A FBC_DBI0 R2 EDC0_B CKE_n_A TCK F10 SNN_FBC_TDI0 TPG5
M14 VSS#M12 VDDQ#J2 K13 DBI0_N_A DBI0_N_B TDI N10 SNN_FBC_TDO0 TPG10 +FBVDDQ_MEM
M3 VSS#M14 VDDQ#K13 K2 VMC_WCKB01 D4 VMC_WCK01 R4 FBC_CMD5 L3 TDO F5 SNN_FBC_TMS0 TPG4
VSS#M3 VDDQ#K2 [27] VMC_WCKB01 WCK_t_A [27] VMC_WCK01 WCK_t_B/NC CA0_B TMS Close to DRAM 10u*4
N1 L1 VMC_WCKB01# D5 VMC_WCK01# R5 FBC_CMD18 M11
VSS#N1 VDDQ#L1 [27] VMC_WCKB01# WCK_c_A [27] VMC_WCK01# WCK_c_B/NC FBC_CMD7 CA1_B
N12 L14 M4
N14 VSS#N12 VDDQ#L14 N11 FBC_CMD20 L12 CA2_B
N3 VSS#N14 VDDQ#N11 N4 X16 X8 FBC_CMD8 L5 CA3_B CG431 CG424 CG429 CG433
P11 VSS#N3 VDDQ#N4 P1 VMC_DQ25 B11 VMC_DQ20 P13 FBC_CMD16 L10 CA4_B EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4
P4 VSS#P11 VDDQ#P1 P14 VMC_DQ28 G13 DQ8_A NC VMC_DQ21 U13 DQ8_B/DQ13_B FBC_CMD21 K12 CA5_B J14 FBC_ZQ_1_A RG9 EV@121_1%_2
R1
R12
VSS#P4
VSS#R1
VSS#R12
VDDQ#P14
VDDQ#T1
VDDQ#T11
T1
T11
CH0[BYTE3] VMC_DQ29
VMC_DQ26
E13
F13
DQ9_A/DQ15_A
DQ10_A/DQ13_A
DQ11_A/DQ14_A
NC
NC
CH0[BYTE2] VMC_DQ23
VMC_DQ16
M13
N13
DQ9_B/DQ11_B
DQ10_B/DQ15_B
DQ11_B/DQ14_B
FBC_CMD19
FBC_CMD6
K11
K4
CA6_B
CA7_B
CA8_B
ZQ_A
ZQ_B
K14

VMC_DQ27 VMC_DQ17 FBC_CMD4 FBC_ZQ_1_B


R14
R3
T10
VSS#R14
VSS#R3
VDDQ#T14
VDDQ#T4
T14
T4
U10
QD24~31 VMC_DQ24
VMC_DQ30
E12
B12
B13
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
QD16~23 VMC_DQ22
VMC_DQ18
U12
P12
V12
DQ12_B/DQ10_B
DQ13_B/DQ12_B
FBC_CMD9
FBC_CMD17
K3
K5
M10
CA9_B
CABI_n_B
RG13 EV@121_1%_2

T12 VSS#T10 VDDQ#U10 U5 VMC_DQ31 A12 DQ14_A/DQ11_A NC VMC_DQ19 U11 DQ14_B/DQ9_B CKE_n_B
T3 VSS#T12 VDDQ#U5 DQ15_A/DQ9_A NC DQ15_B/DQ8_B +1.8V_AON
T5 VSS#T3 +1.8V_AON FBC_EDC3 C13 FBC_EDC2 T13 FBC_CMD3 J1
VSS#T5 FBC_DBI3 EDC1_A FBC_DBI2 EDC1_B RESET_n SNN_FBC_RFU_G5
1u*4
U1 D13 GND R13 G5 TPG8
U14 VSS#U1 A10 DBI1_n_A NC DBI1_n_B NC#G5 M5 SNN_FBC_RFU_M5 TPG13
V11 VSS#U14 VPP#A10 A5 VMC_WCKB23 D11 VMC_WCK23 R11 VMC_CLK0# K10 NC#M5
V13 VSS#V11 VPP#A5 V10 [27] VMC_WCKB23 VMC_WCKB23# D10 WCK1_t_A NC [27] VMC_WCK23 VMC_WCK23# R10 WCK1_t_B [27] VMC_CLK0# VMC_CLK0 J10 CK_c
VSS#V13 VPP#V10 [27] VMC_WCKB23# WCK1_c_A [27] VMC_WCK23# WCK1_c_B [27] VMC_CLK0 CK_t
V2 V5 NC CG52 CG8 CG12 CG13
V4 VSS#V2 VPP#V5 EV@MT61K256M32JE-16:A EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2
VSS#V4 EV@MT61K256M32JE-16:A EV@MT61K256M32JE-16:A

EV@MT61K256M32JE-16:A
C C

+FBVDDQ_MEM
DRAM x16 1.8V VPP
Close to DRAM 1u*18 CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
[18x1uF + 4x10uF] [4x1uF]
AROUND DRAM
CG21 CG41 CG33 CG43 CG14 CG437 CG435 CG38 CG18 CG31 CG47 CG50 CG64 CG69 CG25 CG46 CG35 CG67 [2x10uF + 6x22uF]
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 UNDER OR AROUND DRAM
Option --> [1x220uF]

MEMORY: FBC Partition 63..32 x16 Dual Channel DRAM

40OHM_NETCLASS1 40OHM_NETCLASS1
[27,40] FBC_DBI[7:0] [27,40] FBC_EDC[7:0]
+FBVDDQ_MEM FBC_DBI0 FBC_EDC0
VRAMG2A FBC_DBI1 FBC_EDC1
A11 FBC_DBI2 FBC_EDC2
A13 VSS#A11 FBC_DBI3 FBC_EDC3
A2 VSS#A13 A1 FBC_DBI4 FBC_EDC4 FBC_VREFC RG187 *EV@Short_0201 FBC_VREFC_H
A4 VSS#A2 VDD#A1 A14 FBC_DBI5 FBC_EDC5
B1 VSS#A4 VDD#A14 E10 FBC_DBI6 FBC_EDC6
B14 VSS#B1 VDD#E10 E5 FBC_DBI7 FBC_EDC7
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13
C5 VSS#C3 VDD#L13 L2 [27,40] FBC_CMD[52:0]
D1 VSS#C5 VDD#L2 P10
B D12
D14
VSS#D1
VSS#D12
VSS#D14
VDD#P10
VDD#P5
VDD#V1
P5
V1
[27] VMC_DQ[63:32]
CH1[CMD28~52] B

D3 V14
E11 VSS#D3 VDD#V14
E4 VSS#E11
F1 VSS#E4 B10 VRAMG2D
F12 VSS#F1 VDDQ#B10 B5 VRAMG2C
F14 VSS#F12 VDDQ#B5 C1 VRAMG2B FBC_CMD33 H3 K1 FBC_VREFC_H
F3 VSS#F14 VDDQ#C1 C11 NORMAL FBC_CMD45 G11 CA0_A VREFC +FBVDDQ_MEM
G1 VSS#F3 VDDQ#C11 C14 NORMAL VMC_DQ35 N2 FBC_CMD35 G4 CA1_A
VSS#G1 VDDQ#C14 DQ0_B/DQ6_B CA2_A
Around DRAM 22u*6 , 10u*2
G12 C4 VMC_DQ47 G2 VMC_DQ39 P3 FBC_CMD46 H12
G14
G3
VSS#G12
VSS#G14
VSS#G3
VDDQ#C4
VDDQ#E1
VDDQ#E14
E1
E14 CH1[BYTE1]
VMC_DQ40
VMC_DQ43
B3
F2
DQ0_A/DQ7_A
DQ1_A/DQ2_A
DQ2_A/DQ6_A
CH1[BYTE0] VMC_DQ38
VMC_DQ37
M2
P2
DQ1_B/DQ4_B
DQ2_B/DQ7_B
DQ3_B/DQ5_B
FBC_CMD36
FBC_CMD43
H5
H10
CA3_A
CA4_A
CA5_A
RG6
*EV@1K_1%_2
VMC_DQ42 VMC_DQ36 FBC_CMD48
H11
H4
L11
VSS#H11
VSS#H4
VDDQ#F11
VDDQ#F4
F11
F4
H1 QD40~47 VMC_DQ45
VMC_DQ46
E3
B4
B2
DQ3_A/DQ4_A
DQ4_A/DQ0_A
QD32~39 VMC_DQ32
VMC_DQ33
U3
V3
U4
DQ4_B/DQ2_B
DQ5_B/DQ1_B
FBC_CMD47
FBC_CMD34
J12
J11
J4
CA6_A
CA7_A
CG61
EV@22u/6.3V_6
CG15
EV@22u/6.3V_6
CG62
EV@22u/6.3V_6
CG30
EV@22u/6.3V_6
CG3
EV@22u/6.3V_6
CG2
EV@22u/6.3V_6
CG420
EV@10u/6.3V_4
CG58
EV@10u/6.3V_4

L4 VSS#L11 VDDQ#H1 H14 VMC_DQ41 E2 DQ5_A/DQ3_A VMC_DQ34 U2 DQ6_B/DQ0_B FBC_CMD32 J3 CA8_A


M1 VSS#L4 VDDQ#H14 J13 VMC_DQ44 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBC_CMD37 J5 CA9_A
M12 VSS#M1 VDDQ#J13 J2 DQ7_A/DQ1_A FBC_EDC4 T2 FBC_CMD44 G10 CABI_n_A N5 SNN_FBC_TCK1 TPG2
M14 VSS#M12 VDDQ#J2 K13 FBC_EDC5 C2 FBC_DBI4 R2 EDC0_B CKE_n_A TCK F10 SNN_FBC_TDI1 TPG18
M3 VSS#M14 VDDQ#K13 K2 FBC_DBI5 D2 EDC0_A DBI0_N_B TDI N10 SNN_FBC_TDO1 TPG9
N1 VSS#M3 VDDQ#K2 L1 DBI0_N_A VMC_WCK45 R4 FBC_CMD29 L3 TDO F5 SNN_FBC_TMS1 TPG16 +FBVDDQ_MEM
VSS#N1 VDDQ#L1 VMC_WCKB45 [27] VMC_WCK45 VMC_WCK45# R5 WCK_t_B/NC FBC_CMD52 CA0_B TMS
N12 L14 D4 M11 Close to DRAM 10u*4
N14 VSS#N12 VDDQ#L14 N11 [27] VMC_WCKB45 VMC_WCKB45# D5 WCK_t_A [27] VMC_WCK45# WCK_c_B/NC FBC_CMD40 M4 CA1_B
N3 VSS#N14 VDDQ#N11 N4 [27] VMC_WCKB45# WCK_c_A FBC_CMD50 L12 CA2_B
P11 VSS#N3 VDDQ#N4 P1 FBC_CMD39 L5 CA3_B
P4 VSS#P11 VDDQ#P1 P14 X16 X8 VMC_DQ52 P13 FBC_CMD42 L10 CA4_B CG421 CG419 CG418 CG417
R1 VSS#P4 VDDQ#P14 T1 VMC_DQ62 B11 VMC_DQ54 U13 DQ8_B/DQ13_B FBC_CMD49 K12 CA5_B J14 FBC_ZQ_2_A RG14 EV@121_1%_2 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4
R12 VSS#R1 VDDQ#T1 T11 VMC_DQ56 G13 DQ8_A NC VMC_DQ50 M13 DQ9_B/DQ11_B FBC_CMD51 K11 CA6_B ZQ_A K14
R14
R3
VSS#R12
VSS#R14
VSS#R3
VDDQ#T11
VDDQ#T14
VDDQ#T4
T14
T4
CH1[BYTE3] VMC_DQ57
VMC_DQ59
E13
F13
DQ9_A/DQ15_A
DQ10_A/DQ13_A
DQ11_A/DQ14_A
NC
NC
CH1[BYTE2] VMC_DQ53
VMC_DQ48
N13
U12
DQ10_B/DQ15_B
DQ11_B/DQ14_B
DQ12_B/DQ10_B
FBC_CMD28
FBC_CMD30
K4
K3
CA7_B
CA8_B
CA9_B
ZQ_B
FBC_ZQ_2_B RG8 EV@121_1%_2
VMC_DQ63 VMC_DQ55 FBC_CMD38
T10
T12
T3
VSS#T10
VSS#T12
VDDQ#U10
VDDQ#U5
U10
U5 QD56~63 VMC_DQ61
VMC_DQ58
E12
B12
B13
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
QD48~55 VMC_DQ51
VMC_DQ49
P12
V12
U11
DQ13_B/DQ12_B
DQ14_B/DQ9_B
FBC_CMD41
K5
M10 CABI_n_B
CKE_n_B +1.8V_AON
T5 VSS#T3 +1.8V_AON VMC_DQ60 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B
U1 VSS#T5 DQ15_A/DQ9_A NC FBC_EDC6 T13 FBC_CMD31 J1
VSS#U1 FBC_EDC7 C13 FBC_DBI6 R13 EDC1_B RESET_n SNN_FBC_RFU_G5_1
1u*4
U14 A10 G5 TPG14
V11 VSS#U14 VPP#A10 A5 FBC_DBI7 D13 EDC1_A GND DBI1_n_B NC#G5 M5 SNN_FBC_RFU_M5_1 TPG6
V13 VSS#V11 VPP#A5 V10 DBI1_n_A NC VMC_WCK67 R11 VMC_CLK1# K10 NC#M5
V2 VSS#V13 VPP#V10 V5 VMC_WCKB67 D11 [27] VMC_WCK67 VMC_WCK67# R10 WCK1_t_B [27] VMC_CLK1# VMC_CLK1 J10 CK_c
VSS#V2 VPP#V5 [27] VMC_WCKB67 VMC_WCKB67# D10 WCK1_t_A [27] VMC_WCK67# WCK1_c_B [27] VMC_CLK1 CK_t
V4 NC CG9 CG72 CG7 CG11
VSS#V4 [27] VMC_WCKB67# WCK1_c_A NC
EV@MT61K256M32JE-16:A EV@MT61K256M32JE-16:A EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2
EV@MT61K256M32JE-16:A

EV@MT61K256M32JE-16:A

A A

+FBVDDQ_MEM DRAM x16 1.8V VPP


Close to DRAM 1u*18
CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
[18x1uF + 4x10uF] [4x1uF]
AROUND DRAM
CG22 CG28 CG26 CG53 CG65 CG29 CG411 CG412 CG44 CG20 CG71 CG37 CG413 CG60 CG34 CG55 CG48 CG73
EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 EV@1u/10V_2 [2x10uF + 6x22uF]
UNDER OR AROUND DRAM
Option --> [1x220uF]
Quanta Computer Inc.
PROJECT : ZGN
Size Document Number Rev
D GDDR6 A1A

Date: Thursday, May 26, 2022 Sheet 40 of 150


5 4 3 2 1
5 4 3 2 1

MEMORY: FBD Partition 31..0 x16 Dual Channel DRAM Channel D is not use for GN20-E3 41
+FBVDDQ_MEM [26,27,35,38,39,40,130]
+1.8V_AON [25,26,30,31,32,35,38,39,40,45,48,126,130,131] 40OHM_NETCLASS1 40OHM_NETCLASS1
[27,41] FBD_DBI[7:0] [27,41] FBD_EDC[7:0]
FBD_DBI0 FBD_EDC0
+FBVDDQ_MEM FBD_DBI1 FBD_EDC1
VRAMG7A FBD_DBI2 FBD_EDC2
A11 FBD_DBI3 FBD_EDC3
A13 VSS#A11 FBD_DBI4 FBD_EDC4
A2 VSS#A13 A1 FBD_DBI5 FBD_EDC5
A4 VSS#A2 VDD#A1 A14 FBD_DBI6 FBD_EDC6
B1 VSS#A4 VDD#A14 E10 FBD_DBI7 FBD_EDC7
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13 [27,41] FBD_CMD[52:0]
D C5 VSS#C3 VDD#L13 L2 D
D1
D12
VSS#C5
VSS#D1
VSS#D12
VDD#L2
VDD#P10
VDD#P5
P10
P5
[27] VMD_DQ[31:0] CH0[CMD0~24]
D14 V1
D3 VSS#D14 VDD#V1 V14
E11 VSS#D3 VDD#V14
E4 VSS#E11 VRAMG7D
F1 VSS#E4 B10 +FBVDDQ_MEM
F12 VSS#F1 VDDQ#B10 B5 VRAMG7B VRAMG7C FBD_CMD1 H3 K1 FBD_VREFC
VSS#F12 VDDQ#B5 CA0_A VREFC Around DRAM 22u*6 , 10u*2
F14 C1 FBD_CMD13 G11
F3 VSS#F14 VDDQ#C1 C11 NORMAL NORMAL FBD_CMD12 G4 CA1_A
G1 VSS#F3 VDDQ#C11 C14 VMD_DQ11 G2 VMD_DQ2 N2 FBD_CMD24 H12 CA2_A
G12 VSS#G1 VDDQ#C14 C4 VMD_DQ15 B3 DQ0_A/DQ7_A VMD_DQ3 P3 DQ0_B/DQ6_B FBD_CMD11 H5 CA3_A RG42 CG500 CG481 CG483 CG487 CG489 CG491 CG493 CG501
G14
G3
VSS#G12
VSS#G14
VSS#G3
VDDQ#C4
VDDQ#E1
VDDQ#E14
E1
E14
CH0[BYTE1] VMD_DQ12
VMD_DQ13
F2
E3
DQ1_A/DQ2_A
DQ2_A/DQ6_A
DQ3_A/DQ4_A
CH0[BYTE0] VMD_DQ1
VMD_DQ0
M2
P2
DQ1_B/DQ4_B
DQ2_B/DQ7_B
DQ3_B/DQ5_B
FBD_CMD15
FBD_CMD22
H10
J12
CA4_A
CA5_A
CA6_A
N_E3@1K_1%_2 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@10u/6.3V_4 N_E3@10u/6.3V_4

VMD_DQ14 VMD_DQ4 FBD_CMD23


H11
H4
L11
VSS#H11
VSS#H4
VDDQ#F11
VDDQ#F4
F11
F4
H1
QD8~15 VMD_DQ9
VMD_DQ8
B4
B2
E2
DQ4_A/DQ0_A
DQ5_A/DQ3_A
QD0~7 VMD_DQ6
VMD_DQ7
U3
V3
U4
DQ4_B/DQ2_B
DQ5_B/DQ1_B
FBD_CMD0
FBD_CMD2
J11
J4
J3
CA7_A
CA8_A
L4 VSS#L11 VDDQ#H1 H14 VMD_DQ10 A3 DQ6_A/DQ5_A VMD_DQ5 U2 DQ6_B/DQ0_B FBD_CMD10 J5 CA9_A
M1 VSS#L4 VDDQ#H14 J13 DQ7_A/DQ1_A DQ7_B/DQ3_B FBD_CMD14 G10 CABI_n_A N5 SNN_FBD_TCK0 TPG38
M12 VSS#M1 VDDQ#J13 J2 FBD_EDC1 C2 FBD_EDC0 T2 CKE_n_A TCK F10 SNN_FBD_TDI0 TPG36
M14 VSS#M12 VDDQ#J2 K13 FBD_DBI1 D2 EDC0_A FBD_DBI0 R2 EDC0_B TDI N10 SNN_FBD_TDO0 TPG32
M3 VSS#M14 VDDQ#K13 K2 DBI0_N_A DBI0_N_B FBD_CMD5 L3 TDO F5 SNN_FBD_TMS0 TPG37 +FBVDDQ_MEM
N1 VSS#M3 VDDQ#K2 L1 VMD_WCKB01 D4 VMD_WCK01 R4 FBD_CMD18 M11 CA0_B TMS
VSS#N1 VDDQ#L1 [27] VMD_WCKB01 WCK_t_A [27] VMD_WCK01 WCK_t_B/NC CA1_B Close to DRAM 10u*4
N12 L14 VMD_WCKB01# D5 VMD_WCK01# R5 FBD_CMD7 M4
VSS#N12 VDDQ#L14 [27] VMD_WCKB01# WCK_c_A [27] VMD_WCK01# WCK_c_B/NC FBD_CMD20 CA2_B
N14 N11 L12
N3 VSS#N14 VDDQ#N11 N4 FBD_CMD8 L5 CA3_B
P11 VSS#N3 VDDQ#N4 P1 X16 X8 FBD_CMD16 L10 CA4_B CG502 CG485 CG495 CG498
P4 VSS#P11 VDDQ#P1 P14 VMD_DQ26 B11 VMD_DQ23 P13 FBD_CMD21 K12 CA5_B J14 FBD_ZQ_1_A RG33 N_E3@121_1%_2
VSS#P4 VDDQ#P14 DQ8_A DQ8_B/DQ13_B CA6_B ZQ_A N_E3@10u/6.3V_4 N_E3@10u/6.3V_4 N_E3@10u/6.3V_4 N_E3@10u/6.3V_4
R1 T1 VMD_DQ29 G13 NC VMD_DQ21 U13 FBD_CMD19 K11 K14
R12 VSS#R1 VDDQ#T1 T11 VMD_DQ31 E13 DQ9_A/DQ15_A NC VMD_DQ19 M13 DQ9_B/DQ11_B FBD_CMD6 K4 CA7_B ZQ_B
R14
R3
VSS#R12
VSS#R14
VSS#R3
VDDQ#T11
VDDQ#T14
VDDQ#T4
T14
T4
CH0[BYTE3] VMD_DQ30
VMD_DQ28
F13
E12
DQ10_A/DQ13_A
DQ11_A/DQ14_A
DQ12_A
NC
NC
CH0[BYTE2] VMD_DQ17
VMD_DQ20
N13
U12
DQ10_B/DQ15_B
DQ11_B/DQ14_B
DQ12_B/DQ10_B
FBD_CMD4
FBD_CMD9
K3
K5
CA8_B
CA9_B
CABI_n_B
FBD_ZQ_1_B RG32 N_E3@121_1%_2
VMD_DQ24 VMD_DQ18 FBD_CMD17
T10
T12
T3
VSS#T10
VSS#T12
VDDQ#U10
VDDQ#U5
U10
U5 QD24~31 VMD_DQ27
VMD_DQ25
B12
B13
A12
DQ13_A/DQ10_A
DQ14_A/DQ11_A
NC
NC
NC
QD16~23 VMD_DQ22
VMD_DQ16
P12
V12
U11
DQ13_B/DQ12_B
DQ14_B/DQ9_B
M10
CKE_n_B

T5 VSS#T3 +1.8V_AON DQ15_A/DQ9_A NC DQ15_B/DQ8_B FBD_CMD3 J1


U1 VSS#T5 FBD_EDC3 C13 FBD_EDC2 T13 RESET_n G5 SNN_FBD_RFU_G5 TPG42 +1.8V_AON
U14 VSS#U1 A10 FBD_DBI3 D13 EDC1_A GND FBD_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBD_RFU_M5 TPG40
VSS#U14 VPP#A10 DBI1_n_A DBI1_n_B VMD_CLK0# NC#M5 1u*4
V11 A5 NC K10
VSS#V11 VPP#A5 VMD_WCKB23 VMD_WCK23 [27] VMD_CLK0# VMD_CLK0 CK_c
V13 V10 D11 R11 J10
V2 VSS#V13 VPP#V10 V5 [27] VMD_WCKB23 VMD_WCKB23# D10 WCK1_t_A NC [27] VMD_WCK23 VMD_WCK23# R10 WCK1_t_B [27] VMD_CLK0 CK_t
VSS#V2 VPP#V5 [27] VMD_WCKB23# WCK1_c_A [27] VMD_WCK23# WCK1_c_B
V4 NC
VSS#V4 N_E3@MT61K256M32JE-16:A
N_E3@MT61K256M32JE-16:A N_E3@MT61K256M32JE-16:A CG204 CG221 CG233 CG178
N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2

N_E3@MT61K256M32JE-16:A

C C

+FBVDDQ_MEM DRAM x16 1.8V VPP


Close to DRAM 1u*18
CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
[18x1uF + 4x10uF] [4x1uF]
CG266 CG275 CG163 CG101 CG236 CG278 CG220 CG203 CG234 CG478 CG280 CG277 CG174 CG172 CG253 CG213 CG194 CG185
AROUND DRAM
N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 [2x10uF + 6x22uF]
UNDER OR AROUND DRAM
Option --> [1x220uF]

MEMORY: FBD Partition 63..32 x16 Dual Channel DRAM

+FBVDDQ_MEM 40OHM_NETCLASS1 40OHM_NETCLASS1


VRAMG5A [27,41] FBD_DBI[7:0] [27,41] FBD_EDC[7:0]
A11 FBD_DBI0 FBD_EDC0
A13 VSS#A11 FBD_DBI1 FBD_EDC1
A2 VSS#A13 A1 FBD_DBI2 FBD_EDC2
A4 VSS#A2 VDD#A1 A14 FBD_DBI3 FBD_EDC3
B1 VSS#A4 VDD#A14 E10 FBD_DBI4 FBD_EDC4
B14 VSS#B1 VDD#E10 E5 FBD_DBI5 FBD_EDC5
C10 VSS#B14 VDD#E5 H13 FBD_DBI6 FBD_EDC6
C12 VSS#C10 VDD#H13 H2 FBD_DBI7 FBD_EDC7 FBD_VREFC RG188 *N_E3@Short_0201 FBD_VREFC_H
C3 VSS#C12 VDD#H2 L13
C5 VSS#C3 VDD#L13 L2
D1 VSS#C5 VDD#L2 P10
B VSS#D1 VDD#P10 [27,41] FBD_CMD[52:0] B
D12 P5
D14
D3
VSS#D12
VSS#D14
VSS#D3
VDD#P5
VDD#V1
VDD#V14
V1
V14
[27] VMD_DQ[63:32]
CH1[CMD28~52]
E11
E4 VSS#E11
F1 VSS#E4 B10
F12 VSS#F1 VDDQ#B10 B5
F14 VSS#F12 VDDQ#B5 C1
F3 VSS#F14 VDDQ#C1 C11 VRAMG5D
G1 VSS#F3 VDDQ#C11 C14 VRAMG5B VRAMG5C
G12 VSS#G1 VDDQ#C14 C4 FBD_CMD33 H3 K1 FBD_VREFC_H +FBVDDQ_MEM
G14 VSS#G12 VDDQ#C4 E1 NORMAL NORMAL FBD_CMD45 G11 CA0_A VREFC
VSS#G14 VDDQ#E1 CA1_A Around DRAM 22u*6 , 10u*2
G3 E14 VMD_DQ47 G2 VMD_DQ38 N2 FBD_CMD35 G4
H11 VSS#G3 VDDQ#E14 F11 VMD_DQ40 B3 DQ0_A/DQ7_A VMD_DQ34 P3 DQ0_B/DQ6_B FBD_CMD46 H12 CA2_A
H4
L11
VSS#H11
VSS#H4
VSS#L11
VDDQ#F11
VDDQ#F4
VDDQ#H1
F4
H1
CH1[BYTE1] VMD_DQ41
VMD_DQ43
F2
E3
DQ1_A/DQ2_A
DQ2_A/DQ6_A
DQ3_A/DQ4_A
CH1[BYTE0] VMD_DQ37
VMD_DQ39
M2
P2
DQ1_B/DQ4_B
DQ2_B/DQ7_B
DQ3_B/DQ5_B
FBD_CMD36
FBD_CMD43
H5
H10
CA3_A
CA4_A
CA5_A
RG110
*N_E3@1K_1%_2 CG456 CG455 CG454 CG446 CG465 CG467 CG471 CG473
VMD_DQ42 VMD_DQ35 FBD_CMD48
L4
M1
M12
VSS#L4
VSS#M1
VDDQ#H14
VDDQ#J13
H14
J13
J2
QD40~47 VMD_DQ44
VMD_DQ46
B4
B2
E2
DQ4_A/DQ0_A
DQ5_A/DQ3_A
QD32~39 VMD_DQ33
VMD_DQ36
U3
V3
U4
DQ4_B/DQ2_B
DQ5_B/DQ1_B
FBD_CMD47
FBD_CMD34
J12
J11
J4
CA6_A
CA7_A
N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@22u/6.3V_6 N_E3@10u/6.3V_4 N_E3@10u/6.3V_4

M14 VSS#M12 VDDQ#J2 K13 VMD_DQ45 A3 DQ6_A/DQ5_A VMD_DQ32 U2 DQ6_B/DQ0_B FBD_CMD32 J3 CA8_A
M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A DQ7_B/DQ3_B FBD_CMD37 J5 CA9_A
N1 VSS#M3 VDDQ#K2 L1 FBD_EDC5 C2 FBD_EDC4 T2 FBD_CMD44 G10 CABI_n_A N5 SNN_FBD_TCK1 TPG25
N12 VSS#N1 VDDQ#L1 L14 FBD_DBI5 D2 EDC0_A FBD_DBI4 R2 EDC0_B CKE_n_A TCK F10 SNN_FBD_TDI1 TPG29
N14 VSS#N12 VDDQ#L14 N11 DBI0_N_A DBI0_N_B TDI N10 SNN_FBD_TDO1 TPG30
N3 VSS#N14 VDDQ#N11 N4 VMD_WCKB45 D4 VMD_WCK45 R4 FBD_CMD29 L3 TDO F5 SNN_FBD_TMS1 TPG22
VSS#N3 VDDQ#N4 [27] VMD_WCKB45 VMD_WCKB45# D5 WCK_t_A [27] VMD_WCK45 VMD_WCK45# R5 WCK_t_B/NC FBD_CMD52 CA0_B TMS
P11 P1 M11
P4 VSS#P11 VDDQ#P1 P14 [27] VMD_WCKB45# WCK_c_A [27] VMD_WCK45# WCK_c_B/NC FBD_CMD40 M4 CA1_B +FBVDDQ_MEM
R1 VSS#P4 VDDQ#P14 T1 FBD_CMD50 L12 CA2_B
VSS#R1 VDDQ#T1 CA3_B
Close to DRAM 10u*4
R12 T11 X16 X8 FBD_CMD39 L5
R14 VSS#R12 VDDQ#T11 T14 VMD_DQ61 B11 VMD_DQ52 P13 FBD_CMD42 L10 CA4_B
R3
T10
VSS#R14
VSS#R3
VSS#T10
VDDQ#T14
VDDQ#T4
VDDQ#U10
T4
U10
CH1[BYTE3] VMD_DQ57
VMD_DQ60
G13
E13
DQ8_A
DQ9_A/DQ15_A
DQ10_A/DQ13_A
NC
NC
CH1[BYTE2] VMD_DQ51
VMD_DQ53
U13
M13
DQ8_B/DQ13_B
DQ9_B/DQ11_B
DQ10_B/DQ15_B
FBD_CMD49
FBD_CMD51
K12
K11
CA5_B
CA6_B
CA7_B
ZQ_A
ZQ_B
J14
K14
FBD_ZQ_2_A RG26 N_E3@121_1%_2
CG461 CG463 CG469 CG477
VMD_DQ59 VMD_DQ54 FBD_CMD28
T12
T3
T5
VSS#T12
VSS#T3
VDDQ#U5
U5

+1.8V_AON
QD56~63 VMD_DQ63
VMD_DQ62
F13
E12
B12
DQ11_A/DQ14_A
DQ12_A
NC
NC
NC
QD48~55 VMD_DQ50
VMD_DQ55
N13
U12
P12
DQ11_B/DQ14_B
DQ12_B/DQ10_B
FBD_CMD30
FBD_CMD38
K4
K3
K5
CA8_B
CA9_B
FBD_ZQ_2_B RG27 N_E3@121_1%_2
N_E3@10u/6.3V_4 N_E3@10u/6.3V_4 N_E3@10u/6.3V_4 N_E3@10u/6.3V_4

U1 VSS#T5 VMD_DQ58 B13 DQ13_A/DQ10_A NC VMD_DQ48 V12 DQ13_B/DQ12_B FBD_CMD41 M10 CABI_n_B
U14 VSS#U1 A10 VMD_DQ56 A12 DQ14_A/DQ11_A NC VMD_DQ49 U11 DQ14_B/DQ9_B CKE_n_B
V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC DQ15_B/DQ8_B
V13 VSS#V11 VPP#A5 V10 FBD_EDC7 C13 FBD_EDC6 T13 FBD_CMD31 J1
V2 VSS#V13 VPP#V10 V5 FBD_DBI7 D13 EDC1_A GND FBD_DBI6 R13 EDC1_B RESET_n G5 SNN_FBD_RFU_G5_1 TPG21
V4 VSS#V2 VPP#V5 DBI1_n_A NC DBI1_n_B NC#G5 M5 SNN_FBD_RFU_M5_1 TPG28 +1.8V_AON
VSS#V4 VMD_WCKB67 D11 VMD_WCK67 R11 VMD_CLK1# K10 NC#M5
[27] VMD_WCKB67 VMD_WCKB67# D10 WCK1_t_A [27] VMD_WCK67 VMD_WCK67# WCK1_t_B [27] VMD_CLK1# VMD_CLK1 CK_c 1u*4
NC R10 J10
[27] VMD_WCKB67# WCK1_c_A NC [27] VMD_WCK67# WCK1_c_B [27] VMD_CLK1 CK_t
N_E3@MT61K256M32JE-16:A N_E3@MT61K256M32JE-16:A N_E3@MT61K256M32JE-16:A
N_E3@MT61K256M32JE-16:A CG84 CG95 CG219 CG87
N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2

A A

+FBVDDQ_MEM Close to DRAM 1u*18


DRAM x16 1.8V VPP
CLOSE or UNDER DRAM CLOSE OR UNDER DRAM
CG153 CG175 CG182 CG77 CG173 CG88 CG79 CG450 CG154 CG155 CG156 CG136 CG94 CG83 CG158 CG116 CG449 CG448 [18x1uF + 4x10uF] [4x1uF]
N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 N_E3@1u/10V_2 AROUND DRAM
[2x10uF + 6x22uF] Quanta Computer Inc.
UNDER OR AROUND DRAM
Option --> [1x220uF]
PROJECT : ZGN
Size Document Number Rev
D GDDR6 A1A

Date: Thursday, May 26, 2022 Sheet 41 of 150


5 4 3 2 1
5 4 3 2 1

42
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 42 of 150


5 4 3 2 1
5 4 3 2 1

43
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 43 of 150


5 4 3 2 1
5 4 3 2 1

+3V
Input EQ
MUX Control RP15
10K_1%_2
MUX_CNTL_C
RP22
IN1_EQ0

*4.7K_1%_2 RP18 *4.7K_1%_2 +3V_EDPMUX 44

6
CP581 0.1u/6.3V_2 GPU_eDP_TXP0_R RP21 *68K_5%_2 R1052 *4.7K_1%_4
[28] GPU_eDP_TXP0
2
CP580 0.1u/6.3V_2 GPU_eDP_TXN0_R QP1B R1053 *4.7K_1%_4
[28] GPU_eDP_TXN0

3
PJX138K
SEL Selected Port IN1_EQ1

1
CP579 0.1u/6.3V_2 INT_EDP_TXP0_R 5
[2] INT_EDP_TXP0 [32] MUX_CNTL
RP23 *4.7K_1%_2 RP25 *4.7K_1%_2 +3V_EDPMUX
CP577 0.1u/6.3V_2 INT_EDP_TXN0_R 1 Port A QP1A
[2] INT_EDP_TXN0
PJX138K RP24 *68K_5%_2 R1051 *4.7K_1%_4

4
0: CPU RP688
0 Port B 1: GPU
100K_1%_2 R1050 *4.7K_1%_4
D IN1_EQ2 D

RP20 *4.7K_1%_2 RP17 4.7K_1%_2

41

40

39

38

37

36

35
+3V_EDPMUX
RP19 *68K_5%_2 R1048 *4.7K_1%_4

GND#3

GND#2
RSVD

DP0B+

DP0A+
DP0B-

DP0A-
CP573 0.1u/6.3V_2 GPU_eDP_TXP1_R 1 34 C_OUT_EDP_TXP0 CP584 0.1u/6.3V_2 R1049 *4.7K_1%_4
[28] GPU_eDP_TXP1 DP1A+ OUT0+ EDP_TXP0_C [45]
CP574 0.1u/6.3V_2 GPU_eDP_TXN1_R 2 33 C_OUT_EDP_TXN0 CP585 0.1u/6.3V_2
[28] GPU_eDP_TXN1 DP1A- OUT0- EDP_TXN0_C [45]
3 32
+3V_EDPMUX VDD#1 VDD#6 +3V_EDPMUX
Port A Port B
CP571 0.1u/6.3V_2 INT_EDP_TXP1_R 4 31 C_OUT_EDP_TXP1 CP582 0.1u/6.3V_2
[2] INT_EDP_TXP1 DP1B+ OUT1+ EDP_TXP1_C [45]
CP572 0.1u/6.3V_2 INT_EDP_TXN1_R 5 30 C_OUT_EDP_TXN1 CP583 0.1u/6.3V_2 Value EQ0 EQ1 Value EQ2 EQ1
[2] INT_EDP_TXN1 DP1B- OUT1- EDP_TXN1_C [45]
MUX_CNTL_C 6 29
Path Control SEL VDD#5 +3V_EDPMUX
3.2 dB 0 0/R 3.2 dB 0 0/F
IN1_EQ1 7 28 AFS
EQ0 AFS
IN1_EQ0 8 27 BFS 3.8 dB 0 F/1 3.8 dB 0 R/1
EQ1 BFS
IN1_EQ2 9 26
EQ2 VDD#4 +3V_EDPMUX
4.7 dB R 0/R 4.7 dB R 0/F
CP567 0.1u/6.3V_2 GPU_eDP_TXP2_R 10 25 C_OUT_EDP_TXP2 CP586 0.1u/6.3V_2 +3V_EDPMUX
[28] GPU_eDP_TXP2 DP2A+ OUT2+ EDP_TXP2_C [45]
CP568 0.1u/6.3V_2 GPU_eDP_TXN2_R 11 24 C_OUT_EDP_TXN2 CP587 0.1u/6.3V_2 5.9 dB R F/1 5.9 dB R R/1
[28] GPU_eDP_TXN2 DP2A- OUT2- EDP_TXN2_C [45]
12 23 EDP_HPD_MUX RP37 *10K_1%_2
+3V_EDPMUX VDD#2 VDD#3 +3V_EDPMUX
7.0 dB F 0/R 7.0 dB F 0/F
CP569 0.1u/6.3V_2 INT_EDP_TXP2_R 13 22 C_OUT_EDP_TXP3 CP588 0.1u/6.3V_2
[2] INT_EDP_TXP2 DP2B+ OUT3+ EDP_TXP3_C [45]
CP570 0.1u/6.3V_2 INT_EDP_TXN2_R 14 21 C_OUT_EDP_TXN3 CP589 0.1u/6.3V_2 7.8 dB F F/1 7.8 dB F R/1

GND#1
[2] INT_EDP_TXN2
DP3A+

DP3B+
DP2B- DP3A- OUT3- EDP_TXN3_C [45]

DP3B-
PD

9.0 dB 1 0/R 9.0 dB 1 0/F


UP36 BSS138:BAM01380009 vendor spec
15

16

17

18

19

20
C PI3DPX8121ZLDEX C
PD PD 10.3 dB 1 F/1 10.3 dB 1 R/1

GPU_eDP_TXP3_R QP6

3
[28] GPU_eDP_TXP3 CP565 0.1u/6.3V_2
EDP_HPD_MUX 2
[28] GPU_eDP_TXN3 CP566 0.1u/6.3V_2 GPU_eDP_TXN3_R [45] EDP_HPD_PANEL
PJA138K CP6
0.47u/25V_4
Gain and Output Swing
AFS

1
CP591 0.1u/6.3V_2 INT_EDP_TXP3_R RP42
[2] INT_EDP_TXP3
100K_1%_2 RP30 *4.7K_1%_2 RP35 4.7K_1%_2 +3V_EDPMUX
CP590 0.1u/6.3V_2 INT_EDP_TXN3_R
[2] INT_EDP_TXN3
RP31 *68K_5%_2 R1044 *4.7K_1%_4

R1045 *4.7K_1%_4

BFS
+3V_EDPMUX EDP_HPD_PANEL
TPP90 ULT_EDP_HPD_R RP29 *4.7K_1%_2 RP36 4.7K_1%_2
TPP91 CPU_EDP_HPD_R +3V_EDPMUX
UP37 TPP92 RP28 *68K_5%_2 R1047 *4.7K_1%_4
MUX_CNTL_C 1 16
RP692 *Short_0201 CPU_EDP_HPD_R 2 S VCC 15 RP693 4.7K_1%_2 R1046 *4.7K_1%_4
CPU HPD [2] CPU_EDP_HPD
RP691 *Short_0201 ULT_EDP_HPD_R 3 IA0 EN# 14
GPU HPD [32] ULT_EDP_HPD EDP_HPD_PANEL 4 IA1 ID0 13 TPP84
RP705 *Short_0201 INT_EDP_AUXP_R 5 YA ID1 12 TPP85
[2] INT_EDP_AUXP GPU_eDP_AUXP_R IB0 YD INT_EDP_AUXN_R TPP86
[28] GPU_eDP_AUXP RP707 *Short_0201 6 11 RP706 *Short_0201 INT_EDP_AUXN [2] Gain Swing AFS or BFS State Pull-up Pull-down
CP595 0.1u/6.3V_2 EDP_AUX_C_R 7 IB1 IC0 10 GPU_eDP_AUXN_R RP708 *Short_0201
[45] EDP_AUX_C YB IC1 EDP_AUX#_C_R GPU_eDP_AUXN [28]
8 9 CP594 0.1u/6.3V_2
GND YC EDP_AUX#_C [45]
-3.5 dB 4.7K 0 0 NC 0
PI3CH480QEX
-0.5 dB 4.7K R R NC 68K

-3.5 dB NC F F NC NC
B B

-0.5 dB NC 1 1 0 NC

PCH_LVDS_BLON
GPU PWM Level shift PWM OUT Enable Level shift Backlight On TPP23
TPP19
LCD_BLEN
LVDS_BLON1

+3V +3V
TPP3
Power
+3V +3V +3V_EDPMUX

RP16 *Short_0603

RP88 RP87
3V RP1049 RP1048 5
3V 1
10K_1%_2 1K_1%_2 10K_1%_2 1K_1%_2 [2,32] PCH_LVDS_BLON
4
LVDS_BLON1 [45]
[32] LCD_BLEN 2
BKL_PWM_GFX PWM_OUT_EN_IC UP45 +3V_EDPMUX
1.8V - GPP_Sx 3 M74VHC1GT32DFT2G
3

1.8V
[32] LCD_BL_PWM 5 2 [12] PWM_OUT_EN 5 2 CP1 CP9 CP2 CP3 CP7 CP4 CP5
QP2B QP1009B 4.7u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2
QP2A PJX138K QP1009A PJX138K !! Take care "OR gate VIH" !!
PJX138K PJX138K
4

PWM_SW_SELECT_Q BRIGHT
PWM (Backlight) TPP5
TPP80
PWM_OUT_EN_IC TPP87
TPP88
PCH_DPST_PWM
BKL_PWM_GFX
LCDVCC TPP20
PCH_DISP_ON
LCD_VDD
TPP89 RP812 *Short_0201 TPP17 DISP_ON
[12] LCDVCC_CTL_PCH TPP4
+3V +3V
A UP4 A
8 1 +3V
Vcc COM BRIGHT [45]
7 2 PWM_OUT_EN_IC
[2] PCH_DPST_PWM Y1 INH
5
BKL_PWM_GFX 6 3 5 1
Y2 GND_1
1 4
[2] PCH_DISP_ON DISP_ON [45]
[32] PWM_SW_SELECT_Q RP80 *Short_0201 5 4 RP82 4 2
A GND_2
100K_1%_2 2
[32] LCD_VDD
Quanta Computer Inc.
3

74LVC2G53DC A INH Out 3 UP43 UP44


M74VHC1GT32DFT2G MC74VHC1G08DFT2G
L L COM=Y1 PROJECT : ZGN
RP81 100K_1%_2 RP79 *10K_1%_2 +3V H L COM=Y2 !! Take care "OR gate VIH" !! RP814 *0_5%_2 Size Document Number Rev

x H None C eDP MUX(PS8461E) A1A

Date: Thursday, May 26, 2022 Sheet 44 of 150


5 4 3 2 1
5 4 3 2 1

CNP1001
eDP 196522-40041-3
Remove 1pcs before measure
LCDVCC
NV DDS support G-SYNC-DD only but NVSR MAX 1.2A
LCDVCC_CONN

045

41
+VIN LCDVCC +VIN +VIN_PANEL_R
RP1002 *Short_0805 +3V
LCDVCC 1
1 MESD05N92ULA USBP+_CCD_R 2 2.5A / 100mils RP1003 *Short_0805
DP1002 3 3 RP1028 RP1029
2 USBP-_CCD_R EDP_AUX_C 4 *1M_1%_2 *22_5%_8 RP1004 *Short_0805
[44] EDP_AUX_C 5
EDP_AUX#_C CP1020 LCDVCC
[44] EDP_AUX#_C 6
DP1001 2 1 *AZ5725-01F.R7G DMIC_CLK_C CP1033
7

3
*15p/25V_2 1u/10V_2 UP1001 +VIN
[44] EDP_TXP0_C 8
DMIC_DATA_C

3
DP1003 2 1 *AZ5725-01F.R7G [44] EDP_TXN0_C 5 1
9 IN OUT DISP_ON 2 2
10 3 2 RP1030
[44] EDP_TXP1_C 11 FLAG GND
[44] EDP_TXN1_C CP1024 QP1003 *1M_1%_2 QP1001
+1.8V_AON 12 RP1031 10_1%_2 4 CP1022 CP1021 CP1023 CP1031 *DDTC144EUA-7-F *2N7002K

1
[44] DISP_ON

1
13 EN *47u/6.3V_8 CP1034 CP1035
[44] EDP_TXP2_C 14 0.01u/50V_4 0.1u/6.3V_2 10u/6.3V_4 *15p/25V_2
D G517H1T11U D
[44] EDP_TXN2_C 15 *15p/25V_2 *15p/25V_2
QP1002 RP1032

2
*NVSR@PJA138K 16
[44] EDP_TXP3_C 17
[32] FRM_LCK# 1 3 RP1001 *NVSR@0_5%_2 [44] EDP_TXN3_C 100K_1%_2
18
G-SYNC NVSR Panel_OD 19
20
RP1005 DDS@0_5%_2 eDP_I2C_CLK_C 21 +VIN_PANEL_R
[32] eDP_I2C_CLK eDP_I2C_DATA_C 22
DDS/G-SYNC DD RP1006 DDS@0_5%_2
[32] eDP_I2C_DATA 23
DMIC_DATA_C 24
DMIC_CLK_C 25
DMIC 26 CP1008 CP1009 CP1010 CP1011 CP1032
[10] USBP6+
RP1011 *Short_0201 USBP+_CCD_R
USBP-_CCD_R
27
28
Touch Screen Power Backlight 10u/25V_8 10u/25V_8 0.1u/25V_2 100p/50V_2 *15p/25V_2
CCD [10] USBP6-
RP1012 *Short_0201
EDP_HPD_R 29
[44] EDP_HPD_PANEL RP1013 33_1%_2
30
+VCC_TSN 31
+3V_CCD BL_ON 32
BRIGHT 33 +3V
[44] BRIGHT 34 +3V
+MIC_VCC 35
LTTPP142 36
RP1019 *Short_0201 +MIC_VCC
[86] BRIGHT_EC 37 +3V_CCD
[86] PCH_BLON_EC RP1026 *Short_0201 UP1002
38 MC74VHC1G08DFT2G
39

5
+VIN_PANEL_R RP1037
40

1
[44] LVDS_BLON1 1
TSN@10K_1%_2 4 +3V

42
2 QP1004 2 CP1004 CP1005 CP1006 CP1007
[86] EC_FPBACK#
0.1u/6.3V_2 1000p/25V_2 0.1u/6.3V_2 1000p/25V_2
Take Card mini LED panel (36W/12V=3A (120mis) TSN@DMP2130L-7

3
3
3

5
QP1005 RP1038 TSN@0.01_1%_6 +VCC_TSN RP1027 1
2 100K_1%_2 4 BL_ON
Touch Screen Conn. Touch Screen Power on eDP conn. [4] TOUCH_PWR_EN
TSN@DDTC144EUA-7-F
LID# 2

3
UP1003
MC74VHC1G08DFT2G
8
TOUCH_INT#_C RP1043 TSN@2.2K_1%_2 RP1058 TSN@0_5%_2 TOUCH_RST#_C LCDVCC_CONN
C TSN_I2C_SCL_C +VCC_TSN [9,97] TOUCH_RST# TSN_I2C_SCL_C 6 C
RP1044 TSN@2.2K_1%_2 RP1055 TSN@0_5%_2
TSN_I2C_SDA_C [6,97] TSN_I2C_SCL TSN_I2C_SDA_C 5
RP1045 TSN@2.2K_1%_2 RP1056 TSN@0_5%_2
[6,97] TSN_I2C_SDA TOUCH_INT#_C 4
[9,97] TOUCH_INT# RP1057 TSN@0_5%_2
TOUCH_EN_C 3
2 CP1002 CP1003
1
7 CCD PWR MIC PWR 0.1u/6.3V_2 100p/50V_2

+3V
CNP1004
TSN@51218-00601-001 RP1053 *0_5%_6 +3V

RP1052 *Short_0603 +1.8V


OLED - Power Conn. RP1039
VO1: 1.3A(52mils) / VO2: 3.6A (145mils)

1
+1.8V
10K_1%_2 QP1006
2
RP1050

11

1
RP1061 VO2 VO1 DMP2130L-7
10K_1%_2 QP1010

3
3
OLED@4.7K_1%_2 2
R1054 OLED@0.01_1%_8 ELVDD 1 QP1007
2 [4] CCD_PWR_EN 2 RP1040 *Short_0603 +3V_CCD DMP2130L-7
EL_ON3 R1055 OLED@0.01_1%_8 ELVSS 3

3
3
4 DDTC144EUA-7-F
5 QP1011

1
RP1060 OLED@0_5%_2 EL_ON2 6 2 RP1051 *Short_0603
+1.8V_ [145] SWIRE
7
+MIC_VCC
BL_ON 3 1 EL_ON3 8 DDTC144EUA-7-F
OLED Panel remind 9 +3V

1
※ VO1=ELVDD, VO2=ELVSS, Swire=EL_ON2 用AWG34 10
QP1012 RP1054 *Short_0201
2

※ 所所Power, “GND” 都都所都都cable 接接, 否否否所Abnormal display風風


OLED@2N7002K
※ PMIC GND 用AWG34
※ EL_ON3 Connect system GPIO(1.8V), like BL_EN and detail timing will release after +1.8V RP1020 RP1021
+3V +1.8V
12

kick off . *100K_1%_2 *100K_1%_2


※ 需用Coaxial線
EDP_AUX_C EDP_AUX#_C
CNP1003
OLED@132F10-000000-A2-R

B
DMIC Level Shift (PCH) RP1024 RP1025
B
*100K_1%_2 *100K_1%_2
+3V_S5 +1.8V_DEEP_SUS

CP1025 CP1026
DMIC Voltage must be 1.8V +3V_S5 +1.8V_DEEP_SUS
UP1004
*0.1u/6.3V_2 *0.1u/6.3V_2 CP1027 CP1028
UP1005
1 6 *0.1u/6.3V_2 *0.1u/6.3V_2
AES Stylus 2
VCCA VCCB
5
1
VCCA VCCB
6
GND DIR PCH 2 5
DMIC_DATA_C RP1007 33_1%_2 PCH_DMIC_DAT 3
A B
4 DMIC_DATA0_1V8 [12] DMIC_CLK_C
GND DIR PCH +3V
RP1008 33_1%_2 PCH_DMIC_CLK 3 4 DMIC_CLK0_1V8 [12]
*74AVC1T45FZ4-7 A B
UP1006 CNP1002 *74AVC1T45FZ4-7
4 RP1033 *Short_0201
1 +3V_S5_PEN RP1036 *Short_0201
20 mils OUT 2
1
RP1022 RP1023
1

3 RP1034 **1K_1%_2 *2K_1%_2 *2K_1%_2


+3V_S5 IN CP1029 DP1004 3
2 **AES@220p/25V_2 **AES@AZ5725-01F.R7G *AES@50224-00201-V01 CP1030 *27p/25V_2
GND eDP_I2C_CLK_C
2

RP1035
*AES@G5250Q1T73U **2K_1%_2 eDP_I2C_DATA_C
CODEC CODEC
RP1009 *0_5%_2 DMIC_DAT [64] RP1010 *0_5%_2 DMIC_CLK [64]

EDP_HPD_PANEL BRIGHT

CP1012 RP1016
180p/25V_2 100K_1%_2
Panel OD control HALL Sensor +3VPCU
DB GMR/HALL Sensor
A RZL1 *Hall@100K_1%_2 A
+3V +1.8V
RP1059 *Short_0201
RZL2 RZM2 *GMR@0_5%_4
LCDVCC LID#_GMR_DB [150]
Hall@2.2_5%_6
RP1047 RP1046 +3V_S5 RZL3 *Hall@0_5%_4
LID#_DB [150]
*0_5%_2 *Short_0201
[86] LID# LID#
5

RP1041 [9,97] TOUCH_EN 1 LID# RZM3 *GMR@1K_1%_2 4 1 TABLET_MODE [86]


4 TOUCH_EN_C OUT1 OUT2
*10K_1%_2
VCC
OUTPUT
2

1.8V LID# 2
DZL1
CZL1 +3VPCU RZM4 *GMR@0_5%_4 3
VDD GND
2
Quanta Computer Inc.
2

Hall@2.2u/10V_4
GND
S
N

UZM1
PROJECT : ZGN
3

QP1008 1 3 PJA138K Panel_OD UP1007 AZ5725-01F.R7G CZM1 *GMR@HGDEDM013A


[12] Panel_OD_PCH
1

*MC74VHC1G08DFT2G MRZL1 *GMR@0.1u/6.3V_2


3

RP1042 *0_5%_4 Hall@YB8251ST23 Size Document Number Rev


Custom eDP cONN./CCD A1A
Date: Thursday, May 26, 2022 Sheet 45 of 150
5 4 3 2 1
5 4 3 2 1

46
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 46 of 150


5 4 3 2 1
5 4 3 2 1

47
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 47 of 150


5 4 3 2 1
5 4 3 2 1

HDMI 2.1 ReDriver(HDM)


POWER
048

2211_EQ1

2211_EQ0
2211_AD3

2211_AD2
+3V_HDMI +3V_HDMI

+3V +3V_HDMI

43

42

41

40

39
U2H1
close pin 6、9 close pin 24、27 close pin 36

AD3

AD2

EQ1

EQ0
EPAD
2211_EQ2 1 38 2211_FG1 R2H1 *Short_0603
EQ2 FG1
D 2211_SW 1 2 37 2211_FG0 D
SW1 FG0 C2H8 C2H1 C2H9 C2H10 C2H11 C2H2 C2H12 C2H3 C2H13 C2H4 C2H5 C2H6
GPU 3
VCC_1 VCC_10
36 0.1u/6.3V_2 4.7u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2

C2H7 0.1u/6.3V_2 GPU_D2_C 4 35 C_TX2_HDMI+ R2H2 *Short_0201


[28] GPU_D2 A0RX+ A0TX+ TX2_HDMI+ [49]
C2H14 0.1u/6.3V_2 GPU_D2#_C 5 34 C_TX2_HDMI- R2H3 *Short_0201
[28] GPU_D2# A0RX- A0TX- TX2_HDMI- [49] close pin 3 close pin 12、15 close pin 30、33
6 33
VCC_2 VCC_9
C2H15 0.1u/6.3V_2 GPU_D1_C 7 32 C_TX1_HDMI+ R2H4 *Short_0201
[28] GPU_D1 A1RX+ A1TX+ TX1_HDMI+ [49]
C2H16 0.1u/6.3V_2 GPU_D1#_C 8 31 C_TX1_HDMI- R2H5 *Short_0201
[28] GPU_D1#
9
A1RX- A1TX-
30
TX1_HDMI- [49]
HPD +3V_HDMI HDMI_HPD
HDMI_HPD [49]
VCC_3 VCC_8
C2H17 0.1u/6.3V_2 GPU_D0_C 10 29 C_TX0_HDMI+ R2H6 *Short_0201 HDMI_HPD
[28] GPU_D0 A2RX+ A2TX+ TX0_HDMI+ [49] TPP93
C2H18 0.1u/6.3V_2 GPU_D0#_C 11 28 C_TX0_HDMI- R2H7 *Short_0201 HDMI_HPD_GPU 3V 5V 3V
[28] GPU_D0# A2RX- A2TX- TX0_HDMI- [49] TPP94
12 27 R2H8 2211_HPD#
VCC_4 VCC_7 1M_1%_2
5V
C2H19 0.1u/6.3V_2 GPU_CLK_C 13 26 C_TXC_HDMI+ R2H9 *Short_0201

2
[28] GPU_CLK A3RX+ A3TX+ TXC_HDMI+ [49]

3
Q2H2
C2H20 0.1u/6.3V_2 GPU_CLK#_C 14 25 C_TXC_HDMI- R2H10 *Short_0201 R2H11 *Short_0201 1 3 HDMI_HPD 2 R2H12 20K_1%_2 HDMI_HPD
[28] GPU_CLK# A3RX- A3TX- TXC_HDMI- [49] [32] HDMI_HPD_GPU
METR3904-G
15 24 Q2H1 2N7002KTB

1
VCC_5 VCC_6 R2H14
TP2H1 16 23 R2H13 47K_1%_2

PRSNT#
I2C_RESET# DNC R2H15 *Short_0201 100K_1%_2
[2] HDMI_HPD_CON_NV

ENI2C
C 2211_AD1 17 22 TP2H2 C

SDA

SCL
AD1 I2C_DONE

18

19

20

21
PI3HDX12211ZHEX

2211_ENI2C
2211_HPD#
2211_SDA

2211_SCL
R1057 *4.7K_1%_4
EQ2 EQ1 EQ0 Input EQ at 12Gbps

R2H16 4.7K_1%_2 2211_EQ0


0 0 0 6.8dB
0 0 1 7.8dB
R1058 *4.7K_1%_4 0 1 0 9.2dB
R2H17 *4.7K_1%_2 2211_EQ1
0 1 1 10.7dB
HDMI_SCLK_R
1 0 0 12.2dB
DDC +1.8V_AON +1V8_MAIN +1.8V_AON +1V8_MAIN TPP95
HDMI_SDATA_R R1059 *4.7K_1%_4
TPP96 1 0 1 13.4dB
R2H40 R2H41 R2H18 4.7K_1%_2 2211_EQ2
B *Short_0201 *0_5%_2
1 1 0 14.8dB B
R2H37 R2H39 1 1 1 16.4dB
*Short_0201 *0_5%_2

1.8V
5V
R2H19 R2H20 FG1 FG0 Output Pre-emphassis
2.2K_1%_2 2.2K_1%_2 R1060 *4.7K_1%_4
5

R2H23 4.7K_1%_2 2211_FG0


4 3 HDMI_SCLK_R R2H24 *Short_0201
0 0 -3.5dB
[28] GPU_DDCCLK HDMI_SCLK [49]
Q2H3A R1061 *4.7K_1%_4
0 1 -2dB
GPU CONN
5

SSM6N43FU 1 0 -0.5dB
R2H26 *4.7K_1%_2 2211_FG1
4 3 HDMI_SDATA_R R2H27 *Short_0201
[28] GPU_DDCDATA HDMI_SDATA [49] 1 1 1.5dB
Q2H4A
SSM6N43FU

R1062 *4.7K_1%_4
SW1 Output Pre-emphassis Swing

R2H29 4.7K_1%_2 2211_SW 1


0 1000mV
Reserve for I2C mode 0: GPIO Mode <--- Default 1 1200mV
1: I2C Mode
A NC: EEPROM A

R2H30 *4.7K_1%_2 2211_AD1 +3V_HDMI

+3V_HDMI Quanta Computer Inc.


R2H31 *4.7K_1%_2 2211_AD2 2211_SCL R2H32 *4.7K_1%_2 2211_ENI2C

R2H33 4.7K_1%_2 R2H34 *4.7K_1%_2


PROJECT : ZGN
R2H35 *4.7K_1%_2 2211_AD3 2211_SDA R2H36 *4.7K_1%_2 Size Document Number Rev
Custom HDMI Re-Driver(PI3HDX12211ZHEX) A1A

Date: Thursday, May 26, 2022 Sheet 48 of 150


5 4 3 2 1
5 4 3 2 1

049
HDMI_HPD
[48] HDMI_HPD TX2_HDMI+
[48] TX2_HDMI+
TX2_HDMI-
[48] TX2_HDMI-
TX1_HDMI+
For ESD [48] TX1_HDMI+
TX1_HDMI-
[48] TX1_HDMI-
TX0_HDMI+
Layout note:Place close to HDMI Conn

20

22
[48] TX0_HDMI+
D TX0_HDMI- D
[48] TX0_HDMI-
TXC_HDMI+ GND#1 GND#3
[48] TXC_HDMI+
UH1001 TXC_HDMI- TX2_HDMI+ 1
[48] TXC_HDMI- D2+
TX0_HDMI+ 1 10 TX0_HDMI+ HDMI_SCLK 2
LINE1 NC#4 [48] HDMI_SCLK HDMI_SDATA TX2_HDMI- D2_Shield
3
TX0_HDMI- 2 9 TX0_HDMI- [48] HDMI_SDATA TX1_HDMI+ 4 D2-
LINE2 NC#3 D1+
5
TX1_HDMI- D1_Shield
3 6
GND TX0_HDMI+ D1-
7
TXC_HDMI+ TXC_HDMI+ D0+
4 7 8
LINE3 NC#2 TX0_HDMI- D0_Shield
9
TXC_HDMI- TXC_HDMI- TXC_HDMI+ D0-
5 6 RH1001 2.2K_1%_2 10
LINE4 NC#1 +5V_HDMIC CLK+
RH1002 2.2K_1%_2 11
TXC_HDMI- CLK_Shield
*AZ1023-04F.R7G 12
CLK-
13
CEC
14
HDMI_SCLK Utility
C UH1002 DH1001 *TVM0G5R5M220R_22p 15 C
TX2_HDMI+ TX2_HDMI+ HDMI_SDATA SCL
1 10 UH1003 DH1002 *TVM0G5R5M220R_22p 16
LINE1 NC#4 SDA
17
TX2_HDMI- TX2_HDMI- +5V_HDMIC DDC/CEC GND
2 9 1 18
LINE2 NC#3 40 mils OUT 19 +5V
HP_DET
3 3
GND +5V IN GND#2 GND#4
CH1001 DH1003
TX1_HDMI+ 4 7 TX1_HDMI+ 2 *220p/25V_2 *TVM0G5R5M220R_22p HDMI_HPD

21

23
LINE3 NC#2 GND CNH1001
TX1_HDMI- 5 6 TX1_HDMI- 101-98011202
LINE4 NC#1 G5250Q1T73U DH1004 CH1002
*AZ1023-04F.R7G *TVM0G5R5M220R_22p 220p/25V_2

B B

Quanta Computer Inc.


A A
PROJECT : ZGN
Size Document Number Rev
Custom HDMI CONN A1A

Date: Monday, March 21, 2022 Sheet 49 of 150


5 4 3 2 1
5 4 3 2 1

50
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 50 of 150


5 4 3 2 1
5 4 3 2 1

51
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 51 of 150


5 4 3 2 1
5 4 3 2 1

52
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 52 of 150


5 4 3 2 1
5 4 3 2 1

NGFF_M.2 SSD #1 (NGF) PCIE 1X4 LR /SATA 53


CN1SS1001
+3V_SSD1

1
NGFF MKEY 2
3 GND#1 3.3Vaux_1 4 +3V_SSD1
D R1SS1001 *Short_0201 PCIEX4_B_RX_N_3_R 5 GND#3 3.3Vaux_2 6 D
[10] PCIEX4_B_RX_N_3 PETN3 PERn3 NC#10
R1SS1002 *Short_0201 PCIEX4_B_RX_P_3_R 7 8
[10] PCIEX4_B_RX_P_3 PETP3 PERp3 NC#11
9 10 TP1SS1003
C1SS1001 0.22u/6.3V_2 PCIEX4_B_TX_N_3_R 11 GND#7 DAS/DSS#(I)(OD) 12
[10] PCIEX4_B_TX_N_3 PERN3 PETn3 3.3Vaux_3
[10] PCIEX4_B_TX_P_3 C1SS1002 0.22u/6.3V_2 PCIEX4_B_TX_P_3_R 13 14
15 PERP3 PETp3 3.3Vaux_4 16
R1SS1003 *Short_0201 PCIEX4_B_RX_N_2_R 17 GND#8 3.3Vaux_5 18
PCIE Gen 4 # 1

[10] PCIEX4_B_RX_N_2 PETN2 PERn2 3.3Vaux_6


R1SS1004 *Short_0201 PCIEX4_B_RX_P_2_R 19 20
[10] PCIEX4_B_RX_P_2 PETP2 PERp2 NC#12
21 22
C1SS1003 0.22u/6.3V_2 PCIEX4_B_TX_N_2_R 23 GND#2 NC#13 24
[10] PCIEX4_B_TX_N_2 PERN2 PETn2 NC#14
[10] PCIEX4_B_TX_P_2 C1SS1004 0.22u/6.3V_2 PCIEX4_B_TX_P_2_R 25 26
27 PERP2 PETp2 NC#15 28
R1SS1005 *Short_0201 PCIEX4_B_RX_N_1_R 29 GND#9 NC#16 30
[10] PCIEX4_B_RX_N_1 PETN1 PERn1 NC#17
R1SS1006 *Short_0201 PCIEX4_B_RX_P_1_R 31 32
[10] PCIEX4_B_RX_P_1 PETP1 PERp1 NC#2
33 34
C1SS1005 0.22u/6.3V_2 PCIEX4_B_TX_N_1_R 35 GND#10 NC#3 36
[10] PCIEX4_B_TX_N_1 PERN1 PETn1 NC#4
[10] PCIEX4_B_TX_P_1 C1SS1006 0.22u/6.3V_2 PCIEX4_B_TX_P_1_R 37 38
TP1SS1005
39 PERP1 PETp1 DEVSLP 40
R1SS1010 *Short_0201 PCIEX4_B_RX_N_0_R 41 GND#11 NC#5 42
[10] PCIEX4_B_RX_N_0 SATA B+/PETN0 PERn0 NC#6
R1SS1008 *Short_0201 PCIEX4_B_RX_P_0_R 43 44
[10] PCIEX4_B_RX_P_0 SATA B-/PETP0 PERp0 NC#7
45 46
C1SS1007 0.22u/6.3V_2 PCIEX4_B_TX_N_0_R 47 GND#12 NC#8 48
[10] PCIEX4_B_TX_N_0 SATA A-/PERN0 PETn0 NC#9
[10] PCIEX4_B_TX_P_0 C1SS1008 0.22u/6.3V_2 PCIEX4_B_TX_P_0_R 49 50 NGFF1_RST#
51 SATA A+/PERP0 PETp0
PERST#/NC 52
C
CLK_PCIE_SSD1N_R 53 GND#13 CLKREQ#/NC 54 PCIE_CLKREQ_0# [11] C
[11] CLK_PCIE_SSD1N R1SS1012 *Short_0201
R1SS1013 *Short_0201 CLK_PCIE_SSD1P_R 55 REFCLKN PEWAKE#/NC 56
[11] CLK_PCIE_SSD1P REFCLKP NC#18 TP1SS1001
57 58
GND#14 NC#19 TP1SS1002

67 68 +3V_SSD1
TP1SS1004 NGFF1_PEDET1 69 NC#1 SUSCLK
71 PEDET(OC-PCIE/GND-SATA) 70
73 GND#4 3.3Vaux_7 72
75 GND#5 3.3Vaux_8 74
GND#6 3.3Vaux_9

76
77
78
79
76
77
78
79
NASM0-S6701-TS40

B B

R1SS1018 *Short_0201

DECOUPLING +3V
+3V_DEEP_SUS
+3V_SSD1

5
C1SS1009 47u/6.3V_8 R1SS1017 *Short_0805 C1SS1010 10u/6.3V_4
1
PLTRST# [12,20,25,55,61,68,96]
C1SS1011 10u/6.3V_4 C1SS1012 0.1u/6.3V_2 NGFF1_RST# 4
2 Reset_M.2SSD1# [4]
C1SS1013 0.1u/6.3V_2
R1SS1019

3
C1SS1014 0.1u/6.3V_2 *100K_1%_2 U1SS1001 R1SS1020
*MC74VHC1G08DFT2G *100K_1%_2
C1SS1015 0.1u/6.3V_2

C1SS1016 0.1u/6.3V_2
A A
C1SS1017 *47u/6.3V_8

C1SS1018 *47u/6.3V_8 Quanta Computer Inc.


C1SS1019 *15p/25V_2 PROJECT : ZGN
C1SS1020 *15p/25V_2 Size Document Number Rev
B NGFF SSD #1 / PCIE/STAT A1A

Date: Thursday, May 26, 2022 Sheet 53 of 150


5 4 3 2 1
5 4 3 2 1

54
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 54 of 150


5 4 3 2 1
5 4 3 2 1

NGFF_M.2 SSD #2 (NGF)


CN2SS1001
+3V_SSD2
55
1
NGFF MKEY 2
3 GND#1 3.3Vaux_1 4 +3V_SSD2
R2SS1001 *Short_0201 PEG_RXN3_R 5 GND#3 3.3Vaux_2 6
D [10] PEG_RXN3_G4 PETN3 PERn3 NC#10 D
R2SS1002 *Short_0201 PEG_RXP3_R 7 8
[10] PEG_RXP3_G4 PETP3 PERp3 NC#11
9 10 TP2SS1001
C2SS1001 0.22u/6.3V_2 PEG_TXN3_R 11 GND#7 DAS/DSS#(I)(OD) 12
[10] PEG_TXN3_G4 PERN3 PETn3 3.3Vaux_3
[10] PEG_TXP3_G4 C2SS1002 0.22u/6.3V_2 PEG_TXP3_R 13 14
15 PERP3 PETp3 3.3Vaux_4 16
R2SS1003 *Short_0201 PEG_RXN2_R 17 GND#8 3.3Vaux_5 18
[10] PEG_RXN2_G4 PETN2 PERn2 3.3Vaux_6
R2SS1004 *Short_0201 PEG_RXP2_R 19 20
[10] PEG_RXP2_G4 PETP2 PERp2 NC#12
21 22
C2SS1003 0.22u/6.3V_2 PEG_TXN2_R 23 GND#2 NC#13 24
[10] PEG_TXN2_G4
PCIE 1X4

C2SS1004 0.22u/6.3V_2 PEG_TXP2_R 25 PERN2 PETn2 NC#14 26


[10] PEG_TXP2_G4 PERP2 PETp2 NC#15
27 28
R2SS1005 *Short_0201 PEG_RXN1_R 29 GND#9 NC#16 30
[10] PEG_RXN1_G4 PETN1 PERn1 NC#17
R2SS1006 *Short_0201 PEG_RXP1_R 31 32
[10] PEG_RXP1_G4 PETP1 PERp1 NC#2
33 34
C2SS1005 0.22u/6.3V_2 PEG_TXN1_R 35 GND#10 NC#3 36
[10] PEG_TXN1_G4 PERN1 PETn1 NC#4
[10] PEG_TXP1_G4 C2SS1006 0.22u/6.3V_2 PEG_TXP1_R 37 38 TP2SS1002
39 PERP1 PETp1 DEVSLP 40
R2SS1007 *Short_0201 PEG_RXN0_R 41 GND#11 NC#5 42
[10] PEG_RXN0_G4 SATA B+/PETN0 PERn0 NC#6
R2SS1008 *Short_0201 PEG_RXP0_R 43 44
[10] PEG_RXP0_G4 SATA B-/PETP0 PERp0 NC#7
45 46
C2SS1007 0.22u/6.3V_2 PEG_TXN0_R 47 GND#12 NC#8 48
[10] PEG_TXN0_G4 SATA A-/PERN0 PETn0 NC#9
[10] PEG_TXP0_G4 C2SS1008 0.22u/6.3V_2 PEG_TXP0_R 49 50 NGFF2_RST#
51 SATA A+/PERP0 PETp0
PERST#/NC 52
GND#13 CLKREQ#/NC PCIE_CLKREQ_3# [11]
R2SS1010 *Short_0201 CLK_PCIE_SSD-VGA_2N_R 53 54
C [11] CLK_PCIE_SSD-VGA_2N REFCLKN PEWAKE#/NC C
R2SS1011 *Short_0201 CLK_PCIE_SSD-VGA_2P_R 55 56
[11] CLK_PCIE_SSD-VGA_2P REFCLKP NC#18 TP2SS1004
57 58 TP2SS1005
GND#14 NC#19

67 68 +3V_SSD2
NGFF2_PEDET2 69 NC#1 SUSCLK
TP2SS1003 PEDET(OC-PCIE/GND-SATA)
71 70
73 GND#4 3.3Vaux_7 72
75 GND#5 3.3Vaux_8 74
GND#6 3.3Vaux_9

76
77
78
79
76
77
78
79
NASM0-S6701-TS40

B B
R2SS1009 *Short_0201
DECOUPLING
+3V_DEEP_SUS

5
+3V_SSD2 +3V
1
PLTRST# [12,20,25,53,61,68,96]
NGFF2_RST# 4
C2SS1009 47u/6.3V_8 R2SS1012 *Short_0805 C2SS1010 10u/6.3V_4 2
Reset_M.2SSD2# [4]
C2SS1011 10u/6.3V_4 C2SS1012 0.1u/6.3V_2 R2SS1013

3
*100K_1%_2 U2SS1001 R2SS1014
C2SS1013 0.1u/6.3V_2 *MC74VHC1G08DFT2G *100K_1%_2
C2SS1014 0.1u/6.3V_2

C2SS1015 0.1u/6.3V_2

C2SS1016 0.1u/6.3V_2

A C2SS1017 *47u/6.3V_8 A

C2SS1018 *47u/6.3V_8
Quanta Computer Inc.
C2SS1019 *15p/25V_2

C2SS1020 *15p/25V_2
PROJECT : ZGN
Size Document Number Rev
B NGFF SSD #2 /PCIE A1A

Date: Thursday, May 26, 2022 Sheet 55 of 150


5 4 3 2 1
5 4 3 2 1

56
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 56 of 150


5 4 3 2 1
5 4 3 2 1

57
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 57 of 150


5 4 3 2 1
5 4 3 2 1

58
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 58 of 150


5 4 3 2 1
5 4 3 2 1

59
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 59 of 150


5 4 3 2 1
5 4 3 2 1

60
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 60 of 150


5 4 3 2 1
5 4 3 2 1

E-Key
NGFF_M.2 WiFi & BT (NGF)
61
CN1FW 1001
NASE0-S6701-TSH4 +W L_VDD

NGFF EKEY
1 2
BT R1063 *Short_0201 3 GND#3 3.3Vaux#1 4
[10] USBP10+ USB_D+ 3.3Vaux#2 R1FW R1027
R1064 *Short_0201 5 6 TP1FW R1002 *Short_0201
[10] USBP10- USB_D- LED#1
7 8 PCM_CLK [12]
9 GND#4 PCM_CLK 10 CNV_RF_RESET_L
[11] W R_LANE1_DN
11 SDIO CLK(O) 1.8v PCM_SYNC 12 +W L_VDD
CNVi RX

D [11] W R_LANE1_DP SDIO CMD(IO) PCM_IN PCM_IN [12] D


13 14 MODEM_CLKREQ_L
15 SDIO DAT0(IO) 1.8v PCM_OUT 16
[11] W R_LANE0_DN SDIO DAT1(IO) LED#2
[11] W R_LANE0_DP 17 18
19 SDIO DAT2(IO) GND#13 20
SDIO DAT3(IO) UART Wake UART_W AKE_N [11]

5
21 22 CNV_BRI_RSP_R R1FW R1002 39_1%_2
[11] W R_CLK_DN SDIO Wake(I) 1.8v UART Rx CNV_BRI_RSP [11]
23 1 PLTRST# [12,20,25,53,55,68,96]
[11] W R_CLK_DP SDIO Reset 4
2

32 CNV_RGI_DT [11,14] U1FW R1003


1.8v UART Tx PCH_W LAN_RST# [4,14]

3
33 34 CNV_RGI_RSP_R R1FW R1003 39_1%_2 *NL17SZ08DFT2G
C1FW R1002 0.1u/6.3V_2 PCIE_TXP_W LAN_C 35 GND#5 1.8v UART RTS 36
CNV_RGI_RSP [11]
DISCRETE WIFI

[10] PCIE_TXP4 PETp0 1.8v UART CTS CNV_BRI_DT [11,14]


C1FW R1003 0.1u/6.3V_2 PCIE_TXN_W LAN_C 37 38 R1FW R1028 *Short_0201 M.S. for Dis. module only
[10] PCIE_TXN4 PETn0 Clink RESET CLINK_RESET [9]
39 40 R1FW R1029 *Short_0201 CLINK_DATA [9]
41 GND#6 CLink DATA 42 R1FW R1030 *Short_0201 R1FW R1031 *0_5%_2
[10] PCIE_RXP4 PERp0 CLink CLK CLINK_CLK [9]
[10] PCIE_RXN4 43 44 CNV_PA_BLANKING [11]
45 PERn0 COEX3 46
GND#7 COEX2 CNV_MFUART2_TXD [6]
[11] CLK_PCIE_W LANP 47 48 CNV_MFUART2_RXD [6]
49 REFCLKP0 COEX1 50 R1FW R1004 *0_5%_2
[11] CLK_PCIE_W LANN REFCLKN0 SUSCLK(32KHz) SUSCLK_32K [11] BT_EN [86]
51 52 W LAN_RST#
W LAN_CLKREQ# 53 GND#8 PERST0# 54 BT_EN_R R1FW R1001 *Short_0201
CLKREQ0# W_DISABLE2# BT_OFF_PCH# [12]
W LAN_W AKE_R# 55 56 RF_EN_R R1FW R1006 *Short_0201
PEWake0# W_DISABLE1# RF_EN_PCH [9]
57 58 R1FW R1007 Debug@0_5%_4 2ND_MBDATA
59 GND#9 NFC_I2C_SM_DATA 60 R1FW R1008 Debug@0_5%_4 2ND_MBCLK R1FW R1009 *0_5%_2
C [11] W T_LANE1_DN PETp1 NFC_I2C_SM_CLK RF_EN [86] C
61 62
CNVi TX

[11] W T_LANE1_DP PETn1 NFC_I2C_IRQ 38.4M : not supported and not connected by HrP.
63 64 PULSAR_38P4M_REFCLK
GND#10 GPIO0_NFC_RESET# TP1FW R1001
65 66 R1FW R1010 Debug@0_5%_4 AP_SLP_S0_L [12,20,86]
[11] W T_LANE0_DN PERp1 UIM_SWP/PERST1# 2ND_MBDATA
67 68 R1FW R1011 Debug@0_5%_4 2ND_MBDATA [9,73,86,93]
[11] W T_LANE0_DP PERn1 UIM_POWER_SNK 2ND_MBCLK
69 70 R1FW R1012 Debug@0_5%_4 2ND_MBCLK [9,73,86,93]
71 GND#11 UIM_POWER_SRC 72
[11] W T_CLK_DN Reserved1 3.3Vaux#3
73 74

GND#1
GND#2
[11] W T_CLK_DP Reserved2 3.3Vaux#4 +W L_VDD
75

NC#2
NC#1
GND#12
POWER SWITCH

79
78
76
77
PU/PD +W L_VDD
+3V_S5 R1FW R1015 *Short_0805
+W L_VDD
BT_EN_R R1FW R1017 10K_1%_2 Q1FW R1002 DMP2130L-7
1 3

RF_EN_R R1FW R1019 10K_1%_2 LEVEL SHIFT


R1FW R1016 *Short_0201

2
C1FW R1004 R1FW R1018 C1FW R1005 C1FW R1006 C1FW R1007 C1FW R1008
B PCH_W LAN_RST#R1FW R1032 *100K_1%_2 1u/10V_2 100K_1%_2 10u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 B
+1.8V_DEEP_SUS

R1FW R1033 *100K_1%_2 W LAN_RST#


1.8V 1.8V

5
1 R1FW R1020 10K_1%_2
4 CNV_RF_RESET_L W LANPW R# [86]
[11] CNV_RF_RESET#
2 R1FW R1022 *10K_1%_2
SLP_W LAN_PW R# [12]
M.S. for Dis. module only

3
+W L_VDD R1FW R1021 U1FW R1002
+3V
*75K_1%_2 *NL17SZ08DFT2G WLANPWR# --> RSMRST#
+W L_VDD
R1FW R1023
By Control
S0
10K_1%_2
2

R1FW R1024 *Short_0201 C1FW R1009 C1FW R1010 C1FW R1011 C1FW R1012 C1FW R1001 C1FW R1013 C1FW R1014
W LAN_CLKREQ# 3 1 10u/6.3V_4 10u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 *0.1u/6.3V_2 0.01u/10V_2 0.01u/10V_2
PCIE_CLKREQ_1# [11]
Q1FW R1003 2N7002KTB +1.8V_DEEP_SUS
1.8V 1.8V
5

+W L_VDD +W L_VDD
A Wake 1
MODEM_CLKREQ_L
+W L_VDD A

[11] MODEM_CLKREQ 4
R1FW R1025 2
Quanta Computer Inc.
By Control S5
PROJECT : ZGN
3

10K_1%_2 R1FW R1026 U1FW R1001 C1FW R1015 C1FW R1016


2

*75K_1%_2 *NL17SZ08DFT2G *15p/25V_2 *15p/25V_2


W LAN_W AKE_R# 1 3
W LAN_W AKE# [4] Size Document Number Rev
Q1FW R1001 2N7002KTB Custom NGFF WiFi & BT A1A

Date: Thursday, May 26, 2022 Sheet 61 of 150


5 4 3 2 1
5 4 3 2 1

62
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 62 of 150


5 4 3 2 1
5 4 3 2 1

63
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 63 of 150


5 4 3 2 1
A B C D E

Codec ALC3324 (ADO)


SLEEVE [66]
RING2 [66]
64
MIC2-VREFO-R [66]
MIC2-VREFO-L [66]
Audio Jack
HP-L2 [66]
HP-R2 [66]

ADOGND ADOGND
D2C1 2 1 RB500V-40 R2C1 22K_5%_2 C2C1 0.1u/6.3V_2
[4,14,86] ACZ_SPKR

D2C3 2 1 RB500V-40 C2C2 R2C2

1u/10V_6

1u/10V_6
0.22u/25V_2
[86] PCBEEP_EC

Should be 0603 type


100p/50V_2 10K_1%_2

MIC2-VREFO-R

MIC2-VREFO-L
ALC287-CG(MP Common PN) for ALC3324-CG(Acer AVAP PN)

PCBEEP

SLEEVE
C2C6 1u/10V_6

RING2

HP-R2
HP-L2
C2C3

C2C4

C2C5
Should be 0603 type

Powered by AVDD2 L2C1


Powered by AVDD1 HCB1608KF-121T30_3A
U2C1
ANALOG DIGITAL

36

35

34

33

32

31

30

29

28

27

26

25
ALC3324-CG
+5VA 2 1 R2C4 *Short_0402

MIC2-L/RING2

MIC2-VREFO-L

HPOUT-L

CBP2
MIC2-VREFO-R

HPOUT-R

CBN
PCBEEP

MIC2-CAP

MIC2-R/SLEEVE

CPVPP

CBP
+1.8V

ADOGND C2C7 2.2u/10V_4


ADOGND 37 24 C2C12 C2C10
C2C8 C2C9 AVSS1 CBN2 Should be 0603 type 10u/6.3V_4 0.1u/6.3V_2
R2C5 100K_1%_2 CODEC_VREF 38 23 C2C13 1u/10V_6
0.1u/6.3V_2 10u/6.3V_4 VREF AGND CPVEE ADOGND
Close to CODEC INT_AMIC-VREFO
C2C11 10u/6.3V_4 39 22 Near Codec
ADOGND LDO1-CAP AVSS2 ADOGND
ADOGND 40
DGND 21 C2C14 10u/6.3V_4
AVDD1 LDO2-CAP ADOGND DIGITAL
L2C2 1 2 PBY160808T-600Y-N_3A +5V_PVDD 41 20 AVDD2
+5V PVDD1 AVDD2
42 19 C2C17 10u/6.3V_4 R2C21 *Short_0402 +1.8V
[66] L_R_SPK+ SPK-OUT-L+ LDO3-CAP

I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34
C2C15 C2C16
10u/6.3V_4 0.1u/6.3V_2 43 18 DVDD_IO R2C6 *0_5%_4
[66] L_R_SPK- SPK-OUT-L- DVDD-IO +3V
44 17
[66] R_R_SPK- SPK-OUT-R- SDATA-OUT ACZ_SDOUT_AUDIO [12]
45 16 ACZ_SDIN0_AUDIO_R R2C7 33_1%_2 C2C18 C2C19
[66] R_R_SPK+ SPK-OUT-R+ SDATA-IN ACZ_SDIN0_AUDIO [12]
Powered by DVDD-IO 0.1u/6.3V_2 10u/6.3V_4
Powered by PVDD 46 15
PVDD2 SYNC ACZ_SYNC_AUDIO [12]

GPIO0/DMIC-DATA12
SENSEA 47 14 BIT_CLK_AUDIO_R R2C8 *Short_0201
JD1 BCLK BIT_CLK_AUDIO [12]

GPIO1/DMIC-CLK
C2C20 C2C21 I2C

I2S-MCLK/GPIO3
10u/6.3V_4 MIC_MUTE_LED_C 48 Master 13 TP2C2 C2C22 22p/25V_2
0.1u/6.3V_2 JD2/GPIO4 DC DET/EAPD 1.8V power rail from PCH HDA
C2C23

I2C-DATA

I2S-LRCK
I2S-BCLK
I2S-OUT
I2C-CLK
*0.1u/6.3V_2 49
Thermal Pad

DVDD

I2S-IN
HP_JD# R2C11 200K_1%_2

PDB
[66] HP_JD# Close to CODEC

+AZA_VDD R2C13 100K_1%_2

10

11

12
Place near Audio Codec
Powered by DVDD

1 TP2C10 SPK_MUTE_LED TP2C4 TP2C6 TP2C8 1


+AZA_VDD From EC TP2C3 TP2C5 TP2C7 TP2C9
PD#

+3V R2C18 *Short_0603

DVDD must greater or equal than DVDD_IO


+AZA_VDD
I2S Keyboard LED
+1.8V R2C22 *0_5%_6

DMIC_DAT_IC
C2C26 C2C27

DMIC_CLK_IC
0.1u/6.3V_2 10u/6.3V_4
TP2C1 MIC_MUTE_LED_C +AZA_VDD
Next to CODEC

R2C23
[45] DMIC_DAT R2C19 *Short_0402 R2C25 *0_5%_2 R2C10
[87] MIC_MUTE_LED
R2C20 22_5%_2
DMIC [45] DMIC_CLK *10K_1%_2
*10K_1%_2
SPK_MUTE_LED

3
C2C28 C2C29 2 R2C26 *Short_0201 MIC_MUTE_LED_C MIC_MUTE_LED_C
*33p/25V_2 *33p/25V_2
Q2C2
PJA138K R2C27 *0_5%_2 SPK_MUTE_LED R2C24 R2C16

1
*10K_1%_2 10K_1%_2

Codec PWR 5V(ADO) GROUND MOAT Mute(ADO)


+AZA_VDD +3V
R2C9 *Short_0402

+5V R2C12 *0_5%_4


DIGITAL ANALOG +5VA

2
R2C14 *0_5%_4
2 1 PCH_AZ_CODEC_RST#_PD 3 1
ACZ_RST#_AUDIO [12]
L2C3 1 2 HCB2012KF-220T60_6A R2C15 *0_5%_4
D2C2 *RB500V-40 Q2C1 *PJA138K
R2C17 *0_5%_4 R2C3
10K_1%_2
1

C2C31 C2C32 C2C33 C2C24 *1000p/25V_2


D2C5 C2C30 10u/6.3V_4 0.1u/6.3V_2 10u/6.3V_4
AZ5725-01F.R7G 0.1u/6.3V_2 C2C25 *0.1u/6.3V_2
2

Moat AGND plane GND plane D2C4 RB500V-40

ADOGND PD# 2 1 AMP_MUTE# [86]


ADOGND

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C Azalia ALC295M A1A

Date: Thursday, May 26, 2022 Sheet 64 of 150


A B C D E
5 4 3 2 1

65
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 65 of 150


5 4 3 2 1
5 4 3 2 1

Universal Audio Jack (ADO)


PCB trace width of
HP_JD#
66

1
MIC2-R(SLEEVE)/MIC2-L(RING2) are DC1001
CC1001 *100p/50V_2
ADOGND required at least 40 mil for HP crosstalk AZ5725-01F.R7G
consideration

2
[64] MIC2-VREFO-L RC1002 2.2K_1%_2 DC1002 1 2 AZ5725-01F.R7G and, its length should be as short as possible.
HP-L2_R
[64] RING2 CNC1002

1
3 G/M
40mil for each signal CC1002 *100p/50V_2 HP-L2_R 1 L 7 DC1003
D ADOGND MS D
AZ5725-01F.R7G
RC1003 47_1%_2 5 5
[64] HP-L2

2
6 6
[64] HP_JD# HP-R2_R 2
[64] HP-R2 RC1004 47_1%_2 R
4 M/G ADOGND
CC1003 *100p/50V_2 ADOGND
RC1001 2.2K_1%_2 HP-R2_R
[64] MIC2-VREFO-R 2SJ3080-146111F

1
[64] SLEEVE
DC1004
DC1005 1 2 AZ5725-01F.R7G AZ5725-01F.R7G

2
ADOGND
CC1004 *100p/50V_2
ADOGND
ADOGND

C C

40mil for each signal

3
[64] R_R_SPK- 1
[64] R_R_SPK+ 2

4
CNC1001
CC1005 CC1006 50271-0020N-001
1000p/25V_2 1000p/25V_2

3
[64] L_R_SPK- 1
[64] L_R_SPK+ 2

4
CC1007 CC1008 CNC1004
1000p/25V_2 1000p/25V_2 50271-0020N-001
B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C Audio Codec/HP/SPK A1A

Date: Thursday, May 26, 2022 Sheet 66 of 150


5 4 3 2 1
5 4 3 2 1

67
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 67 of 150


5 4 3 2 1
5 4 3 2 1

E2600-CG (LAN) R1L13 2.49K_1%_2


68
+3V_LAN
Q1L3 DMP2130L-7 +3V_LAN

CKXTAL2

CKXTAL1
VDD33

VDD10
RSET
1 3 R1L2 *Short_0805
+3VPCU
R1L19 *4.7K_1%_2 PLTRST#_LAN
C1L2

2
D D
0.1u/6.3V_2

R1L3
100K_1%_2

33

32

31

30

29

28

27

26

25
AVDD33#2

AVDD10#3

CKXTAL2

CKXTAL1

LED0

LED2
GND

RSET

LED1/GPO
R1L5 *Short_0402 R1L6 10K_1%_2
[86] LANPWR# 1 24 REG_OUT
[69] MDI0+ MDIP0 REGOUT
2 23 VDDREG
C1L9 [69] MDI0- MDIN0 VDDREG +3V
1000p/25V_2 VDD10 3 22 VDD10
AVDD10#1 DVDD10
4 21 PCIE_LAN_WAKE#_R R1L9 1K_1%_2
[69] MDI1+ MDIP1 LANWAKEB
5 20 ISOLATEB R1L8 15K_1%_2
[69] MDI1- MDIN1 ISOLATEB
6 19 PLTRST#_LAN
[69] MDI2+ MDIP2 PERSTB
7 18 PCIE_RXN9_LAN_L C1L39 0.22u/25V_2
[69] MDI2- MDIN2 HSON PCIE_RXN9 [10]
VDD10 8 17 PCIE_RXP9_LAN_L C1L40 0.22u/25V_2
AVDD10#2 HSOP PCIE_RXP9 [10]

REFCLK_N
REFCLK_P
AVDD33#1

CLKREQB
MDIN3
MDIP3
VDD10

HSIN
HSIP
U1L1

10

11

12

13

14

15

16
E2600-CG

PCIE_REQ_LAN#_R
C1L19 CLK_PCIE_LANN_R R1L1 *Short_0201 CLK_PCIE_LANN [11]
C1L49 C1L50 C1L51 C1L52 C1L53
C 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 *0.1u/6.3V_2 *1u/10V_2 CLK_PCIE_LANP_R R1L4 *Short_0201 C
CLK_PCIE_LANP [11]

[69] MDI3+ PCIE_TXN9_LAN_L

VDD33
C1L37 0.22u/25V_2
[69] MDI3- PCIE_TXN9 [10]
PCIE_TXP9_LAN_L C1L38 0.22u/25V_2
PCIE_TXP9 [10]

Backdrive protection (PMC)


+3V_LAN +3V_LAN
power trace 60 mil
power trace spacing 15mil 3.3V
S0
R1L22
*10K_1%_2
2

1 3 PCIE_REQ_LAN#_R +3V_LAN
[11] PCIE_CLKREQ_6# +5VPCU +5VPCU
Q1L1 2N7002KTB C1L41

4.7u/6.3V_6
VDD33 R1L23 *0_5%_2 R1L38
R1L39
*0.01_1%_8
C1L7 C1L8 C1L13 C1L47 100K_1%_2

4
0.1u/6.3V_2 0.1u/6.3V_2 *4.7u/6.3V_4 *4.7u/6.3V_4 +3V_LAN U1L3 Isat=3A
B B

VIN
R1L40 *Short_0201 5 3 G5719LX3.3V L1L4 1 2 1uH_2520_3.7A
PG LX

+3VPCU R1L41 10K_1%_2


G5719CTB1U R1L42 *Short_0201
S5 R1L24 R1L43 *Short_0201 1
EN GND
2
10K_1%_2 C1L42 C1L43 C1L44

VFB
R1L10 *Short_0603
2

VDDREG
10u/6.3V_4 *10u/6.3V_4 0.1u/25V_2
3 1 PCIE_LAN_WAKE#_R R1L44 C1L45
[12] LAN_WAKE#

6
C1L48 C1L14
4.7u/6.3V_4 0.1u/6.3V_2 Q1L2 2N7002KTB *10K_1%_2 *0.47u/25V_4 C1L46 *22p/25V_2

3
R1L27 *0_5%_2
LANPWR# 2 R1L45
R1 82K_1%_2
QP1013
2N7002K R1L46

1
R2 18K_1%_2

SWR (E2600-CG SWR mode) Vo=(0.6(R1+R2)/R2)


=3.3V

VDD10

C1L1 8.2p/50V_2 CKXTAL1 REG_OUT L1L2 1 2 4.7uH_2520_1.9A R1L34 *Short_0603

C1L32 C1L33
2
1

4.7u/6.3V_4 0.1u/6.3V_2
A Y1L1 A
25MHZ/30ppm

PLTRST#
4
3

C1L15 8.2p/50V_2 R1L12 680_5%_2 CKXTAL2


D3 Hot - ALDPS only
Quanta Computer Inc.
[12,20,25,53,55,61,96] PLTRST#
R1L37 *Short_0201 PLTRST#_LAN PROJECT : ZGN
Size Document Number Rev
D2C6 2 1 *RB500V-40
C LAN - E2600 A1A

Date: Thursday, May 26, 2022 Sheet 68 of 150


5 4 3 2 1
5 4 3 2 1

Tramsformer
69
UL1001A UL1001B
TERM7 1 24 MCT1 RL1001 75_1%_8 TERM9 TERM7 7 18 MCT3 RL1003 75_1%_8 TERM9
D 2 23 MDI1-_1 8 17 MDI3-_1 D
[68] MDI1- [68] MDI3-

3 22 MDI1+_1 9 16 MDI3+_1
[68] MDI1+ [68] MDI3+
4 21 MCT2 RL1002 75_1%_8 TERM9 10 15 MCT4 RL1004 75_1%_8 TERM9
5 20 MDI0-_1 11 14 MDI2-_1
[68] MDI0- [68] MDI2-
CL1002
10p/3KV_1808

C804 CL1001 6 19 MDI0+_1 12 13 MDI2+_1


[68] MDI0+ [68] MDI2+
0.1u/50V_4 0.01u/50V_4
Transformer Transformer

teknisi-indonesia C805
0.1u/50V_4

C C

RJ45 Connector

(EMC)
LGND
MDI0+_1 MDI1+_1
MDI0-_1 MDI1-_1
9

2
B CL1003 *0.1u/25V_2 B
DL1001 DL1002
CL1004 *0.1u/25V_2 *MESD05N92ULA *MESD05N92ULA
MDI0+_1 1

3
MDI0-_1 2 CL1005 *0.01u/50V_4
MDI1+_1 3
MDI2+_1 4 CL1006 *0.01u/50V_4 LANGND LANGND
MDI2-_1 5
30 mil MDI1-_1 6 RL1005 *Short_0603 MDI2+_1 MDI3+_1
MDI3+_1 7 MDI2-_1 MDI3-_1
MDI3-_1 8 RL1006 *Short_0603

2
CNL1001 DL1004 DL1003
2RJ3028-028411F *MESD05N92ULA *MESD05N92ULA
LANGND
10

3
LGND
LANGND LANGND

A A
Distance between DGND & LGND should have
at least 60 mils Quanta Computer Inc.
PROJECT : ZGN
Size Document Number Rev
B LAN Power A1A

Date: Thursday, May 26, 2022 Sheet 69 of 150


5 4 3 2 1
5 4 3 2 1

70
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 70 of 150


5 4 3 2 1
5 4 3 2 1

71
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 71 of 150


5 4 3 2 1
5 4 3 2 1

72
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 72 of 150


5 4 3 2 1
5 4 3 2 1

TO EC
CYPD6127-48LQXI (CCG6SF)
LDO Q1TP1A
+3VPCU

PCU
73

5
2N7002KDW

3 4 EC_I2C_SDA_D EC_I2C_SDA_D
[9,61,86,93] 2ND_MBDATA TP230 EC_I2C_SCL_D
C1TP1 0.1u/6.3V_2 +3VPCU_PD TP231 EC_I2C_INT_D
R1TP4 *0_5%_4
TP232
R1TP2 *Short_0603 +3V_VSYS U1TP1
+3VPCU
C1TP4 C1TP5 C1TP6

2
CYPD6127-48LQXI Q1TP1B

10

11
0.1u/6.3V_2 0.1u/6.3V_2 1u/10V_2

9
2N7002KDW
6 1 EC_I2C_SCL_D

VSYS

VDDIO
VCCD

VDDD
[9,61,86,93] 2ND_MBCLK
R1TP8 *0_5%_4
D C1TP2 C1TP3 D
0.1u/6.3V_2
To VCONN
1u/10V_2
+3VPCU

R1TP36 *Short_0603 +5VPCU_V5V 45

2
+5VPCU V5V Q1TP2 2N7002KTB
3 1 EC_I2C_INT_D
For Dead Battery 48
[86] EC_CCG_I2C_INT#
1 VBUS_C_1 R1TP6 *0_5%_4
2 VBUS_C_2
TYPEC1_USB0 VBUS_C_3
3
>120mils VBUS_C_4
To VBUS
+5VPCU
To VBUS >120mils
R1TP5 0.005_1%_6 VBUS_P 4
5 VBUS_P_1
C1TP7 C1TP8 C1TP9 6
7
VBUS_P_2
VBUS_P_3
From PCH TP227
SMB1_DAT_D
SMB1_CLK_D
VBUS_P_4 TP228 PD_I2C_INT#_D
47u/6.3V_6 22u/6.3V_6 *22u/6.3V_6
+3V_DEEP_SUS TP229
CSP_N 38
CSP_P 39 CSN Max 24V ~ 30V
CSP
VBUS_C_CTRL
47
PA_VBUS_C_CTRL [106]
S5 Q1TP3A PCU

5
2N7002KDW

R1TP32 2.2K_1%_2 4 3 SMB1_DAT_D


+3VPCU
R1TP31
R1TP10
2.2K_1%_2
2.2K_1%_2
CYPD6127-48LQXI [9] PD_I2C_SDA

R1TP11 *0_5%_4

2
EC_I2C_INT_D 26 Q1TP3B
I2C_INT_EC/P1.2 2N7002KDW
EC_I2C_SDA_D 33 1 6 SMB1_CLK_D
From EC EC_I2C_SCL_D 32
I2C_SDA_SCB0/P4.1
R1TP33 2.2K_1%_2
[9] PD_I2C_SCL
R1TP12 *0_5%_4
I2C_SCL_SCB0/P4.0 +3VPCU
R1TP34 2.2K_1%_2
R1TP35 2.2K_1%_2
+3V_DEEP_SUS

2
C 46 13 SMB1_CLK_D C
[76] TBT1_CC1 CC1 I2C_SCL_SCB1/P0.3 PD_I2C_INT#_D
Q1TP4 1 3 2N7002KTB
SMB1_DAT_D [12] PD_I2C_INT#
C1TP10 16
>15mils 390p/50V_4
44
I2C_SDA_SCB1/P0.2
17 PD_I2C_INT#_D
From PCH R1TP15 *0_5%_4
[76] TBT1_CC2 CC2 I2C_INT_TBT/P0.4
C1TP11 R1TP13 2.2K_1%_2 +3VPCU_PD
390p/50V_4 R1TP14 2.2K_1%_2
28 RT_I2C_SDA_D

42
I2C_SDA_SCB2/P2.1
29 RT_I2C_SCL_D
To BBR TO BBR
[76] TBT_SBU1_P1_CON SBU1 I2C_SCL_SCB2/P2.2
43
[76] TBT_SBU2_P1_CON SBU2 VCC3V3_FLASH

20 36 ADP_DET_CCG6FS RT_I2C_SDA_D
To Conn. [76] USBP2+_BOT
[76] USBP2-_BOT
21 DP_BOT
DM_BOT
I2C_SDA_SCB3/P3.1 By B.B Q1TP5A PCU TP224
TP225
RT_I2C_SCL_D

5
18 37 ADP_IN_EN_CCG6FS 2N7002KDW RT_I2C_INT#_D
[76] USBP2+_TOP DP_TOP I2C_SCL_SCB3/P3.2 TP226
19
[76] USBP2-_TOP DM_TOP RT_I2C_SDA_D
4 3
[74] RT_I2C_SDA
R1TP20 *0_5%_4
R1TP39 *10K_1%_2 CCG6_H_PROCHOT#_R 24
+3VPCU_PD MOD_ID1 UART_TX/P1.4
+3V_DEEP_SUS R1TP40 *10K_1%_2 25
UART_RX/P1.3

2
Q1TP5B
2N7002KDW
23 R1TP18 *10K_1%_2 1 6 RT_I2C_SCL_D
[10] USBP2+ DP_SYS +3VPCU [74] RT_I2C_SCL
22
From Host [10] USBP2- DM_SYS
HPD/P2.0
27 TBTA_HPD_C R1TP19 *Short_0201
TBTA_HPD [2] Should be Virtual wire R1TP23 *0_5%_4

R1TP16 2.2K_1%_2 +3VPCU_PD VCC3V3_FLASH


41 12 RT_I2C_INT#_D From BBR INT
From BBR [74] TBT_SBU1_P1_CON_S
40 SBU1_SYS P3.3 Q1TP6

2
[74] TBT_SBU2_P1_CON_S SBU2_SYS RT_RESET_P1_C
30 R1TP21 *Short_0201 RT_RESET_P1 [74] 2N7002KTB
P2.3 1 3 RT_I2C_INT#_D

P2.4
31 RT_PW R_EN_P1_C R1TP22 *Short_0201 RT_PW R_EN_P1 [74] BBR MISC. [74] RT_I2C_INT
R1TP25 *0_5%_4
35 CCG6SF_OC_FAULT_SoC_PD
P3.0

+3VPCU_PD CCG5_SW D_IO

B R1TP24 *Short_0201 14 CCG6SF_OC_FAULT_SoC_PD B


R1TP26
[10,74] TBT_FORCE_PW R
CCG5_SW D_CLK 15
SWD_IO/P1.1 OCP TP223

4.7K_1%_2
SWD_CLK/P1.0

CCG5_XRES

+1.8V_DEEP_SUS
C1TP12 1.8V 3.3V
0.1u/6.3V_2 34
XRES +3VPCU_PD Q1TP9

2
EPAD

*2N7002KTB
1 3 CCG6SF_OC_FAULT_SoC_PD
[12] CCG6SF_OC_FAULT_SoC
R18 R1TP38 *0_5%_4
49
9

R1065 R1TP1
+3VPCU_PD *4.7K_1%_4 *4.7K_1%_2
1
2 CCG5_SW D_CLK CCG6_H_PROCHOT#_R
3
4 CCG5_XRES
PROCHOT TP235

5 CCG5_SW D_CLK
6
7 CCG5_SW D_IO
To configure CCG6SF I2C address
R1066 R1TP3
8 Don't mount R18 and R19 for the I2C *4.7K_1%_4 *4.7K_1%_2 D1TP1 2 1 *RB500V-40 CCG6_H_PROCHOT#_R
TBT_FORCE_PW R TBTA_HPD_C address 0x08. This is the default one. [4,13,86,112,141] H_PROCHOT#
10

TP221 TP222
Mount R19 for the I2C address 0x40.
CN1TP1 RT_RESET_P1_C PA_VBUS_C_CTRL D1TP2 2 1 *RB500V-40
Mount R18 for the I2C address 0x42.
*Debug@196241-08021-3
TP237 TP236
R19 [13] CCG6_PCH_PROCHOT#

D1TP3 2 1 *RB500V-40
[32,112] GPU_THROTTING#

+3VPCU_PD
Adapter TP233
ADP_DET_CCG6FS
+3VPCU ADP_IN_EN_CCG6FS
TP234
Platform ID CCG6SF Single Port
MOD_ID1 MOD_ID2 Description (Dual port) R7 R8 from Power to CCG5 +3VPCU

2
A
ADP_DET
Q1TP7
ADP_DET_CCG6FS
to Power A
L8 NA Reserved L8 = VDDD 0 100K 1 3 R1TP30 *Short_0402
R7 R1TP7
ADP Insert ADP_DET [106] ADP_DET
from CCG5 ADP_EN [106]

2
100K_1%_2 L7 NA Reserved L7 = 7* VDDD/8 56K 392K 2N7002KTB
ADP_IN_EN_CCG6FS 1 3 R1TP29 *0_5%_4
Y Low ADP_IN_EN_EC [86]
L6 NA Reserved L6 = 6* VDDD/8 110K 330K
MOD_ID1 R1TP28 *0_5%_4 Q1TP8 2N7002KTB
Notebooks L5 NA Reserved L5 = 5* VDDD/8 76.8K 127K N Hi
ADP_DET_EC [86] to EC
L4 NA TBT4 with B.B*1 L4 = 4* VDDD/8 100K(CS41001FE08) 100K(CS41001FE08) to EC
R8 R1TP9
100K_1%_2
L3 NA Reserved L3 = 3* VDDD/8 127K 76.8K ADP_EN ADP Switch Quanta Computer Inc.
L2 NA Reserved L2 = 2* VDDD/8 330K 110K
Hi ON PROJECT : ZGN
L1 NA Reserved L1 = VDDD/8 392K 56K
Size Document Number Rev
L0 NA Reserved L0 = 0V 100K 0 Low OFF
Please make sure to choose these resistors (R7, R8, Custom 073 -- Cypress CCG6SF A1A

R9 and R10) based on the above guidelines Date: Thursday, May 26, 2022 Sheet 73 of 150
5 4 3 2 1
5 4 3 2 1

[2] TCP0_TX_P0 C1TB1


C1TB2
0.22u/25V_2
0.22u/25V_2
L<9"
TCP0_TX_P0_C
TCP0_TX_N0_C
J1
J2
U1TB1D

ASSRXp1 TBT PORTS J12


L<1.5"
Polarity Reversal is allowed on CIO domains (Port B)
Need to be configured in NVM.

TBTA_SSRX1_P R1TB1 2.2_5%_2 TBTA_SSRX1_P_C C1TB5 0.33u/25V_2


TBTA_SSRX1_P_C

TBTA_SSRX1_N_C
D1TB1

D1TB2
1

1
2

2
ESD5311Z-2/TR

ESD5311Z-2/TR
74

Port B - TypeC Side


[2] TCP0_TX_N0 ASSRXn1 BSSRXp1 TBTA_RX1_P [76]
J11 TBTA_SSRX1_N R1TB2 2.2_5%_2 TBTA_SSRX1_N_C C1TB6 0.33u/25V_2 TBTA_SSTX1_P_C D1TB3 1 2 ESD5311Z-2/TR

Port A - Host Side


TCP0_TXRX_P0_C BSSRXn1 TBTA_RX1_N [76]
[2] TCP0_TXRX_P0 C1TB3 0.22u/25V_2 G1
C1TB4 0.22u/25V_2 TCP0_TXRX_N0_C G2 ASSTXp1 G12 TBTA_SSTX1_P R1TB3 2.2_5%_2 TBTA_SSTX1_P_C C1TB7 0.22u/25V_2 TBTA_SSTX1_N_C D1TB4 1 2 ESD5311Z-2/TR
[2] TCP0_TXRX_N0 ASSTXn1 BSSTXp1 TBTA_SSTX1_N TBTA_SSTX1_N_C TBTA_TX1_P [76]
G11 R1TB4 2.2_5%_2 C1TB8 0.22u/25V_2
TCP0_TX_P1_C BSSTXn1 TBTA_TX1_N [76] TBTA_SSRX2_P_C
[2] TCP0_TX_P1 C1TB9 0.22u/25V_2 C1 D1TB5 1 2 ESD5311Z-2/TR
C1TB10 0.22u/25V_2 TCP0_TX_N1_C C2 ASSRXp2 C12 TBTA_SSRX2_P R1TB5 2.2_5%_2 TBTA_SSRX2_P_C C1TB11 0.33u/25V_2
[2] TCP0_TX_N1 ASSRXn2 BSSRXp2 TBTA_RX2_P [76]
C11 TBTA_SSRX2_N R1TB6 2.2_5%_2 TBTA_SSRX2_N_C C1TB12 0.33u/25V_2 TBTA_SSRX2_N_C D1TB6 1 2 ESD5311Z-2/TR
TCP0_TXRX_P1_C BSSRXn2 TBTA_RX2_N [76]
C1TB13 0.22u/25V_2 E1
[2] TCP0_TXRX_P1 TCP0_TXRX_N1_C ASSTXp2 TBTA_SSTX2_P TBTA_SSTX2_P_C TBTA_SSTX2_P_C
C1TB14 0.22u/25V_2 E2 E12 R1TB7 2.2_5%_2 C1TB15 0.22u/25V_2 D1TB7 1 2 ESD5311Z-2/TR
[2] TCP0_TXRX_N1 ASSTXn2 BSSTXp2 TBTA_SSTX2_N TBTA_SSTX2_N_C TBTA_TX2_P [76]
E11 R1TB8 2.2_5%_2 C1TB16 0.22u/25V_2 TBTA_TX2_N [76]
R1TB9 *Short_0201 TBT_LSX0_TXD_C M7 BSSTXn2 TBTA_SSTX2_N_C D1TB8 1 2 ESD5311Z-2/TR
[2] TBT_LSX0_TXD TBT_LSX0_RXD_C PA_LSTX_SBU1
[2,14] TBT_LSX0_RXD R1TB10 *Short_0201 L7 M10 TBT_SBU1_P1_CON_S [73]
D PA_LSRX_SBU2 PB_SBU1 L10 D
TCP0_AUX_DP_R PB_SBU2 TBT_SBU2_P1_CON_S [73]
[2] TCP0_AUX_DP R1TB11 *Short_0201 L8
R1TB12 *Short_0201 TCP0_AUX_DN_R M8 PA_AUX_P
[2] TCP0_AUX_DN PA_AUX_N

R1TB13 R1TB14
JHL8040R QURW
4/4
R1TB59 R1TB60
Setup VCC3V3_FLASH

*1M_1%_2 *1M_1%_2
*1M_1%_2 *1M_1%_2 RT_I2C_SCL R1TB15 2.2K_1%_2

RT_I2C_SDA R1TB17 2.2K_1%_2

U1TB1A RT_I2C_INT R1TB18 2.2K_1%_2

TCP0_FLASH_DI C6 C9 RT_I2C_SCL SMB_SML0_CLK_C R1TB16 *2.2K_1%_2

From PD
TCP0_FLASH_DO EE_DI I2C_SCL RT_I2C_SDA RT_I2C_SCL [73]
B4 E7

FLASH
TCP0_FLASH_CS# EE_DO I2C_SDA RT_I2C_INT RT_I2C_SDA [73] SMB_SML0_DAT_C
B6 A10 R1TB19 *2.2K_1%_2
TCP0_FLASH_CLK EE_CS# I2C_INT TBT_FORCE_PWR RT_I2C_INT [73]
C7 B10
EE_CLK FORCE_PWR TCP0_FLASH_BUSY# TBT_FORCE_PWR [10,73]
A9

POC GPIO
FLASH_BUSY# B9 TCP0_GPIO_5 T1TB1

DEBUG
POC_GPIO_5

MISC &
A8 TCP0_GPIO_6
TCP0_JTAG_TDI A3 POC_GPIO_6 B8 GPIO_7 R1TB61 *0_5%_2
T1TB2 TCP0_JTAG_TMS C3 TDI PERST# A7 SMB_SML0_CLK_C R1TB62 *0_5%_2
TCP_RETIMER_PERST# [12] HW Pull-Up/Pull-Down of BBR#1
T1TB3 TCP0_JTAG_TCK B5 TMS SMBUS_SCL B7 SMB_SML0_DAT_C R1TB63 *0_5%_2
SMB_SML0_CLK [9] From PCH

JTAG
T1TB4 TCP0_JTAG_TDO TCK SMBUS_SDA TCP0_FLASH_SHARE_EN SMB_SML0_DAT [9] TCP0_TEST_PWRGD
C5 A4 R1TB21 100_1%_2
T1TB5 TDO FLASH_SHARE_EN A5 TCP0_FLASH_MSTR_SLV TCP0_GPIO_5 R1TB22 10K_1%_2
FLASH_MASTER_SLAVE A6 TCP0_GPIO_12
SMBUs for vPro only
POC_GPIO_12 L3
TCP0_THERMDA M11 NC_L3
T1TB6 THERMDA
M12 Indication to S0 state for Re-timer
B2 TEST_EDM +3V
FUSE_VQPS_64 L11 TCP0_RESET# R1TB23 *Short_0201
RESET# RT_RESET_P1 [73]
A11 R1TB24 10K_1%_2
A12 MONDC L9 XTAL_TCP0_25MHZ_IN TCP0_GPIO_6 R1TB25 *10K_1%_2

DEBUG

Main
L12 NC_A12 XTAL_25_IN M9 XTAL_TCP0_25MHZ_OUT
MONDC_SVR XTAL_25_OUT
TCP0_TEST_PWRGD B3 L5 TCP0_AN_RSENSE +/- 0.5%
B11 TEST_PWR_GOOD RSENSE L4 TCP0_AN_RBIAS R1TB26 4.75K_0.5%_2 VCC3V3_FLASH
C C
TEST_EN RBIAS
Place as close as TCP0_FLASH_BUSY#
A1 R1TB27 10K_1%_2
A2 ATEST_P possible to pins
ATEST_N 1/4 TCP0_FLASH_MSTR_SLV R1TB28 *10K_1%_2

JHL8040R QURW +VCC3V3_SX_TCP0 GPIO_7 R1TB29 *10K_1%_2

C1TB17 2.2u/10V_4 R1TB58 10K_1%_2 +VCC3V3_SX_TCP0

+VCC3P3_LC_TCP0 U1TB1B C1TB18 C1TB19 C1TB20


2.2u/10V_4 47u/6.3V_6 2.2u/10V_4
C1TB21 2.2u/10V_4 +VCC3P3_ANA_TCP0 L2 E6 +VCC3V3_SX_TCP0

+VCC0V9_SVR_TCP0 +VCC3P3_LC_TCP0 E5
VCC3P3_ANA

VCC3P3_LC VCC3P3_SVR#2
VCC3P3_SX
M4
M5
FLASH SHARE (Disable) +VCC3V3_SX_TCP0

F6 VCC3P3_SVR#1
VCC0P9_SVR_ANA#2 80mA
PIN.G9 PIN.E9 PIN.G3 PIN.E3 PIN.G6 PIN.F6 G6 J7 +VCC3V3A_SX_TCP0 R1TB30 *Short_0402 R1TB31 10K_1%_2 TBT_FORCE_PWR R1TB32 *10K_1%_2
+VCC0V9_SVR_TCP0 VCC0P9_SVR_ANA#1 VCC3P3A
Power

E3 L1 R1TB33 10K_1%_2 TCP0_FLASH_SHARE_EN R1TB34 *10K_1%_2


C1TB22 C1TB23 C1TB24 C1TB25 C1TB26 C1TB27 G3 VCC0P9_SVR#2 SVR_IND#2 M1
VCC0P9_SVR#1 SVR_IND#1 C1TB28 C1TB29 C1TB30 R1TB35 *10K_1%_2 TCP0_FLASH_MSTR_SLV R1TB36 *10K_1%_2
47u/6.3V_6 2.2u/10V_4 2.2u/10V_4 2.2u/10V_4 2.2u/10V_4 2.2u/10V_4 E9 M2 2.2u/10V_4 10u/6.3V_4 18p/25V_2
G9 VCC0P9_SVR_PB_ANA#1 SVR_VSS#1 M3 R1TB37 *10K_1%_2 TCP0_GPIO_12 R1TB38 *10K_1%_2
VCC0P9_SVR_PB_ANA#2 SVR_VSS#2 850mA Output
+VCC0P9_LC_TCP0 J3 +VCC0V9_SVR_TCP0 R1TB39 100K_1%_2 TCP0_RESET# R1TB40 *10K_1%_2
VCC0P9_LC
+VCC0P9_LVR_TCP0 L6 J5 +VCC0V9_SVR_TCP0_PHASE L1TB1 1 2 0.68uH_2520_3.3A R1TB41 *10K_1%_2
VCC0P9_LVR NC_J5 +3V
M6 J6
VCC0P9_LVR_SENSE NC_J6
2/4 C1TB34 C1TB35
C1TB31 C1TB32 C1TB33 JHL8040R QURW R1TB42 47u/6.3V_6 18p/25V_2
2.2u/10V_4 10u/6.3V_4 2.2u/10V_4 *0_5%_2

Close to L13 JTAG


B B
U1TB1C +VCC3V3_SX_TCP0_DBRonly R1TB43 *0_5%_4 +VCC3V3_SX_TCP0 +VCC3P3_LC_TCP0
B1 F12
B12 VSS_ANA#1 VSS_ANA#10 G7
D1 VSS_ANA#2 VSS_ANA#20 H1 TCP0_JTAG_TDI R1TB44 10K_1%_2
D2 VSS_ANA#3 VSS_ANA#11 H2 TCP0_JTAG_TMS R1TB45 10K_1%_2
D11 VSS_ANA#4 VSS_ANA#12 H11 TCP0_JTAG_TCK R1TB46 10K_1%_2
D12
F1
VSS_ANA#5
VSS_ANA#6 GND VSS_ANA#17
VSS_ANA#16
H12
J9
TCP0_JTAG_TDO R1TB47 10K_1%_2

F2 VSS_ANA#21 VSS_ANA#22 K1 +VCC3V3_SX_TCP0


F7 VSS_ANA#7 VSS_ANA#18 K2
F9 VSS_ANA#19 VSS_ANA#13 K11
F11 VSS_ANA#8 VSS_ANA#15 K12 TCP0_JTAG_TCK R1TB48 *10K_1%_2
VSS#1
VSS#2
VSS#3

VSS_ANA#9 VSS_ANA#14
3/4
TCP0_RESET#
JHL8040R QURW RT_PWR_EN_P1 T1TB7
F3
F5
G5

T1TB8

VCC3V3_FLASH VCC3V3_FLASH

BBR power switch U1TB4


+V3.3DX_RT_TCP0
ROM TCP0_FLASH_CS# R1TB49 2.2K_1%_2
Crystal
TCP0_FLASH_DO R1TB50 2.2K_1%_2
A2 A1 +V3.3DX_RT_TCP0 TCP0_FLASH_WP# R1TB51 3.32K_1%_2 C1TB36 4.7p/25V_2
VIN VOUT TCP0_FLASH_HOLD# R1TB53 3.32K_1%_2
RT_PWR_EN_P1 B2 B1
ON GND

1
2
XTAL_TCP0_25MHZ_IN Y1TB1
VCC3V3_FLASH
*AP22908CNA4-7
A 25MHZ/30ppm A
XTAL_TCP0_25MHZ_OUT
VCC3V3_FLASH +V3.3DX_RT_TCP0 +VCC3V3_SX_TCP0 R1TB52 *0_5%_8 +3VPCU

3
4
U1TB2 370mA
R1TB55 *Short_0805 +3V_S5 C1TB37 4.7p/25V_2
A2 A1 +V3.3DX_RT_TCP0 1 2 U1TB3 VCC3V3_FLASH
VIN#1 VOUT#1 L1TB2 HCB1608KF-121T30_3A TCP0_FLASH_DI 5 8
B2 B1 TCP0_FLASH_DO 2 DI(IO0) VCC 3 TCP0_FLASH_WP#
VIN#2 VOUT#2 DO(IO1) WP(IO2)
R1TB57 C1TB38 C1TB39 C1TB40
TCP0_FLASH_CS#
TCP0_FLASH_CLK
1
6 CS HOLD(IO3)
7
4
TCP0_FLASH_HOLD#
Quanta Computer Inc.
GND

10K_1%_2 47u/6.3V_6 C2 2.2u/10V_4 2.2u/10V_4 CLK GND C1TB41 C1TB42


ON W25Q80DVSNIG 2.2u/10V_4 0.1u/6.3V_2 PROJECT : ZGN
C1

[73] RT_PWR_EN_P1 NCP337FCT2G Size Document Number Rev


C Burnside Bridge - Port1 A1A
Without Boss /WSON8 Socket:DG008000012
Date: Thursday, May 26, 2022 Sheet 74 of 150
5 4 3 2 1
5 4 3 2 1

75
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 75 of 150


5 4 3 2 1
5 4 3 2 1

Power Capacitance 76
TYPEC1_USB0
200mil
D D
C1TC1 C1TC2 C1TC3 C1TC4 C1TC5 C1TA10
10u/25V_8 0.1u/25V_2 0.1u/25V_2 0.1u/25V_2 0.1u/25V_2 *15p/25V_2

200mil
USB Type-C CN1TC1
5A 20V
TYPEC1_USB0

TBTA_TX1_P A2 A4 D1TC1 1 2 MESMAF20A


[74] TBTA_TX1_P TBTA_TX1_N SSTXp1 VBUS_1
A3 B4
[74]
[74]
[74]
TBTA_TX1_N
TBTA_RX1_P
TBTA_RX1_N
TBTA_RX1_P
TBTA_RX1_N
B11
B10
SSTXn1
SSRXp1
SSRXn1
VBUS_3
VBUS_2
VBUS_4
A9
B9 ESD
TBTA_TX2_P B2 A1
[74] TBTA_TX2_P TBTA_TX2_N SSTXp2 GND_1
B3 A12
[74] TBTA_TX2_N TBTA_RX2_P SSTXn2 GND_2
[74] TBTA_RX2_P A11 B1
TBTA_RX2_N SSRXp2 GND_3
[74] TBTA_RX2_N A10 B12
C SSRXn2 GND_4 USBP2+_TOP 2
C
D79
USBP2+_TOP A6 1 3 MESD05N92ULA
[73] USBP2+_TOP USBP2-_TOP Dp1 GND_5 USBP2-_TOP 1
A7 2
[73] USBP2-_TOP USBP2+_BOT Dn1 GND_6
B6 3
[73] USBP2+_BOT USBP2-_BOT Dp2 GND_7
B7 4
[73] USBP2-_BOT Dn2 GND_8 USBP2-_BOT 2
5 D80
TBT1_CC1 A5 GND_9 6 3 MESD05N92ULA
[73] TBT1_CC1 CC1 GND_10
[73] TBT1_CC2 TBT1_CC2 B5 USBP2+_BOT 1
CC2
TBT_SBU1_P1_CON A8
[73] TBT_SBU1_P1_CON SBU1
[73] TBT_SBU2_P1_CON TBT_SBU2_P1_CON B8 TBT_SBU1_P1_CON D81 2
SBU2
3 MESD05N92ULA
TBT_SBU2_P1_CON 1

TBT1_CC1 D82 2
R1TC1 R1TC2 3 MESD05N92ULA
*2M_1%_2 *2M_1%_2 40-42356-A5101RHF-QD TBT1_CC2 1

B B

R1TC3 221K_1%_2 TBTA_RX1_P


R1TC4 221K_1%_2 TBTA_RX1_N
R1TC5 221K_1%_2 TBTA_RX2_P
R1TC6 221K_1%_2 TBTA_RX2_N

R1TC7 221K_1%_2 TBTA_TX1_P


R1TC8 221K_1%_2 TBTA_TX1_N
R1TC9 221K_1%_2 TBTA_TX2_P
R1TC10 221K_1%_2 TBTA_TX2_N

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
B USB Type C #1 A1A

Date: Monday, March 21, 2022 Sheet 76 of 150


5 4 3 2 1
5 4 3 2 1

77
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 77 of 150


5 4 3 2 1
5 4 3 2 1

USB Type A #1 - Re-driver


+3V_U3_12

D +3V_U3_12 +1.2V_U3_12 +3V_U3_12 D


R12TAR1 10K_1%_2 RESETB_12 C12TAR1 2.2u/10V_4

R12TAR2 4.7K_1%_2 EN_12


U12TAR1

10
28
19
34

22
24
23

18
5

1
Chip Enable. Active is high. Default is internal pull-down by 150K
Intel:

VDDD
VDDDCI

VDDAX
VDDBX
VDDAA
VDDBA
VDDM#1
VDDM#3
VDDM#2

VDD33#1
VDD33#2
USB 3.1 transmit pairs require a 75–265 nF capacitor
R12TAR3 *4.7K_1%_2 ADDR0_12
in the path between PCH and ESD/CMC protection. ADDR1_12
R12TAR4 *4.7K_1%_2

C12TAR2 0.22u/25V_2 USB32_TX1+_R12 2 27 I2C Slave address setting.


[10] USB32_TX1+ A_INP A_OUTP USB32_TX1+_MB1_LL_LL[79]
C12TAR3 0.22u/25V_2 USB32_TX1-_R12 3 26 ADDR0/1 is pulled down by 150K in default
[10] USB32_TX1- A_INN A_OUTN USB32_TX1-_MB1_LL_LL[79] [ADDR1, ADDR0]:
C12TAR4 0.22u/25V_2 USB32_RX1+_R12 8 21 00: 0x50-0x53
[10] USB32_RX1+ B_OUTP B_INP USB32_RX1+_MB1_LL_LL [79] 01: 0x54-0x57
C12TAR5 0.22u/25V_2 USB32_RX1-_R12 9 20
[10] USB32_RX1- B_OUTN B_INN USB32_RX1-_MB1_LL_LL [79] 10: 0xE0-0xE3
11: 0xE4-0xE7
PS8811QFN36GTR2-A3
7
TP12TAR1 6 DCI_DATA
TP12TAR2 DCI_CLK REXT_12 DCI_EN_12
29 R12TAR5 4.99K_1%_2 R12TAR6 *4.7K_1%_2 R12TAR7 *4.7K_1%_2
REXT
EN_12 11 16 RESETB_12
EN RESETB DCI_EN: Auto DCI enable or disable
C C
17 L: Disable
MODE_12 30 TEST 13 M: Disable (default)

DCI_EN

ADDR0
ADDR1
MODE GND#1 H: Enable

CSDA
31

A_EQ
B_EQ

CSCL
B_DE
GND#2 37 MODE_12 R12TAR8 *4.7K_1%_2
EPAD

12
15

25
14

32
33

36
35
Chip Operation Mode Selection. Default is Middle Level
L: 5G redriver Mode, 10G retimer mode, adaptive EQ.
M: 5G redriver Mode, 10G retimer mode, fixed EQ. (Default)

DCI_EN_12

ADDR0_12
ADDR1_12
+3V_U3_12 +3V_U3_12
VDD_DCI = 1.8V/2.5V/3.3V to I2C Master
PS8811_MBCLK_1
+3V_SUS +3V_U3_12 PS8811_MBDATA_1 S5 SUS
R12TAR9
L12TAR11 2 HCB1608KF-301T20_2A 4.7K_1%_2

5
B B

C12TAR6 3 4 PS8811_MBCLK_1
[80,86,87,89,91,93] 3ND_MBCLK
1u/10V_2
Q12TAR1A
PJX138K
+3V_U3_12 +3V_U3_12

+1.2VSUS +1.2V_U3_12

L12TAR21 2 HCB1608KF-301T20_2A R12TAR10


4.7K_1%_2

2
C12TAR7 C12TAR8 C12TAR9 C12TAR10 C12TAR11 C12TAR12 C12TAR13
4.7u/6.3V_4 0.1u/6.3V_2 0.01u/10V_2 0.1u/6.3V_2 0.01u/10V_2 0.1u/6.3V_2 0.01u/10V_2 6 1 PS8811_MBDATA_1
[80,86,87,89,91,93] 3ND_MBDATA
Q12TAR1B
PJX138K
Decoupling caps need be placed as close to power pins as possible.
1.2 V power ripple requirement: < 30 mV
A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
B TypeA1-PS8811QFN36GTR2 A1A

Date: Monday, March 21, 2022 Sheet 78 of 150


5 4 3 2 1
5 4 3 2 1

79
USB_BC_ON(Low)-->ILIM_L
USB Charger (UBC)_BC 1.2 USB_BC_ON(High)-->ILIM_H +USBPWR11
+5VPCU
U1TA1
120mil 120mil
1 12
VIN VOUT
Part Number Description
2 11 USBP1-_MB_C
C1TA1 [10] USBP1- 3 DM_OUT DM_IN 10 USBP1+_MB_C C1TA8 C1TA2 C1TA3 C1TA4
[10] USBP1+ DP_OUT DP_IN
AL002544001 TPS2544RTER 1u/10V_2 *15p/25V_2 470p/50V_4 0.1u/6.3V_2 100u/6.3V_12
D 6 9 D
[86] USB_CLT1 CTL1 NC
AL055544001 SLGC55544CVTR +5VPCU R1TA1 10K_1%_2 CTL2_3 7
R1TA2 10K_1%_2 CTL3_3 8 CTL2 13
CTL3 FAULT USB_OC1# [2]
R1TA3 100K_1%_2
5
[86] USB_CHARGE_ON EN
4 17
[86] USB_BC_ON ILIM_SEL EPAD 14
(RILIM_LO 1.2A) ILIM_LO3 GND
15
ILIM_HI3 16 ILIM_L
ILIM_H
(RILIM_HI 2.3A)
R1TA4 R1TA5 SLGC55544CVTR
39K_1%_2 20K_1%_2

C
USB Power C

Option
Check RF
Level2 SPEC
and remove,
short directly
B
TypeA#1 B

6
gnd_2
R1TA7 *Short_0402 USB32_RX1-_MB1_LL 4 3 USB32_RX1-_MB1 +USBPWR11 +USBPWR11
[78] USB32_RX1-_MB1_LL_LL in- out-
R1TA6 *Short_0402 USB32_RX1+_MB1_LL 1 2 USB32_RX1+_MB1
[78] USB32_RX1+_MB1_LL_LL in+ out+ D1TA1 1 2 AZ5725-01F.R7G
gnd_1

11

13
5 L1TA1
RFA11T2SA4CR_0.3A
5 Shield#2 Shield#4
StdA_SSRX- USBP1+_MB1
4 D1TA2 1
GND
6 3 MESD05N92ULA
StdA_SSRX+ USBP1-_MB1
3 2
Option Remove if stuff redriver USBP1+_MB_C
USBP1-_MB_C
R1TA8
R1TA9
*Short_0402
*Short_0402
USBP1+_MB1
USBP1-_MB1
7
2
D+
GND_Drain
D-
8 USB32_RX1-_MB1 D1TA3 1 2 ESD5311Z-2/TR
StdA_SSTX- USB32_RX1+_MB1
1 D1TA4 1 2 ESD5311Z-2/TR
VBUS
9
StdA_SSTX+ USB32_TX1-_MB1 D1TA5 1 2 ESD5311Z-2/TR
Shield#1 Shield#3 USB32_TX1+_MB1 1 2 ESD5311Z-2/TR
D1TA6
6

10

12
gnd_2 CN1TA1
USB32_TX1-_MB1_LL 4 3 USB32_TX1-_MB1 C1TA6
A
[78] USB32_TX1-_MB1_LL_LL C1TA5 0.22u/25V_2 USB-09DULWAB A
C1TA7 0.22u/25V_2 USB32_TX1+_MB1_LL 1 in- out- 2 USB32_TX1+_MB1 0.1u/6.3V_2
[78] USB32_TX1+_MB1_LL_LL in+ out+
gnd_1 Quanta Computer Inc.
5 L1TA2
RFL11T2SA0BR_0.3A PROJECT : ZGN
Size Document Number Rev
B TypeA1-CONN/BC1.2 A1A

Date: Monday, March 21, 2022 Sheet 79 of 150


5 4 3 2 1
5 4 3 2 1

USB Type A #2 - Re-driver


+3V_U3_22

+3V_U3_22 +1.2V_U3_22 +3V_U3_22


D R22TAR1 10K_1%_2 RESETB_22 C22TAR1 2.2u/10V_4 D

R22TAR2 4.7K_1%_2 EN_22


U22TAR1

10
28
19
34

22
24
23

18
5

1
Chip Enable. Active is high. Default is internal pull-down by 150K
Intel:

VDDD
VDDDCI

VDDAX
VDDBX
VDDAA
VDDBA
VDDM#1
VDDM#3
VDDM#2

VDD33#1
VDD33#2
USB 3.1 transmit pairs require a 75–265 nF capacitor
R22TAR3 4.7K_1%_2 ADDR0_22
in the path between PCH and ESD/CMC protection. ADDR1_22
R22TAR4 4.7K_1%_2

C22TAR2 0.22u/25V_2 USB32_TX2+_R22 2 27 I2C Slave address setting.


[10] USB32_TX2+ A_INP A_OUTP USB32_TX2+_MB2_LL_LL[81]
C22TAR3 0.22u/25V_2 USB32_TX2-_R22 3 26 ADDR0/1 is pulled down by 150K in default
[10] USB32_TX2- A_INN A_OUTN USB32_TX2-_MB2_LL_LL[81] [ADDR1, ADDR0]:
C22TAR4 0.22u/25V_2 USB32_RX2+_R22 8 21 00: 0x50-0x53
[10] USB32_RX2+
[10] USB32_RX2- C22TAR5 0.22u/25V_2 USB32_RX2-_R22 9 B_OUTP
B_OUTN
B_INP
B_INN
20
USB32_RX2+_MB2_LL_LL [81]
USB32_RX2-_MB2_LL_LL [81]
01: 0x54-0x57
10: 0xE0-0xE3
11: 0xE4-0xE7
pay attention
PS8811QFN36GTR2-A3
TP22TAR1 7
TP22TAR2 6 DCI_DATA
DCI_CLK 29 REXT_22 R22TAR5 4.99K_1%_2 R22TAR6 *4.7K_1%_2 DCI_EN_22 R22TAR7 *4.7K_1%_2
REXT
EN_22 11 16 RESETB_22
EN RESETB DCI_EN: Auto DCI enable or disable
17 L: Disable
C TEST M: Disable (default) C
MODE_22 30 13

DCI_EN

ADDR0
ADDR1
MODE GND#1 H: Enable

CSDA
A_EQ
B_EQ
31

CSCL
B_DE
GND#2 37 MODE_22 R22TAR8 *4.7K_1%_2
EPAD

12
15

25
14

32
33

36
35
Chip Operation Mode Selection. Default is Middle Level
L: 5G redriver Mode, 10G retimer mode, adaptive EQ.
M: 5G redriver Mode, 10G retimer mode, fixed EQ. (Default)

DCI_EN_22

ADDR0_22
ADDR1_22
to I2C Master
VDD_DCI = 1.8V/2.5V/3.3V

+3V_SUS +3V_U3_22 +3V_U3_22 +3V_U3_22


PS8811_MBCLK_2
L22TAR11 2 HCB1608KF-301T20_2A PS8811_MBDATA_2
S5 SUS
R22TAR9
C22TAR6 4.7K_1%_2

5
B 1u/10V_2 B

3 4 PS8811_MBCLK_2
[78,86,87,89,91,93] 3ND_MBCLK
Q22TAR1A
PJX138K
+1.2VSUS +1.2V_U3_22
+3V_U3_22 +3V_U3_22
L22TAR21 2 HCB1608KF-301T20_2A

C22TAR7 C22TAR8 C22TAR9 C22TAR10 C22TAR11 C22TAR12 C22TAR13 R22TAR10


4.7u/6.3V_4 0.1u/6.3V_2 0.01u/10V_2 0.1u/6.3V_2 0.01u/10V_2 0.1u/6.3V_2 0.01u/10V_2 4.7K_1%_2

2
6 1 PS8811_MBDATA_2
[78,86,87,89,91,93] 3ND_MBDATA
Q22TAR1B
Decoupling caps need be placed as close to power pins as possible. PJX138K
1.2 V power ripple requirement: < 30 mV

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
B TypeA2-PS8811QFN36GTR2 A1A

Date: Monday, March 21, 2022 Sheet 80 of 150


5 4 3 2 1
5 4 3 2 1

USB Charger (UBC)_BC 1.2


81
D D

+5VPCU
USB Power
C2TA1 U2TA1 +USBPWR21
1u/10V_2
5 1
C IN OUT C

2
GND
USBON# 4 3 C2TA2 C2TA3 C2TA4 C1TA9
[86] USBON# /EN /OC
470p/50V_4 0.1u/6.3V_2 100u/6.3V_12 *15p/25V_2
G524B2T11U

[2] USB_OC2#

Option
Check RF
Level2 SPEC
and remove,
short directly
B
TypeA#2 B

5
gnd_1
R2TA1 *Short_0402 USB32_RX2-_MB2_LL 1 2 USB32_RX2-_MB2 +USBPWR21 +USBPWR21
[80] USB32_RX2-_MB2_LL_LL in+ out+
R2TA2 *Short_0402 USB32_RX2+_MB2_LL 4 3 USB32_RX2+_MB2
[80] USB32_RX2+_MB2_LL_LL in- out- D2TA1 1 2 AZ5725-01F.R7G
gnd_2

11

13
6 L2TA1
RFA11T2SA4CR_0.3A
5 Shield#2 Shield#4
StdA_SSRX- USBP3+_MB2
4 D2TA2 2
GND
6 3 MESD05N92ULA
StdA_SSRX+ USBP3-_MB2
3 1
USBP3+_MB2 D+
R2TA3 *Short_0402 7
[10] USBP3+ USBP3-_MB2 GND_Drain
R2TA4 *Short_0402 2
[10] USBP3- D- USB32_RX2-_MB2
8 D2TA3 1 2 ESD5311Z-2/TR
StdA_SSTX- USB32_RX2+_MB2
1 D2TA4 1 2 ESD5311Z-2/TR
VBUS
9
StdA_SSTX+ USB32_TX2-_MB2 D2TA5 1 2 ESD5311Z-2/TR
Shield#1 Shield#3 USB32_TX2+_MB2 1 2 ESD5311Z-2/TR
D2TA6
5

10

12
gnd_1 CN2TA1
USB32_TX2-_MB2_LL 1 2 USB32_TX2-_MB2 C2TA6
A
[80] USB32_TX2-_MB2_LL_LL C2TA5 0.22u/25V_2 USB-09DULWAB A
C2TA7 0.22u/25V_2 USB32_TX2+_MB2_LL 4 in+ out+ 3 USB32_TX2+_MB2 0.1u/6.3V_2
[80] USB32_TX2+_MB2_LL_LL in- out-
gnd_2 Quanta Computer Inc.
6 L2TA2
RFL11T2SA0BR_0.3A PROJECT : ZGN
Size Document Number Rev
B TypeA2-CONN A1A

Date: Monday, March 21, 2022 Sheet 81 of 150


5 4 3 2 1
5 4 3 2 1

82
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 82 of 150


5 4 3 2 1
5 4 3 2 1

83
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 83 of 150


5 4 3 2 1
5 4 3 2 1

84
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 84 of 150


5 4 3 2 1
5 4 3 2 1

85
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 85 of 150


5 4 3 2 1
5 4 3 2 1

EC(KBC) L1E3 1 2 BLM15AG121SN1D_0.5A +A3VPCU +3VPCU_ECPLLL1E1 1 2 BLM15AG121SN1D_0.5A

86
+3VPCU_EC +3V_LDO_EC
+1.8V_S5 R1E8 *0.01_1%_4
C1E14 C1E13 C1E6 0.1u/6.3V_2
1000p/25V_2
(For PLL Power) R1E92 *Short_0402
0.1u/6.3V_2 AC_PRESENT_EC [12] +3V_S5 VSTBY_FSPI S5_ON R1E9 10K_1%_2
ECAGND
WLANPWR# [61] GPG2
+3VPCU_EC minimum trace width 12mils. R1E90 *Short_0201 NBSWON# R1E13 10K_1%_2
LANPWR# [68]
R1E17 2.2_5%_6
12 mils +3VPCU_EC
+3V_LDO_EC Prevent ESD/EOS Layout near device
R1E18 *33_1%_2 BT_EN [61] MAINON R1E24 100K_1%_2

C1E22 C1E8 C1E2 C1E3 C1E21 C1E19 C1E18 CLR_CMOS [11] C1E9 *180p/25V_2 SUSON R1E11 100K_1%_2
0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 LED_CTL_TURBO [87] R1E77 *0_5%_2 VRON R1E23 100K_1%_2
MAINON [113,114,123,124,144] battery_learn [150]
R1E46 *0_5%_2
VSTBY_FSPI SUSC# [12,16,21,22,114,146] PCH_SPI_SI_EC R1E27
R1E83 *0_5%_2 *10K_1%_2
ESPI_CLK +1.8V_EC EC_CCG_I2C_INT# [73] ACZ_SPKR [4,14,64]
+1.8V R1E29 *2.2_5%_6
USB_BC_ON [79] PCH_SPI_SO_EC R1E28
R1E107 *Short_0201 *10K_1%_2
D USB_CHARGE_ON [79] KB_BL_LED [87] D
+1.8V_S5 R1E30 2.2_5%_6
PCH_BLON_EC [45] PLTRST#_EC
C1E25 GPD2 R1E93 100K_1%_2
R1E20 0.1u/6.3V_2
[9] ESPI_0

114
121

106

127
*22_5%_2 R1E60 *Short_0201

11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
[9] ESPI_1 GPUT_CLK [32]

3
[9] ESPI_2 R1E61 *Short_0201 GPUT_DATA [32]
10 87 MBCLK

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5

VSTBY(PLL)

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

SMCLK4/L80HLAT/BAO/GPE0
SMDAT4/L80LLAT/GPE7

GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
VCC

VSTBY_FSPI
AVCC
[9] ESPI_3 EIO0/LAD0/GPM0(3) SMCLK0/GPF2 MBCLK [112]
9 88 MBDATA
8 EIO1/LAD1/GPM1(3) SMDAT0/GPF3 115 2ND_MBCLK MBDATA [112] +3V_LDO_EC
C1E16 180p/25V_2 SM BUS 2ND_MBCLK [9,61,73,93]
C1E11 7 EIO2/LAD2/GPM2(3) SMCLK1/GPC1 116 2ND_MBDATA
PLTRST#_EC EIO3/LAD3/GPM3(3) SMDAT1/GPC2 EC_PECI_R 2ND_MBDATA [9,61,73,93]
*10p/25V_2 R1E22 *Short_0201 22 117 R1E12 43_5%_2
[9] ESPI_RESET# ESPI_CLK ERST#/LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) EC_PECI [4]
13 118
[9] ESPI_CLK 6 ESCK/LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) AML_EC_PCH_DATA [150]
[9] ESPI_CS# ECS#/LFRAME#/GPM5(3)
[150] 80PORT_CLK

1
[150] I2C_PSENSOR_A_INT#_EC
R1E16 D1E2
R1E99 *Short_0201 126 1.8V 100K_1%_2 RB500V-40
[91] MODE1 5 GA20/GPB5(3) 85
[150] ADP2_DET R1E79 *0_5%_2 GPIO
15 ALERT#/SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0 86 SYS_SHDN# [4,113,123]
LPC EC_FPBACK# [45]

2
23 ECSMI#/GPD4(3) PS2DAT0/TMB1/GPF1 89 WRST#
[87] USBKB_PWR_EN ECSCI#/GPD3 PS2CLK2/GPF4 TPCLK [88]
R1E39 *0_5%_2 WRST# 14 PS/2 90
[12,16,124] SUSB# WRST# PS2DAT2/GPF5 TPDATA [88]
R1E85 *0_5%_2 R1E80 *Short_0201 4 C1E15
[45] TABLET_MODE [88] FP_POWER_NOTIFY KBRST#/GPB6(3) R1E75 *DDS_N@0_5%_2 1u/10V_2
R1E100 *0_5%_2
[96] SD7.0_PRSNT#
R1E103 *Short_0201 24 R1E76 *Short_0201
[87] TURBO_KEY#

[87] CAMERA_HOT_KEY
R1E84 *0_5%_2
113
IT5570 PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
25
28
29
PWRLED# [88]
BATLED1# [88]
R1E74 *DDS_N@0_5%_2
SUSLED# [88]

SUSLED#_TP [150]
[150] 80PORT_DAT CRX0/GPC0 PWM3/GPA3 BATLED0# [88]
SM BUS PU(KBC)
[12] DNBSWON#

R1E71 *0_5%_2
123
CTX0/TMA0/GPB2(3) CIR
LQFP SMCLK5/PWM4/GPA4
SMDAT5/PWM5/GPA5
30
31
BRIGHT_EC_GPA4
FAN2_PWM [93]
R1E73 *Short_0201
BRIGHT_EC [45]

MBCLK R1E31 4.7K_1%_2


+3V_LDO_EC

[91] EC_AML_INT# PWM


R1E72 *Short_0201 80
[87] CAP_LED_EN 119 DAC4/DCD0#/GPJ4(3) 47 MBDATA R1E32 4.7K_1%_2
[12,16] DPWROK_EC DSR0#/GPG6 TACH0A/GPD6(3) FAN1_RPM [93]
33 48
[12] EC_SYS_PWROK GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) FAN2_RPM [93]
R1E66 *0_5%_2
[124] VNN_V105_EN 2ND_MBCLK R1E33 4.7K_1%_2
R1E56 *0_5%_2 81 120
[73] ADP_IN_EN_EC DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) SYS_HWPG SUSON [21,22,113,114,123,144,146]
124
Crisis_disk_enable 17 TMRI1/GPC6(3) 2ND_MBDATA R1E34 4.7K_1%_2
C C
16 TXD/SOUT0/LPCPD#/GPE6 AMP_MUTE# [64]
[150] AML_EC_PCH_CLK RXD/SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7(3) R1E102 *Short_0201
DGPU_OPP# 71 107 MODE2 [91] EC_CCG_I2C_INT# R1E35 2.2K_1%_2
R1E78 *0_5%_2
72 ADC5/DCD1#/GPI5(3) GPE4/BTN# 18 ADP1_DET [150]
UART port R1E59 *0_5%_2
[8,16] RSMRST# 73 ADC6/DSR1#/GPI6(3) WAKE UP RI1#/GPD0(3) 21 HWPG ADP_DET_EC [73]
[112] TEMP_MBAT# 35 ADC7/CTS1#/GPI7(3) RI2#/GPD1 +3V_S5
[12,16,21,22,123] SLP_SUS#_EC RTS1#/GPE5 Prevent ESD/EOS Layout near device
34
[64] PCBEEP_EC PWM7/RIG1#/GPA7 +3VPCU_EC
122 112 D1E1 TVM0G5R5M220R_22p
[88] PBA_FP_PWREN# 3ND_MBDATA DTR1#/SBUSY/GPG1/ID7 VSTBY0 3ND_MBCLK R1E49
95 110 NBSWON# C1E7 180p/25V_2 4.7K_1%_2
[78,80,87,89,91,93] 3ND_MBDATA 3ND_MBCLK CTX1/SOUT1/GPH2/SMDAT3/ID2 PWRSW/GPB3 NBSWON# [87,88]
94 111 R1E14 33_1%_2
[78,80,87,89,91,93] 3ND_MBCLK CRX1/SIN1/SMCLK3/GPH1/ID1 XLP_OUT/GPB4 TP1E3 LID# [45] 3ND_MBDATA R1E50
109 4.7K_1%_2
105 LID_SW#/GPB1 108 R1E25 *33_1%_2
[19] PCH_SPI_CLK_EC FSCK/GPG7 AC_IN#/GPB0 ACIN [112] RF_EN [61] EC_AML_INT# R1E51
101 C1E23 *180p/25V_2 2.2K_1%_2
[19] PCH_SPI_CS0#_EC PCH_SPI_SI_EC FSCE#/GPG3
102 EXTERNAL SERIAL FLASH
SPI [19]
[19]
PCH_SPI_SI_EC
PCH_SPI_SO_EC
PCH_SPI_SO_EC 103 FMOSI/GPG4
FMISO/GPG5 ADC0/GPI0(3)
66
67
C1E20 100p/50V_2 ECAGND R1E91 *Short_0201
ME_WR# [14]
R1E62
R1E63
*0_5%_2
*0_5%_2
MBDATA1_GPU [32,126]
ADC1/GPI1(3) ICMNT [112] MBCLK1_GPU [32,126]
56 68
[87] MY16 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) IDCHG_R [112]
57 69
[87] MY17 KSO17/SMISO/GPC5(3) ADC3/GPI3(3) VRON [12]
32 70 R1E57 *Short_0201
[93] FAN1_PWM PWM6/SSCK/GPA6 ADC4/GPI4(3) USBON# [81]
R1E70 *0_5%_2
[113,123] S5_ON
S5_ON
PROCHOT_EC
100
125 SSCE0#/GPG2 SPI ENABLE A/D D/A
AP_SLP_S0_L [12,20,61]
PROHOT#
R1E89 *Short_0201
SSCE1#/GPG0 76 R1E86 *0_5%_2 USBKB_INT# [87]
TACH2A/GPJ0(3) LRA_EN [88]
36 77 R1E54 *0_5%_2
[87] MY0 37 KSO0/PD0 TACH2B/GPJ1(3) 78 DGPU_THER_ALERT# [32] H_PROCHOT# [4,13,73,112,141]
[87] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3)
38 79 R1E82 *Short_0201
[87] MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(3) FP_BTN_IGN [88]

3
39 R1E81 *0_5%_2 Q1E2
[87] MY3 KSO3/PD3 VGPU_ICMNT [150] PROCHOT_EC 2
40
[87] MY4 41 KSO4/PD4 PCH_PWROK [12,16]
[87] MY5 USB_CLT1 [79] 2N7002K
42 KSO5/PD5
[87] MY6 KSO6/PD6 KBMX
43 R1E21

1
[87] MY7 KSO7/PD7
44 Prevent ESD/EOS Layout near device C1E17 100K_1%_2
[87] MY8 45 KSO8/ACK#
[87] MY9 KSO9/BUSY 0.1u/6.3V_2
46 C1E4 180p/25V_2
[87] MY10 51 KSO10/PE 2 R1E3 33_1%_2
[87] MY11 KSO11/ERR# GPJ7 TPD_EN [88]
KSI3/SLIN#
KSI1/AFD#

52 128
KSI0/STB#

KSI2/INIT#

CLOCK R1E2 33_1%_2


[87] MY12 53 KSO12/SLCT GPJ6 TPD_INT#_EC [88]
C1E5 180p/25V_2
VCORE

B [87] MY13 KSO13 B


54
AVSS
VSS1

VSS2
VSS3
VSS4
VSS5
KSI4
KSI5
KSI6
KSI7

[87] MY14 KSO14


55
[87] MY15 KSO15 DGPU_OPP#_PROCHOT# [32]
Q1E3
58
59
60
61
62
63
64
65

27
49
91
104

1ECAGND 75

12

3
U1E1 IT5570E-128/CX 2N7002KTB
DGPU_OPP# 2
[87] MX0 IT5570E-128/CX AJ055700F00
[87] MX1
C1E10 C1E26 R1E48

1
[87] MX2
[87] MX3 0.1u/6.3V_2 0.1u/6.3V_2 100K_1%_2
[87] MX4
[87] MX5
L1E2
[87] MX6
[87] MX7 BLM15AG121SN1D_0.5A
TP1E2
2

TP1E1

HWPG(KBC)
R1E15 10K_1%_2
+3V S0 (MAINON)
Reserve switch for test Reset SW (FSW)
(MP remove) Crisis_disk_enable [4,141] IMVP_PWRGD
D1E8 1 2 *SDM20U30-7 HWPG HWPG [12,16]
R1E67 *Short_0201

D1E7 1 2 *SDM20U30-7
+3V_RTC [146] HWPG_5VDIMM
SW1E1 R1E26 *Short_0201 D1E10 1 2 *SDM20U30-7
[12,21,22] DRAM_PWR_GOOD
Debug@T3AL-23S-Q-T/R
D1E4 1 2 SDM20U30-7 DDR (SUSON)
[12,114] HWPG_VDDR
NBSWON# 1 3 [112] BI 2 4
1 3 R1E1
2 4 100K_1%_2 D1E9 1 2 *SDM20U30-7
C1E24 SW1E3 SMBUS [124] +1.05V/VNN_EXT_PG
6

A 0.1u/6.3V_2 Vgs = 1.5V D1E3 1 2 *SDM20U30-7 A


[124,144] VCCIN_AUX_PG
3

*NDT016-G1A-KKKT SM Bus 0 Battery/GPU


Q1E1 2 D1E6 1 2 *SDM20U30-7 S5
[123,144] HWPG_1.8VS5
Reserve switch for test PJA138K
RESET_SW SM Bus 1 Debug Card/ PD/ Thermal Sensor (Local:CPU;Remote Panel)
(MP remove) SW1E2 D1E5 1 2 *SDM20U30-7
1

[111,113] SYS_HWPG 3/5V PCU


3
4

C1E1 *TME-533B-Q-T/R
*0.1u/6.3V_2 5 SM Bus 2 N/A
recommad use same as SW2
shortage problem SM Bus 3 U3 Re-driver1/ U3 Re-drivr2/ LED Driver/ Ambient Light Sensor/
Quanta Computer Inc.
6 Thermal Sensor (Local:GPU;Remote DDR5)
PROJECT : ZGN
2
1

Size Document Number Rev


Custom KBC IT8987 A1A

Date: Thursday, May 26, 2022 Sheet 86 of 150


5 4 3 2 1
5 4 3 2 1

Tranditional keybord No D5/D5 offical Keyboard SPEC Power Button NBSWON# [86,88]
87

2
DEK1
R1E96 DKB@0_5%_2 __ D5/D7 3 4 AZ5725-01F.R7G
CAMERA_HOT_KEY [86]
R1E95 *PTKB@Short_0201 __ PT300 SWEK1
MIC_MUTE_LED [64]

1
34 *TBFF22KQR
R1E98 DKB@0_5%_2 __ D5/D7 (F4 LED) 1 2
32 R1E97 *PTKB@Short_0201 MUTE_LED_VCC REK27 *KB@0_5%_6
31 CAP_LED_EN_C
__ PT300 +5V
30 CAP_LED_VCC REK28 *KB@Short_0603
29 +3V
MY16
28 MY16 [86]
MY17
27 MY17 [86]
D MY0 D
26 MY0 [86]
MY1
25 MY1 [86] NBSWON#_R
MY2 REK26 REK25 REK1 *Short_0603
24 MY2 [86]
MY3 PTKB@33_1%_2 KB@33_1%_2
23 MY3 [86]
MY4
22 MY4 [86]
MY5
21 MY5 [86] MUTE_LED_VCC
MY6
20 MY6 [86]
MY7
19 MY7 [86] CAP_LED_VCC
MY8
MY8 [86]
18
17
16
15
MY9
MY10
MY11
MY9 [86]
MY10 [86]
MY11 [86]
Turbo Button 5V +3V_S5
3V
MY12

2
14 MY12 [86]
MY13 QEK10 2N7002KTB
13 MY13 [86] TURBO_KEY_C
MY14 3 1
12 MY14 [86] TURBO_KEY# [86]
MY15
11 MY15 [86] CAP_LED_EN_C
MX0 R1E94 *KB@0_5%_2
10 MX0 [86]
MX1

5
9 MX1 [86]
MX2
8 MX2 [86] 5V 3V

3
MX3
7 MX3 [86] 1 TURBO_KEY_C
MX4
6 MX4 [86] 2 LED_CTL_TURBO_C LED_CTL_TURBO_C
MX5 2
5 MX5 [86] CAP_LED_EN [86] 3
MX6 +5VPCU
4 MX6 [86] 4
MX7
3 MX7 [86]

3
__ PT300 QEK8

1
2

6
NBSWON#_RR REK2 KB@33_1%_2 NBSWON#_R KB@DDTC144EUA-7-F
1 CNEK5 2
__ D5/D7 (QV03P_A10BWL) LED_CTL_TURBO [86]
33 50505-00401-V01
2

DEK2 CEK1 QEK11

1
KB@AZ5725-01F.R7G *KB@180p/25V_2 DDTC144EUA-7-F
1

CNEK1
C C
KB@51519-03201-V01

USB Keyboard No USB Keyboard SPEC Follow XC90 +3V_S5


UKB@51625-01201-001
CNEK2

+5V_KB
[6] USBKB_reset TP248
+5V_KB REK30 13
REK3 *UKB@0_5%_6 *UKB@1.1K_1%_2 1
2
USBP7-_R 3
+5V_S5 1 3 REK4 UKB@0.01_1%_6 REK6 UKB@0_5%_4
[10] USBP7- USBP7+_R 4
REK7 UKB@0_5%_4
[10] USBP7+ 5
CEK3 QEK7 CEK2 6
2

UKB@0.1u/6.3V_2 UKB@DMP2130L-7 USBKB@0.1u/6.3V_2 7


NBSWON#_R R1E106 UKB@0_5%_2 8
KB_INT#_C 9
KB_DAT_C 10
KB_CLK_C 11
CEK4 *UKB@1000p/25V_2
12
+3V_S5 +5V_KB 14
3

REK9 UKB@1.1K_1%_2 2
[86] USBKB_PWR_EN
REK10 R1E104 **UKB@0_5%_2
UKB@10K_1%_2
R1E105 *UKB@0_5%_2
1

CEK5 REK11 QEK2


B *UKB@4.7u/6.3V_4 UKB@100K_1%_2 UKB@2N7002K 3V_S5 +5V_KB B
+5V_S5
+3V_S5 +5V_KB
RL1009 RL1010
*UKB@4.7K_1%_2 *UKB@4.7K_1%_2

5
3 4 KB_DAT_C
[78,80,86,89,91,93] 3ND_MBCLK
REK16 REK17

2
10K_1%_2 *UKB@10K_1%_2 QL2A
2

*UKB@PJX138K
1 3 KB_INT#_C 6 1 KB_CLK_C
[86] USBKB_INT# [78,80,86,89,91,93] 3ND_MBDATA
QEK4 UKB@2N7002KTB
QL2B
*UKB@PJX138K

KB_BL LED +5V +5V Single Color (D5/D7) No Backlight SPEC, Follow Sparks 3-Zone RGB (PT300)
6

CEK6 *KBL@2.2u/10V_4
REK22 13
KBL@10K_1%_2
[89] KB_LED_1Z_R 1
1

REK23 KBL_1Z@0.01_1%_6 4
[89] KB_LED_1Z_G 2
QEK5 3
[89] KB_LED_1Z_B 3
2 KBL@DMP2130L-7 2
[89] KB_LED_2Z_R 4
1
+5V_KBL [89] KB_LED_2Z_G 5
[89] KB_LED_2Z_B 6
3

[89] KB_LED_3Z_R
3

7
A +5V_KBL [89] KB_LED_3Z_G 8 A
2
[86] KB_BL_LED [89] KB_LED_3Z_B 9
5

10
QEK6 CNEK3
CEK8 11
KBL@DDTC144EUA-7-F CEK7 KBL_1Z@50505-0040N-V01_FFC/FPC
12
1

KBL@4.7u/6.3V_4 KBL@0.01u/50V_4
14
REK24 *KBL_3Z@0.01_1%_6 CNEK4
KBL_3Z@51625-01201-001 Quanta Computer Inc.
REK29 *KBL_3Z@Short_0603
[89] KB_LED_PWR
PROJECT : ZGN
1.5A (60mils) Size
Custom
Document Number
TP/KB/Light Bar
Rev
A1A

Date: Thursday, May 26, 2022 Sheet 87 of 150


5 4 3 2 1
5 4 3 2 1

UIF 88
REU1 1M_5%_4 +3VPCU REU7 1M_5%_4 +3VPCU
Power LED REU2 *1M_5%_4 +3V
Battery REU8 1M_5%_4

BATLED0# REU9 124_1%_6 LED_B2_BAT_R 3 2


LED_B1_SYS_R 3 2 LED_PWR_PWR [86] BATLED0# Blue LED_BAT_PWR
PWRLED# REU4 124_1%_6 REU5 *Short_0402 +3VPCU REU10 *Short_0402 +3VPCU
[86] PWRLED# Blue LED_A2_BAT_R Oran
BATLED1# REU11 124_1%_6 4 1
LED_A1_SYS_R Oran [86] BATLED1#
SUSLED# REU12 124_1%_6 4 1
[86] SUSLED#
LEDEU4
LEDEU2 BL/ORG_19-123/S2BHC-A30/2T
BL/ORG_19-123/S2BHC-A30/2T
D D
REU13 1M_5%_4 DEU4 1 2 AZ5725-01F.R7G
+3VPCU
REU14 *1M_5%_4 +3V DEU5 1 2 AZ5725-01F.R7G
DEU3 1 2 AZ5725-01F.R7G

DEU6 1 2 AZ5725-01F.R7G

Touch Pad Haptic TouchPAD (D5/D7) No Haptic Touch SPEC, Follow Beatles
RET1 *TP@Short_0603
Cannot wake once D3 Cold implement
50mil 1 3
+TPVDD +3V_S5 +TPVDD
RET11 HTP@0.01_1%_6
QET1
CET1 *TP@DMP2130L-7 50mil
S5 S5 or D3 cold

2
TP@0.1u/6.3V_2 +5V_S5 1 3 +5V_Haptic
RET2 QET5 **HTP@DMP2130L-7
*TP@2.2K_1%_2 PTP_PWR_EN# CET2 *TP@1000p/25V_2 CET3

2
[12] PTP_PWR_EN#
2

*HTP@0.1u/6.3V_2

QET2 3 1 *TP@2N7002K I2C_TP_SCL_C


[6] TP_I2C_SCL
CET4 **HTP@1000p/25V_2
[86] LRA_EN

RET3 *TP@Short_0201
Take care placement

RET12 *PTTP@Short_0603 +TPVDD_T


50mil

11
+TPVDD
+TPVDD RET13 HTP@0_5%_6 +TPVDD_H

RET14 *PTTP@Short_0201 T_PS2_CLK


C [86] TPCLK H_PS2_CLK
PT300 TP 1
C
RET15 HTP@0_5%_2 Haptic TP +5V_Haptic
9 2
RET4 RET16 *PTTP@Short_0201 T_PS2_DAT +TPVDD_H 3
[86] TPDATA H_PS2_DAT H_PS2_CLK 1
*TP@2.2K_1%_2 RET17 HTP@0_5%_2 4
H_PS2_DAT 2
5
2

I2C_TP_SDA_C T_SDA_C 3 6
RET18 *PTTP@Short_0201
I2C_TP_SDA_C H_SDA_C H_SDA_C 4
[6] TP_I2C_SDA QET3 3 1 *TP@2N7002K RET19 HTP@0_5%_2 7
H_SCL_C 5
8
I2C_TP_SCL_C T_SCL_C H_INT# 6 9
RET20 *PTTP@Short_0201
H_SCL_C H_SENSOR_OFF 7
RET21 HTP@0_5%_2 10
8
RET5 *TP@Short_0201
TP_INT#_C RET22 *PTTP@Short_0201 T_INT# 10
RET23 HTP@0_5%_2 H_INT# CNEF2
+TPVDD HTP@51619-00801-V03 CNP1005

12
RET24 *PTTP@Short_0201 T_SENSOR_OFF HTP@132F10-000000-A2-R
[86] TPD_EN H_SENSOR_OFF
RET25 HTP@0_5%_2

RET6
*TP@10K_1%_2
QET4
TouchPAD (PT300)
2

3 1 *TP@2N7002K TP_INT#_C
[86] TPD_INT#_EC
TPCLK

9
TP211
+TPVDD RET7 TP@10K_1%_2 TPCLK TPDATA
TP212 +TPVDD_T
RET10 *TP@Short_0201 RET9 *TP@Short_0201 RET8 TP@10K_1%_2 TPDATA T_PS2_CLK 1
[4] TPD_INT#_PCH I2C_TP_SCL_C T_PS2_DAT 2
TP213 I2C_TP_SDA_C 3
TP214 TP_INT#_C T_SDA_C 4
TP215 TPD_EN T_SCL_C 5
TP216 T_INT# 6
T_SENSOR_OFF 7
8

10
CNET1
B B
PTTP@51653-0080N-001

Finger print +3VPCU


+3V_S5 +3VPCU FP (PT300) - Secure ID PAD FP (D5/D7) - POA Like (FP on keyboard)
Should be (QF03P_A11BWL) + (FP)
CEF1
*FP@2.2u/10V_4 REF2 REF10
No FP SPEC
*PTFP@0_5%_4 *DFP@0_5%_4
1

QEF1 10
REF4 FP@10K_1%_2 2 10 +PBA_PWR_D
[86] PBA_FP_PWREN# FP@DMP2130L-7 8
+PBA_PWR_PT USBP8+_DFP
USBP8+_PTFP 8 USBP8-_DFP 7
USBP8-_PTFP 7 6
6 5
3

+PBA_PWR_R 5 [86,87] NBSWON# 4


REF5 *FP@Short_0402 +PBA_PWR_C TP207 4 [86] FP_POWER_NOTIFY 3
TP208 3 [86] FP_BTN_IGN 2
TP209 2 TP220 1
CEF3 CEF4
CEF2 TP210 1 9
FP@4.7u/6.3V_4 FP@0.01u/50V_4
*FP@0.01u/50V_4 9

DFP@AZ5725-01F.R7G

DFP@AZ5725-01F.R7G
PTFP@AZ5725-01F.R7G

PTFP@AZ5725-01F.R7G

CNEF1 CNEF3
PTFP@51619-00801-V03 DFP@51619-00801-V03

1
A A
1

Take care placement

DEF3

DEF4
2

2
DEF1

DEF2
2

REF1 *PTFP@Short_0402 USBP8+_PTFP


[10] USBP8+ USBP8+_DFP
PT300
REF3 DFP@0_5%_4 D5/D7

[10] USBP8- REF6


REF7
*PTFP@Short_0402
DFP@0_5%_4
USBP8-_PTFP
USBP8-_DFP Quanta Computer Inc.
FP_PWR_NTFY:System power status notify, to info FP keep data or not (Hi-power on; low-power off)
+PBA_PWR_PT
PROJECT : ZGN
+PBA_PWR_C REF8 *PTFP@Short_0402 FP_BTN_IGN:Notify system to ignore PWR_BTN signal while Enroll/Verify Process
REF9 DFP@0_5%_4 +PBA_PWR_D
(While Hi notify EC to keep power while FP is working) Size Document Number Rev
C UIF LED A1A

Date: Thursday, May 26, 2022 Sheet 88 of 150


5 4 3 2 1
5 4 3 2 1

LED Driver [ene6K5130] KB_LED_1Z_R_MCU


KB_LED_1Z_G_MCU
KB_LED_1Z_B_MCU
89
+5V_S5 50 mil +5V_MCU

RL10 *KBL_3Z@Short_0805 KB_LED_3Z_R_MCU


KB_LED_3Z_G_MCU
KB_LED_3Z_B_MCU

1
D DL1 D

KBL_3Z@RB500V-40 CL1 CL2


KBL_3Z@10u/6.3V_4 KBL_3Z@0.1u/6.3V_2

33

32
31
30
29
28
27
26
25
EPAD

PWM20/TXD

PWM16/SPIMOSI
PWM15/SPICLK
PWM19/INT1
PWM18/INT0
PD1
PD0
PWM17/PC7
KB_LED_2Z_R_MCU 1 24
KB_LED_2Z_G_MCU 2 PWM21/RXD PWM14/PC4 23 LED_PWR_CTL
KB_LED_2Z_B_MCU 3 PWM22/MCLK PWM13/PC3 22
3ND_MBCLK_C 4 PWM23/MDAT PWM12/PC2 21
3ND_MBDATA_C 5 ICK/SCLK PWM11/PC1 20
RL12 KBL_3Z@4.7K_1%_2 STRP1 6 IDA/SDAT PWM10/PC0 19
RL13 KBL_3Z@4.7K_1%_2 STRP2 7 PA4/STRP1 PWM9/PB7 18
8 PA5/STRP2 PWM8/PB6 17
+5V_MCU VDD PWM7/PB5
+5V +5V_KB_LED

PWM0/PA6
PWM1/PA7
PWM2/PB0
PWM3/PB1
PWM4/PB2
PWM5/PB3
PWM6/PB4
C C

RL1008 *KBL_3Z@Short_0805

VSS
+3V_S5 +5V_MCU
CL1007 CL1008
3V_S5 5V_S5

9
10
11
12
13
14
15
16
KBL_3Z@10u/6.3V_4 KBL_3Z@0.1u/6.3V_2 UL1
KBL_3Z@6K5130UA0

RL14 RL15
KBL_3Z@4.7K_1%_2 KBL_3Z@4.7K_1%_2

5
TPL3
TPL4
4 3 3ND_MBCLK_C
[78,80,86,87,91,93] 3ND_MBCLK

2
QLA
KBL_3Z@PJX138K
1 6 3ND_MBDATA_C
[87] KB_LED_1Z_R [87] KB_LED_1Z_G [87] KB_LED_1Z_B [78,80,86,87,91,93] 3ND_MBDATA
QLB
KBL_3Z@PJX138K
R1067 R1068 R1069
*KBL_3Z@Short_0402 *KBL_3Z@Short_0402 *KBL_3Z@Short_0402

B Q77A Q77B R719 KBL_3Z@4.7K_1%_2 LED_PWR_CTL B


+5V_KB_LED
3

KBL_3Z@2N7002KDW KBL_3Z@2N7002KDW Q76

2
3

KBL_3Z@2N7002K
5 KB_LED_1Z_R_MCU 2 KB_LED_1Z_G_MCU 2 KB_LED_1Z_B_MCU
1 3 KB_LED_PWR
KB_LED_PWR [87]
1
4

R1078 R1079 R1080 QEK9


KBL_3Z@100K_1%_2 KBL_3Z@100K_1%_2 KBL_3Z@100K_1%_2 KBL_3Z@DMP2130L-7 1.5A (60mils)

[87] KB_LED_2Z_R [87] KB_LED_2Z_G [87] KB_LED_2Z_B [87] KB_LED_3Z_R [87] KB_LED_3Z_G [87] KB_LED_3Z_B

R1070 R1071 R1072 R1073 R1074 R1075


*KBL_3Z@Short_0402 *KBL_3Z@Short_0402 *KBL_3Z@Short_0402 *KBL_3Z@Short_0402 *KBL_3Z@Short_0402 *KBL_3Z@Short_0402
Q79A Q79B
3

Q78A Q78B KBL_3Z@2N7002KDW KBL_3Z@2N7002KDW Q81


3

3
KBL_3Z@2N7002KDW KBL_3Z@2N7002KDW Q80 KBL_3Z@2N7002K
KB_LED_3Z_R_MCU KB_LED_3Z_G_MCU 2 KB_LED_3Z_B_MCU
3

A KBL_3Z@2N7002K 5 2 A
5 KB_LED_2Z_R_MCU 2 KB_LED_2Z_G_MCU 2 KB_LED_2Z_B_MCU
Quanta Computer Inc.

1
4

R1081 R1082 R1083


1

PROJECT : ZGN
4

R652 R1076 R1077 KBL_3Z@100K_1%_2 KBL_3Z@100K_1%_2 KBL_3Z@100K_1%_2


KBL_3Z@100K_1%_2 KBL_3Z@100K_1%_2 KBL_3Z@100K_1%_2
Size Document Number Rev
B I/O DB (Audio/LAN/U3/LED) A1A

Date: Thursday, May 26, 2022 Sheet 89 of 150


5 4 3 2 1
5 4 3 2 1

90

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom I/O DB (Audio/LAN/U3/LED) A1A

Date: Monday, March 21, 2022 Sheet 90 of 150


5 4 3 2 1
5 4 3 2 1

Sensor (D5/D7)
91
ISH_I2C0_SDA
TP238
ISH_I2C0_SCL
+3V_S5
TP239
G-sensor_INT#_MB G-sensor_INT#_DB
Power
S5 S5 TP240 TP241

1
+SENSOR_POWER

RZI1
**SPIN@4.7K_1%_2

ISH I2C (G-Sensor)


+3V RZI11 **SPIN@0_5%_6 +SENSOR_POWER

2
ISH_I2C0_SDA QZI1 3 1 **SPIN@2N7002K ISH_I2C0_SDA_R ISH_I2C0_SDA_R RZG5 *SPIN@0_5%_2
[6] ISH_I2C0_SDA SDA_GSENSOR_DB [97]
+3V_S5 RZI12 *SPIN@0_5%_6
D RZI2 *SPIN@0_5%_2 D
+3V_S5

To G-sensor (D/B)
1
+SENSOR_POWER
+SENSOR_POWER
RZI3
**SPIN@4.7K_1%_2

2
ISH_I2C0_SCL QZI2 3 1 **SPIN@2N7002K ISH_I2C0_SCL_R ISH_I2C0_SCL_R RZG6 *SPIN@0_5%_2
[6] ISH_I2C0_SCL SCL_GSENSOR_DB [97]
CZI1 CZI2 CZI3
RZI4 *SPIN@0_5%_2 *SPIN@0.1u/6.3V_2 *SPIN@0.1u/6.3V_2 *SPIN@10u/6.3V_4
+3V_S5 +3V_S5

1
+SENSOR_POWER +SENSOR_POWER

RZI5 RZI23
**SPIN@4.7K_1%_2 **SPIN@4.7K_1%_2
2

2
2

2
G-sensor_INT#_MB QZI3 3 1 **SPIN@2N7002K INT1_GSENSOR_MB G-sensor_INT#_DB QZI8 3 1 **SPIN@2N7002K
[6] G-sensor_INT#_MB [6] G-sensor_INT#_DB INT_GSENSOR_DB [97]
RZI6 *SPIN@0_5%_2 RZI24 *SPIN@0_5%_2

C C
G-sensor (M/B) E-Zel SKU remove on board G-sensor ( Need change to BMI260 14 pin) TOF Sensor (For P6 only)
+SENSOR_POWER +SENSOR_POWER +SENSOR_POWER

UZG1
ADDR_SEL 1 7
SDO VDD RZG1
ISH_I2C0_SDA_R RZG2 *SPIN@0_5%_2 SDA_GSENSOR_MB 2 3 *SPIN@0_5%_2 RZP1 *TOF@0_5%_2
SDX SDA VDDIO [6] TOF_ISH_I2C1_SDA ISH_I2C1_SDA_R [150]
ISH_I2C0_SCL_R RZG3 *SPIN@0_5%_2 SCL_GSENSOR_MB 12 11 RZG9 *SPIN@0_5%_4 ADDR_SEL CZG1 CZG2 CZG3 RZP2 *TOF@0_5%_2
SCX SCL VDDIO PS 0: ADDR: 0X18 [6] TOF_ISH_I2C1_SCL ISH_I2C1_SCL_R [150]
*SPIN@0.1u/6.3V_2 *SPIN@0.1u/6.3V_2 *SPIN@10u/6.3V_4
INT1_GSENSOR_MB 5 8
1: ADDR: 0X19 RZI10 *TOF@0_5%_2
DNC

[10] TOF_INT# ISH_TOF_INT#_R [150]


GND

INT1 GNDIO
INT2_GSENSOR1 6 9 RZG4
CSB

TPZG1 INT2 GND **SPIN@0_5%_2


NC
4

10

*SPIN_XXX@BMA253_BMA_422_KX022-1020

RZG8 *SPIN@0_5%_2

+SENSOR_POWER RZG7 *SPIN@0_5%_2

B +3V B
BMA253 AL000253A00 KX022-1020 AL001020A00 BMA422 -------------------
SDO I2C Address: SDO I2C Address: Ambient light sensor S5
S0

1
PU:0X19 (M/B) PU:0x1F (M/B) +3V
AML I2C (Default to EC for KB backlight control)
PD:0X18 (D/B) PD:0x1E (D/B) RZI13
*AML@4.7K_1%_2

2
[78,80,86,87,89,93] 3ND_MBDATA RZI21 *AML@0_5%_2 QZI6 3 1 *AML@2N7002K
AML_SDA_R [97]
ISH_I2C0_SDA RZI22 **AML@0_5%_2 RZI14 **AML@0_5%_2
+3V

G-sensor Mode indicate

To AML (D/B)
1
SENSOR_MODE1_PCH +3V
TP242
SENSOR_MODE2_PCH RZI15
TP243
*AML@4.7K_1%_2

2
[78,80,86,87,89,93] 3ND_MBCLK RZI19 *AML@0_5%_2 QZI7 3 1 *AML@2N7002K
AML_SCL_R [97]
ISH_I2C0_SCL RZI20 **AML@0_5%_2 RZI16 **AML@0_5%_2
+1.8V +3V

RZI25 1 2 *SPIN@4.7K_1%_2

1
+3V
3V 1.8V
2

RZI7
3 1 *AML@4.7K_1%_2

2
[6] SENSOR_MODE1_PCH MODE1 [86]
QZG1 *SPIN@2N7002K

2
RZI17 **AML@0_5%_2 QZI4 3 1 *AML@2N7002K
From PCH

[86] EC_AML_INT# AML_INT#_R [97]


+SENSOR_POWER
TO EC

A RZI18 **AML@0_5%_2 RZI8 **AML@0_5%_2 A


[4] AML_INT#
2

3V 3V
[6] SENSOR_MODE2_PCH QZG2 1 3 *SPIN@2N7002K
MODE2 [86]

TP244
AML_SDA_R
Quanta Computer Inc.
AML_SCL_R
TP245
AML_INT#_R
PROJECT : ZGN
TP246
Size Document Number Rev
Custom Touch / POA A1A

Date: Monday, March 21, 2022 Sheet 91 of 150


5 4 3 2 1
5 4 3 2 1

D
92 D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 92 of 150


5 4 3 2 1
5 4 3 2 1

CPU FAN (THM) GPU FAN (THM)


93
+5V +5V

RYF4
*Short_0402
RYF2
+3V +3V +5V *Short_0402 +3V +3V +5V
+3V +5V
+3V +5V

RYF5 RYF6 RYF9 RYF10


RYF7 RYF8 10K_1%_2 *10K_1%_2 CYF1 10K_1%_2

2
*10K_1%_2

2
1K_1%_2 10K_1%_2 0.1u/25V_2 RYF11 RYF12 CYF2
[86] FAN1_RPM 1 3 1K_1%_2 10K_1%_2 0.1u/25V_2
QYF1 *2N7002K 1 3
[86] FAN2_RPM
CNYF1 QYF2 *2N7002K
D D
5 50278-00401-V01 40mil CNYF2
2

RYF13 *Short_0201 FAN1_VCC 5 50278-00401-V01


1

2
FAN1_RPM_R RYF14 *Short_0201 FAN2_VCC
1 3 FAN1_PWM_Q 2 FAN2_RPM_R 1
[86] FAN1_PWM 3 FAN2_PWM_Q 2
QYF3 METR3904-G 1 3
4 [86] FAN2_PWM 3
QYF4 METR3904-G
4
6
6

CYF3 CYF4 CYF5 CYF6


220p/25V_2 220p/25V_2 *220p/25V_2 *220p/25V_2

Vram and GPU Thermal Sensor +3V +3V_THM Different SMBUs to avoid address conflict
Local Vram and GPU Thermal Sensor RYT1 *Short_0402

+3V_THM CYT1
0.1u/6.3V_2
UYT1

3ND_MBCLK_GPU 8 1 GPU_THERMDA
S5 S0 SMBCLK VCC

3
RYT2 3ND_MBDATA_GPU 7 2 CYT2
SMBDATA DXP 2 QYT2
2.2K_1%_2
5

QYT1A 6 3 2200p/25V_2 METR3904-G


PJX138K ALERT DXN

1
3 4 4 5 GPU_THERMDC
[78,80,86,87,89,91] 3ND_MBCLK THERM GND
Location near to DDR5
G781-1P8
C C
+3V_THM
Location near to VMEM power
+3V_THM VCCST 3V RYT4
EC SMBUs3 10K_1%_2
PM_THRMTRIP# DYT1 2 1 *RB500V-40 MB_THRMTRIP#

RYT5
2.2K_1%_2
2

QYT1B
PJX138K
6 1
[78,80,86,87,89,91] 3ND_MBDATA

+3V_THM2
CPU PWR Thermal Sensor +3V

Local CPU PWR Thermal Sensor RYT7 *Short_0402 Different SMBUs to avoid address conflict
+3V_THM2 CYT3
S5 S0 0.1u/6.3V_2
UYT2

2ND_MBCLK_DDR 8 1 DDR_THERMDA
RYT8 SMBCLK VCC

3
2.2K_1%_2 2ND_MBDATA_DDR 7 2 CYT4
SMBDATA DXP 2 QYT4
5

QYT3A +3V_THM2 6 3 2200p/25V_2 METR3904-G


B
PJX138K ALERT DXN B

1
3 4 4 5 DDR_THERMDC
[9,61,73,86] 2ND_MBCLK
VCCST 3V RYT9 THERM GND
Location near to Panel
10K_1%_2 G781-1P8
RYT10 *0_5%_2 PM_THRMTRIP# DYT2 2 1 *RB500V-40 MB_THRMTRIP#_2
[4] PM_THRMTRIP#

+3V_THM2
Location near to CPU
EC SMBUs2
RYT11
2.2K_1%_2
2

QYT3B
PJX138K
[9,61,73,86] 2ND_MBDATA 6 1

RYT12 *0_5%_2

Coin Battery Charging +BAT_RTC

PT300 non chargeable type


A +5VPCU A
20MIL
3

1 3 VCCRTC_3 RYR1 *4.7K_1%_2 VCCRTC_4 RYR2 *4.7K_1%_2


1
2 QYR1
*METR3904-G RYR3
2
4

CNYR1
50271-0020N-001 *68.1K_1%_2
Quanta Computer Inc.
PROJECT : ZGN
RYR4
Size Document Number Rev
*150K_1%_2
C FAN/Thermal Sensor A1A

Date: Thursday, May 26, 2022 Sheet 93 of 150


5 4 3 2 1
5 4 3 2 1

94
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 94 of 150


5 4 3 2 1
5 4 3 2 1

95
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 95 of 150


5 4 3 2 1
5 4 3 2 1

(Concept D) Card reader (SD7.0)


96
D D

R1X6 *0.01_1%_6 +3V


TP250

TP252 PCIE_WAKE# [12]


TP253 SD7.0_PRSNT# [86]
R1X5 *0_5%_2 PLTRST# [12,20,25,53,55,61,68]
TP254
TP255 PCIE_CLKREQ_5# [11]
PCIE_TXP11_C C1X5 0.22u/6.3V_2
TP257 PCIE_TXN11_C PCIE_TXP11 [10]
C1X6 0.22u/6.3V_2
TP258 PCIE_TXN11 [10]

TP260 PCIE_RXP11 [10]


C PCIE_RXN11 [10] C
TP261

TP263 CLK_PCIE_SDP [11]


TP264 CLK_PCIE_SDN [11]

B
(PT300) Card reader (SD3.0) B

+3V

9
C1X3 C1X4
1
R1X3 *Short_0603 +3V 0.1u/6.3V_2 *0.22u/6.3V_2
2
3
R1X1 *Short_0201
4 USBP9- [10]
R1X2 *Short_0201
5 USBP9+ [10]
6
7
R1X7 *Short_0603 +3V_S5
8
A 10
Quanta Computer Inc. A
CN1X1
51619-00801-V03 PROJECT : ZGN
Size Document Number Rev
A DB1 :SD Card+UIF A1A

Date: Thursday, May 26, 2022 Sheet 96 of 150


5 4 3 2 1
5 4 3 2 1

Concept D only (AML+G-sensor+EMR Touch+3D display+EYE Tracker)


97
41
D D
+3V_AML R2X1 *0.01_1%_4
1 +3V
2 AML_SDA_R [91]
3 AML_SCL_R [91] Ambient light sensor
4 +SENSOR_POWER_3V AML_INT#_R [91]
R2X2 *0.01_1%_4 +SENSOR_POWER
5
6 SDA_GSENSOR_DB [91]
7 SCL_GSENSOR_DB [91] GSENSOR
8 +5V_Touch_EMR INT_GSENSOR_DB [91]
9 R2X3 *0.01_1%_4
10 +5V
R2X4 *0_5%_2 TOUCH_EN [9,45]
11 R2X5 *0_5%_2
12 TOUCH_INT# [9,45]
R2X6 *0_5%_2 TOUCH_RST# [9,45] Touch-EMR (I2C)
13 TSN_I2C_SCL_ConceptD R2X7 *0_5%_2
14 TSN_I2C_SCL [6,45]
TSN_I2C_SDA_ConceptD R2X8 *0_5%_2
15 TSN_I2C_SDA [6,45]
16 +3V_Stylus R2X27 *0.01_1%_4
17 +3V
R2X9 **0_5%_2 PEN_FWE_OUT [2]
18 R2X10 *0_5%_2
19 PEN_I2C_SCL [6]
R2X11 *0_5%_2
20 PEN_I2C_SDA [6]
R2X12 **0_5%_2
21 R2X13 **0_5%_2
PEN_PDCT_IN [2] STYLUS-EMR
22 PEN_GPIO0 [8,14]
R2X14 **0_5%_2
C 23 PEN_GPIO1 [9,14] C
R2X15 *0_5%_2
24 PEN_I2C_IRQ [2]
R2X16 *0_5%_2 PEN_RESET [2]
25 +3V_3D_Display R2X17 *0.01_1%_4
26 +3V
USBP4+_3D_Display R2X18 *0_5%_2
27 USBP4-_3D_Display R2X19 *0_5%_2
USBP4+ [10] 3D display
28 USBP4- [10]
29 USBP5+_eye R2X20 *Short_0201
30 USBP5-_eye R2X21 *Short_0201 USBP5+ [10]
31 USBP5- [10]
32 USB32_TX3+_eye C2TA8 0.22u/25V_2
33 USB32_TX3-_eye C2TA9 0.22u/25V_2 USB32_TX3+[10] +3V_AML
34 USB32_TX3-[10] EYE tracker
35 USB32_RX3+_eye R2X24 *Short_0201
36 USB32_RX3-_eye R2X25 *Short_0201 USB32_RX3+ [10]
37 USB32_RX3- [10]
38 +3V_EYE_TRACKER R2X26 *0.01_1%_4 C2X1 C2X2
39 +3V
*0.1u/6.3V_2 **0.22u/6.3V_2
40
For Debug use
42

CN2X1
*196522-40041-3 +SENSOR_POWER_3V +5V_Touch_EMR

B B

C2X3 C2X4 C2X5 C2X6


*0.1u/6.3V_2 **0.22u/6.3V_2 *0.1u/6.3V_2 **0.22u/6.3V_2

D2X13 1 2 **ESD5311Z-2/TR TSN_I2C_SCL_ConceptD


D2X12 1 2 **ESD5311Z-2/TR TSN_I2C_SDA_ConceptD

D2X11 1 2 **ESD5311Z-2/TR USBP4+_3D_Display


D2X10 1 2 **ESD5311Z-2/TR USBP4-_3D_Display +3V_EYE_TRACKER +3V_3D_Display

D2X9 1 2 **ESD5311Z-2/TR USBP5+_eye


D2X8 1 2 **ESD5311Z-2/TR USBP5-_eye

D2X4 1 2 **ESD5311Z-2/TR USB32_TX3+_eye C2X7 C2X8 C2X9 C2X10


D2X5 1 2 **ESD5311Z-2/TR USB32_TX3-_eye *0.1u/6.3V_2 **0.22u/6.3V_2 *0.1u/6.3V_2 **0.22u/6.3V_2

D2X6 1 2 **ESD5311Z-2/TR USB32_RX3+_eye


D2X7 1 2 **ESD5311Z-2/TR USB32_RX3-_eye

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
B LTE DB A1A

Date: Thursday, May 26, 2022 Sheet 97 of 150


5 4 3 2 1
5 4 3 2 1

98
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 98 of 150


5 4 3 2 1
5 4 3 2 1

99
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 99 of 150


5 4 3 2 1
5 4 3 2 1

100
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 100 of 150


5 4 3 2 1
5 4 3 2 1

EMC CAPS
PLACE <4MM FROM SOC VDDQ, WITH EACH PAIR <12MM APART
101
D +VDD2_1.1V_1.2V_SUS D

CV1 CV2 CV3 CV4 CV5 CV6 CV7 CV8 CV9 CV10
2.2p/25V_2 12p/25V_2 2.2p/25V_2 12p/25V_2 2.2p/25V_2 12p/25V_2 2.2p/25V_2 12p/25V_2 2.2p/25V_2 12p/25V_2

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 101 of 150


5 4 3 2 1
5 4 3 2 1

102
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 102 of 150


5 4 3 2 1
5 4 3 2 1

103
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 103 of 150


5 4 3 2 1
5 4 3 2 1

104
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 104 of 150


5 4 3 2 1
5 4 3 2 1

105
D D

C C

B B

A
Quanta Computer Inc. A

PROJECT : ZGN
Size Document Number Rev
A LTE DB A1A

Date: Monday, March 21, 2022 Sheet 105 of 150


5 4 3 2 1
5 4 3 2 1

Option for serch.


Project need to check PM support ADP & show into circuit.
Value use SP@ for BOM build notice.
106
ADP=19V Type C PD=20V
PQ9001 PQ9802
+VAC_IN ADP_EN : Hi -> Vg=19V AONS21357 VADPBL TYPEC1_USB0 AONS32304S TYPEC1_USB0_PD
ADP_EN : Lo -> Vg=6.3V
PJ9001

D
2DC3207-001111F 3 3

S
D 11 NC#1 PIN(+) 1 Vs=19V 2 5 5 2 D
12 NC#2 Spring(-)#1 2 1 1

P4AFC20AS
Spring(-)#2 3

G
1
ADP_ID

PD9000

G
Detect 4
R-[2/26] PR9003

4
Shield2 Shield4 Shield6
Shield1 Shield3 Shield5 2 PQ9000 PC9002 PR9001 *49.9K_1%_2
BSS84 0.1u/50V_4 220K_1%_2 PR9014

2
5
6
7
8
9
10

PR9000 *Short_0201
20K_1%_2
[73] PA_VBUS_C_CTRL

3
PC9000 PC9001
0.1u/50V_4 2200p/50V_4
PR9004
ADP_ID [112] 10K_1%_2 C-[10/25] PR9016 PC9003
DC Jack Contact Sequence ADP_EN : Hi -> Vg=9.5V
For CCG6 VBUS CRTL : *300K_1%_2 *0.1u/50V_4
ADP_EN : Lo -> Vg=19V
C2-[1/5] R-[2/26] HIGH:24.5V~30V
C2-[1/5] PR9007 LOW:0V
1. GND Pin (-) Contact EC_VCC PR9009 220K_1%_2
REF NMOS

3
*Short_0201
2 PQ9004
+3V_LDO_EC
2. PWR Pin (+) Contact PJA138K
PR9010 *0_5%_4
+3VPCU CCG6: Type C Switch

1
3. Signal Pin Contact PA_VBUS_C_CTRL (PQ9802)
R-[2/26] PR9012
100K_1%_2
PR9013
High ON
*Short_0201
[73] ADP_EN Low OFF

C C
ADP Switch
ADP_EN (PQ9001)

Hi ON

Low OFF

Ideal Diode for Type-C Port Ideal Diode for Adapter

to Charger

PQ9006 PQ9007
TYPEC1_USB0_PD AONS21357 +VA AONS21357 VADPBL

D
3 3

S
5 2 2 5
1 1
B ADP_ID Pin Detection with ADP_DET circuit: TYPEC1_USB0_PD VADPBL B

G
G
C2-[1/5]

1
+VAC_IN R-[2/26] R-[2/26]

4
PR9018 PR9028
866K_1%_4 33K_1%_4 PR9022 PD9001 PR9023
*Short_0201 PDZ5.1B *Short_0201
PR9092

2
33K_1%_4
ADP_DET [73]

3
PR9191 PR9021
1M_1%_2 137K_1%_4
PQ9010 2 2 PQ9011
PR9091 Hi>=2V, Lo<0.8V PR9026 BSS84 BSS84 PR9027
3

*Short_0201 47K_1%_2 47K_1%_2


ADP_ID 2 PQ9079
ADP Insert ADP_DET

1
2N7002K PR9031

Q2
3 4 4 3

Q2
R-[2/26] 470K_1%_2
1

PR9093
Y Hi 6 5 5 6
220K_1%_2
1 2 2 1
N Low +VA +VA

Q1

Q1
PR9032 PR9035
100K_1%_2 C-[10/25] PR9033 PQ9012 PQ9013 PR9034 C-[10/25] 100K_1%_2
*Short_0201 MMDT2907A-7-F MMDT2907A-7-F *Short_0201
PR9036 PR9037
R-[2/26] 470K_1%_2 470K_1%_2 R-[2/26]

A A

Vi compare Vo (=PVADPTR)

TYPEC1_USB0 > VADPBL TYPEC1_USB0

TYPEC1_USB0 < VADPBL VADPBL


Quanta Computer Inc.
PROJECT : ZGN
Size Document Number Rev
Custom ADP-IN & TYPE-C A1A

Date: Monday, March 21, 2022 Sheet 106 of 150


5 4 3 2 1
5 4 3 2 1

107

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 107 of 150
5 4 3 2 1
5 4 3 2 1

108

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 108 of 150
5 4 3 2 1
5 4 3 2 1

109

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 109 of 150
5 4 3 2 1
5 4 3 2 1

110

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 110 of 150
5 4 3 2 1
5 4 3 2 1

111
+VAC_IN [106,112]

Dead Battery
TYPEC1_USB0 [73,76,106]

3V_LDO [16,113]
+3V_LDO_EC [86,106,113]
+3VPCU [8,11,45,68,73,74,88,106,112,113,123]
D D

For EC
+VAC_IN TYPEC1_USB0

C-[11/1]
3.56V PJA3411 EOL
PD9600 PD9601
MMBD4148TS MMBD4148TS EC_VSTBY_FSPI +3V_LDO_EC PQ9601 3V_LDO
PR9600 PJA3413 PR9601
PD9602
C
*Short_0402 PU9600 *Short_0402 C
1 5 2 1 1 3
VIN OUT
R-[2/26] 2 R-[2/26] +3VPCU
PC9600 GND PR9603 PC9601 RB521S30
R1

2
1u/25V_4 3 4 18.7K_1%_4 2.2u/10V_4 PR9604 *0_5%_4
PR9602 EN ADJ

IDEA_G_3VLDO
220K_1%_2 AP2204K-ADJTRG1
+3VPCU

PR9605 R2 PR9606
*10K_1%_2 10K_1%_4
PR9608 PR9607 PC9602
3

*Short_0201 220K_1%_2 0.1u/25V_4


2 PQ9602
[86,113] SYS_HWPG PR9609 PR9611 PQ9603 +3V_LDO_EC
2N7002K
R-[2/26] 1M_1%_2 510K_5%_2 MMDT2907A-7-F
VOUT = 1.24V(1+(R1/R2))

Q2
PR9610 3 4
1

1M_1%_2 =3.558V 6 5 PR9612 220K_5%_2

3V_LDO PR9613 1K_1%_21 2 PR9614 220K_5%_2

Q1
B B

+3VPCU PR9615 *1K_1%_2

PU9601 remove.
EE PD IC CYPD6127-48LQXIT(ARXW5FSB000) CYPRESS Integrated high-voltage LDO operational up to 21.5 V for dead battery mode operation.

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom Dead Battery A1A

Date: Monday, March 21, 2022 Sheet 111 of 150


5 4 3 2 1
5 4 3 2 1

PD=3W

112
PQ6000 PQ6010 PQ6011
+VA AONS32310 AONS32310 PR6004 +VIN AONS32310
0.005_1%_2512

D
3 3 3

S
5 2 2 5 5 2
1 1 1

G
G

G
PC6103 PC6104 PR6091 *Short_0201 24780_ACN

4
1000p/50V_4 0.047u/50V_4 PC6098 PC6099 PC6100 PC6101 PC6102
1000p/50V_4 680p/50V_4 0.1u/50V_4 0.1u/50V_4 2200p/50V_4 PC6105
PR6092 *Short_0201 24780_ACP *0.01u/50V_4

R-[2/26]
D D

PR6093 PR6094
4.02K_1%_4 4.02K_1%_4

ADP_ID Pin Detection: PR6095


*Short_0603
C2-[1/5] R-[2/26]
+VAC_IN

PR9030
*Short_0201 BAT-V 24780_ACP
PR9020 24780_ACDET
1M_1%_2
PR9029 24780_ACN

3
*Short_0201

1
ADP_ID 2 PQ9008 PR6096
[106] ADP_ID
2N7002K PC6106 PC6107 PC6108 10_1%_6
PD6010 0.1u/50V_4 0.1u/50V_4 0.1u/50V_4
BAT54CW
1

PR9025

3
220K_1%_2

1
PR6097 24780_CMSRC 3 18 24780_BATDRV

ACP

ACN
10_1%_6 CMSRC BATDRV
17 24780_BATSRC +VIN
BATSRC
24780_ACDRV 4 REGN6V
PR6099 ACDRV
866K_1%_4 28
REGN6V VCC 24 PC6110
PC6109 REGN 2.2u/10V_4
PR6098 1u/25V_4 PC6111 PC6112
137K_1%_4 PU6002 2200p/50V_4 22u/25V_8
C
BQ24780SRUYR PR6101 C
PR6100 *Short_0603
100K_1%_2 24780_ACDET 6 25 24780_BST PQ6012
ACDET BTST

5
PC6113 0.01u/50V_4 AONR36326C
PR6102 *Short_0201 5 R-[2/26] PC6114 D
[86] ACIN ACOK 0.047u/50V_4
MBDATA PR6103 *Short_0201 11
SDA HIDRV
26 24780_DH 4 G PD=3W
S
PR6104 MBCLK PR6105 *Short_0201 12 PL6002 PR6005 BAT-V
V_PMON*2=K*Total_R SCL

1
2
3
100K_1%_2 4.7uH/5.5A_7x7x3 0.005_1%_2037
ICMNT PR6106 *Short_0201 7 Isat=10A,DCR(max)=40mohm
1.6V*2=1uA*Total_R [86] ICMNT
IDCHG_R PR6107 *Short_0201 8
IADP
PHASE
27 24780_LX 1
PCMC063T-4R7MN
2

[86] IDCHG_R IDCHG


PMON PR6108 *Short_0201 9 PQ6013
PMON

5
[141] PMON AONR32320C PR6109
R-[2/26] C-[10/25] D *4.7_5%_6 R-[2/26] R-[2/26]
PC6115 PC6117 PC6116 PC6118 PC6119 PC6120 PC6121 PC6122
PR6110 *100p/50V_2 100p/50V_2 100p/50V_2 23 24780_DL 4 G PR6111 PR6112 2200p/50V_4 22u/25V_8 22u/25V_8 *22u/25V_8 *22u/25V_8
LODRV S *Short_0201 *Short_0201
*20K_1%_4

1
2
3
PR6113 10K_1%_2 24780_BM# 16
+3VPCU TB_STAT 24780_SRP
PC6124 PC6123
PR6114 10K_1%_2 24780_CMPOUT 14 0.1u/25V_2 *680p/50V_6
CMPOUT 20 24780_SRP 24780_SRN
PR6115 316K_1%_4 24780_ILIM 21 SRP
ILIM
24780_CMPIN 13 PC6125
CMPIN REGN MAX voltage 6.5V

PROCHOT
0.1u/25V_2

BATPRES
PC6126 19 24780_SRN
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr

GND#1
GND#2
0.1u/50V_4 PR6116 PC6127 PR6117 SRN
100K_1%_2 0.01u/50V_4 100K_1%_2 PC6128
0.1u/25V_2
=0.793V for 7.93A current limit
PC6129

10

15

22
29
+3VPCU
PJ6002
*100p/50V_4 ILIM=0.793V
B 50458-01001-V02 Rsr =5m-ohm B
PR6120
BAT-V +VIN PR6118 *Short_0201
*102K_1%_4 TEMP_MBAT#
12 PR6123 PR6125
BI [86]
R-[2/26] 10K_1%_2 C-[11/1] *Short_0201
10

1
PR6119 *0_5%_4 PR6121 PJA3411 EOL
9 IDCHG_R H_PROCHOT# [4,13,73,86,141]
Double Check if BI pin PU Low *0_5%_2
8 2 PQ6014 R-[2/26]
7 TEMP_MBAT#_Conn TEMP_MBAT#
PR6124 100_5%_2 PR6122 PJA3413
6 MBCLK_Conn TEMP_MBAT#[86]
*0_5%_4
5 MBDATA_Conn PR6126
4

3
1M_1%_2
3 +3VPCU 2
2
PQ6015
1
PR6127 PR6128 2N7002KW
11 100_5%_2 100_5%_2 PR6129

1
100K_1%_2
1

PC6130 PD6011 PD6012


PC6131
*47p/50V_4 PDZ5.6B PDZ5.6B *47p/50V_4 +3VPCU
PR6130 *0_5%_2
2

24780_CMPOUT

MBCLK [86]
PR6131 PR6132
MBDATA [86] 10K_1%_2 C-[11/1] *Short_0201

1
PJA3411 EOL
GPU_THROTTING# [32,73]
2 PQ6016 R-[2/26]
PJA3413
A A

3
2
PQ6017
2N7002KW
PR6133

1
100K_1%_2
Quanta Computer Inc.
PR9832 PROJECT : ZGN
*0_5%_2
BC_PCH_THROTTING# [13] Size Document Number Rev
Custom Charger (BQ24780S) A1A

Date: Monday, March 21, 2022 Sheet 112 of 150


5 4 3 2 1
5 4 3 2 1

+VIN [16,45,112,114,123,127,131,141,142,143,144,145,146] R-[2/26] +VIN


+5VPCU [68,73,79,81,87,93,123]

113
PR3044
+3VPCU [8,11,45,68,73,74,88,106,111,112,123] *Short_0603
SYS_SHDN# [4,86,123]
3V_LDO [16,111]
+3VPCU VL PJ3004
3V_LDO *short3720
[86,111] SYS_HWPG
R-[2/26]
SYS_SHDN# R-[2/26]

R-[2/26] PR3046 PR3045


+VIN *Short_0201 10K_1%_2
R-[2/26]
PJ3003 PC3063 PC3064 PC3065
+ *short3720 PR3047 PR3048 PC3068 PC3069 PC3070 0.1u/50V_4 2200p/50V_4 10u/25V_6
D PC3066 PC3062 PC3060 PC3061 *Short_0201 10K_1%_2 4.7u/6.3V_4 0.1u/50V_4 4.7u/6.3V_4 D
33u/25V_7343H1.9 2200p/50V_4 0.1u/50V_4 10u/25V_6 C-[10/25] C-[10/25]

51225_VIN
+3VPCU
3.3 Volt +/- 5% +3VPCU
+5VPCU TDC : 9A
+5VPCU 5 Volt +/- 5% PR3049
100K_1%_2 PQ3003 PEAK : 12A

13

12
TDC : 11.8A

3
PQ3002 AONY36356 OCP : 17.4A

2
AONY36356
PEAK : 15.74A Width : 360mil

VIN
VREG5

VREG3
2

D1
D1
D1
OCP : 18.5A 7 6 SYS_SHDN#

D1
D1
D1
PGOOD EN2 PJ3006
Width : 480mil 51225_EN1 20
EN1 DRVH2
10 51225_DH2 PL3003 *short3720
PJ3005 PL3002 PR3050 PC3071 1 G1 1.5uH/9A_7x7x3 R-[2/26]
*short3720 2.2uH/13A_10x10x3 G1 1 51225_DH1 16 9 51225_VBST2 Isat=18A,DCR=14mohm
R-[2/26] DRVH1 VBST2 S1/D2 9 51225_SW2 1 2
Isat=16A,DCR=8mohm
1 2 51225_SW1 9 S1/D2 PR3051 51225_VBST1 17 8 51225_SW2 1_1%_6 0.1u/50V_4
PC3072 1_1%_6 VBST1 PU3005 SW2
R-[2/26] R-[2/26] 0.1u/50V_4 51225_SW1 18 RT6575AGQW 11 51225_DL2 8 G2 PR3055
PR3054 G2 8 SW1 DRVL2 *4.7_5%_6 R-[2/26] +
PR3052 PR3053 *4.7_5%_6 51225_DL1 15 4 51225_FB2 PC3076
*Short_0201 *Short_0201 DRVL1 VFB2 PR3056 150u/6.3V_3528H1.9

S2
S2
S2
51225_FB1 2 21 *Short_0201

S2
S2
S2
+ VFB1 GND#1

7
6
5
PC3073 PC3074 14 22 PC3077

GND#6

GND#5

GND#4

GND#3
5
6
7
VO1 GND#2

VCLK
150u/6.3V_3528H1.9 0.1u/50V_4 PC3078 *680p/50V_6 PC3075

CS1

CS2
*680p/50V_6 0.1u/50V_4

PR3057
Rds(on)=4.7m ohm Rds(on)=4.7m ohm

19

26

25

24

23
15.8K_1%_2 PR3058
6.49K_1%_2

51225_CS1

51225_CS2
C C
PR3059
10K_1%_2

PR3061
OCP:18.5A (For BAT 4S1P) PR3062 PR3063 OCP:17.4A (For BAT 4S1P) 9.31K_1%_2
L(ripple current) 60.4K_1%_4 56.2K_1%_4 L(ripple current)
=(12-5)*5/(2.2u*0.3M*12) =(12-3.3)*3.3/(1.5u*0.355M*12)
=4.419A ~4.493A
Iocp=18.5-(4.419/2)=16.29A Iocp=17.4-(4.493/2)=15.15352A
Vth=(16.29A*4.7mOhm)+1mV=76.56mV Vth=(15.15352A*4.7mOhm)+1mV=71.222mV
R(Ilim)=(76.56mV*8)/10uA R(Ilim)=(71.222mV*8)/10uA
~60.45K
Power Auto Recovery =56.177K
(Stuff on Dead Battery page)
3V_LDO PR3064 +3V_LDO_EC
*0_5%_6
+3V_LDO_EC +5V_S5 [87,88,89,114,126,127,130,131,141,142,143,144]
+3V_LDO_EC [86,106,111] +5V [49,64,87,89,93,97,123]
+3VPCU PR3065 +3V_S5 [13,16,19,20,45,61,74,86,87,88,89,91,96,123,124,126,129,131,144,146]
*0_5%_6 +3V [2,6,9,11,12,15,21,29,32,44,45,48,53,55,61,64,68,74,86,87,88,91,93,96,97,114,123,126,130,131,141,144]

+3V +3VPCU +3VPCU +3V_S5


+5V_S5 +5VPCU +5VPCU +5V

PC3082 PC3083
B
TDC : 5.63A PC3079 PC3080 PJ3012 TDC : 1.68A TDC : 4.68A 1u/25V_4 1u/25V_4 PJ3013 TDC : 4.5A B
PEAK : 7.5A PJ3014
*short3720
1u/25V_4 1u/25V_4 *Short_0805
R-[2/26]
PEAK : 2.24A PEAK : 6.24A PJ3015
*short3720
*short3720
R-[2/26]
PEAK : 6A
Width : 100mil Width : 220mil Width : 140mil PU3007
Width : 240mil
2
1

6
7

2
1

6
7
R-[2/26] R-[2/26]
VIN1#2
VIN1#1

VIN2#1
VIN2#2

VIN1#2
VIN1#1

VIN2#1
VIN2#2
PC3087 PC3088 PC3089 PC3090
PC3084 PC3081 14 9 PC3085 PC3086 10u/6.3V_4 0.1u/50V_4 14 9 0.1u/50V_4 10u/6.3V_4
10u/6.3V_4 0.1u/50V_4 13 VOUT1#2 VOUT2#2 8 0.1u/50V_4 10u/6.3V_4 13 VOUT1#2 VOUT2#2 8
VOUT1#1 PU3006 VOUT2#1 VOUT1#1 VOUT2#1
JW7110DFNC_TRPBF JW7110DFNC_TRPBF
+5VPCU 4 11 +5VPCU 4 11
VBIAS GND VBIAS GND
R-[2/26] PR3076 PC3091 15 R-[2/26] PR3083 PC3094 15
*Short_0201 0.1u/50V_4 EPAD PR3081 R-[2/26] *Short_0201 0.1u/50V_4 EPAD PR3085 R-[2/26]
*Short_0201 *Short_0201
S5_ON 3 5 MAINON MAINON 3 5 S5_ON
[86,123] S5_ON EN1 EN2 EN1 EN2
SS1

SS2

SS1

SS2
MAINON [86,114,123,124,144]
R-[2/26] PR3080 R-[2/26] PR3084
*Short_0201 PC3092 PC3093 *Short_0201 PC3097 PC3098
12

10

12

10
*0.1u/50V_4 *0.1u/50V_4 *0.1u/50V_4 *0.1u/50V_4

PC3095 PC3096 PC3099 PC3100


1000p/50V_2 1000p/50V_2 1000p/50V_2 1000p/50V_2

+VIN +3V_SUS +VIN +3VPCU +VIN +3V_S5

PR310 PR297 PR304


A A
1M_5%_6 22_5%_8 1M_5%_6 PR3086 PR3087
*1M_5%_6 *22_5%_8
3

SUSD PQ74
3

SUSD 2 AOSS32334C

S5_ON
Quanta Computer Inc.
3

2 PR311 2
[21,22,86,114,123,144,146] SUSON 2 2 2
1M_5%_6 PR3088 PQ3006
1

PC221 TDC : 0.05A *1M_5%_6 *2N7002K


PQ34 PQ30 PQ33 *2200p/50V_4 PEAK : 0.1A PQ3005 PROJECT : ZGN
1

DDTC144EUA-7-F 2N7002K 2N7002K *DDTC144EUA-7-F


1

Width : 20mil Size Document Number Rev


+3V_SUS [78,80] Custom SYSTEM 5V/3V (TPS51225R) A1A

Date: Monday, March 21, 2022 Sheet 113 of 150


5 4 3 2 1
5 4 3 2 1

+VIN [16,45,112,113,123,127,131,141,142,143,144,145,146]
+VDD2_1.1V_1.2V_SUS [3,5,101,131]

114
+3V [2,6,9,11,12,15,21,29,32,44,45,48,53,55,61,64,68,74,86,87,88,91,93,96,97,113,123,126,130,131,141,144]

+3V +5V_S5 [87,88,89,113,126,127,130,131,141,142,143,144]

PR4000
D 100K_1%_2 D
S3 S5 VDDQ VTTREF VTT
R-[2/26]
PR4001 *Short_0201 S0 1 1 ON ON ON
[12,86] HWPG_VDDR

PR4128 *0_5%_2 S3 (mainon off) 0 1 ON ON OFF


[12,146] SLP_DRAM#
PR4127 *0_5%_2
[12,16,21,22,86,146] SUSC# +VIN
PR4003 *Short_0201
[21,22,86,113,123,144,146] SUSON
R-[2/26]
S4/S5 0 0 OFF OFF OFF
PC4000
OCP=13.86A
*0.1u/50V_4
PR4004 PJ4001
422K_1%_2 *short3720
R-[2/26] +VDD2_1.1V_1.2V

1P35V_PGOOD
[86,113,123,124,144] MAINON
PR4005 *0_5%_2 PR4006
499K_1%_4
1.116 Volt +/- 5%

1P35V_CS
TDC : 5.35A

1P35V_S3

1P35V_S5
1P35V_TON +VDD2_1.1V_1.2V_VIN
PR4002 PC4001
PEAK : 7.13A
Option 100K_1%_2 *0.1u/50V_4 Fsw=500KHz
OCP : 14.285A
PC4002 PC4003 PC4004 PC4005 PC4006
+VDDQ / +VDDQ_VTT no use on DDR5 0.1u/50V_4 10u/25V_8 10u/25V_8 2200p/50V_4 0.1u/50V_4 Width : 220mil

10

13
C C

9
PGOOD

TON
CS
S3

S5
+VDDQ_VTT +VDD2_1.1V_1.2V_SUS
PQ4000

5
20 AONR32320C
VTT 17 1P35V_UGATE
UGATE
D
2 G
PC4007 VTTSNS PR4008 PC4008 4
10u/6.3V_4 18 1P35V_BOOT S PL4001
1 BOOT 1uH/11A_7x7x3 R-[2/26]

1
2
3
VTTGND 2.2_5%_6 0.1u/50V_4 Isat=22A,DCR(max)=10mohm
+VDDQ PU4000 16 1P35V_PHASE 1 2

*330u/2V_7343H1.9
G5619RZ1U PHASE
PCMC063T-1R0MN

5
4 15 1P35V_LGATE
VTTREF LGATE +

PC4009

PC4010

PC4011

PC4012

PC4013

PC4015
D

0.1u/50V_4

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
19 12 1P35V_VDD G
VLDOIN VDD +5V_S5
PC4014 4 PR4011 PR4012
0.033u/10V_4 PR4010 S *4.7_5%_6 *Short_0201
PC4017 *Short_0201

1
2
3
*10u/6.3V_4 PC4018 R-[2/26] PQ4001
PGND

VDDQ
1u/6.3V_2 AONR36326C
GND

PAD
VID

PC4019
FB
+VDD2_1.1V_1.2V_SUS
*680p/50V_6
B B
3

11

14

21
R-[2/26]
PR4014 Rds(on)=15.9m ohm
1P35V_VID

1P35V_FB

*Short_0201

1P35V_VDDQ
+5V_S5 PR4016
*0_5%_2
PR4017 R1
*Short_0201 PR4018
R-[2/26] 8.06K_1%_2

OCP_RTK=14.4A [RTK] VID Ref. Voltage


Vo=0.75*(1+R1/R2)
PR4020
L ripple current R2 15.8K_1%_2
=(12-1.116364)*1.116364/(1u*499k*12) =2.029A High 0.675V C-[10/25] VID Vout
Vtrip=14.285-(2.029/2)*15.9mohm=211.0mV
R1 R2
Rlimit=211.0mV/5uA*10=422Kohm 8.2K_1%_2 10K_1%_2
Low 0.75V High CS28201FE00 CS31001FE14
1.2285V
GMT_current limit=200mV
Low 8.06K_1%_2 15.8K_1%_2 1.116V
OCP_GMT=(200mV/15.9mohm)+(2.029/2)=13.59A [GMT] CS28061FE00 CS31581FE00 Default
A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom DDR4_+VDD2_1.1V_1.2V (G5619RZ1U) A1A

Date: Monday, March 21, 2022 Sheet 114 of 150


5 4 3 2 1
5 4 3 2 1

115

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 115 of 150
5 4 3 2 1
5 4 3 2 1

116

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 116 of 150
5 4 3 2 1
5 4 3 2 1

117

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 117 of 150
5 4 3 2 1
5 4 3 2 1

118

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 118 of 150
5 4 3 2 1
5 4 3 2 1

119

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 119 of 150
5 4 3 2 1
5 4 3 2 1

120

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 120 of 150
5 4 3 2 1
5 4 3 2 1

121

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 121 of 150
5 4 3 2 1
5 4 3 2 1

122

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 122 of 150
5 4 3 2 1
5 4 3 2 1

+1.8V_S5 +VCC1P8_PROC
+1.8V_S5 PJ4012
1.8Volt +/- 5% *0.01_1%_6

123
+1.8V_S5
TDC : 1.83A +1.8V_S5
+3V_S5
PC4060 PR4055
PEAK : 2.44A
2200p/50V_4 2.2_5%_6 Width : 80mil

3
R-[2/26] PJ4006
PR4057 PU4005 PL4005 *Short_0805 MAIND 2 PQ4003
100K_1%_2 PR4060 1uH/3.7A_2.5x2.0x1.2 R-[2/26] AOSS32334C +3VPCU +VCC1P8_PROC_R +VCC1P8_PROC
*Short_0201 Isat=3.8A,DCR=43mohm
5213PG_1.8V 2 6 5213LX_1.8V 1 2 PJ4013
TDC : 0.08A

1
[86,144] HWPG_1.8VS5 POK SW 5213FB_1.8V_S PU4010 *Short_0603
1 5 PEAK : 0.1A

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
0.1u/6.3V_2
3 5 PR4061 VIN VOUT

PC4066

PC4067

PC4068

PC4069
D
+3V_S5 VIN NC *Short_0201
+1.8V
3
EN
R-[2/26] Width : 5mil D
PJ4015 PC4065 PR4062 R-[2/26] PC4128 PC4129 2 PC4130
*Short_0805 1 5213FB_1.8V 22p/50V_2
R1 20K_1%_4 TDC : 0.08A 0.01u/50V_4 10u/6.3V_4 4 GND 1u/6.3V_2
FB NC
R-[2/26]
PC4071 PC4072
4
8 PGND PEAK : 0.1A AP2121AK-1.8TRG1
0.01u/50V_4 10u/6.3V_4 9 SGND
EPAD EN
7 5213EN_1.8V Width : 5mil [16] VCC1P8_CPU_EN
PR4064
JW5213DFND#TRPBF PC4073 PC4131
0.1u/6.3V_2
R2 10K_1%_2 Vo=0.6*(R1+R2)/R2 0.1u/6.3V_2
=1.8V

PR4112 *0_5%_2

+3VPCU PR4067 +VCC1.05_OUT_FET


*0_5%_2 R-[2/26]
+3V_S5

5
1
4 S5_ON [86,113] TDC : 0.63A PC4132 PC4133
+3V_S5 [13,16,19,20,45,61,74,86,87,88,89,91,96,113,124,126,129,131,144,146]
+1.8V_S5 [13,86]
2 SLP_SUS#_EC [12,16,21,22,86] PEAK : 0.84A 10u/6.3V_4 10u/6.3V_4
+1.8V [15,21,22,31,45,64,86,91]
+3V [2,6,9,11,12,15,21,29,32,44,45,48,53,55,61,64,68,74,86,87,88,91,93,96,97,113,114,126,130,131,141,144]
PU4012 Width : 30mil

7
M74VHC1GT08DFT2G
VL [113] +VCC1P05_PROC +VCC1P05_PROC

VIN1#1

VIN1#2

VIN2#1

VIN2#2
+VIN [16,45,112,113,114,127,131,141,142,143,144,145,146]
+5V [49,64,87,89,93,97,113]

13 R-[2/26]
PC4134 PC4135 14 VOUT1#1 8
10u/6.3V_4 0.1u/16V_4 VOUT1#2 OUT2#1 9
R-[2/26] PU4011 OUT2#2
JW7110DFNC_TRPBF
4 11
+5VPCU VBIAS GND#1
C PC4136 15 C
0.1u/16V_4 GND#2
R-[2/26] +1.2VSUS
PJ4016 For USB3.0 retimer: 1.2Volt +/- 5% [16] VCC1P05_EN_LS_R
3
ON1 ON2
5 VCC1P05_EN_LS_R

CT1

CT2
*Short_0603
+3V_S5
TDC : 0.6A +1.2VSUS R-[2/26]
+3V PC4137
PEAK : 0.8A

12

10
*0.1u/16V_4
PC4074 Width : 20mil
4.7u/6.3V_4 PC4138 PC4161
PJ4007 1000p/50V_2 1000p/50V_2
PR4068 R-[2/26] PU4006 PL4006 *short3720
4

100K_1%_2 PR4069 JW5222RSOTB_TRPBF 2.2uH/1.85A_2.5x2.0x1.2 R-[2/26]


*Short_0201 Isat=2.15A,DCR=80mohm
VIN

5 3 G5719LX1.5V 1 2
POK SW
R-[2/26]
R-[2/26] PC4075
1 2 PR4070 10u/6.3V_4
[21,22,86,113,114,144,146] SUSON EN GND *Short_0201
PR4071 PC4076
FB

*Short_0201 PC4077 PC4078 0.1u/16V_4


0.47u/6.3V_2 PC4079 10u/6.3V_4
6

22p/50V_2

R1
PR4073
15K_1%_4
PR4074
R2 15K_1%_4
Vo=(0.6(R1+R2)/R2)
=1.2V

B B

Thermal protection
(1) Need fine tune
PR4072
150_5%_4
for thermal protect point
VL (2) Note placement position
PC4080 TEMP=95.5'C
0.1u/16V_4
5

R-[2/26]
VCC

3 SYS_SHDN#
OT SYS_SHDN# [4,86,113]
PU4007 PR4075
PR4076 TMP708AIDBVR *Short_0201
18.2K_1%_4
1
SET +VIN +1.8V +VIN
HYST

+3V +5V
GND

Rset(Kohm)=0.0012T*T-0.9308T+96.147
2

=29.4K ohm HYST=VCC for 10 PR4077 PR4078 PR4079 PR4080 PR4083


degree Hys. 1M_5%_6 22_5%_8 *220_5%_8 22_5%_8 1M_5%_6
C2-[12/3] Follow ZGF HYST=GND for 30
A
degree Hys. PQ4004 MAINON_ON_G MAIND A
3

DDTC144EUA-7-F

2
3

[86,113,114,124,144] MAINON 2 2 2 2 3

PR4085 PR4084 PQ4005 PQ4006 PQ4007 PQ4009 PC4081


1

*100K_1%_6 1M_5%_6 2N7002K 2N7002K 2N7002K 2N7002K *2200p/50V_4


1

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
C +1.8V_S5/1.2V /Thermal A1A

Date: Monday, March 21, 2022 Sheet 123 of 150


5 4 3 2 1
5 4 3 2 1

124
+3V_S5 [13,16,19,20,45,61,74,86,87,88,89,91,96,113,123,126,129,131,144,146]
+VNN_EXT [13]
+1.05V_EXT [13] +VNN_EXT
PJ1005
*Short_0603
1.05 / 0.76 Volt +/- 5%
+3V_S5
659SVIN_VNN PEAK : 0.5A
PR1438 PC1467 +VNN_EXT
R-[2/26] VNN@2.2_5%_6 VNN@2200p/25V_2 Width : 40mil
PC1465 PC1466 SN_VNN
D VNN@0.01u/50V_4 VNN@10u/6.3V_4 D
PJ1006
PU1023 PL1020 VNN@0_5%_8

5
+3V_S5 PR1439 VNN@10K_1%_2 VNN@SYV659LQWC VNN@1uH/3.7A_2.5x2.0x1.2
Isat=3.8A,DCR=43mohm

IN
+VNN_EXT_PWRGD PR1440 659PG_VNN 3 6 659LX_VNN 1 2 +VNN_EXT_SRC
*Short_0201 PG LX
PR1441 *0_5%_2 659EN_VNN 2

VNN@22u/6.3V_6

VNN@10u/6.3V_4
VNN@0.1u/6.3V_2
[86] VNN_V105_EN EN

PC1469

PC1470

PC1471
[86,124,144] VCCIN_AUX_PG PR1483 VNN@0_5%_2 PC1472
PC1468 VNN@470p/25V_2 PR1442
R-[2/26] VNN@0.1u/6.3V_2 1 *Short_0201
FB
4 659FB_VNN R-[2/26]

GND
MODE
659MODE_VNN R2 PR1443 R1
+3V_S5 VNN@3K_1%_2
VNN=0.6*(R1+R2)/R2

VNN@10K_1%_2
VNN@6.49K_1%_2
PR1445

PR1446
PR1444 MAINON=H 0.78V
VNN@1K_1%_4
PR1447 PR1448
*0_5%_2 VNN@10K_1%_2 MAINON=L 1.05V
659MODE_VNN_1

3
VNN_CTRL_R
C +3V_DEEP_SUS C
MAINON [86,113,114,123,124,144] 5

6
PC1473 PR1449 R-[2/26] PQ1003A PC1490 *0.1u/6.3V_2
VNN@100p/50V_2 *Short_0201 VNN@2N7002KDW

4
659MODE_VNN_3 2

5
PR1450 PQ1003B 1 VNN_CTRL [13]
PR1451 VNN@1K_1%_4 PR1452 VNN@2N7002KDW VNN_CTRL_R 4

1
VNN@1M_1%_2 PC1474 VNN@1M_1%_2 2 SUSB# [12,16,86]
VNN@1000p/50V_2
C-[10/25] C-[10/25] PU1025

3
*NL17SZ08DFT2G

PJ1007
*Short_0603 +1.05V_EXT
+3V_S5
659SVIN_105
PR1453 PC1477
1.05Volt +/- 5% +1.05V_EXT
R-[2/26] VNN@2.2_5%_6 VNN@2200p/25V_2 PEAK : 0.5A
PC1475 PC1476 SN_105
VNN@0.01u/50V_4 VNN@10u/6.3V_4 Width : 40mil
PJ1008
PU1024 PL1021 VNN@0_5%_8
5

B +3V_S5 PR1454 VNN@10K_1%_2 VNN@SYV659LQWC VNN@1uH/3.7A_2.5x2.0x1.2 B


Isat=3.8A,DCR=43mohm
IN

PR1455 659PG_105 3 6 659LX_105 1 2 +1.05V_EXT_SRC


[86] +1.05V/VNN_EXT_PG PG LX
*Short_0201
+VNN_EXT_PWRGD PR1456 *0_5%_2 659EN_105 2
EN

VNN@10u/6.3V_4
VNN@22u/6.3V_6
VNN@0.1u/6.3V_2
PC1479

PC1481
PC1480
[86,124,144] VCCIN_AUX_PG PR1484 VNN@10K_1%_2 PC1482
PC1478 VNN@22p/50V_2 PR1457
R-[2/26] VNN@0.1u/6.3V_2 1 *Short_0201
FB
4 659FB_105 R-[2/26]
GND

MODE
659MODE_105 PR1458
VNN@40.2K_1%_2
+3V_S5
R2 R1
VNN@6.04K_1%_2

VNN@10K_1%_2
+1.05V_EXT=0.6*(R1+R2)/R2
7

PR1459

PR1460
PR1461
VNN@1K_1%_4 MAINON=H 0.96V
PR1462 PR1463
VNN@0_5%_2 VNN@10K_1%_2
659MODE_105_1

V1P05_CTRL [13] MAINON=L 1.05V


MAINON [86,113,114,123,124,144] 5
6

PC1483 PR1464 PQ1004A


A VNN@100p/50V_2 *0_5%_2 VNN@2N7002KDW A
4

659MODE_105_3 2

PR1465 PQ1004B Quanta Computer Inc.


PR1466 VNN@1K_1%_4 PR1467 VNN@2N7002KDW
PROJECT : ZGN
1

VNN@1M_1%_2 PC1484 VNN@1M_1%_2


VNN@1000p/50V_2
C-[10/25] C-[10/25] Size Document Number Rev
Custom +VNN_EXT & +1.05V_EXT (SYV659LQWC) A1A

Date: Monday, March 21, 2022 Sheet 124 of 150


5 4 3 2 1
5 4 3 2 1

125

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 125 of 150
5 4 3 2 1
5 4 3 2 1

+VIN_VGACORE [127,130] +1.8V_AON [25,26,30,31,32,35,38,39,40,41,45,48,130,131]


NVVDD [34,127]
+5V_S5 [87,88,89,113,114,127,130,131,141,142,143,144]
+3VPCU [8,11,45,68,73,74,88,106,111,112,113,123]
+3V [2,6,9,11,12,15,21,29,32,44,45,48,53,55,61,64,68,74,86,87,88,91,93,96,97,113,114,123,130,131,141,144]
126
VGA Core - NVVDD
R-[2/26]
PR7002 EV@4.7K_1%_2 +5V_S5
+3V
PR7004 *Short_0201
D [32,86] MBDATA1_GPU D

+3V PR7001 EV@4.7K_1%_2 PR7003


EV@2_1%_6
PR7007 *Short_0201
[32,86] MBCLK1_GPU
Place close to
PR7009 *Short_0201 PR7008
[31] NVVDD_CORE1_EN
EV@1K_1%_2 GPU pins
+1.8V_AON PR7005 EV@10K_1%_2

PR7010 EV@0_5%_2 PC7001 PR7011


[32] NVVDD_PSI
EV@2.2u/10V_4 EV@51_1%_2
C-[11/1] PR7006 EV@10K_1%_2
DNP PR7000 since PR7013
RG182 double pull-high PR7000 *EV@10K_1%_2 *Short_0201
+3V_S5
VSS_GPU_SENSE [34]
[29,31] NVVDD_PGOOD PR7012 *Short_0201 PR7015
R-[2/26] EV@51_1%_2
[32] NVVDD_PWM_GPU PR7014 *Short_0201 PC7002 NVVDD
EV@1000p/50V_4 PR7017
R-[2/26] *Short_0201
VGPU_CORE_SENSE [34]
PC7000 PR7016 R-[2/26]
*EV@4700p/25V_2 EV@6.19K_1%_2
PR7018
EV@4.32K_1%_2
PR7019
EV@20.5K_1%_2

40

39

38

37

36

35

34

33

32

31
PR7020 PR7021 PC7003 PC7004 PR7022

PSI

SCL
VID_BUFF

SDA

VSP
PWM_VID

PGOOD

EN

VCC

VSN
EV@309_1%_2 EV@16.5K_1%_2 EV@47p/50V_2 EV@330p/25V_2 EV@49.9_1%_2
610_VREF
C C
PC7005 PC7007 610_REFIN 1 30 PC7006 PR7023 PR7024
EV@4700p/25V_2 EV@0.01u/50V_4 REFIN COMP EV@2200p/25V_2 EV@3.3K_1%_2 EV@1K_1%_2
PR7025 EV@1K_1%_4 610_VREF 2 29
+VIN_VGACORE VREF FB
PC7371 EV@0.01u/50V_4 3 28
VRAMP DIFF
4 27 PR7026
PWM8/SS FSW EV@16.9K_1%_2 PC7009 EV@1000p/25V_2
5
PU7000 26 610_TMON
PWM7/I2C TMON 610_TMON [127]
6
EV@NCP81610MNTXG 25 PR7028 EV@20.5K_1%_4
PWM6/LPC1 IOUT R-[2/26]
7 24 610_ILIM PR7029 610_TMON
[127] 610_PWM5 PWM5/LPC2 ILIM EV@61.9K_1%_2 R-[3/29] OCL 66.67A
8 23 PR7027
[127] 610_PWM4 PWM4/PHTH1 CSCOMP *Short_0201
9 22
[127] 610_PWM3 PWM3/PHTH2 CSSUM

PWM1/PHTH4
10 21 PR7030
[127] 610_PWM2 PWM2/PHTH3 CSREF EV@232K_1%_4
EV@26.1K_1%_2

EV@54.9K_1%_2

EV@54.9K_1%_2

EV@5.36K_1%_4

EV@8.87K_1%_4

EV@12.1K_1%_2

PC7010

DRON
EV@10K_1%_2

CSP8

CSP7

CSP6

CSP5

CSP4

CSP3

CSP2

CSP1
EV@0.01u/50V_4
PR7031

PR7032

PR7033

PR7034

PR7035

PR7036

PR7037

41 PC7011
EPAD EV@100p/50V_4
11

12

13

14

15

16

17

18

19

20
610_VREF

PR7038 EV@309_1%_4

PC7012 EV@100p/50V_4 +5V_S5


B [127] 610_PWM1 B
R-[2/26] PR7039 EV@309_1%_4 PR7040
PR7041 [127] 610_DRON PR7042 *Short_0201 EV@140_1%_4
EV@15.4K_1%_2 PC7013 EV@100p/50V_4

PC7015 PR7044 EV@309_1%_4 PR7043 PR7045 EV@110K_1%_4 610_CSP1 [127]


EV@2200p/25V_2 *EV@0_5%_2
PC7014 EV@100p/50V_4

PR7046 EV@309_1%_4 PR7047 EV@110K_1%_4 610_CSP2 [127]


PR7049
PC7016 EV@100p/50V_4 EV@261_1%_4

PR7048 EV@309_1%_4 PR7050 EV@110K_1%_4 610_CSP3 [127]


PC7017 EV@100p/50V_4
GN20-E3 Max-P(115W) 5Φ
PR7053 EV@110K_1%_4
GN20-E5 Max-P(115W) 5Φ PR7054
610_CSP4 [127]

GN20-E7 Max-P(115W) 5Φ +5V_S5


EV@2K_1%_2
PR7056 EV@110K_1%_4 610_CSP5 [127]
PR7057
NVVDD +5V_S5
EV@2K_1%_2
EDP-Continous:123A PR7063
610_CSREF [127]
EDP-Peak:300A +5V_S5 PR7060 *EV@2K_5%_2
EV@2K_1%_2
OCP:370A +5V_S5
610_CSREF
610_CSP5

610_CSP4

610_CSP3

610_CSP2

610_CSP1

PR7065
A GN20-E6 Max-Q(115W) 5Φ *EV@0_5%_2 PR7064 A
3

*EV@0_5%_2
GN20-E8 Max-Q(115W) 5Φ PC7021
Cathod

*EV@1u/10V_2
1
NC#1
Anode

4
NVVDD REF
EDP-Continous:103A
PR7066
*EV@0_5%_2
NC#2
2
Quanta Computer Inc.
PD7000
EDP-Peak:287A PROJECT : ZGN
5

*EV@TL431QDBVR
OCP:370A Size Document Number Rev
Custom +VGPU (NCP81610) A1A

Date: Tuesday, March 29, 2022 Sheet 126 of 150


5 4 3 2 1
5 4 3 2 1

+VIN_VGACORE [126,130]
NVVDD [34,126]
+5V_S5 [87,88,89,113,114,126,130,131,141,142,143,144]
127
+VIN_VGACORE PR7067 +VIN +VIN_VGACORE
EV@0.005_1%_2037

+VIN_VGACORE +VIN_VGACORE

PC7022 PC7031

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6
EV@0.1u/50V_4

EV@0.1u/50V_4
EV@2200p/50V_4

EV@2200p/50V_4
EV@2.2u/10V_4 + EV@2.2u/10V_4

PC7023

PC7024

PC7026

PC7027

PC7028

PC7029

PC7032

PC7033

PC7034

PC7035

PC7036

PC7037
PC7025 PC7030
D D
PR7068 EV@18p/25V_2 R-[2/26] R-[2/26] EV@33u/25V_7343H1.9 PR7071
EV@2_1%_4 EV@2_1%_4
PR7069 PR7070
+5V_S5 *Short_0201 *Short_0201 +5V_S5
R-[2/26] R-[2/26] R-[2/26]

PC7038 PU7001 NVVDD_SENSE_V [129] PC7039 PU7002


EV@2.2u/10V_4 EV@NCP303150MNTWG EV@2.2u/10V_4 EV@NCP303150MNTWG

25
30

25
30
NVVDD_SENSE_I [129]

3
PR7072 PR7073
EV@4.7_1%_6 EV@4.7_1%_6

VIN#1
VIN#2

VIN#1
VIN#2
PVCC

VCC

PVCC

VCC
34 33 34 33
[126] 610_PWM1 PWM BOOT PC7040 [126] 610_PWM4 PWM BOOT PC7041
EV@0.22u/25V_4 EV@0.22u/25V_4
35 32 PL7001 NVVDD 35 32 PL7002
[126,127] 610_DRON DISB# PHASE EV@0.22uH/45A_12x8x4 [126,127] 610_DRON DISB# PHASE EV@0.22uH/45A_12x8x4 NVVDD
[126,127] 610_TMON PR7074 *EV@0_5%_2 36 Isat=80A,DCR=0.48mohm+/-10% [126,127] 610_TMON PR7075 *EV@0_5%_2 36 Isat=80A,DCR=0.48mohm+/-10%
FAULT 10 1 2 NVVDD FAULT 10 1 2 NVVDD
R-[2/26] PR7076 *Short_0201 37 SW R-[2/26] PR7077 *Short_0201 37 SW
+5V_S5 ZCD_EN +5V_S5 ZCD_EN
PR7078 *EV@0_5%_2 PR7079 + PC7042 + PC7043 PR7080 *EV@0_5%_2 PR7081 + PC7044 + PC7045
38 6 38 6

1
[126] 610_CSP1 EV@2.2_5%_6 [126] 610_CSP4 EV@2.2_5%_6
IMON GL#1 41 EV@330u/2V_7343H1.9 EV@330u/2V_7343H1.9 IMON GL#1 41 EV@330u/2V_7343H1.9 EV@330u/2V_7343H1.9
GL#2 PD7002 GL#2 PD7005

PGND#10

PGND#10
PGND#1
PGND#2

PGND#1
PGND#2
[126,127] 610_CSREF PR7082 EV@10_5%_2 39 1 *SX34F [126,127] 610_CSREF PR7083 EV@10_5%_2 39 1 *SX34F
REFIN NC#1 REFIN NC#1
AGND

AGND
31 31

2
NC#2 PC7046 NC#2 PC7047
PC7048 EV@2200p/50V_4 PC7049 EV@2200p/50V_4
EV@0.1u/25V_2 PTP7001 EV@0.1u/25V_2 PTP7002
2

5
7
40

5
7
40
C C
+VIN_VGACORE
+VIN_VGACORE

+VIN_VGACORE +VIN_VGACORE

PC7050 PC7057
EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@0.1u/50V_4

EV@2200p/50V_4

N-E6Q@10u/25V_6

N-E6Q@10u/25V_6

N-E6Q@10u/25V_6

N-E6Q@10u/25V_6

N-E6Q@0.1u/50V_4

N-E6Q@2200p/50V_4
EV@2.2u/10V_4 N-E6Q@2.2u/10V_4
PC7051

PC7052

PC7053

PC7054

PC7055

PC7056

PC7058

PC7059

PC7060

PC7061

PC7062

PC7063
PR7084 PR7085
EV@2_1%_4 N-E6Q@2_1%_4

+5V_S5 +5V_S5
R-[2/26]
R-[2/26]
PC7064 PU7003 PC7065 PU7004
EV@2.2u/10V_4 EV@NCP303150MNTWG N-E6Q@2.2u/10V_4 N-E6Q@NCP303150MNTWG
25
30

25
30
4

3
PR7086 PR7087
EV@4.7_1%_6 N-E6Q@4.7_1%_6
VIN#1
VIN#2

VIN#1
VIN#2
PVCC

VCC

PVCC

VCC
34 33 34 33
[126] 610_PWM2 PWM BOOT PC7066 [126] 610_PWM5 PWM BOOT PC7067
EV@0.22u/25V_4 N-E6Q@0.22u/25V_4
35 32 PL7003 35 32 PL7004
[126,127] 610_DRON DISB# PHASE EV@0.22uH/45A_12x8x4 [126,127] 610_DRON DISB# PHASE N-E6Q@0.22uH/45A_12x8x4
[126,127] 610_TMON PR7088 *EV@0_5%_2 36 Isat=80A,DCR=0.48mohm+/-10% [126,127] 610_TMON PR7089 *N-E6Q@0_5%_2 36 Isat=80A,DCR=0.48mohm+/-10%
FAULT 10 1 2 FAULT 10 1 2
R-[2/26] PR7090 *Short_0201 37 SW R-[2/26] PR7091 *Short_0201 37 SW
+5V_S5 ZCD_EN +5V_S5 ZCD_EN
PR7092 *EV@0_5%_2 PR7093 + PC7068 + PC7069 PR7094 *N-E6Q@0_5%_2 PR7095 + PC7070 + PC7071
38 6 38 6
1

1
[126] 610_CSP2 EV@2.2_5%_6 [126] 610_CSP5 N-E6Q@2.2_5%_6
IMON GL#1 41 EV@330u/2V_7343H1.9 EV@330u/2V_7343H1.9 IMON GL#1 41 N-E6Q@330u/2V_7343H1.9 N-E6Q@330u/2V_7343H1.9
GL#2 PD7003 GL#2 PD7006
PGND#10

PGND#10
PGND#1
PGND#2

PGND#1
PGND#2
[126,127] 610_CSREF PR7096 EV@10_5%_2 39 1 *SX34F [126,127] 610_CSREF PR7097 N-E6Q@10_5%_239 1 *N-E6Q@SX34F
REFIN NC#1 REFIN NC#1
AGND

AGND
31 31
2

2
B NC#2 PC7072 NC#2 PC7073
B

PC7074 EV@2200p/50V_4 PC7075 N-E6Q@2200p/50V_4


EV@0.1u/25V_2 PTP7003 N-E6Q@0.1u/25V_2 PTP7004
2

5
7
40

5
7
40
+VIN_VGACORE

PC7076
EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

EV@0.1u/50V_4

EV@2200p/50V_4

EV@2.2u/10V_4
PC7077

PC7078

PC7079

PC7080

PC7081

PC7082

PR7098
EV@2_1%_4

+5V_S5
R-[2/26]

PC7090 PU7005
EV@2.2u/10V_4 EV@NCP303150MNTWG
25
30
4

PR7100
EV@4.7_1%_6
VIN#1
VIN#2
PVCC

VCC

34 33
[126] 610_PWM3 PWM BOOT PC7092
EV@0.22u/25V_4
35 32 PL7000
[126,127] 610_DRON DISB# PHASE EV@0.22uH/45A_12x8x4
[126,127] 610_TMON PR7102 *EV@0_5%_2 36 Isat=80A,DCR=0.48mohm+/-10%
A
FAULT 10 1 2 A
R-[2/26] PR7104 *Short_0201 37 SW
+5V_S5 ZCD_EN
PR7106 *EV@0_5%_2 PR7107 + PC7094 + PC7095
38 6
1

[126] 610_CSP3 EV@2.2_5%_6


IMON GL#1 41 EV@330u/2V_7343H1.9 EV@330u/2V_7343H1.9
GL#2 PD7004
PGND#10
PGND#1
PGND#2

[126,127] 610_CSREF PR7110 EV@10_5%_2 39


REFIN NC#1
1 *SX34F
Quanta Computer Inc.
AGND

31
2

NC#2 PC7098
PC7100
EV@0.1u/25V_2 PTP7005
EV@2200p/50V_4 PROJECT : ZGN
2

5
7
40

Size Document Number Rev


Custom +VGPU (NCP81610) A1A

Date: Monday, March 21, 2022 Sheet 127 of 150


5 4 3 2 1
5 4 3 2 1

128

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 128 of 150
5 4 3 2 1
1 2 3 4 5 6 7 8

OVR-M GEN2 setting all 0ohm cannot modify to short pad +3V_S5 [13,16,19,20,45,61,74,86,87,88,89,91,96,113,123,124,126,131,144,146]
129
OVR-M GEN1 NCP45492 - N18P-G61-A

Default OVR-M GEN2 NCP45495 - GN20-Px/Ex


R-[2/26]
A A
GND_FET PR7126 R6 *EV_SP@649_1%_4 5650_VCC PR7127 *Short_0201
VCC
27
+3V_S5 Default
PC7131 C6 *EV_SP@1000p/25V_2 PC7130
EV@0.1u/6.3V_2 PR7129 Gen2 - Gen1 -
NVVDD_SENSE_V PR7128 R4 EV_SP@0_5%_2 5650_BSIN1 3 2 5650_SHP1 EV@49.9_1%_2
BS_IN1 SH_P1 NVVDD_SENSE_V [127] CH1 NVVDD+FVDDQ VOLTAGE GN20-P1-A1/QN20-P1-A1 N18P-G61-A
GND_FET PR7130 R7 *EV_SP@649_1%_4 1 PC7132 PR7131
SH_N1 5650_SHN1
NCP45495 / AL045495000 NCP45492 / AL045492000
EV@1u/10V_4 EV@49.9_1%_2
PC7133 C7 *EV_SP@1000p/25V_2 PR7133 NVVDD_SENSE_I [127] CH1 NVVDD+FVDDQ CURRENT
A22C 2021/5/19 *Short_0201 PR7134 Location Value PN Value PN
FVDDQ_SENSE_V PR7132 R5 EV_SP@0_5%_2 5650_BSIN2 6 5 5650_SHP2 EV@49.9_1%_2
BS_IN2 SH_P2 FVDDQ_SENSE_V [130] CH2 FVDDQ VOLTAGE
PU7009 4 R-[2/26] PC7134 PR7135 R4 -PR7128 0 ohm_2 CS00001JE18 75K ohm_2 CS37501FE00
EV_SP@NCP45495XMNTWG SH_N2 5650_SHN2 EV@1u/10V_4 EV@49.9_1%_2
PR7136 R-[2/26] FVDDQ_SENSE_I [130] CH2 FVDDQ CURRENT
*Short_0201 Pin3 R6 -PR7126 NC 649 ohm_4 CS16492FB13
5650_BSIN1 5650_BSIN3 11
BS_IN3 SH_P3
12 5650_SH_P3 PR7137 *Short_0201
PR7138
FVDDQ_SENSE_V
CH3 TBD
PR7139 13 5650_SHN3 PR7140 *Short_0201 EV@0_5%_2
PR7141 *Short_0201 SH_N3 C6 -PC7131 NC 1nF_2 CH2104K1E00
*EV@0_5%_2 R-[2/26] PR7142 +3V_S5
CH3 TBD
5650_BSIN4 14 *EV@0_5%_2
+3V_S5 BS_IN4 15 5650_SHP4 PR7143 *Short_0201
R5 -PR7132 0 ohm_2 CS00001JE18 75K ohm_2 CS37501FE00
SH_P4 PR7145
PC7135 C4 *EV_SP@0.015u/25V_4 16 5650_SHN4 PR7144 *Short_0201 *EV@0_5%_2 CH4 TBD Pin6 R7 -PR7130 NC 649 ohm_4 CS16492FB13
SH_N4
PR7146 R1 *EV_SP@475_1%_2 5650_SH01 32 R-[2/26] CH4 TBD
SH_O1/NC
PC7137 *EV_SP@0.015u/25V_4 PC7136 *EV@47p/50V_4
C7 -PC7133 NC 1nF_2 CH2104K1E00
C5
B +3V_S5 B
PR7147 R2 EV_SP@0_5%_2 5650_SH02 7 20 5650_DIFFP PR7148 *Short_0201
SH_O2/IMON1 DIFF_P GPU_ADC_INP [32] R2 -PR7147 0 ohm_2 CS00001JE18 475 ohm_2 CS14751FE00
PR7149 *EV@0_5%_2 19 5650_DIFFN PR7150 *Short_0201
Pin7
DIFF_N GPU_ADC_INN [32]
PR7151 C5 -PC7137 NC 15nF_4 CH3154K1B00
PC7138 *EV@0.015u/25V_4 10 PC7139 *EV@47p/50V_4 EV@10K_1%_2
SH_O3/NC

30 5650_BSOK PR7152 *Short_0201


Pin8 R21-PR7171 0 ohm_2 CS00001JE18 NC
PR7153 *EV@0_5%_2 SH_04 17 BS_OK
SH_O4/BG_REF_OUT R-[2/26]
PC7140 *EV@0.015u/25V_4 ADRS1
Pin9 R13-PR7173 0 ohm_2 CS00001JE18 NC

R-[2/26] Pin18 R24-PR7172 0 ohm_2 CS00001JE18 NC


5650_MUX 29 SH_04 R15 R3 R14
[32] ADC_MUX_SEL MUX_SEL PR7155 PR7156 PR7157
PR7158 PR7154 EV_SP@0_5%_2 *EV_SP@365K_1%_2 EV_SP@10K_1%_2 Pin21 R11-PR7175 10K ohm_2 CS31001FE14 NC
*EV@100K_1%_2 *Short_0201 PR7159 R16 EV_SP@0_5%_2
5650_EN 28 MBCLK1_OVRM [32]
+3V_S5 EN 23 PR7160 R17 *EV_SP@0_5%_2 R20 Pin22 C3 -PC7144 NC 1nF_2 CH2104K1E00
BG_REF_OUT/SCL PC7142 PR7161 PR7162
EV@1000p/25V_2 EV_SP@31.6K_1%_2 EV@10K_1%_2
PR7163 PC7141 5650_SKIP 25 PR7164 R18 *EV_SP@0_5%_2 BV_REF
EV@10K_1%_2 *EV@100p/50V_4 SKIP R3 -PR7156 NC 365K ohm_2 CS43651FE01
GND_FET/RGND

24 PR7165 R19 EV_SP@0_5%_2


BS_REF/SDA MBDATA1_OVRM [32] PC7143 R14-PR7157 10K ohm_2 CS31001FE14 681K ohm_2 CS46811FE01
NC/BV_REF

NC/ADRS0
NC/IMON2

EV@1000p/25V_2
NC/SYNC

PR7167 GEN2_MODE 26
EV@10K_1%_2 MODE/NC 22 ADRS1 Pin23 R15-PR7155 0 ohm_2 CS00001JE18 NC
GND

CM_REF_IN/ADRS1 +3V_S5
C
+3V_S5 C
C3 PR7166
PR7169 PC7144 *EV@10K_1%_2 R16-PR7159 0 ohm_2 CS00001JE18 NC
8

18

21

31

33

*EV@10K_1%_2 *EV_SP@1000p/25V_2
PR7168 +3V_S5
*EV@30K_1%_2 R17-PR7160 NC 0 ohm_2 CS00001JE18
PR7170 R21 R24 R13
*EV@10K_1%_2 PR7171 PR7172 PR7173 R20-PR7161 31.6K ohm_2 CS33161FE00 243K ohm_2 CS42431FE00
EV_SP@0_5%_2 EV_SP@0_5%_2 PTP7000 EV_SP@0_5%_2
GND_FET

R18-PR7164 NC 0 ohm_2 CS00001JE18


BV_REF

Pin24
R19-PR7165 0 ohm_2 CS00001JE18 NC
PR7174 R11
*EV@10K_1%_2 PR7175 R1-PR7146 NC 475 ohm_2 CS14751FE00
EV_SP@10K_1%_2 Pin32

+3V_S5
C4-PC7135 NC 15nF_4 CH3154K1B00

D D

Quanta Computer Inc.


PROJECT : ZGF
Size Document Number Rev
1A
OVR-M GEN2
Date: Monday, March 21, 2022 Sheet 129 of 150
1 2 3 4 5 6 7 8
5 4 3 2 1

+VIN_VGACORE +VIN_GPU_TOTAL

VGA Core -
PR7176

130
EV@0.005_1%_2037

PD=3W

FBVDDQ_MEM
R-[2/26] R-[2/26]

PR7177 PR7178
*Short_0201 *Short_0201

FVDDQ_SENSE_I
FVDDQ_SENSE_I [129]
FVDDQ_SENSE_V FVDDQ_SENSE_V [129]
D D

+VIN_GPU_TOTAL

PU7010
EV@NCP81278TMNTXG PC7145 PC7147 PC7149
EV@10u/25V_6 EV@0.1u/50V_4 EV@0.1u/50V_4
R-[2/26]
PR7180

3
4
9

3
4
9
*Short_0603 PQ7000
PR7179 EV@1_5%_6 8816APVCC 18 2 8816AUGATE1 8816AUGATE1_1 D1 PQ7001 8816AUGATE1_1 D1 EV@AOE6936 PC7146 PC7148
+5V_S5 PVCC HG1 EV@AOE6936 EV@10u/25V_6 EV@2200p/50V_4
R-[2/26]
NCP81278TMNTXG PC7150
EV@4.7u/10V_4 1 G1 1 G1 PL7008
EV@0.24uH/34A_7x7x4 +FBVDDQ_MEM
PSI Mode PC7154 D2/S1 5 D2/S1 5 Isat=35A,DCR=1.0mohm+/-7%
PR7181 EV@10K_1%_2 EV@0.22u/25V_4 2 S1/D2 6 8816APHASE1 2 S1/D2 6 8816APHASE1 1 2
+3V
1 Phase DCM 1 8816ABOOT1 7 7
<0.4V PR7182 *Short_0201 8816APG 13 BST1
[31] PS_FBVDD_PGOOD PGOOD PC7152 PC7155 + +
1 Phase CCM R-[2/26] 20 8816APHASE1 PR7184 EV@47u/6.3V_6 *EV@47u/6.3V_6 PC7156 PC9845
0.7V-0.88V PH1 *EV@2.2_5%_6 EV@560u/2V_7343H1.9 *EV@560u/2V_7343H1.9
8 G2 8 G2
1.6V~5.5V 2 Phase CCM S2 S2 PC7157 +
[31] FBVDD_EN PR7183 EV@10_5%_2 8816AEN 3 *EV@2200p/50V_4 PC7153 PC7151

10

10
EN 19 8816ALGATE1 8816ALGATE1 *EV@47u/6.3V_6 EV@560u/2V_7343H1.9
LG1
PC7158 +VIN_GPU_TOTAL C-[11/18]
*EV@820p/50V_4 Rds(on)=3mohm(MAX) fix E3 issue
FBVDDQ_MEM PSI=1.6V for VGA
C C
sequence
MEM_VDD_CTRL E3/E6 Max-Q 2 Phase CCM

+1.8V_AON PR7185 *EV@12K_1%_2 PC7159 PC7161 PC7163


2PH_FB@0.1u/50V_4 2PH_FB@0.1u/50V_4
1 1.35V/1.25V PR7186 *Short_0201 8816APSI 4 R-[2/26]
2PH_FB@10u/25V_6
[32] FBVDD_PSI PSI PR7188 R-[2/26]

3
4
9

3
4
9
R-[2/26] *Short_0603 8816AUGATE2_1 PQ7003
0 1.25V/1.2V PR7187 14 8816AUGATE2 8816AUGATE2_1 D1 PQ7002 D1 2PH_FB@AOE6936 PC7160 PC7162
*EV@10K_1%_2 HG2 2PH_FB@AOE6936 2PH_FB@10u/25V_6 2PH_FB@2200p/50V_4

1 G1 1 G1 PL7009 +FBVDDQ_MEM
2PH_FB@0.24uH/34A_7x7x4
PR7189 *EV@0_5%_2 5 PC7164 D2/S1 5 D2/S1 5 Isat=35A,DCR=1.0mohm+/-7%
[32] MEM_VREF_CTL VID 2PH_FB@0.22u/25V_4 2 S1/D2 6 8816APHASE2 2 S1/D2 6 8816APHASE2 1 2
15 8816ABOOT2 7 7
BST2 PC7165
8816AVREF 2PH_FB@47u/6.3V_6 PC7169 +
VREF=2V 16 8816APHASE2 PR7191 *2PH_FB@47u/6.3V_6 PC7167
8 PH2 *2PH_FB@2.2_5%_6 2PH_FB@560u/2V_7343H1.9
VREF 8 G2 8 G2

PR7190 PC7170 S2 S2 +
EV@10K_1%_2 EV@0.01u/50V_4 PC7172 PC7168 PC7166

10

10
17 8816ALGATE2 8816ALGATE2 *2PH_FB@2200p/50V_4 *2PH_FB@47u/6.3V_6 2PH_FB@560u/2V_7343H1.9
LG2
PR7192 *EV@0_5%_2 6
VIDBUF
Rds(on)=3mohm(MAX)
R-[2/26] C-[11/18]
PC7171 fix E3 issue
PR7193 *EV@0.1u/25V_2
*Short_0201
+5V_S5
B 8816AREFIN 7 PR7395 PR7196 +FBVDDQ_MEM +5V_S5 B
REFIN *Short_0201 EV@100_1%_2
10 8816ARGDN
PR7194 PC7175 FBRTN
EV@100K_1%_2
R2 EV@4700p/25V_4 PC7174 PR7203
PR7195 PR7201 EV@1000p/50V_4 EV@22_5%_8 PR7204
FBVDDQ_SENSE [35]
VFB@82.5K_1%_2 EV@49.9_1%_2 EV@100K_1%_2
11 8816AVSNS
R1 FB +FBVDDQ_MEM
3

PQ7005
2

3
EV@METR3904-G PR7197 PC7173 PC7177 PR7396 PR7198 R-[2/26]
PR7199 VFB@21K_1%_2 EV@33p/50V_4 EV@47p/50V_4 *Short_0201 EV@100_1%_2 2
3

EV@75K_1%_2 PQ7004 PQ7006 PR7209


2 12

3
PR7200 EV@2N7002K 8816ASS EV@PJE8406 *Short_0201
1

[32] MEM_VDD_CTRL COMP/ILMT 2


EV@1M_5%_2 PR7208 8816AEN

1
PR7393 PC7370 PR7394 EV@1M_5%_2
1

EV@82K_1%_2 EV@100p/50V_4 EV@10K_1%_2 PQ7007


PR7202
Fsw : 400KHz PR7205 EV@PJE8406

1
*EV@100K_1%_2 EV@30.1K_1%_2

8816ATON 9
FS

PR7207 PC7179
EV@40.2K_1%_2 *EV@0.1u/25V_2
21
OCP=60A @Rds(on)=3m/2
GND

VFB@ R1 R2 GN20-E3 (115W) 2Φ


FBVDDQ_MEM (PR7197) (PR7195)
A
GN20-E5 (125W) 2Φ GN20-E6 Max-Q (90W) 2Φ A

GN20-E3 21K_1%_2 82.5K_1%_2 GN20-E7 (150W) 2Φ GN20-E8 Max-Q (90W) 2Φ


1.35V/1.25V CS32101FE00 CS38251FE01
FBVDDQ_MEM NVVDD
GN20-E6 Max-Q 16.9K_1%_2 150K_1%_2 EDP-Continous:45A EDP-Continous:34A Quanta Computer Inc.
1.25V/1.2V CS31691FE00 CS41501FE06 EDP-Peak:59A EDP-Peak:45A
OCP:70A OCP:70A PROJECT : ZGN
Size Document Number Rev
Custom +FBVDDQ_MEM (NCP81278T) A1A

Date: Monday, March 21, 2022 Sheet 130 of 150


5 4 3 2 1
1 2 3 4 5 6 7 8

+3VPCU [8,11,45,68,73,74,88,106,111,112,113,123] +VDD2_1.1V_1.2V_SUS [3,5,101,114]


+1.8V_AON [25,26,30,31,32,35,38,39,40,41,45,48,126,130]

+5VPCU [68,73,79,81,87,93,113,123]
+VIN [16,45,112,113,114,123,127,141,142,143,144,145,146]
+5V_S5 [87,88,89,113,114,126,127,130,141,142,143,144]
+3V [2,6,9,11,12,15,21,29,32,44,45,48,53,55,61,64,68,74,86,87,88,91,93,96,97,113,114,123,126,130,141,144]

+VIN
131
+3V_S5 PU7027
EV@SY8386RHC R-[2/26]
2
12 IN1
BYP 3 PJ7012 +1.8V_AON
IN2
PC7357 4
PC7358
10u/25V_6
PC7359
10u/25V_6
PC7360
0.1u/50V_4
*short3720 1.8Volt +/- 5%
A EV@1u/6.3V_4 IN3 TDC : 5.18A A
+1.8V_AON
13
PEAK : 6.91A
VCC
Width : 210mil
+3V_S5
PC7361 PR7384 PC7362 FSW : 600KHZ
EV@2.2u/10V_4 8 EV@1_1%_6 EV@0.1u/25V_4
TEST 1 PL7021 PJ7013
PR7383 BS EV@1.5uH/9A_7x7x3 *short3720
*EV@10K_1%_2 Isat=18A,DCR=14mohm R-[2/26]
5 1 2
LX1
15 PC7363 PC7364 PC7365 PC7366
10 LX2 PR7386
ILMT 16 *EV@2.2_5%_6 PR7385 *EV@22u/6.3V_6 EV@22u/6.3V_6 EV@22u/6.3V_6 EV@0.1u/16V_4
LX3 *Short_0201
PR7387
*EV@10K_1%_2 +3V_S5 PR7388
EV@10K_1%_2
7 PC7367
PG *EV@2200p/50V_4

PR7389
EV@1K_1%_2 R-[2/26]
9
[31] 1V8_AON_EN EN PC7369 PR7390
EV@330p/25V_2 *Short_0201

GND2
GND1
GND3
PC7368 11
EV@0.1u/16V_4 FB
PR7391
EV@20.5K_1%_2

6
14
17
B B
PR7392
EV@10K_1%_2
R1
R2 Vo=0.6/R2 *(R1+R2)
+VDD2_1.1V_1.2V_SUS +1V_GFX

+1V_GFX(1.0V)
TDC : 3.15A
PEAK : 4.2A
PJ7004
*short3720 PQ7012 +1V_GFX_S
PJ7000
*short3720
Width : 130mil
R-[2/26] EV@AONR32320C R-[2/26]
3
5 2

S
1
PR7227 +5V_S5

G
EV@5.6_5%_8

PC7198 PC7199 4 PC7200 PC7201 PC7202 PC7203 PC7204


EV@0.1u/50V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 EV@10u/6.3V_4 *EV@10u/6.3V_4 EV@0.1u/50V_4
9336DRV

PR7228
EV@100K_1%_2

3
+3V 2 PQ7014
+1.8V_AON EV@DMG1012T-7

3
PQ7013
PR7229 EV@2N7002K 2

1
EV@10K_1%_2 PR7231
C PR7230 PD7001 EV@1M_5%_2 C
EV@10K_1%_2 EV@1SS355

1
1 2
R-[2/26] PU7013
PR7233 EV@G9336ADJTP1U
*Short_0201 PR7232 PC7205

3
[31] +1V_GFX_PG 3 EV@47_1%_4 EV@0.01u/50V_4
PGD 6 2
4 DRV
[31] +1V_GFX_EN_1 EN
PR7234 PR7235
R-[2/26] *Short_0201 EV@100_1%_4 PQ7015

1
1 5 9336ADJ EV@2N7002K
GND

+5V_S5 VCC ADJ +1V_GFX_S


[31] +1V_GFX_EN
PR7236 R1
EV@10K_1%_2
2

PC7206 R2 PR7237
PC7207 EV@0.1u/50V_4 EV_SP@110_1%_4
EV@0.1u/50V_4
Vout1=(1+R1/R2)*0.5
=0.95V

+VIN +1.8V_AON

PR7216 PR7217
EV@1M_5%_2 EV@22_5%_8
D D

PQ7008
3

EV@DDTC144EUA-7-F
3

1V8_AON_EN 2 2
PR7218
EV@1M_5%_2
PQ7009
EV@2N7002KW Quanta Computer Inc.
1

PROJECT : ZGN
1

PR7219
EV@100K_1%_2
Size Document Number Rev
Custom +1.8V_AON & +1.8V_MAIN & +1V_GFX A1A

Date: Monday, March 21, 2022 Sheet 131 of 150


1 2 3 4 5 6 7 8
5 4 3 2 1

132

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 132 of 150
5 4 3 2 1
5 4 3 2 1

132

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 133 of 150
5 4 3 2 1
5 4 3 2 1

134

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 134 of 150
5 4 3 2 1
5 4 3 2 1

135

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 135 of 150
5 4 3 2 1
5 4 3 2 1

136

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 136 of 150
5 4 3 2 1
5 4 3 2 1

137

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 137 of 150
5 4 3 2 1
5 4 3 2 1

138

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 138 of 150
5 4 3 2 1
5 4 3 2 1

139

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 139 of 150
5 4 3 2 1
5 4 3 2 1

140

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 140 of 150
5 4 3 2 1
5 4 3 2 1

3624_VREF PR1264 place close to


place close to PR1263 10K_NTC_4_1% GT inductor

141
core inductor 10_1%_4 C-[11/5]
PR1268 IMON_GT_2
1 2 C-[11/5] PR1293=21.5k
IMON fine tune IMON fine tune 3624_VREF
PR1267 10K_NTC_4_1%
PR1266 232_1%_4 PR1269 PR1270 3624_VREF
PR1265 11.8K_1%_4 IMON_CORE_2
1 2 2.74K_1%_4 3K_1%_4
11.8K_1%_4 IMON_GT_1 PR1278 75_1%_4
3624_VREF H_PROCHOT# [4,13,73,86,112]
PR1276
TSENSE_GT3 2.21K_1%_4 PR1273
TSENSE_CORE2 IMON_CORE_1 PR1277 1.91K_1%_4 PR1283 *Short_0402 PR1272 221K_1%_4 PR1274 PR1275
3624_VREF H_CPU_SVIDCLK [5]
PR1280 28K_1%_4 41.2K_1%_4 37.4K_1%_4

100_1%_4
PR1282

PR1271
3.9_1%_4
Rd 130_1%_4 PR1281 110K_1%_4 C-[11/5] PR1277
PR1279 IMON fine tune PR1289 *Short_0402 SET1A SET2A SET3A SET4A
D PR1288 H_CPU_SVIDDAT [5] C-[11/5] D
130_1%_4
TSENSE_GT1 2 1 3624_TSENSE_GT GT:50A=>55A
PR1291 *Short_0402 H_CPU_SVIDALERT# [5] PR1284 PR1285 PR1286 PR1287

PC1635 VREF06P_1
100K_NTC_4_1% place close to 10.7K_1%_4 19.1K_1%_4 402_1%_4 909_1%_4
GT MOSFET
TSENSE_CORE1 3624_SET1

21.5K_1%_4
PR1290 110K_1%_4 PR1292 PR1297 *Short_0402
VRON_IMVP9 [12] 3624_SET2

PR1293
10_1%_4
R-[2/26] 3624_SET3

0.47u/6.3V_2
PR1296 3624_SET4
PC1636
PR1294 PR1295 2 1 3624_TSENSE_CORE 0.1u/16V_4
32.4K_1%_4 Re 32.4K_1%_4 C-[11/5]
100K_NTC_4_1% place close to GT:50A=>55A

3624_IMON_MAIN

3624_IMON_AUXI
VCORE MOSFET 3624_SET1 PR1298 PR1299 PR1300 PR1301

3624_ALERT#
TSENSE_CORE3 TSENSE_GT2 3624_VIN 12.4K_1%_4 13.7K_1%_4 10K_1%_4 8.25K_1%_4

3624_VRHOT
+VIN 3624_SET2

3624_VDIO
IMON_AUX
PR1303

3624_CLK

3624_EN
PR1304 PR1305 PR1302 10_1%_4 SET1B SET2B SET3B SET4B
590_1%_4 Rf 590_1%_4 PR1308 2.2_5%_6 PC1637 3624_SET3
*10K_1%_4 0.22u/25V_4 R-[2/26]
3624_SET4 PR1309 PR1306 PR1307 PR1310
+5V_S5
*Short_0402 182_1%_4 100_1%_4 130_1%_4
3624_PSYS

22

23

19

21

28

20

18

15

16

17

51

24

25

26

27
[112] PMON
PR1311 PR1312 10K_1%_4

TSEN_AUXI

IMON_AUXI

SET1

SET2

SET3

SET4
VREF

VR_HOT

ALERT
IMON_AUX

VCLK
TSEN_MAIN

IMON_MAIN

VOID

VRON
*Short_0402
R-[2/26] PC1638 *330p/50V_4 52
VIN/VSYS R-[2/26]
PR1313 *100p/50V_4 C-[11/5] ex 29 45 3624_PW1 PR1317 *Short_0402
100_1%_4 PC1639 PR1312=10k PSYS PW M1_MAIN VCCIN_PWM1 [142]
PSYS set to 320W 3624_PW2
46 PR1314 *Short_0402
+VCC_CORE PW M2_MAIN VCCIN_PWM2 [142]
C PR1318 VSEN_CORE 11 48 3624_PW3 PR1315 *Short_0402 C
[5] VCORE_SENSE VSEN_MAIN PW M3_MAIN VCCIN_PWM3 [142]
*Short_0402 PR1316 PC1640
[5] VCORESS_SENSE 47 3624_PW4
R-[2/26] *Short_0402 *100p/50V_4 PR1319 *Short_0402
RGND_CORE 12 PW M4_MAIN VCCIN_PWM4 [142]
RGND_MAIN
PR1320 PC1641 10
100_1%_4 *100p/50V_4 COMP_MAIN R-[2/26]
44 3624_PWM1_AUXI PR1321 *Short_0402
PR1322 PR1323 9 PW M1_AUXI VCCGT_PWM1 [143]
10K_1%_4 25.5K_1%_4 FB_MAIN 43 3624_PWM1_AUX1 PR1324 *Short_0402
VSEN_CORE
LL~2.3m COMP_CORE PW M2_AUX1 VCCGT_PWM2 [143]
PU1032
PC1642 PC1643 R-[2/26]
330p/50V_4 82p/50V_4 RT3624BEGQW 42 3624_DRVEN_F PR1326 *Short_0402
FB_CORE_1 FB_CORE DRVEN_F DRVEN_F [142,143]
31
VSEN_AUXI
PC1644 PR1325 40 +VCC1P05_PROC
*68p/50V_4 *10K_1%_4 30 DBLR_PS
PR1327 *100p/50V_4 RGND_AUXI Floating
100_1%_4 PC1645 32 41
VSEN_GT COMP_AUXI DRVEN PR1329
+VCC_GT
*0_5%_4
PR1328 33 49 3624_ANS_EN PR1335 PR1336 PR1337 PC1651
[5] VCCGT_SENSE FB_AUXI ANS_EN +5V_S5
*Short_0402 PR1331 PC1646 100_1%_4 *75_1%_2 45.3_1%_4 1000p/50V_2
[5] VSSGT_SENSE
R-[2/26] *Short_0402 *100p/50V_4
RGND_GT 13 3624_VREF_SPS
VREF_SPS PR1332
PR1330 C-[11/5] PR1334 PC1647 *Short_0402

ISEN4N_MAIN

ISEN3N_MAIN

ISEN2N_MAIN

ISEN1N_MAIN
ISEN4P_MAIN

ISEN3P_MAIN

ISEN2P_MAIN

ISEN1P_MAIN
ISEN2N_AUXI

ISEN1N_AUXI
ISEN2P_AUXI

ISEN1P_AUXI
100_1%_4 for H45 LL fine tune *100p/50V_4 PC1648

ISENN_AUX
ISENP_AUX
VR_READY
PR1333 PR1334 53 0.22u/25V_4 R-[2/26] H_CPU_SVIDCLK
B 10K_1%_4 27.4K_1%_4 EPAD B
VSEN_GT
LL~3.2m COMP_GT H_CPU_SVIDALERT#
VCC
PC1649 PC1650 H_CPU_SVIDDAT
270p/50V_4 82p/50V_4
14

50

38

39

34

35

37

36

8
FB_GT_1 FB_GT
ISEN1P_CORE [142]
PC1652 PR1338
*68p/50V_4 *10K_1%_4 3624_VR_READY 3624_ISEN1N_MAIN PR1340
+3V ISEN1N_CORE [142]
680_1%_4 PC1653
PR1341 PR1342 +5V_S5 0.1u/6.3V_2
10K_1%_2 *Short_0402 3624_VCC
ISEN2P_CORE [142]
C-[10/31] R-[2/26]
PR1343 3624_ISEN2N_MAIN PR1345
[4,86] IMVP_PWRGD ISEN2N_CORE [142]
2.2_1%_6 PC1655 680_1%_4 PC1654
4.7u/6.3V_4 0.1u/6.3V_2
ISEN3P_CORE [142]
3624_ISEN3N_MAIN PR1347
3624_ISENP_AUX ISEN3N_CORE [142]
[144] ISEN1P_VCCAUX 680_1%_4 PC1656
0.1u/6.3V_2
PR1357 PR1354
ISEN4P_CORE [142]
1K_1%_4 1K_1%_4 PR1349
1.37K_1%_4 3624_ISEN4N_MAIN PR1351
ISEN4N_CORE [142]
680_1%_4 PC1657
PC1796 PC1797 0.1u/6.3V_2
ISEN1P_GT [143]
0.1u/16V_4 *0.01u/50V_4
2

3624_ISEN1N_AUXI PR1353
ISEN1N_GT [143]
680_1%_4 PC1658
A PR1348 0.1u/6.3V_2 A
PR1475 4.02K_1%_4
ISEN2P_GT [143]
10K_NTC_4_1%
1

3624_ISENN_AUX 3624_ISEN2N_AUXI PR1356


[144] ISEN1N_VCCAUX ISEN2N_GT [143]
680_1%_4 PC1659

PC1798
0.1u/6.3V_2
Quanta Computer Inc.
0.1u/25V_4
PROJECT : ZGN
Size Document Number Rev
Custom CPU VR (RT3624BE) A1A

Date: Monday, March 21, 2022 Sheet 141 of 150


5 4 3 2 1
5 4 3 2 1

+5V_S5

PR1358
2.2_1%_4
PC1660
2.2u/10V_4

29
PU1033
AOZ5016QI
VIN#1
8
9
+VIN_VCORE

R-[2/26]
+VIN
142
PVCC VIN#2

10u/25V_6

10u/25V_8

10u/25V_8

10u/25V_8

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
3 PJ1011
VCC

PC1662

PC1663

PC1664

PC1665

PC1666

PC1667

PC1668
PC1661 *short3720 + PC1669
2.2u/10V_4
PC1670 *15u/25V_3528H1.9
5 86941_BST1
D PR1359 *Short_0402 1 BOOT D
[141] VCCIN_PWM1 PWM 0.22u/25V_4
PR1360 *Short_0402 2 7 PL1028 +VCC_CORE
[141,142,143] DRVEN_F SMOD# PHASE 0.15uH/33.5A_7x7x3 C-[10/31]
R-[2/26] 16 Isat=50A,DCR=0.85mohm+/-5% 22u/6.3V_8-->22u/6.3V_6
VSWH#1 24 86941_SW1 1 2 +VCC_CORE

330u/2V_7343H1.9
VSWH#2

PGND#1
PGND#2
PGND#3
PTP1003 6
NC

AGND
30

0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
PTP1004 PTP1006
THWN

PC1671

PC1672

PC1673

PC1674

PC1675

PC1676
PTP1005 31 27 PR1361 PR1362 PR1363 +
DISB# GL#1 *10_1%_4 *Short_0201 *Short_0201 ISEN1N_CORE [141]

12
28
32
4
PR1364 PC1678 PR1365
+5V_S5 PTP1007 1.1K_1%_4
PC1677 PR1366 0.1u/25V_4 *6.98K_1%_4
*470p/25V_2 1.1K_1%_4 Vcore total BOM with EE:
ISEN1P_CORE [141] 2*330uF/6m+42*22uF/0603
PR1367 PC1679 +VIN_VCORE
2.2_1%_4 2.2u/10V_4 PU1034
AOZ5016QI
8
29 VIN#1 9
PVCC VIN#2

2200p/50V_4
10u/25V_6

10u/25V_8

10u/25V_8

10u/25V_8
3

0.1u/25V_4

0.1u/25V_4
VCC

PC1681

PC1682

PC1683

PC1684

PC1685

PC1686

PC1687
PC1680 + PC1688
2.2u/10V_4
PC1689 *15u/25V_3528H1.9
5 86941_BST2
PR1368 *Short_0402 1 BOOT
[141] VCCIN_PWM2 PWM 0.22u/25V_4
PR1369 *Short_0402 2 7 PL1029 +VCC_CORE
[141,142,143] DRVEN_F SMOD# PHASE 0.15uH/33.5A_7x7x3 C-[10/31]
C R-[2/26] 16 Isat=50A,DCR=0.85mohm+/-5% 22u/6.3V_8-->22u/6.3V_6 C
VSWH#1 24 86941_SW2 1 2 +VCC_CORE

330u/2V_7343H1.9
VSWH#2
PGND#1
PGND#2
PGND#3

PTP1008 6
NC
AGND

0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
PTP1009 30 PTP1011
THWN

PC1690

PC1691

PC1692

PC1693

PC1694

PC1695
PTP1010 31 27 PR1370 PR1371 PR1372 +
DISB# GL#1 *10_1%_4 *Short_0201 *Short_0201 ISEN2N_CORE [141]
12
28
32
4

PR1373 PC1697 PR1374


+5V_S5 PTP1012 1.1K_1%_4
PC1696 PR1375 0.1u/25V_4 *6.98K_1%_4
*470p/25V_2 1.1K_1%_4
ISEN2P_CORE [141]
PR1376
PH3@2.2_1%_4 PC1698 +VIN_VCORE
PH3@2.2u/10V_4 PU1035
PH3@AOZ5016QI
8
VIN#1

PH3@10u/25V_6

PH3@10u/25V_8

PH3@10u/25V_8

PH3@10u/25V_8

PH3@2200p/50V_4
29 9

PH3@0.1u/25V_4

PH3@0.1u/25V_4
PC1699 3 PVCC VIN#2
VCC

PC1700

PC1701

PC1702

PC1703

PC1704

PC1705

PC1706
PH3@2.2u/10V_4 + PC1707

PC1708 *PH3@15u/25V_3528H1.9
5 86941_BST3
PR1377 *Short_0402 1 BOOT
[141] VCCIN_PWM3 PWM PH3@0.22u/25V_4
PR1378 *Short_0402 2 7 PL1030 +VCC_CORE
[141,142,143] DRVEN_F SMOD# PHASE PH3@0.15uH/33.5A_7x7x3 C-[10/31]
R-[2/26] 16 Isat=50A,DCR=0.85mohm+/-5% 22u/6.3V_8-->22u/6.3V_6
VSWH#1 24 86941_SW3 1 2 +VCC_CORE

PH3@330u/2V_7343H1.9
VSWH#2
PGND#1
PGND#2
PGND#3

PH3@0.1u/16V_4
PTP1013
NC
AGND

B 30 B

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
PTP1014 PTP1016
THWN

PC1709

PC1710

PC1711

PC1712

PC1713

PC1732
PTP1015 31 27 PR1380 PR1381 +
DISB# GL#1 PR1379 *Short_0201 *Short_0201 ISEN3N_CORE [141]
*PH3@10_1%_4
12
28
32
4

PR1382 PC1715 PR1383


PTP1017 PH3@1.1K_1%_4
+5V_S5 PR1384 PH3@0.1u/25V_4 *PH3@6.98K_1%_4
PC1714 PH3@1.1K_1%_4
*470p/25V_2 ISEN3P_CORE [141]

PR1385 PC1716 +VIN_VCORE


PH4@2.2_1%_4 PH4@2.2u/10V_4 PU1036
PH4@AOZ5016QI
8
VIN#1
PH4@10u/25V_6

PH4@10u/25V_8

PH4@10u/25V_8

PH4@10u/25V_8

PH4@2200p/50V_4
29 9 PH4@0.1u/25V_4

PH4@0.1u/25V_4
3 PVCC VIN#2
VCC
PC1718

PC1719

PC1720

PC1721

PC1722

PC1723

PC1724
PC1717 + PC1725
PH4@2.2u/10V_4
PC1726 *PH4@15u/25V_3528H1.9
5 86941_BST4
PR1386 *Short_0402 1 BOOT
[141] VCCIN_PWM4 PWM PH4@0.22u/25V_4
PR1387 *Short_0402 2 7 PL1031 +VCC_CORE
[141,142,143] DRVEN_F SMOD# PHASE PH4@0.15uH/33.5A_7x7x3 C-[10/31]
R-[2/26] 16 Isat=50A,DCR=0.85mohm+/-5% 22u/6.3V_8-->22u/6.3V_6
VSWH#1 24 86941_SW4 1 2 +VCC_CORE
VSWH#2
PGND#1
PGND#2
PGND#3

PH4@0.1u/16V_4
PTP1018
NC
AGND

30

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
PTP1019 PTP1021
ADL-H45 (45W) THWN

PC1727

PC1728

PC1729

PC1730

PC1731
PTP1020 31 27 PR1390 PR1389 PR1388
DISB# GL#1 *PH4@10_1%_4 *Short_0201 *Short_0201
A Performance ISEN4N_CORE [141] A
12
28
32
4

4 Φ PTP1022
PR1391
PH4@1.1K_1%_4
PC1734 PR1392

PC1733 PR1393 PH4@0.1u/25V_4 *PH4@6.98K_1%_4


PH4@1.1K_1%_4
+VCC_CORE *PH4@470p/25V_2

IPL2:93A ISEN4P_CORE [141] Quanta Computer Inc.


ICCMAX:160A PROJECT : ZGN
OCP:200A
L/L=-2.3mV/A Size Document Number Rev
Custom VCCIN _1 ADL A1A

Date: Monday, March 21, 2022 Sheet 142 of 150


5 4 3 2 1
5 4 3 2 1

+5V_S5

PR1394
2.2_1%_4
PC1735
2.2u/10V_4 PU1037
AOZ5016QI
8
+VCCIN_VIN

R-[2/26]
+VIN
143
29 VIN#1 9
D D
3 PVCC VIN#2

10u/25V_6

10u/25V_8

10u/25V_8

10u/25V_8
PJ1012

2200p/50V_4
0.1u/25V_4
VCC

PC1737

PC1738

PC1739

PC1740

PC1741

PC1742
PC1736 *short3720
2.2u/10V_4 PC1743
PC1744 0.1u/25V_4
5 86941_BST8
PR1395 *Short_0402 1 BOOT
[141] VCCGT_PWM1 PWM 0.22u/25V_4
PR1396 *Short_0402 2 7 PL1032 +VCC_GT
[141,142,143] DRVEN_F SMOD# PHASE 0.15uH/33.5A_7x7x3 C-[10/31]
R-[2/26] 16 Isat=50A,DCR=0.85mohm+/-5% 22u/6.3V_8-->22u/6.3V_6
VSWH#1 24 1 2
VSWH#2

PGND#1
PGND#2
PGND#3
PTP1023 6
NC

AGND
PTP1024 30 PTP1025

0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
THWN

PC1745

PC1746

PC1747

PC1748

PC1749
PTP1026 31 27 PR1398 PR1399 +
DISB# GL#1 *Short_0201 *Short_0201 PC1750
PR1397 330u/2V_7343H1.9

12
28
32
4
*10_1%_4
PTP1027

ISEN1N_GT [141] VGT total BOM with EE:


PC1751 PR1400
*470p/25V_2 1.1K_1%_4
2*330uF/6m+18*22uF/0603
C PC1752 PR1401 C

PR1402 0.1u/25V_4 *6.98K_1%_4


1.1K_1%_4

+5V_S5
ISEN1P_GT [141]
ADL-H45 (45W)
Performance
2 Φ
PR1403 PC1753 +VCCIN_VIN
GT2@2.2_1%_4 GT2@2.2u/10V_4 PU1038 +VCC_GT
GT2@AOZ5016QI
8 IPL2:30A
29 VIN#1 9 ICCMAX:55A
PVCC VIN#2
OCP:75A

GT2@10u/25V_6

GT2@10u/25V_6

GT2@10u/25V_6
3

GT2@4.7u/25V_6

GT2@4.7u/25V_6
VCC

PC1755

PC1756

PC1757

PC1758

PC1759
PC1754 PC1760
GT2@2.2u/10V_4 GT2@1u/25V_4
L/L=-3.2mV/A
PC1761
5 86941_BST9
PR1404 *Short_0402 1 BOOT
[141] VCCGT_PWM2 PWM GT2@0.22u/25V_4
B PR1405 *Short_0402 2 7 PL1033 +VCC_GT B
[141,142,143] DRVEN_F SMOD# PHASE GT2@0.15uH/33.5A_7x7x3 C-[10/31]
R-[2/26] 16 Isat=50A,DCR=0.85mohm+/-5% 22u/6.3V_8-->22u/6.3V_6
VSWH#1 24 86941_SW9 1 2
VSWH#2
PGND#1
PGND#2
PGND#3

PTP1028 6

GT2@0.1u/16V_4
NC
AGND

PTP1029 30 PTP1030

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
THWN

PC1762

PC1763

PC1764

PC1765

PC1766
PTP1031 31 27 PR1406 PR1407 +
DISB# GL#1 *Short_0201 *Short_0201 PC1767
PR1408 GT2@330u/2V_7343H1.9
12
28
32
4

*GT2@10_1%_4
PTP1032

ISEN2N_GT [141]
PC1769
*GT2@470p/25V_2
PR1409
GT2@1.1K_1%_4 PC1768 PR1410

PR1411 GT2@0.1u/16V_4 *GT2@6.98K_1%_4


GT2@1.1K_1%_4
ISEN2P_GT [141]

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom VCCGT_2 ADL A1A

Date: Monday, March 21, 2022 Sheet 143 of 150


5 4 3 2 1
5 4 3 2 1
+VIN [16,45,112,113,114,123,127,131,141,142,143,145,146]
VID1 VID0 O/P

144
+VCCIN_AUX [13]
PR1412
*0_5%_4 0 0 0V +5V_S5 [87,88,89,113,114,126,127,130,131,141,142,143]
+3V_S5 +3V_S5 [13,16,19,20,45,61,74,86,87,88,89,91,96,113,123,124,126,129,131,146]
0 1 1.1V +3V [2,6,9,11,12,15,21,29,32,44,45,48,53,55,61,64,68,74,86,87,88,91,93,96,97,113,114,123,126,130,131,141]

1 0 1.65V +VIN_VCCIN_AUX +VIN


PR1413 PR1414
*100K_1%_2 *100K_1%_2 1 1 1.8V PR1415
D Default 2.2_5%_6 R-[2/26] D
VCCIN_AUX_VID0 VCCIN_AUX_VID1 RT6543_VSYS

PJ1009

10u/25V_6

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
PC1774 *short3720

PC1775

PC1770

PC1771

PC1776

PC1777

PC1772

PC1778
C-[10/25]
PR1416 PR1417 OCP~45A@LMOS=3.5m 0.1u/25V_4
*100K_1%_2 *100K_1%_2
PU1039

20
PR1418 RT6543BGQW
274K_1%_2 VAUX total BOM with EE:

VSYS
RT6543_CS_DSI 1 a. 1pcs 330uF/6m
DNS siince P/H CS_DIS 11 RT6543_UG PR1419 C-[10/25] b. 18pcs 22uF/0603 MLCC includ EE side
UGATE
on EE side 1_5%_6
PQ1005 Modification of AOS Isat=41A c. Reserve 4pcs 22uF/6.3V MLCC
PR1421 PC1779 DCR=2.1m-ohm+/-7%

2
RT6543_BOOT
supply requirements +VCCIN_AUX
5.1_1%_6 10 AONY36354
RT6543_VCC 15 BOOT PL1034
+5V_S5 PVCC
PC1773 0.1u/25V_4 1 0.22uH/23A_7x7x3
RT6543_PH RT6543_PH
Q1
PR1481 10K_1%_2 1u/6.3V_4 12 9

330u/2.5V_7343H1.9
+3V_S5 PH
16
PR1420 *10K_1%_2 VCC 8 PR1479

0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
C +3V C
13 RT6543_LG Q2
PR1422 *Short_0201 +

PC1780

PC1783

PC1781

PC1784

PC1785

PC1782
PR1423 RT6543_PG 4 LGATE *2.2_5%_6
[86,124] VCCIN_AUX_PG PGOOD

7
6
5
*Short_0201 PR1478
R-[2/26] 14 *Short_0201
PR1424 RT6543_VID1 17 PGND
[13,16] VCCIN_AUX_VID1 *Short_0201 VID1
PR1425 RT6543_VID0 18 2 RT6543_ISP PC1786

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
[13,16] VCCIN_AUX_VID0 *Short_0201 VID0 ISENSEP PR1427 *2200p/25V_2 ISEN1N_VCCAUX

PC1787

PC1789

PC1788

PC1790
*0_5%_4 ISEN1P_VCCAUX
PR1426 *10K_1%_4 RT6543_EN 19 3 RT6543_ISN R-[2/26]
[21,22,86,113,114,123,146] SUSON EN ISENSEN PR1429
R-[2/26] LMOS(max)=3.5m *Short_0402 +VCCIN_AUX
PR1428 PC1791 8 RT6543_VOUT
[86,123] HWPG_1.8VS5 *Short_0201 *0.1u/16V_4 VOUT

PR1430 *0_5%_2 5 RT6543_COMP PR1433


[86,113,114,123,124] MAINON COMP 100_1%_2
RT6543_FSWSEL 9 PC1792 PR1431 PC1793 PR1432
+5V_S5 FSWSEL 6 2200p/50V_4 10K_1%_4 *470p/50V_4 *1.4K_1%_4
B
PR1434 FB PR1437 *Short_0201 B
VCC_AUX_SENSE [13]
*100K_1%_4
PR1435 AGND 7 PC1794 PR1436 PR1472 *Short_0201
RGND VSS_AUX_SENSE [13]
*100K_1%_4 27p/50V_4 6.34K_1%_4 PC1795
RT6543_FB *0.1u/25V_4 R-[2/26]
PR1473
ADL-H45 (45W)
21

100_1%_2
RT6543_RGND
Performance PR1476
1 Φ RT6543_ISP
9.09K_1%_4
ISEN1P_VCCAUX
ISEN1P_VCCAUX [141]

+VCCIN_AUX PR1470
*Short_0201
IPL2:18A PR1480
ICCMAX:34A PC1800 PC1799 357_1%_4
OCP:45A *0.01u/50V_4 0.22u/10V_4
L/L=-2.0mV/A
A
Quanta Computer Inc. A
2

PR1469
PR1477
909_1%_4 PR1471
PROJECT : ZGN
*Short_0201 10K_NTC_4_1% Size Document Number Rev
1

RT6543_ISN ISEN1N_VCCAUX
ISEN1N_VCCAUX [141] Custom VCCIN_AUX IC (RT6543AGQW) A1A

Date: Monday, March 21, 2022 Sheet 144 of 150


5 4 3 2 1
5 4 3 2 1

VO2 (-4 Volt) (-8~-1)


VO1 (4.6 Volt)
TDC : 0.98A
PEAK : 1.3A
3201_LDO

PC9825
OLE@1u/25V_4
PC9826
OLE@4.7u/25V_6
+VIN

PC9827
OLE@22u/25V_8
VO2
TDC : 2.7A
PEAK : 3.6A
Width : 144mil
145
Width : 40mil cloase to Pin27/28/29 FSW : 1.145MHZ
(VO2_S/3)
D
FSW : 1.432MHZ OLED ELVSS D

OLED ELVDD
SAM request:

2
VO1 VR:30V, IF(ON):2.0A
PD9800
PL9802 OLE@SDM2U30CSP-7 PL9803
OLE@2.2uH/3.2A_3.2x2.5x1.2 2nd source: OLE@2.2uH/3.2A_3.2x2.5x1.2
BC207M1QZ00 Isat=4A,DCR=70mohm NSR20F30NXT5G Isat=4A,DCR=70mohm

37

36

35

34

33

32

31

30

29

28

27

1
DIODE TVS 1 2 1 2
PE4207M1Q HMMQ32251B-2R2MS HMMQ32251B-2R2MS

E-PAD

AVIN
PGND1#2

PGND1#1

NC2

PGND2

VO2_3#2

VO2_3#1
VO1_FBS

VO2_S
VLDO
1

(7.8V,21A,30KV)
SAM request: IDC 4.3A
PD9801 PC9828 PC9829 PC9830
SAM request: OLE@PE4207M1Q OLE@22u/25V_8 OLE@22u/25V_8 OLE@22u/25V_8 PQ9804
6VClamp TVS Diode 1 26
2

LX1#1 LX2_3#2 1 8
2 25 PC9831
LX1#2 LX2_3#1 OLE@0.22u/25V_4 2 7

Tr1
+VIN PC9832 3 24
OLE@0.22u/25V_4 BST1 BST2_3 3 6
4 PU9802 23
PVIN1#1 DRV3 4 5 +VIN

Tr2
PC9833 PC9834 PC9835 PC9836 5 OLE@SM3201C 22
PL9804 PVIN1#2 DRV2 OLE@QH8K22TCR
OLE@10u/25V_8 OLE@10u/25V_8 OLE@10u/25V_8 OLE@10u/25V_8 OLE@4.7uH/1.5A_2.0x1.6x1.0 6 21
C PVIN2 BST2_2 C
Isat=1.9A,DCR=210mohm PC9837
7 20 OLE@0.22u/25V_4 PL9805 PC9839 PC9841
HTTX20161T-4R7MDR LX2_1 LX2_2#2 OLE@2.2uH/3.2A_3.2x2.5x1.2
SAM request: ISAT 1.6A 8 19 1 2 OLE@10u/25V_8 PC9840 OLE@10u/25V_8 PC9842
BST2_1 LX2_2#1
Isat=4A,DCR=70mohm

VO2_2#1

VO2_2#2
nEN2PH
PC9838 HMMQ32251B-2R2MS OLE@10u/25V_8 OLE@10u/25V_8

SWIRE
VO2_1

AGND
OLE@0.22u/25V_4

NC3

NC4

NC1
nFD
9

floating 10

11

12

13

14

15

16

17

18
SAM request:
VR:30V, IF(ON):2.0A

OLE@0_5%_2

OLE@0_5%_2

1
PD9802
OLE@SDM2U30CSP-7

SWIRE_C
PC9843
OLE@22u/25V_8 2nd source:
VO2

2
cloase to Pin17/18 NSR20F30NXT5G
(VO2_2#1/#2) -4 Volt (-8~-1)

PR9829

PR9830
TDC : 3.6A
VO2 Width : 144mil
B FSW : 1.145MHZ B

OLED ELVSS
PC9844
OLE@22u/25V_8
cloase to Pin9

SWIRE_C PR9833 OLE@0_5%_2


SWIRE [45]

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom SM3201C>OLED A1A

Date: Monday, March 21, 2022 Sheet 145 of 150


5 4 3 2 1
5 4 3 2 1

LDO=5V/100mA

VDR
PU4013
SY8388C3RHC
2
R-[2/26]
+VIN
146
VDR 12 IN#1 3 +5V_DDR
LDO IN#2
5 Volt +/- 5%

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
4 PJ4017
D IN#3 D

PC4140

PC4141

PC4142

PC4143

PC4144
*short3720
PC4139 TDC : 3A
4.7u/10V_4 +5V_DDR
PR4114 PEAK : 4A
*0_5%_2
8C_PG 7
Width : 320mil
[86] HWPG_5VDIMM PG PR4115 PC4145 FSW : 600KHZ
+3V_S5 PR247 *Short_0603 0.1u/25V_4
19V ADP, EN2=4.39V 10K_1%_2 1 8C_BS 8C_BS_S PL4007 PJ4018
4S BATT(min), EN2=2.77V 8C_EN2 8 BS 1.5uH/9A_7x7x3 *short3720
+VIN EN2
3S BATT(min), EN2=2.08V VEN,H=1V R-[2/26] Isat=18A,DCR=14mohm R-[2/26]
2S BATT(min), EN2=1.39V PR4116 5 8C_LX 1 2 +5V_DDR_SRC
499K_1%_4 PR4117 LX#1 15
LX#2 16

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

0.1u/16V_4
150K_1%_4
LX#3

PC4146

PC4147

PC4148

PC4149

PC4150

PC4151

PC4152
PR4118 PR4119
*4.7_5%_6 *Short_0201
R-[2/26] PR4120
*Short_0201 R-[2/26]
8C_EN1 9
[21,22,86,113,114,123,144] SUSON EN1
PR4126 PC4154
*0_5%_2 PC4153 *680p/50V_6
0.1u/16V_4
[12,16,21,22,86,114] SUSC#
C C
PR4129 11 8C_OUT
*0_5%_2 OUT
8C_VCC 13
[12,114] SLP_DRAM# VCC
VCC=3.6V
10 8C_FF PC4155 PR4121

GND#1
GND#2
FF

EPAD
PC4156 220p/50V_4 10_1%_4
2.2u/10V_4

6
14
17
PR4122
*1K_1%_4
PR4123
*1.5M_1%_4

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom DDR5 DIMM (SY8388C) A1A

Date: Monday, March 21, 2022 Sheet 146 of 150


5 4 3 2 1
5 4 3 2 1

147

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 147 of 150
5 4 3 2 1
5 4 3 2 1

148

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom GPIO A1A
Date: Monday, March 21, 2022 Sheet 148 of 150
5 4 3 2 1
5 4 3 2 1

VL
3V_LDO enable
149
+5V
MAINON enable
+5VPCU LOAD SW
3V_LDO enable JW7110DFNC_TRPBF
D
+5V_S5 D

System Power 3V_LDO S5_ON enable


RT6575AGQW P.113
AC/DC Insert enable
+3V
LOAD SW MAINON enable
Power Tree Table +3VPCU JW7110DFNC_TRPBF +1.8V
3V_LDO enable +3V_S5 PWM converter +1.8V_S5
LOAD SW MAIND enable
S5_ON enable JW5222RSOTB_TRPBF S5_ON enable AOSS32334C

Smart P.113 P.123 P.123


Charger P.113 +1.2VSUS
BAT-V BQ24780SRUYR PWM converter
SUSON enable
JW5222RSOTB_TRPBF
P.112 DDR_VTT P.123
DDR power no use
PWM converter +VNN_EXT
+VA G5619RZ1U +VDDQ VCCIN_AUX_PG enable
no use SYV659LQWC
P.123
+VDD2_1.1V_1.2V_SUS +1.05V_EXT
C
+VAC_IN P.114 SUSON enable PWM converter VCCIN_AUX_PG enable C
AONS21357
SYV659LQWC
PQ9001
PQ9007 p106
+VCCIN_AUX P.123
+VCCIN_AUX
HWPG_1.8VS5 enable +1.8V_AON
TYPEC1_USB0 AONS21357
RT6543BGQW
PWM converter 1V8_AON_EN enable
PQ9002 SY8386RHC P.131
PQ9006 p106 P.144
+VCC_CORE
VRON enable
CPU POWER
RT3624BEGQW
AOZ5016QI*6

+VCC_GT +VCC_GT
AOZ5016QI*2 VRON enable
P.141,142,143

+5V_DDR
DDR5 DIMM SUSON enable
B SY8388C3RHC B

P.146

VO1,VO2
OLED panel MAINON enable
SM3201C

P.145

GPU POWER NVVDD


NCP81610MNTXG+ NVVDD_CORE1_EN enable
NCP303150MNTWG*5
NCP45495XMNTWG

P.126,127,129

VRAM POWER
A
+FBVDDQ_MEM A

NCP81278TMNTXG+ FBVDD_EN enable


AOE6936*4

Quanta Computer Inc.


PROJECT : ZGN
Size Document Number Rev
Custom POWER TREE TABLE A1A
Date: Monday, March 21, 2022 Sheet 149 of 150
5 4 3 2 1
5 4 3 2 1

HDMI-ADL DP-NV Sensor


000
[2] IN_CLK TTPP1 [29] DP_D3# TTPP27 [10] TOF_RESET# TTPP22
[2] IN_CLK# TTPP4 [29] DP_D3 TTPP30 [6] 5GorAP_P_INT# TTPP25
[2] IN_D0 TTPP7 [29] DP_D2# TTPP33 [45] LID#_DB TTPP51
[2] IN_D0# TTPP10 [29] DP_D2 TTPP36 [45] LID#_GMR_DB TTPP54
D [2] IN_D1 TTPP13 [29] DP_D1# TTPP39 [91] ISH_TOF_INT#_R TTPP106 D
[2] IN_D1# TTPP15 [29] DP_D1 TTPP42 [91] ISH_I2C1_SDA_R TTPP107
[2] IN_D2 TTPP18 [29] DP_D0# TTPP45 [91] ISH_I2C1_SCL_R TTPP108
[2] IN_D2# TTPP20 [29] DP_D0 TTPP48
[2] DPB_DDCCLK TTPP21 [29] INT_DP_AUXN_Q TTPP50
[2] DPB_DDCDATA TTPP23 [29] INT_DP_AUXP_Q TTPP53
[2] HDMI_HPD_CON TTPP125

TCP
[2] TCP2_TXRX_P1 TTPP26
EC
[86] ADP1_DET TTPP115
NFC
[6] NFC_SCL TTPP56
[2] TCP2_TXRX_N1 TTPP29 [86] ADP2_DET TTPP116 [6] NFC_SDA TTPP58
[2] TCP2_TXRX_P0 TTPP32 [86] VGPU_ICMNT TTPP117 [11] NFC_IRQ TTPP60
[2] TCP2_TXRX_N0 TTPP35 [86] battery_learn TTPP118 [9] NFC_RST# TTPP63
[2] TCP2_TX_P1 TTPP38 [86] SUSLED#_TP TTPP119
[2] TCP2_TX_N1 TTPP41 [86] 80PORT_DAT TTPP135
[2] TCP2_TX_P0 TTPP44
[2] TCP2_TX_N0 TTPP47
[2] TCP2_AUX_DP TTPP49
C C
[2] TCP2_AUX_DN TTPP52
[2] TBT_LSX2_TXD TTPP112

PCIE
[10] PCIE_TXP12/SATA1_TXP TTPP64
MIPICCD
[15] MIPICCD_DET# TTPP121
5G[9] GPS_DISABLE# TTPP81
[10] PCIE_TXN12/SATA1_TXN TTPP65 [6] MIPICCD_EN TTPP122 [2] WWAN_RST_EC_ODL TTPP83
[10] PCIE_RXP12/SATA1_RXP TTPP67 [11] MIPI_CSI_DP1 TTPP126 [11] 5G_CARD_PWR_EC TTPP85
[10] PCIE_RXN12/SATA1RXN TTPP69 [11] MIPI_CSI_DN1 TTPP127 [2] WWAN_PERST_EC_L TTPP87
[10] PCIE_TXP10 TTPP76 [11] MIPI_CSI_DP0 TTPP128 [86] I2C_PSENSOR_A_INT#_EC TTPP91
[10] PCIE_TXN10 TTPP78 [11] MIPI_CSI_DN0 TTPP129 [10] 5G_CARD_PWR_CTL TTPP113
[10] PCIE_RXP10 TTPP79 [11] MIPI_CSI_CLKP TTPP130 [11] WWAN_WAKE_ODL TTPP114
[10] PCIE_RXN10 TTPP80 [11] MIPI_CSI_CLKN TTPP131 [12] WWAN_RF_DISABLE_ODL TTPP136
[10] PCIE_TXP8 TTPP82 [12] MIPI_PWR_MS# TTPP132
[10] PCIE_TXN8 TTPP84 [6] MIPICCD_I2C_SCL TTPP133
[10] PCIE_RXP8 TTPP86 [6] MIPICCD_I2C_SDA TTPP134
[10] PCIE_RXN8 TTPP88
[10] PCIE_TXP7 TTPP90
B [10] PCIE_TXN7 TTPP92 B
[10] PCIE_RXP7 TTPP93
[10] PCIE_RXN7 TTPP94
[10] PCIE_TXP6 TTPP96
[10]
[10]
PCIE_TXN6
PCIE_RXP6
TTPP98
TTPP99 Smart Card
[10]
[10]
[10]
PCIE_RXN6
PCIE_TXP5
PCIE_TXN5
TTPP100
TTPP102
TTPP103
Intel LAN
[12] SLP_LAN# TTPP137
[12] SmartCard_PWRSV#
[9] SmartCard_ON
TTPP75
TTPP77

[10] PCIE_RXP5 TTPP104


[10] PCIE_RXN5 TTPP105

CLK
[11] CLK_PCIE_SSD2P TTPP8
AML
[11] CLK_PCIE_SSD2N TTPP11 [86] AML_EC_PCH_CLK TTPP139
[11] PCIE_CLKREQ_2# TTPP16 [86] AML_EC_PCH_DATA TTPP141
A
Quanta Computer Inc. A
Debug Card
[86] 80PORT_CLK TTPP97 PROJECT : ZGN
Panel
[6] Privacy_EN TTPP101
Size Document Number Rev
A TEST POINT A1A

Date: Thursday, May 26, 2022 Sheet 150 of 150


5 4 3 2 1

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