Mpi V Sem It Guess Paper Solutions

Arya Institute of Engineering & Technology, Jaipur
Guess Paper V Semester (2021-2022)

5IT3-01: MICROPROCESSOR & INTERFACES
(BRANCH: IT)
Unit 1:
Short Answers: (2 Marks Each)

Q.1 What is a Microprocessor? What is difference between Microprocessor and CPU?
Ans.
Q.2 Specify the number of registers in 2K memory chip?
Ans. 2048 Register
Q.3 Explain Flag Register bit format?
Ans.
Flag Register Bit Format
Descriptive Answers: (5 Marks)

Q1. Explain Bus concept and organization with the help of suitable diagram?
MPI Guess Paper Solution Prepared By: Abha Sharma

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Ans.

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Q2. Explain the requirement of a program counter and stack pointer in the architecture of Intel 8085
microprocessor?
Ans. There are two 16-bit registers used to hold memory addresses. The size of these registers is
16 bits because the memory addresses are 16 bits. They are :-
Program Counter: This register is used to sequence the execution of the instructions. The
function of the program counter is to point to the memory address from which the next byte
is to be fetched. When a byte (machine code) is being fetched, the program counter is
incremented by one to point to the next memory location.
Stack Pointer: It is used as a memory pointer. It points to a memory location in read/write
memory, called the stack. It is always incremented/decremented by 2 during push and pop
operation.

Q.1 Draw the architecture of 8085 microprocessor and its internal data operation?

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Ans.

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Q2. Explain the memory interfacing of 256 bytes? Explain how the range can be changed by
modifying the hardware?

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Ans.

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Unit 2:
Short Answers :(2 Marks Each)
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Q.1 What is stack? State its significance?
Ans. The stack is a LIFO (last in, first out) data structure implemented in the RAM area and is
used to store addresses and data when the microprocessor branches to a subroutine. Then the return
address used to get pushed on this stack. Also to swap values of two registers and register pairs we
use the stack as well.
In the programmer‘s view of 8085, only the general purpose registers A, B, C, D, E, H, and L, and
the Flags registers were discussed so far. But in the complete programmer’s view of 8085, there
are two more special purpose registers, each of 16-bit width. They are the stack pointer, SP, and
the program counter, PC. The Stack Pointer register will hold the address of the top location of the
stack. And the program counter is a register always it will hold the address of the memory location
from where the next instruction for execution will have to be fetched. The complete programmer's
view of 8085 is shown in the following figure.
SP is a special purpose 16-bit register. It contains a memory address. Suppose SP contents are
FC78H, then the 8085 interprets it as follows.
Memory locations FC78H, FC79H, ..., FFFFH are having useful information. In other words, these
locations are treated as filled locations. Memory locations FC77H, FC76H, ..., 0000H are not
having any useful information. In other words, these locations are treated as empty locations.
On a stack, we can perform two operations. PUSH and POP. In case of PUSH operation, the SP
register gets decreased by 2 and new data item used to insert on to the top of the stack. On the
other hand, in case of POP operation, the data item will have to be deleted from the top of the stack
and the SP register will get increased by the value of 2.
Q.2 Find out the Machine cycle and T states for following Instruction:-
ADD M ii) MVI M,45H iii) LXI H, C700H.
Ans. Instruction
a) ADD M 2( Machine Cycle) 7(T-state)

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b) MVI M,45H 3( Machine Cycle) 10(T-state)

c) LXI H, C700H 3( Machine Cycle) 10(T-state)
Q3. Explain difference between conditional and unconditional instruction?
Ans. Conditional Jump
If some specified condition is satisfied in conditional jump, the control flow is transferred to a
target instruction. There are numerous conditional jump instructions depending upon the condition
and data. Conditional Jump Instructions are an important aspect of the decision making process in
programming. These Instruction test for a certain condition (e.g., Zero or Carry Flag) and alter the
program sequence when the condition is met. The conditional Jump instruction check the flag
conditions and make decisions to change or not to change the sequence of the program.In
conditional jump instruction, status conditions at the time of jump instruction execution decide
whether or not the jump will occur.
Unconditional jump
In unconditional jump instruction, as the instruction is executed, the jump always ready to takes
pace to change the execution sequence. This is performed by the JMP instruction. Conditional
execution often involves a transfer of control to the address of an instruction that does not follow
the currently executing instruction. Transfer of control may be forward, to execute a new set of
instructions or backward, to re-execute the same steps. The assembler determines the smallest
encoding possible for the direct unconditional jump. It is the unconditional jump that executes
regardless of the state of all flags. So we write an unconditional jump as the very first instruction
of our program and jump to the next instruction that follows our data declarations.

Q1. Explain the operational difference between the following pair of instruction?
i) SPHL and PCHL

ii) CALL and JMP
Ans. I) SPHL and PCHL

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iii) CALL and JMP

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Q2. Define opcode and operand? Explain opcode and operand in MOV H,L? (ch2,2)
Ans. An opcode is short for 'Operation Code'.
An opcode is a single instruction that can be executed by the CPU. In machine language it is a
binary or hexadecimal value such as 'B6' loaded into the instruction register.
In assembly language mnemonic form an opcode is a command such as MOV or ADD or JMP.
For example
MOV AL, 34h
The opcode is the MOV instruction. The other parts are called the 'operands'.
Operands are manipulated by the opcode. In this example, the operands are the register named AL
and the value 34 hex.
MOV H,L
Opcode: MOV Operand: H,L

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Q1. Define Machine Cycle? What are the different types of machine cycle used for calculation of T-
States? Explain Opcode Fetch machine Cycle with Timing diagram?
Ans.
The time required by the microprocessor to complete an operation of accessing memory or

input/output devices is called machine cycle. One time period of frequency of microprocessor is
called t-state. A t-state is measured from the falling edge of one clock pulse to the falling edge of
the next clock pulseMachine Cycle in 8085:
The seven Machine Cycle in 8085 are :
1. Opcode Fetch
2. Memory Read
3. Memory Write
4. I/O Read
5. I/O Write
6. Interrupt Acknowledge
7. Bus Idle
1. Opcode Fetch Machine Cycle 8085:
The first Machine Cycle in 8085 of every instruction is opcode fetch cycle in which the 8085 finds
the nature of the instruction to be executed. In this Machine Cycle in 8085, processor places the
contents of the Program Counter on the address lines, and through the read process, reads the
opcode of the instruction.
2.Memory Read Cycle:
The 8085 executes the memory read cycle to read the contents of R/W memory or ROM. The
length of this machine cycle is 3-T states (T1 – T3). In this Machine Cycle in 8085, processor places
the address on the address lines from the stack pointer, general purpose register pair or program
counter, and through the read process, reads the data from the addressed memory location.
3.Memory Write Cycle:
The 8085 executes the memory write cycle to store the data into data memory or stack memory.
The length of this machine cycle is 3T states. (T 1 — T3). In this Machine Cycle in 8085, processor
places the address on the address lines from the stack pointer or general purpose register pair and
through the write process, stores the data into the addressed memory location.
4, 5. I/O Read and I/O Write cycles:

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The I/O read and I/O write machine cycles are similar to the memory read and memory write
machine cycles, respectively, except that the 10/M signal is high for I/O read and I/O write machine
cycles. High IO/M signal indicates that it is an I/O operation.
6. Interrupt Acknowledge Cycle of 8085:
In response to INTR signal, 8085 executes interrupt acknowledge machine cycle to read an
instruction from the external device. Theoretically, the external device can place any instruction
on the data bus in response to INTA. However, only RST and CALL, save the PC contents (return
address) before transferring control to the interrupt service routine. The next sections explain
Interrupt Acknowledge Cycle of 8085 for RST and CALL instruction.
Q2. Draw the timing diagram of MVIA, 32H?
Ans.

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Unit 3
Short Answers:(2 Marks Each)
Q.1 What is the difference between Macros and Subroutine? Explain with examples?
Ans. Subroutines and Macros work similarly, they have subtle differences. Any logic may use
both macros and subroutines. The main difference is in the way they are used. Only subroutines
can be used when you need to pass arguments, get a return value, or activate the independent
execution of logic. Only macros can be used when defining run-time interface parameters.
Macros may be used in any expression field, but the macro may only contain an expression (i.e.,
Entries(LOC1), U(5,1)). When a macro is used in a logic field, the macro may include any logic
element valid in that logic field. Subroutines may also be used in an expression field provided that
the RETURN statement is used to return a value to the expression field. When a subroutine is used
to represent one or more logic statements, the subroutine may only include statements valid for the
particular context.
Q.2 Explain PUSH and PULL instruction?
Ans. PUSH B (1 Byte Instruction)

– Decrement SP
– Copy the contents of register B to the memory location pointed to by SP
– Decrement SP
– Copy the contents of register C to the memory location pointed to by SP
POP D (1 Byte Instruction)

– Copy the contents of the memory location pointed to by the SP to register E
– Increment SP
– Copy the contents of the memory location pointed to by the SP to register D
– Increment SP
Descriptive Answers: (5 / 20 Marks)

Q.1 Draw the diagram of interrupt structure of 8085 MPU?

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Ans.
Q.2 Draw block diagram of 8259 Programmable Interrupt Control and explain function of various
block?
Ans.

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Q.3 Write a Program that will display FF and 11 repeatedly on the seven segment display. Write a
‘delay’ subroutine and Call it as necessary.
Ans. C000:
LXISP FFFF
C003: MVIA FF
C005: OUT 00
C007: CALL 14 20
C00A: MVIA 11
C00C: OUT 00
C00E: CALL 14 20
C011: JMP 03 C0
DELAY: C014: MVIB FF
C016: MVIC FF

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C018: DCR C
C019: JNZ 18 C0
C01C: DCR B
C01D: JNZ 16 C0
C020: RET
Q.4 Examine the delay for the given program?
Ans.

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Unit 4:

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Q1. Write differences between CALL AND RET instructions.

Q2. Compare PUSH and POP instruction.
Q1. Write a program to provide the given on/off time to three traffic lights (Green, Yellow and
Red) and two pedestrian signs (WALK and DON’T WALK). The signal lights and signs are turned
on/off by the data bits of an output port as shown below:
Lights Data bits On Time
1. Green D0 15 Seconds
2. Yellow D2 5 Seconds

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3. Red D4 20 Seconds
4. WALK D6 15 Seconds
5. DON’T WALK D7 25 Seconds
The traffic and pedestrian flow are in the same direction: the pedestrian should cross the road
when the Green light is on.
Answer

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Q2. A BCD number between 0 and 99 is stored in an R/W memory location called the INBUF. Write
a main program and a conversion subroutine (BCDBIN) to convert the BCD number into its
equivalent binary number. Store the result in a memory location defined ad OUTBUF.
Ans

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Unit 5:
Q1. What is difference between 8253 and 8254?
Ans.
Q2. Compare Memory mapped I/O and peripheral I/O?
Ans. Difference b/w Memory Mapped I/O and Peripheral Mapped I/O are given below.
Memory Mapped I/O:-
- 16-bit device address

- Data transfer between any general-purpose register and I/O port.
- The memory map (64K) is shared between I/O device and system memory.

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- More hardware is required to decode 16-bit address

- Arithmetic or logic operation can be directly performed with I/O data
Peripheral Mapped I/O:-
- 8-bit device address

- Data is transfer only between accumulator and I.O port
- The I/O map is independent of the memory map; 256 input device and 256. output
device can be connected
- Less hardware is required to decode 8-bit address
- Arithmetic or logical operation cannot be directly performed with I/O data
Q3. Explain control word format of 8255A for I/O Mode?
Ans

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Descriptive Answers: (5 /20 Marks)
Q1. Explain various programming modes of 8279 keyboard and display controller.

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Ans.

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Q. 2 Explain the control word of 8254 PPI with example. Also explain the operation mode of
8254 with diagram?
Ans.
Block Diagram of 8254

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Q3. Interface the keyboard with seven segment LED using 8255?
Ans.

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Q.4 Write instruction to generate a 1kHz square wave from counter1 . Assume the gate of the
counter 1 is tied to +5V through a 10K register. Explain its significance of connecting the gate
to +5V.
Ans.

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Q.3 What is interrupt? How it is processed? Explain it with EI and DI instructions.
Ans

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Q4. Explain RST instruction, also make the circuit diagram for RST 5
Answer:’

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Q5. Explain RIM and SIM instructions?

Answer

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Q4. Explain the execution of RAL,RLC,RRC instructions.
Q5. Assume the accumulator contents are AAH and CY=0. Illustrate the accumulator contents
after the execution of RLC instruction and RAL instruction twice.
Answer 4,5

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Arya Institute of Engineering & Technology, Jaipur

Guess Paper V Semester (2021-2022)

Short Answers: (2 Marks Each)

Q.2 Specify the number of registers in 2K memory chip?

Ans. 2048 Register

Q.3 Explain Flag Register bit format?

Flag Register Bit Format

Descriptive Answers: (5 Marks)

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

Descriptive Answers: (20 Marks)

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

Q.1 What is stack? State its significance?

ADD M ii) MVI M,45H iii) LXI H, C700H.

a) ADD M 2( Machine Cycle) 7(T-state)

MPI Guess Paper Solution Prepared By: Abha Sharma

b) MVI M,45H 3( Machine Cycle) 10(T-state)

Q3. Explain difference between conditional and unconditional instruction?

Ans. Conditional Jump

Descriptive Answers: (5 Marks)

i) SPHL and PCHL

Ans. I) SPHL and PCHL

MPI Guess Paper Solution Prepared By: Abha Sharma

iii) CALL and JMP

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

Ans. An opcode is short for 'Operation Code'.

Opcode: MOV Operand: H,L

MPI Guess Paper Solution Prepared By: Abha Sharma

Descriptive Answers: (20 Marks)

The time required by the microprocessor to complete an operation of accessing memory or

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

Q.2 Explain PUSH and PULL instruction?

Ans. PUSH B (1 Byte Instruction)

POP D (1 Byte Instruction)

Descriptive Answers: (5 / 20 Marks)

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

Short Answers:(2 Marks Each)

MPI Guess Paper Solution Prepared By: Abha Sharma

Q1. Write differences between CALL AND RET instructions.

Descriptive Answers: (5 Marks)

Lights Data bits On Time

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5. DON’T WALK D7 25 Seconds

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma

MPI Guess Paper Solution Prepared By: Abha Sharma