Professional Documents
Culture Documents
AV51DOT0
AV51DOT0
0-2008
Secretariat
Secretariat
VMEbus International Trade Association
Abstract
This document provides an electronics failure rate prediction standard, and
establishes a Community of Practice. It addresses the limitations of existing
prediction practices with a series of subsidiary specifications that contain the “best
practices” within industry for performing electronics failure rate predictions. The
development of ANSI/VITA 51.0 and the subsidiary specifications is an effort to give
the mean time between failure (MTBF) calculations consistency and repeatability.
American Approval of an American National Standard requires
verification by ANSI that the requirements for due process,
National consensus, and other criteria for approval have been met by the
Standard standards developer.
Published by
No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise,
without prior written permission of the publisher.
Printed in the United States of America - R1.0
ISBN 1-885731-46-9
ANSI/VITA 51.0-2008
Lori Bechtold
Boeing
Working Group Chair and Draft Editor
Charles Falardeau
Curtiss-Wright Controls
Working Group Chair (2005-2007)
Dan Quearry
Naval Surface Warfare Center, Crane
Working Group Vice Chair
Name Company
Shawn Ashley Naval Surface Warfare Center, Crane
Ken Bernier Defense Supply Center, Columbus (DSCC)
John Bonitatibus Defense Supply Center, Columbus (DSCC)
Steve Cecil Naval Surface Warfare Center, Crane
Robert Deppe Boeing
Chris Eckert GE Fanuc
Andy Ernst Defense Supply Center, Columbus (DSCC)
Tom Forth Moog
Jesse Garcia Defense Supply Center, Columbus (DSCC)
Jeff Harms Naval Surface Warfare Center, Crane
Derek Johnson Raytheon
Chi Lam Northrop Grumman
Doug Loescher Sandia
Paul Majchrzak Moog
Chuck Miese Moog
Peter Miskelly GE Fanuc
Mark Mooder Curtiss-Wright Controls, Ottawa
Elwood Parsons Foxconn
Mark Porter General Dynamics
Sheila Prather Northrop Grumman
Michael Radecki Defense Supply Center, Columbus (DSCC)
Rob Rainen Curtiss-Wright Controls, Santa Clarita
Blaine Schmidt Moog
Jonnie Schneider Defense Supply Center, Columbus (DSCC) QML
Hunter Shaw Relex Software Co.
Bahig Tawfellos Honeywell Aerospace
Gerry Thomas Naval Surface Warfare Center, Crane
Richard Wong Curtiss-Wright Controls, Santa Clarita
Table of Contents
1. Introduction................................................................................................................. 8
1.1 Overview............................................................................................................. 8
1.2 Scope................................................................................................................... 8
1.3 Purpose................................................................................................................ 9
2.1.4 Environment.............................................................................................. 13
3.1 Registration........................................................................................................20
5. References .................................................................................................................27
1. Introduction
This document provides an electronics failure rate prediction methodology and self-
assessment standard. It is the product of a collaborative effort by a working group in
the VMEbus International Trade Association (VITA), comprising representatives
from electronics suppliers, system integrator companies, and the Department of
Defense (DoD). In addition, independent industry participation and peer review was
included to provide the basis for development of this standard.
1.1 Overview
Failure rate predictions have been utilized by logistics and systems engineers for a
myriad of purposes, including reliability analysis, cost trade studies, availability
analysis, spares planning, redundancies modeling, scheduled maintenance planning,
product warrantees and guarantees.
In the 1950’s, electronics reliability models were derived and standardized by the
DoD through the analysis of historical failure data. In 1961, the first edition of MIL-
HDBK-217 [1] was published, providing a basic reliability analysis tool that is still in
use today.
In 1994, U.S. Secretary of Defense William Perry published his pivotal memorandum
titled “Specifications & Standards - A New Way of Doing Business.” [2] This memo,
and the changes in military acquisition that followed, caused many military standards
to be cancelled in favor of commercial standards and practices. A consequence of
this memo is the DoD is no longer updating MIL-HDBK-217, but is looking to
industry organizations to provide updated reliability prediction methods.
The VITA 51 working group was formed to investigate and develop an industry
standard to address electronics failure rate prediction. Where applicable, this
standard provides adjustment factors to existing standards. As new electronics
technology is developed, new methods will be developed, documented and added to
future releases of these standard and subsidiary specifications.
1.2 Scope
This document addresses the limitations of existing prediction practices, with a series
of subsidiary specifications that contain the “best practices” within industry for
performing electronics failure rate predictions.
This standard recognizes there are many industry reliability methods, each with a
custodian and acceptable practices to calculate electronics failure rate predictions. If
such a method is identified as requiring additional standards for use by electronics
module suppliers, a new subsidiary specification will be considered by the VITA 51
working group.
1.3 Purpose
This document provides an electronics failure rate prediction standard, and
establishes a Community of Practice.
Electronics failure rate predictions are typically used for comparative assessments,
reliability analysis, cost trade studies, availability analysis, spares planning,
redundancies modeling, scheduled maintenance planning, product warrantees and
guarantees. Reliability predictions are not meant to represent the field reliability (i.e.,
Mean-Time-Between-Maintenance, Mean-Time-Between-Removals, etc.).
The development of VITA 51.0 and the subsidiary specifications is an effort to give
the mean time between failure (MTBF) calculations some consistency and
repeatability.
All subsidiary specifications must support the main standard, and be consistent with
the purpose of the VITA 51.0 specification.
RULE
RECOMMENDATION
SUGGESTION
PERMISSION
OBSERVATION
Any text not labeled with one of these keywords is descriptive or narrative.
RULE <chapter>-<number>:
Rules form the basic framework of this specification. They are sometimes expressed
in text form and sometimes in the form of figures, tables, or drawings. All rules shall
be followed to ensure compatibility between reliability predictions. Rules are
characterized by an imperative style. The upper-case words “SHALL” and “SHALL
NOT” are reserved exclusively for stating rules in this specification and are not used
for any other purpose.
RECOMMENDATION <chapter>-<number>:
Wherever a recommendation appears, reliability practitioners would be wise to take
the advice given. Doing otherwise might result in some awkward problems or a poor
analysis. Recommendations found in this specification are based on experience and
are provided to speed the traversal of the learning curve. All recommendations use
the upper-case words “SHOULD” or “SHOULD NOT” to emphasize the importance
of the recommendation. The “SHOULD” or “SHOULD NOT” words are reserved
exclusively for stating recommendations and are not used for any other purpose.
SUGGESTION <chapter>-<number>:
A suggestion contains advice, which is helpful but not vital. The reader is
encouraged to consider the advice before discarding it. Some analysis decisions that
need to be made are difficult until experience has been gained. Suggestions are
included to help an analyst who has not yet gained this experience.
PERMISSION <chapter>-<number>:
In some cases a rule does not specifically prohibit a certain analysis approach, but the
reader might be left wondering whether that approach might violate the spirit of the
rule or whether it might lead to some subtle problem. Permissions reassure the reader
that a certain approach is acceptable and will cause no problems. The upper-case
word “MAY” is reserved exclusively for stating permissions in this specification and
is not used for any other purpose.
OBSERVATION <chapter>-<number>:
Observations do not offer any specific advice. They usually follow naturally from
what has just been discussed. They spell out the implications of certain rules and
bring attention to things that might otherwise be overlooked. They also give the
rationale behind certain rules so that the reader understands why the rule must be
followed.
2.1.4 Environment
The environment in which the system operates will have a significant effect on the
electronics failure rate and reliability prediction results. A reliability model will
include factors to account for the stresses imposed by a particular environment during
the life cycle of a product..
Reliability predictions based on stress and damage models rely on understanding the
mechanisms that will induce the identified failures, the loading conditions that can
produce the failure mechanisms, and the sites that are vulnerable to the failure
mechanism.
MIL-HDBK-217 was the original standard for reliability. It was designed to provide
reliability math models for nearly every conceivable type of electronic device. MIL-
HDBK-217 contains two methods of reliability prediction, parts stress analysis and
parts count. These methods vary in degree of information needed to apply them. The
parts count method requires less information, generally part quantities, quality level,
and the application environment. This method is applicable during the early design
phase and during proposal formulation. In general, the parts count method will
usually result in a more conservative estimate of system reliability than the parts
stress method. The parts stress analysis requires a greater amount of detailed
information and is applicable during the later design phase when actual hardware and
circuits are being designed.
The Telcordia reliability prediction model also supports the ability to perform a parts
count or part stress analysis, but in Telcordia, these different calculations are referred
PRISM® and 217PlusTM are commercially developed and marketed tools, thus their
model, handbook and background information is proprietary to RIAC and Wyle
Laboratories. The key advantages to using PRISM® or 217PlusTM are they have been
developed more recently than other models, they are supported by RIAC and they
have widespread recognition and use. The main disadvantage concerns issues of data
sharing. For example, if the reliability prediction is a deliverable product, such as a
report provided to a customer during a design development program, the customer
would also have to purchase the tool to be able to verify the prediction results.
2.3.4 FIDES
The consortium that developed the FIDES methodology was formed by French
industrialists from the fields of aeronautics and defense. This consortium was created
under the aegis of the Délégation Générale pour l'Armement (DGA, French armament
industry supervision agency). The FIDES methodology is based on the physics of
failures and supported by the analysis of test data, field returns and existing modeling.
The FIDES Guide aims to enable a realistic assessment of the reliability of electronic
equipment, including systems operating in severe environments (defense systems,
aeronautics, industrial electronics, transport, etc.). The FIDES Guide also aims to
provide a concrete tool to develop and control this reliability.
• Revealing and taking into consideration all technological and physical factors
that play an identified role in a product's reliability.
OBSERVATION 2.4-1:
Choosing one model or another is a decision which must be based on a wide array
of factors specific to your application. Mixing reliability prediction methods is an
approach that can take advantage of the best of each method, provide alternatives
for technologies and environments missing from a particular method, and can
improve the accuracy of the resulting analysis.
RECOMMENDATION 2.4-1:
Mixing methods can be problematic, and SHOULD NOT be done solely to
improve the apparent resulting reliability. The user is cautioned that the use of a
combination of reliability methods SHOULD be justified to the customer
requesting the analysis.
SUGGESTION 2.5-1:
The information contained in the reliability prediction report will include the
following as a minimum:
o Inputs or assumptions
o Prediction method
o Application
o Results
o Predicted MTBFs
RULE 2.5-1:
Along with the reliability prediction report, a completed “Reliability Prediction
Disclosure Statement” (found in VITA 51.0 Appendix A) SHALL be included
with the submitted reliability prediction report.
OBSERVATION 2.5-1:
The limitations of an analysis are important to understand and document. The
purpose of this form is to allow the customer to quickly determine how a
reliability prediction was performed. By reviewing which box is marked in the
“Summary Section”, the customer will know whether the prediction was
performed according to this standard, or with some exceptions, or if an alternate
prediction method was used (utilization of field data, for example).
The disclosure statement also includes areas referring to “Submitted by”, “Title”,
“Company Name”, and “Date” that will be completed by the organization that
performed the reliability prediction. This information is required for two reasons.
One, it provides point of contact information in case the customer has a question
related to the reliability prediction. Second, it also establishes some level of
accountability for the reliability prediction performed. The comments section of
the form may be used to capture any pertinent information that is not included in
the reliability prediction report.
3. Community of Practice
The VITA 51.0 specification was developed by a group of people with interest and
expertise in electronics reliability predictions, which came together with the common
goal to address certain specific problems with methods used for electronics reliability
prediction. This group formed a Community of Practice (CoP) in this area, and
worked together to develop a common, open standard based on their collective
knowledge. The continuation and growth of this CoP is a key part of the strategy to
assure future revisions of VITA 51.0 and the subsidiary specifications will be based
on best practices of a wider and growing group of industry specialists.
This section describes the CoP, how an interested person may join it and how it will
be used to improve future revisions of this standard and the subsidiary specifications.
3.1 Registration
Any reliability practitioner who uses VITA 51.0 for reliability predictions will be
invited to register with VITA 51 on the custodian website. After providing basic
contact information (name, phone, company, email address) the reliability practitioner
will be invited to provide further information about his or her experience and
company practices that will be used to enable the CoP to identify what expertise the
members can offer to each other. Providing this additional information will be
optional.
The VITA 51.0 registration will not be used to evaluate the practices of the
practitioner or the organization or company that he or she represents. It will be used
as a networking tool for members to find people who have the expertise to address
issues on reliability related subjects.
RULE 3.1-1:
The CoP database, list of users, and/or their contact information SHALL NOT be
utilized, shared or sold for commercial purposes.
RULE 3.1-2:
Answers provided for the CoP registration will be publicly available through
VITA. Information provided as part of the CoP registration SHALL NOT contain
company proprietary data/material.
been used in many various industries as a powerful and effective structure to address
common challenges the community face.
A CoP differs from a typical team in that the CoP members are usually volunteering
their time and energies to the CoP, and their cohesion is based on their common
dedication to their field of interest. A CoP is self-forming and self-sustaining, and
members define their own charter and rules of operation.
The purpose for the VITA 51 CoP is to develop and find best practices, to improve
member knowledge and effectiveness in performing reliability predictions and to
update and improve on the standard and subsidiary specifications. The VITA 51 CoP
will be formed by those who are interested and motivated to build on the VITA 51
standards by combining and integrating the talents of others who are interested in
participating. The VITA 51 CoP members will establish common electronics
reliability prediction practices, learn from their interaction with each other what new
prediction methods are being used, and combine their knowledge and experience to
improve on future iterations of the specification.
RULE 3.3-1:
General rules of operation of the CoP SHALL follow the VITA Policies and
Procedures [5]. Specific rules of operation of the CoP may be defined by the
membership, but SHALL NOT conflict with or cause a violation of VITA
Policies and Procedures.
The interactions and working relationships between CoP members will be aided by a
website, established and maintained by VITA. The website will host the registration
process, and provide information relevant and interesting to the CoP as well as links
to VITA and reliability industry resources that the CoP membership find useful. CoP
members will also have an opportunity to be on an email distribution for periodic
announcements and notices from VITA 51.
hardware item
Diagnostic All the capabilities associated with the detection and
Capability isolation of failures, including testability inherent to an
item, training, maintenance aiding, and technical
information
Mean Time Between - For a particular interval, the total functioning life of a
Failure (MTBF) population of an item divided by the total number of
failures within the population during the measurement
interval. The definition holds for time, cycles, miles,
events, or other measures of life units. (MIL-STD-721).
5. References
[1] Military Handbook (MIL-HBDK)-217F Notice 2, Reliability Prediction of
Electronic Equipment, February 28, 1995
[2] Perry, William J., Secretary of Defense, Specifications & Standards - A New Way
of Doing Business, June 29, 1994
[4] SR-332, Reliability Prediction Procedure for Electronic Equipment, Issue 02,
September 2006
Summary Section
Comments Section
1. Are the products being used within their rated power, current, voltage, and
temperature or are they uprated?
2. Is test data used in any deviation from VITA 51.0 or the subsidiary specification
used?
3. Is field failure return data used in any deviation from VITA 51 standard?
4. Other comments:
Please see the VITA 51 website for information on joining and participating in
the reliability Community of Practice (CoP).
Note: Answers provided for the registration questionnaire will be publicly available
through VITA. Information provided to the registration will not be treated as company
proprietary information. (Reference Rule 3.1-2)
Answers to 1 and 2 are required for registration. The remaining questions are optional,
and are intended to help identify skills within the CoP and as a resource for future
revisions of VITA 51.0 or the subsidiary specifications.
6. What level or scope of analysis are you most familiar with (see list)?
• Part
• Board
• Subsystem
• System
7. What other reliability related analysis do you have experience with? (please select
any that apply from this list)
• Maintainability
• Reliability Centered Maintenance (RCM)
• Failure Modes Effects Criticality Analysis (FMECA)
• Failure Analysis
• Markov Modeling
• Availability
• Testability/System Health (SH)
• Qualification testing
• Environmental qualification
• Component management
• Failure Reporting and Corrective Action System (FRACAS)
• Highly Accelerated Life Testing (HALT)
This appendix provides an overview to the contributing factors for system reliability and
topics for consideration when designing or utilizing electronic products. This is provided
for general information only.
Overall product reliability results from the contributions of the inputs that make up the
product. The design, materials, processes and environments that are applied to create and
operate the product all have direct effects on its functional performance, operational
reliability and life (operational and storage).
Product failure can be considered in two classes:
• Functional Failure – functionality is lost (permanently, temporarily or
intermittent)
• Parametric Degradation – functionality is maintained but performance is
degraded
At the same time, in support of increased performance, other factors such as increases
in circuit complexity and power density along with reduced voltage and timing
margins have provided potentially negative impacts on reliability.
There will always be a responsibility to ensure that the applied materials, design,
processes and environmental controls will be adequate to ensure sufficient reliability
for the intended application.
• Materials
• Design
• Supporting Processes
• Environment
The same factors are applicable at all system levels (component, module, product,
subsystem, system and platform) – once integrated, operational reliability of all of
these levels may be interdependent.
Design Materials
Product
Failure
Processes Environment
C.2.1 Components
Products are assemblies consisting of modules and components. Each component in
the assembly will serve a purpose to perform a function and will inherently be
susceptible to failure. A component level failure can cause module or product level
failure(s).
Components that make up the module or product assembly will have their own failure
modes. Even at the component level, the failure can be traced to lower level failures
such as the die, wire bonds or component interconnects for integrated circuits. Every
type of component will have its own inherent failure modes.
For simple devices (or a discrete part), like interconnects, capacitors, resistors, diodes
and transistors, the impacts of short circuit, open circuit and parametric drift are fairly
evident. As the complexity of the component increases such as integrated circuits
(potentially containing millions of transistors, capacitors, resistors and
interconnections), the impacts of these failure modes become more difficult to define
due to the lack of knowledge of (and access to) the internal workings.
At the die level of a component there are well documented failure modes:
• Electromigration
– Opens or increased impedances in the die level interconnect caused by the
movement of the conductor’s ions due to the momentum transfer from the
conducting electrons.
– Susceptibility increases with increased temperature, increased current draw
and reductions in lithography feature size.
• Dielectric Breakdown
– Shorts/resistive current paths in the die level due to the degradation of the
non-conducting layer between the conductors.
– Susceptibility increases with increased temperature, electrical overstress and
due to defects or impurities in the dielectric.
• Burn-Out (Junction/Metal)
– A specific form of Electrical Overstress causing destruction of a P-N
junction or metal interconnects causing opens or shorts.
– Susceptibility increases with high strength electric fields, poor circuit
design.
• Corrosion
– Corrosion of the metals internal to the component due to moisture ingress or
contamination can cause opens, shorts or parametric drift
– Susceptibility influenced by component material composition,
environmental conditions and aging
The next level of component failures can occur at the package level.
• Intermetallics
– Chemical reaction between dissimilar metals that can cause embrittlement
and increased resistance of conductive bonds
– Susceptibility influenced by component material composition,
environmental conditions and aging
• Delamination/Popcorning
– Mechanical damage to the component from thermal mechanical stresses
exerted upon the component
– Susceptibility influenced by component material composition,
environmental conditions and aging
• Barrel Fracture
– A mechanical fracture of the plated through holes or plated through vias
potentially causing increased impedances, intermittent contact or open circuits
– Susceptibility influenced by material composition and thermo mechanical
stresses caused the coefficient of thermal expansion mismatches
• Via Separation
– Mechanical separation of the via from the bonded interconnect layers
– Susceptibility influenced by geometries, material composition and thermo
mechanical stresses
• Pad Contamination
– Impurities or oxidization can cause poor solderability and increased
resistance of conductive bonds
– Susceptibility influenced by material composition, environmental conditions
and aging
• Lifted Pads
– Open/intermittent circuits caused by the separation of solder pad from the
PWB
– Susceptibility is due to manufacturing defects or mechanical stresses
• Panel Delamination
The application of the assembly and its components will have an influence on their
susceptibility to the previously identified failure modes and the overall reliability of
the components. The operating life of a component will be directly impacted by the
Electrical and Environmental conditions that the component is subjected to. The
conditions of the target application should influence the design process.
Assurance that the module design adheres to the published limitations of the
components is a requirement. Reliability can be further improved by reducing the
stresses placed upon the component (when possible) below the maximums published
by the manufacturer, thereby providing additional margin of safety. This design
practice is known as derating and aids in reducing the risks of overstress failure
modes.
In general, care should be taken not to use electronic components outside the
manufacturer’s specified design specification. However, there are applications for
which no good alternative exists other than using a component outside its specified
range. The military/aerospace industry is increasingly faced with this issue, as
increasing processing needs and diminishing military electronics sources combine to
drive the use of commercial electronics in harsh environments.
As clocking and signal rates of the electronics industry increased new failure modes
were introduced. The issues arise due to the physical properties of the electrical
circuits that become more acute with increased frequency. Stray or improperly
modeled impedances have the potential to introduce signal integrity errors. Signal
integrity is a broad subject that covers multiple failure modes including:
• Timing
– Data can be interpreted incorrectly due to signal level violations stemming
from timing errors
– Susceptibility influenced by physical layout, signal frequencies and levels
• Signal Noise
– Signal noise can include any of the following electrical phenomenon: Cross
talk, Ringing, Ground bounce, Attenuation, Signal reflection
– Susceptibility influenced by physical layout, signal frequencies and levels
Due to the reliability issues of lead free solders, and the current lack of widely
accepted methods to predict reliability of electronics containing lead free solder, a
supplier can disclose their use of lead free solders or components with pure tin
finishes. See Observation 2.5-1.
Subsidiary specifications to the VITA 51.0 main standard will be prepared by the
VITA 51 working group and included with this standard after being approved through
the VITA balloting process.
VITA 51 will inform VSO Standard Committees and owners of other reliability
methods if their method is included in this standard.
Recommended outline:
– Title page
– Table of Contents
– Main body
Ground Rules
Do’s
• Provide additional value over and above what is already written in the
prediction method or standard. For example, providing standard defaults
values, factors or constants for when an analyst does not have complete
information or data. Provide standard guidelines based on “best practice”. As
required by Section 4, several case example providing step by step processes
and instructions are required to accept the user(s) is applying the Subsidiary
Specification.
Don’ts