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A B C D E F G H

1 1

TABLE OF CONTENTS
Page Description Page Description

2010/11/30
1. P.21 ADD dual VBIOS
2. P.29 ADD 6262
3. P.30 remove NVVDD PWM
2 3. P31~P33 add V222-2.1 NVVDD 2

4. P.35 add thermal IC


5. add page number

2010/12/01
1.change U6006 Vcc
2. ADD MEC8
3. page.32~33 remove NVDD mlcc
4. remove page.34 MEC1.5
5. remove MEC8
6. change L18 L19 to OL4-7670001
7. add thermal IC in PAGE.35
3 3

2010/12/02
1. remove LB2 LB3 in PAGE.26
2. remove MEC1.3
3. remove M11 M12 PAGE.5
4. L17 to OL4-7670001
5. remove page 31.R898 R942 R253 R251
6. C97 C94 C137 C145 C104 C118 to 0805
7.ADD C655
8. remove PAGE13. FBA MLCC

12/06
1.remove R517 page25.
4 4

12/07
SKU VARIANT NVPN ASSEMBLY

B BASE 600-11263-BASE-QS1 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
1.Add C705 C689 C583 C584 C1063
1 SKU0000 600-11263-0000-QS1 P1263 GF110-275 1280MB GDDR5 32Mx32 DVI-I/dual+HDMI+DP
2 <UNDEFINED> <UNDEFINED> <UNDEFINED>
3 <UNDEFINED> <UNDEFINED> <UNDEFINED>
4 <UNDEFINED> <UNDEFINED> <UNDEFINED>
5 <UNDEFINED> <UNDEFINED> <UNDEFINED>
6 <UNDEFINED> <UNDEFINED> <UNDEFINED>
7 <UNDEFINED> <UNDEFINED> <UNDEFINED>
8 <UNDEFINED> <UNDEFINED> <UNDEFINED>
9 <UNDEFINED> <UNDEFINED> <UNDEFINED>
10 <UNDEFINED> <UNDEFINED> <UNDEFINED>
11 <UNDEFINED> <UNDEFINED> <UNDEFINED>
12 <UNDEFINED> <UNDEFINED> <UNDEFINED>
13 <UNDEFINED> <UNDEFINED> <UNDEFINED>
14 <UNDEFINED> <UNDEFINED> <UNDEFINED>
15 <UNDEFINED> <UNDEFINED> <UNDEFINED>

5 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Tuesday, December 07, 2010 Sheet 1 of 1 ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Table of Contents
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Block Diagram Power Sequence


Power Supply
5V - Always On
3V3 - Always On 1V05 (pex,pll)
12V_F - Always On
12V_PEX6_EXT1 - Always On
1 12V_PEX6_EXT2 - Always On 1

NVVDD -Input_Pex_Power_Rail_Enable
+ Thermal_Shutdown
linear Power Supply
FBVDD/FBVDDQ -NVVDD_PGOOD 5V Linear
PEX_VDD -Following FBVDDQ

Power Supply
Dual SLI PEX_12V_Finger
FBVDD/FBVDDQ Combined

DAC,IFPAB_IO
2
IFPCDEF_PLL PEX_3V3_Finger
2

MIO,MISC
MEM D MEM C
DP

Power Supply
NVVDD-PH4

MEM MEM
HDMI

EXT_12V_2x3 Pwr_2
E B
3 3

Power Supply
NVVDD-PH2

GF110
Power Supply
EXT_12V_2x3 Pwr_1
MEM MEM NVVDD-PH3

F
DVI-I DL

DVI-I DL

4 4

Power Supply
NVVDD-PH1

Power Supply
NVVDD-Controller

5 5

Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 2 of 1
PAGE DETAIL Block Diagram
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

PCI Express 2.0


12V

CN2
12V CON_FINGER_PEX_164
0.4MM 5.5A
C998 CON_X16 R754
0.1UF 0
16V COMMON +0.05R
10% 0402
X7R COMMON
0402 B1 +12V TRST* JTAG1 B9
COMMON B2 +12V TCLK JTAG2 A5
A2 A6 PEX_TDI
+12V TDI JTAG3
A3 A7 PEX_TDO
1 +12V TDO JTAG4 1
3V3 GND B3 +12V/RSVD TMS JTAG5 A8

3.3V TRUE B8 +3V3


3A 0.4MM A9 +3V3
C59 A10
0.1UF +3V3
16V
B10 +3V3AUX
10%
X7R
0402
COMMON PEX_PRSNT1* A1 B5 21 I2CS_SCL_R
PRSNT1 SMCLK GENERIC_SEZ2
OUT
B17 PRSNT2 SMDAT B6 21 I2CS_SDA_R GENERIC_SEZ2
BI

GND
B12 RSVD G1A
PEX_VDD
OUT BGA_1981_P080_P100_425X425
B4 GND WAKE B11 COMMON
Place near balls
A4 GND
B7 1/27 PCI_EXPRESS BD35
GND PEX_IOVDD C785 C790 C788 C777 C844 C745 C726
A12 GND PERST A1125 PEX_RST* BJ23 PEX_RST PEX_IOVDD BD36
0.1UF 0.1UF 1UF 1UF 4.7UF 10UF 22UF
B13 GND PEX_IOVDD BE24
16V 16V 6.3V 6.3V 6.3V 6.3V 6.3V
A15 GND BF23 PEX_CLKREQ PEX_IOVDD BE25
NET_NAME DIFF_PAIR NV_NETCLASS 10% 10% 10% 10% 20% 20% 20%
B16 GND PEX_IOVDD BE26 X7R X7R X5R X5R X5R X5R X5R
PEX_REFCLK NV_NETCLASS DIFF_PAIR NET_NAME
B18 GND REFCLK A13 PEX_REFCLK PEXGEN2_SIGNALS BH23 PEX_REFCLK PEX_IOVDD BE36 0402 0402 0402 0402 0603 0805 0805
A18 A14 PEX_REFCLK* BG23 BF36 COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND REFCLK PEX_REFCLK PEXGEN2_SIGNALS PEX_REFCLK PEX_IOVDD

A16 PEX_TXX0 C960 0.1UF PEX_TX0 BF24


PERP0 PEX_TXX0 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX0 PEX_TX0
A17 PEX_TXX0* C955 0.1UF 0402 16V PEX_TX0* BG24 PEX_VDD
PERN0 PEX_TXX0 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX0 PEX_TX0
0402 16V 10%
GND
PEX_RX0 10% X7R
2 PETP0 B14 PEX_RX0 PEXGEN2_SIGNALS COMMON
BL21 PEX_RX0 2
PEX_RX0* X7R
GND PETN0 B15 PEX_RX0 PEXGEN2_SIGNALS COMMON
BK21 PEX_RX0 PEX_IOVDDQ BD27
END OF X1 BD29
PEX_IOVDDQ
B31 A21 PEX_TXX1 C947 0.1UF PEX_TX1 BH24 BD30 C780 C743 C830 C774 C816 C727 C803
PRSNT2 PERP1 PEX_TXX1 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX1 PEX_TX1 PEX_IOVDDQ 0.1UF 0.1UF 1UF 1UF 4.7UF 10UF 22UF
A19 A22 PEX_TXX1* C941 0.1UF 0402 16V PEX_TX1* BJ24 BD32
RSVD PERN1 PEX_TXX1 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX1 PEX_TX1 PEX_IOVDDQ 16V 16V 6.3V 6.3V 6.3V 6.3V 6.3V
B30 0402 16V 10% BD33
RSVD X7R
PEX_IOVDDQ 10% 10% 10% 10% 20% 20% 20%
A32 B19 PEX_RX1 10% BK23 BE27
RSVD PETP1 PEX_RX1 PEXGEN2_SIGNALS
X7R COMMON PEX_RX1 PEX_IOVDDQ X7R X7R X5R X5R X5R X5R X5R
B20 PEX_RX1* BL23 BE28 0402 0402 0402 0402 0603 0805 0805
PETN1 PEX_RX1 PEXGEN2_SIGNALS COMMON PEX_RX1 PEX_IOVDDQ
A20 GND PEX_IOVDDQ BE29 COMMON COMMON COMMON COMMON COMMON COMMON COMMON
B21 A25 PEX_TXX2 C937 0.1UF PEX_TX2 BJ25 BE30
GND PERP2 PEX_TXX2 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX2 PEX_TX2 PEX_IOVDDQ
B22 A26 PEX_TXX2* C934 0.1UF 0402 16V PEX_TX2* BJ26 BE31
GND PERN2 PEX_TXX2 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX2 PEX_TX2 PEX_IOVDDQ
A23 GND 0402 16V 10%
PEX_IOVDDQ BE32
PEX_RX2 10% X7R
A24 GND PETP2 B23 PEX_RX2 PEXGEN2_SIGNALS COMMON
BM23 PEX_RX2 PEX_IOVDDQ BE33
PEX_RX2* X7R
B25 GND PETN2 B24 PEX_RX2 PEXGEN2_SIGNALS COMMON
BM24 PEX_RX2 PEX_IOVDDQ BF27 GND
B26 GND PEX_IOVDDQ BG27 3V3_F
A27 A29 PEX_TXX3 C930 0.1UF PEX_TX3 BH26 BG28
GND PERP3 PEX_TXX3 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX3 PEX_TX3 PEX_IOVDDQ
A28 A30 PEX_TXX3* C925 0.1UF 0402 16V PEX_TX3* BG26
GND PERN3 PEX_TXX3 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX3 PEX_TX3
B29 0402 16V 10%
GND X7R
A31 B27 PEX_RX3 10% BL24
GND PETP3 PEX_RX3 PEXGEN2_SIGNALS
X7R COMMON PEX_RX3
B32 B28 PEX_RX3* BK24
GND END OF X4 PETN3 PEX_RX3 PEXGEN2_SIGNALS COMMON PEX_RX3 C833 C835
PEX_TXX4 C907 0.1UF PEX_TX4 0.1UF 4.7UF
PERP4 A35 PEX_TXX4 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX4 BH27 PEX_TX4
PEX_TXX4* C901 0.1UF PEX_TX4* 16V 6.3V
PERN4 A36 PEX_TXX4 PEXGEN2_SIGNALS 0402 16V PEXGEN2_SIGNALS PEX_TX4 BJ27 PEX_TX4 10% 20%
GND B48 PRSNT2 0402 16V 10%
X7R X5R
PEX_RX4 X7R
A33 RSVD PETP4 B33 PEX_RX4 PEXGEN2_SIGNALS
10%
COMMON
BK26 PEX_RX4 0402 0603
PEX_RX4* X7R
PETN4 B34 PEX_RX4 PEXGEN2_SIGNALS COMMON
BL26 PEX_RX4 COMMON COMMON
A34 GND
B35 A39 PEX_TXX5 C877 0.1UF PEX_TX5 BJ28
GND PERP5 PEX_TXX5 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX5 PEX_TX5
B36 A40 PEX_TXX5* C865 0.1UF 0402 16V PEX_TX5* BJ29
GND PERN5 PEX_TXX5 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX5 PEX_TX5
A37 GND 0402 16V 10%
PEX_PLL_HVDD BC26 GND
PEX_RX5 10% X7R
3
A38 GND PETP5 B37 PEX_RX5 PEXGEN2_SIGNALS COMMON
BM26 PEX_RX5 PEX_SVDD_3V3 BB26 3
PEX_RX5* X7R
B39 GND PETN5 B38 PEX_RX5 PEXGEN2_SIGNALS COMMON
BM27 PEX_RX5 PEX_SVDD_3V3 BB27 3V3_F
B40 GND
A41 A43 PEX_TXX6 0402 16V 10% X7R COMMON PEX_TX6 BH29
GND PERP6 PEX_TXX6 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX6 PEX_TX6
A42 A44 PEX_TXX6* C846 0.1UF C849 0.1UF PEX_TX6* BG29
GND PERN6 PEX_TXX6 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX6 PEX_TX6
B43 GND 0402 16V 10% X7R COMMON
B44 B41 PEX_RX6 BL27 AT10
GND PETP6 PEX_RX6 PEXGEN2_SIGNALS PEX_RX6 VDD33 C897 C903 C918 C949 C954
A45 B42 PEX_RX6* BK27 AT11
GND PETN6 PEX_RX6 PEXGEN2_SIGNALS PEX_RX6 VDD33 0.1UF 0.1UF 0.1UF 1UF 4.7UF
A46 GND VDD33 AT9
PEX_TXX7 PEX_TX7 16V 16V 16V 6.3V 6.3V
B47 GND PERP7 A47 PEX_TXX7 PEXGEN2_SIGNALS
0402 16V 10% X7R COMMON
PEXGEN2_SIGNALS PEX_TX7 BF30 PEX_TX7 VDD33 AV11
10% 10% 10% 10% 20%
B49 GND PERN7 A48 PEX_TXX7* PEX_TXX7 PEXGEN2_SIGNALS
C823 0.1UF C828 0.1UF PEXGEN2_SIGNALS PEX_TX7
PEX_TX7* BG30 PEX_TX7 X7R X7R X7R X7R X5R
A49 GND 0402 16V 10% X7R COMMON 0402 0402 0402 0603 0603
B45 PEX_RX7 BK29 COMMON COMMON COMMON COMMON COMMON
PETP7 PEX_RX7 PEXGEN2_SIGNALS PEX_RX7
B46 PEX_RX7* BL29
END OF X8 PETN7 PEX_RX7 PEXGEN2_SIGNALS PEX_RX7

GND A52 PEX_TXX8 0402 16V 10% X7R COMMON PEX_TX8 BH30
PERP8 PEX_TXX8 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX8 PEX_TX8
A53 PEX_TXX8* C794 0.1UF C804 0.1UF PEX_TX8* BJ30
PERN8 PEX_TXX8 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX8 PEX_TX8
B81 PRSNT2 0402 16V 10% X7R COMMON VDD_SENSE BB35 0.25MM 31 NVVDD_SENSE_GPU
OUT
A50 B50 PEX_RX8 BM29 BB36 GND
RSVD PETP8 PEX_RX8 PEXGEN2_SIGNALS PEX_RX8 VDD_SENSE
B82 B51 PEX_RX8* BM30
RSVD PETN8 PEX_RX8 PEXGEN2_SIGNALS PEX_RX8
GND_SENSE BC36 31 NVVDD_GND_SENSE_GPU 0.25MM 0V
OUT
A56 PEX_TXX9 0402 16V 10% X7R COMMON PEX_TX9 BJ31
PERP9 PEX_TXX9 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX9 PEX_TX9
PERN9 A57 PEX_TXX9*
PEX_TXX9 PEXGEN2_SIGNALS
C772 0.1UF C779 0.1UF PEXGEN2_SIGNALS PEX_TX9
PEX_TX9* BJ32 PEX_TX9
A51 GND 0402 16V 10% X7R COMMON
B52 B54 PEX_RX9 BL30
GND PETP9 PEX_RX9 PEXGEN2_SIGNALS PEX_RX9
B53 B55 PEX_RX9* BK30
GND PETN9 PEX_RX9 PEXGEN2_SIGNALS PEX_RX9
A54 GND
A55 A60 PEX_TXX10 0402 16V 10% X7R COMMON PEX_TX10 BH32
GND PERP10 PEX_TXX10 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX10 PEX_TX10
B56 A61 PEX_TXX10* C738 0.1UF C744 0.1UF PEX_TX10* BG32
GND PERN10 PEX_TXX10 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX10 PEX_TX10
B57 GND 0402 16V 10% X7R COMMON
A58 B58 PEX_RX10 BK32
4 GND PETP10 PEX_RX10 PEXGEN2_SIGNALS PEX_RX10 4
A59 B59 PEX_RX10* BL32
GND PETN10 PEX_RX10 PEXGEN2_SIGNALS PEX_RX10
B60 GND
B61 A64 PEX_TXX11 0402 16V 10% X7R COMMON PEX_TX11 BH33
GND PERP11 PEX_TXX11 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX11 PEX_TX11
PEX_TXX11* C732 0.1UF C733 0.1UF PEX_TX11* For Lab test access
A62 GND PERN11 A65 PEX_TXX11 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX11 BJ33 PEX_TX11
A63 0402 16V 10% X7R COMMON
R686
GND 200
B64 B62 PEX_RX11 BM32
GND PETP11 PEX_RX11 PEXGEN2_SIGNALS PEX_RX11 NET_NAME DIFF_PAIR NV_NETCLASS 5%
B65 B63 PEX_RX11* BM33
GND PETN11 PEX_RX11 PEXGEN2_SIGNALS PEX_RX11 0402
A66 BF33 PEX_PLL_CLK_OUT
GND PEX_TSTCLK_OUT PEX_TSTCLK_OUT PEXGEN2_SIGNALS DNI
A67 A68 PEX_TXX12 0402 16V 10% X7R COMMON PEX_TX12 BJ34 BG33 PEX_PLL_CLK_OUT*
GND PERP12 PEX_TXX12 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX12 PEX_TX12 PEX_TSTCLK_OUT PEX_TSTCLK_OUT PEXGEN2_SIGNALS
B68 GND PERN12 A69 PEX_TXX12* PEX_TXX12 PEXGEN2_SIGNALS
C724 0.1UF C728 0.1UF PEXGEN2_SIGNALS PEX_TX12
PEX_TX12* BJ35 PEX_TX12
B69 GND 0402 16V 10% X7R COMMON
A70 B66 PEX_RX12 BL33
GND PETP12 PEX_RX12 PEXGEN2_SIGNALS PEX_RX12
A71 B67 PEX_RX12* BK33 PEX_VDD
GND PETN12 PEX_RX12 PEXGEN2_SIGNALS PEX_RX12
B72 GND
B73 A72 PEX_TXX13 C713 0.1UF PEX_TX13 BH35 BB29 PEX_PLLVDD LB504 120R@100MHz
GND PERP13 PEX_TXX13 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX13 PEX_TX13 PEX_PLLVDD
A74 A73 PEX_TXX13* C711 0.1UF 0402 16V PEX_TX13* BG35 BB30 IND_SMD_0603
COMMON
GND PERN13 PEX_TXX13 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX13 PEX_TX13 PEX_PLLVDD 1.05V 0.4MM
C817 C826 C801 C802 C809
A75 0402 16V 10%
GND X7R 0.1UF 1UF 4.7uF 10UF 10UF
B76 B70 PEX_RX13 10% BK35
GND PETP13 PEX_RX13 PEXGEN2_SIGNALS
X7R COMMON PEX_RX13 16V 6.3V 10V 6.3V 6.3V
B77 B71 PEX_RX13* BL35
GND PETN13 PEX_RX13 PEXGEN2_SIGNALS COMMON PEX_RX13 10% 10% 10% 20% 20%
A78 GND X7R X7R X7R X5R X5R
A79 A76 PEX_TXX14 C707 0.1UF PEX_TX14 BF35 0402 0603 0805 0805 0805
GND PERP14 PEX_TXX14 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX14 PEX_TX14
B80 A77 PEX_TXX14* C702 0.1UF 0402 16V PEX_TX14* BE35 BC27 GPU_TESTMODE R688 10K COMMON COMMON COMMON COMMON DNI
GND PERN14 PEX_TXX14 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX14 PEX_TX14 TESTMODE
A82 GND 0402 16V 10% 0402 5% COMMON
PEX_RX14 X7R
PETP14 B74 PEX_RX14 PEXGEN2_SIGNALS
10%
COMMON
BM35 PEX_RX14
PEX_RX14* X7R
PETN14 B75 PEX_RX14 PEXGEN2_SIGNALS COMMON
BM36 PEX_RX14
GND
A80 PEX_TXX15 C694 0.1UF PEX_TX15 BJ36
GND PERP15 PEX_TXX15 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX15 PEX_TX15
A81 PEX_TXX15* C691 0.1UF 0402 16V PEX_TX15* BJ37
PERN15 PEX_TXX15 PEXGEN2_SIGNALS PEXGEN2_SIGNALS PEX_TX15 PEX_TX15
0402 16V 10%
PEX_RX15 10% X7R PEX_TERMP R687 2.49K
5 PETP15 B78 PEX_RX15 PEXGEN2_SIGNALS COMMON
BL36 PEX_RX15 PEX_TERMP BC29 5
PEX_RX15* X7R
PETN15 B79 PEX_RX15 PEXGEN2_SIGNALS COMMON
BK36 PEX_RX15 0402 1% COMMON

END OF X16
GND
Title
V257 NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Size Document Number Rev
Custom5 <RevCode> ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PCI Express 2.0
Date: Monday, December 06, 2010 Sheet 3 of 1 NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GPU Framebuffer: Partition A/B


GDDR5 CMD Mapping

0..31 CMD 32..63

CMD0 CAS* CMD16

CMD1 CKE* CMD17


1 1
G1B G1C CMD2 RST* CMD18
BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425
COMMON COMMON
CMD3 RAS* CMD19
2/27 FBA 3/27 FBB CMD4 A1_A9 CMD20
AY49 FBB_D<0> AA44
FBA_D0 6 Fbb_D<0> 0 FBB_D0
AV47 FBB_D<1> Y48
FBA_D1 6 Fbb_D<1> 1
FBB_D<2>
FBB_D1 CMD5 A0_A10 CMD21
AV46 FBA_D2 AA45 FBB_D2
6 Fbb_D<2> 2
FBB_D<3>
AV48 FBA_D3 Y47 FBB_D3 CMD6 A12_RFU CMD22
6 Fbb_D<3> 3
FBB_D<4>
AT45 FBA_D4 AA49 FBB_D4
6 Fbb_D<4> 4
FBB_D<5>
AU47 FBA_D5 Y46 FBB_D5 CMD7 ABI* CMD23
6 Fbb_D<5> 5
FBB_D<6>
AV45 FBA_D6 AA48 FBB_D6
6 Fbb_D<6> 6
FBB_D<7>
AT47 FBA_D7 Y45 FBB_D7 CMD8 A6_A11 CMD24
6 Fbb_D<7> 7
FBB_D<8>
BF49 FBA_D8 AD48 FBB_D8
6 Fbb_D<8> 8
FBB_D<9>
BE48 FBA_D9 AF50 FBB_D9 CMD9 A7_A8 CMD25
6 Fbb_D<9> 9
FBB_D<10>
BD50 FBA_D10 AD47 FBB_D10
6 Fbb_D<10> 10
FBB_D<11>
BH50 FBA_D11 AF48 FBB_D11 CMD10 WE* CMD26
6 Fbb_D<11> 11
FBB_D<12>
BE49 FBA_D12 AE47 FBB_D12
6 Fbb_D<12> 12
FBB_D<13>
BG49 FBA_D13 AF47 FBB_D13 CMD11 A5_BA1 CMD27
6 Fbb_D<13> 13
FBB_D<14>
BD49 FBA_D14 AD46 FBB_D14
6 Fbb_D<14> 14
FBB_D<15>
BD48 FBA_D15 AF46 FBB_D15 CMD12 A4_BA2 CMD28
6 Fbb_D<15> 15
FBB_D<16>
BA46 FBA_D16 AC45 FBB_D16
6 Fbb_D<16> 16
FBB_D<17>
AW43 FBA_D17 AD45 FBB_D17 CMD13 A2_BA0 CMD29
6 Fbb_D<17> 17
FBB_D<18>
BB45 FBA_D18 AC47 FBB_D18
6 Fbb_D<18> 18
FBB_D<19>
BA43 FBA_D19 AD44 FBB_D19 CMD14 A3_BA3 CMD30
6 Fbb_D<19> 19
FBB_D<20>
BD46 FBA_D20 AB47 FBB_D20
6 Fbb_D<20> 20
FBB_D<21>
AW44 FBA_D21 AC44 FBB_D21 CMD15 CS* CMD31
6 Fbb_D<21> 21
FBB_D<22>
BC47 FBA_D22 AB49 FBB_D22
6 Fbb_D<22> 22
FBB_D<23>
2
BA44 FBA_D23 AC46 FBB_D23 2
6 Fbb_D<23> 23
FBB_D<24>
BB48 FBA_D24 V48 FBB_D24 FBVDDQ
6 Fbb_D<24> 24
FBB_D<25>
AW46 FBA_D25 Y44 FBB_D25
6 Fbb_D<25> 25
FBB_D<26>
BC49 FBA_D26 V49 FBB_D26
6 Fbb_D<26> 26
FBB_D<27> FBB_CMD<1> R648 10K
BA49 FBA_D27 V44 FBB_D27
6 Fbb_D<27> 27
FBB_D<28>
BB49 FBA_D28 V46 FBB_D28 0402 5% COMMON
6 Fbb_D<28> 28
FBB_D<29> FBB_CMD<17> R637 10K
AW48 FBA_D29 U47 FBB_D29
6 Fbb_D<29> 29
FBB_D<30>
BB50 FBA_D30 V45 FBB_D30 0402 5% COMMON
6 Fbb_D<30> 30
FBB_D<31>
BA48 FBA_D31 U48 FBB_D31
6 Fbb_D<31> 31
FBB_D<32>
BH39 FBA_D32 AM44 FBB_D32
6 Fbb_D<32> 32
FBB_D<33> FBB_CMD<0>
BG36 FBA_D33 FBA_CMD0 AV51 AN48 FBB_D33 FBB_CMD0 U51
6 Fbb_D<33> 33
FBB_D<34> FBB_CMD<1>
0 Fbb_Cmd<0>
BG37 FBA_D34 FBA_CMD1 AV52 AM45 FBB_D34 FBB_CMD1 U52
6 Fbb_D<34> 34
FBB_D<35> FBB_CMD<2>
1 Fbb_Cmd<1>
BH38 FBA_D35 FBA_CMD2 AV50 AN47 FBB_D35 FBB_CMD2 V50
6 Fbb_D<35> 35
FBB_D<36> FBB_CMD<3>
2 Fbb_Cmd<2>
BF38 FBA_D36 FBA_CMD3 AW52 AM49 FBB_D36 FBB_CMD3 V52
6 Fbb_D<36> 36
FBB_D<37> FBB_CMD<4>
3 Fbb_Cmd<3>
BJ38 FBA_D37 FBA_CMD4 AW51 AN46 FBB_D37 FBB_CMD4 V51
6 Fbb_D<37> 37
FBB_D<38> FBB_CMD<5>
4 Fbb_Cmd<4>
BE38 FBA_D38 FBA_CMD5 BA51 AM48 FBB_D38 FBB_CMD5 Y51
6 Fbb_D<38> 38
FBB_D<39> FBB_CMD<6>
5 Fbb_Cmd<5>
BH36 FBA_D39 FBA_CMD6 BA52 AN45 FBB_D39 FBB_CMD6 Y52
6 Fbb_D<39> 39
FBB_D<40> FBB_CMD<7>
6 Fbb_Cmd<6>
BJ46 FBA_D40 FBA_CMD7 BA50 AJ48 FBB_D40 FBB_CMD7 AA50
6 Fbb_D<40> 40
FBB_D<41> FBB_CMD<8>
7 Fbb_Cmd<7>
BH45 FBA_D41 FBA_CMD8 BB51 AG50 FBB_D41 FBB_CMD8 AA51
6 Fbb_D<41> 41
FBB_D<42> FBB_CMD<9>
8 Fbb_Cmd<8>
BK44 FBA_D42 FBA_CMD9 BD51 AJ47 FBB_D42 FBB_CMD9 AC51
6 Fbb_D<42> 42
FBB_D<43> FBB_CMD<10>
9 Fbb_Cmd<9>
BK48 FBA_D43 FBA_CMD10 BD52 AG48 FBB_D43 FBB_CMD10 AC52
6 Fbb_D<43> 43
FBB_D<44> FBB_CMD<11>
10 Fbb_Cmd<10>
BJ45 FBA_D44 FBA_CMD11 BE52 AH47 FBB_D44 FBB_CMD11 AD50
6 Fbb_D<44> 44
FBB_D<45> FBB_CMD<12>
11 Fbb_Cmd<11>
BJ47 FBA_D45 FBA_CMD12 BG51 AG47 FBB_D45 FBB_CMD12 AD52
6 Fbb_D<45> 45
FBB_D<46> FBB_CMD<13>
12 Fbb_Cmd<12>
BJ44 FBA_D46 FBA_CMD13 BG52 AJ46 FBB_D46 FBB_CMD13 AD51
6 Fbb_D<46> 46
FBB_D<47> FBB_CMD<14>
13 Fbb_Cmd<13>
BH44 FBA_D47 FBA_CMD14 BH51 AG46 FBB_D47 FBB_CMD14 AF51
6 Fbb_D<47> 47
FBB_D<48> FBB_CMD<15>
14 Fbb_Cmd<14>
BF41 FBA_D48 FBA_CMD15 BH52 AK45 FBB_D48 FBB_CMD15 AF52
6 Fbb_D<48> 48
FBB_D<49> FBB_CMD<16>
15 Fbb_Cmd<15>
BC39 FBA_D49 FBA_CMD16 BL38 AJ45 FBB_D49 FBB_CMD16 AT51
6 Fbb_D<49> 49
FBB_D<50> FBB_CMD<17>
16 Fbb_Cmd<16>
BE42 FBA_D50 FBA_CMD17 BM38 AK47 FBB_D50 FBB_CMD17 AT52
6 Fbb_D<50> 50
FBB_D<51> FBB_CMD<18>
17 Fbb_Cmd<17>
BC41 FBA_D51 FBA_CMD18 BK38 AJ44 FBB_D51 FBB_CMD18 AR50
6 Fbb_D<51> 51
FBB_D<52> FBB_CMD<19>
18 Fbb_Cmd<18>
BF44 FBA_D52 FBA_CMD19 BM39 AL47 FBB_D52 FBB_CMD19 AR52
6 Fbb_D<52> 52
FBB_D<53> FBB_CMD<20>
19 Fbb_Cmd<19>
3
BD39 FBA_D53 FBA_CMD20 BL39 AK44 FBB_D53 FBB_CMD20 AR51 3
6 Fbb_D<53> 53
FBB_D<54> FBB_CMD<21>
20 Fbb_Cmd<20>
BG43 FBA_D54 FBA_CMD21 BL41 AL49 FBB_D54 FBB_CMD21 AN51
6 Fbb_D<54> 54
FBB_D<55> FBB_CMD<22>
21 Fbb_Cmd<21>
BD41 FBA_D55 FBA_CMD22 BM41 AK46 FBB_D55 FBB_CMD22 AN52
6 Fbb_D<55> 55
FBB_D<56> FBB_CMD<23>
22 Fbb_Cmd<22>
BH42 FBA_D56 FBA_CMD23 BK41 AR48 FBB_D56 FBB_CMD23 AM50
6 Fbb_D<56> 56
FBB_D<57> FBB_CMD<24>
23 Fbb_Cmd<23>
BF39 FBA_D57 FBA_CMD24 BL42 AN44 FBB_D57 FBB_CMD24 AM51
6 Fbb_D<57> 57
FBB_D<58> FBB_CMD<25>
24 Fbb_Cmd<24>
BJ43 FBA_D58 FBA_CMD25 BL44 AR49 FBB_D58 FBB_CMD25 AK51
6 Fbb_D<58> 58
FBB_D<59> FBB_CMD<26>
25 Fbb_Cmd<25>
BJ41 FBA_D59 FBA_CMD26 BM44 AR44 FBB_D59 FBB_CMD26 AK52
6 Fbb_D<59> 59
FBB_D<60> FBB_CMD<27>
26 Fbb_Cmd<26>
BJ42 FBA_D60 FBA_CMD27 BM45 AR46 FBB_D60 FBB_CMD27 AJ50
6 Fbb_D<60> 60
FBB_D<61> FBB_CMD<28>
27 Fbb_Cmd<27>
BJ40 FBA_D61 FBA_CMD28 BL47 AV49 FBB_D61 FBB_CMD28 AJ52
6 Fbb_D<61> 61
FBB_D<62> FBB_CMD<29>
28 Fbb_Cmd<28>
BK42 FBA_D62 FBA_CMD29 BM47 AR45 FBB_D62 FBB_CMD29 AJ51
6 Fbb_D<62> 62
FBB_D<63> FBB_CMD<30>
29 Fbb_Cmd<29>
BH41 FBA_D63 FBA_CMD30 BL48 AT48 FBB_D63 FBB_CMD30 AG51
6 Fbb_D<63> 63
FBB_CMD<31>
30 Fbb_Cmd<30>
FBA_CMD31 BM48 FBB_CMD31 AG52 31 Fbb_Cmd<31>
AT46 FBB_DBI<0> Y50 R638 10K FBB_CMD<2>
FBA_DQM0 OUT 0 FBB_DQM0
BE50 FBB_DBI<1> AF49 0402 5% COMMON
FBA_DQM1 OUT 1 FBB_DQM1
AW45 FBA_DQM2 FBB_DBI<2> AC48 FBB_DQM2 R653 10K FBB_CMD<18>
OUT 2
BA47 FBB_DBI<3> T49 0402 5% COMMON
FBA_DQM3 OUT 3 FBB_DQM3
BG38 FBB_DBI<4> AN50
FBA_DQM4 OUT 4 FBB_DQM4
BK45 FBB_DBI<5> AG49
FBA_DQM5 OUT 5 FBB_DQM5
BE39 FBB_DBI<6> AK48
FBA_DQM6 OUT 6 FBB_DQM6
BG41 BB52 FBB_DBI<7> AU49 AA52 FBB_DEBUG0
FBA_DQM7 FBA_DEBUG0 OUT 7 FBB_DQM7 FBB_DEBUG0 TP18
BM42 AM52 FBB_DEBUG1 GND
FBA_DEBUG1 FBB_DEBUG1 TP17

AW50 FBB_EDC<0> W49


FBA_DQS_WP0 Net Name DIFF_PAIR NV_NETCLASS BI 0
FBB_EDC<1>
FBB_DQS_WP0 Net Name DIFF_PAIR NV_NETCLASS
BG50 FBA_DQS_WP1 1
AE49 FBB_DQS_WP1
BI
BA45 BE47 FBB_EDC<2> AC50 AF45 6 FBB_CLK0
FBA_DQS_WP2 FBA_CLK0 BI 2 FBB_DQS_WP2 FBB_CLK0 FBB_CLK0 FB_CLK
OUT
AY47 BD47 FBB_EDC<3> U50 AF44 6 FBB_CLK0*
FBA_DQS_WP3 FBA_CLK0 BI 3 FBB_DQS_WP3 FBB_CLK0 FBB_CLK0 FB_CLK
OUT
BK39 BG45 FBB_EDC<4> AP49 AG456 FBB_CLK1
FBA_DQS_WP4 FBA_CLK1 BI 4 FBB_DQS_WP4 FBB_CLK1 FBB_CLK1 FB_CLK
OUT
BK47 BG44 FBB_EDC<5> AH49 AG446 FBB_CLK1*
FBA_DQS_WP5 FBA_CLK1 BI 5 FBB_DQS_WP5 FBB_CLK1 FBB_CLK1 FB_CLK
OUT
BE41 FBB_EDC<6> AK50
FBA_DQS_WP6 BI 6 FBB_DQS_WP6
BG40 FBB_EDC<7> AT50
4 FBA_DQS_WP7 BI 7 FBB_DQS_WP7 4

AW49 FBA_DQS_RN0 FBA_WCK01 BB46 Y49 FBB_DQS_RN0 FBB_WCK01 AA46 6 FBB_WCK01 FBB_WCK01 FB_WCK
OUT
BF50 FBA_DQS_RN1 FBA_WCK01 BB47 AD49 FBB_DQS_RN1 FBB_WCK01 AA47 6 FBB_WCK01* FBB_WCK01 FB_WCK OUT
BB44 FBA_DQS_RN2 FBA_WCK23 BE51 AC49 FBB_DQS_RN2 FBB_WCK23 W47 6 FBB_WCK23 FBB_WCK23 FB_WCK
OUT
AW47 FBA_DQS_RN3 FBA_WCK23 BF51 U49 FBB_DQS_RN3 FBB_WCK23 V47 6 FBB_WCK23* FBB_WCK23 FB_WCK
OUT
BJ39 FBA_DQS_RN4 FBA_WCK45 BF42 AN49 FBB_DQS_RN4 FBB_WCK45 AM466 FBB_WCK45 FBB_WCK45 FB_WCK
OUT
BK46 FBA_DQS_RN5 FBA_WCK45 BG42 AJ49 FBB_DQS_RN5 FBB_WCK45 AM476 FBB_WCK45* FBB_WCK45 FB_WCK
OUT
BD42 FBA_DQS_RN6 FBA_WCK67 BL45 AK49 FBB_DQS_RN6 FBB_WCK67 AP47 6 FBB_WCK67 FBB_WCK67 FB_WCK OUT
BG39 FBA_DQS_RN7 FBA_WCK67 BL46 AT49 FBB_DQS_RN7 FBB_WCK67 AR47 6 FBB_WCK67* FBB_WCK67 FB_WCK
OUT

PEX_VDD

OUT

AG10 AT42 7,10 FB_PLLAVDD LB501 30R@100MHz AD42


FB_VREF FBA_PLL_AVDD FBB_PLL_AVDD
FBA_PLL_AVDD AV42 1.05V .4A 0.4MM IND_SMD_0603
COMMON FBB_PLL_AVDD AF42
C758 C719 C712 C770
0.1UF 1UF 10UF 0.1UF
16V 6.3V 6.3V 16V
10% 10% 20% 10%
X7R X7R X5R X7R
0402 0603 0805 0402
COMMON COMMON COMMON COMMON

5 GND 5

GND
Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 4 of 1
PAGE DETAIL GPU Framebuffer: Partition A/B
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MEMORY: FBA Parition


Title
V257

Size Document Number Rev


Custom5 <RevCode>

Date: Monday, December 06, 2010 Sheet 5 of 1

1 1

2 2

3 3

4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL FBA Partition
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MEMORY: FBB Partition


Fbb_D<0> FBB_DBI<0>
4 Fbb_D<0> OUT 0
FBB_DBI<1>
Fbb_D<1> Title
4 Fbb_D<1> OUT 1
FBB_DBI<2>
Fbb_D<2> V257
4 Fbb_D<2> OUT 2
FBB_DBI<3>
Fbb_D<3>
4 Fbb_D<3> OUT 3
FBB_DBI<4>
Fbb_D<4> Size Document Number Rev
4 Fbb_D<4> OUT 4
FBB_DBI<5>
Fbb_D<5> Custom5 <RevCode>
4 Fbb_D<5> OUT 5
FBB_DBI<6>
Fbb_D<6> M9C M10C
4 Fbb_D<6> M9A OUT 6
FBB_DBI<7>
Fbb_D<7> Date: Monday, December 06, 2010 Sheet 6 of 1
4 Fbb_D<7> OUT 7 M10A
Fbb_D<8> BGA_0170_P080_140X120 BGA_0170_P080_140X120 BGA_0170_P080_140X120
4 Fbb_D<8>
Fbb_D<9> COMMON COMMON
BGA_0170_P080_140X120
COMMON
4 Fbb_D<9> FBB_EDC<0>
1 4
Fbb_D<10> COMMON
1
Fbb_D<10> MIRRORED BI 0
FBB_EDC<1>
Fbb_D<11> FBB_CMD<3> L3 RAS FBB_CMD<19> G3 RAS
4 Fbb_D<11>
Fbb_D<12> x32 x16
BI 1
FBB_EDC<2> FBB_CMD<0> G3
NORMAL FBB_CMD<16> L3
4 Fbb_D<12> BI 2 CAS CAS
Fbb_D<13> FBB_D<0> V4 FBB_EDC<3> FBB_CMD<10> G12 FBB_D<32> A4 FBB_CMD<26> L12
4 Fbb_D<13> DQ0 NC BI 3 WE DQ0 WE
Fbb_D<14> FBB_D<1> V2 FBB_EDC<4> FBB_CMD<15> L12 FBB_D<33> A2 FBB_CMD<31> G12
4 Fbb_D<14> DQ1 NC BI 4 CS DQ1 CS
Fbb_D<15> FBB_D<2> T4 FBB_EDC<5> FBB_D<34> B4
4 Fbb_D<15> DQ2 NC BI 5 DQ2
Fbb_D<16> FBB_D<3> T2 FBB_EDC<6> FBB_CMD<7> J4 FBB_D<35> B2 FBB_CMD<23> J4
4 Fbb_D<16> DQ3 NC BI 6 ABI DQ3 ABI
Fbb_D<17> FBB_D<4> N4 FBB_EDC<7> FBB_D<36> E4
4 Fbb_D<17> DQ4 NC BI 7 DQ4
Fbb_D<18> FBB_D<5> N2 DQ5 FBB_CMD<5> K4 A0_A10 FBB_D<37> E2 DQ5 FBB_CMD<21> H4 A0_A10
4 Fbb_D<18> NC
Fbb_D<19> FBB_D<6> M4 DQ6 FBB_CMD<4> K5 A1_A9 FBB_D<38> F4 DQ6 FBB_CMD<20> H5 A1_A9
4 Fbb_D<19> NC
Fbb_D<20> FBB_D<7> M2 DQ7 FBB_CMD<13> K11 A2_BA0 FBB_D<39> F2 DQ7 FBB_CMD<29> H11 A2_BA0
4 Fbb_D<20> NC
Fbb_D<21> FBB_CMD<14> K10 A3_BA3 FBB_CMD<30> H10 A3_BA3
4 Fbb_D<21> FBB_EDC<0> FBB_EDC<4>
Fbb_D<22> R2 EDC0 FBB_CMD<12> H11 A4_BA2 C2 EDC0 FBB_CMD<28> K11 A4_BA2
4 Fbb_D<22> 0
FBB_DBI<0>
NC 4
FBB_DBI<4>
Fbb_D<23> P2 DBI0 FBB_CMD<11> H10 A5_BA1 D2 DBI0 FBB_CMD<27> K10 A5_BA1
4 Fbb_D<23> 0 NC 4
Fbb_D<24> FBB_CMD<8> H5 A6_A11 VREFD A10 FBB_CMD<24> K5 A6_A11
4 Fbb_D<24>
Fbb_D<25> FBB_CMD<9> H4 A7_A8 FBB_CMD<25> K4 A7_A8
4 Fbb_D<25> x32 x16 C654
Fbb_D<26> VREFD V10 FBB_CMD<6> J5 RFU_A12 FBB_CMD<22> J5 RFU_A12
4 Fbb_D<26> 2200PF
Fbb_D<27> FBB_D<8> V11 DQ8 40 FBB_D<40> A11 DQ8
4 Fbb_D<27> C656 NC 6.3V
Fbb_D<28> FBB_D<9> V13 DQ9 41 FBB_D<41> A13 DQ9
4 Fbb_D<28> 2200PF NC 10%
Fbb_D<29> FBB_D<10> T11 DQ10 42 FBB_D<42> B11 DQ10 X7R
4 Fbb_D<29> 6.3V NC
Fbb_D<30> FBB_D<11> T13 DQ11 43 FBB_D<43> B13 DQ11 0402
4 Fbb_D<30> 10% NC
Fbb_D<31> FBB_D<12> N11 DQ12 X7R
44 FBB_D<44> E11 DQ12 COMMON
4 Fbb_D<31> FBB_CMD<2>
NC
FBB_CMD<18>
Fbb_D<32> FBB_D<13> N13 DQ13 0402 J2 RESET 45 FBB_D<45> E13 DQ13 J2 RESET
4 Fbb_D<32> 2
FBB_CMD<1>
NC 18
FBB_CMD<17>
Fbb_D<33> FBB_D<14> M11 DQ14 COMMON J3 CKE 46 FBB_D<46> F11 DQ14 GND J3 CKE
4 Fbb_D<33> 1 NC 17
Fbb_D<34> FBB_D<15> M13 DQ15 47 FBB_D<47> F13 DQ15
4 Fbb_D<34> NC
Fbb_D<35> GND FBB_CLK0 4 J12 CLK FBB_CLK1 4 J12 CLK
4 Fbb_D<35> FBB_EDC<1>
IN
FBB_EDC<5>
IN
Fbb_D<36> R13 EDC1 FBB_CLK0* 4 J11 CLK C13 EDC1 FBB_CLK1* 4 J11 CLK
4 Fbb_D<36> 1
FBB_DBI<1>
IN 5
FBB_DBI<5>
GND IN
1
P13 DBI1 5
D13 DBI1 NC
R646 R632 R650 R642
40.2 40.2 40.2 40.2
2
FBB_WCK01 4 P4 WCK01 FBB_WCK45 4 D4 WCK01 2
IN 1% 1% IN 1% 1%
FBB_WCK01* 4 P5 WCK01 0402 0402
FBB_WCK45* 4 D5 WCK01 0402 0402
IN IN
COMMON COMMON COMMON COMMON

FBB_CLK0_TERM FBB_CLK1_TERM
Fbb_D<37> .75V .75V
4 Fbb_D<37>
Fbb_D<38> A5 NC_RFU_A5 A5 NC_RFU_A5
4 Fbb_D<38> C624 C636
Fbb_D<39> V5 NC_RFU_V5 V5 NC_RFU_V5
4 Fbb_D<39> 0.01UF 0.01UF
Fbb_D<40>
4 Fbb_D<40> 16V 16V
Fbb_D<41>
4 Fbb_D<41> 10% 10%
Fbb_D<42> X7R X7R
4 Fbb_D<42>
Fbb_D<43> 0402 0402
4 Fbb_D<43>
Fbb_D<44> COMMON COMMON
4 Fbb_D<44>
Fbb_D<45>
4 Fbb_D<45>
Fbb_D<46> GND
4 Fbb_D<46>
Fbb_D<47> GND
4 Fbb_D<47>
Fbb_D<48>
4 Fbb_D<48>
Fbb_D<49>
4 Fbb_D<49>
Fbb_D<50> J14 VREFC J14 VREFC
4 Fbb_D<50>
Fbb_D<51>
4 Fbb_D<51> C631 FBB_ZQ1 C622 FBB_ZQ3
Fbb_D<52> J13 ZQ J13 ZQ
4 Fbb_D<52> 2200PF 2200PF
Fbb_D<53>
4 Fbb_D<53> 6.3V FBB_SEN1 6.3V FBB_SEN3
Fbb_D<54> J10 SEN J10 SEN
4 Fbb_D<54> 10% 10%
Fbb_D<55> X7R X7R
4 Fbb_D<55> R640 R656 R652 R644
Fbb_D<56> 0402 0402
4 Fbb_D<56> 121 1K 121 1K
Fbb_D<57> COMMON COMMON
4 Fbb_D<57> M9D 1% 5% 1% 5%
Fbb_D<58> 0402 0402 0402 0402
4 Fbb_D<58> M10D
Fbb_D<59> BGA_0170_P080_140X120 GND COMMON COMMON FBVDDQ GND COMMON COMMON
4 Fbb_D<59>
Fbb_D<60> COMMON
BGA_0170_P080_140X120
4 Fbb_D<60>
Fbb_D<61> COMMON
4 Fbb_D<61> MIRRORED
Fbb_D<62>
3 4 Fbb_D<62>
Fbb_D<63> x32 x16
M9B NORMAL M10B 3
4 Fbb_D<63> R658
FBB_D<16> A11 DQ16 NC BGA_0170_P080_140X120 FBB_D<48> V11 DQ16 BGA_0170_P080_140X120
1K
FBB_D<17> A13 DQ17 NC GND COMMON FBB_D<49> V13 DQ17 GND COMMON
5%
FBB_D<18> B11 FBB_D<50> T11
FBB_D<19> B13
DQ18
DQ19
NC
NC
Mirrored 0402
COMMON FBB_D<51> T13
DQ18
DQ19
Normal FBVDDQ
FBB_D<20> E11 J1 FBB_D<52> N11 R636 1K FBB_SOE1 J1
DQ20 NC SOE*/MF_VDD DQ20 MF_VSS/SOE*
FBB_D<21> E13 FBB_SOE0 FBB_D<53> N13 0402 5% COMMON
DQ21 NC add 1k to VDD DQ21 add 1k to VSS
FBB_D<22> F11 DQ22 NC
B10 VSS VDD C10 FBB_D<54> M11 DQ22 B10 VSS VDD C10
FBB_D<23> F13 DQ23 NC
B5 VSS VDD C5 FBB_D<55> M13 DQ23 B5 VSS VDD C5
D10 VSS VDD D11 D10 VSS VDD D11
FBB_EDC<2> C13 G10 G1 FBB_EDC<6> R13 G10 G1
2 EDC2 GND VSS VDD 6 EDC2 VSS VDD
FBB_DBI<2> D13 G5 G11 FBB_DBI<6> P13 GND G5 G11
2 DBI2 NC VSS VDD 6 DBI2 VSS VDD
H1 VSS VDD G14 VREFD V10 H1 VSS VDD G14
H14 VSS VDD G4 H14 VSS VDD G4
VREFD A10 K1 VSS VDD L1 x32 x16 K1 VSS VDD L1
FBB_D<24> A4 K14 L11 FBB_D<56> V4 C605 K14 L11
DQ24 VSS VDD DQ24 NC 2200PF VSS VDD
FBB_D<25> A2 DQ25 L10 VSS VDD L14 FBB_D<57> V2 DQ25 NC
L10 VSS VDD L14
FBB_D<26> B4 C603 L5 L4 FBB_D<58> T4 6.3V
L5 L4
DQ26 2200PF VSS VDD DQ26 NC 10% VSS VDD
FBB_D<27> B2 DQ27 P10 VSS VDD P11 FBB_D<59> T2 DQ27 NC X7R P10 VSS VDD P11
6.3V
FBB_D<28> E4 DQ28 T10 VSS VDD R10 FBB_D<60> N4 DQ28 NC
0402 T10 VSS VDD R10
10%
FBB_D<29> E2 DQ29 X7R T5 VSS VDD R5 FBB_D<61> N2 DQ29 NC
COMMON T5 VSS VDD R5
FBB_D<30> F4 DQ30 0402 FBB_D<62> M4 DQ30 NC
FBB_D<31> F2 DQ31 COMMON A1 VSSQ VDDQ B1 FBB_D<63> M2 DQ31 NC
A1 VSSQ VDDQ B1
A12 VSSQ VDDQ B12 GND A12 VSSQ VDDQ B12
FBB_EDC<3> C2 A14 B14 FBB_EDC<7> R2 A14 B14
3 EDC3 VSSQ VDDQ 7 EDC3 NC VSSQ VDDQ
FBB_DBI<3> D2 GND FBVDDQ FBVDDQ A3 B3 FBB_DBI<7> P2 A3 B3
3 DBI3 VSSQ VDDQ 7 DBI3 NC VSSQ VDDQ
C1 VSSQ VDDQ D1 C1 VSSQ VDDQ D1
FBB_WCK23 4 D4 WCK23 C11 VSSQ VDDQ D12 FBB_WCK67 4 P4 WCK23 C11 VSSQ VDDQ D12
IN IN
FBB_WCK23* 4 D5 WCK23 C12 VSSQ VDDQ D14 FBB_WCK67* 4 P5 WCK23 C12 VSSQ VDDQ D14
IN R620 R627 IN
4
C14 VSSQ VDDQ D3 C14 VSSQ VDDQ D3 4
549 549
C3 VSSQ VDDQ E10 C3 VSSQ VDDQ E10
1% 1%
0402 0402
C4 VSSQ VDDQ E5 C4 VSSQ VDDQ E5
COMMON COMMON E1 VSSQ VDDQ F1 E1 VSSQ VDDQ F1
0.4MM 0.4MM E12 VSSQ VDDQ F12 E12 VSSQ VDDQ F12
Fbb_Cmd<0> FBB_VREF_D FBB_VREF_C E14 F14 E14 F14
Fbb_Cmd<0> VSSQ VDDQ VSSQ VDDQ
Fbb_Cmd<1> E3 VSSQ VDDQ F3 E3 VSSQ VDDQ F3
Fbb_Cmd<1>
Fbb_Cmd<2> F10 VSSQ VDDQ G13 F10 VSSQ VDDQ G13
Fbb_Cmd<2> R624 R630
Fbb_Cmd<3> F5 VSSQ VDDQ G2 F5 VSSQ VDDQ G2
Fbb_Cmd<3> 1.33K 1.33K
Fbb_Cmd<4> H13 VSSQ VDDQ H12 H13 VSSQ VDDQ H12
Fbb_Cmd<4> 1% 1%
Fbb_Cmd<5> H2 VSSQ VDDQ H3 H2 VSSQ VDDQ H3
Fbb_Cmd<5> 0402 R619 R623 0402
Fbb_Cmd<6> COMMON COMMON K13 VSSQ VDDQ K12 K13 VSSQ VDDQ K12
Fbb_Cmd<6> 931 931
Fbb_Cmd<7> K2 VSSQ VDDQ K3 K2 VSSQ VDDQ K3
Fbb_Cmd<7> 1% 1%
Fbb_Cmd<8> M10 VSSQ VDDQ L13 M10 VSSQ VDDQ L13
Fbb_Cmd<8> 0402 0402
Fbb_Cmd<9> COMMON COMMON M5 VSSQ VDDQ L2 M5 VSSQ VDDQ L2
Fbb_Cmd<9>
Fbb_Cmd<10> GND GND N1 VSSQ VDDQ M1 N1 VSSQ VDDQ M1
Fbb_Cmd<10>
Fbb_Cmd<11> 0.4MM N12 VSSQ VDDQ M12 N12 VSSQ VDDQ M12
Fbb_Cmd<11> FBB_VREF_FET
Fbb_Cmd<12> N14 VSSQ VDDQ M14 N14 VSSQ VDDQ M14
Fbb_Cmd<12>
Fbb_Cmd<13> N3 VSSQ VDDQ M3 N3 VSSQ VDDQ M3
Fbb_Cmd<13>
Fbb_Cmd<14> R1 VSSQ VDDQ N10 R1 VSSQ VDDQ N10
Fbb_Cmd<14>
Fbb_Cmd<15> R11 VSSQ VDDQ N5 R11 VSSQ VDDQ N5
Fbb_Cmd<15>
Fbb_Cmd<16> 1G1D1S 3 R12 VSSQ VDDQ P1 R12 VSSQ VDDQ P1
Fbb_Cmd<16> D Q514
Fbb_Cmd<17> R14 VSSQ VDDQ P12 R14 VSSQ VDDQ P12
Fbb_Cmd<17>
Fbb_Cmd<18> R3 VSSQ VDDQ P14 R3 VSSQ VDDQ P14
Fbb_Cmd<18> SOT23
Fbb_Cmd<19> GPIO10_FB_VREF_CTL 5,8,9,11,12,21 1G COMMON R4 VSSQ VDDQ P3 R4 VSSQ VDDQ P3
Fbb_Cmd<19> IN
S
Fbb_Cmd<20> 2 V1 VSSQ VDDQ T1 V1 VSSQ VDDQ T1
Fbb_Cmd<20>
Fbb_Cmd<21> 60V V12 VSSQ VDDQ T12 V12 VSSQ VDDQ T12
Fbb_Cmd<21> 0.26A@25C
Fbb_Cmd<22> 3R V14 VSSQ VDDQ T14 V14 VSSQ VDDQ T14
Fbb_Cmd<22> 0.31A
Fbb_Cmd<23> 0.3W@25C V3 VSSQ VDDQ T3 V3 VSSQ VDDQ T3
Fbb_Cmd<23> +/-20V
Fbb_Cmd<24>
Fbb_Cmd<24>
5
Fbb_Cmd<25> 5
Fbb_Cmd<25>
Fbb_Cmd<26>
Fbb_Cmd<26>
Fbb_Cmd<27> GND GND GND
Fbb_Cmd<27>
Fbb_Cmd<28>
Fbb_Cmd<28>
Fbb_Cmd<29>
Fbb_Cmd<29>
Fbb_Cmd<30>
Fbb_Cmd<31>
Fbb_Cmd<30>
Fbb_Cmd<31>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL FBB Partition
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GPU Framebuffer: Partition C/D


GDDR5 CMD Mapping

0..31 CMD 32..63

CMD0 CAS* CMD16

1 CMD1 CKE* CMD17 1


G1D G1E
CMD2 RST* CMD18
BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425
COMMON COMMON
CMD3 RAS* CMD19
4/27 FBC 5/27 FBD
Fbc_D<0> 45OHM 1 D40 FBC_D0 Fbd_D<0> 45OHM 1 J21 FBD_D0 CMD4 A1_A9 CMD20
8 Fbc_D<0> 9 Fbd_D<0>
Fbc_D<1> 45OHM 1 F38 FBC_D1 Fbd_D<1> 45OHM 1 E20 FBD_D1
8 Fbc_D<1> 9 Fbd_D<1>
Fbc_D<2> 45OHM 1 G38 FBC_D2 Fbd_D<2> 45OHM 1 H21 FBD_D2 CMD5 A0_A10 CMD21
8 Fbc_D<2> 9 Fbd_D<2>
Fbc_D<3> 45OHM 1 E38 FBC_D3 Fbd_D<3> 45OHM 1 F20 FBD_D3
8 Fbc_D<3> 9 Fbd_D<3>
Fbc_D<4> 45OHM 1 H36 FBC_D4 Fbd_D<4> 45OHM 1 D21 FBD_D4 CMD6 A12_RFU CMD22
8 Fbc_D<4> 9 Fbd_D<4>
Fbc_D<5> 45OHM 1 F37 FBC_D5 Fbd_D<5> 45OHM 1 G20 FBD_D5
8 Fbc_D<5> 9 Fbd_D<5>
Fbc_D<6> 45OHM 1 H38 FBC_D6 Fbd_D<6> 45OHM 1 E21 FBD_D6 CMD7 ABI* CMD23
8 Fbc_D<6> 9 Fbd_D<6>
Fbc_D<7> 45OHM 1 F36 FBC_D7 Fbd_D<7> 45OHM 1 H20 FBD_D7
8 Fbc_D<7> 9 Fbd_D<7>
Fbc_D<8> 45OHM 1 D46 FBC_D8 Fbd_D<8> 45OHM 1 E24 FBD_D8 CMD8 A6_A11 CMD24
8 Fbc_D<8> 9 Fbd_D<8>
Fbc_D<9> 45OHM 1 E45 FBC_D9 Fbd_D<9> 45OHM 1 C26 FBD_D9
8 Fbc_D<9> 9 Fbd_D<9>
Fbc_D<10> 45OHM 1 C44 FBC_D10 Fbd_D<10> 45OHM 1 F24 FBD_D10 CMD9 A7_A8 CMD25
8 Fbc_D<10> 9 Fbd_D<10>
Fbc_D<11> 45OHM 1 C48 FBC_D11 Fbd_D<11> 45OHM 1 E26 FBD_D11
8 Fbc_D<11> 9 Fbd_D<11>
Fbc_D<12> 45OHM 1 D45 FBC_D12 Fbd_D<12> 45OHM 1 F25 FBD_D12 CMD10 WE* CMD26
8 Fbc_D<12> 9 Fbd_D<12>
Fbc_D<13> 45OHM 1 D47 FBC_D13 Fbd_D<13> 45OHM 1 F26 FBD_D13
8 Fbc_D<13> 9 Fbd_D<13>
Fbc_D<14> 45OHM 1 D44 FBC_D14 Fbd_D<14> 45OHM 1 G24 FBD_D14 CMD11 A5_BA1 CMD27
8 Fbc_D<14> 9 Fbd_D<14>
Fbc_D<15> 45OHM 1 E44 FBC_D15 Fbd_D<15> 45OHM 1 G26 FBD_D15
8 Fbc_D<15> 9 Fbd_D<15>
Fbc_D<16> 45OHM 1 G41 FBC_D16 Fbd_D<16> 45OHM 1 H23 FBD_D16 CMD12 A4_BA2 CMD28
8 Fbc_D<16> 9 Fbd_D<16>
Fbc_D<17> 45OHM 1 K39 FBC_D17 Fbd_D<17> 45OHM 1 H24 FBD_D17
8 Fbc_D<17> 9 Fbd_D<17>
Fbc_D<18> 45OHM 1 H42 FBC_D18 Fbd_D<18> 45OHM 1 F23 FBD_D18 CMD13 A2_BA0 CMD29
8 Fbc_D<18> 9 Fbd_D<18>
Fbc_D<19> 45OHM 1 K41 FBC_D19 Fbd_D<19> 45OHM 1 J24 FBD_D19
8 Fbc_D<19> 9 Fbd_D<19>
Fbc_D<20> 45OHM 1 G44 FBC_D20 Fbd_D<20> 45OHM 1 F22 FBD_D20 CMD14 A3_BA3 CMD30
8 Fbc_D<20> 9 Fbd_D<20>
Fbc_D<21> 45OHM 1 J39 FBC_D21 Fbd_D<21> 45OHM 1 J23 FBD_D21
8 Fbc_D<21> 9 Fbd_D<21>
Fbc_D<22> 45OHM 1 F43 FBC_D22 Fbd_D<22> 45OHM 1 D22 FBD_D22 CMD15 CS* CMD31
8 Fbc_D<22> 9 Fbd_D<22>
2
Fbc_D<23> 45OHM 1 J41 FBC_D23 Fbd_D<23> 45OHM 1 G23 FBD_D23 2
8 Fbc_D<23> 9 Fbd_D<23>
Fbc_D<24> 45OHM 1 E42 FBC_D24 Fbd_D<24> 45OHM 1 E18 FBD_D24 FBVDDQ
8 Fbc_D<24> 9 Fbd_D<24>
Fbc_D<25> 45OHM 1 G39 FBC_D25 Fbd_D<25> 45OHM 1 J20 FBD_D25
8 Fbc_D<25> 9 Fbd_D<25>
Fbc_D<26> 45OHM 1 D43 FBC_D26 Fbd_D<26> 45OHM 1 D18 FBD_D26 R716
8 Fbc_D<26> 9 Fbd_D<26> FBD_CMD<1> 10K
Fbc_D<27> 45OHM 1 D41 FBC_D27 Fbd_D<27> 45OHM 1 J18 FBD_D27
8 Fbc_D<27> 9 Fbd_D<27>
Fbc_D<28> 45OHM 1 D42 FBC_D28 Fbd_D<28> 45OHM 1 G18 FBD_D28 0402 5% COMMON
8 Fbc_D<28> 9 Fbd_D<28> FBD_CMD<17> 10K
Fbc_D<29> 45OHM 1 E39 FBC_D29 Fbd_D<29> 45OHM 1 F17 FBD_D29
8 Fbc_D<29> 9 Fbd_D<29>
Fbc_D<30> 45OHM 1 C42 FBC_D30 Fbd_D<30> 45OHM 1 H18 FBD_D30 0402 5% COMMON
8 Fbc_D<30> 9 Fbd_D<30>
Fbc_D<31> 45OHM 1 E41 FBC_D31 Fbd_D<31> 45OHM 1 E17 FBD_D31
8 Fbc_D<31> 9 Fbd_D<31>
Fbc_D<32> 45OHM 1 P48 FBC_D32 Fbd_D<32> 45OHM 1 J32 FBD_D32 R683
8 Fbc_D<32> 9 Fbd_D<32>
Fbc_D<33> 45OHM 1 R47 FBC_D33 FBC_CMD0 B38 Fbc_Cmd<0> 45OHM Fbd_D<33> 45OHM 1 E33 FBD_D33 FBD_CMD0 B17 Fbd_Cmd<0> 45OHM
8 Fbc_D<33> Fbc_Cmd<0> 9 Fbd_D<33> Fbd_Cmd<0>
Fbc_D<34> 45OHM 1 R46 FBC_D34 FBC_CMD1 A38 Fbc_Cmd<1> 45OHM Fbd_D<34> 45OHM 1 H32 FBD_D34 FBD_CMD1 A17 Fbd_Cmd<1> 45OHM
8 Fbc_D<34> Fbc_Cmd<1> 9 Fbd_D<34> Fbd_Cmd<1>
Fbc_D<35> 45OHM 1 R48 FBC_D35 FBC_CMD2 C38 Fbc_Cmd<2> 45OHM Fbd_D<35> 45OHM 1 F33 FBD_D35 FBD_CMD2 C18 Fbd_Cmd<2> 45OHM
8 Fbc_D<35> Fbc_Cmd<2> 9 Fbd_D<35> Fbd_Cmd<2>
Fbc_D<36> 45OHM 1 U45 FBC_D36 FBC_CMD3 A39 Fbc_Cmd<3> 45OHM FBVDDQ Fbd_D<36> 45OHM 1 D32 FBD_D36 FBD_CMD3 A18 Fbd_Cmd<3> 45OHM
8 Fbc_D<36> Fbc_Cmd<3> 9 Fbd_D<36> Fbd_Cmd<3>
Fbc_D<37> 45OHM 1 T47 FBC_D37 FBC_CMD4 B39 Fbc_Cmd<4> 45OHM Fbd_D<37> 45OHM 1 G33 FBD_D37 FBD_CMD4 B18 Fbd_Cmd<4> 45OHM
8 Fbc_D<37> Fbc_Cmd<4> 9 Fbd_D<37> Fbd_Cmd<4>
Fbc_D<38> 45OHM 1 R45 FBC_D38 FBC_CMD5 B41 Fbc_Cmd<5> 45OHM Fbd_D<38> 45OHM 1 E32 FBD_D38 FBD_CMD5 B20 Fbd_Cmd<5> 45OHM
8 Fbc_D<38> Fbc_Cmd<5> FBC_CMD<1> R680 10K 9 Fbd_D<38> Fbd_Cmd<5>
Fbc_D<39> 45OHM 1 R49 FBC_D39 FBC_CMD6 A41 Fbc_Cmd<6> 45OHM Fbd_D<39> 45OHM 1 H33 FBD_D39 FBD_CMD6 A20 Fbd_Cmd<6> 45OHM
8 Fbc_D<39> Fbc_Cmd<6> 9 Fbd_D<39> Fbd_Cmd<6>
Fbc_D<40> 45OHM 1 G49 FBC_D40 FBC_CMD7 C41 Fbc_Cmd<7> 45OHM 0402 5% COMMON Fbd_D<40> 45OHM 1 E29 FBD_D40 FBD_CMD7 C21 Fbd_Cmd<7> 45OHM
8 Fbc_D<40> Fbc_Cmd<7> FBC_CMD<17> R661 10K 9 Fbd_D<40> Fbd_Cmd<7>
Fbc_D<41> 45OHM 1 H48 FBC_D41 FBC_CMD8 B42 Fbc_Cmd<8> 45OHM Fbd_D<41> 45OHM 1 C27 FBD_D41 FBD_CMD8 B21 Fbd_Cmd<8> 45OHM
8 Fbc_D<41> Fbc_Cmd<8> 9 Fbd_D<41> Fbd_Cmd<8>
Fbc_D<42> 45OHM 1 J50 FBC_D42 FBC_CMD9 B44 Fbc_Cmd<9> 45OHM 0402 5% COMMON Fbd_D<42> 45OHM 1 F29 FBD_D42 FBD_CMD9 B23 Fbd_Cmd<9> 45OHM
8 Fbc_D<42> Fbc_Cmd<9> 9 Fbd_D<42> Fbd_Cmd<9>
Fbc_D<43> 45OHM 1 E50 FBC_D43 FBC_CMD10 A44 Fbc_Cmd<10> 45OHM Fbd_D<43> 45OHM 1 E27 FBD_D43 FBD_CMD10 A23 Fbd_Cmd<10> 45OHM
8 Fbc_D<43> Fbc_Cmd<10> 9 Fbd_D<43> Fbd_Cmd<10>
Fbc_D<44> 45OHM 1 H49 FBC_D44 FBC_CMD11 A45 Fbc_Cmd<11> 45OHM Fbd_D<44> 45OHM 1 F28 FBD_D44 FBD_CMD11 C24 Fbd_Cmd<11> 45OHM
8 Fbc_D<44> Fbc_Cmd<11> 9 Fbd_D<44> Fbd_Cmd<11>
Fbc_D<45> 45OHM 1 F49 FBC_D45 FBC_CMD12 B47 Fbc_Cmd<12> 45OHM Fbd_D<45> 45OHM 1 F27 FBD_D45 FBD_CMD12 A24 Fbd_Cmd<12> 45OHM
8 Fbc_D<45> Fbc_Cmd<12> 9 Fbd_D<45> Fbd_Cmd<12>
Fbc_D<46> 45OHM 1 J49 FBC_D46 FBC_CMD13 A47 Fbc_Cmd<13> 45OHM Fbd_D<46> 45OHM 1 G29 FBD_D46 FBD_CMD13 B24 Fbd_Cmd<13> 45OHM
8 Fbc_D<46> Fbc_Cmd<13> 9 Fbd_D<46> Fbd_Cmd<13>
Fbc_D<47> 45OHM 1 J48 FBC_D47 FBC_CMD14 B48 Fbc_Cmd<14> 45OHM Fbd_D<47> 45OHM 1 G27 FBD_D47 FBD_CMD14 B26 Fbd_Cmd<14> 45OHM
8 Fbc_D<47> Fbc_Cmd<14> 9 Fbd_D<47> Fbd_Cmd<14>
Fbc_D<48> 45OHM 1 M46 FBC_D48 FBC_CMD15 A48 Fbc_Cmd<15> 45OHM Fbd_D<48> 45OHM 1 H30 FBD_D48 FBD_CMD15 A26 Fbd_Cmd<15> 45OHM
8 Fbc_D<48> Fbc_Cmd<15> 9 Fbd_D<48> Fbd_Cmd<15>
Fbc_D<49> 45OHM 1 P43 FBC_D49 FBC_CMD16 R51 Fbc_Cmd<16> 45OHM Fbd_D<49> 45OHM 1 H29 FBD_D49 FBD_CMD16 B36 Fbd_Cmd<16> 45OHM
8 Fbc_D<49> Fbc_Cmd<16> R678 10K FBC_CMD<2> 9 Fbd_D<49> Fbd_Cmd<16>
Fbc_D<50> 45OHM 1 L45 FBC_D50 FBC_CMD17 R52 Fbc_Cmd<17> 45OHM Fbd_D<50> 45OHM 1 F30 FBD_D50 FBD_CMD17 A36 Fbd_Cmd<17> 45OHM
8 Fbc_D<50> Fbc_Cmd<17> 9 Fbd_D<50> Fbd_Cmd<17>
Fbc_D<51> 45OHM 1 M43 FBC_D51 FBC_CMD18 R50 Fbc_Cmd<18> 45OHM 0402 5% COMMON Fbd_D<51> 45OHM 1 J29 FBD_D51 FBD_CMD18 C35 Fbd_Cmd<18> 45OHM
8 Fbc_D<51> Fbc_Cmd<18> R660 10K FBC_CMD<18> 9 Fbd_D<51> Fbd_Cmd<18>
Fbc_D<52> 45OHM 1 J46 FBC_D52 FBC_CMD19 P52 Fbc_Cmd<19> 45OHM Fbd_D<52> 45OHM 1 F31 FBD_D52 FBD_CMD19 A35 Fbd_Cmd<19> 45OHM
8 Fbc_D<52> Fbc_Cmd<19> 9 Fbd_D<52> Fbd_Cmd<19>
3
Fbc_D<53> 45OHM 1 P44 FBC_D53 FBC_CMD20 P51 Fbc_Cmd<20> 45OHM 0402 5% COMMON Fbd_D<53> 45OHM 1 J30 FBD_D53 FBD_CMD20 B35 Fbd_Cmd<20> 45OHM 3
8 Fbc_D<53> Fbc_Cmd<20> 9 Fbd_D<53> Fbd_Cmd<20>
Fbc_D<54> 45OHM 1 K47 FBC_D54 FBC_CMD21 M51 Fbc_Cmd<21> 45OHM Fbd_D<54> 45OHM 1 D31 FBD_D54 FBD_CMD21 B33 Fbd_Cmd<21> 45OHM
8 Fbc_D<54> Fbc_Cmd<21> 9 Fbd_D<54> Fbd_Cmd<21>
Fbc_D<55> 45OHM 1 M44 FBC_D55 FBC_CMD22 M52 Fbc_Cmd<22> 45OHM Fbd_D<55> 45OHM 1 G30 FBD_D55 FBD_CMD22 A33 Fbd_Cmd<22> 45OHM
8 Fbc_D<55> Fbc_Cmd<22> 9 Fbd_D<55> Fbd_Cmd<22>
Fbc_D<56> 45OHM 1 L48 FBC_D56 FBC_CMD23 M50 Fbc_Cmd<23> 45OHM Fbd_D<56> 45OHM 1 E35 FBD_D56 FBD_CMD23 C32 Fbd_Cmd<23> 45OHM
8 Fbc_D<56> Fbc_Cmd<23> 9 Fbd_D<56> Fbd_Cmd<23>
Fbc_D<57> 45OHM 1 P46 FBC_D57 FBC_CMD24 L51 Fbc_Cmd<24> 45OHM Fbd_D<57> 45OHM 1 J33 FBD_D57 FBD_CMD24 B32 Fbd_Cmd<24> 45OHM
8 Fbc_D<57> Fbc_Cmd<24> 9 Fbd_D<57> Fbd_Cmd<24>
Fbc_D<58> 45OHM 1 K49 FBC_D58 FBC_CMD25 J51 Fbc_Cmd<25> 45OHM GND Fbd_D<58> 45OHM 1 D35 FBD_D58 FBD_CMD25 B30 Fbd_Cmd<25> 45OHM
8 Fbc_D<58> Fbc_Cmd<25> 9 Fbd_D<58> Fbd_Cmd<25>
Fbc_D<59> 45OHM 1 M49 FBC_D59 FBC_CMD26 J52 Fbc_Cmd<26> 45OHM Fbd_D<59> 45OHM 1 J35 FBD_D59 FBD_CMD26 A30 Fbd_Cmd<26> 45OHM
8 Fbc_D<59> Fbc_Cmd<26> 9 Fbd_D<59> Fbd_Cmd<26>
Fbc_D<60> 45OHM 1 L49 FBC_D60 FBC_CMD27 H52 Fbc_Cmd<27> 45OHM Fbd_D<60> 45OHM 1 G35 FBD_D60 FBD_CMD27 C29 Fbd_Cmd<27> 45OHM
8 Fbc_D<60> Fbc_Cmd<27> 9 Fbd_D<60> Fbd_Cmd<27>
Fbc_D<61> 45OHM 1 N49 FBC_D61 FBC_CMD28 F51 Fbc_Cmd<28> 45OHM Fbd_D<61> 45OHM 1 D38 FBD_D61 FBD_CMD28 A29 Fbd_Cmd<28> 45OHM
8 Fbc_D<61> Fbc_Cmd<28> 9 Fbd_D<61> Fbd_Cmd<28>
Fbc_D<62> 45OHM 1 L50 FBC_D62 FBC_CMD29 F52 Fbc_Cmd<29> 45OHM Fbd_D<62> 45OHM 1 H35 FBD_D62 FBD_CMD29 B29 Fbd_Cmd<29> 45OHM
8 Fbc_D<62> Fbc_Cmd<29> 9 Fbd_D<62> Fbd_Cmd<29>
Fbc_D<63> 45OHM 1 M48 FBC_D63 FBC_CMD30 E51 Fbc_Cmd<30> 45OHM Fbd_D<63> 45OHM 1 E36 FBD_D63 FBD_CMD30 B27 Fbd_Cmd<30> 45OHM
8 Fbc_D<63> Fbc_Cmd<30> 9 Fbd_D<63> Fbd_Cmd<30>
FBC_CMD31 E52 Fbc_Cmd<31> 45OHM FBD_CMD31 A27 Fbd_Cmd<31> 45OHM
Fbc_Cmd<31> Fbd_Cmd<31>
FBC_DBI<0> 45OHM 1 G36 FBC_DQM0 FBD_DBI<0> 45OHM 1 C20 FBD_DQM0
OUT OUT
FBC_DBI<1> C45 FBD_DBI<1> D26 R708 10K FBD_CMD<2>
OUT 45OHM 1 FBC_DQM1 OUT 45OHM 1 FBD_DQM1
FBC_DBI<2> 45OHM 1 H39 FBC_DQM2 FBD_DBI<2> 45OHM 1 E23 FBD_DQM2 0402 5% COMMON
OUT OUT
FBC_DBI<3> F41 FBD_DBI<3> D16 R682 10K FBD_CMD<18>
OUT
45OHM 1 FBC_DQM3 OUT
45OHM 1 FBD_DQM3
FBC_DBI<4> 45OHM 1 U46 FBC_DQM4 FBD_DBI<4> 45OHM 1 C33 FBD_DQM4 0402 5% COMMON
OUT OUT
FBC_DBI<5> 45OHM 1 H50 FBC_DQM5 FBD_DBI<5> 45OHM 1 D27 FBD_DQM5
OUT OUT
FBC_DBI<6> 45OHM 1 P45 FBC_DQM6 FBD_DBI<6> 45OHM 1 E30 FBD_DQM6
OUT OUT
FBC_DBI<7> M47 A42 FBC_DEBUG0 FBD_DBI<7> D37 A21 FBD_DEBUG0
OUT
45OHM 1 FBC_DQM7 FBC_DEBUG0 TP13 OUT
45OHM 1 FBD_DQM7 FBD_DEBUG0 TP11
L52 FBC_DEBUG1 A32 FBD_DEBUG1
FBC_DEBUG1 TP15 FBD_DEBUG1 TP12
GND
FBC_EDC<0> 45OHM 1 C39 FBC_DQS_WP0 Net Name DIFF_PAIR NV_NETCLASS
FBD_EDC<0> 45OHM 1 D19 FBD_DQS_WP0 Net Name DIFF_PAIR NV_NETCLASS
BI BI
FBC_EDC<1> 45OHM 1 C47 FBC_DQS_WP1 FBD_EDC<1> 45OHM 1 D25 FBD_DQS_WP1
BI BI
FBC_EDC<2> 45OHM 1 H41 FBC_DQS_WP2 FBC_CLK0 F45 8 FBC_CLK0 FBC_CLK0 FB_CLK FBD_EDC<2> 45OHM 1 C23 FBD_DQS_WP2 FBD_CLK0 H26 9 FBD_CLK0 FBD_CLK0 FB_CLK
BI OUT BI OUT
FBC_EDC<3> 45OHM 1 F40 FBC_DQS_WP3 FBC_CLK0 F44 8 FBC_CLK0* FBC_CLK0 FB_CLK FBD_EDC<3> 45OHM 1 C17 FBD_DQS_WP3 FBD_CLK0 J26 9 FBD_CLK0* FBD_CLK0 FB_CLK
BI OUT BI OUT
FBC_EDC<4> 45OHM 1 P50 FBC_DQS_WP4 FBC_CLK1 H47 8 FBC_CLK1 FBC_CLK1 FB_CLK FBD_EDC<4> 45OHM 1 D34 FBD_DQS_WP4 FBD_CLK1 H27 9 FBD_CLK1 FBD_CLK1 FB_CLK
BI OUT BI OUT
FBC_EDC<5> 45OHM 1 F50 FBC_DQS_WP5 FBC_CLK1 J47 8 FBC_CLK1* FBC_CLK1 FB_CLK FBD_EDC<5> 45OHM 1 D28 FBD_DQS_WP5 FBD_CLK1 J27 9 FBD_CLK1* FBD_CLK1 FB_CLK
BI OUT BI OUT
FBC_EDC<6> 45OHM 1 M45 FBC_DQS_WP6 FBD_EDC<6> 45OHM 1 C30 FBD_DQS_WP6
BI BI
4
FBC_EDC<7> 45OHM 1 N47 FBC_DQS_WP7 FBD_EDC<7> 45OHM 1 C36 FBD_DQS_WP7 4
BI BI

D39 FBC_DQS_RN0 FBC_WCK01 G42 8 FBC_WCK01


FBC_WCK01
FB_WCK D20 FBD_DQS_RN0 FBD_WCK01 G21 9 FBD_WCK01 FBD_WCK01 FB_WCK
OUT
C46 FBC_DQS_RN1 FBC_WCK01 F42 8 FBC_WCK01* FBC_WCK01
FB_WCK D24 FBD_DQS_RN1 FBD_WCK01 F21 9 FBD_WCK01* FBD_WCK01 FB_WCK
OUT OUT
J42 FBC_DQS_RN2 FBC_WCK23 B45 8 FBC_WCK23 FBC_WCK23 FB_WCK D23 FBD_DQS_RN2 FBD_WCK23 F19 9 FBD_WCK23 FBD_WCK23 FB_WCK
OUT OUT
F39 FBC_DQS_RN3 FBC_WCK23 B46 8 FBC_WCK23* FBC_WCK23 FB_WCK D17 FBD_DQS_RN3 FBD_WCK23 F18 9 FBD_WCK23* FBD_WCK23 FB_WCK
OUT OUT
P49 FBC_DQS_RN4 FBC_WCK45 L46 8 FBC_WCK45 FBC_WCK45 FB_WCK D33 FBD_DQS_RN4 FBD_WCK45 G32 9 FBD_WCK45 FBD_WCK45 FB_WCK
OUT OUT
G50 FBC_DQS_RN5 FBC_WCK45 L47 8 FBC_WCK45* FBC_WCK45 FB_WCK D29 FBD_DQS_RN5 FBD_WCK45 F32 9 FBD_WCK45* FBD_WCK45 FB_WCK
OUT OUT
L44 FBC_DQS_RN6 FBC_WCK67 H51 8 FBC_WCK67 FBC_WCK67 FB_WCK D30 FBD_DQS_RN6 FBD_WCK67 F34 9 FBD_WCK67 FBD_WCK67 FB_WCK
OUT OUT
P47 FBC_DQS_RN7 FBC_WCK67 G51 8 FBC_WCK67* FBC_WCK67 FB_WCK D36 FBD_DQS_RN7 FBD_WCK67 F35 9 FBD_WCK67* FBD_WCK67 FB_WCK
OUT OUT

FBC_PLL_AVDD L36 FBD_PLL_AVDD L27 4,10 FB_PLLAVDD


IN
FBC_PLL_AVDD L38 FBD_PLL_AVDD L29
C782 C821
0.1UF 0.1UF
16V 16V
10% 10%
X7R X7R
0402 0402
COMMON COMMON

GND GND

5 5

Title
V257 NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Size Document Number Rev
Custom5 <RevCode> ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL GPU Framebuffer: Partition C/D
Date: Monday, December 06, 2010 Sheet 7 of 1 NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MEMORY: FBC Partition


Title
Fbc_D<0> FBC_DBI<0> 45OHM 1 V257
7 Fbc_D<0> OUT
Fbc_D<1> FBC_DBI<1> 45OHM 1
7 Fbc_D<1> OUT
Fbc_D<2> FBC_DBI<2> 45OHM 1 Size Document Number Rev
7 Fbc_D<2> OUT
Fbc_D<3> FBC_DBI<3> 45OHM 1 Custom5 <RevCode>
7 Fbc_D<3> OUT
Fbc_D<4> FBC_DBI<4> 45OHM 1
7 Fbc_D<4> OUT
Fbc_D<5> FBC_DBI<5> 45OHM 1 Date: Monday, December 06, 2010 Sheet 8 of 1
7 Fbc_D<5> OUT
Fbc_D<6> FBC_DBI<6> 45OHM 1 M7C M8C
7 Fbc_D<6> M7A OUT
Fbc_D<7> FBC_DBI<7> 45OHM 1
7 Fbc_D<7> OUT M8A
Fbc_D<8> BGA_0170_P080_140X120 BGA_0170_P080_140X120 BGA_0170_P080_140X120
7 Fbc_D<8>
Fbc_D<9> COMMON COMMON
BGA_0170_P080_140X120
COMMON
7 Fbc_D<9>
1 7
Fbc_D<10> FBC_EDC<0> 45OHM 1 COMMON
1
Fbc_D<10> MIRRORED BI
Fbc_D<11> FBC_EDC<1> 45OHM 1 3 FBC_CMD<3> L3 RAS 19 FBC_CMD<19> G3 RAS
7 Fbc_D<11>
Fbc_D<12> x32 x16
BI
FBC_EDC<2> 0 FBC_CMD<0> G3
NORMAL 16 FBC_CMD<16> L3
7 Fbc_D<12> BI
45OHM 1 CAS CAS
Fbc_D<13> 0 FBC_D<0> V4 DQ0 FBC_EDC<3> 45OHM 1 10 FBC_CMD<10> G12 WE 32 FBC_D<32> A4 DQ0 26 FBC_CMD<26> L12 WE
7 Fbc_D<13> NC BI
Fbc_D<14> 1 FBC_D<1> V2 DQ1 FBC_EDC<4> 45OHM 1 15 FBC_CMD<15> L12 CS 33 FBC_D<33> A2 DQ1 31 FBC_CMD<31> G12 CS
7 Fbc_D<14> NC BI
Fbc_D<15> 2 FBC_D<2> T4 DQ2 FBC_EDC<5> 45OHM 1 34 FBC_D<34> B4 DQ2
7 Fbc_D<15> NC BI
Fbc_D<16> 3 FBC_D<3> T2 DQ3 FBC_EDC<6> 45OHM 1 7 FBC_CMD<7> J4 ABI 35 FBC_D<35> B2 DQ3 23 FBC_CMD<23> J4 ABI
7 Fbc_D<16> NC BI
Fbc_D<17> 4 FBC_D<4> N4 DQ4 FBC_EDC<7> 45OHM 1 36 FBC_D<36> E4 DQ4
7 Fbc_D<17> NC BI
Fbc_D<18> 5 FBC_D<5> N2 DQ5 5 FBC_CMD<5> K4 A0_A10 37 FBC_D<37> E2 DQ5 21 FBC_CMD<21> H4 A0_A10
7 Fbc_D<18> NC
Fbc_D<19> 6 FBC_D<6> M4 DQ6 4 FBC_CMD<4> K5 A1_A9 38 FBC_D<38> F4 DQ6 20 FBC_CMD<20> H5 A1_A9
7 Fbc_D<19> NC
Fbc_D<20> 7 FBC_D<7> M2 DQ7 13 FBC_CMD<13> K11 A2_BA0 39 FBC_D<39> F2 DQ7 29 FBC_CMD<29> H11 A2_BA0
7 Fbc_D<20> NC
Fbc_D<21> 14 FBC_CMD<14> K10 A3_BA3 30 FBC_CMD<30> H10 A3_BA3
7 Fbc_D<21> FBC_EDC<0> FBC_EDC<4>
Fbc_D<22> R2 EDC0 12 FBC_CMD<12> H11 A4_BA2 C2 EDC0 28 FBC_CMD<28> K11 A4_BA2
7 Fbc_D<22> 0
FBC_DBI<0>
NC 4
FBC_DBI<4>
Fbc_D<23> P2 DBI0 11 FBC_CMD<11> H10 A5_BA1 D2 DBI0 27 FBC_CMD<27> K10 A5_BA1
7 Fbc_D<23> 0 NC 4
Fbc_D<24> 8 FBC_CMD<8> H5 A6_A11 VREFD A10 24 FBC_CMD<24> K5 A6_A11
7 Fbc_D<24>
Fbc_D<25> 9 FBC_CMD<9> H4 A7_A8 25 FBC_CMD<25> K4 A7_A8
7 Fbc_D<25> x32 x16 C684
Fbc_D<26> VREFD V10 6 FBC_CMD<6> J5 RFU_A12 22 FBC_CMD<22> J5 RFU_A12
7 Fbc_D<26> 2200PF
Fbc_D<27> 8 FBC_D<8> V11 DQ8 40 FBC_D<40> A11 DQ8
7 Fbc_D<27> C715 NC 6.3V
Fbc_D<28> 9 FBC_D<9> V13 DQ9 41 FBC_D<41> A13 DQ9
7 Fbc_D<28> 2200PF NC 10%
Fbc_D<29> 10 FBC_D<10> T11 DQ10 42 FBC_D<42> B11 DQ10 X7R
7 Fbc_D<29> 6.3V NC
Fbc_D<30> 11 FBC_D<11> T13 DQ11 43 FBC_D<43> B13 DQ11 0402
7 Fbc_D<30> 10% NC
Fbc_D<31> 12 FBC_D<12> N11 DQ12 X7R
44 FBC_D<44> E11 DQ12 COMMON
7 Fbc_D<31> FBC_CMD<2>
NC
FBC_CMD<18>
Fbc_D<32> 13 FBC_D<13> N13 DQ13 0402 J2 RESET 45 FBC_D<45> E13 DQ13 J2 RESET
7 Fbc_D<32> 2
FBC_CMD<1>
NC 18
FBC_CMD<17>
Fbc_D<33> 14 FBC_D<14> M11 DQ14 COMMON J3 CKE 46 FBC_D<46> F11 DQ14 GND J3 CKE
7 Fbc_D<33> 1 NC 17
Fbc_D<34> 15 FBC_D<15> M13 DQ15 47 FBC_D<47> F13 DQ15
7 Fbc_D<34> NC
Fbc_D<35> GND FBC_CLK0 7 J12 CLK FBC_CLK1 7 J12 CLK
7 Fbc_D<35> FBC_EDC<1>
IN
FBC_EDC<5>
IN
Fbc_D<36> R13 EDC1 FBC_CLK0* 7 J11 CLK C13 EDC1 FBC_CLK1* 7 J11 CLK
7 Fbc_D<36> 1
FBC_DBI<1>
IN 5
FBC_DBI<5>
GND IN
1
P13 DBI1 5
D13 DBI1 NC
R676 R675 R664 R665
FBC_WCK01 7 40.2 40.2 40.2 40.2
2
P4 WCK01 FBC_WCK45 7 D4 WCK01 2
1% 1% IN 1% 1%
FBC_WCK01* 7 P5 WCK01 0402 0402
FBC_WCK45* 7 D5 WCK01 0402 0402
IN IN
COMMON COMMON COMMON COMMON

FBC_CLK0_TERM FBC_CLK1_TERM
Fbc_D<37> .75V .75V
7 Fbc_D<37>
Fbc_D<38> A5 NC_RFU_A5 A5 NC_RFU_A5
7 Fbc_D<38> C720 C697
Fbc_D<39> V5 NC_RFU_V5 V5 NC_RFU_V5
7 Fbc_D<39> 0.01UF 0.01UF
Fbc_D<40>
7 Fbc_D<40> 16V 16V
Fbc_D<41>
7 Fbc_D<41> 10% 10%
Fbc_D<42> X7R X7R
7 Fbc_D<42>
Fbc_D<43> 0402 0402
7 Fbc_D<43>
Fbc_D<44> COMMON COMMON
7 Fbc_D<44>
Fbc_D<45>
7 Fbc_D<45>
Fbc_D<46> GND GND
7 Fbc_D<46>
Fbc_D<47>
7 Fbc_D<47>
Fbc_D<48>
7 Fbc_D<48>
Fbc_D<49>
7 Fbc_D<49>
Fbc_D<50> J14 VREFC J14 VREFC
7 Fbc_D<50>
Fbc_D<51>
7 Fbc_D<51> C706 FBC_ZQ1 C698 FBC_ZQ3
Fbc_D<52> J13 ZQ J13 ZQ
7 Fbc_D<52> 2200PF 2200PF
Fbc_D<53>
7 Fbc_D<53> 6.3V FBC_SEN1 6.3V FBC_SEN3
Fbc_D<54> J10 SEN J10 SEN
7 Fbc_D<54> 10% 10%
Fbc_D<55> X7R X7R
7 Fbc_D<55> R674 R677 R669 R662
Fbc_D<56> 0402 0402
7 Fbc_D<56> 121 1K 121 1K
Fbc_D<57> COMMON COMMON
7 Fbc_D<57> M7D 1% 5% 1% 5%
Fbc_D<58> 0402 0402 0402 0402
7 Fbc_D<58> M8D
Fbc_D<59> BGA_0170_P080_140X120 GND COMMON COMMON FBVDDQ GND COMMON COMMON
7 Fbc_D<59>
Fbc_D<60> COMMON
BGA_0170_P080_140X120
7 Fbc_D<60>
Fbc_D<61> COMMON
7 Fbc_D<61> MIRRORED
Fbc_D<62>
3 7 Fbc_D<62>
Fbc_D<63> x32 x16
M7B NORMAL M8B 3
7 Fbc_D<63> R679
FBC_D<16> A11 DQ16 NC BGA_0170_P080_140X120 FBC_D<48> V11 DQ16 BGA_0170_P080_140X120
1K
FBC_D<17> A13 DQ17 NC GND COMMON FBC_D<49> V13 DQ17 GND COMMON
5%
FBC_D<18> B11 FBC_D<50> T11
FBC_D<19> B13
DQ18
DQ19
NC
NC
Mirrored 0402
COMMON FBC_D<51> T13
DQ18
DQ19
Normal FBVDDQ
FBC_D<20> E11 J1 FBC_D<52> N11 R659 1K FBC_SOE1 J1
DQ20 NC SOE*/MF_VDD DQ20 MF_VSS/SOE*
FBC_D<21> E13 FBC_SOE0 FBC_D<53> N13 0402 5% COMMON
DQ21 NC add 1k to VDD DQ21 add 1k to VSS
FBC_D<22> F11 DQ22 NC
B10 VSS VDD C10 FBC_D<54> M11 DQ22 B10 VSS VDD C10
FBC_D<23> F13 DQ23 NC
B5 VSS VDD C5 FBC_D<55> M13 DQ23 B5 VSS VDD C5
D10 VSS VDD D11 D10 VSS VDD D11
FBC_EDC<2> C13 G10 G1 FBC_EDC<6> R13 G10 G1
2 EDC2 GND VSS VDD 6 EDC2 VSS VDD
FBC_DBI<2> D13 G5 G11 FBC_DBI<6> P13 GND G5 G11
2 DBI2 NC VSS VDD 6 DBI2 VSS VDD
H1 VSS VDD G14 VREFD V10 H1 VSS VDD G14
H14 VSS VDD G4 H14 VSS VDD G4
VREFD A10 K1 VSS VDD L1 x32 x16 K1 VSS VDD L1
FBC_D<24> A4 K14 L11 FBC_D<56> V4 C683 K14 L11
DQ24 VSS VDD DQ24 NC 2200PF VSS VDD
FBC_D<25> A2 DQ25 L10 VSS VDD L14 FBC_D<57> V2 DQ25 NC
L10 VSS VDD L14
FBC_D<26> B4 C714 L5 L4 FBC_D<58> T4 6.3V
L5 L4
DQ26 2200PF VSS VDD DQ26 NC 10% VSS VDD
FBC_D<27> B2 DQ27 P10 VSS VDD P11 FBC_D<59> T2 DQ27 NC X7R P10 VSS VDD P11
6.3V
FBC_D<28> E4 DQ28 T10 VSS VDD R10 FBC_D<60> N4 DQ28 NC
0402 T10 VSS VDD R10
10%
FBC_D<29> E2 DQ29 X7R T5 VSS VDD R5 FBC_D<61> N2 DQ29 NC
COMMON T5 VSS VDD R5
FBC_D<30> F4 DQ30 0402 FBC_D<62> M4 DQ30 NC
FBC_D<31> F2 DQ31 COMMON A1 VSSQ VDDQ B1 FBC_D<63> M2 DQ31 NC
A1 VSSQ VDDQ B1
A12 VSSQ VDDQ B12 GND A12 VSSQ VDDQ B12
FBC_EDC<3> C2 A14 B14 FBC_EDC<7> R2 A14 B14
3 EDC3 VSSQ VDDQ 7 EDC3 NC VSSQ VDDQ
FBC_DBI<3> D2 GND FBVDDQ FBVDDQ A3 B3 FBC_DBI<7> P2 A3 B3
3 DBI3 VSSQ VDDQ 7 DBI3 NC VSSQ VDDQ
C1 VSSQ VDDQ D1 C1 VSSQ VDDQ D1
FBC_WCK23 7 D4 WCK23 C11 VSSQ VDDQ D12 FBC_WCK67 7 P4 WCK23 C11 VSSQ VDDQ D12
IN IN
FBC_WCK23* 7 D5 WCK23 C12 VSSQ VDDQ D14 FBC_WCK67* 7 P5 WCK23 C12 VSSQ VDDQ D14
IN R667 R672 IN
4
C14 VSSQ VDDQ D3 C14 VSSQ VDDQ D3 4
549 549
C3 VSSQ VDDQ E10 C3 VSSQ VDDQ E10
1% 1%
0402 0402
C4 VSSQ VDDQ E5 C4 VSSQ VDDQ E5
COMMON COMMON E1 VSSQ VDDQ F1 E1 VSSQ VDDQ F1
0.4MM 0.4MM E12 VSSQ VDDQ F12 E12 VSSQ VDDQ F12
Fbc_Cmd<0> FBC_VREF_D FBC_VREF_C E14 F14 E14 F14
FBC_CMD<0> VSSQ VDDQ VSSQ VDDQ
Fbc_Cmd<1> E3 VSSQ VDDQ F3 E3 VSSQ VDDQ F3
FBC_CMD<1> R673
Fbc_Cmd<2> F10 VSSQ VDDQ G13 F10 VSSQ VDDQ G13
FBC_CMD<2> R668 1.33K
Fbc_Cmd<3> F5 VSSQ VDDQ G2 F5 VSSQ VDDQ G2
FBC_CMD<3> 1.33K 1%
Fbc_Cmd<4> H13 VSSQ VDDQ H12 H13 VSSQ VDDQ H12
FBC_CMD<4> 1% 0402
Fbc_Cmd<5> COMMON H2 VSSQ VDDQ H3 H2 VSSQ VDDQ H3
FBC_CMD<5> 0402 R670 R671
Fbc_Cmd<6> COMMON K13 VSSQ VDDQ K12 K13 VSSQ VDDQ K12
FBC_CMD<6> 931 931
FBC_CMD<7> K2 VSSQ VDDQ K3 K2 VSSQ VDDQ K3
FBC_CMD<7> 1% 1%
Fbc_Cmd<8> M10 VSSQ VDDQ L13 M10 VSSQ VDDQ L13
Fbc_Cmd<8> 0402 0402
Fbc_Cmd<9> COMMON COMMON M5 VSSQ VDDQ L2 M5 VSSQ VDDQ L2
Fbc_Cmd<9>
Fbc_Cmd<10> GND GND N1 VSSQ VDDQ M1 N1 VSSQ VDDQ M1
Fbc_Cmd<10>
Fbc_Cmd<11> 0.4MM N12 VSSQ VDDQ M12 N12 VSSQ VDDQ M12
Fbc_Cmd<11> FBC_VREF_FET
Fbc_Cmd<12> N14 VSSQ VDDQ M14 N14 VSSQ VDDQ M14
Fbc_Cmd<12>
Fbc_Cmd<13> N3 VSSQ VDDQ M3 N3 VSSQ VDDQ M3
Fbc_Cmd<13>
Fbc_Cmd<14> R1 VSSQ VDDQ N10 R1 VSSQ VDDQ N10
Fbc_Cmd<14>
Fbc_Cmd<15> R11 VSSQ VDDQ N5 R11 VSSQ VDDQ N5
Fbc_Cmd<15>
Fbc_Cmd<16> 1G1D1S 3 R12 VSSQ VDDQ P1 R12 VSSQ VDDQ P1
Fbc_Cmd<16> D Q516
Fbc_Cmd<17> R14 VSSQ VDDQ P12 R14 VSSQ VDDQ P12
Fbc_Cmd<17>
Fbc_Cmd<18> R3 VSSQ VDDQ P14 R3 VSSQ VDDQ P14
Fbc_Cmd<18> SOT23
Fbc_Cmd<19> GPIO10_FB_VREF_CTL 5,6,9,11,12,21 1G COMMON R4 VSSQ VDDQ P3 R4 VSSQ VDDQ P3
Fbc_Cmd<19> IN
S
Fbc_Cmd<20> 2 V1 VSSQ VDDQ T1 V1 VSSQ VDDQ T1
Fbc_Cmd<20>
Fbc_Cmd<21> 60V V12 VSSQ VDDQ T12 V12 VSSQ VDDQ T12
Fbc_Cmd<21> 0.26A@25C
Fbc_Cmd<22> 3R V14 VSSQ VDDQ T14 V14 VSSQ VDDQ T14
Fbc_Cmd<22> 0.31A
Fbc_Cmd<23> 0.3W@25C V3 VSSQ VDDQ T3 V3 VSSQ VDDQ T3
Fbc_Cmd<23> +/-20V
Fbc_Cmd<24>
Fbc_Cmd<24>
5
Fbc_Cmd<25> 5
Fbc_Cmd<25>
Fbc_Cmd<26>
Fbc_Cmd<26>
Fbc_Cmd<27> GND GND GND
Fbc_Cmd<27>
Fbc_Cmd<28>
Fbc_Cmd<28>
Fbc_Cmd<29>
Fbc_Cmd<29>
Fbc_Cmd<30>
Fbc_Cmd<31>
Fbc_Cmd<30>
Fbc_Cmd<31>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL FBC Partition
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MEMORY: FBD Partition Title


V257
Fbd_D<0> FBD_DBI<0> 45OHM 1
7 Fbd_D<0> OUT
Fbd_D<1> FBD_DBI<1> 45OHM 1 Size Document Number Rev
7 Fbd_D<1> OUT
Fbd_D<2> FBD_DBI<2> 45OHM 1 Custom5 <RevCode>
7 Fbd_D<2> OUT
Fbd_D<3> FBD_DBI<3> 45OHM 1
7 Fbd_D<3> OUT
Fbd_D<4> FBD_DBI<4> 45OHM 1 Date: Monday, December 06, 2010 Sheet 9 of 1
7 Fbd_D<4> OUT
Fbd_D<5> FBD_DBI<5> 45OHM 1 M5C M6C
7 Fbd_D<5> M5A OUT
Fbd_D<6> FBD_DBI<6> 45OHM 1
7 Fbd_D<6> OUT M6A
Fbd_D<7> BGA_0170_P080_140X120 FBD_DBI<7> 45OHM 1 BGA_0170_P080_140X120 BGA_0170_P080_140X120
7 Fbd_D<7> OUT
Fbd_D<8> COMMON COMMON
BGA_0170_P080_140X120
COMMON
7 Fbd_D<8>
1
Fbd_D<9> COMMON
1
7 Fbd_D<9> MIRRORED
Fbd_D<10> FBD_EDC<0> 45OHM 1 3 FBD_CMD<3> L3 RAS 19 FBD_CMD<19> G3 RAS
7 Fbd_D<10>
Fbd_D<11> x32 x16
BI
FBD_EDC<1> 0 FBD_CMD<0> G3
NORMAL 16 FBD_CMD<16> L3
7 Fbd_D<11> BI
45OHM 1 CAS CAS
Fbd_D<12> 0 FBD_D<0> V4 DQ0 FBD_EDC<2> 45OHM 1 10 FBD_CMD<10> G12 WE FBD_D<32> A4 DQ0 26 FBD_CMD<26> L12 WE
7 Fbd_D<12> NC BI
Fbd_D<13> 1 FBD_D<1> V2 DQ1 FBD_EDC<3> 45OHM 1 15 FBD_CMD<15> L12 CS FBD_D<33> A2 DQ1 31 FBD_CMD<31> G12 CS
7 Fbd_D<13> NC BI
Fbd_D<14> 2 FBD_D<2> T4 DQ2 FBD_EDC<4> 45OHM 1 FBD_D<34> B4 DQ2
7 Fbd_D<14> NC BI
Fbd_D<15> 3 FBD_D<3> T2 DQ3 FBD_EDC<5> 45OHM 1 7 FBD_CMD<7> J4 ABI FBD_D<35> B2 DQ3 23 FBD_CMD<23> J4 ABI
7 Fbd_D<15> NC BI
Fbd_D<16> 4 FBD_D<4> N4 DQ4 FBD_EDC<6> 45OHM 1 FBD_D<36> E4 DQ4
7 Fbd_D<16> NC BI
Fbd_D<17> 5 FBD_D<5> N2 DQ5 FBD_EDC<7> 45OHM 1 5 FBD_CMD<5> K4 A0_A10 FBD_D<37> E2 DQ5 21 FBD_CMD<21> H4 A0_A10
7 Fbd_D<17> NC BI
Fbd_D<18> 6 FBD_D<6> M4 DQ6 4 FBD_CMD<4> K5 A1_A9 FBD_D<38> F4 DQ6 20 FBD_CMD<20> H5 A1_A9
7 Fbd_D<18> NC
Fbd_D<19> 7 FBD_D<7> M2 DQ7 13 FBD_CMD<13> K11 A2_BA0 FBD_D<39> F2 DQ7 29 FBD_CMD<29> H11 A2_BA0
7 Fbd_D<19> NC
Fbd_D<20> 14 FBD_CMD<14> K10 A3_BA3 30 FBD_CMD<30> H10 A3_BA3
7 Fbd_D<20> FBD_EDC<0> FBD_EDC<4>
Fbd_D<21> R2 EDC0 12 FBD_CMD<12> H11 A4_BA2 C2 EDC0 28 FBD_CMD<28> K11 A4_BA2
7 Fbd_D<21> 0
FBD_DBI<0>
NC 4
FBD_DBI<4>
Fbd_D<22> P2 DBI0 11 FBD_CMD<11> H10 A5_BA1 D2 DBI0 27 FBD_CMD<27> K10 A5_BA1
7 Fbd_D<22> 0 NC 4
Fbd_D<23> 8 FBD_CMD<8> H5 A6_A11 VREFD A10 24 FBD_CMD<24> K5 A6_A11
7 Fbd_D<23>
Fbd_D<24> 9 FBD_CMD<9> H4 A7_A8 25 FBD_CMD<25> K4 A7_A8
7 Fbd_D<24> x32 x16 C797
Fbd_D<25> VREFD V10 6 FBD_CMD<6> J5 RFU_A12 22 FBD_CMD<22> J5 RFU_A12
7 Fbd_D<25> 2200PF
Fbd_D<26> 8 FBD_D<8> V11 DQ8 40 FBD_D<40> A11 DQ8
7 Fbd_D<26> C864 NC 6.3V
Fbd_D<27> 9 FBD_D<9> V13 DQ9 41 FBD_D<41> A13 DQ9
7 Fbd_D<27> 2200PF NC 10%
Fbd_D<28> 10 FBD_D<10> T11 DQ10 42 FBD_D<42> B11 DQ10 X7R
7 Fbd_D<28> 6.3V NC
Fbd_D<29> 11 FBD_D<11> T13 DQ11 43 FBD_D<43> B13 DQ11 0402
7 Fbd_D<29> 10% NC
Fbd_D<30> 12 FBD_D<12> N11 DQ12 X7R
44 FBD_D<44> E11 DQ12 COMMON
7 Fbd_D<30> FBD_CMD<2>
NC
FBD_CMD<18>
Fbd_D<31> 13 FBD_D<13> N13 DQ13 0402 J2 RESET 45 FBD_D<45> E13 DQ13 J2 RESET
7 Fbd_D<31> 2
FBD_CMD<1>
NC 18
FBD_CMD<17>
Fbd_D<32> 14 FBD_D<14> M11 DQ14 COMMON J3 CKE 46 FBD_D<46> F11 DQ14 GND J3 CKE
7 Fbd_D<32> 1 NC 17
Fbd_D<33> 15 FBD_D<15> M13 DQ15 47 FBD_D<47> F13 DQ15
7 Fbd_D<33> NC
Fbd_D<34> GND FBD_CLK0 7 J12 CLK FBD_CLK1 7 J12 CLK
7 Fbd_D<34> FBD_EDC<1>
IN
FBD_EDC<5>
IN
Fbd_D<35> R13 EDC1 FBD_CLK0* 7 J11 CLK C13 EDC1 FBD_CLK1* 7 J11 CLK
7 Fbd_D<35> 1
FBD_DBI<1>
IN 5
FBD_DBI<5>
GND IN
Fbd_D<36> P13 DBI1 D13 DBI1
7 Fbd_D<36> 1 R702 R701 5 NC R689 R690
40.2 40.2 40.2 40.2
2
FBD_WCK01 7 P4 WCK01 FBD_WCK45 7 D4 WCK01 2
IN 1% 1% IN 1% 1%
FBD_WCK01* 7 P5 WCK01 0402 0402
FBD_WCK45* 7 D5 WCK01 0402 0402
IN IN
COMMON COMMON COMMON COMMON

Fbd_D<37> FBD_CLK0_TERM FBD_CLK1_TERM


7 Fbd_D<37>
Fbd_D<38> .75V .75V
7 Fbd_D<38>
Fbd_D<39> A5 NC_RFU_A5 A5 NC_RFU_A5
7 Fbd_D<39> C880 C827
Fbd_D<40> V5 NC_RFU_V5 V5 NC_RFU_V5
7 Fbd_D<40> 0.01UF 0.01UF
Fbd_D<41>
7 Fbd_D<41> 16V 16V
Fbd_D<42>
7 Fbd_D<42> 10% 10%
Fbd_D<43> X7R X7R
7 Fbd_D<43>
Fbd_D<44> 0402 0402
7 Fbd_D<44>
Fbd_D<45> COMMON COMMON
7 Fbd_D<45>
Fbd_D<46>
7 Fbd_D<46>
Fbd_D<47> GND GND
7 Fbd_D<47>
Fbd_D<48>
7 Fbd_D<48>
Fbd_D<49>
7 Fbd_D<49>
Fbd_D<50>
7 Fbd_D<50>
Fbd_D<51> J14 VREFC J14 VREFC
7 Fbd_D<51>
Fbd_D<52>
7 Fbd_D<52> C839 FBD_ZQ1 C829 FBD_ZQ3
Fbd_D<53> J13 ZQ J13 ZQ
7 Fbd_D<53> 2200PF 2200PF
Fbd_D<54>
7 Fbd_D<54> 6.3V FBD_SEN1 6.3V FBD_SEN3
Fbd_D<55> J10 SEN J10 SEN
7 Fbd_D<55> 10% 10%
Fbd_D<56> X7R X7R
7 Fbd_D<56> R698 R703 R693 R685
Fbd_D<57> 0402 0402
7 Fbd_D<57> 121 1K 121 1K
Fbd_D<58> COMMON COMMON
7 Fbd_D<58> M5D 1% 5% 1% 5%
Fbd_D<59> 0402 0402 0402 0402
7 Fbd_D<59> M6D
Fbd_D<60> BGA_0170_P080_140X120 GND COMMON COMMON FBVDDQ GND COMMON COMMON
7 Fbd_D<60>
Fbd_D<61> COMMON
BGA_0170_P080_140X120
7 Fbd_D<61>
Fbd_D<62> COMMON
7 Fbd_D<62> MIRRORED
Fbd_D<63>
3 7 Fbd_D<63> x32 x16
M5B NORMAL M6B 3
A11 R714 V11
FBD_D<16> DQ16 NC BGA_0170_P080_140X120 FBD_D<48> DQ16 BGA_0170_P080_140X120
1K
FBD_D<17> A13 DQ17 NC GND COMMON FBD_D<49> V13 DQ17 GND COMMON
5%
FBD_D<18> B11 FBD_D<50> T11
FBD_D<19> B13
DQ18
DQ19
NC
NC
Mirrored 0402
COMMON FBD_D<51> T13
DQ18
DQ19
Normal FBVDDQ
FBD_D<20> E11 J1 FBD_D<52> N11 R681 1K FBD_SOE1 J1
DQ20 NC SOE*/MF_VDD DQ20 MF_VSS/SOE*
FBD_D<21> E13 FBD_SOE0 FBD_D<53> N13 0402 5% COMMON
DQ21 NC add 1k to VDD DQ21 add 1k to VSS
FBD_D<22> F11 DQ22 NC
B10 VSS VDD C10 FBD_D<54> M11 DQ22 B10 VSS VDD C10
FBD_D<23> F13 DQ23 NC
B5 VSS VDD C5 FBD_D<55> M13 DQ23 B5 VSS VDD C5
D10 VSS VDD D11 D10 VSS VDD D11
FBD_EDC<2> C13 G10 G1 FBD_EDC<6> R13 G10 G1
2 EDC2 GND VSS VDD 6 EDC2 VSS VDD
FBD_DBI<2> D13 G5 G11 FBD_DBI<6> P13 GND G5 G11
2 DBI2 NC VSS VDD 6 DBI2 VSS VDD
H1 VSS VDD G14 VREFD V10 H1 VSS VDD G14
H14 VSS VDD G4 H14 VSS VDD G4
VREFD A10 K1 VSS VDD L1 x32 x16 K1 VSS VDD L1
FBD_D<24> A4 K14 L11 FBD_D<56> V4 C798 K14 L11
DQ24 VSS VDD DQ24 NC 2200PF VSS VDD
FBD_D<25> A2 DQ25 L10 VSS VDD L14 FBD_D<57> V2 DQ25 NC
L10 VSS VDD L14
FBD_D<26> B4 C863 L5 L4 FBD_D<58> T4 6.3V
L5 L4
DQ26 2200PF VSS VDD DQ26 NC 10% VSS VDD
FBD_D<27> B2 DQ27 P10 VSS VDD P11 FBD_D<59> T2 DQ27 NC X7R P10 VSS VDD P11
6.3V
FBD_D<28> E4 DQ28 T10 VSS VDD R10 FBD_D<60> N4 DQ28 NC
0402 T10 VSS VDD R10
10%
FBD_D<29> E2 DQ29 X7R T5 VSS VDD R5 FBD_D<61> N2 DQ29 NC
COMMON T5 VSS VDD R5
FBD_D<30> F4 DQ30 0402 FBD_D<62> M4 DQ30 NC
FBD_D<31> F2 DQ31 COMMON A1 VSSQ VDDQ B1 FBD_D<63> M2 DQ31 NC
A1 VSSQ VDDQ B1
A12 VSSQ VDDQ B12 GND A12 VSSQ VDDQ B12
FBD_EDC<3> C2 A14 B14 FBD_EDC<7> R2 A14 B14
3 EDC3 VSSQ VDDQ 7 EDC3 NC VSSQ VDDQ
FBD_DBI<3> D2 GND FBVDDQ FBVDDQ A3 B3 FBD_DBI<7> P2 A3 B3
3 DBI3 VSSQ VDDQ 7 DBI3 NC VSSQ VDDQ
C1 VSSQ VDDQ D1 C1 VSSQ VDDQ D1
FBD_WCK23 7 D4 WCK23 C11 VSSQ VDDQ D12 FBD_WCK67 7 P4 WCK23 C11 VSSQ VDDQ D12
IN IN
FBD_WCK23* 7 D5 WCK23 C12 VSSQ VDDQ D14 FBD_WCK67* 7 P5 WCK23 C12 VSSQ VDDQ D14
IN R691 R696 IN
4
C14 VSSQ VDDQ D3 C14 VSSQ VDDQ D3 4
549 549
C3 VSSQ VDDQ E10 C3 VSSQ VDDQ E10
1% 1%
0402 0402
C4 VSSQ VDDQ E5 C4 VSSQ VDDQ E5
COMMON COMMON E1 VSSQ VDDQ F1 E1 VSSQ VDDQ F1
0.4MM 0.4MM E12 VSSQ VDDQ F12 E12 VSSQ VDDQ F12
Fbd_Cmd<0> FBD_VREF_D FBD_VREF_C E14 F14 E14 F14
Fbd_Cmd<0> VSSQ VDDQ VSSQ VDDQ
Fbd_Cmd<1> E3 VSSQ VDDQ F3 E3 VSSQ VDDQ F3
Fbd_Cmd<1> R697
Fbd_Cmd<2> F10 VSSQ VDDQ G13 F10 VSSQ VDDQ G13
Fbd_Cmd<2> R692 1.33K
Fbd_Cmd<3> F5 VSSQ VDDQ G2 F5 VSSQ VDDQ G2
Fbd_Cmd<3> 1.33K 1%
Fbd_Cmd<4> H13 VSSQ VDDQ H12 H13 VSSQ VDDQ H12
Fbd_Cmd<4> 1% 0402
Fbd_Cmd<5> COMMON H2 VSSQ VDDQ H3 H2 VSSQ VDDQ H3
Fbd_Cmd<5> 0402 R694 R695
Fbd_Cmd<6> COMMON K13 VSSQ VDDQ K12 K13 VSSQ VDDQ K12
Fbd_Cmd<6> 931 931
Fbd_Cmd<7> K2 VSSQ VDDQ K3 K2 VSSQ VDDQ K3
Fbd_Cmd<7> 1% 1%
Fbd_Cmd<8> M10 VSSQ VDDQ L13 M10 VSSQ VDDQ L13
Fbd_Cmd<8> 0402 0402
Fbd_Cmd<9> COMMON COMMON M5 VSSQ VDDQ L2 M5 VSSQ VDDQ L2
Fbd_Cmd<9>
Fbd_Cmd<10> GND GND N1 VSSQ VDDQ M1 N1 VSSQ VDDQ M1
Fbd_Cmd<10>
Fbd_Cmd<11> 0.4MM N12 VSSQ VDDQ M12 N12 VSSQ VDDQ M12
Fbd_Cmd<11> FBD_VREF_FET
Fbd_Cmd<12> N14 VSSQ VDDQ M14 N14 VSSQ VDDQ M14
Fbd_Cmd<12>
Fbd_Cmd<13> N3 VSSQ VDDQ M3 N3 VSSQ VDDQ M3
Fbd_Cmd<13>
Fbd_Cmd<14> R1 VSSQ VDDQ N10 R1 VSSQ VDDQ N10
Fbd_Cmd<14>
Fbd_Cmd<15> R11 VSSQ VDDQ N5 R11 VSSQ VDDQ N5
Fbd_Cmd<15>
Fbd_Cmd<16> 1G1D1S 3 R12 VSSQ VDDQ P1 R12 VSSQ VDDQ P1
Fbd_Cmd<16> D Q517
Fbd_Cmd<17> R14 VSSQ VDDQ P12 R14 VSSQ VDDQ P12
Fbd_Cmd<17>
Fbd_Cmd<18> R3 VSSQ VDDQ P14 R3 VSSQ VDDQ P14
Fbd_Cmd<18> SOT23
Fbd_Cmd<19> GPIO10_FB_VREF_CTL 5,6,8,11,12,21 1G COMMON R4 VSSQ VDDQ P3 R4 VSSQ VDDQ P3
Fbd_Cmd<19> IN
S
Fbd_Cmd<20> 2 V1 VSSQ VDDQ T1 V1 VSSQ VDDQ T1
Fbd_Cmd<20>
Fbd_Cmd<21> 60V V12 VSSQ VDDQ T12 V12 VSSQ VDDQ T12
Fbd_Cmd<21> 0.26A@25C
Fbd_Cmd<22> 3R V14 VSSQ VDDQ T14 V14 VSSQ VDDQ T14
Fbd_Cmd<22> 0.31A
Fbd_Cmd<23> 0.3W@25C V3 VSSQ VDDQ T3 V3 VSSQ VDDQ T3
Fbd_Cmd<23> +/-20V
Fbd_Cmd<24>
Fbd_Cmd<24>
5
Fbd_Cmd<25> 5
Fbd_Cmd<25>
Fbd_Cmd<26>
Fbd_Cmd<26>
Fbd_Cmd<27> GND GND GND
Fbd_Cmd<27>
Fbd_Cmd<28>
Fbd_Cmd<28>
Fbd_Cmd<29>
Fbd_Cmd<29>
Fbd_Cmd<30>
Fbd_Cmd<31>
Fbd_Cmd<30>
Fbd_Cmd<31>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL FBD Partition
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GPU Framebuffer: Partition E/F


GDDR5 CMD Mapping

0..31 CMD 32..63

CMD0 CAS* CMD16

1 CMD1 CKE* CMD17 1


G1F G1G
CMD2 RST* CMD18
BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425
COMMON COMMON
CMD3 RAS* CMD19
6/27 FBE 7/27 FBF
FBE_D<0> N4 FBF_D<0> AM9
11 Fbe_D<0> 0
FBE_D<1>
FBE_D0 12 Fbf_D<0> 0
FBF_D<1>
FBF_D0 CMD4 A1_A9 CMD20
R6 FBE_D1 AN5 FBF_D1
11 Fbe_D<1> 1
FBE_D<2> 12 Fbf_D<1> 1
FBF_D<2>
R7 FBE_D2 AM8 FBF_D2 CMD5 A0_A10 CMD21
11 Fbe_D<2> 2
FBE_D<3> 12 Fbf_D<2> 2
FBF_D<3>
R5 FBE_D3 AN6 FBF_D3
11 Fbe_D<3> 3
FBE_D<4> 12 Fbf_D<3> 3
FBF_D<4>
U8 FBE_D4 AM4 FBF_D4 CMD6 A12_RFU CMD22
11 Fbe_D<4> 4
FBE_D<5> 12 Fbf_D<4> 4
FBF_D<5>
T6 FBE_D5 AN7 FBF_D5
11 Fbe_D<5> 5
FBE_D<6> 12 Fbf_D<5> 5
FBF_D<6>
R8 FBE_D6 AM5 FBF_D6 CMD7 ABI* CMD23
11 Fbe_D<6> 6
FBE_D<7> 12 Fbf_D<6> 6
FBF_D<7>
U6 FBE_D7 AN8 FBF_D7
11 Fbe_D<7> 7
FBE_D<8> 12 Fbf_D<7> 7
FBF_D<8>
G4 FBE_D8 AJ5 FBF_D8 CMD8 A6_A11 CMD24
11 Fbe_D<8> 8
FBE_D<9> 12 Fbf_D<8> 8
FBF_D<9>
H5 FBE_D9 AG3 FBF_D9
11 Fbe_D<9> 9
FBE_D<10> 12 Fbf_D<9> 9
FBF_D<10>
J3 FBE_D10 AJ6 FBF_D10 CMD9 A7_A8 CMD25
11 Fbe_D<10> 10
FBE_D<11> 12 Fbf_D<10> 10
FBF_D<11>
E3 FBE_D11 AG5 FBF_D11
11 Fbe_D<11> 11
FBE_D<12> 12 Fbf_D<11> 11
FBF_D<12>
H4 FBE_D12 AH6 FBF_D12 CMD10 WE* CMD26
11 Fbe_D<12> 12
FBE_D<13> 12 Fbf_D<12> 12
FBF_D<13>
F4 FBE_D13 AG6 FBF_D13
11 Fbe_D<13> 13
FBE_D<14> 12 Fbf_D<13> 13
FBF_D<14>
J4 FBE_D14 AJ7 FBF_D14 CMD11 A5_BA1 CMD27
11 Fbe_D<14> 14
FBE_D<15> 12 Fbf_D<14> 14
FBF_D<15>
J5 FBE_D15 AG7 FBF_D15
11 Fbe_D<15> 15
FBE_D<16> 12 Fbf_D<15> 15
FBF_D<16>
M7 FBE_D16 AK8 FBF_D16 CMD12 A4_BA2 CMD28
11 Fbe_D<16> 16
FBE_D<17> 12 Fbf_D<16> 16
FBF_D<17>
P10 FBE_D17 AJ8 FBF_D17
11 Fbe_D<17> 17
FBE_D<18> 12 Fbf_D<17> 17
FBF_D<18>
L8 FBE_D18 AK6 FBF_D18 CMD13 A2_BA0 CMD29
11 Fbe_D<18> 18
FBE_D<19> 12 Fbf_D<18> 18
FBF_D<19>
M10 FBE_D19 AJ9 FBF_D19
11 Fbe_D<19> 19
FBE_D<20> 12 Fbf_D<19> 19
FBF_D<20>
J7 FBE_D20 AL6 FBF_D20 CMD14 A3_BA3 CMD30
11 Fbe_D<20> 20
FBE_D<21> 12 Fbf_D<20> 20
FBF_D<21>
P9 FBE_D21 AK9 FBF_D21
11 Fbe_D<21> 21
FBE_D<22> 12 Fbf_D<21> 21
FBF_D<22>
K6 FBE_D22 AL4 FBF_D22 CMD15 CS* CMD31
11 Fbe_D<22> 22
FBE_D<23> 12 Fbf_D<22> 22
FBF_D<23>
2
M9 FBE_D23 AK7 FBF_D23 2
11 Fbe_D<23> 23
FBE_D<24> 12 Fbf_D<23> 23
FBF_D<24>
L5 FBE_D24 AR5 FBF_D24
11 Fbe_D<24> 24
FBE_D<25> 12 Fbf_D<24> 24
FBF_D<25>
P7 FBE_D25 AN9 FBF_D25
11 Fbe_D<25> 25
FBE_D<26> 12 Fbf_D<25> 25
FBF_D<26>
K4 FBE_D26 AR4 FBF_D26 FBVDDQ
11 Fbe_D<26> 26
FBE_D<27> 12 Fbf_D<26> 26
FBF_D<27>
M4 FBE_D27 AR9 FBF_D27
11 Fbe_D<27> 27
FBE_D<28> 12 Fbf_D<27> 27
FBF_D<28>
L4 FBE_D28 AR7 FBF_D28
11 Fbe_D<28> 28
FBE_D<29> 12 Fbf_D<28> 28
FBF_D<29> FBF_CMD<1> R770 10K
P5 FBE_D29 AT6 FBF_D29
11 Fbe_D<29> 29
FBE_D<30> 12 Fbf_D<29> 29
FBF_D<30>
L3 FBE_D30 AR8 FBF_D30 0402 5% COMMON
11 Fbe_D<30> 30
FBE_D<31> 12 Fbf_D<30> 30
FBF_D<31> FBF_CMD<17> R769 10K
M5 FBE_D31 AT5 FBF_D31
11 Fbe_D<31> 31
FBE_D<32> 12 Fbf_D<31> 31
FBF_D<32>
E14 FBE_D32 AA9 FBF_D32 0402 5% COMMON
11 Fbe_D<32> 32
FBE_D<33> FBE_CMD<0> 12 Fbf_D<32> 32
FBF_D<33> FBF_CMD<0>
F15 FBE_D33 FBE_CMD0 R2 Y5 FBF_D33 FBF_CMD0 AT2
11 Fbe_D<33> 33
FBE_D<34> FBE_CMD<1>
0 Fbe_Cmd<0> 12 Fbf_D<33> 33
FBF_D<34> FBF_CMD<1>
0 Fbf_Cmd<0>
G15 FBE_D34 FBE_CMD1 R1 AA8 FBF_D34 FBF_CMD1 AT1
11 Fbe_D<34> 34
FBE_D<35> FBE_CMD<2>
1 Fbe_Cmd<1> 12 Fbf_D<34> 34
FBF_D<35> FBF_CMD<2>
1 Fbf_Cmd<1>
E15 FBE_D35 FBE_CMD2 R3 Y6 FBF_D35 FBF_CMD2 AR3
11 Fbe_D<35> 35
FBE_D<36> FBE_CMD<3>
2 Fbe_Cmd<2> 12 Fbf_D<35> 35
FBF_D<36> FBF_CMD<3>
2 Fbf_Cmd<2>
H17 FBE_D36 FBE_CMD3 P1 FBVDDQ AA4 FBF_D36 FBF_CMD3 AR1
11 Fbe_D<36> 36
FBE_D<37> FBE_CMD<4>
3 Fbe_Cmd<3> 12 Fbf_D<36> 36
FBF_D<37> FBF_CMD<4>
3 Fbf_Cmd<3>
F16 FBE_D37 FBE_CMD4 P2 Y7 FBF_D37 FBF_CMD4 AR2
11 Fbe_D<37> 37
FBE_D<38> FBE_CMD<5>
4 Fbe_Cmd<4> 12 Fbf_D<37> 37
FBF_D<38> FBF_CMD<5>
4 Fbf_Cmd<4>
H15 FBE_D38 FBE_CMD5 M2 AA5 FBF_D38 FBF_CMD5 AN2
11 Fbe_D<38> 38
FBE_D<39> FBE_CMD<6>
5 Fbe_Cmd<5> FBE_CMD<1> R760 10K 12 Fbf_D<38> 38
FBF_D<39> FBF_CMD<6>
5 Fbf_Cmd<5>
D15 FBE_D39 FBE_CMD6 M1 Y8 FBF_D39 FBF_CMD6 AN1
11 Fbe_D<39> 39
FBE_D<40> FBE_CMD<7>
6 Fbe_Cmd<6> 12 Fbf_D<39> 39
FBF_D<40> FBF_CMD<7>
6 Fbf_Cmd<6>
D7 FBE_D40 FBE_CMD7 M3 0402 5% COMMON AD5 FBF_D40 FBF_CMD7 AM3
11 Fbe_D<40> 40
FBE_D<41> FBE_CMD<8>
7 Fbe_Cmd<7> FBE_CMD<17> R722 10K 12 Fbf_D<40> 40
FBF_D<41> FBF_CMD<8>
7 Fbf_Cmd<7>
E8 FBE_D41 FBE_CMD8 L2 AF3 FBF_D41 FBF_CMD8 AM2
11 Fbe_D<41> 41
FBE_D<42> FBE_CMD<9>
8 Fbe_Cmd<8> 12 Fbf_D<41> 41
FBF_D<42> FBF_CMD<9>
8 Fbf_Cmd<8>
C9 FBE_D42 FBE_CMD9 J2 0402 5% COMMON AD6 FBF_D42 FBF_CMD9 AK2
11 Fbe_D<42> 42
FBE_D<43> FBE_CMD<10>
9 Fbe_Cmd<9> 12 Fbf_D<42> 42
FBF_D<43> FBF_CMD<10>
9 Fbf_Cmd<9>
C5 FBE_D43 FBE_CMD10 J1 AF5 FBF_D43 FBF_CMD10 AK1
11 Fbe_D<43> 43
FBE_D<44> FBE_CMD<11>
10 Fbe_Cmd<10> 12 Fbf_D<43> 43
FBF_D<44> FBF_CMD<11>
10 Fbf_Cmd<10>
D8 FBE_D44 FBE_CMD11 H1 AE6 FBF_D44 FBF_CMD11 AJ3
11 Fbe_D<44> 44
FBE_D<45> FBE_CMD<12>
11 Fbe_Cmd<11> 12 Fbf_D<44> 44
FBF_D<45> FBF_CMD<12>
11 Fbf_Cmd<11>
D6 FBE_D45 FBE_CMD12 F2 AF6 FBF_D45 FBF_CMD12 AJ1
11 Fbe_D<45> 45
FBE_D<46> FBE_CMD<13>
12 Fbe_Cmd<12> 12 Fbf_D<45> 45
FBF_D<46> FBF_CMD<13>
12 Fbf_Cmd<12>
D9 FBE_D46 FBE_CMD13 F1 AD7 FBF_D46 FBF_CMD13 AJ2
11 Fbe_D<46> 46
FBE_D<47> FBE_CMD<14>
13 Fbe_Cmd<13> 12 Fbf_D<46> 46
FBF_D<47> FBF_CMD<14>
13 Fbf_Cmd<13>
E9 FBE_D47 FBE_CMD14 E2 AF7 FBF_D47 FBF_CMD14 AG2
11 Fbe_D<47> 47
FBE_D<48> FBE_CMD<15>
14 Fbe_Cmd<14> 12 Fbf_D<47> 47
FBF_D<48> FBF_CMD<15>
14 Fbf_Cmd<14>
G12 FBE_D48 FBE_CMD15 E1 AC8 FBF_D48 FBF_CMD15 AG1
11 Fbe_D<48> 48
FBE_D<49> FBE_CMD<16>
15 Fbe_Cmd<15> 12 Fbf_D<48> 48
FBF_D<49> FBF_CMD<16>
15 Fbf_Cmd<15>
K14 FBE_D49 FBE_CMD16 B15 AD8 FBF_D49 FBF_CMD16 U2
11 Fbe_D<49> 49
FBE_D<50> FBE_CMD<17>
16 Fbe_Cmd<16> R768 10K FBE_CMD<2> 12 Fbf_D<49> 49
FBF_D<50> FBF_CMD<17>
16 Fbf_Cmd<16>
H11 FBE_D50 FBE_CMD17 A15 AC6 FBF_D50 FBF_CMD17 U1
11 Fbe_D<50> 50
FBE_D<51> FBE_CMD<18>
17 Fbe_Cmd<17> 12 Fbf_D<50> 50
FBF_D<51> FBF_CMD<18>
17 Fbf_Cmd<17>
K12 FBE_D51 FBE_CMD18 C15 0402 5% COMMON AD9 FBF_D51 FBF_CMD18 V3
11 Fbe_D<51> 51
FBE_D<52> FBE_CMD<19>
18 Fbe_Cmd<18> R720 10K FBE_CMD<18> 12 Fbf_D<51> 51
FBF_D<52> FBF_CMD<19>
18 Fbf_Cmd<18>
G9 FBE_D52 FBE_CMD19 A14 AB6 FBF_D52 FBF_CMD19 V1
11 Fbe_D<52> 52
FBE_D<53> FBE_CMD<20>
19 Fbe_Cmd<19> 12 Fbf_D<52> 52
FBF_D<53> FBF_CMD<20>
19 Fbf_Cmd<19>
3
J14 FBE_D53 FBE_CMD20 B14 0402 5% COMMON AC9 FBF_D53 FBF_CMD20 V2 3
11 Fbe_D<53> 53
FBE_D<54> FBE_CMD<21>
20 Fbe_Cmd<20> 12 Fbf_D<53> 53
FBF_D<54> FBF_CMD<21>
20 Fbf_Cmd<20>
F10 FBE_D54 FBE_CMD21 B12 AB4 FBF_D54 FBF_CMD21 Y2
11 Fbe_D<54> 54
FBE_D<55> FBE_CMD<22>
21 Fbe_Cmd<21> 12 Fbf_D<54> 54
FBF_D<55> FBF_CMD<22>
21 Fbf_Cmd<21>
J12 FBE_D55 FBE_CMD22 A12 AC7 FBF_D55 FBF_CMD22 Y1
11 Fbe_D<55> 55
FBE_D<56> FBE_CMD<23>
22 Fbe_Cmd<22> 12 Fbf_D<55> 55
FBF_D<56> FBF_CMD<23>
22 Fbf_Cmd<22>
E11 FBE_D56 FBE_CMD23 C12 V5 FBF_D56 FBF_CMD23 AA3
11 Fbe_D<56> 56
FBE_D<57> FBE_CMD<24>
23 Fbe_Cmd<23> 12 Fbf_D<56> 56
FBF_D<57> FBF_CMD<24>
23 Fbf_Cmd<23>
G14 FBE_D57 FBE_CMD24 B11 Y9 FBF_D57 FBF_CMD24 AA2
11 Fbe_D<57> 57
FBE_D<58> FBE_CMD<25>
24 Fbe_Cmd<24> 12 Fbf_D<57> 57
FBF_D<58> FBF_CMD<25>
24 Fbf_Cmd<24>
D10 FBE_D58 FBE_CMD25 B9 GND V4 FBF_D58 FBF_CMD25 AC2
11 Fbe_D<58> 58
FBE_D<59> FBE_CMD<26>
25 Fbe_Cmd<25> 12 Fbf_D<58> 58
FBF_D<59> FBF_CMD<26>
25 Fbf_Cmd<25>
D12 FBE_D59 FBE_CMD26 A9 V9 FBF_D59 FBF_CMD26 AC1
11 Fbe_D<59> 59
FBE_D<60> FBE_CMD<27>
26 Fbe_Cmd<26> 12 Fbf_D<59> 59
FBF_D<60> FBF_CMD<27>
26 Fbf_Cmd<26>
D11 FBE_D60 FBE_CMD27 A8 V7 FBF_D60 FBF_CMD27 AD3
11 Fbe_D<60> 60
FBE_D<61> FBE_CMD<28>
27 Fbe_Cmd<27> 12 Fbf_D<60> 60
FBF_D<61> FBF_CMD<28>
27 Fbf_Cmd<27>
D13 FBE_D61 FBE_CMD28 B6 R4 FBF_D61 FBF_CMD28 AD1
11 Fbe_D<61> 61
FBE_D<62> FBE_CMD<29>
28 Fbe_Cmd<28> 12 Fbf_D<61> 61
FBF_D<62> FBF_CMD<29>
28 Fbf_Cmd<28> R761 10K FBF_CMD<2>
C11 FBE_D62 FBE_CMD29 A6 V8 FBF_D62 FBF_CMD29 AD2
11 Fbe_D<62> 62
FBE_D<63> FBE_CMD<30>
29 Fbe_Cmd<29> 12 Fbf_D<62> 62
FBF_D<63> FBF_CMD<30>
29 Fbf_Cmd<29>
E12 FBE_D63 FBE_CMD30 B5 U5 FBF_D63 FBF_CMD30 AF2 0402 5% COMMON
11 Fbe_D<63> 63
FBE_CMD<31>
30 Fbe_Cmd<30> 12 Fbf_D<63> 63
FBF_CMD<31>
30 Fbf_Cmd<30> R757 10K FBF_CMD<18>
FBE_CMD31 A5 FBF_CMD31 AF1
31 Fbe_Cmd<31> 31 Fbf_Cmd<31> 0402 5% COMMON
FBE_DBI<0> U7 FBF_DBI<0> AN3
OUT 0 FBE_DQM0 OUT 0 FBF_DQM0
FBE_DBI<1> H3 FBF_DBI<1> AG4
OUT 1 FBE_DQM1 OUT 1 FBF_DQM1
FBE_DBI<2> P8 FBF_DBI<2> AK5
OUT 2 FBE_DQM2 OUT 2 FBF_DQM2
FBE_DBI<3> M6 FBF_DBI<3> AU4
OUT 3 FBE_DQM3 OUT 3 FBF_DQM3
FBE_DBI<4> G17 FBF_DBI<4> Y3 GND
OUT 4 FBE_DQM4 OUT 4 FBF_DQM4
FBE_DBI<5> C8 FBF_DBI<5> AF4
OUT 5 FBE_DQM5 OUT 5 FBF_DQM5
FBE_DBI<6> H14 FBF_DBI<6> AC5
OUT 6 FBE_DQM6 OUT 6 FBF_DQM6
FBE_DBI<7> F12 L1 FBE_DEBUG0 FBF_DBI<7> T4 AM1 FBF_DEBUG0
OUT 7 FBE_DQM7 FBE_DEBUG0 TP7 OUT 7 FBF_DQM7 FBF_DEBUG0 TP8
A11 FBE_DEBUG1 AA1 FBF_DEBUG1
FBE_DEBUG1 TP10 FBF_DEBUG1 TP6

FBE_EDC<0> P3 FBF_EDC<0> AP4


BI 0
FBE_EDC<1>
FBE_DQS_WP0 Net Name DIFF_PAIR NV_NETCLASS BI 0
FBF_EDC<1>
FBF_DQS_WP0 Net Name DIFF_PAIR NV_NETCLASS
1
F3 FBE_DQS_WP1 AH4 FBF_DQS_WP1
BI BI 1
FBE_EDC<2> M8 H6 11 FBE_CLK0 FBF_EDC<2> AK3 AG8 12 FBF_CLK0
BI 2 FBE_DQS_WP2 FBE_CLK0 FBE_CLK0 FB_CLK
OUT BI 2 FBF_DQS_WP2 FBF_CLK0 FBF_CLK0 FB_CLK
OUT
FBE_EDC<3> N6 J6 11 FBE_CLK0* FBF_EDC<3> AT3 AG9 12 FBF_CLK0*
BI 3 FBE_DQS_WP3 FBE_CLK0 FBE_CLK0 FB_CLK
OUT BI 3 FBF_DQS_WP3 FBF_CLK0 FBF_CLK0 FB_CLK
OUT
FBE_EDC<4> C14 F8 11 FBE_CLK1 FBF_EDC<4> W4 AF8 12 FBF_CLK1
BI 4 FBE_DQS_WP4 FBE_CLK1 FBE_CLK1 FB_CLK
OUT BI 4 FBF_DQS_WP4 FBF_CLK1 FBF_CLK1 FB_CLK
OUT
FBE_EDC<5> C6 F9 11 FBE_CLK1* FBF_EDC<5> AE4 AF9 12 FBF_CLK1*
BI 5 FBE_DQS_WP5 FBE_CLK1 FBE_CLK1 FB_CLK
OUT BI 5 FBF_DQS_WP5 FBF_CLK1 FBF_CLK1 FB_CLK
OUT
FBE_EDC<6> H12 FBF_EDC<6> AC3
BI 6 FBE_DQS_WP6 BI 6 FBF_DQS_WP6
FBE_EDC<7> F13 FBF_EDC<7> U3
4 BI 7 FBE_DQS_WP7 BI 7 FBF_DQS_WP7 4

P4 FBE_DQS_RN0 FBE_WCK01 L7 11 FBE_WCK01 FBE_WCK01 FB_WCK AN4 FBF_DQS_RN0 FBF_WCK01 AM7 12 FBF_WCK01 FBF_WCK01 FB_WCK
OUT OUT
G3 FBE_DQS_RN1 FBE_WCK01 L6 11 FBE_WCK01* FBE_WCK01 FB_WCK AJ4 FBF_DQS_RN1 FBF_WCK01 AM6 12 FBF_WCK01* FBF_WCK01 FB_WCK
OUT OUT
L9 FBE_DQS_RN2 FBE_WCK23 H2 11 FBE_WCK23 FBE_WCK23 FB_WCK AK4 FBF_DQS_RN2 FBF_WCK23 AP6 12 FBF_WCK23 FBF_WCK23 FB_WCK
OUT OUT
P6 FBE_DQS_RN3 FBE_WCK23 G2 11 FBE_WCK23* FBE_WCK23 FB_WCK AT4 FBF_DQS_RN3 FBF_WCK23 AR6 12 FBF_WCK23* FBF_WCK23 FB_WCK
OUT OUT
D14 FBE_DQS_RN4 FBE_WCK45 G11 11 FBE_WCK45 FBE_WCK45 FB_WCK Y4 FBF_DQS_RN4 FBF_WCK45 AA7 12 FBF_WCK45 FBF_WCK45 FB_WCK
OUT OUT
C7 FBE_DQS_RN5 FBE_WCK45 F11 11 FBE_WCK45* FBE_WCK45 FB_WCK AD4 FBF_DQS_RN5 FBF_WCK45 AA6 12 FBF_WCK45* FBF_WCK45 FB_WCK
OUT OUT
J11 FBE_DQS_RN6 FBE_WCK67 B8 11 FBE_WCK67 FBE_WCK67 FB_WCK AC4 FBF_DQS_RN6 FBF_WCK67 W6 12 FBF_WCK67 FBF_WCK67 FB_WCK
OUT OUT
F14 FBE_DQS_RN7 FBE_WCK67 B7 11 FBE_WCK67* FBE_WCK67 FB_WCK U4 FBF_DQS_RN7 FBF_WCK67 V6 12 FBF_WCK67* FBF_WCK67 FB_WCK
OUT OUT

FBE_PLL_AVDD R11 FBF_PLL_AVDD AD11


4,7 FB_PLLAVDD
IN
FBE_PLL_AVDD U11 FBF_PLL_AVDD AF11
C896 C900
0.1UF 0.1UF
16V 16V
10% 10%
X7R X7R
0402 0402
COMMON COMMON

5 GND GND 5

Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 10 of 1
PAGE DETAIL GPU Framebuffer: Partition E/F
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MEMORY: FBE Partition Title


V257
Fbe_D<0> FBE_DBI<0>
10 Fbe_D<0> OUT 0
FBE_DBI<1>
Fbe_D<1> Size Document Number Rev
10 Fbe_D<1> OUT 1
FBE_DBI<2>
Fbe_D<2> Custom5 <RevCode>
10 Fbe_D<2> OUT 2
FBE_DBI<3>
Fbe_D<3>
10 Fbe_D<3> OUT 3
FBE_DBI<4>
Fbe_D<4> Date: Monday, December 06, 2010 Sheet 11 of 1
10 Fbe_D<4> OUT 4
FBE_DBI<5>
Fbe_D<5>
10 Fbe_D<5> OUT 5
FBE_DBI<6>
Fbe_D<6> M1C M4C
10 Fbe_D<6> M1A OUT 6
FBE_DBI<7>
Fbe_D<7>
10 Fbe_D<7> OUT 7 M4A
Fbe_D<8> BGA_0170_P080_140X120 BGA_0170_P080_140X120 BGA_0170_P080_140X120
10 Fbe_D<8>
Fbe_D<9> COMMON COMMON
BGA_0170_P080_140X120
COMMON
10 Fbe_D<9> FBE_EDC<0>
1 10
Fbe_D<10> COMMON
1
Fbe_D<10> MIRRORED BI 0
FBE_EDC<1> FBE_CMD<3> FBE_CMD<19>
Fbe_D<11> L3 RAS G3 RAS
10 Fbe_D<11>
Fbe_D<12> x32 x16
BI 1
FBE_EDC<2>
3
FBE_CMD<0> G3
NORMAL 19
FBE_CMD<16> L3
10 Fbe_D<12> BI 2 0 CAS 16 CAS
Fbe_D<13> FBE_D<0> V4 FBE_EDC<3> FBE_CMD<10> G12 FBE_D<32> A4 FBE_CMD<26> L12
10 Fbe_D<13> 0 DQ0 NC BI 3 10 WE DQ0 26 WE
Fbe_D<14> FBE_D<1> V2 FBE_EDC<4> FBE_CMD<15> L12 FBE_D<33> A2 FBE_CMD<31> G12
10 Fbe_D<14> 1 DQ1 NC BI 4 15 CS DQ1 31 CS
Fbe_D<15> FBE_D<2> T4 FBE_EDC<5> FBE_D<34> B4
10 Fbe_D<15> 2 DQ2 NC BI 5 DQ2
Fbe_D<16> FBE_D<3> T2 FBE_EDC<6> FBE_CMD<7> J4 FBE_D<35> B2 FBE_CMD<23> J4
10 Fbe_D<16> 3 DQ3 NC BI 6 7 ABI DQ3 23 ABI
Fbe_D<17> FBE_D<4> N4 FBE_EDC<7> FBE_D<36> E4
10 Fbe_D<17> 4 DQ4 NC BI 7 DQ4
Fbe_D<18> FBE_D<5> N2 FBE_CMD<5> K4 FBE_D<37> E2 FBE_CMD<21> H4
10 Fbe_D<18> 5 DQ5 NC 5 A0_A10 DQ5 21 A0_A10
Fbe_D<19> FBE_D<6> M4 FBE_CMD<4> K5 FBE_D<38> F4 FBE_CMD<20> H5
10 Fbe_D<19> 6 DQ6 NC 4 A1_A9 DQ6 20 A1_A9
Fbe_D<20> FBE_D<7> M2 FBE_CMD<13> K11 FBE_D<39> F2 FBE_CMD<29> H11
10 Fbe_D<20> 7 DQ7 NC 13 A2_BA0 DQ7 29 A2_BA0
Fbe_D<21> FBE_CMD<14> K10 FBE_CMD<30> H10
10 Fbe_D<21> 14 A3_BA3 30 A3_BA3
Fbe_D<22> FBE_EDC<0> R2 FBE_CMD<12> H11 FBE_EDC<4> C2 FBE_CMD<28> K11
10 Fbe_D<22> 0 EDC0 NC 12 A4_BA2 4 EDC0 28 A4_BA2
Fbe_D<23> FBE_DBI<0> P2 FBE_CMD<11> H10 FBE_DBI<4> D2 FBE_CMD<27> K10
10 Fbe_D<23> 0 DBI0 NC 11 A5_BA1 4 DBI0 27 A5_BA1
Fbe_D<24> FBE_CMD<8> H5 A10 FBE_CMD<24> K5
10 Fbe_D<24> 8 A6_A11 VREFD 24 A6_A11
Fbe_D<25> FBE_CMD<9> H4 FBE_CMD<25> K4
10 Fbe_D<25> 9 A7_A8 C943 25 A7_A8
Fbe_D<26> V10 FBE_CMD<6> J5 x32 x16 FBE_CMD<22> J5
10 Fbe_D<26> VREFD 6 RFU_A12 2200PF 22 RFU_A12
Fbe_D<27> FBE_D<8> V11 FBE_D<40> A11
10 Fbe_D<27> 8 DQ8 C975 DQ8 NC 6.3V
Fbe_D<28> FBE_D<9> V13 FBE_D<41> A13
10 Fbe_D<28> 9 DQ9 2200PF DQ9 NC 10%
Fbe_D<29> FBE_D<10> T11 FBE_D<42> B11
10 Fbe_D<29> 10 DQ10 6.3V
DQ10 NC X7R
Fbe_D<30> FBE_D<11> T13 FBE_D<43> B13 0402
10 Fbe_D<30> 11 DQ11 10% DQ11 NC
Fbe_D<31> FBE_D<12> N11 FBE_D<44> E11 COMMON
10 Fbe_D<31> 12 DQ12 X7R DQ12 NC
Fbe_D<32> FBE_D<13> N13 0402 FBE_CMD<2> J2 FBE_D<45> E13 FBE_CMD<18> J2
10 Fbe_D<32> 13 DQ13 2 RESET DQ13 NC 18 RESET
Fbe_D<33> FBE_D<14> M11 COMMON FBE_CMD<1> J3 FBE_D<46> F11 GND FBE_CMD<17> J3
10 Fbe_D<33> 14 DQ14 1 CKE DQ14 NC 17 CKE
Fbe_D<34> FBE_D<15> M13 FBE_D<47> F13
10 Fbe_D<34> 15 DQ15 DQ15 NC
Fbe_D<35> GND FBE_CLK0 10 J12 CLK FBE_CLK1 10 J12 CLK
10 Fbe_D<35> FBE_EDC<1>
IN
FBE_EDC<5>
IN
Fbe_D<36> R13 EDC1 FBE_CLK0* 10 J11 CLK C13 EDC1 FBE_CLK1* 10 J11 CLK
10 Fbe_D<36> 1
FBE_DBI<1>
IN 5
FBE_DBI<5>
GND IN
1
P13 DBI1 5
D13 DBI1 NC
R762 R773 R732 R733
40.2 40.2 40.2 40.2
2
FBE_WCK01 10 P4 WCK01 FBE_WCK45 10 D4 WCK01 2
IN 1% 1% IN 1% 1%
FBE_WCK01* 10 P5 WCK01 0402 0402
FBE_WCK45* 10 D5 WCK01 0402 0402
IN IN
COMMON COMMON COMMON COMMON
Fbe_D<37>
10 Fbe_D<37> FBE_CLK0_TERM FBE_CLK1_TERM
Fbe_D<38>
10 Fbe_D<38>
Fbe_D<39> .75V .75V
10 Fbe_D<39>
Fbe_D<40> A5 NC_RFU_A5 A5 NC_RFU_A5
10 Fbe_D<40> C999 C961
Fbe_D<41> V5 NC_RFU_V5 V5 NC_RFU_V5
10 Fbe_D<41> 0.01UF 0.01UF
Fbe_D<42>
10 Fbe_D<42> 16V 16V
Fbe_D<43>
10 Fbe_D<43> 10% 10%
Fbe_D<44> X7R X7R
10 Fbe_D<44>
Fbe_D<45> 0402 0402
10 Fbe_D<45>
Fbe_D<46> COMMON COMMON
10 Fbe_D<46>
Fbe_D<47>
10 Fbe_D<47>
Fbe_D<48> GND GND
10 Fbe_D<48>
Fbe_D<49>
10 Fbe_D<49>
Fbe_D<50>
10 Fbe_D<50>
Fbe_D<51>
10 Fbe_D<51>
Fbe_D<52> J14 VREFC J14 VREFC
10 Fbe_D<52>
Fbe_D<53>
10 Fbe_D<53> C995 FBE_ZQ1 C963 FBE_ZQ3
Fbe_D<54> J13 ZQ J13 ZQ
10 Fbe_D<54> 2200PF 2200PF
Fbe_D<55>
10 Fbe_D<55> 6.3V FBE_SEN1 6.3V FBE_SEN3
Fbe_D<56> J10 SEN J10 SEN
10 Fbe_D<56> 10% 10%
Fbe_D<57> X7R X7R
10 Fbe_D<57> R766 R755 R736 R727
Fbe_D<58> 0402 0402
10 Fbe_D<58> 121 1K 121 1K
Fbe_D<59> COMMON COMMON
10 Fbe_D<59> M1D 1% 5% 1% 5%
Fbe_D<60> 0402 0402 0402 0402
10 Fbe_D<60> M4D
Fbe_D<61> BGA_0170_P080_140X120 GND COMMON COMMON FBVDDQ GND COMMON COMMON
10 Fbe_D<61>
Fbe_D<62> COMMON
BGA_0170_P080_140X120
10 Fbe_D<62>
Fbe_D<63> COMMON
10 Fbe_D<63> MIRRORED
3
x32 x16
M1B NORMAL M4B 3
A11 R776 V11
FBE_D<16> 16 DQ16 NC BGA_0170_P080_140X120 FBE_D<48> 48 DQ16 BGA_0170_P080_140X120
1K
FBE_D<17> A13 17 DQ17 NC GND COMMON FBE_D<49> V13 49 DQ17 GND COMMON
5%
FBE_D<18> B11 18 FBE_D<50> T11 50
FBE_D<19> B13 19
DQ18
DQ19
NC
NC
Mirrored 0402
COMMON FBE_D<51> T13 51
DQ18
DQ19
Normal FBVDDQ
FBE_D<20> E11 20 J1 FBE_D<52> N11 52 R719 1K FBE_SOE1 J1
DQ20 NC SOE*/MF_VDD DQ20 MF_VSS/SOE*
FBE_D<21> E13 21 FBE_SOE0 FBE_D<53> N13 53 0402 5% COMMON
DQ21 NC add 1k to VDD DQ21 add 1k to VSS
FBE_D<22> F11 22 DQ22 NC
B10 VSS VDD C10 FBE_D<54> M11 54 DQ22 B10 VSS VDD C10
FBE_D<23> F13 23 DQ23 NC
B5 VSS VDD C5 FBE_D<55> M13 55 DQ23 B5 VSS VDD C5
D10 VSS VDD D11 D10 VSS VDD D11
FBE_EDC<2> C13 G10 G1 FBE_EDC<6> R13 G10 G1
2 EDC2 GND VSS VDD 6 EDC2 VSS VDD
FBE_DBI<2> D13 G5 G11 FBE_DBI<6> P13 GND G5 G11
2 DBI2 NC VSS VDD 6 DBI2 VSS VDD
H1 VSS VDD G14 VREFD V10 H1 VSS VDD G14
H14 VSS VDD G4 H14 VSS VDD G4
VREFD A10 K1 VSS VDD L1 x32 x16 K1 VSS VDD L1
FBE_D<24> A4 K14 L11 FBE_D<56> V4 C942 K14 L11
DQ24 VSS VDD DQ24 NC 2200PF VSS VDD
FBE_D<25> A2 DQ25 L10 VSS VDD L14 FBE_D<57> V2 DQ25 NC
L10 VSS VDD L14
FBE_D<26> B4 C1019 L5 L4 FBE_D<58> T4 6.3V
L5 L4
DQ26 2200PF VSS VDD DQ26 NC 10% VSS VDD
FBE_D<27> B2 DQ27 P10 VSS VDD P11 FBE_D<59> T2 DQ27 NC X7R P10 VSS VDD P11
6.3V
FBE_D<28> E4 DQ28 T10 VSS VDD R10 FBE_D<60> N4 DQ28 NC
0402 T10 VSS VDD R10
10%
FBE_D<29> E2 DQ29 X7R T5 VSS VDD R5 FBE_D<61> N2 DQ29 NC
COMMON T5 VSS VDD R5
FBE_D<30> F4 DQ30 0402 FBE_D<62> M4 DQ30 NC
FBE_D<31> F2 DQ31 COMMON A1 VSSQ VDDQ B1 FBE_D<63> M2 DQ31 NC
A1 VSSQ VDDQ B1
A12 VSSQ VDDQ B12 GND A12 VSSQ VDDQ B12
FBE_EDC<3> C2 A14 B14 FBE_EDC<7> R2 A14 B14
3 EDC3 VSSQ VDDQ 7 EDC3 NC VSSQ VDDQ
FBE_DBI<3> D2 GND FBVDDQ FBVDDQ A3 B3 FBE_DBI<7> P2 A3 B3
3 DBI3 VSSQ VDDQ 7 DBI3 NC VSSQ VDDQ
C1 VSSQ VDDQ D1 C1 VSSQ VDDQ D1
FBE_WCK23 10 D4 WCK23 C11 VSSQ VDDQ D12 FBE_WCK67 10 P4 WCK23 C11 VSSQ VDDQ D12
IN IN
FBE_WCK23* 10 D5 WCK23 C12 VSSQ VDDQ D14 FBE_WCK67* 10 P5 WCK23 C12 VSSQ VDDQ D14
IN R753 R741 IN
4
C14 VSSQ VDDQ D3 C14 VSSQ VDDQ D3 4
549 549
C3 VSSQ VDDQ E10 C3 VSSQ VDDQ E10
1% 1%
0402 0402
C4 VSSQ VDDQ E5 C4 VSSQ VDDQ E5
COMMON COMMON E1 VSSQ VDDQ F1 E1 VSSQ VDDQ F1
0.4MM 0.4MM E12 VSSQ VDDQ F12 E12 VSSQ VDDQ F12
Fbe_Cmd<0> FBE_VREF_D FBE_VREF_C E14 F14 E14 F14
Fbe_Cmd<0> VSSQ VDDQ VSSQ VDDQ
Fbe_Cmd<1> E3 VSSQ VDDQ F3 E3 VSSQ VDDQ F3
Fbe_Cmd<1> R738
Fbe_Cmd<2> F10 VSSQ VDDQ G13 F10 VSSQ VDDQ G13
Fbe_Cmd<2> R751 1.33K
Fbe_Cmd<3> F5 VSSQ VDDQ G2 F5 VSSQ VDDQ G2
Fbe_Cmd<3> 1.33K 1%
Fbe_Cmd<4> H13 VSSQ VDDQ H12 H13 VSSQ VDDQ H12
Fbe_Cmd<4> 1% 0402
Fbe_Cmd<5> COMMON H2 VSSQ VDDQ H3 H2 VSSQ VDDQ H3
Fbe_Cmd<5> 0402 R752 R740
Fbe_Cmd<6> COMMON K13 VSSQ VDDQ K12 K13 VSSQ VDDQ K12
Fbe_Cmd<6> 931 931
Fbe_Cmd<7> K2 VSSQ VDDQ K3 K2 VSSQ VDDQ K3
Fbe_Cmd<7> 1% 1%
Fbe_Cmd<8> M10 VSSQ VDDQ L13 M10 VSSQ VDDQ L13
Fbe_Cmd<8> 0402 0402
Fbe_Cmd<9> COMMON COMMON M5 VSSQ VDDQ L2 M5 VSSQ VDDQ L2
Fbe_Cmd<9>
Fbe_Cmd<10> GND GND N1 VSSQ VDDQ M1 N1 VSSQ VDDQ M1
Fbe_Cmd<10>
Fbe_Cmd<11> 0.4MM N12 VSSQ VDDQ M12 N12 VSSQ VDDQ M12
Fbe_Cmd<11> FBE_VREF_FET
Fbe_Cmd<12> N14 VSSQ VDDQ M14 N14 VSSQ VDDQ M14
Fbe_Cmd<12>
Fbe_Cmd<13> N3 VSSQ VDDQ M3 N3 VSSQ VDDQ M3
Fbe_Cmd<13>
Fbe_Cmd<14> R1 VSSQ VDDQ N10 R1 VSSQ VDDQ N10
Fbe_Cmd<14>
Fbe_Cmd<15> R11 VSSQ VDDQ N5 R11 VSSQ VDDQ N5
Fbe_Cmd<15>
Fbe_Cmd<16> 1G1D1S 3 R12 VSSQ VDDQ P1 R12 VSSQ VDDQ P1
Fbe_Cmd<16> D Q518
Fbe_Cmd<17> R14 VSSQ VDDQ P12 R14 VSSQ VDDQ P12
Fbe_Cmd<17>
Fbe_Cmd<18> R3 VSSQ VDDQ P14 R3 VSSQ VDDQ P14
Fbe_Cmd<18> SOT23
Fbe_Cmd<19> GPIO10_FB_VREF_CTL 1G
5,6,8,9,12,21 COMMON R4 VSSQ VDDQ P3 R4 VSSQ VDDQ P3
Fbe_Cmd<19> IN
S
Fbe_Cmd<20> 2 V1 VSSQ VDDQ T1 V1 VSSQ VDDQ T1
Fbe_Cmd<20>
Fbe_Cmd<21> 60V V12 VSSQ VDDQ T12 V12 VSSQ VDDQ T12
Fbe_Cmd<21> 0.26A@25C
Fbe_Cmd<22> 3R V14 VSSQ VDDQ T14 V14 VSSQ VDDQ T14
Fbe_Cmd<22> 0.31A
Fbe_Cmd<23> 0.3W@25C V3 VSSQ VDDQ T3 V3 VSSQ VDDQ T3
Fbe_Cmd<23> +/-20V
Fbe_Cmd<24>
Fbe_Cmd<24>
5
Fbe_Cmd<25> 5
Fbe_Cmd<25>
Fbe_Cmd<26>
Fbe_Cmd<26>
Fbe_Cmd<27> GND GND GND
Fbe_Cmd<27>
Fbe_Cmd<28>
Fbe_Cmd<28>
Fbe_Cmd<29>
Fbe_Cmd<29>
Fbe_Cmd<30>
Fbe_Cmd<31>
Fbe_Cmd<30>
Fbe_Cmd<31>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL FBE Partition
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MEMORY: FBF Partition Title


V257
Fbf_D<0>
10 Fbf_D<0> FBF_DBI<0>
Fbf_D<1> Size Document Number Rev
10 Fbf_D<1> OUT 0
FBF_DBI<1>
Fbf_D<2> Custom5 <RevCode>
10 Fbf_D<2> OUT 1
FBF_DBI<2>
Fbf_D<3>
10 Fbf_D<3> OUT 2
FBF_DBI<3>
Fbf_D<4> Date: Monday, December 06, 2010 Sheet 12 of 1
10 Fbf_D<4> OUT 3
FBF_DBI<4>
Fbf_D<5>
10 Fbf_D<5> OUT 4
FBF_DBI<5>
Fbf_D<6> M3C M2C
10 Fbf_D<6> M3A OUT 5
FBF_DBI<6>
Fbf_D<7>
10 Fbf_D<7> OUT 6
FBF_DBI<7> M2A
Fbf_D<8> BGA_0170_P080_140X120 BGA_0170_P080_140X120 BGA_0170_P080_140X120
10 Fbf_D<8> OUT 7
Fbf_D<9> COMMON COMMON
BGA_0170_P080_140X120
COMMON
10 Fbf_D<9>
1
Fbf_D<10> COMMON
1
10 Fbf_D<10> MIRRORED
FBF_EDC<0>
Fbf_D<11> FBF_CMD<3> L3 RAS 19 FBF_CMD<19> G3 RAS
10 Fbf_D<11>
Fbf_D<12> x32 x16
BI 0
FBF_EDC<1> FBF_CMD<0> G3
NORMAL 16 FBF_CMD<16> L3
10 Fbf_D<12> BI 1 CAS CAS
Fbf_D<13> FBF_D<0> V4 FBF_EDC<2> FBF_CMD<10> G12 32 FBF_D<32> A4 26 FBF_CMD<26> L12
10 Fbf_D<13> DQ0 NC BI 2 WE DQ0 WE
Fbf_D<14> FBF_D<1> V2 FBF_EDC<3> FBF_CMD<15> L12 33 FBF_D<33> A2 31 FBF_CMD<31> G12
10 Fbf_D<14> DQ1 NC BI 3 CS DQ1 CS
Fbf_D<15> FBF_D<2> T4 FBF_EDC<4> 34 FBF_D<34> B4
10 Fbf_D<15> DQ2 NC BI 4 DQ2
Fbf_D<16> FBF_D<3> T2 FBF_EDC<5> FBF_CMD<7> J4 35 FBF_D<35> B2 23 FBF_CMD<23> J4
10 Fbf_D<16> DQ3 NC BI 5 ABI DQ3 ABI
Fbf_D<17> FBF_D<4> N4 FBF_EDC<6> 36 FBF_D<36> E4
10 Fbf_D<17> DQ4 NC BI 6 DQ4
Fbf_D<18> FBF_D<5> N2 FBF_EDC<7> FBF_CMD<5> K4 37 FBF_D<37> E2 21 FBF_CMD<21> H4
10 Fbf_D<18> DQ5 NC BI 7 A0_A10 DQ5 A0_A10
Fbf_D<19> FBF_D<6> M4 DQ6 FBF_CMD<4> K5 A1_A9 38 FBF_D<38> F4 DQ6 20 FBF_CMD<20> H5 A1_A9
10 Fbf_D<19> NC
Fbf_D<20> FBF_D<7> M2 DQ7 FBF_CMD<13> K11 A2_BA0 39 FBF_D<39> F2 DQ7 29 FBF_CMD<29> H11 A2_BA0
10 Fbf_D<20> NC
Fbf_D<21> FBF_CMD<14> K10 A3_BA3 30 FBF_CMD<30> H10 A3_BA3
10 Fbf_D<21> FBF_EDC<0> FBF_EDC<4>
Fbf_D<22> R2 EDC0 FBF_CMD<12> H11 A4_BA2 C2 EDC0 28 FBF_CMD<28> K11 A4_BA2
10 Fbf_D<22> 0
FBF_DBI<0>
NC 4
FBF_DBI<4>
Fbf_D<23> P2 DBI0 FBF_CMD<11> H10 A5_BA1 D2 DBI0 27 FBF_CMD<27> K10 A5_BA1
10 Fbf_D<23> 0 NC 4
Fbf_D<24> FBF_CMD<8> H5 A6_A11 VREFD A10 24 FBF_CMD<24> K5 A6_A11
10 Fbf_D<24>
Fbf_D<25> FBF_CMD<9> H4 A7_A8 25 FBF_CMD<25> K4 A7_A8
10 Fbf_D<25> x32 x16 C980
Fbf_D<26> VREFD V10 FBF_CMD<6> J5 RFU_A12 22 FBF_CMD<22> J5 RFU_A12
10 Fbf_D<26> 2200PF
Fbf_D<27> FBF_D<8> V11 DQ8 40 FBF_D<40> A11 DQ8
10 Fbf_D<27> C983 NC 6.3V
Fbf_D<28> FBF_D<9> V13 DQ9 41 FBF_D<41> A13 DQ9
10 Fbf_D<28> 2200PF NC 10%
Fbf_D<29> FBF_D<10> T11 DQ10 42 FBF_D<42> B11 DQ10 X7R
10 Fbf_D<29> 6.3V NC
Fbf_D<30> FBF_D<11> T13 DQ11 43 FBF_D<43> B13 DQ11 0402
10 Fbf_D<30> 10% NC
Fbf_D<31> FBF_D<12> N11 DQ12 X7R
44 FBF_D<44> E11 DQ12 COMMON
10 Fbf_D<31> FBF_CMD<2>
NC
FBF_CMD<18>
Fbf_D<32> FBF_D<13> N13 DQ13 0402 J2 RESET 45 FBF_D<45> E13 DQ13 J2 RESET
10 Fbf_D<32> 2
FBF_CMD<1>
NC 18
FBF_CMD<17>
Fbf_D<33> FBF_D<14> M11 DQ14 COMMON J3 CKE 46 FBF_D<46> F11 DQ14 GND J3 CKE
10 Fbf_D<33> 1 NC 17
Fbf_D<34> FBF_D<15> M13 DQ15 47 FBF_D<47> F13 DQ15
10 Fbf_D<34> NC
Fbf_D<35> GND FBF_CLK0 10 J12 CLK FBF_CLK1 10 J12 CLK
10 Fbf_D<35> FBF_EDC<1>
IN
FBF_EDC<5>
IN
Fbf_D<36> R13 EDC1 FBF_CLK0* 10 J11 CLK C13 EDC1 FBF_CLK1* 10 J11 CLK
10 Fbf_D<36> 1
FBF_DBI<1>
IN 5
FBF_DBI<5>
GND IN
1
P13 DBI1 5
D13 DBI1 NC
R763 R774 R759 R765
40.2 40.2 40.2 40.2
2
FBF_WCK01 10 P4 WCK01 FBF_WCK45 10 D4 WCK01 2
IN 1% 1% IN 1% 1%
FBF_WCK01* 10 P5 WCK01 0402 0402
FBF_WCK45* 10 D5 WCK01 0402 0402
IN IN
COMMON COMMON COMMON COMMON

Fbf_D<37> FBF_CLK0_TERM FBF_CLK1_TERM


10 Fbf_D<37>
Fbf_D<38> .75V .75V
10 Fbf_D<38>
Fbf_D<39> A5 NC_RFU_A5 A5 NC_RFU_A5
10 Fbf_D<39> C1000 C990
Fbf_D<40> V5 NC_RFU_V5 V5 NC_RFU_V5
10 Fbf_D<40> 0.01UF 0.01UF
Fbf_D<41>
10 Fbf_D<41> 16V 16V
Fbf_D<42>
10 Fbf_D<42> 10% 10%
Fbf_D<43> X7R X7R
10 Fbf_D<43>
Fbf_D<44> 0402 0402
10 Fbf_D<44>
Fbf_D<45> COMMON COMMON
10 Fbf_D<45>
Fbf_D<46>
10 Fbf_D<46>
Fbf_D<47> GND GND
10 Fbf_D<47>
Fbf_D<48>
10 Fbf_D<48>
Fbf_D<49>
10 Fbf_D<49>
Fbf_D<50>
10 Fbf_D<50>
Fbf_D<51> J14 VREFC J14 VREFC
10 Fbf_D<51>
Fbf_D<52>
10 Fbf_D<52> C1001 FBF_ZQ1 C996 FBF_ZQ3
Fbf_D<53> J13 ZQ J13 ZQ
10 Fbf_D<53> 2200PF 2200PF
Fbf_D<54>
10 Fbf_D<54> 6.3V FBF_SEN1 6.3V FBF_SEN3
Fbf_D<55> J10 SEN J10 SEN
10 Fbf_D<55> 10% 10%
Fbf_D<56> X7R X7R
10 Fbf_D<56> R767 R756 R758 R764
Fbf_D<57> 0402 0402
10 Fbf_D<57> 121 1K 121 1K
Fbf_D<58> COMMON COMMON
10 Fbf_D<58> M3D 1% 5% 1% 5%
Fbf_D<59> 0402 0402 0402 0402
10 Fbf_D<59> M2D
Fbf_D<60> BGA_0170_P080_140X120 GND COMMON COMMON FBVDDQ GND COMMON COMMON
10 Fbf_D<60>
Fbf_D<61> COMMON
BGA_0170_P080_140X120
10 Fbf_D<61>
Fbf_D<62> COMMON
10 Fbf_D<62> MIRRORED
Fbf_D<63>
3
10 Fbf_D<63> x32 x16
M3B NORMAL M2B 3
A11 R772 V11
FBF_D<16> DQ16 NC BGA_0170_P080_140X120 FBF_D<48> DQ16 BGA_0170_P080_140X120
1K
FBF_D<17> A13 DQ17 NC GND COMMON FBF_D<49> V13 DQ17 GND COMMON
5%
FBF_D<18> B11 FBF_D<50> T11
FBF_D<19> B13
DQ18
DQ19
NC
NC
Mirrored 0402
COMMON FBF_D<51> T13
DQ18
DQ19
Normal FBVDDQ
FBF_D<20> E11 J1 FBF_D<52> N11 R771 1K FBF_SOE1 J1
DQ20 NC SOE*/MF_VDD DQ20 MF_VSS/SOE*
FBF_D<21> E13 FBF_SOE0 FBF_D<53> N13 0402 5% COMMON
DQ21 NC add 1k to VDD DQ21 add 1k to VSS
FBF_D<22> F11 DQ22 NC
B10 VSS VDD C10 FBF_D<54> M11 DQ22 B10 VSS VDD C10
FBF_D<23> F13 DQ23 NC
B5 VSS VDD C5 FBF_D<55> M13 DQ23 B5 VSS VDD C5
D10 VSS VDD D11 D10 VSS VDD D11
FBF_EDC<2> C13 G10 G1 FBF_EDC<6> R13 G10 G1
2 EDC2 GND VSS VDD 6 EDC2 VSS VDD
FBF_DBI<2> D13 G5 G11 FBF_DBI<6> P13 GND G5 G11
2 DBI2 NC VSS VDD 6 DBI2 VSS VDD
H1 VSS VDD G14 VREFD V10 H1 VSS VDD G14
H14 VSS VDD G4 H14 VSS VDD G4
VREFD A10 K1 VSS VDD L1 x32 x16 K1 VSS VDD L1
FBF_D<24> A4 K14 L11 FBF_D<56> V4 C1017 K14 L11
DQ24 VSS VDD DQ24 NC 2200PF VSS VDD
FBF_D<25> A2 DQ25 L10 VSS VDD L14 FBF_D<57> V2 DQ25 NC
L10 VSS VDD L14
FBF_D<26> B4 C1020 L5 L4 FBF_D<58> T4 6.3V
L5 L4
DQ26 2200PF VSS VDD DQ26 NC 10% VSS VDD
FBF_D<27> B2 DQ27 P10 VSS VDD P11 FBF_D<59> T2 DQ27 NC X7R P10 VSS VDD P11
6.3V
FBF_D<28> E4 DQ28 T10 VSS VDD R10 FBF_D<60> N4 DQ28 NC
0402 T10 VSS VDD R10
10%
FBF_D<29> E2 DQ29 X7R T5 VSS VDD R5 FBF_D<61> N2 DQ29 NC
COMMON T5 VSS VDD R5
FBF_D<30> F4 DQ30 0402 FBF_D<62> M4 DQ30 NC
FBF_D<31> F2 DQ31 COMMON A1 VSSQ VDDQ B1 FBF_D<63> M2 DQ31 NC
A1 VSSQ VDDQ B1
A12 VSSQ VDDQ B12 GND A12 VSSQ VDDQ B12
FBF_EDC<3> C2 A14 B14 FBF_EDC<7> R2 A14 B14
3 EDC3 VSSQ VDDQ 7 EDC3 NC VSSQ VDDQ
FBF_DBI<3> D2 GND FBVDDQ FBVDDQ A3 B3 FBF_DBI<7> P2 A3 B3
3 DBI3 VSSQ VDDQ 7 DBI3 NC VSSQ VDDQ
C1 VSSQ VDDQ D1 C1 VSSQ VDDQ D1
FBF_WCK23 10 D4 WCK23 C11 VSSQ VDDQ D12 FBF_WCK67 10 P4 WCK23 C11 VSSQ VDDQ D12
IN IN
FBF_WCK23* 10 D5 WCK23 C12 VSSQ VDDQ D14 FBF_WCK67* 10 P5 WCK23 C12 VSSQ VDDQ D14
IN R785 R778 IN
4
C14 VSSQ VDDQ D3 C14 VSSQ VDDQ D3 4
549 549
C3 VSSQ VDDQ E10 C3 VSSQ VDDQ E10
1% 1%
0402 0402
C4 VSSQ VDDQ E5 C4 VSSQ VDDQ E5
COMMON COMMON E1 VSSQ VDDQ F1 E1 VSSQ VDDQ F1
0.4MM 0.4MM E12 VSSQ VDDQ F12 E12 VSSQ VDDQ F12
Fbf_Cmd<0> FBF_VREF_D FBF_VREF_C E14 F14 E14 F14
Fbf_Cmd<0> VSSQ VDDQ VSSQ VDDQ
Fbf_Cmd<1> E3 VSSQ VDDQ F3 E3 VSSQ VDDQ F3
Fbf_Cmd<1> R775
Fbf_Cmd<2> F10 VSSQ VDDQ G13 F10 VSSQ VDDQ G13
Fbf_Cmd<2> R782 1.33K
Fbf_Cmd<3> F5 VSSQ VDDQ G2 F5 VSSQ VDDQ G2
Fbf_Cmd<3> 1.33K 1%
Fbf_Cmd<4> H13 VSSQ VDDQ H12 H13 VSSQ VDDQ H12
Fbf_Cmd<4> 1% 0402
Fbf_Cmd<5> COMMON H2 VSSQ VDDQ H3 H2 VSSQ VDDQ H3
Fbf_Cmd<5> 0402
Fbf_Cmd<6> COMMON K13 VSSQ VDDQ K12 K13 VSSQ VDDQ K12
Fbf_Cmd<6> R786 R783
Fbf_Cmd<7> K2 VSSQ VDDQ K3 K2 VSSQ VDDQ K3
Fbf_Cmd<7> 931 931
Fbf_Cmd<8> M10 VSSQ VDDQ L13 M10 VSSQ VDDQ L13
Fbf_Cmd<8> 1% 1%
Fbf_Cmd<9> M5 VSSQ VDDQ L2 M5 VSSQ VDDQ L2
Fbf_Cmd<9> 0402 0402
Fbf_Cmd<10> GND COMMON COMMON GND N1 VSSQ VDDQ M1 N1 VSSQ VDDQ M1
Fbf_Cmd<10>
Fbf_Cmd<11> 0.4MM N12 VSSQ VDDQ M12 N12 VSSQ VDDQ M12
Fbf_Cmd<11> FBF_VREF_FET
Fbf_Cmd<12> N14 VSSQ VDDQ M14 N14 VSSQ VDDQ M14
Fbf_Cmd<12>
Fbf_Cmd<13> N3 VSSQ VDDQ M3 N3 VSSQ VDDQ M3
Fbf_Cmd<13>
Fbf_Cmd<14> R1 VSSQ VDDQ N10 R1 VSSQ VDDQ N10
Fbf_Cmd<14>
Fbf_Cmd<15> R11 VSSQ VDDQ N5 R11 VSSQ VDDQ N5
Fbf_Cmd<15>
Fbf_Cmd<16> 1G1D1S 3 R12 VSSQ VDDQ P1 R12 VSSQ VDDQ P1
Fbf_Cmd<16> D Q523
Fbf_Cmd<17> R14 VSSQ VDDQ P12 R14 VSSQ VDDQ P12
Fbf_Cmd<17>
Fbf_Cmd<18> R3 VSSQ VDDQ P14 R3 VSSQ VDDQ P14
Fbf_Cmd<18> SOT23
Fbf_Cmd<19> GPIO10_FB_VREF_CTL 1G
5,6,8,9,11,21 COMMON R4 VSSQ VDDQ P3 R4 VSSQ VDDQ P3
Fbf_Cmd<19> IN
S
Fbf_Cmd<20> 2 V1 VSSQ VDDQ T1 V1 VSSQ VDDQ T1
Fbf_Cmd<20>
Fbf_Cmd<21> 60V V12 VSSQ VDDQ T12 V12 VSSQ VDDQ T12
Fbf_Cmd<21> 0.26A@25C
Fbf_Cmd<22> 3R V14 VSSQ VDDQ T14 V14 VSSQ VDDQ T14
Fbf_Cmd<22> 0.31A
Fbf_Cmd<23> 0.3W@25C V3 VSSQ VDDQ T3 V3 VSSQ VDDQ T3
Fbf_Cmd<23> +/-20V
Fbf_Cmd<24>
Fbf_Cmd<24>
5
Fbf_Cmd<25> 5
Fbf_Cmd<25>
Fbf_Cmd<26>
Fbf_Cmd<26>
Fbf_Cmd<27> GND GND GND
Fbf_Cmd<27>
Fbf_Cmd<28>
Fbf_Cmd<28>
Fbf_Cmd<29>
Fbf_Cmd<29>
Fbf_Cmd<30>
Fbf_Cmd<31>
Fbf_Cmd<30>
Fbf_Cmd<31>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL FBF Partition
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GDDR5 Memory Decoupling


DECOUPLING: FBA<31..0> DECOUPLING: FBA<63..32>

1 1

FBVDDQ UNDER MEMORY: FBVDDQ UNDER MEMORY:


10x 1uF 0402 10x 1uF 0402
4x 4.7uF 0603 4x 4.7uF 0603
FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY:
2x 10uF 0805 2x 10uF 0805

DECOUPLING: FBB<31..0> DECOUPLING: FBC<31..0> DECOUPLING: FBD<31..0> DECOUPLING: FBE<31..0> DECOUPLING: FBF<31..0>

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

2 2

C614 C657 C609 C642 C589 C661 C716 C709 C735 C703 C717 C730 C862 C922 C919 C861 C920 C913 C1014 C1002 C1011 C984 C991 C976 C1003 C982 C989 C986 C978 C1012
1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND GND GND GND GND

C620 C640 C646 C612 C597 C668 C704 C736 C734 C725 C737 C729 C836 C923 C852 C837 C916 C915 C981 C1016 C988 C1009 C1024 C967 C992 C1015 C1031 C1010 C1027 C1023
1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND GND GND GND GND

3 3
C673 C594 C588 C670 C708 C731 C721 C723 C965 C848 C881 C883 C972 C1007 C974 C1028 C973 C969 C1030 C970
FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF
10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V
4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY:
0603 0603 0805 0805 0603 0603 0805 0805 0603 0603 0805 0805 0603 0603 0805 0805 0603 0603 0805 0805
2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON

GND GND GND GND GND

DECOUPLING: FBB<63..32> DECOUPLING: FBC<63..32> DECOUPLING: FBD<63..32> DECOUPLING: FBE<63..32> DECOUPLING: FBF<63..32>

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

C586 C606 C617 C637 C633 C618 C696 C685 C679 C649 C665 C666 C815 C740 C741 C799 C751 C822 C933 C958 C926 C945 C929 C957 C994 C987 C1006 C997 C977 C1018
1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

4 4

GND GND GND GND GND

C652 C626 C659 C644 C596 C674 C651 C686 C695 C650 C648 C693 C753 C742 C808 C800 C825 C739 C928 C927 C944 C956 C932 C931 C979 C1022 C985 C1008 C968 C1025
1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF 1UF 1UF 1UF 1UF 4.7UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 20%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603 0402 0402 0402 0402 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND GND GND GND GND

C671 C598 C590 C669 C663 C690 C680 C681 C812 C748 C792 C784 C952 C948 C939 C938 C971 C1026 C1029 C966
FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF FBVDDQ UNDER MEMORY: 4.7UF 4.7UF 10UF 10UF
10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V 10x 1uF 0402 6.3V 6.3V 6.3V 6.3V
4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20% 4x 4.7uF 0603 20% 20% 20% 20%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY: FBVDDQ AROUND MEMORY:
0603 0603 0805 0805 0603 0603 0805 0805 0603 0603 0805 0805 0603 0603 0805 0805 0603 0603 0805 0805
2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON 2x 10uF 0805 COMMON COMMON COMMON COMMON

5 5
GND GND GND GND GND

Title
V257 NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Size Document Number Rev
Custom5 <RevCode> ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL GDDR5 Memory Decoupling
Date: Monday, December 06, 2010 Sheet 13 of 1 NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GPU DECOUPLING (NVVDD,FBVDDQ)

1 1

FBVDDQ FBVDDQ Decap under GPU


NVVDD NVVDD Decap under GPU
C860 C814 C845 C793
C775 C806 C908 C811 C899 C831 C894 C760
0.1UF 0.1UF 0.47UF 0.47UF 1UF 4.7UF 10UF 22UF 330UF 330UF 330UF 330UF
16V 16V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V COMMON COMMON COMMON COMMON
10% 10% 10% 10% 10% 20% 20% 20% -35%-10% -35%-10% -35%-10% -35%-10%
X7R X7R X5R X5R X5R X5R X5R X5R 2.5V 2.5V 2.5V 2.5V
0402 0402 0402 0402 0402 0603 0805 0805 POSCAP POSCAP POSCAP POSCAP
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 3.0A 3.0A 3.0A 3.0A
0.009R 0.009R 0.009R 0.009R
CAP_SMD_7343 CAP_SMD_7343 CAP_SMD_7343 CAP_SMD_7343

2 GND 2
GND

C813 C898 C796 C757 C855 C888 C710 C718


0.1UF 0.47UF 0.47UF 0.47UF 1UF 4.7UF 10UF 22UF
16V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 20% 20% 20% C791 C842 C868 C818
X7R X5R X5R X5R X5R X5R X5R X5R 47UF 47UF 47UF 47UF
0402 0402 0402 0402 0402 0603 0805 0805
6.3V 6.3V 6.3V 6.3V
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
20% 20% 20% 20%
X5R X5R X5R X5R
1206 1206 1206 1206
COMMON COMMON COMMON COMMON

GND

GND

C762 C859 C749 C746 C843 C910 C946 C895


0.1UF 0.47UF 1UF 1UF 4.7UF 4.7UF 10UF 22UF
16V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 20% 20% 20% 20%
X7R X5R X5R X5R X5R X5R X5R X5R
C841 C787 C840 C786 C820 C819 C874 C873
0402 0402 0402 0402 0603 0603 0805 0805
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
22UF 22UF 22UF 22UF 22UF 22UF 22UF 22UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 20%
X5R X5R X5R X5R X5R X5R X5R X5R
0805 0805 0805 0805 0805 0805 0805 0805
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND
3 3

GND
C763 C906 C768 C764 C752 C789 C699 C951
0.1UF 0.47UF 1UF 1UF 4.7UF 4.7UF 10UF 22UF
16V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 20% 20% 20% 20%
X7R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0603 0603 0805 0805
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON C778 C904 C893 C890 C776 C773 C884 C889 C761 C834 C891 C783
1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
GND COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

C867 C765 C878 C769 C750 C917 C959 C940


GND
0.1UF 0.47UF 1UF 1UF 4.7UF 4.7UF 10UF 22UF
16V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 20% 20% 20% 20%
X7R X5R X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0603 0603 0805 0805
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON C886 C885 C747 C905 C781 C766
1UF 1UF 1UF 1UF 1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10%
X5R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0402 0402
GND COMMON COMMON COMMON COMMON COMMON COMMON

4 4

C851 C767 C759 C700


GND
0.1UF 0.1UF 10UF 22UF
16V 16V 6.3V 6.3V
10% 10% 20% 20%
X7R X7R X5R X5R
0402 0402 0805 0805
COMMON COMMON COMMON COMMON

GND

FBVDDQ under GPU


0.1uF 0402 X7R x8
0.47uF 0402 X5R x8
1uF 0402 X5R x8
FBVDDQ around GPU
4.7uF 0603 X5R x8
5 10uF 0805 X5R x6 5

22uF 0805 X5R x6


Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 14 of 1
PAGE DETAIL GPU Decoupling(NVVDD,FBVDDQ)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Display: DACA (South DVI-I Lower)

EMI filter, place close to DVI

1 1

GENERIC_SEZ2
R813 33 I2CA_SCL_T GENERIC_SEZ2
LB511 180R@100MHz 17 GENERIC_SEZ2
I2CA_SCL_C
OUT
0402 5% COMMON IND_SMD_0603 COMMON
R812 C1041
2.2K 22PF
5% 50V
0402 5%
COMMON C0G
DDC_5V 0402
COMMON

GND

R795
2.2K
5%
0402
COMMON GENERIC_SEZ2
GENERIC_SEZ2
R794 33 I2CA_SDA_T
GENERIC_SEZ2
LB510 180R@100MHz 17 I2CA_SDA_C
OUT
0402 5% COMMON IND_SMD_0603 COMMON
C1042
22PF
50V
5%
C0G
0402
COMMON

GND
R27 22
0402 5% DNI
2 2

DDC_5V

14
U1B
4 GENERIC_SEZ1 GENERIC_SEZ1 GENERIC_SEZ1
6 DACA_HSYNC_BUF R28 33 DACA_HSYNC_R L4 27nH 17 DACA_HSYNC_C
OUT
5 SO14_I335X150 0402 5% COMMON DDC_5V IND_SMD_0402
COMMON
C46
COMMON
2.2PF
DDC_5V

2
50V
D511 0.25PF
C0G
C13 3 SOT23 0402
0.1UF 70V COMMON
16V 215MA
10%
GND DNI
R31 22 GND
X7R

1
0402 0402 5% DNI
COMMON
DDC_5V
GND GND

14
place Near sync buffer
U1A
1 GENERIC_SEZ1 GENERIC_SEZ1 GENERIC_SEZ1
3 DACA_VSYNC_BUF R29 33 DACA_VSYNC_R L5 27nH 17 DACA_VSYNC_C
OUT
2 SO14_I335X150 0402 5% COMMON DDC_5V IND_SMD_0402
COMMON

COMMON
C48

7
2.2PF

2
D510
50V
3 0.25PF 3
3 SOT23
C0G
70V
0402
215MA
GND COMMON
DNI

1
GND

GND
DAC_RGB
DAC_RGB
L506 27nH 17 DACA_RED_C
OUT
IND_SMD_0402
COMMON

R822 C1052 C1055


150 5.6PF 5.6PF
1% 50V 50V
0402 0.5PF 0.5PF
COMMON C0G C0G
0402 0402
DNI COMMON

GND GND GND

16 DAC_VDD
OUT

G1H DAC_RGB
DAC_RGB
L504 27nH 17 DACA_GREEN_C
OUT
BGA_1981_P080_P100_425X425 IND_SMD_0402
COMMON
COMMON
3V3_F
R820 C1049 C1057
8/27 DACA
Secondary bead option:180ohm(0.2ohm)
LB505 300R@100MHz I2CA_SCL 150 5.6PF 5.6PF
4 3.3V 0.14A 0.4MM BD21 DACA_VDD I2CA_SCL AW4 4
I2CA_SDA 1% 50V 50V
IND_SMD_0603
COMMON I2CA_SDA AY4 0402 0.5PF 0.5PF
DACA_VREF BG21 DACA_VREF COMMON C0G C0G
0402 0402
DACA_RSET BC23 BF21 DACA_HSYNC DNI COMMON
DACA_RSET DACA_HSYNC GENERIC_SEZ1
BE21 DACA_VSYNC
DACA_VSYNC GENERIC_SEZ1
GND GND GND
C824 C832 C866 C850 C854 R699
4.7UF 1UF 0.1UF 0.1UF 0.1UF 124 DACA_RED
DACA_RED BH21
6.3V 6.3V 16V 16V 16V 1%
10% 10% 10% 10% 10% 0402
BJ22 DACA_GREEN
X5R X5R X7R X7R X7R COMMON DACA_GREEN
0805 0402 0402 0402 0402 DAC_RGB
COMMON COMMON COMMON COMMON COMMON
DACA_BLUE BJ21 DACA_BLUE
DAC_RGB
L505 27nH 17 DACA_BLUE_C
OUT
IND_SMD_0402
COMMON
R53 R55 R54
150 150 150 R821 C1051 C1056
1% 1% 1% 150 5.6PF 5.6PF
0402 0402 0402 1% 50V 50V
COMMON COMMON COMMON 0402 0.5PF 0.5PF
COMMON C0G C0G
0402 0402
GND DNI COMMON

GND GND GND GND GND GND

5 5

Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 15 of 1
PAGE DETAIL Display:DACA (South DVI-I Lower)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Display: DACB (South DVI-I Upper)

1 1

R7 22
0402 5% DNI

DDC_5V
EMI filter, place close to DVI

14
U1C
10 GENERIC_SEZ1 GENERIC_SEZ1 GENERIC_SEZ1
8 DACB_HSYNC_BUF R13 33 DACB_HSYNC_R L503 27nH 18 DACB_HSYNC_C
OUT
9 SO14_I335X150 0402 5% COMMON IND_SMD_0402
COMMON
C1053
COMMON DDC_5V
2.2PF
2 2

7
50V

2
0.25PF
D515 C0G
0402
GND 3 SOT23 COMMON
R5 22 70V
215MA
0402 5% DNI GND
DNI

1
DDC_5V

14
U1D GND
13 GENERIC_SEZ1 GENERIC_SEZ1 GENERIC_SEZ1
11 DACB_VSYNC_BUF R6 33 DACB_VSYNC_R L502 27nH 18 DACB_VSYNC_C
OUT
12 SO14_I335X150 0402 5% COMMON IND_SMD_0402
COMMON
C1047
COMMON DDC_5V
2.2PF

7
50V

2
0.25PF
D514 C0G
0402
GND 3 SOT23 COMMON
70V
215MA
DNI GND

1
GND

3 3

DAC_RGB
L2 27nH 18 DACB_RED_C
OUT
IND_SMD_0402
COMMON

R26 C29 C24


150 5.6PF 5.6PF
1% 50V 50V
0402 0.5PF 0.5PF
COMMON C0G C0G
0402 0402
DNI COMMON

GND GND GND

DAC_RGB
L1 27nH 18 DACB_GREEN_C
OUT
IND_SMD_0402
COMMON

R25 C28 C25


G1I 150 5.6PF 5.6PF
1% 50V 50V
BGA_1981_P080_P100_425X425
COMMON
0402 0.5PF 0.5PF
COMMON C0G C0G
9/27 DACB 0402 0402

4
DAC_VDD 15 BC20 DACB_VDD I2CB_SCL AW6 DNI COMMON
4
IN
I2CB_SDA AW5
DACB_VREF BC18 GND GND GND
DACB_VREF
DACB_RSET BF18 BE18 DACB_HSYNC
DACB_RSET DACB_HSYNC GENERIC_SEZ1
BD18 DACB_VSYNC
DACB_VSYNC GENERIC_SEZ1

C858 C856 C872 R704


0.1UF 0.1UF 0.1UF 124 DACB_RED
DACB_RED BE17 DAC_RGB
16V 16V 16V 1%
10% 10% 10% 0402
BD17 DACB_GREEN
X7R X7R X7R COMMON DACB_GREEN DAC_RGB
0402 0402 0402 DAC_RGB
COMMON COMMON COMMON
DACB_BLUE BF17 DACB_BLUE
DAC_RGB
L3 27nH 18 DACB_BLUE_C
OUT
IND_SMD_0402
COMMON

R718 R715 R717 R30 C35 C26


150 150 150 150 5.6PF 5.6PF
1% 1% 1% 1% 50V 50V
0402 0402 0402 0402 0.5PF 0.5PF
GND COMMON COMMON COMMON COMMON C0G C0G
0402 0402
DNI COMMON

GND GND GND GND GND GND

5 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 16 of 1 ASSEMBLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Display:DACB (South DVI-I Upper)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

IFP A/B Interface (South DVI-I Lower)

1 1

DDC_5V

C1050
G1J 4700PF
25V

R700 1K
BGA_1981_P080_P100_425X425
COMMON
NET_NAME DIFF_PAIR NV_NETCLASS 10%
X7R
0402 1% COMMON 10/27 IFPAB 0402 1 SHIELD1
IFPA_TXC BF20 IFPAB_TXC DVI_HDMI_SIGNALS
COMMON 3 SHIELD3
2 SHIELD5 2
IFPA_TXC BG20 IFPAB_TXC DVI_HDMI_SIGNALS 5
0.3MM GND 7 SHIELD7
GND IFPAB_RSET BG19 IFPAB_RSET
PEX_VDD BJ17 IFPAB_TXD0* A17 TX0-
IFPA_TXD0 IFPAB_TXD0 DVI_HDMI_SIGNALS
1/2 LOWER J3B
IFPA_TXD0 BH17 IFPAB_TXD0 IFPAB_TXD0 DVI_HDMI_SIGNALS A18 TX0+
IFPAB_TXD1* A9 TX1-
17 9 1 MULTI_CON_DVIIDVII_060_DVII_030
Secondary bead option:180ohm(0.2ohm) 1.05V
IFPAB_TXD1 A10 TX1+
IFPAB_PLLVDD IFPAB_TXD2* TX2- COMMON
L501 120R@100MHz 0.4MM 0.13A BG17 IFPAB_PLLVDD IFPA_TXD1 BG18 IFPAB_TXD1 DVI_HDMI_SIGNALS A1
IND_SMD_0603
COMMON BH18 IFPAB_TXD2 A2 TX2+
C924 C921 C875 IFPA_TXD1 IFPAB_TXD1 DVI_HDMI_SIGNALS
A3 SHLD24
4.7UF 1UF 0.1UF SHLD13
A11
6.3V 6.3V 16V SHLD05
IFPA_TXD2 BJ18 IFPAB_TXD2 DVI_HDMI_SIGNALS A19
10% 10% 10%
BJ19 IFPAB_TXD4* A12 TX3-
X5R X7R X7R IFPA_TXD2 IFPAB_TXD2 DVI_HDMI_SIGNALS
0805 0603 0402 IFPAB_TXD4 A13 TX3+
COMMON COMMON COMMON IFPAB_TXD5* A4 TX4-
BJ20 IFPAB_TXD5 A5 TX4+
IFPA_TXD3
IFPA_TXD3 BH20 IFPAB_TXD6* A20 TX5-
IFPAB_TXD6 A21 TX5+
I2CA_SCL_C 15 A6 DDCC
IN
GND IFPB_TXC BM20 I2CA_SDA_C 15 A7 DDCD
IN
BM21 A14 VDDC
IFPB_TXC
A15 GND
IFP_IOVDD BC21 A22 SHLDC
IFPA_IOVDD
BB21 BK17 IFPAB_TXC* A24 TXC-
IFPA_IOVDD IFPB_TXD4 IFPAB_TXD4 DVI_HDMI_SIGNALS
3.3V IFPB_TXD4 BL17 IFPAB_TXD4 DVI_HDMI_SIGNALS
IFPAB_TXC A23 TXC+
0.320A BB23 DACA_VSYNC_C 15 A8 VSYNC
IFPB_IOVDD IN
LB506 180R@100MHz IFPAB_IOVDD 0.4MM BB24 IFPB_IOVDD
GPIO0_HPD_DVIA_RL A16 HPD
24 16 8
IND_SMD_0603 COMMON IFPB_TXD5 BM17 IFPAB_TXD5 DVI_HDMI_SIGNALS
C869 C871 C838 C847 BM18 DACA_RED_C 15 C1 R
4.7UF 1UF 0.1UF 0.1UF IFPB_TXD5 IFPAB_TXD5 DVI_HDMI_SIGNALS IN
DACA_GREEN_C 15 C2 G
3 6.3V 6.3V 16V 16V IN
B 3
DACA_BLUE_C 15 C3
20% 10% 10% 10% IN C3 C1
IFPB_TXD6 BL18 IFPAB_TXD6 DVI_HDMI_SIGNALS C5 AGND1
X5R X5R X7R X7R
0603 0402 0402 0402 IFPB_TXD6 BK18 IFPAB_TXD6 DVI_HDMI_SIGNALS
C5 C5A
COMMON COMMON COMMON COMMON C6 AGND2
DACA_HSYNC_C 15 C4 HSYNC
IN C4 C2
IFPB_TXD7 BK20
IFPB_TXD7 BL20 9 SHIELD9
10 SHIELD10
GND 11 SHIELD11
DVI Hotplug Detection 12 SHIELD12
13 SHIELD13
14 SHIELD14
HPD GPIO0 BA1 GPIO0_HPD_DVIA R815 10K GPIO0_HPD_DVIA_R LB512 180R@100MHz
3V3_F 0402 5% COMMON IND_SMD_0603
COMMON

C1043
220PF
GND
R803 C1037 50V
100K 0.1UF

2
5%
D507 C0G
5% 16V
0402
0402 10%
COMMON 3 SOT23
X7R
COMMON
70V
0402
215MA
COMMON
COMMON
GND

1
GND
GND
4 4

5 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 17 of 1 ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFP A/B Interface (South DVI Lower)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

IFP E/F Interface (South DVI-I Upper)

1
G Q526

SOT23
COMMON
2 S D 3 GENERIC_SEZ2
R799 33 I2CY_SDA_R 300-0484-000
GENERIC_SEZ2
0402 5% COMMON
3V3_F
DDC_5V DDC_5V
R810
10K R819
5% place close to fet 2.2K
3V3_F
1 0402 1

2
C1035 5%
COMMON D508 D506 0402
0.1UF
DDC_5V COMMON
16V
215MA 3 3 215MA
10%
70V 70V
X7R SOT23 SOT23
0402 COMMON COMMON
R811 COMMON R818

1
10K 2.2K

1
5% G Q527 5%
G1K 0402 GND 0402
COMMON COMMON
BGA_1981_P080_P100_425X425 SOT23
COMMON GND GND
COMMON S D
2 3 GENERIC_SEZ2
R802 33 I2CY_SCL_R 300-0484-000
13/27 IFPEF GENERIC_SEZ2
0402 5% COMMON
DVI-DL DVI-SL/HDMI DP

3V3_F I2CY_SDA I2CY_SDA IFPE_AUX BL5 I2CY_SDA


GENERIC_SEZ2
I2CY_SCL I2CY_SCL IFPE_AUX BM5 I2CY_SCL
NET_NAME DIFF_PAIR NV_NETCLASS
Secondary bead option:180ohm(0.2ohm) GENERIC_SEZ2
LB508 NET_NAME DIFF_PAIR NV_NETCLASS

300R@100MHz BM6 IFPEF_TXC* C44 0.1UF


IFPE_L3 IFPEF_TXC DP_SIGNALS IFPEF_TXC_C DP_SIGNALS
TXC TXC IFPEF_TXC C45 0.1UF
COMMON
IFPEF_RSET BC14 IFPEF_RSET IFPE_L3 BL6 IFPEF_TXC DP_SIGNALS COMMON
IFPEF_TXC_C DP_SIGNALS
TXC TXC
IND_SMD_0603 COMMON
BM8 IFPEF_TXD0* C42 0.1UF
OUT IFPE_L2 IFPEF_TXD0 DP_SIGNALS IFPEF_TXD0_C DP_SIGNALS
TXD0 TXD0
3.3V IFPE TXD0 TXD0
IFPE_L2 BM9 IFPEF_TXD0 IFPEF_TXD0 DP_SIGNALS
C43 0.1UF COMMON
IFPEF_TXD0_C DP_SIGNALS
0.3A COMMON
19,20 IFPCDEF_PLLVDD BD12 BL9 IFPEF_TXD1* C31 0.1UF
0.4MM IFPEF_PLLVDD IFPE_L1 IFPEF_TXD1 DP_SIGNALS IFPEF_TXD1_C DP_SIGNALS
TXD1 TXD1 IFPEF_TXD1 C32 0.1UF
IFPE_L1 BK9 IFPEF_TXD1 DP_SIGNALS COMMON
IFPEF_TXD1_C DP_SIGNALS
C936 C935 C912 TXD1 TXD1
COMMON
4.7UF 1UF 0.1UF R705 IFPEF_TXD2* C33 0.1UF
2 IFPE_L0 BK11 IFPEF_TXD2 DP_SIGNALS IFPEF_TXD2_C DP_SIGNALS 2
6.3V 6.3V 16V 1K TXD2 TXD2 IFPEF_TXD2 C34 0.1UF
IFPE_L0 BL11 IFPEF_TXD2 DP_SIGNALS COMMON
IFPEF_TXD2_C DP_SIGNALS DDC_5V
10% 10% 10% 1% TXD2 TXD2 COMMON
X5R X7R X7R 0402
0805 0603 0402 COMMON
COMMON COMMON COMMON
C1046
4700PF
25V
HPD_E HPD_E GPIO15 BD7
10%
GND X7R
0402
PEX_VDD COMMON 2 SHIELD2
4 SHIELD4
BB15 IFPE_IOVDD GND 6 SHIELD6
LB502 BB17 IFPE_IOVDD
220R@100MHz IFPEF_TXD0_C* B17 TX0-
2/2 UPPER J3A
COMMON BB18 IFPF_IOVDD IFPEF_TXD0_C B18 TX0+
BB20 BJ10 IFPEF_TXD1_C* B9 TX1-
IND_SMD_0603 1.05V IFPF_IOVDD I2CZ_SDA IFPF_AUX 17 9 1
IFPEF_TXD1_C TX1+ MULTI_CON_DVIIDVII_060_DVII_030
0.1A I2CZ_SCL IFPF_AUX BJ9 B10
IFPEF_IOVDD IFPEF_TXD2_C* TX2- COMMON
0.4MM B1
IFPEF_TXD2_C B2 TX2+
IFPF_L3 BH11 B3 SHLD24
C754 C771 C879 C882 TXC
BJ11 B11 SHLD13
4.7UF 1UF 0.1UF 0.1UF TXC IFPF_L3
B19 SHLD05
6.3V 6.3V 16V 16V IFPEF_TXD3* C36 0.1UF IFPEF_TXD3_C* TX3-
TXD3 TXD0 IFPF_L2 BE12 IFPEF_TXD3 DP_SIGNALS IFPEF_TXD3_C DP_SIGNALS B12
20% 10% 10% 10% C37 0.1UF
BF12 IFPEF_TXD3 DP_SIGNALS COMMON DP_SIGNALS IFPEF_TXD3_C B13 TX3+
X5R X5R X7R X7R TXD3 TXD0 IFPF_L2 IFPEF_TXD3 IFPEF_TXD3_C
0603 0402 0402 0402 COMMON IFPEF_TXD4_C* B4 TX4-
COMMON COMMON COMMON COMMON BG14 IFPEF_TXD4* C38 0.1UF IFPEF_TXD4_C B5 TX4+
TXD4 TXD1 IFPF_L1 IFPEF_TXD4 DP_SIGNALS IFPEF_TXD4_C DP_SIGNALS
IFPF TXD4 TXD1 IFPF_L1 BF14 IFPEF_TXD4
IFPEF_TXD4 DP_SIGNALS
C39 0.1UF COMMON
IFPEF_TXD4_C DP_SIGNALS IFPEF_TXD5_C* B20 TX5-
COMMON IFPEF_TXD5_C B21 TX5+
BE15 IFPEF_TXD5* C40 0.1UF I2CY_SCL_R_Q B6 DDCC
TXD5 TXD2 IFPF_L0 IFPEF_TXD5 DP_SIGNALS IFPEF_TXD5_C DP_SIGNALS
BF15 IFPEF_TXD5 C41 0.1UF COMMON I2CY_SDA_R_Q B7 DDCD
3 TXD5 TXD2 IFPF_L0 IFPEF_TXD5 DP_SIGNALS IFPEF_TXD5_C DP_SIGNALS 3
GND COMMON B14 VDDC
B15 GND
B22 SHLDC
DVI Hotplug Detection IFPEF_TXC_C*
IFPEF_TXC_C
B24
B23
TXC-
TXC+
GPIO21 BB5 DACB_VSYNC_C 16 B8 VSYNC
HPD_F IN
GPIO15_HPDE R797 10K GPIO15_HPDE_R LB509 180R@100MHz GPIO15_HPDE_R_L B16 HPD
24 16 8
0402 5% COMMON IND_SMD_0603
COMMON
3V3_F DACB_RED_C 16 D1 R
R798 C1036 IN
DACB_GREEN_C 16 D2 G
100K 220PF IN
B
DACB_BLUE_C 16 D3
5% 50V IN D3 D1
D5 AGND1
0402 C1034 5%
COMMON C0G
0.1UF AGND2 D5 D6
0402 D6
16V HSYNC
COMMON DACB_HSYNC_C 16 D4

2
10% IN D4 D2
D505 X7R
GND 0402 8 SHIELD8
3 SOT23 COMMON GND
70V
215MA
COMMON

DVI PULL DOWNS

1
R15 499
0402 1% COMMON

GND R16 499


0402 1% COMMON
R18 499 GND
0402 1% COMMON
R17 499
4 4
0402 1% COMMON
R19 499
0402 1% COMMON
R20 499
0402 1% COMMON
R12 499
0402 1% COMMON
R11 499
0402 1% COMMON
R10 499
0402 1% COMMON
3V3_F R9 499
0402 1% COMMON
R22 499
0402 1% COMMON
R8 R21 499
1K
0V 0402 1% COMMON
5% R24 499
0402 0.4MM
COMMON IFPEF_TERM_FET 0402 1% COMMON

1G1D1S 3 R23 499


D Q1 0402 1% COMMON

SOT23
IFPEF_TERM_EN 1G COMMON
S 2
60V
0.26A@25C
3R
0.31A
0.3W@25C
+/-20V

C27 0.01UF
5 5
0402 16V
10%
X7R
COMMON
Title
V257 GND
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 18 of 1
PAGE DETAIL IFP E/F Interface(South DVI-I Upper)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

IFPD,(North DP)

1 1

12V_F_R
12V_F_R

R800
10K
5% R801
0402 10K
COMMON
5%
0402
IFPD_MODE_Q COMMON
3 1B1C1E
Q529 C
AVDD
close to Fet gate
1B IFPD_MODE* 3 1G1D1S
C50 SOT23
Q528 D
0.01UF COMMON
2 E
R816 16V SOT23 G1 DP_MODE_R R814 4.7K
100K 10% COMMON
X7R 2 S 0402 5% COMMON

1
Q5 G G Q4 5%
0402
0402 60V AVDD
0.26A@25C
COMMON 3R
COMMON
SOT23 SOT23 0.31A
COMMON COMMON 0.3W@25C

2
+/-20V
2 S D 3 3 D S 2 GND D512
IFPD_AUX* IFPD_AUX DP_SIGNALS IFPD_AUX_Q_* R32 33 IFPD_AUX_R* GND
0402 5% COMMON AVDD 215MA 3
70V
close to diode SOT23
GND COMMON
R817

1
100K

2
C1054
1.DP AUX to DP connector: AUX AC coupled D509 0.1UF
5% C1044 0.1UF
0402 16V
2 2.DP AUX to DP-DVI dongle: AUX pass through COMMON 0402 16V 3 215MA
2
10%
10% 70V
SOT23 X7R GND
X7R
COMMON 0402
COMMON
COMMON

1
GND

1
Q3 G G Q2 GND

SOT23 SOT23
COMMON COMMON
IFPD_AUX 2 S D 3 3 D S 2
IFPD_AUX DP_SIGNALS IFPD_AUX_Q R14 33 IFPD_AUX_R
0402 5% COMMON
R824
AVDD
100K
AVDD
5%
0402

2
R823 J1
COMMON D513
C1048 0.1UF 100K
0402 16V
5%
3 C1061
0402 215MA RECEPTACLE
10% 70V 4700PF
G1L COMMON SOT23 CON_DP_020_SMT_RA_F
X7R SHIELD6 21 25V
GND COMMON COMMON COMMON
10%
BGA_1981_P080_P100_425X425 SHIELD5 23
X7R

1
COMMON SHIELD4 25 0402
12/27 IFPD DNI

IFPD_RSET BC15 PWR 20


IFPD_RSET GND 20
GND
PWR_RET 19
DVI/HDMI DP GND 19
GPIO19_HPDD_R_L HPD
18 18
17
IFPCDEF_PLLVDD 18,20 BG13 BM11 IFPD_AUX* IFPD_AUX_C* AUXN
17 GND 16
IN IFPD_PLLVDD I2CX_SDA IFPD_AUX IFPD_AUX_C DP_SIGNALS 16
BM12 IFPD_AUX IFPD_AUX_C AUXP
15
3 I2CX_SCL IFPD_AUX IFPD_AUX_C DP_SIGNALS 15 3
CEC 14 DP_CEC
C911 R721 14
MODE 13 DP_MODE
0.1UF 1K IFPD_L3* C20 0.1UF IFPD_L3_C* LANE_3N 13

TXC IFPD_L3 BL12 IFPD_L3 DP_SIGNALS IFPD_L3_C DP_SIGNALS 12 12


16V 1% IFPD_L3 C21 0.1UF IFPD_L3_C LANE_3P GND
0402 TXC IFPD_L3 BK12 IFPD_L3 DP_SIGNALS COMMON
IFPD_L3_C DP_SIGNALS 10 11
11
10% R2 R3
COMMON COMMON
X7R 10 5.1M 1M
BK14 IFPD_L2* C14 0.1UF IFPD_L2_C* LANE_2N
9
0402 IFPD_L2 IFPD_L2 DP_SIGNALS IFPD_L2_C DP_SIGNALS
TXD0 IFPD_L2 C15 0.1UF IFPD_L2_C LANE_2P 9
GND 5% 5%
COMMON
TXD0 IFPD_L2 BL14 IFPD_L2 DP_SIGNALS COMMON
IFPD_L2_C DP_SIGNALS 7 8
8 0402 0402
COMMON COMMON COMMON
7
BM14 IFPD_L1* C16 0.1UF IFPD_L1_C* LANE_1N
6
TXD1 IFPD_L1 IFPD_L1 DP_SIGNALS IFPD_L1_C DP_SIGNALS 6
BM15 IFPD_L1 C17 0.1UF COMMON IFPD_L1_C LANE_1P
4 GND 5
TXD1 IFPD_L1 IFPD_L1 DP_SIGNALS IFPD_L1_C DP_SIGNALS 5
COMMON
4
BL15 IFPD_L0* C18 0.1UF IFPD_L0_C* LANE_0N
3
GND IFPD_L0 IFPD_L0 DP_SIGNALS IFPD_L0_C DP_SIGNALS
TXD2 IFPD_L0 C19 0.1UF IFPD_L0_C LANE_0P 3
GND
TXD2 IFPD_L0 BK15 IFPD_L0 DP_SIGNALS COMMON
IFPD_L0_C DP_SIGNALS 1 2
2 GND GND
COMMON
1

GPIO19_HPD SHIELD3 22
IN
IFPCD_IOVDD 20 BE20 IFPD_IOVDD HPD GPIO19 BC4 DP Hotplug Detection SHIELD2 24
C857 SHIELD1 26
0.1UF 180R@100MHz
16V 10K R831 GPIO19_HPDC_R LB513
10%
X7R AVDD COMMON 5% 0402 COMMON IND_SMD_0603
0402 GND
COMMON C1060
R830 220PF
100K

2
C1059 50V
D518
5% 0.1UF 5%
GND 0402 C0G
16V
COMMON 3 SOT23 0402
10%
70V COMMON
X7R
215MA
0402
4 COMMON 4
COMMON

1
GND GND
GND

5 5

Title
V257

Size Document Number Rev


Custom5 <RevCode> NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Date: Monday, December 06, 2010 Sheet 19 of 1
ASSEMBLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPD (North DP)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

IFPC Interface (Mid HDMI)

1
G Q531
1 SOT23
1
COMMON
2 S D 3
R827 33 I2CW_SDA_R 300-0484-000
GENERIC_SEZ2 GENERIC_SEZ2 GENERIC_SEZ2
0402 5% COMMON
3V3_F

R828
DDC_5V DDC_5V
10K R840
5% C1045 2K
3V3_F 0402 0.1UF

2
5%
COMMON D517 D516 0402
16V
DDC_5V COMMON
10%
X7R 215MA 3 3 215MA
70V 70V
0402
SOT23 SOT23
COMMON
COMMON COMMON
R825 R841

1
10K 2K

1
5% G Q530 5%
0402 GND 0402
COMMON COMMON
SOT23
COMMON GND GND
2 S D 3
R826 33 I2CW_SCL_R 300-0484-000
GENERIC_SEZ2 GENERIC_SEZ2 GENERIC_SEZ2
0402 5% COMMON

2 2

DDC_5V

C1 4700PF
GND
0402 25V
10%
J2
X7R RECEPTACLE
G1M COMMON
CON_HDMI_019_SMD_RA_F

BGA_1981_P080_P100_425X425
COMMON COMMON

11/27 IFPC 20 SHIELD1


21 SHIELD2
IFPC_RSET BG16 IFPC_RSET
19 HP_DET
DVI/HDMI DP 19
18 +5V
18
17 DDC/CEC_GND
17
IFPCDEF_PLLVDD 18,19 BD15 BG12 I2CW_SDA I2CW_SDA_R_Q 16 SDA
IN IFPC_PLLVDD I2CW_SDA IFPC_AUX 16
BH12 I2CW_SCL I2CW_SCL_R_Q 15 SCL
I2CW_SCL IFPC_AUX 15
NET_NAME 14 RESERVED
14
C887 R706 13 CEC
NET_NAME DIFF_PAIR NV_NETCLASS DIFF_PAIR NV_NETCLASS

MIDDLE
0.1UF 1K IFPC_TXC* C10 0.1UF IFPC_TXC_C1* CK- 13

TXC IFPC_L3 BJ12 IFPC_TXC DP_SIGNALS IFPC_TXC_C DP_SIGNALS 12 12


16V 1% IFPC_TXC C11 0.1UF IFPC_TXC_C1 CK_SHIELD
0402 TXC IFPC_L3 BJ13 IFPC_TXC DP_SIGNALS COMMON
IFPC_TXC_C DP_SIGNALS 11 11
10% CK+
X7R COMMON
COMMON 10 10
BJ14 IFPC_TXD0* C4 0.1UF IFPC_TXD0_C1* 9 D0-
0402 IFPC_L2 IFPC_TXD0 DP_SIGNALS IFPC_TXD0_C DP_SIGNALS
TXD0 IFPC_TXD0 C5 0.1UF IFPC_TXD0_C1 D0_SHIELD 9

3
COMMON
TXD0 IFPC_L2 BH14 IFPC_TXD0 DP_SIGNALS COMMON
IFPC_TXD0_C DP_SIGNALS 8 8 3
COMMON 7 D0+
7
BG15 IFPC_TXD1* C6 0.1UF IFPC_TXD1_C1* 6 D1-
TXD1 IFPC_L1 IFPC_TXD1 DP_SIGNALS IFPC_TXD1_C DP_SIGNALS 6
PEX_VDD BH15 IFPC_TXD1 COMMON C7 0.1UF IFPC_TXD1_C1 5 D1_SHIELD
TXD1 IFPC_L1 IFPC_TXD1 DP_SIGNALS IFPC_TXD1_C DP_SIGNALS 5
COMMON 4 D1+
4
BJ15 IFPC_TXD2* C8 0.1UF IFPC_TXD2_C1* 3 D2-
GND IFPC_L0 IFPC_TXD2 DP_SIGNALS IFPC_TXD2_C DP_SIGNALS
TXD2 IFPC_TXD2 C9 0.1UF IFPC_TXD2_C1 D2 _SHIELD 3

TXD2 IFPC_L0 BJ16 IFPC_TXD2 DP_SIGNALS COMMON


IFPC_TXD2_C DP_SIGNALS 2 2
OUT D2+
COMMON 1 1
1.05V
22 SHIELD3
0.15A
LB507 220R@100MHz GPIO1_HPDC SHIELD4
IND_SMD_0603
COMMON
IFPCD_IOVDD 19 0.4MM BD20 IFPC_IOVDD HPD GPIO1 BA2 HDMI Hotplug Detection 23
C876 C870 C853
4.7UF 1UF 0.1UF 180R@100MHz
6.3V 6.3V 16V 10K R1 GPIO1_HPDC_R LB1 IFPC_HPD
20% 10% 10%
X5R X5R X7R 3V3_F COMMON 5% 0402 COMMON IND_SMD_0603 GND
0603 0402 0402
COMMON COMMON COMMON
R4 C3
100K 220PF

2
C22
D1
5% 0.1UF 50V
0402 16V 5%
COMMON 3 SOT23
C0G
10%
70V
X7R 0402
215MA
0402 COMMON
COMMON
GND COMMON

1
GND GND
GND
4 4

0V
0.4MM
IFPC_TERM_FET R832 499
R833 499 0402 1% COMMON
3V3_F 0402 1% COMMON R834 499
R835 499 0402 1% COMMON
0402 1% COMMON R836 499
R829 R837 499 0402 1% COMMON
1K R838 499
0402 1% COMMON
5% R839 499
0402 1G1D1S 3 0402 1% COMMON
D Q532 0402 1% COMMON
COMMON

SOT23
IFPC_TERM_EN 1G COMMON
S 2 60V
0.26A@25C
3R
0.31A
0.3W@25C
+/-20V

C1058 0.01UF
0402 16V
10%
X7R
COMMON
GND

5 5

Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 20 of 1
PAGE DETAIL IFPC Interface (Mid HDMI)
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MISC: GPIO, I2C, ROM, and XTAL

MEC1
ROM_CS*_2 A SW-DIP2
ROM_CS* B SW-DIP-P1S-RH
3V3_F ROM_CS*_1 C
3V3_F
1 G1N 1

MEC2
R796
BGA_1981_P080_P100_425X425 3V3_F
COMMON 10K U512
5%
18/27 MISC2 OUT 0402 SO08_I190X150
U513
COMMON SO8
OUT
COMMON
OUT SO08_I190X150
7 HOLD VCC 8 SO8
R858 0R 3 COMMON
WP C1033
ROM_CS AV6 ROM_CS* ROM_CS*_1 1 CS 7 HOLD VCC 8
0.1UF C1062
3 WP
16V 0.1UF
ROM_SI AU6 24 ROM_SI GENERIC_SEZ2 5 SI ROM_CS*_2 1 CS
10% 16V
ROM_SO AT7 24 ROM_SO GENERIC_SEZ2 2 SO X7R 10%
STRAP0_GPU 24 AW10 STRAP0 ROM_SCLK AV5 24 ROM_SCLK GENERIC_SEZ2 6 SCK GND 4 0402 5 SI X7R
OUT
STRAP1_GPU 24 AW9 STRAP1 COMMON 2 SO 0402
OUT
STRAP2_GPU 24 BA9 STRAP2 6 SCK GND 4 COMMON
OUT
I2CH_SCL BA3
I2CH_SDA AW3 GND
GND

SPDIF AW7

BUFRST BB10 25 GPU_BUFRST*


OUT

R684 40.2K STRAP_REF0_GPU AT8 MULTISTRAP_REF0_GND CEC AY6


0402 1% COMMON
R713 40.2K STRAP_REF1_GPU AV10 MULTISTRAP_REF1_GND
0402 1% COMMON
2 2

GND 3V3_F 3V3_F

3V3_F 3V3_F
R51 R49
47K 47K
5% 5%
0402 0402
G1O COMMON COMMON

BGA_1981_P080_P100_425X425
R39 R37
COMMON
I2CS 4.7K
5%
4.7K
5%
16/27 MISC1 0402 0402
AV7 I2CS_SCL R52 33 3 I2CS_SCL_R 25,26,29,31,35 I2CC_SCL_R
I2CS_SCL GENERIC_SEZ2
IN
COMMON COMMON
I2CS_SDA AW8 I2CS_SDA
GENERIC_SEZ2 0402 5% DNI R50 333 I2CS_SDA_R GENERIC_SEZ2
BI
0402 5% DNI R38 33
OUT
0402 5% COMMON
I2CC
I2CC_SCL
I2CC_SCL AV8 GENERIC_SEZ2
AV9 I2CC_SDA
I2CC_SDA GENERIC_SEZ2
THERM_DN_GPU 25 AW1 THERMDN GENERIC_SEZ2
OUT
R40 33
BI
THERM_DP_GPU 25 AW2 THERMDP 0402 5% COMMON
OUT
25,26,29,31,35 I2CC_SDA_R

GPIO2 BA4 31 GPIO2_NVVDD_VID2


OUT
3 GPIO3 BB1 22 GPIO3_RASTER_SYNC0
BI 3
GPIO4 BB2 25 GPIO4_FAN_TACH
IN
GPIO5 BB3 31 GPIO5_NVVDD_VID3
OUT
GPIO6 BD1 31 GPIO6_NVVDD_VID4 OUT
GPIO7 BD2 31 GPIO7_NVVDD_VID5 OUT
GPIO8 BD3 25 GPIO8_THERM_OVERT*
INFOROM
JTAG
OUT
GPIO9 BA5 25 GPIO9_GPU_SLOW*
IN
BA6
GPIO10 5,6,8,9,11,12 GPIO10_FB_VREF_CTL
OUT
GPIO11 BB8 22 GPIO11_RASTER_SYNC1
BI
JTAG_TCK BD24
TP2 JTAG_TCK GPIO12 BA8 R793
JTAG_TMS BE23
TP5 JTAG_TMS GPIO13 BB4 10K
JTAG_TDI BC24
TP3 JTAG_TDI GPIO14 BD5 5%
JTAG_TDO BD26 3V3_F
TP1 JTAG_TDO 0402
JTAG_TRST BD23 JTAG_TRST GPIO16 BB7 25 GPIO16_FAN_PWM COMMON
TP4 OUT
GPIO17 BA7 31 GPIO17_NVVDD_VID1
OUT R730
GPIO18 BB9
1K
3V3_F
1%
GPIO20 BC6 0402 GND
COMMON
GPIO22 BD4 22 GPIO22_SWAPRDY
BI
GPIO23 BD6 29 GPIO23_FBVDDQ_CTL
R747 R737 R744 OUT
GPIO24 BB6 25 GPIO24_PWM_EN
180 10K 10K OUT
5% 5% 5% R723
0402 0402 0402 10K
COMMON COMMON COMMON
5%
0402
DNI

G1P

GND BGA_1981_P080_P100_425X425
4 COMMON 4
R750 R739
PEX_VDD 17/27 XTAL_PLL
270 10K
0.4MM 1.05V
5% 5% LB503 220R@100MHz GPU_PLLVDD
0402 0402 0.15A BC30 PLLVDD
COMMON COMMON IND_SMD_0603
COMMON BC32 SP_PLLVDD
C756 C755 C807 C795 C805 C810
10UF 22UF 1UF 0.1UF 0.1UF 0.1UF
BB32 VID_PLLVDD
6.3V 6.3V 6.3V 16V 16V 16V
BB33 VID_PLLVDD
20% 20% 10% 10% 10% 10%
X5R X5R X5R X7R X7R X7R
0805 0805 0402 0402 0402 0402
DNI COMMON COMMON COMMON COMMON COMMON

GND XTAL_SSIN_GPU AV4 XTALSSIN XTALOUTBUFF AV1 XTALOUT_BUFF_GPU

GND
AV2 XTALIN XTALOUT AV3

R725
10K
5%
0402
COMMON
XTALIN_GPU Y1 27MHZ XTALOUT_GPU
XTAL_SIGNALS XTAL_SMD_2_120X047
30PPM XTAL_SIGNALS
C55 COMMON C56 R724
XTAL_IN_OUT XTAL_IN_OUT
18PF 18PF 10K
50V 50V 5%
5% 5% 0402
C0G C0G COMMON
0402 0402
COMMON COMMON
5 5

Title
V257 GND GND GND GND

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 21 of 1 ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MISC: GPIO, I2C, ROM, and XTAL
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Multi-use IO(MIO) Interface

CN1A
1 1
G1R CON_FINGER_MIO_026_3WAY_DT
COMMON
BGA_1981_P080_P100_425X425
COMMON
SLI_A - EMI SHIELD
15/27 MIOB DR MIO 1/2
BB12 BG7 MIOB_D<0> A2 B3
MIOB_VDDQ DRB_D0 MIOBD0 MIO_SIGNALS DR<0> GND
BB13 BF8 MIOB_D<1> B4 B7
MIOB_VDDQ DRB_D1 MIOBD1 MIO_SIGNALS DR<1> GND
BC12 BG8 MIOB_D<2> A4 B11
MIOB_VDDQ DRB_D2 MIOBD2 MIO_SIGNALS DR<2> GND
BG9 MIOB_D<3> A5 A3
DRB_D3 MIOBD3 MIO_SIGNALS DR<3> GND
BH9 MIOB_D<4> B6 A7
DRB_D4 MIOBD4 MIO_SIGNALS DR<4> GND
BF9 MIOB_D<5> A6 A11
DRB_D5 MIOBD5 MIO_SIGNALS DR<5> GND
BG10 MIOB_D<6> A8
DRB_D6 MIOBD6 MIO_SIGNALS DR<6>
BJ8 MIOB_D<7> B9
DRB_D7 MIOBD7 MIO_SIGNALS DR<7>
3V3_F BD9 MIOB_D<8> B10
DRB_D8 MIOBD8 MIO_SIGNALS DR<8>
BD11 MIOB_D<9> A10
DRB_D9 MIOBD9 MIO_SIGNALS DR<9>
MIOB_CAL_PD_VDDQ BE11 MIOB_D<10> B12
DRB_D10 MIOBD10 MIO_SIGNALS DR<10>
R709 49.9 0.3MM BL8 BC11 MIOB_D<11> A12
MIOBCAL_PD_VDDQ DRB_D11 MIOBD11 MIO_SIGNALS DR<11>
0402 1% COMMON MIOB_CAL_PU_GND BJ6 A13
C964 C902 C892 DRB_D12 MIO_SIGNALS DR<12>
R710 49.9 0.3MM BK8 MIOBCAL_PU_GND DRB_D13 BF11 MIO_SIGNALS B5 DR<13>
4.7UF 1UF 0.1UF
0402 1% COMMON DRB_D14 BG11 MIO_SIGNALS A9 DR<14>
6.3V 6.3V 16V
20% 10% 10%
X5R X5R X7R MIO_SIGNALS B13 DR_CMD
R734 BL7 B8
0603 0402 0402 GND MIOB_VREF MIO_SIGNALS DR_CLK
COMMON COMMON COMMON
1K
1%
GPIO11_RASTER_SYNC1 21
0402
A1 RASTER_SYNC GND 1
BI
COMMON GPIO22_SWAPRDY 21 B1 SWAP_RDY GND 2
BI
GND 3
GND MIOB_VREF B2
MIO_SIGNALS EXT_REFCLK
GND 0.3MM BD8 MIOB_D<12>
2 1.65V MIOBD12 (CTL3) 2
C953 R729 BH8 MIOB_D<13>
0.1UF 1K MIOBD13(HSYNC)
BE7 MIOB_D<14>
16V 1%
MIOBD14(VSYNC)
BE9 MIOB_DE
10% 0402 MIOB_DE
X7R COMMON
0402
COMMON
BK6 MIOB_CLKOUT GND
MIOB_CLKOUT
MIOB_CLKOUT BK7
BJ5 MIOB_CLKIN
MIOB_CLKIN
GND

CN1B

G1Q CON_FINGER_MIO_026_3WAY_DT
COMMON
BGA_1981_P080_P100_425X425
COMMON
SLI_B - EMI SHIELD
14/27 MIOA DR MIO 2/2
AY11 BE6 MIOA_D<0> C2 D3
MIOA_VDDQ DRA_D0 MIOAD0 MIO_SIGNALS DR<0> GND
BA10 BE4 MIOA_D<1> D4 D7
MIOA_VDDQ DRA_D1 MIOAD1 MIO_SIGNALS DR<1> GND
BA11 BE3 MIOA_D<2> C4 D11
3 MIOA_VDDQ DRA_D2 MIOAD2 MIO_SIGNALS DR<2> GND 3
C962 C914 C909 BE5 MIOA_D<3> C5 C3
4.7UF 1UF 0.1UF DRA_D3 MIOAD3 MIO_SIGNALS DR<3> GND
BG4 MIOA_D<4> D6 C7
6.3V 6.3V 16V DRA_D4 MIOAD4 MIO_SIGNALS DR<4> GND
BF3 MIOA_D<5> C6 C11
20% 10% 10% DRA_D5 MIOAD5 MIO_SIGNALS DR<5> GND
BH1 MIOA_D<6> C8
X5R X5R X7R DRA_D6 MIOAD6 MIO_SIGNALS DR<6>
0603 0402 0402 BJ3 MIOA_D<7> D9
DRA_D7 MIOAD7 MIO_SIGNALS DR<7>
COMMON COMMON COMMON BH4 MIOA_D<8> D10
DRA_D8 MIOAD8 MIO_SIGNALS DR<8>
BG5 MIOA_D<9> C10
DRA_D9 MIOAD9 MIO_SIGNALS DR<9>
MIOA_CAL_PD_VDDQ BK4 MIOA_D<10> D12
DRA_D10 MIOAD10 MIO_SIGNALS DR<10>
R728 49.9 0.3MM BK3 BH6 MIOA_D<11> C12
MIOACAL_PD_VDDQ DRA_D11 MIOAD11 MIO_SIGNALS DR<11>
0402 1% COMMON MIOA_CAL_PU_GND BF6 C13
DRA_D12 MIO_SIGNALS DR<12>
R726 49.9 0.3MM BH2 BG6 D5
MIOACAL_PU_GND DRA_D13 MIO_SIGNALS DR<13>
GND 0402 1% COMMON DRA_D14 BH5 MIO_SIGNALS C9 DR<14>

MIO_SIGNALS D13 DR_CMD


R735 BJ2 D8
1K MIOA_VREF MIO_SIGNALS DR_CLK
GND
1%
0402
GPIO3_RASTER_SYNC0 21 C1 RASTER_SYNC GND 5
BI
COMMON GPIO22_SWAPRDY 21 D1 SWAP_RDY GND 6
BI
GND 4
MIOA_VREF D2
MIO_SIGNALS EXT_REFCLK
0.3MM BE1 MIOA_D<12>
C950
1.65V
R731 MIOAD12 (CTL3)
BF2 MIOA_D<13>
0.1UF 1K MIOAD13(HSYNC)
BE2 MIOA_D<14>
16V 1%
MIOAD14(VSYNC)
BG1 MIOA_DE
10% 0402 MIOA_DE
X7R COMMON
0402
COMMON GND
BG3 MIOA_CLKOUT
MIOA_CLKOUT
MIOA_CLKOUT BH3
BF5 MIOA_CLKIN
4 MIOA_CLKIN 4
GND

5 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 22 of 1 ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Multi-use IO(MIO) Interface
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GPU POWER CONNECTIONS

G1S G1T

BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425
COMMON COMMON

20/27 GND_2/2 19/27 GND_1/2 FBVDDQ FBVDDQ NVVDD NVVDD NVVDD NVVDD
T8 GND A46 GND GND AJ16
U15 GND GND W27 AA19 GND GND AJ19 G1U
1
U16 GND GND W30 AA20 GND GND AJ20 G1X G1Z 1
U19 GND GND W31 AA23 GND GND AJ23 BGA_1981_P080_P100_425X425
COMMON
U20 GND GND W43 AA26 GND GND AJ26 BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425
COMMON COMMON
U23 GND GND W45 AA27 GND GND AJ27 23/27 FBVDDQ
U26 GND GND W48 AA30 GND GND AJ30 FBVDDQ K23 21/27 NVVDD_1/2 22/27 NVVDD_2/2
U27 GND GND W5 AA31 GND GND AJ31 AA10 FBVDDQ FBVDDQ K24 AA13 VDD VDD AG24 N13 VDD VDD U13
U30 GND GND W51 AB10 GND GND AK13 AA11 FBVDDQ FBVDDQ K26 AA14 VDD VDD AG25 N14 VDD VDD U14
U31 GND GND W8 AB13 GND GND AK14 AA42 FBVDDQ FBVDDQ K27 AA17 VDD VDD AG28 N17 VDD VDD U17
V13 GND GND Y13 AB14 GND GND AK17 AA43 FBVDDQ FBVDDQ K29 AA18 VDD VDD AG29 N18 VDD VDD U18
V14 GND GND Y14 A7 GND GND AK18 AC10 FBVDDQ FBVDDQ K30 AA21 VDD VDD AG32 N21 VDD VDD U21
V17 GND GND Y17 AB17 GND GND AK21 AC11 FBVDDQ FBVDDQ K32 AA22 VDD VDD AG33 N22 VDD VDD U22
V18 GND GND Y18 AB18 GND GND AK22 AC42 FBVDDQ FBVDDQ K33 AA24 VDD VDD AH15 N24 VDD VDD U24
V21 GND GND Y21 AB2 GND GND AK24 AC43 FBVDDQ FBVDDQ K35 AA25 VDD VDD AH16 N25 VDD VDD U25
V22 GND GND Y22 AB21 GND GND AK25 AD10 FBVDDQ FBVDDQ K36 AA28 VDD VDD AH19 N28 VDD VDD U28
V24 GND GND Y24 AB22 GND GND AK28 AD43 FBVDDQ FBVDDQ K38 AA29 VDD VDD AH20 N29 VDD VDD U29
V25 GND GND Y25 AB24 GND GND AK29 AF10 FBVDDQ FBVDDQ L15 AA32 VDD VDD AH23 N32 VDD VDD U32
V28 GND GND Y28 AB25 GND GND AK32 AF43 FBVDDQ FBVDDQ L17 AA33 VDD VDD AH26 N33 VDD VDD U33
V29 GND GND Y29 AB28 GND GND AK33 AG11 FBVDDQ FBVDDQ L18 AB15 VDD VDD AH27 P15 VDD VDD V15
V32 GND GND Y32 AB29 GND GND AL10 AG42 FBVDDQ FBVDDQ L20 AB16 VDD VDD AH30 P16 VDD VDD V16
V33 GND GND Y33 AB32 GND GND AL15 AG43 FBVDDQ FBVDDQ L21 AB19 VDD VDD AH31 P19 VDD VDD V19
W10 GND AA15 GND GND AL16 AJ10 FBVDDQ FBVDDQ L23 AB20 VDD VDD AJ13 P20 VDD VDD V20
W15 GND AB33 GND GND AL19 AJ11 FBVDDQ FBVDDQ L24 AB23 VDD VDD AJ14 P23 VDD VDD V23
W16 GND AB43 GND GND AL2 AJ42 FBVDDQ FBVDDQ L26 AB26 VDD VDD AJ17 P26 VDD VDD V26
W19 GND AB45 GND GND AL20 AJ43 FBVDDQ FBVDDQ L30 AB27 VDD VDD AJ18 P27 VDD VDD V27
W2 GND AB48 GND GND AL23 AK11 FBVDDQ FBVDDQ L32 AB30 VDD VDD AJ21 P30 VDD VDD V30
W20 GND AB5 GND GND AL26 AK42 FBVDDQ FBVDDQ L33 AB31 VDD VDD AJ22 P31 VDD VDD V31
W23 GND AB51 GND GND AL27 AK43 FBVDDQ FBVDDQ L35 AC13 VDD VDD AJ24 R13 VDD VDD W13
W26 GND GND H19 AB8 GND GND AL30 AM10 FBVDDQ FBVDDQ R10 AC14 VDD VDD AJ25 R14 VDD VDD W14
BC5 GND GND H22 AC15 GND GND AL31 AM11 FBVDDQ FBVDDQ R42 AC17 VDD VDD AJ28 R17 VDD VDD W17
2
BC51 GND GND H25 AC16 GND GND AL43 AM42 FBVDDQ FBVDDQ R43 AC18 VDD VDD AJ29 R18 VDD VDD W18 2
BC8 GND GND H28 AC19 GND GND AL45 AM43 FBVDDQ FBVDDQ R44 AC21 VDD VDD AJ32 R21 VDD VDD W21
BE10 GND GND H31 AA16 GND GND AL48 AN11 FBVDDQ FBVDDQ R9 AC22 VDD VDD AJ33 R22 VDD VDD W22
BE13 GND GND H34 AC20 GND GND AL5 AN42 FBVDDQ FBVDDQ U10 AC24 VDD VDD AK15 R24 VDD VDD W24
BE16 GND GND H37 AC23 GND GND AL51 AN43 FBVDDQ FBVDDQ U42 AC25 VDD VDD AK16 R25 VDD VDD W25
BE19 GND GND H40 AC26 GND GND AL8 AR11 FBVDDQ FBVDDQ U43 AC28 VDD VDD AK19 R28 VDD VDD W28
BE22 GND GND H43 AC27 GND GND AM13 AR42 FBVDDQ FBVDDQ U44 AC29 VDD VDD AK20 R29 VDD VDD W29
BE34 GND GND K13 AC30 GND GND AM14 AR43 FBVDDQ FBVDDQ U9 AC32 VDD VDD AK23 R32 VDD VDD W32
BE37 GND GND K16 AC31 GND GND AM17 AT43 FBVDDQ FBVDDQ V10 AC33 VDD VDD AK26 R33 VDD VDD W33
BE40 GND GND K19 AD13 GND GND AM18 AT44 FBVDDQ FBVDDQ V11 AD15 VDD VDD AK27 T15 VDD VDD Y15
BE43 GND GND K2 AD14 GND GND AM21 AV43 FBVDDQ FBVDDQ V42 AD16 VDD VDD AK30 T16 VDD VDD Y16
BF1 GND GND K22 AD17 GND GND AM22 BB38 FBVDDQ FBVDDQ V43 AD19 VDD VDD AK31 T19 VDD VDD Y19
BF26 GND GND K25 AD18 GND GND AM24 BC38 FBVDDQ FBVDDQ Y10 AD20 VDD VDD AL13 T20 VDD VDD Y20
BF29 GND GND K28 AD21 GND GND AM25 BD38 FBVDDQ FBVDDQ Y11 AD23 VDD VDD AL14 T23 VDD VDD Y23
BF32 GND GND K31 AD22 GND GND AM28 J15 FBVDDQ FBVDDQ Y42 AD26 VDD VDD AL17 T26 VDD VDD Y26
BF4 GND GND K34 AD24 GND GND AM29 J17 FBVDDQ FBVDDQ Y43 AD27 VDD VDD AL18 T27 VDD VDD Y27
BF48 GND GND K37 AD25 GND GND AM32 J36 FBVDDQ AD30 VDD VDD AL21 T30 VDD VDD Y30
BF52 GND GND K40 AD28 GND GND AM33 J38 FBVDDQ AD31 VDD VDD AL22 T31 VDD VDD Y31
BF7 GND GND K45 AD29 GND GND AN15 K15 FBVDDQ AE13 VDD VDD AL24
BG22 GND GND K48 AD32 GND GND AN16 K17 FBVDDQ AE14 VDD VDD AL25
BG25 GND GND K5 AD33 GND GND AN19 K18 FBVDDQ AE17 VDD VDD AL28
BG31 GND GND K51 AE10 GND GND AN20 K20 FBVDDQ AE18 VDD VDD AL29
BG34 GND GND K8 AE15 GND GND AN23 K21 FBVDDQ AE21 VDD VDD AL32
BH10 GND GND N10 AE16 GND GND AN26 AE22 VDD VDD AL33
BH13 GND GND N15 AE19 GND GND AN27 FB_VDDQ_SENSE AV44 29 FBVDDQ_SENSE_GPU
0.25MM 1.5V FBVDDQ AE24 VDD VDD AM15
OUT
BH16 GND GND N16 AE2 GND GND AN30 AE25 VDD VDD AM16
BH19 GND GND N19 AE20 GND GND AN31 AE28 VDD VDD AM19
BH22 GND GND N2 AE23 GND GND AP10 AE29 VDD VDD AM20
BH25 N20 AE26 AP2 AN10 FB_CAL_PD_VDDQ 0.2MM R707 40.2 AE32 AM23
GND GND GND GND FB_CAL_PD_VDDQ VDD VDD
BH28 GND GND N23 AE27 GND GND AP43 0402 1% COMMON AE33 VDD VDD AM26
3
BH31 GND GND N26 AE30 GND GND AP45 AF15 VDD VDD AM27 3
BH34 N27 AE31 AP48 AK10 FB_CAL_PU_GND 0.2MM R711 40.2 AF16 AM30
GND GND GND GND FB_CAL_PU_GND VDD VDD
BH37 GND GND N30 AE43 GND GND AP5 0402 1% COMMON AF19 VDD VDD AM31
BH40 GND GND N31 AE45 GND GND AP51 AF20 VDD VDD AN13
BH43 N43 AE48 AP8 AR10 FB_CAL_TERM_GND 0.2MM R712 60.4 AF23 AN14
GND GND GND GND FB_CALTERM_GND VDD VDD
BH46 GND GND N45 AE5 GND GND AU10 0402 1% COMMON AF26 VDD VDD AN17
BJ1 GND GND N48 AE51 GND GND AU2 AF27 VDD VDD AN18
BJ4 GND GND N5 AE8 GND GND AU43 AF30 VDD VDD AN21
BJ51 GND GND N51 AF13 GND GND AU45 AF31 VDD VDD AN22
BJ7 GND GND N8 AF14 GND GND AU48 GND AG13 VDD VDD AN24
BK2 GND GND P13 AF17 GND GND AU5 AG14 VDD VDD AN25
BL10 GND GND P14 AF18 GND GND AU51 AG17 VDD VDD AN28
BL13 GND GND P17 AF21 GND GND AU8 AG18 VDD VDD AN29
BL16 GND GND P18 AF22 GND GND AY10 AG21 VDD VDD AN32
BL19 GND GND P21 AF24 GND GND AY2 AG22 VDD VDD AN33
BL22 GND GND P22 AF25 GND GND AY43
BL25 GND GND P24 AF28 GND GND AY45
BL28 GND GND P25 AF29 GND GND AY48
BL3 GND GND P28 AF32 GND GND AY5
BL31 GND GND P29 AF33 GND GND AY51
BL34 GND GND P32 AG15 GND GND AY8 NVVDD NVVDD NVVDD
BL37 GND GND P33 AG16 GND GND B10 G1V G1W G1Y
BL40 GND GND R15 AG19 GND GND B13
BL43 GND GND R16 AG20 GND GND B16
BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425 BGA_1981_P080_P100_425X425
BL49 GND GND R19 AG23 GND GND B19
COMMON COMMON COMMON
BM4 GND GND R20 AG26 GND GND B22
BM46 GND GND R23 AG27 GND GND B25 25/27 OPTION GROUP 1 26/27 OPTION GROUP 2 27/27 OPTION GROUP 3
BM7 GND GND R26 AG30 GND GND B28 SOUTHEAST CHANNEL NORTHEAST CHANNEL NORTHWEST CHANNEL
D2 GND GND R27 AG31 GND GND B31 AY42 GROUP_1 A49 GROUP_2 A4 GROUP_3
D51 GND GND R30 AH10 GND GND B34 BA42 GROUP_1 B50 GROUP_2 B3 GROUP_3
4
E10 GND GND R31 AH13 GND GND B37 BB40 GROUP_1 *ALL PINS IN THIS BLOCK C49 GROUP_2 *ALL PINS IN THIS BLOCK C2 GROUP_3 *ALL PINS IN THIS BLOCK 4
E13 GND GND T10 AH14 GND GND B4 BB41 GROUP_1 MUST BE CONNECTED C50 GROUP_2 MUST BE CONNECTED C3 GROUP_3 MUST BE CONNECTED
E16 GND GND T13 AH17 GND GND B40 BB43 GROUP_1 TO THE SAME POWER C51 GROUP_2 TO THE SAME POWER C4 GROUP_3 TO THE SAME POWER
E19 GND GND T14 AH18 GND GND B43 BC42 GROUP_1 OR GROUND NET. D48 GROUP_2 OR GROUND NET. D1 GROUP_3 OR GROUND NET.
E22 GND GND T17 AH2 GND GND B49 BC43 GROUP_1 D49 GROUP_2 D3 GROUP_3
E25 GND GND T18 AH21 GND GND BC10 BD44 GROUP_1 D50 GROUP_2 D4 GROUP_3
E28 GND GND T2 AH22 GND GND BC13 BD45 GROUP_1 D52 GROUP_2 D5 GROUP_3
E31 GND GND T21 AH24 GND GND BC17 BE44 GROUP_1 E47 GROUP_2 E4 GROUP_3
E34 GND GND T22 AH25 GND GND BC19 BE46 GROUP_1 E48 GROUP_2 E5 GROUP_3
E37 GND GND T24 AH28 GND GND BC2 BF45 GROUP_1 E49 GROUP_2 E6 GROUP_3
E40 GND GND T25 AH29 GND GND BC22 BF46 GROUP_1 F46 GROUP_2 F5 GROUP_3
E43 GND GND T28 AH32 GND GND BC25 BF47 GROUP_1 F47 GROUP_2 F6 GROUP_3
E46 GND GND T29 AH33 GND GND BC28 BG46 GROUP_1 F48 GROUP_2 F7 GROUP_3
E7 GND GND T32 AH43 GND GND BC31 BG47 GROUP_1 G45 GROUP_2 G6 GROUP_3
G1 GND GND T33 AH45 GND GND BC34 BG48 GROUP_1 G46 GROUP_2 G7 GROUP_3
G48 GND GND T43 AH48 GND GND BC37 BH47 GROUP_1 G47 GROUP_2 G8 GROUP_3
G5 GND GND T45 AH5 GND GND BC40 BH48 GROUP_1 H44 GROUP_2 H7 GROUP_3
G52 GND GND T48 AH51 GND GND BC45 BH49 GROUP_1 H46 GROUP_2 H9 GROUP_3
H10 GND GND T5 AH8 GND GND BC48 BJ48 GROUP_1 J44 GROUP_2 J8 GROUP_3
H13 GND GND T51 AJ15 GND GND BE14 BJ49 GROUP_1 J45 GROUP_2 J9 GROUP_3
H16 GND GND BC16 BJ50 GROUP_1 K42 GROUP_2 K10 GROUP_3
BJ52 GROUP_1 K43 GROUP_2 K11 GROUP_3
BK49 GROUP_1 L40 GROUP_2 L10 GROUP_3
BK50 GROUP_1 *PIN GROUP CONNECTED L41 GROUP_2 *PIN GROUP CONNECTED L12 GROUP_3 *PIN GROUP CONNECTED
BK51 GROUP_1 ON SUBSTRATE. L43 GROUP_2 ON SUBSTRATE. L13 GROUP_3 ON SUBSTRATE.
BL50 GROUP_1 *NOT CONNECTED ON DIE. M42 GROUP_2 *NOT CONNECTED ON DIE. M11 GROUP_3 *NOT CONNECTED ON DIE.
BM49 GROUP_1 N42 GROUP_2 N11 GROUP_3

GND GND GND GND

5 5

Title
V257
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 23 of 1
PAGE DETAIL GPU POWER CONNECTIONS
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

GPU Strapping Configuration

1 1

3V3_F

R746 R743 R749


4.99K 4.99K 4.99K
1% 1% 1%
0402 0402 0402
DNI DNI DNI

STRAP0_GPU 21
IN

0010 32Mx32 GDDR5 320-bit Hynix


STRAP1_GPU 21
IN
RAMCFG[0] 0011 32Mx32 GDDR5 320-bit Samsung
STRAP2_GPU 21
IN 0110 64Mx32 GDDR5 320-bit Hynix
RAMCFG[1]
R745 R742 R748 ROM_SI 0111 64Mx32 GDDR5 320-bit Samsung
2 4.99K 4.99K 34.8K 2
1% 1% 1% RAMCFG[2] 1010 32Mx32 GDDR5 256-bit Hynix
0402 0402 0402
COMMON COMMON COMMON 1011 32Mx32 GDDR5 256-bit Samsung
RAMCFG[3]
1110 64Mx32 GDDR5 256-bit Hynix

1111 64Mx32 GDDR5 256-bit Samsung

GND 1 0=Disabled(3D Only)


VGA_DEVICE 1=Enabled(VGA Display Device)

SMB_ALT_ADDR 0
ROM_SO
3V3_F
30k PD
FB[0]_BAR_SIZE 1 128MB

R806 R805 R808


4.99K 4.99K 4.99K XCLK_417 0
1% 1% 1%
0402 0402 0402 PEX_PLL_EN_TERM100 1 ENABLE 0 DISABLED
DNI DNI DNI

ROM_SI 21
IN SLOT_CLK_CFG 1 ENABLE
45K PD
3 ROM_SCLK 3
ROM_SO 21
IN SUB_VENDOR 1 Dedicated BIOS

ROM_SCLK 21
IN PCI_DEVID_EXT 0 0x108

R807 R804 R809


15.4K 30.1K 45.3K STRAP0 USER_BIT [3..0] 0000:=> 5K PD Default
1% 1% 1%
0402 0402 0402
COMMON COMMON COMMON STRAP1 3GIO_PADCFG_LUT_ADR 0000 :=>5K PD Desktop Default

STRAP2 PCI_DEVID [3:0] 0110 :=>35K PD For 0x1086

GND

GND 3V3
4 4

5k 0000 1000

G1AA 10k 0001 1001


BGA_1981_P080_P100_425X425
COMMON
15k 0010 1010
24/27 NC/Spare 20k 0011 1011
BG2 NC_1 25k 0100 1100
BH7 NC_2
BK5 NC_3 30k 0101 1101
BL4 NC_4
BC35 NC_6 35k 0110 1110
BC33 NC_5
BD14 NC_7 45k 0111 1111

5 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 24 of 1 ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL GPU Strapping Configuration
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

MISC: THERMAL/BACKDRIVE

1 Thermal Shutdown 3V3_F


1
C1013 0.1UF
0402 16V
10%
X7R
COMMON

Q521
2
E
1B1C1E 3V3_F IFP_IOVDD (backdrive prevention)
SOT23

1
1B THERM_P* R777 2K Q525 G
SOT23
0402 5% COMMON
COMMON
3 C COMMON
R791 2K GPIO8_THERM_OVERT_GATE* 3 D 2 GPIO8_THERM_OVERT*
S 21
IN
0402 5% COMMON
PS_NVVDD_EN 30,31 3 1B1C1E
OUT C
Q519 1B1C1E 3
1B THERM_N_R R780 10K THERM_P_Q C Q522 R792 0
SOT23 R784 10K THERM_N B1
0402 5% COMMON 0402 +0.05R DNI
COMMON
2 E C1005 0402 5% COMMON
SOT23
1000PF COMMON
R790 C1021 E 2
16V 33K 1000PF
3V3_F
10% 5% 16V PEX_RST_Q
X7R 0402 10%
GND 0402 COMMON X7R 1G1D1S 3
COMMON D Q520
0402
COMMON PEX_RST* 3 R789 0
IN
GND 0402 +0.05R COMMON 1G1D1S 3 R779 0 IFP_IOVDD_EN 1G SOT23 IFP_IOVDD
D COMMON
GND GND Q524 0402 COMMON S 2 -20V
-3.0A
+0.05R 0.070@-4.5V,0.115R@-2.5V
R788 1K SOT23
GPU_BUFRST* 21 GPU_BUFRST_R* 1G COMMON
-9A
N/A
IN +12/-12V
0402 5% DNI S 2
2 C1004 100PF 2
60V
R787 C1032 0.26A@25C
0402 50V
3R
100K 100PF 0.31A
5%
0.3W@25C
5% 50V +/-20V C0G
0402 5% DNI
DNI
R781 10K
C0G
0402 0402 5% COMMON
DNI

GND GND

GND

3V3_F 3V3_F
R45
FAN Connector
0
+0.05R
0402
DNI
C57 C58
3 0.1UF 0.1UF 3
16V 16V
3V3_F 3V3_F 12V_F_R
10% 10%
U5 GPIO16_FAN_PWM 21 R42 0
X7R X7R IN
0402 0402 3V3_F 0402 +0.05R COMMON
DNI DNI GPIO4_FAN_TACH 21 R43 0 D501 R523
XSOP16_PI025_049X040
0

3
OUT
DNI 0402 +0.05R COMMON
R44 R541 R524 30V +0.05R
C60 10K 10K 10K 200MA 0805
GND 14 VCCP VCC 3 GND COMMON
1000PF 5% 5% 5% SOT323

2
16V 0402 0402 0402 COMMON
COMMON COMMON COMMON
Place next to the thermal sensor 10%
I2CC_SCL_R 21,26,29,31,35 1 15 FAN_PWM
X7R IN SCL PWM1/XTO
0402 1 J4
DNI I2CC_SDA_R 21,26,29,31,35 16 6 FAN_TACH 2
BI SDA TACH1 MALE
3 2.0MM
4 VERTICAL
THERM_DP_GPU 21 13 5 THERM_SHDN_R* C513 C504 C502 C501 CON_WAFER232_004_TH_ST_P020
0.3MM D1+ PWM2/ALERT*
IN 1000PF 1000PF 0.1UF 1UF COMMON
3V3_F
50V 50V 16V 16V
THERM_DN_GPU 21 0.3MM 12 D1- GPIO/THERM* 9 21 GPIO9_GPU_SLOW*
IN OUT 10% 10% 10% 10%
X7R X7R X7R X5R
0402 0402 0402 0603
11 7 R532 R536 R522 R529 DNI DNI COMMON COMMON
D2+ TACH2 1K 130K 150K 1K
5% 1% 1% 5%
10 D2- 0402 0402 0402 0402
8 FAN_EXT_PWM_EN GND
PWM3 COMMON COMMON COMMON COMMON
GND
2 GND TACH3 4

FAN_PWR_ON_PWM*

FAN_PWR_ON_PWM
4 I2C Address 0x5C 4
C507 1000PF C505 470PF
GND
0402 16V 0402 16V
R46 10% 10% 3
1G1D1S
0 X7R X7R D Q502
+0.05R COMMON COMMON
FAN_PWR_ON_PWM_R
0402 SOT23
DNI
R526 0 1G COMMON
3 1B1C1E 1B1C1E 3 0402 +0.05R COMMON S 2
Q501 C C Q505
3V3_F 60V

1B FAN_PWM_BASE* FAN_PWM_BASE B1 0.26A@25C


3R
SOT23 SOT23 0.31A
0.3W@25C
COMMON COMMON
R48 2 E E 2 +/-20V

10K FAN_EXT_PWM_EN_Q
5%
0402
COMMON 1G1D1S 3
D Q506
GND GND
R47 0 SOT23
GPIO24_PWM_EN 21 FAN_PWM_EN_R 1G COMMON
IN
0402 +0.05R COMMON S 2
60V
0.26A@25C
3R
0.31A
0.3W@25C
+/-20V

GND

5 5

Title
V257

Size Document Number Rev


Custom5 <RevCode> NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Date: Monday, December 06, 2010 Sheet 25 of 1
ASSEMBLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MISC: Thermal / BACKDRIVE
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Power Supply: PEX PS INPUT,DECTECTION LOGIC


PEX_3V3 INPUT - 10W
3V3 3V3_F

0.33UH 3.3V
3A
1 1
L6

C993 COMMON C62 C61


0.1UF IND_NONRKO_SMD_076X076 10UF 0.1UF
16V 6.3V 16V
10% 20% 10%
X7R X5R X7R
0402 0805 0402
COMMON COMMON COMMON

GND PEX_12V INPUT - 66W


GND

12V_F_R
12V 12V 12V 12V_F
U508
5.5A L17 0.25UH 5.5A
RS1 0.005 OHM 0.4MM 0.4MM
SOT23_8
3V3_F 7520 COMMON 1% COMMON
COMMON CHK_S2_8_5X8_65
C88 R57 0
12V_INP_R 0.01UF C83 C550 C93
4 VS 0805 +0.05R DNI
C543 12V_INP R592 10 16V R58 0 0.1UF 10UF 10UF
0.1UF 10% 25V 16V 16V
VINP 1 0402 5% COMMON
X7R
0805 +0.05R DNI
16V C544 C546 R594 10% 20% 20%
0402 R59 0
10% 0.1UF 0.1UF 0 X7R X5R X5R
X7R 5 SCL COMMON 0805 +0.05R DNI 0603 1206 1206
16V 16V +0.05R R60 0
0402 COMMON COMMON COMMON
10% 10% 0402
2
COMMON 6 SDA X7R X7R COMMON 0805 +0.05R DNI
2
VINN 2 0402 0402
GND R585 0 12V_F_A1 8 A1 COMMON R595 10 COMMON
I2CC_SCL_R 21,25,29,31,35 0402 +0.05R COMMON 7 12V_INN 0402 5% COMMON
IN A0

I2CC_SDA_R 21,25,29,31,35 3 GND GND GND GND GND


BI

GND

I2C Address:(0x90)

3V3_F J5

MALE
4.2MM

C521
U502 90
CON_PWR_002X003_TH_RA_M_PI165
PEX6 INPUT 1 - 2x3 PCIE CON 75W
0.1UF SOT23_8 COMMON
16V R556 COMMON PCI_Express Power 12V_PEX6_1IN_R 12V_PEX6_1IN
10% 0
X7R 12V 12V
+0.05R
0402
0402
4 VS TRUE 6.25A L18 0.25UH 6.25A
COMMON
COMMON
12V_PEX6_1_INP R578 10 12V_PEX6_1_INP_R 0.4MM 12V 6.25A 12V_PEX6_1_IN RS3 0.005 OHM 0.4MM 0.4MM
VINP 1 0402 5% COMMON 7520 COMMON 1% COMMON
C526 C525 1 12V CHK_S2_8_5X8_65
GND
0.1UF 0.1UF R577
3
5 SCL 2 12V R65 0
3
16V 16V 0 C503 C96 C95 C97
3 12V 0805 +0.05R DNI
10% 10% +0.05R 0.01UF R71 0 0.1UF 10UF 10UF
6 SDA X7R X7R 0402
PRSNT* 16V 25V 16V 16V
VINN 2 0402 0402 COMMON 5 30 INPUT_PEX6_DT1 0805 +0.05R DNI
OUT 10% 10% 20% 20%
R576 0 12V_PEX6_1_A1 8 COMMON R572 10 COMMON R74 0
A1 X7R X7R X5R X5R

GND6

GND4
0402 +0.05R COMMON 12V_PEX6_1_A0 7 12V_PEX6_1_INN 0402 5% COMMON 0402 0805 +0.05R DNI 0603 1206 1206
A0
COMMON R77 0 COMMON COMMON COMMON
3 GND 0805 +0.05R DNI
R63 0
0805 +0.05R DNI

GND
GND GND GND GND GND
I2C Address:(0x92)

3V3_F

J6

C533
U503 MALE
4.2MM
90
PEX6 INPUT 2 - 2x3 PCIE CON 75W
0.1UF SOT23_8 CON_PWR_002X003_TH_RA_M_PI165
16V COMMON COMMON
12V_PEX6_2IN_R 12V_PEX6_2IN
10% PCI_Express Power
X7R 12V 12V
0402 4 VS TRUE 6.25A L19 0.25UH 6.25A
4 12V_PEX6_2_INP R580 10 12V_PEX6_2_INP__R 12V_PEX6_2_IN RS2 0.005 OHM 4
COMMON 0.4MM 12V 6.25A 0.4MM 0.4MM
VINP 1 0402 5% COMMON 7520 COMMON 1% COMMON
C532 C524 CHK_S2_8_5X8_65
GND
0.1UF 0.1UF
5 SCL 1 12V R61 0
16V 16V R575 2 12V C110 0805 +0.05R DNI
C108 C98 C94
10% 10% 0 0.01UF 0.1UF 10UF 10UF
6 SDA X7R X7R 3 12V R62 0
+0.05R 16V 25V 16V 16V
VINN 2 0402 0402
0402
0805 +0.05R DNI
10% 10% 20% 20%
R574 0 12V_PEX6_2_A1 8 COMMON R581 10 COMMON PRSNT*
5 30 INPUT_PEX6_DT2 R64 0
A1 COMMON
OUT X7R X7R X5R X5R
0402 +0.05R COMMON R582 0 12V_PEX6_2_A0 7 12V_PEX6_2_INN 0402 5% COMMON 0402 0805 +0.05R DNI 0603 1206 0805
A0
GND6

GND4
0402 +0.05R COMMON COMMON R70 0 COMMON COMMON COMMON
3 GND 0805 +0.05R DNI
R72 0
0805 +0.05R DNI

GND
GND GND GND GND
I2C Address:(0x94) GND

5 5

Title
V257

Size Document Number Rev


Custom5 <RevCode> NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Date: Monday, December 06, 2010 Sheet 26 of 1
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Power Supply:PEX PS INPUT,DETECTION LOGIC
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Power Supply: DDC5V,PEX_VDD,5V_PWM,AVDD

1 1

5V Linear
DDC_5V
U4 AVDD
DDC_5V
12V_F_R
VR=5V U2
IGO,IGOI
MULTI_STD_SOT223_DPAK 3V3 SO08_I190X150 3.3V

R41 0 5V_INPUT_R FR1 1.8 PS2_RC_5V 1


COMMON

3
5V @ 0.2A 5V
2
COMMON
8
1.0A

IN OUT IN OUT 0.4MM


0603 +0.05R COMMON 1206 5% COMMON 3 IN OUT 7 C23
D3 C54 6 C12 C2 C30

GND/ADJ
1UF OUT 0.1UF 10UF 10UF 470uF
C47 C49 C51 C1038 C1039 C1040 C53

TAB
30V 16V 0.1UF 10UF 10UF 10UF 10UF 10UF 10UF R34 10K 3V3_F_EN 16V 6.3V 6.3V COMMON
4 EN 20%
200MA 10% 16V 6.3V 6.3V 16V 16V 16V 16V 10% 20% 20%
0402 5% COMMON 6.3V
SOT23 X5R 10% 20% 20% 20% 20% 20% 20% X7R X5R X5R
0603 X7R X5R X5R X5R X5R X5R X5R 5 OC* GND 1 0402 0805 0805 OCCAP

2
4
DNI
4.7A@105C
1 COMMON 0402 0805 0805 1206 1206 1206 1206 COMMON DNI DNI
0.008R
3 COMMON COMMON DNI COMMON COMMON COMMON COMMON
CAP_TH_D063P025
2 GND GND
GND GND GND
GND GND GND
2 GND 2
GND

GND

PS78M05G-T43R 315-0598-000
UA78M05CDCYR 315-0535-000

3 3

PEX VDD
FBVDDQ

12V_F_R 5V_PWM

place close to Vin pin R596 1K


C687 C682
PEX_VDD 0402 5% COMMON
10UF 4.7UF U511 R593 1K C551
1000PF R599
6.3V
20%
6.3V
20% SO08_I190X150_TI118X102
COMMON
1.05V @ 1.7A 0402 5%
R597
COMMON
1K 16V 1K
X5R X5R 10% 5%
0805 0603 5V_PWM 3 VIN VOUT 6 1.05V 0.5MM 1.7A 0402 5% COMMON
X7R 0402
DNI COMMON R598 1K U509 0402 COMMON

2
4 0402 5% COMMON COMMON C547
VCNTL C688 C678 C722 C692 4.7UF
ADJ_VR2.5 1
1000PF R666 0.1UF 10UF 10UF SOT23 PS_5V_PWM_FB 6.3V
4
2 EN 4
C677 16V 3.57K 16V 6.3V 6.3V SOT23 R600 20%
FB 7 Rt COMMON X5R

3
1UF 10% 1% 10% 20% 20% 1K
1 POK X7R 0402 X7R X5R X5R 0603
6.3V 5%
10% GND 9 0402 COMMON 0402 0805 0805 0402
COMMON

X5R 5 NC GND 8 COMMON COMMON COMMON DNI


COMMON
GND 0402 PS_1V05_FB
COMMON
PS_1V05_FB
GND GND GND GND
R663
11.5K
Rb 1%
GND 0402 GND
COMMON

RT9025-1KGSP
APL5920KAI-TRG
PEX_VDD = 1.05V @ 1.7A
Vout = Vref * (1+Rtop/Rbot) GND
1.05 = 0.8 * (1+3.57k/11.5k)

5 5
Title
V257

Size Document Number Rev


Custom5 <RevCode>
NVIDIA CORPORATION
Date: Monday, December 06, 2010 Sheet 27 of 1 2701 SAN TOMAS EXPRESSWAY

ASSEMBLY SANTA CLARA, CA 95050, USA


PAGE DETAIL Power Supply: DDC5V, PEX_VDD, 5V_PWM,AVDD
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
Title
V257

Size Document Number Rev


A 5 <RevCode>

Date: Monday, December 06, 2010 Sheet 28 of 1


A B C D E F G H

1 1

Power Supply: FBVDDQ

12V_F

Input ripple Irms ~10A@30A

C91
Stuff for C82 C80 C545 C548 C552
APW7120 0.1UF 1UF 10UF 10UF 10UF 270uF
RT8105 16V 16V 16V 16V 16V COMMON
10% 10% 20% 20% 20% 20%
NCP1579
X7R X5R X5R X5R X5R 16V
12V_F_R L6783A OCCAP
0603 0603 1206 1206 1206
L6726A COMMON COMMON DNI COMMON COMMON 5.5A@105C
L6727 0.010R
LFPAK D 5 CAP_TH_D080P035
D504
2 1 Q9 GND
DIODE_SMD_SOD323
DNI 0.5MM
R616 R605 0 PS3_FBVDDQ_UG_R 4G MULTI_SMD_SOT669_LFPAK_B
2.2 S
COMMON
0402 +0.05R COMMON 1 30V
Rvcc 5%
2 30A OPTIONAL, CO-LAY
0.0151R@4.5V, 0.0106R@10V
0402 120A
COMMON 3 25W@25C

0.5MM
+/-20V
GND
2 12V_PS3_R
2
U510 FBVDDQ
C560
1UF VR=0.6V
L8
FBVDDQ = 1.5V @ 30A
SO08_I190X150_TI90X90
16V
10%
COMMON 0.5MM CH-R30u60A0.6m-RH
5 VCC 1 PS3_FBVDDQ_BOOT C553 0.1UF 1 2 1.5V 30A
X5R BOOT
0603 0402 16V
COMMON 10%
X7R C81
0.5MM COMMON
GND PS3_FBVDDQ_UG 2200PF C66 C64
HDRV 2
C79 50V
0.5MM 820uF 820uF
PHASE 1000PF 10%
8 PS3_FBVDDQ_PHASE
X7R
50V COMMON COMMON
0603 20% 20%
10%
LFPAK D 5 LFPAK D 5 X7R
COMMON 2.5V 2.5V
PS_FBVDDQ_EN 7 COMP/EN Q8 Q10 0402 0.4MM OCCAP OCCAP
PS3_FBVDDQ_LG DNI PS3_FBVDDQ_RC 5.0A@105C 5.0A@105C
R56 0.007R 0.007R
3 GND LDRV 4 0.5MM R615 0 PS3_FBVDDQ_LG_R 4G MULTI_SMD_SOT669_LFPAK_B 4G MULTI_SMD_SOT669_LFPAK_B
COMMON COMMON 1 CAP_TH_D063P025 CAP_TH_D063P025
9 GND PS3_FBVDDQ_FB
FB 6 0402 +0.05R COMMON
C559
S 1 30V
45A
S 1 30V
45A 5%
12V_F_R 0.5MM 2 0.0048R@4.5V, 0.0035R@10V 2 0.0048R@4.5V, 0.0035R@10V
1206
R614 1000PF 180A 180A
3 45W@25C 3 45W@25C COMMON
GND 51K 50V +/-20V +/-20V R611
C558 0.1UF 5% 10% 100
0402 X7R
R587 C556 15PF 5%
10K
0402 16V
10%
DNI 0402
COMMON
0402 CO-LAYOUT CO-LAYOUT
0402 50V COMMON
5% C554 C555 5% X7R
0402 6.8PF 0.01UF C0G DNI
3 RT8120AGS GND
FBVDDQ Power Sequence COMMON
C 50V 16V DNI RT8101
GND GND APW8720KE FBVDDQ
Q511
0.5PF 10% L6783A
3 PS_FBVDDQ_EN* B1
C0G X7R
NCP1579 GND
C SOT23 FP6329 Rocset L6726A
Q512 COMMON 1B1C1E 0402 0402
L6727
PS_NVVDD_PGOOD 31 B1 E 2 COMMON COMMON OPEN: 375mv FP6329 GND 0.3MM
3 IN SOT23 PS_FBVDDQ_CP R607 0 OPEN: 300mv R608 40.2 PS3_FBVDDQ_FB_RC C557 6800PF 3
COMMON 1B1C1E
E 2 0402 +0.05R 0402 1% COMMON 0402 50V
DNI 10% C655
C549 X7R C585 C629 C564 C630 C602 C628

PS3_FBVDDQ_FB
1UF COMMON 330UF 10UF 10UF 10UF 10UF 10UF 10UF
6.3V R606 R612 COMMON 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 18.2K 5.49K 20% 20% 20% 20% 20% 20% 20%
X5R Rb2 Rt 0.3MM 2.5V X5R X5R X5R X5R X5R X5R
1% 1% R609 1.87K PS3_FBVDDQ_VSEN
0402 POSCAP 0805 0805 0805 0805 0805 0805
0402 0402
DNI 3.0A COMMON COMMON COMMON DNI DNI DNI
COMMON COMMON 0402 1% COMMON
0.009R
GND GND 3V3_F CAP_SMD_7343
6262
GND
RT8120AGS R617 R613
APW8720KE 10K 1.5K
5% Rb1 1%
GND
NCP1579
1G1D1S 3 PS_FBVDDQ_SEL R610 0 23 FBVDDQ_SENSE_GPU GND
0402 D 0402 IN
L6726A Q513
DDC_5V COMMON COMMON 0402 +0.05R COMMON

R618 3K SOT23
GPIO23_FBVDDQ_CTL 21 GPIO23_FBVDD_SEL_G 1G COMMON
IN
0402 5% COMMON S 2
C563
60V
1000PF 0.26A@25C
3R
16V 0.31A
R7317 10%
0.3W@25C
+/-20V
10K/0402 X7R
0402
COMMON
R7319

10K/0402 (Not) GND


U12
4 4
2

R7328 UP6262M8_SOT23-8-RH R7330


6262_SCL 5 8 6262_OUT1 PS3_FBVDDQ_FB
VCC BUS_SEL

21,25,26,31,35 I2CC_SCL_R SCL OUT1


6
0R OUT3 4 6262_SDA 0R
R7331 SDA
6262_OUT2 7 3
OUT2 GND GND
GPIO23 FBVDDQ Voltage FBVDDQ Calculation
0R
1

R7329
FBVDDQ = 0.8V*(1+1.37K/2K)=1.348V 1%
PS_1V05_FB I2CC_SDA_R 21,25,26,31,35 FBVDDQ = 0.6V*(1+1.87K/1.5K)=1.348V 1.5%
0 1.35V (Low perfmode) FBVDDQ = 0.5V*(1+1.87K/1.1K)=1.35V 1%

DDC_5V
0R
GND
R7318

FBVDDQ = 0.8V*(1+1.37K/(2K//5.36K))=1.55V 1%
1 1.5V (3D) FBVDDQ = 0.6V*(1+1.87K/(1.5K//5.49K))=1.55V 1.5%
2.2R/0402 FBVDDQ = 0.5V*(1+1.87K/(1.1K//4.64K))=1.55V 1%
C1295
.1UF Vref
16V RT8120A 300KHz 0.6V 1.5%
10% APW8720KE300KHz 0.5V 1%
X5R
0402
COMMON APW7120K 300KHz 0.8V

RT8101 300KHz 0.8V


RT8105 300KHz 0.8V
NCP1579 275KHz 0.8V
5 GND 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 29 of 1 ASSEMBLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Power Supply: FBVDDQ
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

12V_F_R

Power Supply: NVVDD Controller


12V_F_R
NVVDD POWER SEQUENCE R535
10K
1%
3V3_F 60V
0402
R545 0.26A@25C
3RCOMMON
10K 0.31A
0.3W@25C
1% +/-20V
0402
3 25,31 PS_NVVDD_EN
R548 D OUT
COMMON 1G1D1S Q504
10K
1%
3 12V_F_EN 1G SOT23 R539 C511
0402 COMMON 1.27K 0.1UF
C Q507 S 2
COMMON
1% 16V
3V3_F_EN_R B1
SOT23 R546 0402 10%
COMMON 1B1C1E COMMON X7R
R549 C515 10K
1
E 2 0402
1
3.24K 0.1UF 1%
DNI
16V 0402
1%
DNI
0402 10%
COMMON X7R
0402
COMMON

3V3_F 12V_PEX_EN1 GND GND


60V 12V_PEX6_1IN_R GND GND
0.26A@25C
3R
R584 0.31A
0.3W@25C
10K +/-20V R557
3
5% D Q510 10K
0402 1G1D1S
1%
INPUT_PEX6_DT1 26 COMMON INPUT_PEX6_DT1_R 0402
3
R586 4.7K 1G SOT23 C Q508
COMMON COMMON
IN
0402 5% COMMON S 2 12V_PEX6_1IN_EN B1
SOT23
COMMON 1B1C1E
C534 E 2
0.1UF R558 C520
16V 1K 0.1UF
10% GND 16V
1%
X7R 0402 10%
0402 COMMON X7R
COMMON 0402 12V_PEX_EN2
COMMON

3V3_F GND GND


60V 12V_PEX6_2IN_R
0.26A@25C
3R
R579 0.31A
0.3W@25C
10K +/-20V R565
3
5% D 10K
0402 1G1D1S Q509
1%
2 INPUT_PEX6_DT2 26 COMMON INPUT_PEX6_DT2_R 0402
3 2
R583 4.7K 1G SOT23 C Q503 STUFF IF ONLY
COMMON COMMON
IN R564 ONE 6-PIN POWER
0402 5% COMMON S 2 12V_PEX6_2IN_EN B1
SOT23 0 CONNECTOR IS USED
COMMON 1B1C1E
C527 E 2 +0.05R
0.1UF R566 C523 0402
DNI
16V 1K 0.1UF
10% GND 16V
1%
X7R 0402 10%
0402 COMMON X7R
COMMON 0402
COMMON

GND

VID Table GND GND

GPIO7 GPIO6 GPIO5 GPIO2 GPIO17 VRM11.0


VID_5 VID_4 VID_3 VID_2 VID_1 VID Setting

0 0 0 0 1 1.20000V

0 0 0 1 0 1.18750V

0 0 0 1 1 1.17500V

0 0 1 0 0 1.16250V

0 0 1 0 1 1.15000V
3 3
0 0 1 1 0 1.13750V

0 0 1 1 1 1.12500V

0 1 0 0 0 1.11250V

0 1 0 0 1 1.10000V

0 1 0 1 0 1.08750V

0 1 0 1 1 1.07500V

0 1 1 0 0 1.06250V

0 1 1 0 1 1.05000V

0 1 1 1 0 1.03750V

0 1 1 1 1 1.02500V

1 0 0 0 0 1.01250V

1 0 0 0 1 1.00000V

1 0 0 1 0 0.98750V

1 0 0 1 1 0.97500V

1 0 1 0 0 0.96250V
4 4
1 0 1 0 1 0.95000V

1 0 1 1 0 0.93750V

1 0 1 1 1 0.92500V

1 1 0 0 0 0.91250V

1 1 0 0 1 0.90000V

1 1 0 1 0 0.88750V

1 1 0 1 1 0.87500V

1 1 1 0 0 0.86250V

1 1 1 0 1 0.85000V

1 1 1 1 0 0.83750V

1 1 1 1 1 0.82500V

5 5

Title
V257
RLIM1=5.62K,RLIM2 = 28.7K to set SW FREQ=~300KHz, OCP=~400A
NVIDIA CORPORATION
Size Document Number Rev 2701 SAN TOMAS EXPRESSWAY
Custom5 <RevCode>
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
Date: Monday, December 06, 2010 Sheet 30 of 1
PAGE DETAIL Power Supply: NVVDD Controller
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
A B C D E F G H

Power Supply: NVVDD Regulator


3V3_F 3V3_F 3V3_F 3V3_F 3V3_F 3V3_F 3V3_F

VID Table BootVoltage 0.9V R869 R875 R871 R882 R879 R896 R893
10K 10K 10K 10K 10K 10K 10K
GPIO7 GPIO6 GPIO5 GPIO2 GPIO17 VOUT 5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
DNI COMMON DNI DNI COMMON COMMON COMMON
VID_5 VID_4 VID_3 VID_2 VID_1 PS_NVVDD_VID0
1 1
GPIO17_NVVDD_VID1 21
0 0 0 0 0 1.21250V IN

GPIO2_NVVDD_VID2
IN

0 0 0 0 1 1.20000V GPIO5_NVVDD_VID3
IN

GPIO6_NVVDD_VID4 21
0 0 0 1 0 1.18750V IN

GPIO7_NVVDD_VID5
IN

0 0 0 1 1 1.17500V PS_NVVDD_VID6
3V3_F
PS_NVVDD_VID7
0 0 1 0 0 1.16250V
R870 R876 R874 R883 R881 R897 R895 R902
10K 10K 10K 10K 10K 10K 10K 10K 25,30 PS_NVVDD_EN
0 0 1 0 1 1.11500V 5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5V_PWM
COMMON DNI COMMON COMMON DNI DNI DNI COMMON

OUT

C0.1u16X
0 0 1 1 0 1.13750V connect to UP6282 DRV

C701
R519
4.7K
GND GND GND GND GND GND GND GND 3V3_F COMMON 5V_PWM
D,
0 0 1 1 1 1.12500V R525 0402
5%

12V_F

PS_NVVDD_EN
0 1 0 0 0 1.11250V R911
10K
COMMON
2.2R1%/6 R928
0402 1K/4
2 0 1 0 0 1 1.10000V 5%
2
PS_NVVDD_PGOOD 29
D,
OUT
R1003 SMI ADDR

6218_5VC
0 1 0 1 0 1.08750V 10.5K/04
VTT_ENABLE R918 R894

SMI
X_2K/4 1K/4
0 1 0 1 1 1.07500V VTT=1.5K/12K=1.5V R878
U6004
B, 0R/4/1
VTT_ENABLE

52

50

51

48

49

32
0 1 1 0 0 1.06250V
B,

SMI#
ENVTT

PWRGD

ENPWR

5VCC

ADDR
R1005 PS_NVVDD_VID7 53 45
0 1 1 0 1 1.05000V 1.5K/04 C1492 VID7 SW1
PS_NVVDD_VID6 54 44
0.1u/16V/06 VID6 ODB1
0 1 1 1 0 1.03750V GPIO7_NVVDD_VID5 55 43 PWM_1
VID5 PWM1 PWM_1 32
GPIO6_NVVDD_VID4 56 42 PWM_2
0 1 1 1 1 1.02500V VID4 PWM2 PWM_2 32
GPIO5_NVVDD_VID3 57 41 PWM_3
VID3 PWM3 PWM_3 32
1 0 0 0 0 1.01250V GPIO2_NVVDD_VID2 58 40 PWM_4
5V_PWM VID2 PWM4 PWM_4 32
SET 1.2V for VR11 DAC GPIO17_NVVDD_VID1 59 39 PWM_5
1 0 0 0 1 1.00000V VID1 PWM5 PWM_5 33
R142
PS_NVVDD_VID0 60 38 PWM_6
VID0 PWM6 PWM_6 33
10K,1%,0402 R141
1 0 0 1 0 0.98750V 3.3K,1%,0402 VIDSEL 61 37
VIDSEL PWM7
36
3 1 0 0 1 1 0.97500V PWM8 3
IMON
A, 1 35
IMON GND
1 0 1 0 0 0.96250V NVVDD_SENSE_GPU 3R923 0/4 IMAX2 2 34
IN
C1079 X_C0.1u16X IMAX2 GND
C1091 R866
1 0 1 0 1 0.95000V R867 0/4 X_C1500p50 X_2KR1%0402 VOUT 64 10 ISP1
C1073 X_C0.1u16X TB VOUT ISP1 C1u16X-RH R929 3KR1%0402 PWM_SW_1 32
NVVDD_GND_SENSE_GPU 3 63 11 C1089
1 0 1 1 0 0.93750V IN
R915 100/4/1 TB ISN1 R1023 0/4 C1075 C0.1u16X
PWM_OUT1 32
NVVDD_SENSE_GPU 3 C1066 X_22nf/16V/4 3
IN FBRTN PWM_OUT2 32
R933 0/4 C1068 22nf/16V/4 12 R1024 0/4 C1084 C0.1u16X
1 0 1 1 1 0.92500V NVVDD R919 10K/4/1 R935X_2K/4 C1069 X_0.01u/16V/4 SS 4 ISN2
C1085 X_C0.1u16X SS 13 C1070 R907 3KR1%0402
ISP2 PWM_SW_2 32
ISP2 C1u16X-RH
1 1 0 0 0 0.91250V C1067 C33p25N0402-RH-3
R943 X_2K/4 14 ISP3
R899 C1083 ISP3 C1u16X-RH R892 3KR1%0402 PWM_SW_3 32
1 1 0 0 1 0.90000V 10KST/4 C6800p16X0402 COMP 7 15 C1074
COMP ISN3 R980 0/4 C1088 C0.1u16X
PWM_OUT3 32
C1078 R904 X_0/4FB 8
1 1 0 1 0 0.88750V FB PWM_OUT4 32
X_C470p50X0402 16 R994 0/4 C1077 C0.1u16X
R913 1K/4 ISN4
17 C1093 R921 3KR1%0402
1 1 0 1 1 0.87500V ISP4 PWM_SW_4 32
ISP4 C1u16X-RH

DACQ 5 18 ISP5
1 1 1 0 0 0.86250V DACQ ISP5 C1u16X-RH R901 3KR1%0402 PWM_SW_5 33
R880 EAP 6 19 C1071
0R,0402 EAP ISN5 R958 0/4 C1087 C0.1u16X
PWM_OUT5 33
4 1 1 1 0 1 0.85000V OFS 4
PWM_OUT6 33
5V_PWM 20 R960 0/4 C1090 C0.1u16X
R932 X_2K/4 OFS 9 ISN6
1 1 1 1 0 0.83750V 3V3_F R920 OFS 21 C1080 R908 3KR1%0402
ISP6 PWM_SW_6 33
X_2K/4 ISP6 C1u16X-RH
1 1 1 1 1 0.82500V R924
22 5V_PWM
ISP7 R939
PSI# 62
A, PSI# 23 ISN7
IMON ISN7
4.7K/4 R884 ISx7, ISx8 UNUSED
R872 0/46218_SDA 46 24 ISN8 2.2R1%/6
21,25,26,29,35 I2CC_SDA_R SDA ISN8

CSUMN

CSUMP

IMAX1

5VCC
R930 0/46218_SCL 47 25

GND
21,25,26,29,35 I2CC_SCL_R SCL ISP8 2.2R1%/6
R905 C1065

NC
RT
30K,1%,0402
10pF/16V/4

uP6218

28

29

30

31

33

27

26
R865 1R1%/6 ISP1 R938 X_3KR1%0402 PWM_OUT1
32 PWM_OUT1
R873 1R1%/6 X_10K/4 RT 5V_PWM
32 PWM_OUT2
R922 1R1%/6 R1118 R868 1K/4 ISP2 R934 X_3KR1%0402 PWM_OUT2
32 PWM_OUT3

6218_5VCC
R944 1R1%/6
32 PWM_OUT4
R917 1R1%/6 R926 0/4 ISP3 R906 X_3KR1%0402 PWM_OUT3
33 PWM_OUT5
IMAX2 R925 1R1%/6 R864
33 PWM_OUT6
C1081 0.1u/25V/4 2.2R1%/6 ISP4 R885 X_3KR1%0402 PWM_OUT4

CSN
C1082 C1u16X-RH CSP IMAX1
R945 C1086 C1076 X_C1u16X-RH ISP5 R931 X_3KR1%0402 PWM_OUT5
R927C1072 R937
X_0.01u/16V/4

30K,1%,0402 R909 5.6KR1%0402 C1092 ISP6 R877 X_3KR1%0402 PWM_OUT6


32 PWM_SW_1

2K/4

0.01u/16V/4

22K/4/1

C0.1u16X
R940 5.6KR1%0402 R912 0R1%0402
32 PWM_SW_2
R914 5.6KR1%0402
5 32 PWM_SW_3 5
R910 5.6KR1%0402
32 PWM_SW_4
R941 5.6KR1%0402
33 PWM_SW_5
Title R936 5.6KR1%0402
33 PWM_SW_6
V257

Size Document Number


Custom5
Rev
<RevCode>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
Date: Monday, December 06, 2010 Sheet 31 of 1
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL SANTA CLARA, CA 95050, USA

PAGE DETAIL Power Supply: NVVDD Regulator


NV_PN 600-11025-BASE-SCH
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1025-C00 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 12-JAN-2010

A B C D E F G H
A B C D E F G H

12V_PEX6_1IN
Input ripple Irms ~18A@100A
12V_PEX6_1IN
Input ripple Irms ~14.5A@80A
C155
Power Supply: NVVDD PHASE 1, 2, 3, 4 C118
10UF
C127
0.47UF
C125
1UF 270uF
C149
16V 16V 16V COMMON C104 C123 C111
20% 10% 10% 20% 10UF 1UF 0.47UF 270uF
X5R X7R X5R 16V
16V 16V 16V COMMON
0805 0603 0603 OCCAP
20% 10% 10% 20%
COMMON COMMON COMMON 5.5A@105C
X5R X5R X7R 16V
0.010R
0805 0603 0603 OCCAP
CAP_TH_D080P035
12V_PEX6_1IN GND COMMON COMMON COMMON 5.5A@105C
0.010R
1 GND GND GND CAP_TH_D080P035
GND GND GND GND
12V
6.25A
Input MLCC

R166 C179 C199


10UF
150W->3 phase 80A
PM1_BOOT1_RC PM1_PHASE1 16V
10%
170W->3 phase 105A
PM1_BOOT1 0R
0.1u /25V X5R
1206 225W->4 phase 125A
N-NTMFS4943NHT1G_SO8-RH COMMON

PM1_PHASE1

5
12V_PEX6_1IN 12V_PEX6_1IN

PM1_UG1
Z

R167 Q6111
X Y PM1_UG1 PM1_UG1_R 4
12V D27 12V
6.25A S-BAT54C_SOT23 6.25A 2.2/0603 NVVDD

1
2
3
R144 change to R47
SO8-FLAT LEAD L6006
10k/0402 CH-R30u60A0.6m-RH
U6003 PM1_PHASE1 N-NTMFS4937NHT1G_SO8-RH 1 2
17

16

15

14

13
UP6282AQDD_WQFN16-RH

5
R250 R1238 N-NTMFS4937NHT1G_SO8-RH R1051
BOOT1

UG1

PH1
PGND

GND

2
31 PWM_1 0R/0402 1 12 PM1_LG1 2.2R Q6122 2.2R/0805
PWM1 LG1

2
0603 PM1_LG1 4 Q6123 CP25
R1225 4 NS_VIA CP17 NVVDD

2.2R 2 11 PM2_VCC2 NS_VIA

1
OD#1 VCC2

1
2
3
0603 C1497 0.85V

1
1
2
3
2 2200p50
PM1_VCC1 3 10 PWM_SW_1NET_SHORT_SMT_0M20 100A
VCC1 OD#2 C171 NET_SHORT_SMT_0M20
R248 1uF/16V/0603 C584 C583 C1063 C143 C148 C146 C689
PM2_LG2 4 9 PWM_2 31 C1103 C1102 C1100 C1101
0R/0402
BOOT2

LG2 PWM2 330UF 330UF 330UF 820uF 820uF 820uF 22UF 330UF 22UF 22UF 22UF
C175 12V_PEX6_1IN
GND

UG2
PH2

DNI DNI DNI COMMON COMMON COMMON 6.3V DNI 6.3V 6.3V 6.3V
1uF/16V/0603 option for PH1 -35%-10% -35%-10% -35%-10% 20% 20% 20% 20% -35%-10% 20% 20% 20%
2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V
C201 R, close L6001 POSCAP POSCAP POSCAP OCCAP OCCAP OCCAP
X5R
0805 POSCAP
X5R
0805
X5R
0805
X5R
0805
5

10UF 3.0A 3.0A 3.0A 5.0A@105C 5.0A@105C 5.0A@105C COMMON 3.0A COMMON COMMON COMMON
16V 0.009R 0.009R 0.009R 0.007R 0.007R 0.007R 0.009R
10%
PWM_OUT1 CAP_SMD_7343 CAP_SMD_7343 CAP_SMD_7343 CAP_TH_D063P025 CAP_TH_D063P025 CAP_TH_D063P025 CAP_SMD_7343
Y X GND
X5R
D41 GND GND GND
PM2_PHASE2

1206 GND GND


S-BAT54C_SOT23 N-NTMFS4943NHT1G_SO8-RH COMMON
GND GND GND
GND GND

5
PM2_UG2

GND
PM2_BOOT2 R157 Q6211
option for uP6282 PIN5 GND PM2_UG2 PM2_UG2_R 4 1nd: 041-0147-000
R, close PIN5 R156 C192
2.2/0603 2nd: 042-0087-000

1
2
3
PM2_BOOT2_RC PM2_PHASE2 R139 NVVDD
L6009
10k/0402 CH-R30u60A0.6m-RH
0R/0805 0.1uF /25V PM2_PHASE2 N-NTMFS4937NHT1G_SO8-RH 1 2

5
N-NTMFS4937NHT1G_SO8-RH R1050

2
connect to PWM control Q6223 2.2R/0805 C156 C157
PM2_LG2 4 CP24 CP16 820uF 820uF

5
NS_VIA NS_VIA COMMON COMMON
31 PWM_1 Q6222 20% 20%

1
1
2
3
4 C1499 2.5V 2.5V
3 PWM_2 31 2200p50 OCCAP OCCAP
5.0A@105C 5.0A@105C
NET_SHORT_SMT_0M20
NET_SHORT_SMT_0M20 0.007R 0.007R

1
2
3
PWM_SW_2 CAP_TH_D063P025 CAP_TH_D063P025
31 PWM_3 GND
GND
PWM_4 31 12V_PEX6_1IN

C200
10UF
PWM_OUT2
16V
10%
X5R
1206
N-NTMFS4943NHT1G_SO8-RH COMMON
R168 C255

5
PM3_BOOT3_RC PM3_PHASE3 R162 Q6311
PM3_UG3 PM3_UG3_R 4
PM3_BOOT3 0R/0805
0.1uF /25V 2.2/0603

1
2
3
R137
PM3_PHASE3

L6010
PM3_UG3
Z

12V_PEX6_1IN 12V_PEX6_2IN 10k/0402 CH-R30u60A0.6m-RH


X Y PM3_PHASE3 N-NTMFS4937NHT1G_SO8-RH 1 2

2
D29 12V N-NTMFS4937NHT1G_SO8-RH R1052 NVVDD

2
S-BAT54C_SOT23 6.25A Q6322 2.2R/0805 CP27

5
12V PM3_LG3 4 CP19 NS_VIA
6.25A Q6323 NS_VIA

1
U6006 4
17

16

15

14

13

1
1
2
3
UP6282AQDD_WQFN16-RH C1494
4 R1239 2200p50 NET_SHORT_SMT_0M20
BOOT1

UG1

PH1
PGND

GND

1
2
3
31 PWM_3 R252 0R/0402 1 12 PM3_LG3 2.2 PWM_SW_3NET_SHORT_SMT_0M20
PWM1 LG1
0603
R1228
2.2 2 11 PM4_VCC2
OD#1 VCC2 12V_PEX6_2IN
0603 C92 C124 C139
22UF 22UF
PM3_VCC1 3 10 820uF
VCC1 OD#2 C193 C198
PWM_OUT3
6.3V 6.3V
10UF 20% 20% COMMON
1uF/16V/0603 X5R X5R 20%
PM4_LG4 4 9 R228 0R/0402 PWM_4 31 16V
0805 0805 2.5V
BOOT2

C188 LG2 PWM2 10%


GND COMMON COMMON OCCAP
GND

X5R
UG2
PH2

5.0A@105C
1uF/16V/0603 1206 0.007R
N-NTMFS4943NHT1G_SO8-RH COMMON GND GND GND
CAP_TH_D063P025
5

GND GND GND GND GND


5

R165 Q6411 GND


PM4_UG4 PM4_UG4_R 4
Y X
D40 2.2/0603
PM4_PHASE4

PM4_UG4

1
2
3

S-BAT54C_SOT23 R140
Z

L6005
GND PM4_BOOT4 10k/0402 CH-R30u60A0.6m-RH
PM4_PHASE4 1 2
R163 C172
5

N-NTMFS4937NHT1G_SO8-RH R1071

2
PM4_BOOT4_RC PM4_PHASE4 Q6423 2.2R/0805
PM4_LG4 4 CP18 PWM_SW_1 PWM_SW_1 31
NS_VIA PWM_SW_2 PWM_SW_2 31
0R/0805 0.1uF /25V
5

PWM_SW_3 PWM_SW_3 31
1
1
2
3

Q6422 C1491 PWM_SW_4 PWM_SW_4 31

2
5 4 2200p50
CP26
NET_SHORT_SMT_0M20
Title PWM_SW_4 NS_VIA PWM_OUT1 PWM_OUT1 31
1
2
3

V257 PWM_OUT2 PWM_OUT2 31


1
Size Document Number
Custom5
Rev
<RevCode>
N-NTMFS4937NHT1G_SO8-RH
PWM_OUT4NET_SHORT_SMT_0M20
PWM_OUT3
PWM_OUT4
PWM_OUT3 31 NVIDIA CORPORATION
PWM_OUT4 31
2701 SAN TOMAS EXPRESSWAY
Date: Tuesday, December 07, 2010 Sheet 32 of 1
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL SANTA CLARA, CA 95050, USA

PAGE DETAIL Power Supply: NVVDD PHASE 1, 2


NV_PN 600-11025-BASE-SCH
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1025-C00 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 12-JAN-2010

A B C D E F G H
A B C D E F G H

Power Supply: NVVDD PHASE 5, 6 1nd: 041-0146-000

2nd: 042-0083-000
12V_PEX6_2IN 12V_PEX6_2IN

12V

C152 C137 C132 C130


10UF 0.47UF 1UF
270uF 16V 16V 16V
COMMON 20% 10% 10% C122 C145 C136
20% X5R X7R X5R
C144
1UF 10UF 0.47UF
1 16V 1206 0603 0603 270uF 1
16V 16V 16V
OCCAP COMMON COMMON COMMON
5.5A@105C 10% 20% 10% COMMON
X5R X5R X7R 20% NVVDD
0.010R
CAP_TH_D080P035 0603 0805 0603 16V
GND
GND GND GND COMMON COMMON COMMON OCCAP
5.5A@105C
R161 C257 0.010R
CAP_TH_D080P035
C84 C530 C538 C565
PM5_BOOT5_RC PM5_PHASE5 GND GND GND GND
22UF 22UF 22UF 22UF
6.3V 6.3V 6.3V 6.3V
PM5_BOOT5 0R/0805
0.1uF 20% 20% 20% 20%
X5R X5R X5R X5R
0805 0805 0805 0805

PM5_PHASE5
12V_PEX6_2IN 12V_PEX6_2IN COMMON COMMON COMMON COMMON

PM5_UG5
Z

12V_PEX6_2IN
X Y 6.25A 6.25A
6.25A 12V 12V
12V GND Locaiton -> between Power Supply and GPU

D28
S-BAT54C_SOT23
U6005 C217
17

16

15

14

13
UP6282AQDD_WQFN16-RH 10UF
16V
R1230

BOOT1

UG1

PH1
PGND

GND
10%
31 PWM_5 R246 0R/0402 1 12 PM5_LG5 2.2 X5R
PWM1 LG1
0603 1206
R1231 N-NTMFS4943NHT1G_SO8-RH COMMON

5
2.2 2 11 PM6_VCC2
OD#1 VCC2 Q6511
0603
PM5_UG5 R158 PM5_UG5_R 4 NVVDD
2 PM5_VCC1 3 10 2
VCC1 OD#2 C256 2.2/0603

1
2
3
R249 1uF/16V/0603 R138
PM6_LG6 4 BOOT2 9 0R/0402 PWM_6 31 SO8-FLAT LEAD L6007
C170 LG2 PWM2 10k/0402 CH-R30u60A0.6m-RH
GND

UG2
PH2

1u/16V/06 PM5_PHASE5 N-NTMFS4937NHT1G_SO8-RH 1 2 NVVDD

2
GND N-NTMFS4937NHT1G_SO8-RH R1029
5

2
Q6523 2.2R/0805 CP21
PM5_LG5 4 CP22 NS_VIA

5
Y X NS_VIA

1
Q6522
PM6_PHASE6

PM6_UG6

1
1
2
3
S-BAT54C_SOT23 4 C1495

Z
D37 2200p50 NET_SHORT_SMT_0M20 C147 C142
PM6_BOOT6 NET_SHORT_SMT_0M20 820uF 820uF

1
2
3
PWM_SW_5
COMMON COMMON
R160 C220 20% 20%
2.5V 2.5V
PM6_BOOT6_RC PM6_PHASE6 OCCAP OCCAP
12V_PEX6_2IN 5.0A@105C 5.0A@105C
0.007R 0.007R
CAP_TH_D063P025 CAP_TH_D063P025
0R/0805 0.1uF PWM_OUT5
C216
10UF GND GND
GND
16V Close to Inductor
10%
X5R
1206 1nd: 041-0147-000

5
connect to PWM control N-NTMFS4943NHT1G_SO8-RH COMMON
Q6611 2nd: 042-0087-000
PM6_UG6 R159 PM6_UG6_R 4
3 31 PWM_5 3
2.2/0603

1
2
3
PWM_6 31 R143
L6008
10k/0402 CH-R30u60A0.6m-RH
PM6_PHASE6 N-NTMFS4937NHT1G_SO8-RH 1 2
N-NTMFS4937NHT1G_SO8-RH

5
R1030

2
Q6623 2.2/0805

5
PM6_LG6 4 CP23
Q6622 NS_VIA

2
4

1
1
2
3
C1496 CP20
2200p50 NS_VIA

1
2
3
NET_SHORT_SMT_0M20

1
PWM_SW_6

PWM_OUT6NET_SHORT_SMT_0M20

PWM_SW_5 PWM_SW_5 31
PWM_SW_6 PWM_SW_6 31

PWM_OUT5 PWM_OUT5 31
PWM_OUT6 PWM_OUT6 31
4 4

NVVDD

C705
C537 C1098
10UF 22UF 330UF
6.3V 6.3V COMMON
20% 20% -35%-10%
X5R X5R 2.5V
0805 0805 POSCAP
COMMON COMMON 3.0A
0.009R
CAP_SMD_7343

GND GND GND


GND
GND GND GND GND GND GND

Close to Inductor
GPU TOP-LEFT CORNER GPU TOP-RIGHT CORNER

5 5
Title
V257

Size Document Number Rev


Custom5 <RevCode> NVIDIA CORPORATION
Date: Tuesday, December 07, 2010 Sheet 33 of 1 2701 SAN TOMAS EXPRESSWAY

ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL SANTA CLARA, CA 95050, USA

PAGE DETAIL Power Supply: NVVDD PHASE 3, 4


NV_PN 600-11025-BASE-SCH
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1025-C00 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 12-JAN-2010

A B C D E F G H
A B C D E F G H

Thermal/Mechanical

1 1

BASEPLATE MOUNTING HOLES SOCKET (FOR LAB USE ONLY) FANSINK HOLE
BOARD STIFFENER
MEC6

HSN_SAV_GF100GPU_T_AL_1
2 8 connected mounting pins
COMMON 2

1
2
3
4
5
6
7
8
MEC1-1 MEC3-1 MEC3-5 MEC4-1 MEC4-5

MECH_PEX_02286X01112_HOLES SKT_BGA_POGO_425X425_P080 SKT_BGA_POGO_425X425_P080 HSA_GPU_SUNFLOWER_T_AL_1 HSA_GPU_SUNFLOWER_T_AL_1


COMMON COMMON COMMON COMMON COMMON
GND
1 1 5 1 5

MEC1-2 MEC1-6 MEC3-2 MEC3-6 MEC4-2 MEC4-6

MECH_PEX_02286X01112_HOLES MECH_PEX_02286X01112_HOLES SKT_BGA_POGO_425X425_P080 SKT_BGA_POGO_425X425_P080 HSA_GPU_SUNFLOWER_T_AL_1 HSA_GPU_SUNFLOWER_T_AL_1


COMMON COMMON COMMON COMMON COMMON COMMON

2 6 2 6 2 6

MEC1-7 MEC3-3 MEC3-7 MEC4-3 MEC4-7

MECH_PEX_02286X01112_HOLES SKT_BGA_POGO_425X425_P080 SKT_BGA_POGO_425X425_P080 HSA_GPU_SUNFLOWER_T_AL_1 HSA_GPU_SUNFLOWER_T_AL_1


COMMON COMMON COMMON COMMON COMMON

7 3 7 3 7

MEC1-4 MEC1-8 MEC3-4 MEC3-8 MEC4-4 MEC4-8

MECH_PEX_02286X01112_HOLES MECH_PEX_02286X01112_HOLES SKT_BGA_POGO_425X425_P080 SKT_BGA_POGO_425X425_P080 HSA_GPU_SUNFLOWER_T_AL_1 HSA_GPU_SUNFLOWER_T_AL_1


COMMON COMMON COMMON COMMON COMMON COMMON

4 8 4 8 4 8

3 3

GND GND GND GND GND GND

MEC5-1 MEC5-5

HSA_GPU_GF100_T_AL_1 HSA_GPU_GF100_T_AL_1
MEC2 COMMON COMMON

BRKT_ATX_1TAB_1_DVIDVI_2_HDMI 1 5
COMMON
4 4
1 MEC5-2 MEC5-6

HSA_GPU_GF100_T_AL_1 HSA_GPU_GF100_T_AL_1
COMMON COMMON
J11
2 6 J12 J17
FM1 FM2 FM3 FM5 3 1
1 1 SW_FB 1 SW_FB 1 SW_FB 4 2
MEC5-3 MEC5-7
GND SW_FB impedence
MECH. MOUNTING TOP

HSA_GPU_GF100_T_AL_1 HSA_GPU_GF100_T_AL_1 X_PIN1*2 X_PIN1*2


COMMON COMMON

3 7
FM4 FM6
MEC5-4 MEC5-8 1 SW_FB 1 SW_FB
INT2
HSA_GPU_GF100_T_AL_1 HSA_GPU_GF100_T_AL_1 Diffenential_Memory Clock
COMMON COMMON
4.72 / 4.72 mil 80 ohm +/- 10% INT2 INT5
4 8 MEM to GPU : 5.51mil / 45ohm MEM to GPU : 5.51mil / 45ohm
J16
FM7
1 SW_FB FM8 3 1
1 SW_FB 4 2
impedence
GND GND

INT5
Diffenential_Memory Clock
5 4.72 / 4.72 mil 80 ohm +/- 10% 5

Title
V257

Size Document Number Rev NVIDIA CORPORATION


Custom5 <RevCode> 2701 SAN TOMAS EXPRESSWAY

Date: Monday, December 06, 2010 Sheet 34 of 1 ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Thermal,Mechanical
NV_PN 602-11263-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV P1263-A02 PAGE
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 14-NOV-2010

A B C D E F G H
3V3_F

C528 C1105
.1UF 10UF
? 6.3V
? 20%
? X5R
0402 0805
COMMON COMMON
R847 0R 3V3_F
21,25,26,29,31 I2CC_SCL_R
7718D+ U4050
1 8 R842 0R R843
VDD SCLK
I2CC_SDA_R 21,25,26,29,31
2 7 18.7K
D+ SDAT
3

1 Q212 3 6 ALERT#
MMBT3904 D- ALERT#
TCRIT# 4 5
2

C1104 TCRIT# GND


7718D-
R846 3V3_F
NCT7718W
2200PF
X7R
18.7K
0402
COMMON
10%
16V

Title
V257

Size Document Number Rev


Custom5 <RevCode>

Date: Monday, December 06, 2010 Sheet 35 of 1

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