This document contains instructions for a 2-hour exam on the subject of Digital Logic and Applications. It is divided into 5 sections with 3 questions in each section worth 15 marks each. The questions cover topics such as excess-3 code, binary coded decimal, gray code, boolean algebra, combinational logic circuits, sequential circuits, latches, flip-flops, half subtractor, and instruction formats. Students are instructed to attempt 3 questions from each section for a total of 15 questions to be completed within the exam time of 2 hours.
This document contains instructions for a 2-hour exam on the subject of Digital Logic and Applications. It is divided into 5 sections with 3 questions in each section worth 15 marks each. The questions cover topics such as excess-3 code, binary coded decimal, gray code, boolean algebra, combinational logic circuits, sequential circuits, latches, flip-flops, half subtractor, and instruction formats. Students are instructed to attempt 3 questions from each section for a total of 15 questions to be completed within the exam time of 2 hours.
This document contains instructions for a 2-hour exam on the subject of Digital Logic and Applications. It is divided into 5 sections with 3 questions in each section worth 15 marks each. The questions cover topics such as excess-3 code, binary coded decimal, gray code, boolean algebra, combinational logic circuits, sequential circuits, latches, flip-flops, half subtractor, and instruction formats. Students are instructed to attempt 3 questions from each section for a total of 15 questions to be completed within the exam time of 2 hours.
This document contains instructions for a 2-hour exam on the subject of Digital Logic and Applications. It is divided into 5 sections with 3 questions in each section worth 15 marks each. The questions cover topics such as excess-3 code, binary coded decimal, gray code, boolean algebra, combinational logic circuits, sequential circuits, latches, flip-flops, half subtractor, and instruction formats. Students are instructed to attempt 3 questions from each section for a total of 15 questions to be completed within the exam time of 2 hours.
Sc/Paper/Subject Code: USIT102/Subject Name: Digital Logic and Applications
Time: (2 Hours) [Total Marks: 75]
N.B.: (1) All questions are compulsory.
(2) Make suitable assumptions wherever necessary and state the assumptions made. (3) Answers to the same questions must be written together. (4) Numbers to the right indicate marks. (5) Draw neat labeled diagrams wherever necessary. (6) Use of Non-programmable calculators is allowed.
1. Attempt any three of the following. 15
a. What is Excess-3 code? b. What are the advantages of BCD code over binary code? c. What is Gray code? What are its applications? d. Convert (1762.46)10 into binary, octal and hexadecimal. e. What are the disadvantages of binary code? f. Convert Hexadecimal in to decimal i) (4C8.2)16 ii) (5C7)16
2. Attempt any three of the following. 15
a.Write the applications of EX-OR gate. b. Why are the NAND and NOR gates called universal gates? c. Implement the following Boolean equation using NAND gates only Y=AB+CDE+F d. Realize the following Boolean expression using NAND gate y=AB+AB e. State De-Morgan’s Theorems. f. Define ‘truth table’. What is a logic gate? Classify the logic gates.
3.Attempt any three of the following. 15
a. Explain the rules of Boolean Algebra. b. State AND law. c. Simplify Y=AB(CD)+BCD+(A+C)(B+D) d. Simplify the following expression using Boolean algebra: (A + B)(A + C)(A + D) e. State and explain Commutative law and Idempotent law. f. Write a note on: Duality theorem.
4.Attempt any three of the following. 15
a. Write a short note on Combinational circuit. b. With the suitable example explain the analysis of combinational circuit. c. What are the steps of designing combinational circuit? d. With the help of circuit diagram discuss four-bit binary adder. e. Input to the combinational circuit is a 4-bit binary number. Design the circuit with minimum hardware for the following. i) Output P =1 if the number is prime. ii) Output Q=1 if the number is divisible by 3. f. Design the half adder using K-map. Draw the circuit diagram for the same. FY.B.Sc/Paper/Subject Code: USIT102/Subject Name: Digital Logic and Applications
5.Attempt any three of the following. 15
a. What is sequential circuit? b. Explain the concept of Latch. c. Describe JK Flip-Flop. d. What is Half Subtractor? Draw the logic diagram and truth table of half subtractor. e. Give the different instruction formats. f. Explain D Flip-Flop along with the circuit.