Digital Logic and Microprocessor

(SWE1003)

Digital Assessment-2
(Sequential Logic Circuit)
Embedded Lab

Student Name: V.SANJAIKUMAR

Register Number: 22MIS0141
Faculty Name: Dr NITHYA S
School: SCORE
Date: 11-10-2023

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1) Verify the characteristic tables of SR, T, D and JK flip flop.

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JK flip flop:

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SR flip flop:

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D flip flop:

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T flip flop:

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2) Design T flip flop using JK flip flop.

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6) Design Mod8 counter using JK flip flop.

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7) Design a Synchronous counter that has the following repeated binary
sequence 0,1,2,3,4,5,6,7,0,1,2…. using T Flip flop.

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8) Verify the shift registers SISO, PISO, SIPO, PIPO for the following sequence
1010.

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SIPO:

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SISO:

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PIPO:

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PISO:

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