Download as pdf or txt
Download as pdf or txt
You are on page 1of 110

5 4 3 2 1

DDR4 / 1.2V PCB Layer Stackup


LCD CONN
eDP 17.3"
eDPx4
eDP
Mux
eDPx4 Channel A UNBUFFERED UNBUFFERED
PY-Note Block Diagram
FHD/QFHD 42 41 DDR4 2400MHz DDR4 DDR4 L1:TOP
CPU SO-DIMMA1 SO-DIMMA2 Project Code: DP710
SM Bus_B 27 28 PCB(Raw Card): 1.0 L2:GND
HDMI Conn. SPI Flash TBT eDPx4 L3:Signal
4Mbits (U15)
45 46 Intel L4:PWR
Channel B UNBUFFERED UNBUFFERED
dGPU MXM PEG-16X Kabylake_H DDR4 2400MHz DDR4 DDR4 Wireless LAN Wireless WAN L5:Signal
D
GEN3 SO-DIMMB1 SO-DIMMB2 Antenna Antenna L6:Signal
D

NVIDIA BGA1440
SM Bus_B 29 30 L7:GND
TBT-PWR SW DPx4
/USB Type-C N17M-Q3 L8:Signal
52
Thunderbolt 45W
(port 1) L9:GND
N17E- CPU XDP (M.2 WLAN Card) (M.2 WWAN Card) L10:BOTTOM
TBT-PWR SW DPx4 Q1/Q3//Q5 24
/USB Type-C 31 3,4,5,6,7,8,9,10,11,12,13 Bluetooth
(port 2) 53 46-51 61 61
Battery Charger
Mini DisplayPort BQ24780SRUYR 88
PCI Express x4 DP Mux DMI x4 Type-A M.2 Card Type-B M.2 Card
44
INPUTS OUTPUTS
DisplayPort
(Docking) 74 43
SIM Card DOCK_PWR20 M-BAT-PWR
USB Port 3 Slot 61 USB
USB3.0 Right SM Bus
CONN (USB2) 54
USB2.0 CH2
USB3.0 CH2
PCH Port 14 (X1) Port 3 System DC/DC
C-Link TPS51285BRUKR 90
USB3.0 Left
USB2.0 CH1 USB x 12 ports 15 M.2 SLOT M.2 SLOT
C
AOU (USB1) 54 USB3.0 CH1 Intel SSD 60 SSD 60
VINT20 VCC5M
VCC3M C

SATA x4
USB2.0 M.2 USB2.0 CH3
HDD CONN CH2 16
Kabylake-H Port 11 Port 19 CPU DC/DC
WWAN Slot 61 SSD 65 (X1) (X1 M: NCP81205MNTXG 91
vPro PCI Express x7 ports
S: NCP81382MNTXG 92,93,94
Thunderbolt VCCCPUCORE
USB3.0 USB2.0 CH4
ODD CONN CH3 VINT20 VCCGFXCORE_I
Docking 74 USB3.0 CH4 66 Port 13 Port 1 Port 4 VCCSA
HDA (X1) (X1) (X1) VCCCPUIO
USB3.0 Right M.2 SLOT
USB2.0 CH5 CH0 NB681GD-C623-Z 95
CONN (USB3) 54 USB3.0 CH5 SSD 60
SPI Flash VCC5M VCCCPUIO
USB3.0 Right M.2 SLOT ALC3268 HDA Multi-Media Express
USB2.0 CH6 CH4 64Mbits Intel GbE PHY VCC1R0_SUS
CONN (USB4) 54 USB3.0 CH6 SSD 60 (SPI1) 26 CODEC Controller Card Slot
RTS5234s JACKSONVILLE
Optane Memory TPS51362RVER 96
USB2.0 M.2 USB2.0 CH14
14,15,16,17,18
67
(UHS-II) 62 64 56
19,20,21,22,23
WLAN Slot (BT) 61 VCC5M VCC1R0_SUS
RTC Battery 25 Stereo
Speaker VCC1R2A/VCC0R6B
USB2.0 2D USB2.0 CH8 +SMDDR_VREF_DIMM
Camera 40 71
I2S
LPC Bus 33MHz TPS51716RUKR 99
B LAN B
USB2.0 USB2.0 CH10
TPM 2.0 MUX +SMDDR_VREF_DIMM
Touch Panel 40
FAN 80 82
Audio Internal SD/MMC 57
Docking VINT20 VCC0R6B
(Docking) Mic Card Slot VCC1R2A

USB2.0 Microphone 74 40 63
USB2.0 CH11 G-Sensor
Smart Card Slot 64 81 Headphone VCC1R8B
BD9B300MUV-E2 98
67,68
USB2.0 USB2.0 CH12 MAGNETICS VCC5M VCC1R8B
Express Slot 64
DC/DC
Thermal Sensor Converter RJ45
AC-DC IN Main 58,59
PECI 3.0 Embedded Lenovo 86 Battery VCC2R5A
SMB-MB/SB Controller ASIC BD91364AMUU-ZE2
100
LED for Camera MEC1653 ThinkEngine Audio 68 VCC5M VCC2R5A
LED for ThinkPad Logos Combo Jack I2C 88
75,76,77 84,85 VCCOPC/VCCEOPIO(44e)
USB2.0 USB2.0 I/O SubCard Interface NB681GD-C623-Z 101
NB681GD-C623-Z 103
Port 9 Port 13 SM Bus USB 2.0 P8 Camera-(USB2)/LID SW
SATA P3 External Connector/Socket VCC5M VCCOPC
ODD Sub Card VCC5M VCCEOPIO
40
Internal Connector/Socket VCCGTX (44e)
A A

Fingerprint Color CS15 Keyboard with Power Button LED for ThinkPad Logo Internal Switch NCP81210MNTXG 102
Reader Sensor ClickPad Numpad Subcard LED for ThinkPad Logos On A cover
54 40 79 78 54 40 VINT20 VCCGTX

Antenna Security Classification LC Future Center Secret Data Title

Camera Issued Date 2015/07/16 Deciphered Date 2016/01/16 TITLE PAGE


USB Port 8 Subcard 40 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 1 of 111


5 4 3 2 1
5 4 3 2 1

TABLE: SYSTEM POWER STATE


EC SMBus0 address EC SMBus1 address
Power state to be determined
Device Address Device Address
Smart Battery 0001 011X b G-Senor (LIS3DH) 0011 000Xb
G-Senor (KX023) 0011 110Xb

D D

EC SMBus2 address EC SMBus10 address


Device Address Device Address
Charge Controller 0001 0010 Master VGA 0x9E

PCH SM Bus address PCH SM Bus0 address


Device Address Device Address
CH-A P DDR DIMM0 1001 0000b Intel Lan_I219 0XC8
Schematics Mark Definition CH-A S DDR DIMM1 1001 0001b
BOM Structure 4+2 CPU 4+4e CPU Note CH-B P DDR DIMM2 1001 0010b
@ NO ASM NO ASM CH-B S DDR DIMM3 1001 0011b
EMC@ ASM ASM EMC
RF@ ASM ASM RF
ME@ ASM ASM ME
C C
PRxxx,PCxxx,
PLxxx ASM ASM Power
42@ ASM NO ASM 4+2 CPU
44e@ NO ASM ASM 4+4e CPU
TABLE: SYSTEM COMPONENT PLACEMENT (AS OF 2014 Dec 8)
Any other mark like below is prohibited on Payton/Walter.
ESD@,EMI@,EMC_NS@,EMC_PX@,EMC_OPT@,CONN@, DCIN RJ45 HDMI TBT-B TBT-A

CONN_NS@... RH,CH,LH(PCH related RLC)..

GPU FAN CPU FAN

Capacitor Naming Note


(FAN2) (FAN1)
DOCK

Ceramic Capacitors: CPU

mDP
0.1U_0402_6.3VXX

M.2 SSD1

M.2 SSD2
USBP2

Tolerance USBP1 DIMM


(AOU) USBP5
Temperature Characteristics
B
Rated Voltage DIMM EXPRESSCARD SD CARD
B

Package Size
USBP6
Temperature Characteristics:
SMARTCARD AUDIO

Symbol 0 1 2 3 4 5 6 7 8 9 A

Code Z5U Z5V Z5P Y5U Y5V Y5P X5R X7R NPO COG X6S

B C D E F G H I J K L

BJ CH CJ CK SH SJ UJ UK SL X5S NOJ
PCB_MB
Tolerance: XXX

Symbol A B C D F G H J K M N
PCB NM-B121
Tolerance +-0.05PF +-0.1PF +-0.25PF +-0.5PF +-1% +-2% +-3% +-5% +-10% +-20% +-30%
DAA00007D00

A
Symbol P Q V X Z S Y A

Tolerance +100,-0% +30,-10% +20,-10% +40,-20% +80,-20% +50,-20% -30% ~ 10%

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Blank


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 2 of 111
5 4 3 2 1
5 4 3 2 1

D D

U1A SKYLAKE_HALO
27,28 M_A_DQ[0..63] M_A_DQ0 BGA1440 M_A_DDRCLK0_1066M
BR6 AG1
M_A_DQ1 BT6 DDR0_DQ[0] DDR0_CKP[0] AG2 -M_A_DDRCLK0_1066M M_A_DDRCLK0_1066M 27
M_A_DQ2 BP3 DDR0_DQ[1] DDR0_CKN[0] AK1 -M_A_DDRCLK1_1066M -M_A_DDRCLK0_1066M 27
M_A_DQ3 BR3 DDR0_DQ[2] DDR0_CKN[1] AK2 M_A_DDRCLK1_1066M -M_A_DDRCLK1_1066M 27
M_A_DQ4 BN5 DDR0_DQ[3] DDR0_CKP[1] AL3 M_A_DDRCLK2_1066M M_A_DDRCLK1_1066M 27
M_A_DQ5 BP6 DDR0_DQ[4] DDR0_CLKP[2] AK3 -M_A_DDRCLK2_1066M M_A_DDRCLK2_1066M 28
M_A_DQ6 BP2 DDR0_DQ[5] DDR0_CLKN[2] AL2 M_A_DDRCLK3_1066M -M_A_DDRCLK2_1066M 28
M_A_DQ7 BN3 DDR0_DQ[6] DDR0_CLKP[3] AL1 -M_A_DDRCLK3_1066M M_A_DDRCLK3_1066M 28
M_A_DQ8 BL4 DDR0_DQ[7] DDR0_CLKN[3] -M_A_DDRCLK3_1066M 28
M_A_DQ9 BL5 DDR0_DQ[8] AT1 M_A_CKE0
M_A_DQ10 BL2 DDR0_DQ[9] DDR0_CKE[0] AT2 M_A_CKE1 M_A_CKE0 27
M_A_DQ11 BM1 DDR0_DQ[10] DDR0_CKE[1] AT3 M_A_CKE2 M_A_CKE1 27
M_A_DQ12 BK4 DDR0_DQ[11] DDR0_CKE[2] AT5 M_A_CKE3 M_A_CKE2 28
M_A_DQ13 BK5 DDR0_DQ[12] DDR0_CKE[3] M_A_CKE3 28
M_A_DQ14 BK1 DDR0_DQ[13] AD5 -M_A_CS0
M_A_DQ15 BK2 DDR0_DQ[14] DDR0_CS#[0] AE2 -M_A_CS1 -M_A_CS0 27
M_A_DQ16 BG4 DDR0_DQ[15] DDR0_CS#[1] AD2 -M_A_CS2 -M_A_CS1 27
M_A_DQ17 BG5 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] AE5 -M_A_CS3 -M_A_CS2 28
M_A_DQ18 BF4 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] -M_A_CS3 28
M_A_DQ19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3 M_A_ODT0
M_A_DQ20 BG2 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] AE4 M_A_ODT1 M_A_ODT0 27
M_A_DQ21 BG1 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] AE1 M_A_ODT2 M_A_ODT1 27
M_A_DQ22 BF1 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] AD4 M_A_ODT3 M_A_ODT2 28
M_A_DQ23 BF2 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] M_A_ODT3 28
M_A_DQ24 BD2 DDR0_DQ[23]/DDR0_DQ[39] AH5 M_A_BA0
M_A_DQ25 BD1 DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] AH1 M_A_BA1 M_A_BA0 27,28
M_A_DQ26 BC4 DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] AU1 M_A_BG0 M_A_BA1 27,28
M_A_DQ27 BC5 DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 27,28
C M_A_DQ28 BD5 DDR0_DQ[27]/DDR0_DQ[43] AH4 M_A_A16_RAS_N C
M_A_DQ29 BD4 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AG4 M_A_A14_WE_N M_A_A16_RAS_N 27,28
M_A_DQ30 BC1 DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AD1 M_A_A15_CAS_N M_A_A14_WE_N 27,28
M_A_DQ31 BC2 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_A15_CAS_N 27,28
M_A_DQ32 AB1 DDR0_DQ[31]/DDR0_DQ[47] AH3 M_A_A0 M_A_A[0..9] 27,28
M_A_DQ33 AB2 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] AP4 M_A_A1
M_A_DQ34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AN4 M_A_A2
M_A_DQ35 AA5 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AP5 M_A_A3
M_A_DQ36 AB5 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] AP2 M_A_A4
M_A_DQ37 AB4 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] AP1 M_A_A5
M_A_DQ38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AP3 M_A_A6
M_A_DQ39 AA1 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AN1 M_A_A7
M_A_DQ40 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AN3 M_A_A8
M_A_DQ41 V2 DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AT4 M_A_A9
M_A_DQ42 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] AH2 M_A_A10_AP
M_A_DQ43 U2 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] AN2 M_A_A11 M_A_A10_AP 27,28
M_A_DQ44 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] AU4 M_A_A12 M_A_A11 27,28
M_A_DQ45 V4 DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] AE3 M_A_A13 M_A_A12 27,28
M_A_DQ46 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU2 M_A_BG1 M_A_A13 27,28
M_A_DQ47 U4 DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] AU3 -M_A_ACT M_A_BG1 27,28
M_A_DQ48 R2 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# -M_A_ACT 27,28
M_A_DQ49 P5 DDR0_DQ[48]/DDR1_DQ[32] AG3 M_A_PARITY
M_A_DQ50 R4 DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR AU5 -M_A_ALERT M_A_PARITY 27,28
M_A_DQ51 P4 DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# -M_A_ALERT 27,28
M_A_DQ52 R5 DDR0_DQ[51]/DDR1_DQ[35]
M_A_DQ53 P2 DDR0_DQ[52]/DDR1_DQ[36] BR5 -M_A_DQS0 -M_A_DQS[0..3] 27,28
M_A_DQ54 R1 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] BL3 -M_A_DQS1
M_A_DQ55 P1 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] BG3 -M_A_DQS2
M_A_DQ56 M4 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] BD3 -M_A_DQS3
M_A_DQ57 M1 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] AB3 M_A_DQS4
M_A_DQ58 L4 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] V3 M_A_DQS5 M_A_DQS4 27,28
M_A_DQ59 L2 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] R3 M_A_DQS6 M_A_DQS5 27,28
B M_A_DQ60 M5 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M3 M_A_DQS7 M_A_DQS6 27,28 B
M_A_DQ61 M2 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] M_A_DQS7 27,28
M_A_DQ62 L5 DDR0_DQ[61]/DDR1_DQ[45] BP5 M_A_DQS0 M_A_DQS[0..3] 27,28
M_A_DQ63 L1 DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BK3 M_A_DQS1
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] BF3 M_A_DQS2
M_A_CB0 BA2 DDR0_DQSP[2]/DDR0_DQSP[4] BC3 M_A_DQS3
27,28 M_A_CB0 M_A_CB1 DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] -M_A_DQS4
BA1 AA3
27,28 M_A_CB1 M_A_CB2 DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] -M_A_DQS5 -M_A_DQS4 27,28
AY4 U3
27,28 M_A_CB2 M_A_CB3 DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] -M_A_DQS6 -M_A_DQS5 27,28
AY5 P3
27,28 M_A_CB3 M_A_CB4 DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] -M_A_DQS7 -M_A_DQS6 27,28
BA5 L3
27,28 M_A_CB4 DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] -M_A_DQS7 27,28
M_A_CB5 BA4
27,28 M_A_CB5 DDR0_ECC[5]
M_A_CB6 AY1 AY3 M_A_DQS8
27,28 M_A_CB6 M_A_CB7 DDR0_ECC[6] DDR0_DQSP[8] -M_A_DQS8 M_A_DQS8 27,28
AY2 BA3
27,28 M_A_CB7 DDR0_ECC[7] DDR0_DQSN[8] -M_A_DQS8 27,28

DDR CHANNEL
A
1 OF 14

SKYLAKE-H-CPU_BGA1440

DDR4 INTERLEAVE IMPLEMENTATION

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : DDR4 CH-A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 3 of 111


5 4 3 2 1
5 4 3 2 1

D D

U1B SKYLAKE_HALO

29,30 M_B_DQ[0..63] M_B_DQ0 BGA1440 M_B_DDRCLK0_1066M


BT11 AM9
M_B_DQ1 BR11 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] AN9 -M_B_DDRCLK0_1066M M_B_DDRCLK0_1066M 29
M_B_DQ2 BT8 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] AM8 -M_B_DDRCLK1_1066M -M_B_DDRCLK0_1066M 29
M_B_DQ3 BR8 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] AM7 M_B_DDRCLK1_1066M -M_B_DDRCLK1_1066M 29
M_B_DQ4 BP11 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] AM11 M_B_DDRCLK2_1066M M_B_DDRCLK1_1066M 29
M_B_DQ5 BN11 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] AM10 -M_B_DDRCLK2_1066M M_B_DDRCLK2_1066M 30
M_B_DQ6 BP8 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] AJ10 M_B_DDRCLK3_1066M -M_B_DDRCLK2_1066M 30
M_B_DQ7 BN8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] AJ11 -M_B_DDRCLK3_1066M M_B_DDRCLK3_1066M 30
M_B_DQ8 BL12 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3] -M_B_DDRCLK3_1066M 30
M_B_DQ9 BL11 DDR1_DQ[8]/DDR0_DQ[24] AT8 M_B_CKE0
M_B_DQ10 BL8 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] AT10 M_B_CKE1 M_B_CKE0 29
M_B_DQ11 BJ8 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] AT7 M_B_CKE2 M_B_CKE1 29
M_B_DQ12 BJ11 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] AT11 M_B_CKE3 M_B_CKE2 30
M_B_DQ13 BJ10 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3] M_B_CKE3 30
M_B_DQ14 BL7 DDR1_DQ[13]/DDR0_DQ[29] AF11 -M_B_CS0
M_B_DQ15 BJ7 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] AE7 -M_B_CS1 -M_B_CS0 29
M_B_DQ16 BG11 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] AF10 -M_B_CS2 -M_B_CS1 29
M_B_DQ17 BG10 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AE10 -M_B_CS3 -M_B_CS2 30
M_B_DQ18 BG8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3] -M_B_CS3 30
M_B_DQ19 BF8 DDR1_DQ[18]/DDR0_DQ[50] AF7 M_B_ODT0
M_B_DQ20 BF11 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] AE8 M_B_ODT1 M_B_ODT0 29
M_B_DQ21 BF10 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] AE9 M_B_ODT2 M_B_ODT1 29
M_B_DQ22 BG7 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] AE11 M_B_ODT3 M_B_ODT2 30
M_B_DQ23 BF7 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3] M_B_ODT3 30
M_B_DQ24 BB11 DDR1_DQ[23]/DDR0_DQ[55] AH10 M_B_A16_RAS_N
M_B_DQ25 BC11 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] AH11 M_B_A14_WE_N M_B_A16_RAS_N 29,30
M_B_DQ26 BB8 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AF8 M_B_A15_CAS_N M_B_A14_WE_N 29,30
M_B_DQ27 BC8 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_A15_CAS_N 29,30
C M_B_DQ28 BC10 DDR1_DQ[27]/DDR0_DQ[59] AH8 M_B_BA0 C
M_B_DQ29 BB10 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AH9 M_B_BA1 M_B_BA0 29,30
M_B_DQ30 BC7 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AR9 M_B_BG0 M_B_BA1 29,30
M_B_DQ31 BB7 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 29,30
M_B_DQ32 AA11 DDR1_DQ[31]/DDR0_DQ[63] AJ9 M_B_A0 M_B_A[0..9] 29,30
M_B_DQ33 AA10 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] AK6 M_B_A1
M_B_DQ34 AC11 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] AK5 M_B_A2
M_B_DQ35 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AL5 M_B_A3
M_B_DQ36 AA7 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] AL6 M_B_A4
M_B_DQ37 AA8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] AM6 M_B_A5
M_B_DQ38 AC8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AN7 M_B_A6
M_B_DQ39 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] AN10 M_B_A7
M_B_DQ40 W8 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AN8 M_B_A8
M_B_DQ41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AR11 M_B_A9
M_B_DQ42 V10 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] AH7 M_B_A10_AP
M_B_DQ43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AN11 M_B_A11 M_B_A10_AP 29,30
M_B_DQ44 W11 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AR10 M_B_A12 M_B_A11 29,30
M_B_DQ45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AF9 M_B_A13 M_B_A12 29,30
M_B_DQ46 V7 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AR7 M_B_BG1 M_B_A13 29,30
M_B_DQ47 V8 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] AT9 -M_B_ACT M_B_BG1 29,30
M_B_DQ48 R11 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# -M_B_ACT 29,30
M_B_DQ49 P11 DDR1_DQ[48] AJ7 M_B_PARITY
M_B_DQ50 P7 DDR1_DQ[49] DDR1_PAR AR8 -M_B_ALERT M_B_PARITY 29,30
M_B_DQ51 R8 DDR1_DQ[50] DDR1_ALERT# -M_B_ALERT 29,30
M_B_DQ52 R10 DDR1_DQ[51]
M_B_DQ53 P10 DDR1_DQ[52] BP9 -M_B_DQS0 -M_B_DQS[0..7] 29,30
M_B_DQ54 R7 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] BL9 -M_B_DQS1
M_B_DQ55 P8 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] BG9 -M_B_DQS2
M_B_DQ56 L11 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] BC9 -M_B_DQS3
M_B_DQ57 M11 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] AC9 -M_B_DQS4
M_B_DQ58 L7 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] W9 -M_B_DQS5
M_B_DQ59 M8 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] R9 -M_B_DQS6
B M_B_DQ60 L10 DDR1_DQ[59] DDR1_DQSN[6] M9 -M_B_DQS7 B
M_B_DQ61 M10 DDR1_DQ[60] DDR1_DQSN[7]
M_B_DQ62 M7 DDR1_DQ[61] BR9 M_B_DQS0 M_B_DQS[0..7] 29,30
M_B_DQ63 L8 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] BJ9 M_B_DQS1
DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] BF9 M_B_DQS2
M_B_CB0 AW11 DDR1_DQSP[2]/DDR0_DQSP[6] BB9 M_B_DQS3
29,30 M_B_CB0 M_B_CB1 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7]
AY11 AA9 M_B_DQS4
29,30 M_B_CB1 M_B_CB2 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQS5
AY8 V9
29,30 M_B_CB2 M_B_CB3 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS6
AW8 P9
29,30 M_B_CB3 M_B_CB4 DDR1_ECC[3] DDR1_DQSP[6] M_B_DQS7
AY10 L9
29,30 M_B_CB4 M_B_CB5 DDR1_ECC[4] DDR1_DQSP[7]
AW10
29,30 M_B_CB5 M_B_CB6 DDR1_ECC[5]
AY7 AW9 M_B_DQS8
29,30 M_B_CB6 M_B_CB7 DDR1_ECC[6] DDR1_DQSP[8] -M_B_DQS8 M_B_DQS8 29,30
AW7 AY9
29,30 M_B_CB7 DDR1_ECC[7] DDR1_DQSN[8] -M_B_DQS8 29,30

DDR CHANNEL B

R543 2 1 121_0402_1% DDR_RCOMP0 G1 BN13 M_A_VREF_CA_CPU


2 1 75_0402_1% DDR_RCOMP1 H1 DDR_RCOMP[0] DDR_VREF_CA BP13 M_A_VREF_CA_CPU 27
R544
R545 2 1 100_0402_1% DDR_RCOMP2 J2 DDR_RCOMP[1] 2 OF 14 DDR0_VREF_DQ BR13 M_B_VREF_DQ_CPU
DDR_RCOMP[2] DDR1_VREF_DQ M_B_VREF_DQ_CPU 29
SKYLAKE-H-CPU_BGA1440
PLACE CLOSE TO CPU

DDR_VREF_CA: Connected to VREF_CA on DIMM CH-A


DDR0_VREF_DQ: NC

A DDR1_VREF_DQ: Connected to VREF_CA on DIMM CH-B A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : DDR4 CH-B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 4 of 111
5 4 3 2 1
5 4 3 2 1

D D

U1C SKYLAKE_HALO

BGA1440

PEG_RXP0 E25 B25 PEG_TXP0


31 PEG_RXP0 PEG_RXN0 D25 PEG_RXP[0] PEG_TXP[0] A25 PEG_TXN0 PEG_TXP0 31
31 PEG_RXN0 PEG_RXN[0] PEG_TXN[0] PEG_TXN0 31
PEG_RXP1 E24 B24 PEG_TXP1
31 PEG_RXP1 PEG_RXN1 F24 PEG_RXP[1] PEG_TXP[1] C24 PEG_TXN1 PEG_TXP1 31
31 PEG_RXN1 PEG_RXN[1] PEG_TXN[1] PEG_TXN1 31
PEG_RXP2 E23 B23 PEG_TXP2
31 PEG_RXP2 PEG_RXN2 D23 PEG_RXP[2] PEG_TXP[2] A23 PEG_TXN2 PEG_TXP2 31
31 PEG_RXN2 PEG_RXN[2] PEG_TXN[2] PEG_TXN2 31
PEG_RXP3 E22 B22 PEG_TXP3
31 PEG_RXP3 PEG_RXN3 F22 PEG_RXP[3] PEG_TXP[3] C22 PEG_TXN3 PEG_TXP3 31
31 PEG_RXN3 PEG_RXN[3] PEG_TXN[3] PEG_TXN3 31
PEG_RXP4 E21 B21 PEG_TXP4
31 PEG_RXP4 PEG_RXN4 D21 PEG_RXP[4] PEG_TXP[4] A21 PEG_TXN4 PEG_TXP4 31
31 PEG_RXN4 PEG_RXN[4] PEG_TXN[4] PEG_TXN4 31
PEG_RXP5 E20 B20 PEG_TXP5
31 PEG_RXP5 PEG_RXN5 F20 PEG_RXP[5] PEG_TXP[5] C20 PEG_TXN5 PEG_TXP5 31
31 PEG_RXN5 PEG_RXN[5] PEG_TXN[5] PEG_TXN5 31
PEG_RXP6 E19 B19 PEG_TXP6
31 PEG_RXP6 PEG_RXN6 D19 PEG_RXP[6] PEG_TXP[6] A19 PEG_TXN6 PEG_TXP6 31
C 31 PEG_RXN6 PEG_RXN[6] PEG_TXN[6] PEG_TXN6 31 C
PEG_RXP7 E18 B18 PEG_TXP7
31 PEG_RXP7 PEG_RXN7 F18 PEG_RXP[7] PEG_TXP[7] C18 PEG_TXN7 PEG_TXP7 31
31 PEG_RXN7 PEG_RXN[7] PEG_TXN[7] PEG_TXN7 31
PEG_RXP8 D17 A17 PEG_TXP8
31 PEG_RXP8 PEG_RXN8 E17 PEG_RXP[8] PEG_TXP[8] B17 PEG_TXN8 PEG_TXP8 31
31 PEG_RXN8 PEG_RXN[8] PEG_TXN[8] PEG_TXN8 31
PEG_RXP9 F16 C16 PEG_TXP9
31 PEG_RXP9 PEG_RXN9 E16 PEG_RXP[9] PEG_TXP[9] B16 PEG_TXN9 PEG_TXP9 31
31 PEG_RXN9 PEG_RXN[9] PEG_TXN[9] PEG_TXN9 31
PEG_RXP10 D15 A15 PEG_TXP10
31 PEG_RXP10 PEG_RXN10 E15 PEG_RXP[10] PEG_TXP[10] B15 PEG_TXN10 PEG_TXP10 31
31 PEG_RXN10 PEG_RXN[10] PEG_TXN[10] PEG_TXN10 31
PEG_RXP11 F14 C14 PEG_TXP11
31 PEG_RXP11 PEG_RXN11 E14 PEG_RXP[11] PEG_TXP[11] B14 PEG_TXN11 PEG_TXP11 31
31 PEG_RXN11 PEG_RXN[11] PEG_TXN[11] PEG_TXN11 31
PEG_RXP12 D13 A13 PEG_TXP12
31 PEG_RXP12 PEG_RXN12 E13 PEG_RXP[12] PEG_TXP[12] B13 PEG_TXN12 PEG_TXP12 31
31 PEG_RXN12 PEG_RXN[12] PEG_TXN[12] PEG_TXN12 31
PEG_RXP13 F12 C12 PEG_TXP13
31 PEG_RXP13 PEG_RXN13 E12 PEG_RXP[13] PEG_TXP[13] B12 PEG_TXN13 PEG_TXP13 31
31 PEG_RXN13 PEG_RXN[13] PEG_TXN[13] PEG_TXN13 31
PEG_RXP14 D11 A11 PEG_TXP14
31 PEG_RXP14 PEG_RXN14 E11 PEG_RXP[14] PEG_TXP[14] B11 PEG_TXN14 PEG_TXP14 31
31 PEG_RXN14 PEG_RXN[14] PEG_TXN[14] PEG_TXN14 31
PEG_RXP15 F10 C10 PEG_TXP15
31 PEG_RXP15 PEG_RXN15 E10 PEG_RXP[15] PEG_TXP[15] B10 PEG_TXN15 PEG_TXP15 31
31 PEG_RXN15 PEG_RXN[15] PEG_TXN[15] PEG_TXN15 31
VCCCPUIO R1
1 2 PEG_COMP_W12mil G2
PEG_RCOMP
24.9_0402_1%
B B

DMI_TXP0 D8 B8 DMI_RXP0
15 DMI_TXP0 DMI_TXN0 E8 DMI_RXP[0] DMI_TXP[0] A8 DMI_RXN0 DMI_RXP0 15
15 DMI_TXN0 DMI_RXN[0] DMI_TXN[0] DMI_RXN0 15
DMI_TXP1 E6 C6 DMI_RXP1
15 DMI_TXP1 DMI_TXN1 F6 DMI_RXP[1] DMI_TXP[1] B6 DMI_RXN1 DMI_RXP1 15
15 DMI_TXN1 DMI_RXN[1] DMI_TXN[1] DMI_RXN1 15
DMI_TXP2 D5 B5 DMI_RXP2
15 DMI_TXP2 DMI_TXN2 E5 DMI_RXP[2] DMI_TXP[2] A5 DMI_RXN2 DMI_RXP2 15
15 DMI_TXN2 DMI_RXN[2] DMI_TXN[2] DMI_RXN2 15
DMI_TXP3 J8 D4 DMI_RXP3
15 DMI_TXP3 DMI_TXN3 J9 DMI_RXP[3] DMI_TXP[3] B4 DMI_RXN3 DMI_RXP3 15
15 DMI_TXN3 DMI_RXN[3] DMI_TXN[3] DMI_RXN3 15
3 OF 14

SKYLAKE-H-CPU_BGA1440

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : PEG/DMI


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 5 of 111


5 4 3 2 1
5 4 3 2 1

D D

U1D SKYLAKE_HALO

K36 BGA1440 D29 EDP_TXP0_I


K37 DDI1_TXP[0] EDP_TXP[0] E29 EDP_TXN0_I EDP_TXP0_I 41
J35 DDI1_TXN[0] EDP_TXN[0] F28 EDP_TXP1_I EDP_TXN0_I 41
VCCCPUIO
J34 DDI1_TXP[1] EDP_TXP[1] E28 EDP_TXN1_I EDP_TXP1_I 41
H37 DDI1_TXN[1] EDP_TXN[1] B29 EDP_TXN2_I EDP_TXN1_I 41
H36 DDI1_TXP[2] EDP_TXN[2] A29 EDP_TXP2_I EDP_TXN2_I 41
J37 DDI1_TXN[2] EDP_TXP[2] B28 EDP_TXN3_I EDP_TXP2_I 41
J38 DDI1_TXP[3] EDP_TXN[3] C28 EDP_TXP3_I EDP_TXN3_I 41
DDI1_TXN[3] EDP_TXP[3] EDP_TXP3_I 41

1
D27 C26 EDP_AUXP_I
E27 DDI1_AUXP EDP_AUXP B26 EDP_AUXN_I EDP_AUXP_I 41
R2
C DDI1_AUXN EDP_AUXN EDP_AUXN_I 41 C
24.9_0402_1%
H34
H33 DDI2_TXP[0]

2
F37 DDI2_TXN[0] A33
G38 DDI2_TXP[1] EDP_DISP_UTIL Leave EDP_DISP_UTIL NC
F34 DDI2_TXN[1]
F35 DDI2_TXP[2] D37 EDP_RCOMP_W20mil
E37 DDI2_TXN[2] EDP_RCOMP
E36 DDI2_TXP[3]
DDI2_TXN[3]
F26
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
E33 DDI3_TXP[2]
C33 DDI3_TXN[2]
B33 DDI3_TXP[3]
DDI3_TXN[3] G27 PROC_AUDIO_CLK_CPU
A27 PROC_AUDIO_CLK G25 PROC_AUDIO_SDO_CPU PROC_AUDIO_CLK_CPU 17
B27 DDI3_AUXP PROC_AUDIO_SDI G29 PROC_AUDIO_SDI_CPU_R 1 2 PROC_AUDIO_SDO_CPU 17
PROC_AUDIO_SDI_CPU 17
DDI3_AUXN 4 OF 14 PROC_AUDIO_SDO
R3 20_0402_1%
SKYLAKE-H-CPU_BGA1440
PLACE NEAR CPU

B B

For EMC
1 2 1 2 PROC_AUDIO_CLK_CPU

@ C455 @ R638
10P_0402_50V8-J 33_0402_5%

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : DDI/EDP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 6 of 111
5 4 3 2 1
5 4 3 2 1

VCC3M VCC3B
U36 Supplier PN LCFC PN VCCST VCCSTG

2
R659 R774
100K_0402_5% 100K_0402_5%
TI SN74AUP1G07DCKR SA00007F700
@

2
1

1
R4 R5 R6 R7
VCC1R2A DDR_VTT_PG_CTRL NXP 74AUP1G07GW SA00007GU00 56_0402_5% 100_0402_5% 100_0402_5% 1K_0402_1%
DDR_VTT_PG_CTRL 99
@

1
1
VCC1R2A
Q55 C709 -SVID_ALERT
D 2 DTC115TMT2L_VMT3 1 2 D
@ SVID_CLK

3GND VCC 5
U36 0.1U_0402_16V7-K
1 SVID_DATA
3 NC
Y 4
DDR_PG_CTRL 2 -PROCHOT
A
SN74AUP1G07DCKR_SC-70
2

U1E SKYLAKE_HALO
R77
10K_0402_5% B31 BGA1440 BN25 CFG0
20 CPU_BCLK_100M A32 BCLKP CFG[0] BN27 CPU_CFG1 1
@ TP53 Test_Point_32MIL
20 -CPU_BCLK_100M BCLKN CFG[1] BN26 CFG2
1

D35 CFG[2] BN28 CFG3


20 CPU_PCI_BCLK_100M PCI_BCLKP CFG[3] CFG3 24
C36 BR20 CFG4
20 -CPU_PCI_BCLK_100M PCI_BCLKN CFG[4] BM20 CFG5
E31 CFG[5] BT20 CFG6
20 CPU_REFCLK_24M D31 CLK24P CFG[6] BP20 CFG7
20 -CPU_REFCLK_24M CLK24N CFG[7] BR23 CPU_CFG8 1 TP37 Test_Point_32MIL
CFG[8] BR22 CPU_CFG9 1 TP38 Test_Point_32MIL
CFG[9] BT23 CPU_CFG10 1 TP39 Test_Point_32MIL
CFG[10] BT22 CPU_CFG11 1 TP40 Test_Point_32MIL
CFG[11] BM19 CPU_CFG12 1 TP41 Test_Point_32MIL
CFG[12]

1
1

1
BR19 CPU_CFG13 1 TP42 Test_Point_32MIL
CFG[13] BP19 CPU_CFG14 1 TP43 Test_Point_32MIL R8 R9 R10 R11 R12 R13
-SVID_ALERT R14 1 2 220_0402_5% -SVID_ALERT_R BH31 CFG[14] BT19 CPU_CFG15 1 TP44 Test_Point_32MIL 1K_0402_1% 1K_0402_1% 1K_0402_1% 1K_0402_1% 1K_0402_1% 1K_0402_1%
102,91 -SVID_ALERT SVID_CLK 1 2 SVID_CLK_R BH32 VIDALERT# CFG[15]
102,91 SVID_CLK R772 0_0402_5% @ @ @ @ @
SVID_DATA R773 1 2 0_0402_5% SVID_DATA_R BH29 VIDSCK BN23 CPU_CFG17 1 TP45 Test_Point_32MIL

2
2

2
102,91 SVID_DATA 1 2 -PROCHOT_R BR30 VIDSOUT CFG[17] BP23 CPU_CFG16 1
-PROCHOT R15 499_0402_1% TP46 Test_Point_32MIL
102,76,91 -PROCHOT PROCHOT# CFG[16] BP22 CPU_CFG19 1 TP47 Test_Point_32MIL
DDR_PG_CTRL BT13 CFG[19] BN22 CPU_CFG18 1 TP48 Test_Point_32MIL
C DDR_VTT_CNTL CFG[18] C
BR27 IST_TRIG 1 TP49 Test_Point_32MIL
BPM#[0] BT27 CPU_BPM1 1 TP50 Test_Point_32MIL
BPM#[1] BM31 CPU_BPM2 1 TP51 Test_Point_32MIL
VCCST_PWRGD R586 2 1 60.4_0402_1% VCCST_PWRGD_R H13 BPM#[2] BT30 CPU_BPM3 1 TP52 Test_Point_32MIL
VCCST_PWRGD BPM#[3]
PROCPWRGD_CPU BT31
PROCPWRGD From PCH to CPU 17 PROCPWRGD_CPU
R16 1 2 0_0402_5% -PCH_PLTRST_PROC_R BP35 PROCPWRGD BT28
16 -PCH_PLTRST_PROC RESET# PROC_TDO XDP_TDO 24
RESET# From PCH to CPU BM34 BL32
16 PM_SYNC BP31 PM_SYNC PROC_TDI BP28 XDP_TDI 24
16 PM_DOWN PM_DOWN PROC_TMS XDP_TMS 24
BT34 BR28
16,76 PECI J31 PECI PROC_TCK XDP_TCK 24
16 -THERMTRIP THERMTRIP# BP30
BR33 PROC_TRST# BL30 -XDP_TRST 24
VCCST
BN1 SKTOCC# PROC_PREQ# BP27 -XDP_PREQ 24
Leave as NC PROC_SELECT# PROC_PRDY# -XDP_PRDY 24
@ R78
2 1 CPU_CATERR# BM30
CATERR# BT25 CFG_RCOMP
10K_0402_5% CFG_RCOMP

2
2

2
5 OF 14 DCI@
R17 R18 R297
SKYLAKE-H-CPU_BGA1440 49.9_0402_1% 51_0402_1% 51_0402_1%
@

1
1

1
VCCST If VCCSTG is used instead of VCC1R0_SUS,
VCC1R0_SUS
VCC3_SUS VCCST_PWRGD will be off in sleep S0 because
VCCSTG may be turned off when in sleep S0.
B Currently, VCCSTG is still on in sleep S0, B
but we may change logic to turn off VCCSTG in sleep S0.
(CT_20141216) TABLE CFG[19:0] pin has internal Pull up to VCCCPUIO with 5-8 k ohm.
2
2
2

@ R20 R1057
R19 10K_0402_5% 1K_0402_5%
10K_0402_5% CFG[0] : Stall reset sequence after CPU PLL lock until de-asserted:
1 : No Stall LOGIC
1
1
1

Q1_Q2_R19 VCCST_PWRGD
0 : Stall

CFG[2] : PEG Static Lane Reversal


1

D D 1 : Normal Operation LOGIC


CPUCORE_ON 2 Q1 2 Q2
101,102,103,84,91 CPUCORE_ON G LSK3541G1ET2L_VMT3 G LSK3541G1ET2L_VMT3 0 : Lane Reversal
S S
CFG[4] : eDP enable
3

1 : Disabled
0 : Enabled LOGIC
CFG[6:5] : PEG Bifurcation, bus#:dev#:func#=0:1:0
VCCST_PWRGD requirements (546884_SKL_H_PDG_Rev0_71) 11 : 1x16 LOGIC
1) Indication that the VCCST/VDDQ power supplies are stable and within specification. CFG[7] : PEG Training
(Table 41-1) 1 : PEG Train immediately following RESET# deassertion LOGIC
2) VCCST_PWRGD must go low during Sx pwr states, regardless of the voltage level of VCCST. 0 : PEG Wait for BIOS for training
A
(Figure 41-1 Note 1) CFG[19:8] : Reserved
A

3) VCCST_PWRGD should be equal or ealier than PCH_PWROK.


(Table 41-5, tCPU16. See also 543016_SKL_PDG_UY_1_0)
4) VCCST_PWRGD is typically made from ALL_SYS_PWRGD
(CPUCORE_ON/VR_ON for CPU DCDC), not PCH_PWROK (CPUCORE_PWRGD). Title
Security Classification LC Future Center Secret Data
(Figure 41-1)
Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : MISC/CLK/JTAG/CFG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 7 of 111


5 4 3 2 1
5 4 3 2 1

U1F SKYLAKE_HALO U1L SKYLAKE_HALO U1M SKYLAKE_HALO


D D
Y38 BGA1440 K1 C17 BGA1440 C25 BB4 BGA1440 AK30
Y37 VSS_1 VSS_78 J36 C13 VSS_154 VSS_239 C23 BB3 VSS_300 VSS_378 AK29
Y14 VSS_2 VSS_79 J33 C9 VSS_155 VSS_240 C21 BB2 VSS_301 VSS_379 AK4
Y13 VSS_3 VSS_80 J32 BT32 VSS_156 VSS_241 C19 BB1 VSS_302 VSS_380 AJ38
Y11 VSS_4 VSS_81 J25 BT26 VSS_157 VSS_242 C15 BA38 VSS_303 VSS_381 AJ37
Y10 VSS_5 VSS_82 J22 BT24 VSS_158 VSS_243 C11 BA37 VSS_304 VSS_382 AJ6
Y9 VSS_6 VSS_83 J18 BT21 VSS_159 VSS_244 C8 BA12 VSS_305 VSS_383 AJ5
Y8 VSS_7 VSS_84 J10 BT18 VSS_160 VSS_245 C5 BA11 VSS_306 VSS_384 AJ4
Y7 VSS_8 VSS_85 J7 BT14 VSS_161 VSS_246 BM29 BA10 VSS_307 VSS_385 AJ3
W34 VSS_9 VSS_86 J4 BT12 VSS_162 VSS_247 BM25 BA9 VSS_308 VSS_386 AJ2
W33 VSS_10 VSS_87 H35 BT9 VSS_163 VSS_248 BM18 BA8 VSS_309 VSS_387 AJ1
W12 VSS_11 VSS_88 H32 BT5 VSS_164 VSS_249 BM11 BA7 VSS_310 VSS_388 AH34
W5 VSS_12 VSS_89 H25 BR36 VSS_165 VSS_250 BM8 BA6 VSS_311 VSS_389 AH33
W4 VSS_13 VSS_90 H22 BR34 VSS_166 VSS_251 BM7 B9 VSS_312 VSS_390 AH12
W3 VSS_14 VSS_91 H18 BR29 VSS_167 VSS_252 BM5 AY34 VSS_313 VSS_391 AH6
W2 VSS_15 VSS_92 H12 BR26 VSS_168 VSS_253 BM3 AY33 VSS_314 VSS_392 AG30
W1 VSS_16 VSS_93 H11 BR24 VSS_169 VSS_254 BL38 AY14 VSS_315 VSS_393 AG29
V30 VSS_17 VSS_94 G28 BR21 VSS_170 VSS_255 BL35 AY12 VSS_316 VSS_394 AG11
V29 VSS_18 VSS_95 G26 BR18 VSS_171 VSS_256 BL13 AW30 VSS_317 VSS_395 AG10
V12 VSS_19 VSS_96 G24 BR14 VSS_172 VSS_257 BL6 AW29 VSS_318 VSS_396 AG8
V6 VSS_20 VSS_97 G23 BR12 VSS_173 VSS_258 BK25 AW12 VSS_319 VSS_397 AG7
U38 VSS_21 VSS_98 G22 BR7 VSS_174 VSS_259 BK22 AW5 VSS_320 VSS_398 AG6
U37 VSS_153 VSS_99 G20 BP34 VSS_175 VSS_260 BK13 AW4 VSS_321 VSS_399 AF14
U6 VSS_22 VSS_100 G18 BP33 VSS_176 VSS_261 BK6 AW3 VSS_322 VSS_400 AF13
T34 VSS_23 VSS_101 G16 BP29 VSS_177 VSS_262 BJ30 AW2 VSS_323 VSS_401 AF12
T33 VSS_24 VSS_102 G14 BP26 VSS_178 VSS_263 BJ29 AW1 VSS_324 VSS_402 AF4
T14 VSS_25 VSS_103 G12 BP24 VSS_179 VSS_264 BJ15 AV38 VSS_325 VSS_403 AF3
T13 VSS_26 VSS_104 G10 BP21 VSS_180 VSS_265 BJ12 AV37 VSS_326 VSS_404 AF2
T12 VSS_27 VSS_105 G9 BP18 VSS_181 VSS_266 BH11 AU34 VSS_327 VSS_405 AF1
T11 VSS_28 VSS_106 G8 BP14 VSS_182 VSS_267 BH10 AU33 VSS_328 VSS_406 AE34
T10 VSS_29 VSS_107 G6 BP12 VSS_183 VSS_268 BH7 AU12 VSS_329 VSS_407 AE33
C T9 VSS_30 VSS_108 G5 BP7 VSS_184 VSS_269 BH6 AU11 VSS_330 VSS_408 AE6 C
T8 VSS_31 VSS_109 G4 BN34 VSS_185 VSS_270 BH3 AU10 VSS_331 VSS_409 AD30
T7 VSS_32 VSS_110 F36 BN31 VSS_186 VSS_271 BH2 AU9 VSS_332 VSS_410 AD29
T5 VSS_33 VSS_111 F31 BN30 VSS_187 VSS_272 BG37 AU8 VSS_333 VSS_411 AD12
T4 VSS_34 VSS_112 F29 BN29 VSS_188 VSS_273 BG14 AU7 VSS_334 VSS_412 AD11
T3 VSS_35 VSS_113 F27 BN24 VSS_189 VSS_274 BG6 AU6 VSS_335 VSS_413 AD10
T2 VSS_36 VSS_114 F25 BN21 VSS_190 VSS_275 BF34 AT30 VSS_336 VSS_414 AD9
T1 VSS_37 VSS_115 F23 BN20 VSS_191 VSS_276 BF6 AT29 VSS_337 VSS_415 AD8
R30 VSS_38 VSS_116 F21 BN19 VSS_192 VSS_277 BE30 AT6 VSS_338 VSS_416 AD7
R29 VSS_39 VSS_117 F19 BN18 VSS_193 VSS_278 BE5 AR38 VSS_339 VSS_417 AD6
R12 VSS_40 VSS_118 F17 BN14 VSS_194 VSS_279 BE4 AR37 VSS_340 VSS_418 AC38
P38 VSS_41 VSS_119 F15 BN12 VSS_195 VSS_280 BE3 AR14 VSS_341 VSS_419 AC37
P37 VSS_42 VSS_120 F13 BN9 VSS_196 VSS_281 BE2 AR13 VSS_342 VSS_420 AC12
P12 VSS_43 VSS_121 F11 BN7 VSS_197 VSS_282 BE1 AR5 VSS_343 VSS_421 AC6
P6 VSS_44 VSS_122 F9 BN4 VSS_198 VSS_283 BD38 AR4 VSS_344 VSS_422 AC5
N34 VSS_45 VSS_123 F8 BN2 VSS_199 VSS_284 BD37 AR3 VSS_345 VSS_423 AC4
N33 VSS_46 VSS_124 F5 BM38 VSS_200 VSS_285 BD12 AR2 VSS_346 VSS_424 AC3
N12 VSS_47 VSS_125 F4 BM35 VSS_201 VSS_286 BD11 AR1 VSS_347 VSS_425 AC2
N11 VSS_48 VSS_126 F3 BM28 VSS_202 VSS_287 BD10 AP34 VSS_348 VSS_426 AC1
N10 VSS_49 VSS_127 F2 BM27 VSS_203 VSS_288 BD8 AP33 VSS_349 VSS_427 AB34
N9 VSS_50 VSS_128 E38 BM26 VSS_204 VSS_289 BD7 AP12 VSS_350 VSS_428 AB33
N8 VSS_51 VSS_129 E35 BM23 VSS_205 VSS_290 BD6 AP11 VSS_351 VSS_429 AB6
N7 VSS_52 VSS_130 E34 BM21 VSS_206 VSS_291 BC33 AP10 VSS_352 VSS_430 AA30
N6 VSS_53 VSS_131 E9 BM13 VSS_207 VSS_292 BC14 AP9 VSS_353 VSS_431 AA29
N5 VSS_54 VSS_132 E4 BM12 VSS_208 VSS_293 BC13 AP8 VSS_354 VSS_432 AA12
N4 VSS_55 VSS_133 D33 BM9 VSS_209 VSS_294 BC6 AN30 VSS_355 VSS_433 A30
N3 VSS_56 VSS_134 D30 BM6 VSS_210 VSS_295 BB30 AN29 VSS_356 VSS_434 A28
N2 VSS_57 VSS_135 D28 BM2 VSS_211 VSS_296 BB29 AN12 VSS_357 VSS_435 A26
N1 VSS_58 VSS_136 D26 BL29 VSS_212 VSS_297 BB6 AN6 VSS_358 VSS_436 A24
M14 VSS_59 VSS_137 D24 BK29 VSS_213 VSS_298 BB5 AN5 VSS_359 VSS_437 A22
M13 VSS_60 VSS_138 D22 BK15 VSS_214 VSS_299 AM38 VSS_360 VSS_438 A20
M12 VSS_61 VSS_139 D20 BK14 VSS_215 AM37 VSS_361 VSS_439 A18
B M6 VSS_62 VSS_140 D18 BJ32 VSS_216 AM12 VSS_362 VSS_440 A16 B
L34 VSS_63 VSS_141 D16 BJ31 VSS_217 AM5 VSS_363 VSS_441 A14
L33 VSS_64 VSS_142 D14 BJ25 VSS_218 AM4 VSS_364 VSS_442 A12
L30 VSS_65 VSS_143 D12 BJ22 VSS_219 AM3 VSS_365 VSS_443 A10
L29 VSS_66 VSS_144 D10 BH14 VSS_220 AM2 VSS_366 VSS_444 A9
K38 VSS_67 VSS_145 D9 BH12 VSS_221 C2 AM1 VSS_367 VSS_445 A6
K11 VSS_68 VSS_146 D6 BH9 VSS_222 NCTFVSS_2 BT36 CPU_NCTF_9 1 TP18 Test_Point_22MIL AL34 VSS_368 VSS_446
K10 VSS_69 VSS_147 D3 BH8 VSS_223 NCTFVSS_3 BT35 CPU_NCTF_10 1 TP19 Test_Point_22MIL AL33 VSS_369
K9 VSS_70 VSS_148 C37 BH5 VSS_224 NCTFVSS_4 BT4 AL14 VSS_370 B37 CPU_NCTF_2 1 TP25 Test_Point_22MIL
K8 VSS_71 VSS_149 C31 BH4 VSS_225 NCTFVSS_5 BT3 CPU_NCTF_7 1 TP23 Test_Point_22MIL AL12 VSS_371 NCTFVSS_8 B3
K7 VSS_72 VSS_150 C29 BH1 VSS_226 NCTFVSS_6 BR38 CPU_NCTF_8 1 TP24 Test_Point_22MIL AL10 VSS_372 NCTFVSS_9 A34 CPU_NCTF_3 1 TP26 Test_Point_22MIL
K5 VSS_73 VSS_151 C27 BG38 VSS_227 NCTFVSS_7 AL9 VSS_373 NCTFVSS_10 A4
K4 VSS_74 VSS_152 BG13 VSS_228 AL8 VSS_374 NCTFVSS_11 A3 CPU_NCTF_4 1 TP29 Test_Point_22MIL
K3 VSS_75 D38 CPU_NCTF_1 1 BG12 VSS_229 AL7 VSS_375 NCTFVSS_12
TP17 Test_Point_22MIL
K2 VSS_76 NCTFVSS_1 BF33 VSS_230 AL4 VSS_376
VSS_77 6 OF 14 BF12 VSS_231 VSS_377
BE29 VSS_232 13 OF 14
SKYLAKE-H-CPU_BGA1440 BE6 VSS_233
BD9 VSS_234 SKYLAKE-H-CPU_BGA1440
BC34 VSS_235
BC12 VSS_236
BB12 VSS_237
VSS_238 12 OF 14

SKYLAKE-H-CPU_BGA1440

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : GND


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 8 of 111
5 4 3 2 1
5 4 3 2 1

D D
VCCCPUCORE VCCCPUCORE

U1G SKYLAKE_HALO

BGA1440
AA13 V32
AA31 VCC_1 VCC_64 V33
AA32 VCC_2 VCC_65 V34
AA33 VCC_3 VCC_66 V35
AA34 VCC_4 VCC_67 V36
AA35 VCC_5 VCC_68 V37
AA36 VCC_6 VCC_69 V38
AA37 VCC_7 VCC_70 W13
AA38 VCC_8 VCC_71 W14
AB29 VCC_9 VCC_72 W29
AB30 VCC_10 VCC_73 W30
AB31 VCC_11 VCC_74 W31
AB32 VCC_12 VCC_75 W32
AB35 VCC_13 VCC_76 W35
AB36 VCC_14 VCC_77 W36
AB37 VCC_15 VCC_78 W37
AB38 VCC_16 VCC_79 W38
AC13 VCC_17 VCC_80 Y29
AC14 VCC_18 VCC_81 Y30
AC29 VCC_19 VCC_82 Y31
AC30 VCC_20 VCC_83 Y32
AC31 VCC_21 VCC_84 Y33
AC32 VCC_22 VCC_85 Y34
AC33 VCC_23 VCC_86 Y35
C AC34 VCC_24 VCC_87 Y36 C
AC35 VCC_25 VCC_88 L14
AC36 VCC_26 VCC_89 P29
AD13 VCC_27 VCC_90 P30
AD14 VCC_28 VCC_91 P31
AD31 VCC_29 VCC_92 P32
AD32 VCC_30 VCC_93 P33
AD33 VCC_31 VCC_94 P34
AD34 VCC_32 VCC_95 P35
AD35 VCC_33 VCC_96 P36
AD36 VCC_34 VCC_97 R13
AD37 VCC_35 VCC_98 R31
AD38 VCC_36 VCC_99 R32
AE13 VCC_37 VCC_100 R33
AE14 VCC_38 VCC_101 R34
AE30 VCC_39 VCC_102 R35
AE31 VCC_40 VCC_103 R36
AE32 VCC_41 VCC_104 R37
AE35 VCC_42 VCC_105 R38
AE36 VCC_43 VCC_106 T29
AE37 VCC_44 VCC_107 T30
AE38 VCC_45 VCC_108 T31
AF35 VCC_46 VCC_109 T32
AF36 VCC_47 VCC_110 T35
AF37 VCC_48 VCC_111 T36
AF38 VCC_49 VCC_112 T37
K13 VCC_50 VCC_113 T38 Near Processor pins
K14 VCC_51 VCC_114 U29
L13 VCC_52 VCC_115 U30
N13 VCC_53 VCC_116 U31 VCCCPUCORE
N14 VCC_54 VCC_117 U32
N30 VCC_55 VCC_118 U33
B N31 VCC_56 VCC_119 U34 B
N32 VCC_57 VCC_120 U35
N35 VCC_58 VCC_121 U36
VCC_59 VCC_122

1
N36 V13
N37 VCC_60 VCC_123 V14 R21
N38 VCC_61 VCC_124 V31 100_0402_1%
P13 VCC_62 VCC_125 P14
VCC_63 VCC_126

2
AG37 VCCCORE_SENSE_R R750 1 2 0_0402_5%
VCC_SENSE AG38 VSSCORE_SENSE_R R751 1 2 0_0402_5% VCCCORE_SENSE 91
VSS_SENSE VSSCORE_SENSE 91

7 OF 14

1
SKYLAKE-H-CPU_BGA1440 R22
100_0402_1%

2
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : VCC


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 9 of 111


5 4 3 2 1
5 4 3 2 1

VCCGFXCORE_I VCCGFXCORE_I
VCCGFXCORE_I

U1H SKYLAKE_HALO
D U1N SKYLAKE_HALO D
BG34 BGA1440 AV29
BG35 VCCGT_1 VCCGT_55 AV30 AJ29 BGA1440
BG36 VCCGT_2 VCCGT_56 AV31 AJ30 VCCGT_109
BH33 VCCGT_3 VCCGT_57 AV32 AJ31 VCCGT_110 AF29
BH34 VCCGT_4 VCCGT_58 AV33 AJ32 VCCGT_111 VCCGTX_1 AF30
BH35 VCCGT_5 VCCGT_59 AV34 AJ33 VCCGT_112 VCCGTX_2 AF31
BH36 VCCGT_6 VCCGT_60 AV35 AJ34 VCCGT_113 VCCGTX_3 AF32
BH37 VCCGT_7 VCCGT_61 AV36 AJ35 VCCGT_114 VCCGTX_4 AF33
BH38 VCCGT_8 VCCGT_62 AW14 AJ36 VCCGT_115 VCCGTX_5 AF34
BJ37 VCCGT_9 VCCGT_63 AW31 AK31 VCCGT_116 VCCGTX_6 AG13
VCCGT_10 VCCGT_64 VCCGT_117 VCCGTX_7
BJ38
BL36 VCCGT_11 VCCGT_65
AW32
AW33
AK32
AK33 VCCGT_118 VCCGTX_8
AG14
AG31
42: NC (NC by DCDC side)
BL37 VCCGT_12
VCCGT_13
VCCGT_66
VCCGT_67
AW34 AK34 VCCGT_119
VCCGT_120
VCCGTX_9
VCCGTX_10
AG32 44e: VCCGTX
BM36 AW35 AK35 AG33
BM37 VCCGT_14 VCCGT_68 AW36 AK36 VCCGT_121 VCCGTX_11 AG34
BN36 VCCGT_15 VCCGT_69 AW37 AK37 VCCGT_122 VCCGTX_12 AG35
BN37 VCCGT_16 VCCGT_70 AW38 AK38 VCCGT_123 VCCGTX_13 AG36
BN38 VCCGT_17 VCCGT_71 AY29 AL13 VCCGT_124 VCCGTX_14 AH13
BP37 VCCGT_18 VCCGT_72 AY30 AL29 VCCGT_125 VCCGTX_15 AH14
BP38 VCCGT_19 VCCGT_73 AY31 AL30 VCCGT_126 VCCGTX_16 AH29
BR37 VCCGT_20 VCCGT_74 AY32 AL31 VCCGT_127 VCCGTX_17 AH30
BT37 VCCGT_21 VCCGT_75 AY35 AL32 VCCGT_128 VCCGTX_18 AH31
BE38 VCCGT_22 VCCGT_76 AY36 AL35 VCCGT_129 VCCGTX_19 AH32
BF13 VCCGT_23 VCCGT_77 AY37 AL36 VCCGT_130 VCCGTX_20 AJ13
BF14 VCCGT_24 VCCGT_78 AY38 AL37 VCCGT_131 VCCGTX_21 AJ14
BF29 VCCGT_25 VCCGT_79 BA13 AL38 VCCGT_132 VCCGTX_22
BF30 VCCGT_26 VCCGT_80 BA14 AM13 VCCGT_133
BF31 VCCGT_27 VCCGT_81 BA29 AM14 VCCGT_134
BF32 VCCGT_28 VCCGT_82 BA30 AM29 VCCGT_135
BF35 VCCGT_29 VCCGT_83 BA31 AM30 VCCGT_136
BF36 VCCGT_30 VCCGT_84 BA32 AM31 VCCGT_137
C BF37 VCCGT_31 VCCGT_85 BA33 AM32 VCCGT_138 C
BF38 VCCGT_32 VCCGT_86 BA34 AM33 VCCGT_139
BG29 VCCGT_33 VCCGT_87 BA35 AM34 VCCGT_140
BG30 VCCGT_34 VCCGT_88 BA36 AM35 VCCGT_141
BG31 VCCGT_35 VCCGT_89 BB13 AM36 VCCGT_142
BG32 VCCGT_36 VCCGT_90 BB14 AN13 VCCGT_143
BG33 VCCGT_37 VCCGT_91 BB31 AN14 VCCGT_144
BC36 VCCGT_38 VCCGT_92 BB32 AN31 VCCGT_145
BC37 VCCGT_39 VCCGT_93 BB33 AN32 VCCGT_146
BC38 VCCGT_40 VCCGT_94 BB34 AN33 VCCGT_147
BD13 VCCGT_41 VCCGT_95 BB35 AN34 VCCGT_148
BD14 VCCGT_42 VCCGT_96 BB36 AN35 VCCGT_149
BD29 VCCGT_43 VCCGT_97 BB37 AN36 VCCGT_150
BD30 VCCGT_44 VCCGT_98 BB38 AN37 VCCGT_151
BD31 VCCGT_45 VCCGT_99 BC29 AN38 VCCGT_152
BD32 VCCGT_46 VCCGT_100 BC30 AP13 VCCGT_153
BD33 VCCGT_47 VCCGT_101 BC31 AP14 VCCGT_154 VCCGFXCORE_I
BD34 VCCGT_48 VCCGT_102 BC32 AP29 VCCGT_155
BD35 VCCGT_49 VCCGT_103 BC35 AP30 VCCGT_156
BD36 VCCGT_50 VCCGT_104 BE33 AP31 VCCGT_157
BE31 VCCGT_51 VCCGT_105 BE34 AP32 VCCGT_158
BE32 VCCGT_52 VCCGT_106 BE35 AP35 VCCGT_159
VCCGT_53 VCCGT_107 VCCGT_160

1
BE37 BE36 AP36
VCCGT_54 VCCGT_108 AP37 VCCGT_161 R23
8 OF 14 AP38 VCCGT_162 100_0402_1%
AR29 VCCGT_163
SKYLAKE-H-CPU_BGA1440 AR30 VCCGT_164

2
AR31 VCCGT_165
AR32 VCCGT_166
AR33 VCCGT_167 AH38 VCCGT_SENSE_R R752 1 2 0_0402_5%
AR34 VCCGT_168 VCCGT_SENSE AH35 VCCGT_SENSE 91
AR35 VCCGT_169 VSSGTX_SENSE AH37 VSSGT_SENSE_R R754 1 2 0_0402_5%
B AR36 VCCGT_170 VSSGT_SENSE AH36 VSSGT_SENSE 91 B
AT14 VCCGT_171 VCCGTX_SENSE
AT31 VCCGT_172
AT32 VCCGT_173
AT33 VCCGT_174
VCCGT_175

1
AT34
AT35 VCCGT_176 R24
AT36 VCCGT_177 100_0402_1%
AT37 VCCGT_178
AT38 VCCGT_179

2
AU14 VCCGT_180
AU29 VCCGT_181
AU30 VCCGT_182
AU31 VCCGT_183
AU32 VCCGT_184
AU35 VCCGT_185
AU36 VCCGT_186
AU37 VCCGT_187
AU38 VCCGT_188
VCCGT_189 14 OF 14

SKYLAKE-H-CPU_BGA1440

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : VCCGT/VCCGTX


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 10 of 111
5 4 3 2 1
5 4 3 2 1

VCC1R2A

D D

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
1 1 1 1

2
C763

C764

C765

C766
@ C761

@ C762
@ C759

@ C760
VCCSA VCC1R2A

1
2 2 2 2

@
U1I SKYLAKE_HALO

J30 BGA1440 AA6


K29 VCCSA_1 VDDQ_1 AE12 VCC1R2A
VCCSA_2 VDDQ_2 C759~C766 close to CPU Side
K30 AF5
K31 VCCSA_3 VDDQ_3 AF6
K32 VCCSA_4 VDDQ_4 AG5
K33 VCCSA_5 VDDQ_5 AG9
VCCSA_6 VDDQ_6

1U_0402_6.3V6-K

1U_0402_6.3V6-K
K34 AJ12
K35 VCCSA_7 VDDQ_7 AL11
L31 VCCSA_8 VDDQ_8 AP6
VCCSA_9 VDDQ_9

C122

C177
L32 AP7
L35 VCCSA_10 VDDQ_10 AR12
L36 VCCSA_11 VDDQ_11 AR6
VCCSA_12 VDDQ_12
VDDQC : Memory Control Clock Power
L37 AT12
L38 VCCSA_13 VDDQ_13 AW6
VCCSA_14 VDDQ_14
VCCPLL_OC : CPU digital PLL power rails
M29 AY6
M30 VCCSA_15 VDDQ_15 J5 VCC1R2A
M31 VCCSA_16 VDDQ_16 J6
M32 VCCSA_17 VDDQ_17 K12
M33 VCCSA_18 VDDQ_18 K6
VCCSA_19 VDDQ_19

10U_0603_6.3V6-M
C VCCCPUIO M34 L12 VCCST C
M35 VCCSA_20 VDDQ_20 L6
VCCSA_21 VDDQ_21 1
M36 R6
VCCSA_22 VDDQ_22

C252
T6 VCCSTG
VDDQ_23 W6
VDDQ_24 2

1U_0402_6.3V6-K
AG12
G15 VCCIO_1 Y12
G17 VCCIO_2 VDDQC
VCCIO_3
10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

C1
G19 BH13
G21 VCCIO_4 VCCPLL_OC_1 G11 VCCCPUIO VCCSA
1 1 1 VCCIO_5 VCCPLL_OC_2
H15
VCCIO_6
C289

C379

C380

1U_0402_6.3V6-K
H16
VCCIO_7

1U_0402_6.3V6-K
H17 H30
2 2 2 H19 VCCIO_8 VCCST
VCCIO_9

C2

@C3
H20 H29
VCCIO_10 VCCSTG_1

1
1
H21
H26 VCCIO_11 G30 R25 R26
H27 VCCIO_12 VCCSTG_2 100_0402_1% 100_0402_1%
J15 VCCIO_13 H28
J16 VCCIO_14 VCCPLL_1 J28

2
2
J17 VCCIO_15 VCCPLL_2
J19 VCCIO_16
J20 VCCIO_17 M38 VCCSA_SENSE_R R756 1 2 0_0402_5%
J21 VCCIO_18 VCCSA_SENSE M37 VSSSA_SENSE_R 1 2 0_0402_5% VCCSA_SENSE 91
R757
J26 VCCIO_19 VSSSA_SENSE VSSSA_SENSE 91
J27 VCCIO_20 H14
VCCIO_21 VCCIO_SENSE J14 VCCCPUIO_SENSE 95
VSSIO_SENSE VSSCPUIO_SENSE 95

VCCST

1
1
R27 R28
B 100_0402_1% 100_0402_1% B
9 OF 14

1U_0402_6.3V6-K

2
2
SKYLAKE-H-CPU_BGA1440

C4
Resistors close to CPU pins

A A

Security Classification LC Future Center Secret Data Title


CPU SKL-H : VCCSA/VCCIO/VDDQ
Issued Date 2015/07/16 Deciphered Date 2016/01/16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 11 of 111
5 4 3 2 1
5 4 3 2 1

D D
U1J SKYLAKE_HALO

BGA1440
BJ17
BJ19 VCCOPC_1
BJ20 VCCOPC_2
BK17 VCCOPC_3
BK19 VCCOPC_4
BK20 VCCOPC_5
BL16 VCCOPC_6
BL17 VCCOPC_7
BL18 VCCOPC_8
BL19 VCCOPC_9
BL20 VCCOPC_10
BL21 VCCOPC_11
BM17 VCCOPC_12
BN17 VCCOPC_13
VCCOPC_14
BJ23
BJ26 RSVD_1
BJ27 RSVD_2
BK23 RSVD_3
BK26 RSVD_4
BK27 RSVD_5
BL23 RSVD_6
BL24 RSVD_7
BL25 RSVD_8
BL26 RSVD_9
BL27 RSVD_10
BL28 RSVD_11
BM24 RSVD_12
C RSVD_13 C

BL15
BM16 VCCOPC_SENSE
VSSOPC_SENSE
BL22
BM22 RSVD_14
RSVD_15

BP15
BR15 VCCEOPIO_1
BT15 VCCEOPIO_2
VCCEOPIO_3
BP16
BR16 RSVD_16
BT16 RSVD_17
RSVD_18

BN15
BM15 VCCEOPIO_SENSE
VSSEOPIO_SENSE
BP17
BN16 RSVD_19
RSVD_20

BM14
BL14 VCC_OPC_1P8_1
VCC_OPC_1P8_2
BJ35
BJ36 RSVD_21
RSVD_22

B AT13 B
AW13 ZVM#
MSM#
AU13
AY13 ZVM2#
MSM2#
BT29
BR25 OPC_RCOMP
BP25 OPCE_RCOMP
OPCE_RCOMP2
10 OF 14

SKYLAKE-H-CPU_BGA1440

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : VCCOPC/RSVD


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 12 of 111
5 4 3 2 1
5 4 3 2 1

D D

U1K SKYLAKE_HALO

BGA1440
D1 BM33
E1 RSVD_TP_1 RSVD_TP_7 BL33
E3 RSVD_TP_2 RSVD_TP_8
E2 RSVD_TP_3 BJ14
RSVD_TP_4 RSVD_TP_9 BJ13
BR1 RSVD_TP_10
BT2 RSVD_TP_5 BK28
RSVD_TP_6 RSVD_43 BJ28
BN35 RSVD_44
RSVD_23 BJ18
J24 VSS_447
H24 RSVD_24 BJ16
C BN33 RSVD_25 RSVD_TP_11 BK16 C
BL34 RSVD_26 RSVD_TP_12
RSVD_27
N29 BK24
R14 RSVD_28 RSVD_TP_13 BJ24
AE29 RSVD_29 RSVD_TP_14
AA14 RSVD_30 BK21
RSVD_31 RSVD_45 BJ21
A36 RSVD_46
A37 RSVD_32 BT17
RSVD_33 RSVD_47 BR17
H23 RSVD_48
22 PCH_2_CPU_TRIGGER R590 2 1 30_0402_1% CPU_2_PCH_TRIGGER_R J23 PROC_TRIGIN BK18
22 CPU_2_PCH_TRIGGER PROC_TRIGOUT VSS_448
F30 BJ34
E30 RSVD_34 RSVD_TP_15 BJ33
RSVD_35 RSVD_TP_16
B30
C30 RSVD_36
RSVD_37 G13
G3 RSVD_49 AJ8
J3 RSVD_38 RSVD_50 BL31
RSVD_39 RSVD_51
B2
NCTF_1 B38
NCTF_2 BP1 CPU_NCTF_6 1 TP30 Test_Point_22MIL
BR35 NCTF_3 BR2
BR31 RSVD_40 NCTF_4 C1 CPU_NCTF_5 1 TP31 Test_Point_22MIL
BH30 RSVD_41 NCTF_5 C38
RSVD_42 11 OF 14 NCTF_6

SKYLAKE-H-CPU_BGA1440
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 CPU SKL-H : RSVD


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 13 of 111
5 4 3 2 1
5 4 3 2 1

NEAR-------------- FAR--------------
U32: Think Engine 2 U21: GbE
D75 2 1 RB521CM-30 U27: Embedded Controller U14: Thunderbolt Controller
32,46 TBT_SNK0_DPHPD
U29: TPM U23: SD Card Controller
U24: Express PWR SW J1: XDP
D76 2 1 RB521CM-30 MUX_DP_HPD
32,46 TBT_SNK1_DPHPD
D
J21: M.2 WLAN J17: M.2 SSD D

1
J30: LPC J18: M.2 SSD
R830
D77 2 1 RB521CM-30 100K_0402_5%
32,43 EXT_DP_HPD

2
VCC3M

R29 1 2 33_0402_5% -PLTRST_FAR 24,46,52,53,56,60,62


1 5
NC VCC
1
-PLTRST 2 C6
IN_A 100P_0402_50V8-J
3 4 -PLTRST_OUT
GND OUT_Y 2

U2
U3A SPT-H_PCH TC7SG17FE_SON5
R30 1 2 33_0402_5%
BD17 BB27 -PLTRST_NEAR 54,61,75,82,83,84
GPP_A11/PME# GPP_B13/PLTRST#
1
AG15 C5
AG14 RSVD_1 P43 100P_0402_50V8-J
AF17 RSVD_2 GPP_G16/GSXCLK R39
AE17 RSVD_3 GPP_G12/GSXDOUT R36 2
RSVD_4 GPP_G13/GSXSLOAD R42
AR19 GPP_G14/GSXDIN R41
C AN17 TP2 GPP_G15/GSXSRESET# C
TP1
BB29 AF41 SYSTEM_DISPLAY_HPD R105 1 2 0_0402_5% MUX_DP_HPD
26,82 SPI_MOSI_IO0 SPI0_MOSI GPP_E3/CPU_GP0
BE30 AE44
26,82 SPI_MISO_IO1 SPI0_MISO GPP_E7/CPU_GP1
BD31 BC23
26 -SPI_CS0 SPI0_CS0# GPP_B3/CPU_GP2
BC31 BD24
26,82 SPI_CLK SPI0_CLK GPP_B4/CPU_GP3
AW31
SPI0_CS1# BC36 -TAMPER_DET
CS0# for SPI ROM, CS2# for dTPM GPP_H18/SML4ALERT#
BC29 BE34 -EXC_PWR_SHDN 54
24,26 SPI_IO2 SPI0_IO2 GPP_H17/SML4DATA
BD30 BD39 R838 1 2 0_0402_5% -GPU_IS_3D_ACC_DEVICE 32
26 SPI_IO3 SPI0_IO3 GPP_H16/SML4CLK
AT31 BB36 R1001 1 2 0_0402_5%
82 -SPI_CS2 SPI0_CS2# GPP_H15/SML3ALERT# GC6_FB_EN 32
BA35 R1000 1 2 0_0402_5% -GPU_EVENT 32
DOCKID1 AN36 GPP_H14/SML3DATA BC35 1 2
74,77 DOCKID[3:0] GPP_D1/SPI1_CLK GPP_H13/SML3CLK
R785 0_0402_5% -DGFX_OUTPUT_ENABLE 41 to DP Bus Switch
DOCKID0 AL39 BD35
DOCKID3 AN41 GPP_D0/SPI1_CS# GPP_H12/SML2ALERT# AW35
from Docking Connector GPP_D3/SPI1_MOSI GPP_H11/SML2DATA Leave as NC
DOCKID2 AN38 BD34
AH43 GPP_D2/SPI1_MISO GPP_H10/SML2CLK
AG44 GPP_D22/SPI1_IO3 BE11 -INTRUDER
GPP_D21/SPI1_IO2 1 OF 12 INTRUDER#

SKYLAKE-H-PCH_FCBGA837

B B

RTCVCC

1
-TAMPER_DET
R31
1M_0402_5%
2

2
R1062
0_0402_5%
1

-TAMPER_DET_SW1 3 2 R32 1 2 0_0402_5% 1 2 -INTRUDER_EC 77 to EC


DOOR SWITCH -INTRUDER D1
RB520CM-30T2R_VMN2M2

CLOSE OPEN HIGH 4 1 2


SW1 C7
SPVR310100_4P 1000P_0402_50V7-K
OPEN CLOSE LOW (ACTIVE)
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : SPI


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 14 of 111
5 4 3 2 1
5 4 3 2 1

Flexible I/O Configuration (v0.51) USB2.0 Configuration (v0.51) PCIE Configuration (v0.51) USB3.0 Configuration (v0.51)
I/O High Speed Signals Configuration Net Name USB2 # Assignment OCx # PCIE # High Speed Signals GEN USB 3# High Speed Signals
Port 1 - 6 Please see Page 19 USB2 1 System Port 1 0 PCIE 1 Express slot 2 USB3 1 - 6 Please see Page 19
PCIE1_EXP_SLOT
Port 7 USB3 7 / PCIE 1 USB3 7 or PCIE 1 USB2 2 System Port 2 1 PCIE 2
D USB3 7 D
Port 8 USB3 8 / PCIE 2 USB3 8 USB2 3 WWAN PCIE 3 WLAN Card 2 USB3 8
PCIE3_WLAN_SLOT
Port 9 USB3 9 / PCIE 3 PCIE 3 USB2 4 DOCK PCIE 4 GBE USB3 9
PCIE4_GBE
Port 10 USB3 10 / PCIE 4 (GBE) GBE USB2 5 System Port 3 2 PCIE 5 Thunderbolt 1 3 USB3 10
PCIE5_L0_TBT
Port 11 PCIE 5 (GBE) PCIE 5 USB2 6 System Port 4 3 PCIE 6 Thunderbolt 2
PCIE5_L1_TBT
Port 12 PCIE 6 PCIE 6 USB2 7 Reserved PCIE 7 Thunderbolt 3
PCIE5_L2_TBT Camera
Port 13 PCIE 7 PCIE 7 USB2 8 PCIE 8 Thunderbolt 4
VCC3_SUS
PCIE5_L3_TBT
Port 14 PCIE 8 PCIE 8 USB2 9 Finger print PCIE 9 - 20 Please see Page 16
USB2 10 Touch panel
USB2 11 Smart Card
USB2 12 Express slot

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
USB2 13 Color Sensor
USB2 14 WLAN

2
R33 1

R34 1

R35 1

R36 1

R38 1

R39 1
C C

U3B SPT-H_PCH
DMI_RXN0 L27
5 DMI_RXN0 DMI_RXP0 N27 DMI_RXN0 AF5
5 DMI_RXP0 DMI_TXN0 C27 DMI_RXP0 USB2N_1 AG7 USBP1-_SYSP1 54
5 DMI_TXN0 DMI_TXP0 B27 DMI_TXN0 USB2P_1 AD5 USBP1+_SYSP1 54
5 DMI_TXP0 DMI_RXN1 E24 DMI_TXP0 USB2N_2 AD7 USBP2-_SYSP2 54
5 DMI_RXN1 DMI_RXP1 G24 DMI_RXN1 USB2P_2 AG8 USBP2+_SYSP2 54
5 DMI_RXP1 DMI_TXN1 B28 DMI_RXP1 USB2N_3 AG10 USBP3-_WWAN 61
5 DMI_TXN1 DMI_TXP1 A28 DMI_TXN1 USB2P_3 AE1 USBP3+_WWAN 61
5 DMI_TXP1 DMI_RXN2 G27 DMI_TXP1 USB2N_4 AE2 USBP4-_DOCK 74
DMI
5 DMI_RXN2 DMI_RXP2 E26 DMI_RXN2 USB2P_4 AC2 USBP4+_DOCK 74
5 DMI_RXP2 DMI_TXN2 B29 DMI_RXP2 USB2N_5 AC3 USBP5-_SYSP3 54
5 DMI_TXN2 DMI_TXP2 C29 DMI_TXN2 USB2P_5 AF2 USBP5+_SYSP3 54
5 DMI_TXP2 DMI_RXN3 L29 DMI_TXP2 USB2N_6 AF3 USBP6-_SYSP4 54
5 DMI_RXN3 DMI_RXP3 K29 DMI_RXN3 USB2P_6 AB3 USBP6+_SYSP4 54
5 DMI_RXP3 DMI_TXN3 B30 DMI_RXP3 USB2N_7 AB2
USB 2.0
5 DMI_TXN3 DMI_TXP3 A30 DMI_TXN3 USB2P_7 AL8
5 DMI_TXP3 DMI_TXP3 USB2N_8 AL7 USBP8-_CAMERA 40
PCIE_RCOMPN B18 USB2P_8 AA1 USBP8+_CAMERA 40
R40
2 1 PCIE_RCOMPP C17 PCIE_RCOMPN USB2N_9 AA2 USBP9-_FINGER_PRINT 54
PCIE_RCOMPP USB2P_9 AJ8 USBP9+_FINGER_PRINT 54
100_0402_1% USB2N_10 USBP10-_TOUCH 42
AJ7
H15 USB2P_10 W2 USBP10+_TOUCH 42
54 PCIE1_EXP_SLOT_RXN G15 PCIE1_RXN/USB3_7_RXN USB2N_11 W3 USBP11-_SMART_CARD 64
Express Card 54
54
PCIE1_EXP_SLOT_RXP
PCIE1_EXP_SLOT_TXN C8 1 2 0.1U_0402_10V7-K PCIE1_EXP_SLOT_TXN_C
PCIE1_EXP_SLOT_TXP_C
A16 PCIE1_RXP/USB3_7_RXP
PCIE1_TXN/USB3_7_TXN
USB2P_11
USB2N_12
AD3 USBP11+_SMART_CARD
USBP12-_EXP_SLOT 54
64
C9 1 2 0.1U_0402_10V7-K B16 AD2

PCIe/USB 3
54 PCIE1_EXP_SLOT_TXP PCIE1_TXP/USB3_7_TXP USB2P_12 USBP12+_EXP_SLOT 54
B19 V2
C19 PCIE2_TXN/USB3_8_TXN USB2N_13 V1 USBP13-_COLOR_SENSOR 40
B E17 PCIE2_TXP/USB3_8_TXP USB2P_13 AJ11 USBP13+_COLOR_SENSOR 40 B
G17 PCIE2_RXN/USB3_8_RXN USB2N_14 AJ13 USBP14-_WLAN 61
L17 PCIE2_RXP/USB3_8_RXP USB2P_14 USBP14+_WLAN 61
61 PCIE3_WLAN_SLOT_RXN K17 PCIE3_RXN/USB3_9_RXN
WLAN Card 61
61
PCIE3_WLAN_SLOT_RXP
PCIE3_WLAN_SLOT_TXN C10 1 2 0.1U_0402_25V6-K PCIE3_WLAN_SLOT_TXN_C
PCIE3_WLAN_SLOT_TXP_C
B20 PCIE3_RXP/USB3_9_RXP
PCIE3_TXN/USB3_9_TXN
C11 1 2 0.1U_0402_25V6-K C20 AD43
61 PCIE3_WLAN_SLOT_TXP PCIE3_TXP/USB3_9_TXP GPP_E9/USB2_OC0# -USB_PORT0_OC0 54
E20 AD42
56 PCIE4_GBE_RXN G19 PCIE4_RXN/USB3_10_RXN GPP_E10/USB2_OC1# AD39 -USB_PORT1_OC1 54
GbE 56
56
PCIE4_GBE_RXP
PCIE4_GBE_TXN C12 1 2 0.1U_0402_25V6-K PCIE4_GBE_TXN_C
PCIE4_GBE_TXP_C
B21 PCIE4_RXP/USB3_10_RXP
PCIE4_TXN/USB3_10_TXN
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
AC44 -USB_PORT2_OC2
-USB_PORT3_OC3
54
54
C13 1 2 0.1U_0402_25V6-K A21 Y43
56 PCIE4_GBE_TXP K19 PCIE4_TXP/USB3_10_TXP GPP_F15/USB2_OCB_4 Y41 PLANARID3 18
PLANARID2
46 PCIE5_L0_TBT_RXN L19 PCIE5_RXN GPP_F16/USB2_OCB_5 W44 PLANARID2 18
Thunderbolt 46
46
PCIE5_L0_TBT_RXP
PCIE5_L0_TBT_TXN C14 2 1 0.22U_0201_6.3V6-K PCIE5_L0_TBT_TXN_C
PCIE5_L0_TBT_TXP_C
D22 PCIE5_RXP
PCIE5_TXN
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
W43
C15 2 1 0.22U_0201_6.3V6-K C22
x 4 46
46
PCIE5_L0_TBT_TXP
PCIE5_L1_TBT_RXN
G22
E22
PCIE5_TXP
PCIE6_RXN AG3 USB2_COMP 1
R41
2
46 PCIE5_L1_TBT_RXP C16 2 1 0.22U_0201_6.3V6-K PCIE5_L1_TBT_TXN_C B22 PCIE6_RXP USB2_COMP AD10
46 PCIE5_L1_TBT_TXN 2 1 0.22U_0201_6.3V6-K PCIE5_L1_TBT_TXP_C A23 PCIE6_TXN USB2_VBUSSENSE AB13 113_0402_1%
C17
46 PCIE5_L1_TBT_TXP L22 PCIE6_TXP RSVD_AB13 AG2 Leave RSVD_AB13 NC
46 PCIE5_L2_TBT_RXN K22 PCIE7_RXN USB2_ID
46 PCIE5_L2_TBT_RXP C18 2 1 0.22U_0201_6.3V6-K PCIE5_L2_TBT_TXN_C C23 PCIE7_RXP
46 PCIE5_L2_TBT_TXN 2 1 0.22U_0201_6.3V6-K PCIE5_L2_TBT_TXP_C B23 PCIE7_TXN
C19
46 PCIE5_L2_TBT_TXP K24 PCIE7_TXP BD14
46 PCIE5_L3_TBT_RXN PCIE8_RXN GPD7/RSVD

2
L24
46 PCIE5_L3_TBT_RXP C20 2 1 0.22U_0201_6.3V6-K PCIE5_L3_TBT_TXN_C C24 PCIE8_RXP R845 R864
46 PCIE5_L3_TBT_TXN 2 1 0.22U_0201_6.3V6-K PCIE5_L3_TBT_TXP_C B24 PCIE8_TXN
C21 1K_0402_1% 1K_0402_5%
46 PCIE5_L3_TBT_TXP PCIE8_TXP 2 OF 12

1
SKYLAKE-H-PCH_FCBGA837

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : DMI/PCIE/USB


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 15 of 111
5 4 3 2 1
5 4 3 2 1

PCIE / SATA Configuration (v0.51)


VCC3_SUS I/O High Speed Signals Configuration GEN VCCST
Port 15 SATA 0A / PCIE 9 M.2 SSD1 (L0) / SATA0A 3/3 VCC3_SUS VCC3B
Port 16 SATA 1A / PCIE 10 M.2 SSD1 (L1)
Port 17 / PCIE 11 M.2 SSD1 (L2)
Port 18 / PCIE 12 M.2 SSD1 (L3)

R45
R43

R46
R47
Port 19 SATA 0B / PCIE 13 Media Card 2
R42
10K_0402_5% Port 20 SATA 1B / PCIE 14 Reserved ---

1
1

1
1

2
D @ D

Port 21 SATA 2 / PCIE 15 SATA HDD BAY 3 R768

2
10K_0402_5%
Port 22 SATA 3 / PCIE 16 SATA ODD BAY 3

10K_0402_5% 2
10K_0402_5% 2

10K_0402_5% 2
1K_0402_5% 2

1
Port 23 SATA 4 / PCIE 17 M.2 SSD2 (L0) / SATA4 3
Port 24 SATA 5 / PCIE 18 M.2 SSD2 (L1)
Port 25 / PCIE 19 M.2 SSD2 (L2)
Port 26 / PCIE 20 M.2 SSD2 (L3)

U3C SPT-H_PCH

AV2 G31
from / to WLAN
61 CL_CLK_WLAN AV3 CL_CLK PCIE9_RXN/SATA0A_RXN H31 PCIE9L0_SATA0A_MD2_SSD1_RXN
PCIE9L0_SATA0A_MD2_SSD1_RXP
60
60
M.2 SSD1
61 CL_DATA_WLAN CL_DATA CLINK PCIE9_RXP/SATA0A_RXP C31 PCIE9L0_SATA0A_MD2_SSD1_TXN_C 0.22U_0201_6.3V6-K 1
61 -CL_RST_WLAN
AW2
CL_RST# PCIE9_TXN/SATA0A_TXN B31 PCIE9L0_SATA0A_MD2_SSD1_TXP_C 0.22U_0201_6.3V6-K 1
2 C22
2 C23
PCIE9L0_SATA0A_MD2_SSD1_TXN 60 L0
PCIE9_TXP/SATA0A_TXP PCIE9L0_SATA0A_MD2_SSD1_TXP 60
R44
R43 GPP_G8/FAN_PWM_0
U39 GPP_G9/FAN_PWM_1 G29
N42 GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN E29 PCIE9L1_MD2_SSD1_RXN
PCIE9L1_MD2_SSD1_RXP
60
60
M.2 SSD1
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP PCIE9L1_MD2_SSD1_TXN_C
U43 FAN PCIE10_TXN/SATA1A_TXN
C32
B32 PCIE9L1_MD2_SSD1_TXP_C
0.22U_0201_6.3V6-K 1
0.22U_0201_6.3V6-K 1
2 C24
2 C25
PCIE9L1_MD2_SSD1_TXN 60 L1
GPP_G0/FAN_TACH_0 PCIE10_TXP/SATA1A_TXP PCIE9L1_MD2_SSD1_TXP 60
U42
U41 GPP_G1/FAN_TACH_1 F41
M44 GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN E41 SATA2_HDDBAY_RXN 65
U36 GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP B39 SATA2_TXN_C 0.01U_0201_6.3V7-K 1 2 C26
SATA2_HDDBAY_RXP
SATA2_HDDBAY_TXN
65
65
HDDBAY
P44 GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN A39 SATA2_TXP_C 0.01U_0201_6.3V7-K 1 2 C27
C GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP SATA2_HDDBAY_TXP 65 C
T45
T44 GPP_G6/FAN_TACH_6 D43
SATA3_ODDBAY_RXN 66

PCIe/SATA
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN E42
60 PCIE9L2_MD2_SSD1_TXP C28 1 2 0.22U_0201_6.3V6-K PCIE9L2_MD2_SSD1_TXP_C B33 PCIE16_RXP/SATA3_RXP A41 SATA3_TXN_C 0.01U_0201_6.3V7-K 1 2 C29
SATA3_ODDBAY_RXP
SATA3_ODDBAY_TXN
66
66
ODDBAY
C30 1 2 0.22U_0201_6.3V6-K PCIE9L2_MD2_SSD1_TXN_C C33 PCIE11_TXP PCIE16_TXN/SATA3_TXN A40 SATA3_TXP_C 0.01U_0201_6.3V7-K 1 2 C31
60 PCIE9L2_MD2_SSD1_TXN PCIE11_TXN PCIE16_TXP/SATA3_TXP SATA3_ODDBAY_TXP 66
K31
M.2 SSD1 L2 60 PCIE9L2_MD2_SSD1_RXP L31 PCIE11_RXP H42
60 PCIE9L2_MD2_SSD1_RXN PCIE11_RXN PCIE17_RXN/SATA4_RXN H40 PCIE17L0_SATA4_MD2_SSD2_RXN
PCIE17L0_SATA4_MD2_SSD2_RXP
60
60
M.2 SSD2
PCIE17_RXP/SATA4_RXP E45 PCIE17L0_SATA4_MD2_SSD2_TXN_C 0.22U_0201_6.3V6-K 1
61 WWAN_CFG2
AB33
AB35 GPP_F10/SCLOCK PCIE17_TXN/SATA4_TXN F45 PCIE17L0_SATA4_MD2_SSD2_TXP_C 0.22U_0201_6.3V6-K 1
2 C32
2 C33
PCIE17L0_SATA4_MD2_SSD2_TXN 60 L0
61 WWAN_CFG3 GPP_F11/SLOAD PCIE17_TXP/SATA4_TXP PCIE17L0_SATA4_MD2_SSD2_TXP 60
AA44
18 PLANARID1 AA45 GPP_F13/SDATAOUT0 K37
18 PLANARID0 GPP_F12/SDATAOUT1 PCIE18_RXN/SATA5_RXN G37 PCIE17L1_MD2_SSD2_RXN
PCIE17L1_MD2_SSD2_RXP
60
60
M.2 SSD2
PCIE18_RXP/SATA5_RXP PCIE17L1_MD2_SSD2_TXN_C
B38
C38 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN
G45
G44 PCIE17L1_MD2_SSD2_TXP_C
0.22U_0201_6.3V6-K 1
0.22U_0201_6.3V6-K 1
2 C34
2 C35
PCIE17L1_MD2_SSD2_TXN 60 L1
PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP PCIE17L1_MD2_SSD2_TXP 60
D39
E37 PCIE14_RXN/SATA1B_RXN AD44 -SATALED
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# AG36 -PCIE_DETECT_SSD1
2 1 0.1U_0402_10V7-K PCIE13_MEDIACARD_TXN_C C36 GPP_E0/SATAXPCIE0/SATAGP0 AG35 -PCIE_DETECT_SSD1 60
62 PCIE13_MEDIACARD_TXN C37
C36 2 1 0.1U_0402_10V7-K PCIE13_MEDIACARD_TXP_C B36 PCIE13_TXN/SATA0B_TXN GPP_E1/SATAXPCIE1/SATAGP1 AG39
Media Card 62
62
PCIE13_MEDIACARD_TXP
PCIE13_MEDIACARD_RXN
G35 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2 AD35 BAY_ADAPTER_DTCT_ANALOG_PCH 60
E35 PCIE13_RXN/SATA0B_RXN GPP_F0/SATAXPCIE3/SATAGP3 AD31 -PCIE_DETECT_SSD2
62 PCIE13_MEDIACARD_RXP PCIE13_RXP/SATA0B_RXP GPP_F1/SATAXPCIE4/SATAGP4 AD38 -PCIE_DETECT_SSD2 60
C38 1 2 0.22U_0201_6.3V6-K PCIE9L3_MD2_SSD1_TXP_C A35 GPP_F2/SATAXPCIE5/SATAGP5 AC43 -MIC_HW_EN
60 PCIE9L3_MD2_SSD1_TXP PCIE12_TXP GPP_F3/SATAXPCIE6/SATAGP6
C39 1 2 0.22U_0201_6.3V6-K PCIE9L3_MD2_SSD1_TXN_C B35 AB44
M.2 SSD1 L3 60
60
PCIE9L3_MD2_SSD1_TXN
PCIE9L3_MD2_SSD1_RXP
H33 PCIE12_TXN GPP_F4/SATAXPCIE7/SATAGP7 -WWAN_RESET 61
G33 PCIE12_RXP
60 PCIE9L3_MD2_SSD1_RXN PCIE12_RXN W36
2 0.22U_0201_6.3V6-K PCIE17L3_MD2_SSD2_TXP_C J45 GPP_F21/EDP_BKLTCTL PANEL_BKLT_CTRL_I 41
60 PCIE17L3_MD2_SSD2_TXP C40 1
PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN
W35
VGA_BLON_I 41 To eDP
C41 1 2 0.22U_0201_6.3V6-K PCIE17L3_MD2_SSD2_TXN_C K44 W42
M.2 SSD2 L3 60
60
PCIE17L3_MD2_SSD2_TXN
PCIE17L3_MD2_SSD2_RXP
N38 PCIE20_TXN/SATA7_TXN
HOST
GPP_F19/EDP_VDDEN R48
PANEL_POWER_ON_I 41
N39 PCIE20_RXP/SATA7_RXP AJ3 2 1 604_0402_1%
60 PCIE17L3_MD2_SSD2_RXN PCIE20_RXN/SATA7_RXN THERMTRIP# -THERMTRIP 7
B C42 1 2 0.22U_0201_6.3V6-K PCIE17L2_MD2_SSD2_TXP_C H44 AL3 B
60 PCIE17L2_MD2_SSD2_TXP PCIE19_TXP/SATA6_TXP PECI PECI 7,76
C43 1 2 0.22U_0201_6.3V6-K PCIE17L2_MD2_SSD2_TXN_C H43 AJ4 R49 2 1 30_0402_1%
M.2 SSD2 L2 60 PCIE17L2_MD2_SSD2_TXN
L39 PCIE19_TXN/SATA6_TXN PM_SYNC AK2 PM_SYNC 7
60 PCIE17L2_MD2_SSD2_RXP L37 PCIE19_RXP/SATA6_RXP PLTRST_PROC# AH2 2 1 20_0402_1% -PCH_PLTRST_PROC 7
60 PCIE17L2_MD2_SSD2_RXN 3 OF 12 R50
PCIE19_RXN/SATA6_RXN PM_DOWN PM_DOWN 7
SKYLAKE-H-PCH_FCBGA837

100K_0402_5%
10K_0402_5%

100K_0402_5%
10K_0402_5%
1

1
1
1

1
0_0402_5%
R51

R159
R52

R285
VCC3_SUS

R53
-PCIE_DETECT_SSD1 R850 1 2 10K_0402_5%

2
2
2

2
-PCIE_DETECT_SSD2 R851 1 2 10K_0402_5%
@ @
VCC3B

1
R818
100K_0402_5%

-SATALED_CONN 40

2
1

1
D D
-SATALED 2 Q59 2 Q60
60 -SATALED G G
LSK3541G1ET2L_VMT3 LSK3541G1ET2L_VMT3

S S

3
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : SATA/PCIE


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 16 of 111
5 4 3 2 1
5 4 3 2 1

TABLE : Functional Strap


GPP_C5/SML0ALERT# (LPC or eSPI)
TABLE : Functional Strap HIGH eSPI is selected
HDA_SDO LOW LPC is selected(Default) <------LOGIC
Flash Descriptor Security Override VCC3_SUS PLACE ON BOTTOM SIDE

HIGH Disable Flash Descriptor Security (Override)


R54 R55 @
D 1 2 1 2 D
LOW Enable Flash Descriptor Security (Default)
1K_0402_5% 0_0402_5%
TABLE : Functional Strap
HDA_SDO is used to update the Descriptor and/or the GPP_C2/SMBALERT# (TLS Confidentiality)
ME regions of the SPI after MFG Done bit is set.
HIGH Enable ME Crypto TLS with Confidentiality <------LOGIC
1 TP5 TP6 1 LOW Disable ME Crypto TLS (Default)
VCC3_SUS Test_Point_20MIL Test_Point_20MIL

TEST PAD
BOTTOM SIDE
DO NOT MOVE AFTER FIX

1K_0402_5%
EMC Part

R56
1 2

@ C44 U3D SPT-H_PCH


47P_0402_50V8-J

2
R57 1 2 33_0402_5% HDA_BCLK_R BA9 BB17
67 HDA_BCLK HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
R58 1 2 33_0402_5% -HDA_RST_R BD8 AW22 -CLKRUN
67 -HDA_RST HDA_RST# GPP_A8/CLKRUN# -CLKRUN 75,83 from LPC Device(EC)
HDA_SDIN0 BE7
67 HDA_SDIN0 BC8 HDA_SDI0 AR15
HDA_SDI1 GPD11/LANPHYPC LANPHYPC 56 to GBE
R59 1 2 33_0402_5% HDA_SDO_R BB7 AV13 to M.2 WLAN
67 HDA_SDO HDA_SDO GPD9/SLP_WLAN# -PCH_SLP_WLAN 76
R60 1 2 33_0402_5% HDA_SYNC_R BD9
67 HDA_SYNC HDA_SYNC BC14 -DRAMRST -DRAMRST 27,28,29,30 to DIMM/SMBU SW
BD1 DRAM_RESET# BD23
BE2 RSVD_BD1 GPP_B2/VRALERT# AL27 SKL-H PCH doesn't
Leave RSVD_BD1/BE2 NC RSVD_BE2 GPP_B1 AR27 require CORE VID
C PROC_AUDIO_SDO_CPU R61 2 1 30_0402_1% PROC_AUDIO_SDO_PCH AM1 AUDIO GPP_B0 N44 C
6 PROC_AUDIO_SDO_CPU PROC_AUDIO_SDI_CPU AN2 DISPA_SDO GPP_G17/ADR_COMPLETE AN24 to PHY PLL power FET
6 PROC_AUDIO_SDI_CPU PROC_AUDIO_CLK_CPU R62 2 1 30_0402_1% PROC_AUDIO_CLK_PCH AM2 DISPA_SDI GPP_B11 AY1 1 2 0_0402_5% from ASIC
6 PROC_AUDIO_CLK_CPU R63
DISPA_BCLK SYS_PWROK BPWRG 24,76,83,85
PLACE NEAR PCH AL42 BC13 -PCIE_WAKE from M.2 WLAN Slot
AN42 GPP_D8/I2S0_SCLK WAKE# BC15 -PCIE_WAKE 46,54,61,84
GPP_D7/I2S0_RXD GPD6/SLP_A# -PCH_SLP_M 84 to ASIC
AM43 AV15 -PCH_SLP_LAN
GPP_D6/I2S0_TXD SLP_LAN# -PCH_SLP_LAN 77 to ASIC
AJ33 BC26 -PCH_SLP_S0 104,95
AH44 GPP_D5/I2S0_SFRM GPP_B12/SLP_S0# AW15 to EC/FPR/ASIC/DebugPort
GPP_D20/DMIC_DATA0 GPD4/SLP_S3# -PCH_SLP_S3 46,76,84,95
AJ35 BD15 -PCH_SLP_S4 76,84 to EC/ASIC/DebugPort
AJ38 GPP_D19/DMIC_CLK0 GPD5/SLP_S4# BA13 to ASIC
GPP_D18/DMIC_DATA1 GPD10/SLP_S5# -PCH_SLP_S5 84
AJ42
GPP_D17/DMIC_CLK1 AN15 to EC/ASIC/WLAN
GPD8/SUSCLK SUSCLK_32K 61,75
BD13 from ASIC
GPD0/BATLOW# BB19 -SUSACK 1 2 0_0402_5% -BATLOW 46,77
R64
BC10 GPP_A15/SUSACK# BD19 -SUSWARN
25 -RTCRST BB10 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK
From RTC Reset circuits 25 -SRTCRST SRTCRST#
Pull-up on –LANWAKE is placed on GbE page
R65 1 2 0_0402_5% AW11 BD11 -LANWAKE from GBE
From CPU DCDC 102,24,91 CPUCORE_PWRGD BA11 PCH_PWROK GPD2/LAN_WAKE# BB15 -LANWAKE 56 from ASIC
24,76 -RSMRST RSMRST# GPD1/ACPRESENT BB13 AC_PRESENT 76 to EC
From ASIC SLP_SUS# -PCH_SLP_SUS 76
R66 1 2 0_0402_5% AV11 AT13 from EC
From ASIC 76,85 MPWRG -SMB_ALERT BB41 DSW_PWROK GPD3/PWRBTN# AW1 -PWRSW_EC 76 from XDP port
SMB_CLK AW44 GPP_C2/SMBALERT# SYS_RESET# BD26 -XDP_DBR 24 to Audio Mixer

SMBUS
83 SMB_CLK GPP_C0/SMBCLK GPP_B14/SPKR PCH_SPKR 72
From/to DIMM and TP SMB_DATA BB43 AM3 PROCPWRGD_PCH R72 1 2 0_0402_5%
83 SMB_DATA BA40 GPP_C1/SMBDATA PROCPWRGD PROCPWRGD_CPU 7
SML0_CLK AY44 GPP_C5/SML0ALERT# AT2 1 TP59 Test_Point_32MIL
56 SML0_CLK GPP_C3/SML0CLK ITP_PMODE
From/to GBE SML0_DATA BB39 AR3
56 SML0_DATA AT27 GPP_C4/SML0DATA JTAGX AR2 JTAGX 24
PCHHOT# JTAG
EC_SCL2 AW42 GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS AP1 PCH_TMS 24
76 EC_SCL2 GPP_C6/SML1CLK JTAG_TDO PCH_TDO 24
From/to EC EC_SDA2 AW45 AP2 to/from debug port
76 EC_SDA2 GPP_C7/SML1DATA JTAG_TDI AN3 PCH_TDI 24
B JTAG_TCK PCH_TCK 24 B
4 OF 12

SKYLAKE-H-PCH_FCBGA837
VCC3_SUS VCC1R0_SUS
VCC3_SUS

2
DCI@
R819 @ R820 @ R821 @ R822 TABLE : Functional Strap
2 1 PCHHOT# 51_0402_1% 51_0402_1% 51_0402_1%
GPP_B14/SPKR (Top Swap Override)
150K_0402_5%

1
HIGH Enable "Top Swap" Mode
499_0402_1%

499_0402_1%
4.7K_0402_5%

2.2K_0402_5%
4.7K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
2

1
2

1
2

To enable DCI function LOW Disable "Top Swap" Mode (Default by internal PD)
R559

R67

R70
R560

R68

R71
R69

VCC1R2A VCC3B VCC3M


1

2
1

2
1

SML0_CLK

8.2K_0402_5%

10K_0402_5%

10K_0402_5%
1

1
2

1
470_0402_5%
SML0_DATA

R74
R73

R75

R76
SMB_CLK
@

2
1

2
SMB_DATA

-SMB_ALERT

EC_SCL2
-PCIE_WAKE
EC_SDA2
A -PCH_SLP_LAN A

Pullups on SMB are located in SMBUS Switch page.


-CLKRUN

-DRAMRST

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : AUDIO/SMBUS/JTAG


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 17 of 111
5 4 3 2 1
5 4 3 2 1

D D

DDP[B:C]_CTRLCLK/DATA
PAYTON: NC
WALTER:
N16P QUADRO = NC
N16S GEFORCE = CONNECT FROM DISPLAYS
DDP[B:D]_HPD[0:2]
PAYTON: NC
VCC3B
WALTER: U3E SPT-H_PCH VCC3B
N16P QUADRO = NC
N16S GEFORCE = CONNECT FROM DISPLAYS
BB3
GPP_I7/DDPC_CTRLCLK

1
AW4 BD6 @ @
AY2 GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA BA5 R1016 R1017
AV4 GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK BC4 10K_0402_5% 10K_0402_5%
BA4 GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA BE5
GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK BE6 VCC3B

2
C GPP_I10/DDPD_CTRLDATA C
Y44
GPP_F14 V44 -SC_DTCT
GPP_F23 -GPU_RST_PCH_U -SC_DTCT 64 SmartCard
W39 1 5
BD7 GPP_F22 B VCC
41 EDP_HPD_I GPP_I4/EDP_HPD L43 2
GPP_G23 L44 A
GPP_G22 U35 MXM_ON_PCH 32 3 4
GPP_G21 R35 GND Y -GPU_RST_PCH 31
GPP_G20 BD36
GPP_H23 U38
14,24,46,52,53,60,62 -PLTRST_FAR
5 OF 12 74LVC1G08GW_SOT353-1-5

SKYLAKE-H-PCH_FCBGA837
GPP_H23
PAYTON: NC
WALTER: -DGFX_WITH_DISPLAYOUT(INPUT)
N16P QUADRO = LOW
N16S GEFORCE = HIGH

TABLE
PLANAR ID
3 2 1 0
R79 R37 R81 R82
B
1 NA NA NA NA B

0 ASM ASM ASM ASM

TABLE
PLANARID0
PLANARID1 PLANARID0 16
PLANARID2 PLANARID1 16 LEVEL PLANARID[3..0] CPU PCH
PLANARID2 15
PLANARID3
PLANARID3 15
4+2 SDV 0001b ES () ES ()

4+2 FVT 0010b ES () ES ()


1

1
@
R79 R37 R81 R82
0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 4+2 SIT 0011b QS () QS ()
2

2
4+2 SVT 0100b QS () QS ()

4+2 SOVP 0101b Prod Prod

Reserved 1000b

Reserved 1001b

A
Reserved 1010b A

Reserved 1011b

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : DDI CONTROL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 18 of 111
5 4 3 2 1
5 4 3 2 1

Flexible I/O Configuration (v0.51)


I/O High Speed Signals Configuration Net Name
USB3P1_SYSP1
D
Port 1 USB3 1 Capable of OTG USB3 D
USB3P2_SYSP2
Port 2 USB2 3 / SSIC 1 USB3

Port 3 USB3 3 / SSIC 2 USB3 or SSIC USB3P3_WWAN

USB3P4_DOCK
Port 4 USB3 4 USB3
Port 5 USB3 5 USB3 USB3P5_SYSP3

Port 6 USB3 6 USB3 USB3P6_SYSP4


VCC3_SUS VCC3B

8.2K_0402_5%
2

2
10K_0402_5%

R562
R83
1

1
U3F SPT-H_PCH

C11 AT22 LPC_AD0

LPC/eSPI
54 USB3P1_SYSP1_TXN B11 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 AV22 LPC_AD1 LPC_AD0 75,83
System Port 1 54 USB3P1_SYSP1_TXP B7 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 AT19 LPC_AD2 LPC_AD1 75,83
54 USB3P1_SYSP1_RXN A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 BD16 LPC_AD3 LPC_AD2 75,83
54 USB3P1_SYSP1_RXP B12 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 75,83
C 54 USB3P2_SYSP2_TXN A12 USB3_2_TXN/SSIC_1_TXN BE16 C
54 USB3P2_SYSP2_TXP C8 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# BA17 -LPC_FRAME 75,83
System Port 2 54 USB3P2_SYSP2_RXN B8 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# AW17 IRQSER 75,83
54 USB3P2_SYSP2_RXP USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# AT17 -TPM_IRQ 82
GPP_A0/RCIN#/ESPI_ALERT1# -KBRC 75
B15 BC18 -SUS_STAT 75,83
54 USB3P6_SYSP4_TXN C15 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET#
System Port 4 54 USB3P6_SYSP4_TXP K15 USB3_6_TXP
54 USB3P6_SYSP4_RXN USB3_6_RXN

USB
K13 BC17 R84 1 2 22_0402_5% LPCCLK_EC_24M 75
54 USB3P6_SYSP4_RXP USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 1 2 22_0402_5%
R85 LPCCLK_DEBUG_24M 83
B14 GPP_A10/CLKOUT_LPC1
54 USB3P5_SYSP3_TXN C14 USB3_5_TXN M45
System Port 3 54 USB3P5_SYSP3_TXP G13 USB3_5_TXP GPP_G19/SMI# N43
54 USB3P5_SYSP3_RXN H13 USB3_5_RXN GPP_G18/NMI#
54 USB3P5_SYSP3_RXP USB3_5_RXP
D13 AE45
C13 USB3_3_TXP/SSIC_2_TXP GPP_E6/DEVSLP2 AG43 -BAY_MEDIA_EJECT_PCH 66
A9 USB3_3_TXN/SSIC_2_TXN GPP_E5/DEVSLP1 AG42
USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 DEVSLP0_MD2_SSD1 60 SSD in M.2 Slot 1
B10 AB39
USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 AB36 WWAN_CFG1 61

SATA
B13 GPP_F8/DEVSLP6 AB43 WWAN_CFG0 61
74 USB3P4_DOCK_TXP A14 USB3_4_TXP GPP_F7/DEVSLP5 AB42 -INT_MIC_DTCT 40
DOCK 74 USB3P4_DOCK_TXN USB3_4_TXN GPP_F6/DEVSLP4 DEVSLP4_MD2_SSD2 60 SSD in M.2 Slot 2
G11 AB41
74 USB3P4_DOCK_RXP E11 USB3_4_RXP GPP_F5/DEVSLP3
6 OF 12
74 USB3P4_DOCK_RXN USB3_4_RXN
SKYLAKE-H-PCH_FCBGA837

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : USB3/LPC


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 19 of 111
5 4 3 2 1
5 4 3 2 1

D D

R86 Need change to 2.71K_0.5%

U3G SPT-H_PCH
AR17
GPP_A16/CLKOUT_48
7 CPU_REFCLK_24M G1 L1
F1 CLKOUT_CPUNSSC_P CLKOUT_ITPXDP L2
7 -CPU_REFCLK_24M CLKOUT_CPUNSSC CLKOUT_ITPXDP_P
7 CPU_BCLK_100M G2 J1 -CPU_PCI_BCLK_100M 7
H2 CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK J2
7 -CPU_BCLK_100M CLKOUT_CPUBCLK CLKOUT_CPUPCIBCLK_P CPU_PCI_BCLK_100M 7
VCC1R0_SUS XTAL24_OUT A5 N7
XTAL24_OUT CLKOUT_PCIE_N0 -PCIE0_CLK_100M_UHS2 62
XTAL24_IN A6 N8
XTAL24_IN CLKOUT_PCIE_P0 PCIE0_CLK_100M_UHS2 62
R86
1 2 XCLK_BIASREF E1 L7
XCLK_BIASREF CLKOUT_PCIE_N1 L5
2.7K_0402_0.5% RTCX1 BC9 CLKOUT_PCIE_P1
RTCX2 BD10 RTCX1 D3
RTCX2 CLKOUT_PCIE_N2 -PCIE2_CLK_100M_WLAN 61
F2
BC24 CLKOUT_PCIE_P2 PCIE2_CLK_100M_WLAN 61
62 -CLKREQ_PCIE0_UHS2 AW24 GPP_B5/SRCCLKREQ0# E5
GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3 -PCIE3_CLK_100M_GBE 56
AT24 G4
61 -CLKREQ_PCIE2_WLAN BD25 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 PCIE3_CLK_100M_GBE 56
C 56 -CLKREQ_PCIE3_GBE BB24 GPP_B8/SRCCLKREQ3# D5 C
60 -CLKREQ_PCIE4_MD2_SSD1 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 -PCIE4_CLK_100M_MD2_SSD1 60
BE25 E6
31 -CLKREQ_PEG AT33 GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4 PCIE4_CLK_100M_MD2_SSD1 60
54 -CLKREQ_PCIE6_EXPCARD AR31 GPP_H0/SRCCLKREQ6# D8
60 -CLKREQ_PCIE7_MD2_SSD2 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5 -PEG_CLK_100M 31
BD32 D7
46 -CLKREQ_PCIE8_TBT BC32 GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5 PEG_CLK_100M 31
BB31 GPP_H3/SRCCLKREQ9# R8
GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 -PCIE6_CLK_100M_EXPCARD 54
BC33 R7
R867 1 2 100K_0402_5% BA33 GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6 PCIE6_CLK_100M_EXPCARD 54
AW33 GPP_H6/SRCCLKREQ12# U5
GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7 -PCIE7_CLK_100M_MD2_SSD2 60
BB33 U7
BD33 GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7 PCIE7_CLK_100M_MD2_SSD2 60
GPP_H9/SRCCLKREQ15# W10
CLKOUT_PCIE_N8 -PCIE8_CLK_100M_TBT 46
R13 W11
R11 CLKOUT_PCIE_N15 CLKOUT_PCIE_P8 PCIE8_CLK_100M_TBT 46
CLKOUT_PCIE_P15 N3
External Pull on CLKREQ# should be placed in device page, P1 CLKOUT_PCIE_N9 N2
as power railis may be different from PCH-H.. R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
CLKOUT_PCIE_P14 P3
W7 CLKOUT_PCIE_N10 P2
Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10
CLKOUT_PCIE_P13 R3
U2 CLKOUT_PCIE_N11 R4
U3 CLKOUT_PCIE_N12 CLKOUT_PCIE_P11
CLKOUT_PCIE_P12 7 OF 12

SKYLAKE-H-PCH_FCBGA837
C46 1 2 6.8P_0402_50V8-D RTCX1
1
2

R87
B Y1 10M_0402_5% B
32.768KHZ_9PF_9H03280012
1

C47 1 2 6.8P_0402_50V8-D RTCX2

PCIE Clock Assignment


TXC 9H03280012 Clock 0 : UHS II
KDS 1TJF090DJ1A000B
Clock 1 : NA
Clock 2 : Wireless LAN M.2 Slot
C48 1 2 22P_0402_50V8-J XTAL24_OUT_R R1067 1 2 0_0201_5% XTAL24_OUT
Clock 3 : Giga Bit Ethernet
Clock 4 : PCIe SSD on M.2 Slot
Y2
Clock 5 : Discrete GFX(MXM or Onboard)
3

24MHZ_18PF_8Y24000033
4 2 R88
1M_0402_5% Clock 6 : Express Slot
Clock 7 : PCIe SSD on M.2 Slot
1

C49 1 2 27P_0402_50V8-J XTAL24_IN_R R1066 1 2 0_0201_5% XTAL24_IN Clock 8 : Thunderbolt


Clock 9 - 15 : NA
TXC 8Y24000033
KDS 1ZZHAE24000CC0F
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : CLK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 20 of 111
5 4 3 2 1
5 4 3 2 1

D D

1 1
C658 C659
0.1U_0402_16V7-K 0.1U_0402_16V7-K
2 2
NEAR
BA31
NEAR 0.746A
3.137A VCC1R0_SUS BA31 VCC3_SUS
1.0V
VCC1R0_SUS

U3H SPT-H_PCH 0.195A

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K
0.1U_0402_25V6-K
AA23 VCC3M

1U_0402_6.3V6-K
AA26 VCCPRIM_1P0_1 @ @ @ @
1 1 1 1 1 1
22U_0805_6.3V6-M

22U_0805_6.3V6-M
AA28 VCCPRIM_1P0_2 AL22

C53

C54

C55

C57

C58
C56
1U_0402_6.3V6-K
VCCPRIM_1P0_3 VCCPRIM_1P0_17

CORE
@ @ AC23
1@ 1 1 AC26 VCCPRIM_1P0_4 BA24
AC28 VCCPRIM_1P0_5 VCCDSW_3P3_2 BA31
0.007A 2 2 2 2 2 2

C52
C50

C51
VCCPRIM_1P0_6 VCCPGPPA

VCCGPIO
AE23
4.110A 2 2 2
NEAR AE26 VCCPRIM_1P0_7 BC42 VCC3B
K2 Y23 VCCPRIM_1P0_8 VCCPGPPBCH_1 BD40
1.0V Y25 VCCPRIM_1P0_9 VCCPGPPBCH_2 AJ41 NEAR NEAR NEAR NEAR
VCC1R0_SUS BA29 VCCPRIM_1P0_10 VCCPGPPEF_1 AL41 BC42 AJ41 AD41 AN5

1U_0402_6.3V6-K
DCPDSW_1P0 VCCPGPPEF_2 AD41
VCCPGPPG
NEAR
C 1 N17 AN5 C
VCCCLK1_1 VCCPRIM_3P3 BA20
R19

C59
U20 VCCCLK3_2 RTCVCC
V17 VCCCLK4_3 AD15
2 VCCCLK2_4 VCCPRIM_1P0_15
22U_0603_6.3V6M

10U_0603_6.3V6-M

1U_0402_6.3V6-K

R17 AD13
K2 VCCCLK2_5 VCCATS BA20
K3 VCCCLK5_6 VCCRTCPRIM_3P3 BA22
1 1 1 VCCCLK5_7 VCCRTC
NEAR BA26
DCPRTC
C758

C60

C61

BA29

0.1U_0402_25V6-K

0.1U_0402_25V6-K
U21 AJ20

1U_0402_6.3V6-K

1U_0402_6.3V6-K
2 2 2 VCCMPHY_1P0_1 VCCPRIM_1P0_11

MPHY
U23 AJ21
U25 VCCMPHY_1P0_2 VCCPRIM_1P0_12 AJ23
0.029A 1 1 1 1

C62

C63

C288

C514
U26 VCCMPHY_1P0_3 VCCPRIM_1P0_13 AJ25 VCC3_SUS
V26 VCCMPHY_1P0_4 VCCPRIM_1P0_14
NEAR PCH PKG VCCMPHY_1P0_5
VCCMPHYPLL_1P0 A43 2 2 2 2
B43 VCCMPHYPLL_1P0_1 BE41
C44 VCCMPHYPLL_1P0_2 VCCSPI_1 BE43
VCCPCIE3PLL_1P0_1 VCCSPI_2
NEAR
C45 BE42 AD13
VCCPCIE3PLL_1P0_2 VCCSPI_3 BC44
VCCAPLLEBB_1P0 V28 VCCPGPPD_1 BA45
VCCAPLLEBB_1P0 VCCPGPPD_2
NEAR

USB
AC17 BC45 BA26
VCCUSB2PLL_1P0 AJ5 VCCPRIM_1P0_16 VCCPGPPD_3 BB45
AL5 VCCUSB2PLL_1P0_1 VCCPGPPD_4
VCCUSB2PLL_1P0_2
NEAR
VCCHDAPLL_1P0 AN19 BD3 BA22
BA15 VCCHDAPLL_1P0 VCCPRIM_3P3_1 BE3
VCC3_SUS VCCHDA VCCPRIM_3P3_2
W15 BE4
VCCDSW_3P3_1 8 OF 12 VCCPRIM_3P3_3
VCC3M
SKYLAKE-H-PCH_FCBGA837

@ NEAR
B B
W15
1U_0402_6.3V6-K

1
C64

2
0.03A
0.11A 1.0V 0.012A 0.033A
1.0V VCC1R0_SUS VCC1R0_SUS VCC1R0_SUS
VCC1R0_SUS

R89 R90 R91 R92


1 2 VCCMPHYPLL_1P0 1 2 VCCAPLLEBB_1P0 1 2 VCCUSB2PLL_1P0 1 2 VCCHDAPLL_1P0

0_0603_5% 0_0603_5% 0_0603_5% 0_0603_5%


22U_0805_6.3V6-M

22U_0805_6.3V6-M
22U_0805_6.3V6-M

22U_0805_6.3V6-M
0.1U_0402_25V6-K
1U_0402_6.3V6-K

0.1U_0402_25V6-K
1@ 1@ 1 1 1@ @
C67

1 1@

C723
C66

C68
C65

C724
C69
2 2 2 2 2
2 2

NEAR PCH PIN

NEAR PCH PKG


NEAR PCH PKG
Note 1: Ampere in this page means Iccmax current described in SKL PCH H EDS r0.91 page 57.
A A
Note 2: Decoupling capacitors refers SKL H PDG r0.71 page 526.
SKL H RVP11 schematics r0.7 also referred.

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : POWER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom PAYTON 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 21 of 111
5 4 3 2 1
5 4 3 2 1

D D

U3I SPT-H_PCH U3L SPT-H_PCH U3J SPT-H_PCH

AC18 AR5 C42 AB11


AN4 VSS_1 VSS_75 AR7 D10 VSS_149 VSS_217 AB7 1 PCH_NCTF_1 BD2 AR22
VSS_2 VSS_76 VSS_150 VSS_218 Test_Point_22MIL TP86 PCH_NCTF_3 VSS_286 RSVD_7
AN10 U15 D12 AB14 1 BD45 W13
VSS_3 VSS_77 VSS_151 VSS_219 Test_Point_22MIL TP84 VSS_287 RSVD_8
BE14 AL4 D15 AB31 BD44 U13
BE18 VSS_4 VSS_78 AE29 D16 VSS_152 VSS_220 AB32 1 PCH_NCTF_4 BE44 VSS_288 RSVD_9 P31
VSS_5 VSS_79 VSS_153 VSS_221 Test_Point_22MIL TP85 VSS_289 RSVD_10
BE23 AE4 D17 AB38 D45 N31
BE28 VSS_6 VSS_80 AE42 D19 VSS_154 VSS_222 AB4 A42 VSS_290 RSVD_11
VSS_7 VSS_81 VSS_155 VSS_223 VSS_291
Leave as NC
BE32 AF18 D21 AB5 1 PCH_NCTF_5 B45 P27
VSS_8 VSS_82 VSS_156 VSS_224 Test_Point_22MIL TP80 VSS_292 RSVD_12
BE37 AF20 D24 AC1 B44 R27
BE40 VSS_9 VSS_83 AF21 D25 VSS_157 VSS_225 AC20 A4 VSS_293 RSVD_13 N29
BE9 VSS_10 VSS_84 AF23 D27 VSS_158 VSS_226 AC21 A3 VSS_294 RSVD_14 P29
C10 VSS_11 VSS_85 AF25 D29 VSS_159 VSS_227 AC25 B2 VSS_295 RSVD_15 AN29
C2 VSS_12 VSS_86 AF26 D30 VSS_160 VSS_228 AC29 1 PCH_NCTF_7 A2 VSS_296 RSVD_16 R24
VSS_13 VSS_87 VSS_161 VSS_229 Test_Point_22MIL TP82 PCH_NCTF_8 VSS_297 RSVD_17
C28 AF28 D31 AC45 1 B1 P24
VSS_14 VSS_88 VSS_162 VSS_230 Test_Point_22MIL TP83 VSS_298 RSVD_18
C37 AF29 D33 AB8 BB1
J7 VSS_15 VSS_89 AG11 D35 VSS_163 VSS_231 AD11 1 PCH_NCTF_2 BC1 VSS_299 AT3
VSS_16 VSS_90 VSS_164 VSS_232 Test_Point_22MIL TP87 PCH_NCTF_6 VSS_300 PREQ# -PCH_PREQ 24
K10 AG13 D36 AD14 1 A44 AT4
VSS_17 VSS_91 VSS_165 VSS_233 Test_Point_22MIL TP81 VSS_301 PRDY# -PCH_PRDY 24
K27 AG31 E13 AB15 AY5
K33 VSS_18 VSS_92 AG32 E15 VSS_166 VSS_234 AD32 C1 CPU_TRST# AL2 PCH_2_CPU_TRIGGER_R R656 2 1 30_0402_1% -CPU_TRST 24
K36 VSS_19 VSS_93 AG33 E31 VSS_167 VSS_235 AD33 D1 RSVD_5 PCH_TRIGOUT AK1 PCH_2_CPU_TRIGGER 13
K4 VSS_20 VSS_94 AG38 E33 VSS_168 VSS_236 AD36 RSVD_6 PCH_TRIGIN CPU_2_PCH_TRIGGER 13
K42 VSS_21 VSS_95 AG4 F44 VSS_169 VSS_237 AD4 10 OF 12
K43 VSS_22 VSS_96 AH1 F8 VSS_170 VSS_238 AD8
L12 VSS_23 VSS_97 AH17 G42 VSS_171 VSS_239 AE18 SKYLAKE-H-PCH_FCBGA837
C L13 VSS_24 VSS_98 AH18 G9 VSS_172 VSS_240 AE20 C
L15 VSS_25 VSS_99 AH20 H17 VSS_173 VSS_241 AE21
L4 VSS_26 VSS_100 AH21 H19 VSS_174 VSS_242 AE25
L41 VSS_27 VSS_101 AH23 H22 VSS_175 VSS_243 AE28
L8 VSS_28 VSS_102 AH25 H24 VSS_176 VSS_244 AL10
M35 VSS_29 VSS_103 AH26 H27 VSS_177 VSS_245 AL11
M42 VSS_30 VSS_104 AH28 H29 VSS_178 VSS_246 AL13
N10 VSS_31 VSS_105 AH29 H3 VSS_179 VSS_247 AL17
N15 VSS_32 VSS_106 AH45 H35 VSS_180 VSS_248 AL19
N19 VSS_33 VSS_107 AJ10 J10 VSS_181 VSS_249 AL24
N22 VSS_34 VSS_108 AJ14 J11 VSS_182 VSS_250 AL29
N24 VSS_35 VSS_109 AJ15 J3 VSS_183 VSS_251 AL32
N35 VSS_36 VSS_110 AJ17 J39 VSS_184 VSS_252 AL33
N36 VSS_37 VSS_111 AJ18 J5 VSS_185 VSS_253 AL38
N4 VSS_38 VSS_112 AJ26 T42 VSS_186 VSS_254 AM15
N41 VSS_39 VSS_113 AJ28 U10 VSS_187 VSS_255 AM17
N5 VSS_40 VSS_114 AJ29 U11 VSS_188 VSS_256 AM19
P17 VSS_41 VSS_115 AJ31 U14 VSS_189 VSS_257 AM22
P19 VSS_42 VSS_116 AJ32 U17 VSS_190 VSS_258 AM24
P22 VSS_43 VSS_117 AJ36 U18 VSS_191 VSS_259 AM27
P45 VSS_44 VSS_118 AK4 U28 VSS_192 VSS_260 AM29
R10 VSS_45 VSS_119 AK42 U29 VSS_193 VSS_261 AM45
R14 VSS_46 VSS_120 AU7 U31 VSS_194 VSS_262 AN11
R22 VSS_47 VSS_121 AV17 U32 VSS_195 VSS_263 AN22
R29 VSS_48 VSS_122 AV24 U33 VSS_196 VSS_264 AN27
R33 VSS_49 VSS_123 AV27 U38 VSS_197 VSS_265 AN31
R38 VSS_50 VSS_124 AV31 U4 VSS_198 VSS_266 AN39
R5 VSS_51 VSS_125 AV33 U8 VSS_199 VSS_267 AN7
T1 VSS_52 VSS_126 AV6 V18 VSS_200 VSS_268 AN8
T2 VSS_53 VSS_127 AW13 V20 VSS_201 VSS_269 AP11
T4 VSS_54 VSS_128 AW19 V21 VSS_202 VSS_270 AP4
Y18 VSS_55 VSS_129 AW29 V23 VSS_203 VSS_271 AR33
B Y20 VSS_56 VSS_130 AW37 V25 VSS_204 VSS_272 AR34 B
Y21 VSS_57 VSS_131 AW9 V29 VSS_205 VSS_273 AR42
Y26 VSS_58 VSS_132 AY38 V3 VSS_206 VSS_274 AR9
Y28 VSS_59 VSS_133 AY45 V45 VSS_207 VSS_275 AT10
Y29 VSS_60 VSS_134 B25 W14 VSS_208 VSS_276 AT15
A18 VSS_61 VSS_135 B3 W31 VSS_209 VSS_277 AT36
A25 VSS_62 VSS_136 B37 W32 VSS_210 VSS_278 AT9
A32 VSS_63 VSS_137 B40 W33 VSS_211 VSS_279 AU1
A37 VSS_64 VSS_138 B6 W38 VSS_212 VSS_280 AU35
AA17 VSS_65 VSS_139 BA1 W4 VSS_213 VSS_281 AU36
AA18 VSS_66 VSS_140 BB11 W8 VSS_214 VSS_282 AU39
AA20 VSS_67 VSS_141 BB16 Y17 VSS_215 VSS_283 AU45
AA21 VSS_68 VSS_142 BB21 VSS_216 VSS_284 C4
AA25 VSS_69 VSS_143 BB25 VSS_285
AA29 VSS_70 VSS_144 BB30
AA4 VSS_71 VSS_145 BB34
AA42 VSS_72 VSS_146 BC2 12 OF 12
AB10 VSS_73 VSS_147 BD43
VSS_74 VSS_148 SKYLAKE-H-PCH_FCBGA837
9 OF 12
SKYLAKE-H-PCH_FCBGA837

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : GND/RSVD


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 22 of 111
5 4 3 2 1
5 4 3 2 1

D D

PAYTON WALTER

GPP_D9 -MXM_PRESENCE -DISCRETE_PRESENCE

U3K SPT-H_PCH
AT29
AR29 GPP_B22/GSPI1_MOSI AL44
AV29 GPP_B21/GSPI1_MISO GPP_D9 AL36 -MXM_PRESENCE 31
GPP_B20/GSPI1_CLK GPP_D10 DGFX_PWRGD 23,32,46 From MXM
BC27 AL35
GPP_B19/GSPI1_CS# GPP_D11 AJ39
GPP_B18_NO_REBOOT BD28 GPP_D12
24 GPP_B18_NO_REBOOT BD27 GPP_B18/GSPI0_MOSI AJ43
AW27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL AK45

VCC3B
Leave as NC AV44
GPP_C9/UART0_TXD
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA Leave as NC
BA41
AU44 GPP_C8/UART0_RXD
AV43 GPP_C11/UART0_CTS#
R1063 1 @ 2 0_0201_5% GPP_C10/UART0_RTS#
AU41 BC38
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38
Test_Point_22MIL TP88 1 ISH_UART1_TXD AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA
1 ISH_UART1_RXD AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38
C
Test_Point_22MIL TP89
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL TBT_FORCE_ON 46 TBT From / to TBT C
BE39 TBT
AN43 GPP_H21/ISH_I2C1_SDA -CIO_PLUG_EVENT 46
75 -EC_WAKE AN44 GPP_C23/UART2_CTS#
From EC 75 -EC_SCI GPP_C22/UART2_RTS#
AR39
AR45 GPP_C21/UART2_TXD BC22
GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18
AR41 GPP_A22/ISH_GP4 BE21
AR44 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BD22
Leave as NC AR38 GPP_C18/I2C1_SDA
GPP_C17/I2C0_SCL
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
BD21 Leave as NC
AT42 BB22
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19
AM44 GPP_A17/ISH_GP7
AJ44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL 11 OF 12

SKYLAKE-H-PCH_FCBGA837

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 PCH SKL-H : GSPI/UART/I2C


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 23 of 111
5 4 3 2 1
5 4 3 2 1

Enalbe DCI Mode - Short Pad


@ JDCI1 SHORT PADS
JTAGX 1 2 XDP_TCK
17 JTAGX
@ JDCI2 SHORT PADS
PCH_TMS 1 2 XDP_TMS 14,26 SPI_IO2
17 PCH_TMS

1
@ JDCI3 SHORT PADS
PCH_TDI 1 2 XDP_TDI @ R597
17 PCH_TDI
1K_0402_1%
@ JDCI4 SHORT PADS
-CPU_TRST 1 2 -XDP_TRST

2
22 -CPU_TRST
D @ JDCI5 SHORT PADS D
PCH_TDO 1 2 XDP_TDO
17 PCH_TDO
@ JDCI6 SHORT PADS VCC1R0_SUS
-PCH_PRDY 1 2 -XDP_PRDY
22 -PCH_PRDY
@ JDCI7 SHORT PADS
-PCH_PREQ 1 2 -XDP_PREQ
22 -PCH_PREQ
VCC1R0_SUS

VCC1R0_SUS
VCC3B VCCST VCC1R0_SUS

2
2@ @ R93
C70 51_0402_1%
0.1U_0402_25V6-K

2
R96 DCI@

1
R96 R97 1
for Debug use 2.2KΩ 2.2K_0402_5% 51_0402_1% JXDP2
without debug use 10KΩ 17 PCH_TCK
PCH_TCK 26
26
25 28

1
24 25 GND_2 27
JXDP1 PCH_TMS 23 24 GND_1
XDP_TCK 26 PCH_TDI 22 23
7 XDP_TCK 25 26 28 21 22
24 25 GND_2 27 PCH_TDO 20 21
XDP_TMS 23 24 GND_1 19 20
C 7 XDP_TMS XDP_TDI 22 23 -XDP_DBR 18 19 C
7 XDP_TDI -XDP_TRST 21 22 2 1 17 18
@
7 -XDP_TRST XDP_TDO 20 21 102,17,91 CPUCORE_PWRGD 16 17
7 XDP_TDO R98 1K_0402_5%
19 20 15 16
-XDP_DBR 18 19 14 15
17 -XDP_DBR -PLTRST_FAR 2 1 17 18 13 14
@
14,46,52,53,56,60,62 -PLTRST_FAR 16 17 12 13
R99 1K_0402_5%
15 16 11 12
14 15 -RSMRST 2 @ 1 10 11
BPWRG 13 14 17,24,76 -RSMRST 9 10
R100 1K_0402_5%
17,76,83,85 BPWRG 12 13 8 9
11 12 7 8
-RSMRST 2 @ 1 10 11 6 7
17,24,76 -RSMRST 9 10 5 6
R101 1K_0402_5%
8 9 4 5
7 CFG3 7 8 3 4
6 7 2 3
5 6 1 2
4 5 1
3 4 MOLEX_52435-2671
-XDP_PRDY 2 3 @
7 -XDP_PRDY -XDP_PREQ 1 2
7 -XDP_PREQ 1
MOLEX_52435-2671
1

@
@ R102
1K_0402_1%
2

B B
Individual DCI 2.0
No use Port w/o connector
Individual DCI 2.0
No use Port w/o connector
R97 NO ASM ASM ASM
TABLE : Functional Strap
J1 NO ASM ASM NO ASM
R591 NO ASM NO ASM ASM GPP_B18/GSPI0_MOSI (No Reboot) R563
C70 NO ASM ASM NO ASM
R593 NO ASM NO ASM ASM HIGH Enable "No Reboot" Mode ASM
R96 ASM ASM ASM LOGIC
R594 NO ASM NO ASM ASM LOW Disable "No Reboot" Mode (Default ) NO ASM
R101 NO ASM ASM NO ASM
R595 NO ASM NO ASM ASM
R596 NO ASM NO ASM ASM
VCC3_SUS
R657 NO ASM NO ASM ASM
R658 NO ASM NO ASM ASM R93 NO ASM ASM NO ASM
J2 NO ASM ASM NO ASM
R102 NO ASM ASM NO ASM

1
R98 NO ASM ASM NO ASM @ R563
R597 NO ASM ASM NO ASM 1K_0402_5% Place near PCH
R100 NO ASM ASM NO ASM
R18 NO ASM ASM ASM

2
SHEET 7
A R297 NO ASM ASM NO ASM GPP_B18_NO_REBOOT A
GPP_B18_NO_REBOOT 23

LOGIC
LOGIC

Security Classification LC Future Center Secret Data Title

R820 NO ASM ASM NO ASM Issued Date 2015/07/16 Deciphered Date 2016/01/16 XDP CONNECTOR
SHEET 17 R821 NO ASM ASM NO ASM THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

WWW.AliSaler.Com
Custom PAYTON 0.1
R822 NO ASM ASM NO ASM DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 24 of 111
5 4 3 2 1
5 4 3 2 1

VCC3SW

1
R827
2.2K_0402_5%
D D

2
RTCVCC_Must_Less_than_3p2V RTCVCC must be less than 3.2V from SKL.
RTCVCC

1
R828
33K_0402_5%

2
D2

2
RB520CM-30T2R_VMN2M2

1
D3
RDRD 2 1

RB520CM-30T2R_VMN2M2

1
C71
1U_0402_6.3V6-K
2

2
R107
1K_0402_5%
C C

1
JRTC1

1 R108
1 2 1 2 -RTCRST
2 -RTCRST 17
3 20K_0402_5%
GND1 4
GND2

HIGHS_WS32021-S0471-HF 1

2
ME@ C72 JCMOS
1U_0402_6.3V6-K SHORT PADS
@

1
2

R109
1 2 -SRTCRST
-SRTCRST 17
20K_0402_5%

2
B C73 JME B
1U_0402_6.3V6-K SHORT PADS
@

1
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 RTC BATTERY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 25 of 111
5 4 3 2 1
5 4 3 2 1

R110 R598 U5 R592 R358

PRE ES1 NO ASM ASM QE="1" ASM ASM


D ES1/ ES2 D

QE=Don't
AFTER QS ASM NO ASM NO ASM NO ASM LOGIC
Care

VCC3_SUS VCC3_SUS_SPI

2
D4
RB520CM-30T2R_VMN2M2

1
VCC3_SUS_SPI

1
2 2

1
R592 R111 R358
1K_0402_1% C74 C75 R110 1K_0402_1% 1K_0402_1%
@ 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 1K_0402_1% @
2 1 1

2
2
C C

U5
8 1 -SPI_CS0_R R112 1 2 0_0402_5% -SPI_CS0
VCC CS# -SPI_CS0 14
SPI_IO3 R113 1 2 15_0402_5% SPI_IO3_R 7 2 SPI_MISO_IO1_R R114 1 2 15_0402_5% SPI_MISO_IO1
14 SPI_IO3 HOLD# DO SPI_MISO_IO1 14,82
SPI_CLK R115 1 2 15_0402_5% SPI_CLK_R 6 3 SPI_IO2_R R116 1 2 15_0402_5% SPI_IO2
14,82 SPI_CLK CLK WP# SPI_IO2 14,24
SPI_MOSI_IO0 R117 1 2 15_0402_5% SPI_MOSI_IO0_R 5 4
14,82 SPI_MOSI_IO0 DI GND

W25Q128FVSIQ_SO8 Note : Pull-down on SPI_IO2 is


1

R598 placed on page-24


1K_0402_1%
@
2

TABLE

SF100 PIN HEADER INTERFACE (TOP VIEW)

1 VCC D12.1 GND GND 2


3 CS# R322.2 R681.2 CLK 4
5 MISO R694.2 R674.2 MOSI 6
B 7 (KEY) N/A N/A (RESET) 8 B

For EMC U5 SPI ROM


1 2 1 2 SPI_CLK_R
vPRO model(16MB)
@ C586 @ R646
10P_0402_50V8-J 33_0402_5%
WINBOND W25Q128FVSIQ
MACRONIX MX25L12873FM2I-10G
MICRON N25Q128A13ESEDFF

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 SPI FLASH


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 26 of 111
5 4 3 2 1
5 4 3 2 1

VCC1R2A VCC2R5A VCC0R6B


VCC3B VCC3B VCC3B
M_A_DQ[0..63] 28,3

M_A_A[0..9] 28,3

1
1

1
10U_0603_6.3V6-M
10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1 1 1 1 1 1 1 1 1 1 1 1 R118 R119 R120
-M_A_DQS[0..7] 28,3
0_0402_5% 0_0402_5% 0_0402_5%

C78

C88
C76

C77

C79

C80

C81

C82

C83

C84

C85

C86

C87

C89

C90
M_A_DQS[0..7] 28,3 @ @ @

2
2

2
2 2 2 2 2 2 2 2 2 2 2 2
SA0_CHA_P SA1_CHA_P SA2_CHA_P
VCC1R2A

1
1

1
D D
R121 R122 R123

2
4 M_A_VREF_CA_CPU 0_0402_5% 0_0402_5% 0_0402_5%
R542
1K_0402_1%

2
2

2
330U_D2_2VM_R9M
1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1

C99
R546 +
M_A_VREF_CA_CHA_DIMM

C97
C91

C92

C93

C94

C95

C96

C98
1 2
@
2_0402_1% 2
2
2

0.1U_0402_10V7-K
C688
0.022U_0402_25V7-K R548
2 SPD Address = 0H

C685
1K_0402_1%
1 VCC1R2A
1 VCC2R5A VCC1R2A VCC1R2A VCC0R6B
1
2

R553
24.9_0402_1% VCC1R2A

2
VCC1R2A VCC1R2A JDIMM1B R555
1

240_0402_1%

VCC1R2A VCC1R2A M_A_A3 131 132 M_A_A2

1
M_A_A1 133 A3 A2 134
JDIMM1A 135 A1 EVENT_n/NF 136
M_A_DDRCLK0_1066M 137 VDD_9 VDD_10 138 M_A_DDRCLK1_1066M
3 M_A_DDRCLK0_1066M -M_A_DDRCLK0_1066M 139 CK0_t CK1_t/NF 140 -M_A_DDRCLK1_1066M M_A_DDRCLK1_1066M 3
1 2 3 -M_A_DDRCLK0_1066M 141 CK0_c CK1_c/NF 142 -M_A_DDRCLK1_1066M 3
M_A_DQ4 3 VSS_1 VSS_2 4 M_A_DQ1 M_A_PARITY 143 VDD_11 VDD_12 144 M_A_A0
5 DQ5 DQ4 6 28,3 M_A_PARITY Parity A0
M_A_DQ0 7 VSS_3 VSS_4 8 M_A_DQ5
C 9 DQ1 DQ0 10 M_A_BA1 145 146 M_A_A10_AP C
-M_A_DQS0 11 VSS_5 VSS_6 12 28,3 M_A_BA1 147 BA1 A10/AP 148 M_A_A10_AP 28,3
M_A_DQS0 13 DQS0_C DM0_n/DBl0_n 14 -M_A_CS0 149 VDD_13 VDD_14 150 M_A_BA0
15 DQS0_t VSS_7 16 M_A_DQ6 3 -M_A_CS0 M_A_A14_WE_N 151 CS0_n BA0 152 M_A_A16_RAS_N M_A_BA0 28,3
M_A_DQ7 17 VSS_8 DQ6 18 28,3 M_A_A14_WE_N 153 A14/WE_n A16/RAS_n 154 M_A_A16_RAS_N 28,3
19 DQ7 VSS_9 20 M_A_DQ2 M_A_ODT0 155 VDD_15 VDD_16 156 M_A_A15_CAS_N
M_A_DQ3 21 VSS_10 DQ2 22 3 M_A_ODT0 -M_A_CS1 157 ODT0 A15/CAS_n 158 M_A_A13 M_A_A15_CAS_N 28,3
23 DQ3 VSS_11 24 M_A_DQ9 3 -M_A_CS1 159 CS1_n A13 160 M_A_A13 28,3
M_A_DQ13 25 VSS_12 DQ12 26 M_A_ODT1 161 VDD_17 VDD_18 162
27 DQ13 VSS_13 28 M_A_DQ8 3 M_A_ODT1 163 ODT1 C0/CS2_n/NC 164 M_A_VREF_CA_CHA_DIMM M_A_VREF_CA_CHA_DIMM 28
M_A_DQ12 29 VSS_14 DQ8 30 165 VDD_19 VREFCA 166 SA2_CHA_P
31 DQ9 VSS_15 32 -M_A_DQS1 167 C1/CS3_n/NC SA2 168
33 VSS_16 DQS1_c 34 M_A_DQS1 M_A_DQ33 169 VSS_53 VSS_54 170 M_A_DQ36 VCC1R2A
35 DM1_n/DBl1_n DQS1_t 36 171 DQ37 DQ36 172
M_A_DQ15 37 VSS_17 VSS_18 38 M_A_DQ10 M_A_DQ37 173 VSS_55 VSS_56 174 M_A_DQ32
39 DQ15 DQ14 40 175 DQ33 DQ32 176
M_A_DQ14 41 VSS_19 VSS_20 42 M_A_DQ11 -M_A_DQS4 177 VSS_57 VSS_58 178
43 DQ10 DQ11 44 M_A_DQS4 179 DQS4_c DM4_n/DBl4_n 180
M_A_DQ21 45 VSS_21 VSS_22 46 M_A_DQ16 181 DQS4_t VSS_59 182 M_A_DQ35
DQ21 DQ20 M_A_DQ38 VSS_60 DQ39

0.1U_0402_10V7-K
2.2U_0402_6.3V6-M
47 48 183 184 1 2
M_A_DQ20 49 VSS_23 VSS_24 50 M_A_DQ17 185 DQ38 VSS_61 186 M_A_DQ34
DQ17 DQ16 M_A_DQ39 VSS_62 DQ35

C692

C691
51 52 187 188 @
-M_A_DQS2 53 VSS_25 VSS_26 54 189 DQ34 VSS_63 190 M_A_DQ40
M_A_DQS2 55 DQS2_c DM2_n/DBl2_n 56 M_A_DQ44 191 VSS_64 DQ45 192 2 1
57 DQS2_t VSS_27 58 M_A_DQ19 193 DQ44 VSS_65 194 M_A_DQ45
M_A_DQ22 59 VSS_28 DQ22 60 M_A_DQ41 195 VSS_66 DQ41 196
61 DQ23 VSS_29 62 M_A_DQ23 197 DQ40 VSS_67 198 -M_A_DQS5
M_A_DQ18 63 VSS_30 DQ18 64 199 VSS_68 DQS5_c 200 M_A_DQS5
65 DQ19 VSS_31 66 M_A_DQ24 201 DM5_n/DBl5_n DQS5_t 202
M_A_DQ29 67 VSS_32 DQ28 68 M_A_DQ43 203 VSS_69 VSS_70 204 M_A_DQ47
69 DQ29 VSS_33 70 M_A_DQ25 205 DQ46 DQ47 206
M_A_DQ28 71 VSS_34 DQ24 72 M_A_DQ46 207 VSS_71 VSS_72 208 M_A_DQ42
B 73 DQ25 VSS_35 74 -M_A_DQS3 209 DQ42 DQ43 210 B
75 VSS_36 DQS3_c 76 M_A_DQS3 M_A_DQ50 211 VSS_73 VSS_74 212 M_A_DQ48 VCC1R2A
77 DM3_n/DBl3_n DQS3_t 78 213 DQ52 DQ53 214
M_A_DQ27 79 VSS_37 VSS_38 80 M_A_DQ26 M_A_DQ52 215 VSS_75 VSS_76 216 M_A_DQ49
81 DQ30 DQ31 82 217 DQ49 DQ48 218
M_A_DQ30 83 VSS_39 VSS_40 84 M_A_DQ31 -M_A_DQS6 219 VSS_77 VSS_78 220
85 DQ26 DQ27 86 M_A_DQS6 221 DQS6_c DM6_n/DBl6_n 222
M_A_CB5 87 VSS_41 VSS_42 88 M_A_CB4 223 DQS6_t VSS_79 224 M_A_DQ53
28,3 M_A_CB5 89 CB5/NC CB4/NC 90 M_A_CB4 28,3 M_A_DQ54 225 VSS_80 DQ54 226
M_A_CB0 91 VSS_43 VSS_44 92 M_A_CB1 227 DQS5 VSS_81 228 M_A_DQ55
28,3 M_A_CB0 CB1/NC CB0/NC M_A_CB1 28,3 M_A_DQ51 229 VSS_82 DQ50 230
93 94
-M_A_DQS8 95 VSS_45 VSS_46 96 231 DQ51 VSS_83 232 M_A_DQ56
28,3 -M_A_DQS8 M_A_DQS8 97 DQS8_c DM8_n/DBl8_n/NC 98 M_A_DQ57 233 VSS_84 DQ60 234
28,3 M_A_DQS8 99 DQS8_t VSS_47 100 M_A_CB7 235 DQ61 VSS_85 236 M_A_DQ60
M_A_CB3 VSS_48 CB6/NC M_A_CB7 28,3 M_A_DQ61 237 VSS_86 DQ57 238
101 102
28,3 M_A_CB3 CB2/NC VSS_49 M_A_CB6 239 DQ56 VSS_87 240 -M_A_DQS7
103 104
M_A_CB2 VSS_50 CB7/NC M_A_CB6 28,3 241 VSS_88 DQS7_c 242 M_A_DQS7
105 106
28,3 M_A_CB2 107 CB3/NC VSS_51 108 243 DM7_n/DBl7_n DQS7_t 244
-DRAMRST
M_A_CKE0 109 VSS_52 RESET_n 110 M_A_CKE1 -DRAMRST 17,28,29,30 M_A_DQ62 245 VSS_89 VSS_90 246 M_A_DQ59
3 M_A_CKE0 CKE0 CKE1 M_A_CKE1 3 247 DQ62 DQ63 248
111 112
M_A_BG1 113 VDD_1 VDD_2 114 -M_A_ACT M_A_DQ58 249 VSS_91 VSS_92 250 M_A_DQ63
28,3 M_A_BG1 M_A_BG0 BG1 ACT_n -M_A_ALERT -M_A_ACT 28,3 251 DQ58 DQ59 252
115 116
28,3 M_A_BG0 117 BG0 ALERT_n 118 -M_A_ALERT 28,3 SMB_CLK_3B 253 VSS_93 VSS_94 254 SMB_DATA_3B
M_A_A12 119 VDD_3 VDD_4 120 M_A_A11 28,29,30,79,83 SMB_CLK_3B 255 SCL SDA 256 SA0_CHA_P SMB_DATA_3B 28,29,30,79,83
28,3 M_A_A12 M_A_A9 A12 A11 M_A_A7 M_A_A11 28,3 VCC3B 257 VDDSPD SA0 258
121 122
A9 A7 0.1U_0402_10V7-K 259 VPP_1 VTT SA1_CHA_P

2.2U_0402_6.3V6-M
123 124 260
M_A_A8 125 VDD_5 VDD_6 126 M_A_A5 VPP_2 SA1
R124 1 1
M_A_A6 127 A8 A5 128 M_A_A4 1 2 261 262
A6 A4 GND_1 GND_2
C100

C101
129 130
VDD_7 VDD_8 0_0402_5% FOX_AS0A826-H4RB-7H
2 2
0.1U_0402_10V7-K

2 ME@
A A
C689

FOX_AS0A826-H4RB-7H @
ME@
1

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DDR4 CH-A PRIMARY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 27 of 111
5 4 3 2 1
5 4 3 2 1

VCC1R2A VCC2R5A VCC0R6B

M_A_DQ[0..63] 27,3 VCC3B VCC3B VCC3B


M_A_A[0..9] 27,3

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1
-M_A_DQS[0..7] 27,3 1 1 1 1 1 1 1 1 1 1 1 1
R125 R126 R127

C102

C104

C105
C103

C106

C107

C108

C109

C110

C111

C112

C113

C114

C115

C116
M_A_DQS[0..7] 27,3 0_0402_5% 0_0402_5% 0_0402_5%
2 2 2 2 2 2 2 2 2 2 2 2 @ @

2
2
SA0_CHA_S SA1_CHA_S SA2_CHA_S

1
D D
R128 R129 R130
0_0402_5% 0_0402_5% 0_0402_5%
@

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

2
C119
C117

C118

C123

C124

C125
C120

C121
SPD Address = 1H
VCC1R2A
VCC2R5A VCC1R2A VCC1R2A VCC0R6B

VCC1R2A

2
VCC1R2A VCC1R2A
JDIMM2B R556
240_0402_1%
VCC1R2A VCC1R2A
M_A_A3 131 132 M_A_A2

1
JDIMM2A M_A_A1 133 A3 A2 134
135 A1 EVENT_n 136
M_A_DDRCLK2_1066M 137 VDD_9 VDD_10 138 M_A_DDRCLK3_1066M
1 2 3 M_A_DDRCLK2_1066M -M_A_DDRCLK2_1066M 139 CK0_t CK1_t 140 -M_A_DDRCLK3_1066M M_A_DDRCLK3_1066M 3
M_A_DQ4 3 VSS_1 VSS_2 4 M_A_DQ1 3 -M_A_DDRCLK2_1066M 141 CK0_c CK1_c 142 -M_A_DDRCLK3_1066M 3
5 DQ5 DQ4 6 M_A_PARITY 143 VDD_11 VDD_12 144 M_A_A0
M_A_DQ0 7 VSS_3 VSS_4 8 M_A_DQ5 27,3 M_A_PARITY Parity A0
9 DQ1 DQ0 10
C -M_A_DQS0 11 VSS_5 VSS_6 12 M_A_BA1 145 146 M_A_A10_AP C
M_A_DQS0 13 DQS0_C DM0_n/DBIO_n 14 27,3 M_A_BA1 147 BA1 A10/AP 148 M_A_A10_AP 27,3
15 DQS0_t VSS_7 16 M_A_DQ6 -M_A_CS2 149 VDD_13 VDD_14 150 M_A_BA0
M_A_DQ7 17 VSS_8 DQ6 18 3 -M_A_CS2 M_A_A14_WE_N 151 CS0_n BA0 152 M_A_A16_RAS_N M_A_BA0 27,3
19 DQ7 VSS_9 20 M_A_DQ2 27,3 M_A_A14_WE_N 153 WE_n/A14 RAS_n/A16 154 M_A_A16_RAS_N 27,3
M_A_DQ3 21 VSS_10 DQ2 22 M_A_ODT2 155 VDD_15 VDD_16 156 M_A_A15_CAS_N
23 DQ3 VSS_11 24 M_A_DQ9 3 M_A_ODT2 -M_A_CS3 157 ODT0 CAS_n/A15 158 M_A_A13 M_A_A15_CAS_N 27,3
M_A_DQ13 25 VSS_12 DQ12 26 3 -M_A_CS3 159 CS1_n A13 160 M_A_A13 27,3
27 DQ13 VSS_13 28 M_A_DQ8 M_A_ODT3 161 VDD_17 VDD_18 162
M_A_DQ12 29 VSS_14 DQ8 30 3 M_A_ODT3 163 ODT1 C0/CS2_n/NC 164 M_A_VREF_CA_CHA_DIMM M_A_VREF_CA_CHA_DIMM 27
31 DQ9 VSS_15 32 -M_A_DQS1 165 VDD_19 VREFCA 166 SA2_CHA_S
33 VSS_16 DQS1_c 34 M_A_DQS1 167 C1/CS3_n/NC RFU 168
35 DM1_n/DBl1_n DQS1_t 36 M_A_DQ33 169 VSS_53 VSS_54 170 M_A_DQ36 VCC1R2A
M_A_DQ15 37 VSS_17 VSS_18 38 M_A_DQ10 171 DQ37 DQ36 172
39 DQ15 DQ14 40 M_A_DQ37 173 VSS_55 VSS_56 174 M_A_DQ32
M_A_DQ14 41 VSS_19 VSS_20 42 M_A_DQ11 175 DQ33 DQ32 176
43 DQ10 DQ11 44 -M_A_DQS4 177 VSS_57 VSS_58 178
M_A_DQ21 45 VSS_21 VSS_22 46 M_A_DQ16 M_A_DQS4 179 DQS4_c DM4_n/DBl4_n 180
47 DQ21 DQ20 48 181 DQS4_t VSS_59 182 M_A_DQ35
M_A_DQ20 VSS_23 VSS_24 M_A_DQ17 M_A_DQ38 VSS_60 DQ39

0.1U_0402_10V7-K
2.2U_0402_6.3V6-M
49 50 183 184 1 2
51 DQ17 DQ16 52 185 DQ38 VSS_61 186 M_A_DQ34
VSS_25 VSS_26 VSS_62 DQ35

C693
-M_A_DQS2 M_A_DQ39

C694
53 54 187 188
M_A_DQS2 55 DQS2_c DM2_n/DBl2_n 56 189 DQ34 VSS_63 190 M_A_DQ40 @
57 DQS2_t VSS_27 58 M_A_DQ19 M_A_DQ44 191 VSS_64 DQ45 192 2 1
M_A_DQ22 59 VSS_28 DQ22 60 193 DQ44 VSS_65 194 M_A_DQ45
61 DQ23 VSS_29 62 M_A_DQ23 M_A_DQ41 195 VSS_66 DQ41 196
M_A_DQ18 63 VSS_30 DQ18 64 197 DQ40 VSS_67 198 -M_A_DQS5
65 DQ19 VSS_31 66 M_A_DQ24 199 VSS_68 DQS5_c 200 M_A_DQS5
M_A_DQ29 67 VSS_32 DQ28 68 201 DM5_n/DBl5_n DQS5_t 202
69 DQ29 VSS_33 70 M_A_DQ25 M_A_DQ43 203 VSS_69 VSS_70 204 M_A_DQ47
M_A_DQ28 71 VSS_34 DQ24 72 205 DQ46 DQ47 206
73 DQ25 VSS_35 74 -M_A_DQS3 M_A_DQ46 207 VSS_71 VSS_72 208 M_A_DQ42
B 75 VSS_36 DQS3_c 76 M_A_DQS3 209 DQ42 DQ43 210 B
77 DM3_n/DBl3_n DQS3_t 78 M_A_DQ50 211 VSS_73 VSS_74 212 M_A_DQ48 VCC1R2A
M_A_DQ27 79 VSS_37 VSS_38 80 M_A_DQ26 213 DQ52 DQ53 214
81 DQ30 DQ31 82 M_A_DQ52 215 VSS_75 VSS_76 216 M_A_DQ49
M_A_DQ30 83 VSS_39 VSS_40 84 M_A_DQ31 217 DQ49 DQ48 218
85 DQ26 DQ27 86 -M_A_DQS6 219 VSS_77 VSS_78 220
M_A_CB5 87 VSS_41 VSS_42 88 M_A_CB4 M_A_DQS6 221 DQS6_c DM6_n/DBl6_n 222
27,3 M_A_CB5 89 CB5/NC CB4/NC 90 M_A_CB4 27,3 223 DQS6_t VSS_79 224 M_A_DQ53
M_A_CB0 91 VSS_43 VSS_44 92 M_A_CB1 M_A_DQ54 225 VSS_80 DQ54 226
27,3 M_A_CB0 93 CB1/NC CB0/NC 94 M_A_CB1 27,3 DQ55 VSS_81 M_A_DQ55
227 228
-M_A_DQS8 95 VSS_45 VSS_46 96 M_A_DQ51 229 VSS_82 DQ50 230
27,3 -M_A_DQS8 M_A_DQS8 97 DQS8_c DBI8_n 98 DQ51 VSS_83 M_A_DQ56
231 232
27,3 M_A_DQS8 99 DQS8_t VSS_47 100 M_A_CB7 M_A_DQ57 233 VSS_84 DQ60 234
M_A_CB3 101 VSS_48 CB6/NC 102 M_A_CB7 27,3 235 DQ61 VSS_85 236 M_A_DQ60
27,3 M_A_CB3 103 CB2/NC VSS_49 104 M_A_CB6 M_A_DQ61 VSS_86 DQ57
237 238
M_A_CB2 105 VSS_50 CB7/NC 106 M_A_CB6 27,3 DQ56 VSS_87 -M_A_DQS7
239 240
27,3 M_A_CB2 107 CB3/NC VSS_51 108 VSS_88 DQS7_c M_A_DQS7
-DRAMRST 241 242
M_A_CKE2 109 VSS_52 RESET_n 110 M_A_CKE3 -DRAMRST 17,27,29,30 243 DM7_n/DBl7_n DQS7_t 244
3 M_A_CKE2 111 CKE0 CKE1 112 M_A_CKE3 3 M_A_DQ62 245 VSS_89 VSS_90 246 M_A_DQ59
M_A_BG1 113 VDD_1 VDD_2 114 -M_A_ACT 247 DQ62 DQ63 248
27,3 M_A_BG1 M_A_BG0 115 BG1 ACT_n 116 -M_A_ALERT -M_A_ACT 27,3 M_A_DQ58 VSS_91 VSS_92 M_A_DQ63
249 250
27,3 M_A_BG0 117 BG0 ALERT_n 118 -M_A_ALERT 27,3 DQ58 DQ59
251 252
M_A_A12 119 VDD_3 VDD_4 120 M_A_A11 SMB_CLK_3B 253 VSS_93 VSS_94 254 SMB_DATA_3B
27,3 M_A_A12 M_A_A9 121 A12 A11 122 M_A_A7 M_A_A11 27,3 27,29,30,79,83 SMB_CLK_3B 255 SCL SDA 256 SA0_CHA_S SMB_DATA_3B 27,29,30,79,83
123 A9 A7 124 VCC3B 257 VDDSPD SA0 258
M_A_A8 VDD_5 VDD_6 M_A_A5 VPP_1 Vtt SA1_CHA_S
0.1U_0402_10V7-K

2.2U_0402_6.3V6-M
125 126 259 260
M_A_A6 127 A8 A5 128 M_A_A4 R131 VPP_2 SA1
A6 A4 1 1
129 130 1 2 261 262
VDD_7 VDD_8 GND_1 GND_2
C126

C127
0_0402_5% FOX_AS0A826-H4SB-7H
2 2 ME@
FOX_AS0A826-H4SB-7H
A ME@ A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DDR4 CH-A SECONDARY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 28 of 111
5 4 3 2 1
5 4 3 2 1

VCC1R2A VCC2R5A VCC0R6B

M_B_DQ[0..63] 30,4 VCC3B VCC3B VCC3B


M_B_A[0..9] 30,4

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
10U_0603_6.3V6-M

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1
-M_B_DQS[0..7] 30,4 1 1 1 1 1 1 1 1 1 1 1 1
R132 R136 R134

C128

C129

C130

C131

C132

C133

C134

C135

C136

C138

C139

C140

C141
C137

C142
M_B_DQS[0..7] 30,4 0_0402_5% 0_0402_5% 0_0402_5%
2 2 2 2 2 2 2 2 2 2 2 2 @ @

2
VCC1R2A
SA0_CHB_P SA1_CHB_P SA2_CHB_P

1
1

1
D D
4 M_B_VREF_DQ_CPU
R549 R135 R133 R137
1K_0402_1% 0_0402_5% 0_0402_5% 0_0402_5%
@

330U_D2_2VM_R9M
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1

2
2

2
R550
M_B_VREF_CA_CHB_DIMM

C151
1 2 +

C143

C149

C150
C147

C148
C144

C145

C146
2 2_0402_1% @

2
2

0.1U_0402_10V7-K
C687 2
0.022U_0402_25V7-K R551
SPD Address = 2H

C686
1K_0402_1%
1
1 VCC1R2A
1
2

VCC2R5A VCC1R2A VCC1R2A VCC0R6B


R552
24.9_0402_1%
VCC1R2A

2
VCC1R2A VCC1R2A
1

JDIMM3B R557
240_0402_1%
VCC1R2A VCC1R2A
M_B_A3 131 132 M_B_A2

1
JDIMM3A M_B_A1 133 A3 A2 134
135 A1 EVENT_n/NF 136
M_B_DDRCLK0_1066M 137 VDD_9 VDD_10 138 M_B_DDRCLK1_1066M
1 2 4 M_B_DDRCLK0_1066M -M_B_DDRCLK0_1066M 139 CK0_t CK1_t/NF 140 -M_B_DDRCLK1_1066M M_B_DDRCLK1_1066M 4
M_B_DQ2 3 VSS_1 VSS_2 4 M_B_DQ4 4 -M_B_DDRCLK0_1066M 141 CK0_c CK1_c/NF 142 -M_B_DDRCLK1_1066M 4
5 DQ5 DQ4 6 M_B_PARITY 143 VDD_11 VDD_12 144 M_B_A0
M_B_DQ5 7 VSS_3 VSS_4 8 M_B_DQ0 30,4 M_B_PARITY Parity A0
9 DQ1 DQ0 10
-M_B_DQS0 11 VSS_5 VSS_6 12 M_B_BA1 145 146 M_B_A10_AP
C M_B_DQS0 13 DQS0_C DM0_n/DBI0_n 14 30,4 M_B_BA1 147 BA1 A10/AP 148 M_B_A10_AP 30,4 C
15 DQS0_t VSS_7 16 M_B_DQ1 -M_B_CS0 149 VDD_13 VDD_14 150 M_B_BA0
M_B_DQ6 17 VSS_8 DQ6 18 4 -M_B_CS0 M_B_A14_WE_N 151 CS0_n BA0 152 M_B_A16_RAS_N M_B_BA0 30,4
19 DQ7 VSS_9 20 M_B_DQ7 30,4 M_B_A14_WE_N 153 WE_n/A14 RAS_n/A16 154 M_B_A16_RAS_N 30,4
M_B_DQ3 21 VSS_10 DQ2 22 M_B_ODT0 155 VDD_15 VDD_16 156 M_B_A15_CAS_N
23 DQ3 VSS_11 24 M_B_DQ8 4 M_B_ODT0 -M_B_CS1 157 ODT0 CAS_n/A15 158 M_B_A13 M_B_A15_CAS_N 30,4
M_B_DQ10 25 VSS_12 DQ12 26 4 -M_B_CS1 159 CS1_n A13 160 M_B_A13 30,4
27 DQ13 VSS_13 28 M_B_DQ9 M_B_ODT1 161 VDD_17 VDD_18 162
M_B_DQ14 29 VSS_14 DQ8 30 4 M_B_ODT1 163 ODT1 C0/CS2_n/NC 164 M_B_VREF_CA_CHB_DIMM M_B_VREF_CA_CHB_DIMM 30
31 DQ9 VSS_15 32 -M_B_DQS1 165 VDD_19 VREFCA 166 SA2_CHB_P
33 VSS_16 DQS1_c 34 M_B_DQS1 167 C1/CS3_n/NC SA2 168
35 DM1_n/DBl1_n DQS1_t 36 M_B_DQ38 169 VSS_53 VSS_54 170 M_B_DQ34 VCC1R2A
M_B_DQ12 37 VSS_17 VSS_18 38 M_B_DQ11 171 DQ37 DQ36 172
39 DQ15 DQ14 40 M_B_DQ35 173 VSS_55 VSS_56 174 M_B_DQ39
M_B_DQ13 41 VSS_19 VSS_20 42 M_B_DQ15 175 DQ33 DQ32 176
43 DQ10 DQ11 44 -M_B_DQS4 177 VSS_57 VSS_58 178
M_B_DQ22 45 VSS_21 VSS_22 46 M_B_DQ17 M_B_DQS4 179 DQS4_c DM4_n/DBl4_n 180
47 DQ21 DQ20 48 181 DQS4_t VSS_59 182 M_B_DQ36
M_B_DQ18 VSS_23 VSS_24 M_B_DQ16 M_B_DQ33 VSS_60 DQ39

0.1U_0402_10V7-K
2.2U_0402_6.3V6-M
49 50 183 184 1 2
51 DQ17 DQ16 52 185 DQ38 VSS_61 186 M_B_DQ37
-M_B_DQS2 VSS_25 VSS_26 M_B_DQ32 VSS_62 DQ35

C696

C695
53 54 187 188
M_B_DQS2 55 DQS2_c DM2_n/DBl2_n 56 189 DQ34 VSS_63 190 M_B_DQ44 @
57 DQS2_t VSS_27 58 M_B_DQ23 M_B_DQ40 191 VSS_64 DQ45 192 2 1
M_B_DQ20 59 VSS_28 DQ22 60 193 DQ44 VSS_65 194 M_B_DQ45
61 DQ23 VSS_29 62 M_B_DQ21 M_B_DQ41 195 VSS_66 DQ41 196
M_B_DQ19 63 VSS_30 DQ18 64 197 DQ40 VSS_67 198 -M_B_DQS5
65 DQ19 VSS_31 66 M_B_DQ28 199 VSS_68 DQS5_c 200 M_B_DQS5
M_B_DQ27 67 VSS_32 DQ28 68 201 DM5_n/DBl5_n DQS5_t 202
69 DQ29 VSS_33 70 M_B_DQ25 M_B_DQ42 203 VSS_69 VSS_70 204 M_B_DQ47
M_B_DQ31 71 VSS_34 DQ24 72 205 DQ46 DQ47 206
73 DQ25 VSS_35 74 -M_B_DQS3 M_B_DQ46 207 VSS_71 VSS_72 208 M_B_DQ43
75 VSS_36 DQS3_c 76 M_B_DQS3 209 DQ42 DQ43 210
B 77 DM3_n/DBl3_n DQS3_t 78 M_B_DQ52 211 VSS_73 VSS_74 212 M_B_DQ54 VCC1R2A B
M_B_DQ30 79 VSS_37 VSS_38 80 M_B_DQ26 213 DQ52 DQ53 214
81 DQ30 DQ31 82 M_B_DQ48 215 VSS_75 VSS_76 216 M_B_DQ55
M_B_DQ24 83 VSS_39 VSS_40 84 M_B_DQ29 217 DQ49 DQ48 218
85 DQ26 DQ27 86 -M_B_DQS6 219 VSS_77 VSS_78 220
M_B_CB2 87 VSS_41 VSS_42 88 M_B_CB4 M_B_DQS6 221 DQS6_c DM6_n/DBl6_n 222
30,4 M_B_CB2 89 CB5/NC CB4/NC 90 M_B_CB4 30,4 DQS6_t VSS_79 M_B_DQ53
223 224
M_B_CB6 91 VSS_43 VSS_44 92 M_B_CB3 M_B_DQ50 225 VSS_80 DQ54 226
30,4 M_B_CB6 93 CB1/NC CB0/NC 94 M_B_CB3 30,4 227 DQ55 VSS_81 228 M_B_DQ49
-M_B_DQS8 95 VSS_45 VSS_46 96 M_B_DQ51 229 VSS_82 DQ50 230
30,4 -M_B_DQS8 M_B_DQS8 97 DQS8_c DBI8_n/DBI_n/NC 98 DQ51 VSS_83 M_B_DQ59
231 232
30,4 M_B_DQS8 99 DQS8_t VSS_47 100 M_B_CB5 M_B_DQ57 VSS_84 DQ60
233 234
M_B_CB7 101 VSS_48 CB6/NC 102 M_B_CB5 30,4 235 DQ61 VSS_85 236 M_B_DQ62
30,4 M_B_CB7 103 CB2/NC VSS_49 104 M_B_CB0 M_B_DQ61 237 VSS_86 DQ57 238
M_B_CB1 105 VSS_50 CB7/NC 106 M_B_CB0 30,4 DQ56 VSS_87 -M_B_DQS7
239 240
30,4 M_B_CB1 107 CB3/NC VSS_51 108 VSS_88 DQS7_c M_B_DQS7
-DRAMRST 241 242
M_B_CKE0 109 VSS_52 RESET_n 110 M_B_CKE1 -DRAMRST 17,27,28,30 DM7_n/DBl7_n DQS7_t
243 244
4 M_B_CKE0 111 CKE0 CKE1 112 M_B_CKE1 4 M_B_DQ56 245 VSS_89 VSS_90 246 M_B_DQ63
M_B_BG1 113 VDD_1 VDD_2 114 -M_B_ACT 247 DQ62 DQ63 248
30,4 M_B_BG1 M_B_BG0 115 BG1 ACT_n 116 -M_B_ALERT -M_B_ACT 30,4 M_B_DQ60 VSS_91 VSS_92 M_B_DQ58
249 250
30,4 M_B_BG0 117 BG0 ALERT_n 118 -M_B_ALERT 30,4 DQ58 DQ59
251 252
M_B_A12 119 VDD_3 VDD_4 120 M_B_A11 SMB_CLK_3B 253 VSS_93 VSS_94 254 SMB_DATA_3B
30,4 M_B_A12 M_B_A9 121 A12 A11 122 M_B_A7 M_B_A11 30,4 27,28,30,79,83 SMB_CLK_3B 255 SCL SDA 256 SA0_CHB_P SMB_DATA_3B 27,28,30,79,83
123 A9 A7 124 VCC3B 257 VDDSPD SA0 258
M_B_A8 VDD_5 VDD_6 M_B_A5 VPP_1 Vtt SA1_CHB_P

2.2U_0402_6.3V6-M
0.1U_0402_10V7-K
125 126 259 260
M_B_A6 127 A8 A5 128 M_B_A4 R138 VPP_2 SA1
A6 A4 1 1
129 130 1 2 261 262
VDD_7 VDD_8 GND_1 GND_2

C153
C152
0.1U_0402_10V7-K

2 0_0402_5% FOX_AS0A827-H8RB-7H
2 2 ME@
C690

FOX_AS0A827-H8RB-7H
ME@ @
A 1 A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DDR4 CH-B PRIMARY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 29 of 111
5 4 3 2 1
5 4 3 2 1

VCC1R2A VCC2R5A VCC0R6B

M_B_DQ[0..63] 29,4 VCC3B VCC3B VCC3B


M_B_A[0..9] 29,4

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1
-M_B_DQS[0..7] 29,4 1 1 1 1 1 1 1 1 1 1 1 1
R139 R140 R141

C160
C154

C155

C156

C157

C158

C159

C161

C162

C163

C164

C165

C166

C167

C168
M_B_DQS[0..7] 29,4 0_0402_5% 0_0402_5% 0_0402_5%
2 2 2 2 2 2 2 2 2 2 2 2 @

2
SA0_CHB_S SA1_CHB_S SA2_CHB_S

1
D D
R142 R143 R144
0_0402_5% 0_0402_5% 0_0402_5%
@ @

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

2
C169

C170

C171

C172

C173

C175
C174

C176
SPD Address = 3H
VCC1R2A
VCC2R5A VCC1R2A VCC1R2A VCC0R6B

VCC1R2A

2
JDIMM4B R558
VCC1R2A VCC1R2A 240_0402_1%

M_B_A3 131 132 M_B_A2

1
VCC1R2A VCC1R2A M_B_A1 133 A3 A2 134
135 A1 EVENT_n/NF 136
JDIMM4A M_B_DDRCLK2_1066M 137 VDD_9 VDD_10 138 M_B_DDRCLK3_1066M
4 M_B_DDRCLK2_1066M -M_B_DDRCLK2_1066M 139 CK0_t CK1_t/NF 140 -M_B_DDRCLK3_1066M M_B_DDRCLK3_1066M 4
4 -M_B_DDRCLK2_1066M 141 CK0_c CK1_c/NF 142 -M_B_DDRCLK3_1066M 4
1 2 M_B_PARITY 143 VDD_11 VDD_12 144 M_B_A0
M_B_DQ2 3 VSS_1 VSS_2 4 M_B_DQ4 29,4 M_B_PARITY Parity A0
5 DQ5 DQ4 6
M_B_DQ5 7 VSS_3 VSS_4 8 M_B_DQ0 M_B_BA1 145 146 M_B_A10_AP
C 9 DQ1 DQ0 10 29,4 M_B_BA1 147 BA1 A10/AP 148 M_B_A10_AP 29,4 C
-M_B_DQS0 11 VSS_5 VSS_6 12 -M_B_CS2 149 VDD_13 VDD_14 150 M_B_BA0
M_B_DQS0 13 DQS0_C DM0_n/DBl0_n 14 4 -M_B_CS2 M_B_A14_WE_N 151 CS0_n BA0 152 M_B_A16_RAS_N M_B_BA0 29,4
15 DQS0_t VSS_7 16 M_B_DQ1 29,4 M_B_A14_WE_N 153 A14/WE_n A16/RAS_n 154 M_B_A16_RAS_N 29,4
M_B_DQ6 17 VSS_8 DQ6 18 M_B_ODT2 155 VDD_15 VDD_16 156 M_B_A15_CAS_N
19 DQ7 VSS_9 20 M_B_DQ7 4 M_B_ODT2 -M_B_CS3 157 ODT0 A15/CAS_n 158 M_B_A13 M_B_A15_CAS_N 29,4
M_B_DQ3 21 VSS_10 DQ2 22 4 -M_B_CS3 159 CS1_n A13 160 M_B_A13 29,4
23 DQ3 VSS_11 24 M_B_DQ8 M_B_ODT3 161 VDD_17 VDD_18 162
M_B_DQ10 25 VSS_12 DQ12 26 4 M_B_ODT3 163 ODT1 C0/CS2_n/NC 164 M_B_VREF_CA_CHB_DIMM M_B_VREF_CA_CHB_DIMM 29
27 DQ13 VSS_13 28 M_B_DQ9 165 VDD_19 VREFCA 166 SA2_CHB_S
M_B_DQ14 29 VSS_14 DQ8 30 167 C1/CS3_n/NC SA2 168
31 DQ9 VSS_15 32 -M_B_DQS1 M_B_DQ38 169 VSS_53 VSS_54 170 M_B_DQ34 VCC1R2A
33 VSS_16 DQS1_c 34 M_B_DQS1 171 DQ37 DQ36 172
35 DM1_n/DBl1_n DQS1_t 36 M_B_DQ35 173 VSS_55 VSS_56 174 M_B_DQ39
M_B_DQ12 37 VSS_17 VSS_18 38 M_B_DQ11 175 DQ33 DQ32 176
39 DQ15 DQ14 40 -M_B_DQS4 177 VSS_57 VSS_58 178
M_B_DQ13 41 VSS_19 VSS_20 42 M_B_DQ15 M_B_DQS4 179 DQS4_c DM4_n/DBl4_n 180
43 DQ10 DQ11 44 181 DQS4_t VSS_59 182 M_B_DQ36
M_B_DQ22 VSS_21 VSS_22 M_B_DQ17 M_B_DQ33 VSS_60 DQ39

0.1U_0402_10V7-K
2.2U_0402_6.3V6-M
45 46 183 184 1 2
47 DQ21 DQ20 48 185 DQ38 VSS_61 186 M_B_DQ37
M_B_DQ18 VSS_23 VSS_24 M_B_DQ16 M_B_DQ32 VSS_62 DQ35

C698

C697
49 50 187 188
51 DQ17 DQ16 52 189 DQ34 VSS_63 190 M_B_DQ44 @
-M_B_DQS2 53 VSS_25 VSS_26 54 M_B_DQ40 191 VSS_64 DQ45 192 2 1
M_B_DQS2 55 DQS2_c DM2_n/DBl2_n 56 193 DQ44 VSS_65 194 M_B_DQ45
57 DQS2_t VSS_27 58 M_B_DQ23 M_B_DQ41 195 VSS_66 DQ41 196
M_B_DQ20 59 VSS_28 DQ22 60 197 DQ40 VSS_67 198 -M_B_DQS5
61 DQ23 VSS_29 62 M_B_DQ21 199 VSS_68 DQS5_c 200 M_B_DQS5
M_B_DQ19 63 VSS_30 DQ18 64 201 DM5_n/DBl5_n DQS5_t 202
65 DQ19 VSS_31 66 M_B_DQ28 M_B_DQ42 203 VSS_69 VSS_70 204 M_B_DQ47
M_B_DQ27 67 VSS_32 DQ28 68 205 DQ46 DQ47 206
69 DQ29 VSS_33 70 M_B_DQ25 M_B_DQ46 207 VSS_71 VSS_72 208 M_B_DQ43
M_B_DQ31 71 VSS_34 DQ24 72 209 DQ42 DQ43 210
B 73 DQ25 VSS_35 74 -M_B_DQS3 M_B_DQ52 211 VSS_73 VSS_74 212 M_B_DQ54 VCC1R2A B
75 VSS_36 DQS3_c 76 M_B_DQS3 213 DQ52 DQ53 214
77 DM3_n/DBl3_n DQS3_t 78 M_B_DQ48 215 VSS_75 VSS_76 216 M_B_DQ55
M_B_DQ30 79 VSS_37 VSS_38 80 M_B_DQ26 217 DQ49 DQ48 218
81 DQ30 DQ31 82 -M_B_DQS6 219 VSS_77 VSS_78 220
M_B_DQ24 83 VSS_39 VSS_40 84 M_B_DQ29 M_B_DQS6 221 DQS6_c DM6_n/DBl6_n 222
85 DQ26 DQ27 86 223 DQS6_t VSS_79 224 M_B_DQ53
M_B_CB2 87 VSS_41 VSS_42 88 M_B_CB4 M_B_DQ50 225 VSS_80 DQ54 226
29,4 M_B_CB2 89 CB5/NC CB4/NC 90 M_B_CB4 29,4 227 DQS5 VSS_81 228 M_B_DQ49
M_B_CB6 91 VSS_43 VSS_44 92 M_B_CB3 M_B_DQ51 229 VSS_82 DQ50 230
29,4 M_B_CB6 CB1/NC CB0/NC M_B_CB3 29,4 231 DQ51 VSS_83 232 M_B_DQ59
93 94
-M_B_DQS8 95 VSS_45 VSS_46 96 M_B_DQ57 233 VSS_84 DQ60 234
29,4 -M_B_DQS8 M_B_DQS8 97 DQS8_c DM8_n/DBl8_n/NC 98 235 DQ61 VSS_85 236 M_B_DQ62
29,4 M_B_DQS8 99 DQS8_t VSS_47 100 M_B_CB5 M_B_DQ61 237 VSS_86 DQ57 238
M_B_CB7 VSS_48 CB6/NC M_B_CB5 29,4 239 DQ56 VSS_87 240 -M_B_DQS7
101 102
29,4 M_B_CB7 CB2/NC VSS_49 M_B_CB0 241 VSS_88 DQS7_c 242 M_B_DQS7
103 104
M_B_CB1 VSS_50 CB7/NC M_B_CB0 29,4 243 DM7_n/DBl7_n DQS7_t 244
105 106
29,4 M_B_CB1 107 CB3/NC VSS_51 108 M_B_DQ56 245 VSS_89 VSS_90 246 M_B_DQ63
-DRAMRST
M_B_CKE2 109 VSS_52 RESET_n 110 M_B_CKE3 -DRAMRST 17,27,28,29 247 DQ62 DQ63 248
4 M_B_CKE2 CKE0 CKE1 M_B_CKE3 4 M_B_DQ60 249 VSS_91 VSS_92 250 M_B_DQ58
111 112
M_B_BG1 113 VDD_1 VDD_2 114 -M_B_ACT 251 DQ58 DQ59 252
29,4 M_B_BG1 M_B_BG0 BG1 ACT_n -M_B_ALERT -M_B_ACT 29,4 SMB_CLK_3B 253 VSS_93 VSS_94 254 SMB_DATA_3B
115 116
29,4 M_B_BG0 117 BG0 ALERT_n 118 -M_B_ALERT 29,4 27,28,29,79,83 SMB_CLK_3B 255 SCL SDA 256 SA0_CHB_S SMB_DATA_3B 27,28,29,79,83
M_B_A12 119 VDD_3 VDD_4 120 M_B_A11 VCC3B 257 VDDSPD SA0 258
29,4 M_B_A12 M_B_A9 A12 A11 M_B_A7 M_B_A11 29,4 VPP_1 VTT SA1_CHB_S

0.1U_0402_10V7-K
259

2.2U_0402_6.3V6-M
121 122 260
123 A9 A7 124 VPP_2 SA1
R145 1 1
M_B_A8 125 VDD_5 VDD_6 126 M_B_A5 1 2 261 262
M_B_A6 A8 A5 M_B_A4 GND_1 GND_2

C179
C178
127 128
129 A6 A4 130 0_0402_5% FOX_AS0A826-H4RB-7H
VDD_7 VDD_8 2 2 ME@

A FOX_AS0A826-H4RB-7H A
ME@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DDR4 CH-B SECONDARY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 30 of 111
5 4 3 2 1
5 4 3 2 1

PEX_STD_SW# PD NO ASM 147K 7.15K 0


VCC3B 8GT/s TXEQ Preset P1,P3,P5 P1,P3,P5 P1,P7,P8 P7,P8
3.3V +/-6%
VCC3B
MAX 1.0A Channel Class Short Mid Short Mid Long Long
See MXM spec v3.1 for detail.
For UART RX DEBUG

4.7U_0402_6.3V6-M

0.1U_0402_25V6-K
IOR-B change FL8, FL9 to 0Ω

1
1 1 @R315 and R317 Mount JTX and JRX

C180

C181
R146 R579 VCC3B
HP_L_JACK 54,67
10K_0402_5% 100K_0402_5%
JMXM1A
2 2

1
VCC5B @

2
5.0V +/-6% 278 2 R1013
280 3V3_3 PRSNT_R# 281 -MXM_PRESENCE 23
10K_0402_5% @ JRX
MAX 2.5A 3V3_4 PRSNT_L#
Leave as NC SHORT PADS

1
1 19 R147 1 2 0_0402_5%

2
D
3 5V_1 PEX_STD_SW# D

10U_0603_10V6-K

0.1U_0402_25V6-K
5 5V_2 156 -GPU_RST 1 2
1 1 5V_3 PEX_RST# -GPU_RST_EC 77

C182

C183
VINT20 7-20V 7 154
9 5V_4 CLK_REQ# -CLKREQ_PEG 20
MAX 10A @ R1011
5V_5 0_0402_5%
2 2 282
283 E2_PWR_SRC_1 155 1 2

10U_0805_25V6-K
10U_0805_25V6-K

0.1U_0402_25V6-K
E1_PWR_SRC_1 PEX_REFCLK PEG_CLK_100M 20 -GPU_RST_PCH 18
1 1 1 284 153
E2_PWR_SRC_2 PEX_REFCLK# -PEG_CLK_100M 20

C184
C185

C186
285 R1012
286 E1_PWR_SRC_2 149 PEG_RXP0_C C187 1 2 0.22U_0201_6.3V6-K PEG_RXP0 0_0402_5%
E2_PWR_SRC_3 PEX_RX0 PEG_RXP0 5
PLACE CAPS NEAR MXM CONN 287 147 PEG_RXN0_C C188 1 2 0.22U_0201_6.3V6-K PEG_RXN0
2 2 2 288 E1_PWR_SRC_3 PEX_RX0# 150 PEG_TXP0_C 1 2 0.22U_0201_6.3V6-K PEG_TXP0 PEG_RXN0 5
C189
E2_PWR_SRC_4 PEX_TX0 PEG_TXN0_C PEG_TXP0 5
289 148 C190 1 2 0.22U_0201_6.3V6-K PEG_TXN0
290 E1_PWR_SRC_4 PEX_TX0# PEG_TXN0 5
291 E2_PWR_SRC_5 143 PEG_RXP1_C C191 1 2 0.22U_0201_6.3V6-K PEG_RXP1
292 E1_PWR_SRC_5 PEX_RX1 141 PEG_RXN1_C PEG_RXN1 PEG_RXP1 5
C192 1 2 0.22U_0201_6.3V6-K
293 E2_PWR_SRC_6 PEX_RX1# 144 PEG_TXP1_C 1 2 0.22U_0201_6.3V6-K PEG_TXP1 PEG_RXN1 5
MXM CONN PLACE CAPS NEAR MXM CONN E1_PWR_SRC_6 PEX_TX1
C193
PEG_TXP1 5
294 142 PEG_TXN1_C C194 1 2 0.22U_0201_6.3V6-K PEG_TXN1
TOP VIEW 295 E2_PWR_SRC_7 PEX_TX1# PEG_TXN1 5
296 E1_PWR_SRC_7 137 PEG_RXP2_C C195 1 2 0.22U_0201_6.3V6-K PEG_RXP2
297 E2_PWR_SRC_8 PEX_RX2 135 PEG_RXN2_C PEG_RXN2 PEG_RXP2 5
C196 1 2 0.22U_0201_6.3V6-K
298 E1_PWR_SRC_8 PEX_RX2# 138 PEG_TXP2_C PEG_TXP2 PEG_RXN2 5
C197 1 2 0.22U_0201_6.3V6-K
299 E2_PWR_SRC_9 PEX_TX2 136 PEG_TXN2_C PEG_TXN2 PEG_TXP2 5
3.3V PIN 280 PIN 281 C198 1 2 0.22U_0201_6.3V6-K
300 E1_PWR_SRC_9 PEX_TX2# PEG_TXN2 5
DP_A 301 E2_PWR_SRC_10 123 PEG_RXP3_C C199 1 2 0.22U_0201_6.3V6-K PEG_RXP3
E1_PWR_SRC_10 PEX_RX3 121 PEG_RXN3_C PEG_RXN3 PEG_RXP3 5
C200 1 2 0.22U_0201_6.3V6-K
11 PEX_RX3# 122 PEG_TXP3_C PEG_TXP3 PEG_RXN3 5
DP_B C201 1 2 0.22U_0201_6.3V6-K
13 GND_1 PEX_TX3 120 PEG_TXN3_C PEG_TXN3 PEG_TXP3 5
C202 1 2 0.22U_0201_6.3V6-K
3.3V 15 GND_2 PEX_TX3# PEG_TXN3 5
17 GND_3 117 PEG_RXP4_C C203 1 2 0.22U_0201_6.3V6-K PEG_RXP4
36 GND_4 PEX_RX4 115 PEG_RXN4_C PEG_RXN4 PEG_RXP4 5
DP_D (eDP) C204 1 2 0.22U_0201_6.3V6-K
37 GND_5 PEX_RX4# 116 PEG_TXP4_C PEG_TXP4 PEG_RXN4 5
C205 1 2 0.22U_0201_6.3V6-K
GND_6 PEX_TX4 PEG_TXN4_C PEG_TXN4 PEG_TXP4 5
DP_C 46 114 C206 1 2 0.22U_0201_6.3V6-K
47 GND_7 PEX_TX4# PEG_TXN4 5
52 GND_8 111 PEG_RXP5_C C207 1 2 0.22U_0201_6.3V6-K PEG_RXP5
GND_9 PEX_RX5 PEG_RXP5 5
53 109 PEG_RXN5_C C208 1 2 0.22U_0201_6.3V6-K PEG_RXN5
GND_10 PEX_RX5# PEG_TXP5_C PEG_RXN5 5
58 110 C209 1 2 0.22U_0201_6.3V6-K PEG_TXP5
GND_11 PEX_TX5 PEG_TXN5_C PEG_TXP5 5
59 108 C210 1 2 0.22U_0201_6.3V6-K PEG_TXN5
64 GND_12 PEX_TX5# PEG_TXN5 5
PEX_TXRX2 65 GND_13 105 PEG_RXP6_C 1 2 0.22U_0201_6.3V6-K PEG_RXP6
C PIN 134 PIN 133 MXM INSERT DIRECTION 70 GND_14 PEX_RX6 103 PEG_RXN6_C
C211
C212 1 2 0.22U_0201_6.3V6-K PEG_RXN6 PEG_RXP6 5
C

71 GND_15 PEX_RX6# 104 PEG_TXP6_C PEG_TXP6 PEG_RXN6 5


PEX_TXRX3 PIN 124 PIN 125 C213 1 2 0.22U_0201_6.3V6-K
76 GND_16 PEX_TX6 102 PEG_TXN6_C PEG_TXN6 PEG_TXP6 5
C214 1 2 0.22U_0201_6.3V6-K
77 GND_17 PEX_TX6# PEG_TXN6 5
82 GND_18 99 PEG_RXP7_C C215 1 2 0.22U_0201_6.3V6-K PEG_RXP7
83 GND_19 PEX_RX7 97 PEG_RXN7_C PEG_RXN7 PEG_RXP7 5
C216 1 2 0.22U_0201_6.3V6-K
88 GND_20 PEX_RX7# 98 PEG_TXP7_C PEG_TXP7 PEG_RXN7 5
C217 1 2 0.22U_0201_6.3V6-K
GND_21 PEX_TX7 PEG_TXN7_C PEG_TXN7 PEG_TXP7 5
89 96 C218 1 2 0.22U_0201_6.3V6-K
94 GND_22 PEX_TX7# PEG_TXN7 5
95 GND_23 93 PEG_RXP8_C C219 1 2 0.22U_0201_6.3V6-K PEG_RXP8
GND_24 PEX_RX8 PEG_RXN8_C PEG_RXN8 PEG_RXP8 5
PEX_TXRX15 100 91 C220 1 2 0.22U_0201_6.3V6-K
101 GND_25 PEX_RX8# 92 PEG_TXP8_C 1 2 0.22U_0201_6.3V6-K PEG_TXP8 PEG_RXN8 5
C221
106 GND_26 PEX_TX8 90 PEG_TXN8_C PEG_TXN8 PEG_TXP8 5
C222 1 2 0.22U_0201_6.3V6-K
107 GND_27 PEX_TX8# PEG_TXN8 5
5V PIN 2 PIN 1 112 GND_28 87 PEG_RXP9_C C223 1 2 0.22U_0201_6.3V6-K PEG_RXP9
GND_29 PEX_RX9 85 PEG_RXN9_C PEG_RXN9 PEG_RXP9 5
113 C224 1 2 0.22U_0201_6.3V6-K
GND_30 PEX_RX9# 86 PEG_TXP9_C PEG_TXP9 PEG_RXN9 5
118 C225 1 2 0.22U_0201_6.3V6-K
GND_31 PEX_TX9 PEG_TXN9_C PEG_TXN9 PEG_TXP9 5
PIN E4 PIN E3 119 84 C226 1 2 0.22U_0201_6.3V6-K
124 GND_32 PEX_TX9# PEG_TXN9 5
125 GND_33 81 PEG_RXP10_C C227 1 2 0.22U_0201_6.3V6-K PEG_RXP10
GND_34 PEX_RX10 PEG_RXP10 5
PWR_SRC PIN E2 PIN E1 133 79 PEG_RXN10_C C228 1 2 0.22U_0201_6.3V6-K PEG_RXN10
GND_35 PEX_RX10# PEG_TXP10_C PEG_RXN10 5
134 80 C229 1 2 0.22U_0201_6.3V6-K PEG_TXP10
GND_36 PEX_TX10 PEG_TXN10_C PEG_TXP10 5
139 78 C230 1 2 0.22U_0201_6.3V6-K PEG_TXN10
140 GND_37 PEX_TX10# PEG_TXN10 5
145 GND_38 75 PEG_RXP11_C C231 1 2 0.22U_0201_6.3V6-K PEG_RXP11
GND_39 PEX_RX11 PEG_RXN11_C PEG_RXN11 PEG_RXP11 5
146 73 C232 1 2 0.22U_0201_6.3V6-K
GND_40 PEX_RX11# 74 PEG_TXP11_C PEG_TXP11 PEG_RXN11 5
151 C233 1 2 0.22U_0201_6.3V6-K
GND_41 PEX_TX11 72 PEG_TXN11_C PEG_TXN11 PEG_TXP11 5
152 C234 1 2 0.22U_0201_6.3V6-K
157 GND_42 PEX_TX11# PEG_TXN11 5
166 GND_43 69 PEG_RXP12_C C235 1 2 0.22U_0201_6.3V6-K PEG_RXP12
MXM Planar GND_44 PEX_RX12 PEG_RXN12_C PEG_RXN12 PEG_RXP12 5
173 67 C236 1 2 0.22U_0201_6.3V6-K
GND_45 PEX_RX12# 68 PEG_TXP12_C PEG_TXP12 PEG_RXN12 5
174 C237 1 2 0.22U_0201_6.3V6-K
GND_46 PEX_TX12 66 PEG_TXN12_C PEG_TXN12 PEG_TXP12 5
GPU MXM CONN CPU 179 C238 1 2 0.22U_0201_6.3V6-K
180 GND_47 PEX_TX12# PEG_TXN12 5
185 GND_48 63 PEG_RXP13_C C239 1 2 0.22U_0201_6.3V6-K PEG_RXP13
GND_49 PEX_RX13 PEG_RXN13_C PEG_RXN13 PEG_RXP13 5
PEG_RXP0 150 PEG_TX0 PEG_TXP0 PEG_TXP0 186 61 C240 1 2 0.22U_0201_6.3V6-K
GND_50 PEX_RX13# 62 PEG_TXP13_C 1 2 0.22U_0201_6.3V6-K PEG_TXP13 PEG_RXN13 5
191 C241
GND_51 PEX_TX13 60 PEG_TXN13_C PEG_TXN13 PEG_TXP13 5
192 C242 1 2 0.22U_0201_6.3V6-K
PEG_RXN0 148 PEG_TX0# PEG_TXN0 PEG_TXN0 197 GND_52 PEX_TX13# PEG_TXN13 5
B
198 GND_53 57 PEG_RXP14_C C243 1 2 0.22U_0201_6.3V6-K PEG_RXP14 B
GND_54 PEX_RX14 PEG_RXN14_C PEG_RXN14 PEG_RXP14 5
203 55 C244 1 2 0.22U_0201_6.3V6-K
GND_55 PEX_RX14# PEG_TXP14_C PEG_TXP14 PEG_RXN14 5
204 56 C245 1 2 0.22U_0201_6.3V6-K
GND_56 PEX_TX14 PEG_TXN14_C PEG_TXN14 PEG_TXP14 5
209 54 C246 1 2 0.22U_0201_6.3V6-K
210 GND_57 PEX_TX14# PEG_TXN14 5
215 GND_58 51 PEG_RXP15_C C247 1 2 0.22U_0201_6.3V6-K PEG_RXP15
GND_59 PEX_RX15 PEG_RXP15 5
216 49 PEG_RXN15_C C248 1 2 0.22U_0201_6.3V6-K PEG_RXN15
GND_60 PEX_RX15# PEG_TXP15_C PEG_RXN15 5
PEG_TXP0 149 PEG_RX0 PEG_RXP0 PEG_RXP0 221 50 C249 1 2 0.22U_0201_6.3V6-K PEG_TXP15
GND_61 PEX_TX15 PEG_TXN15_C PEG_TXP15 5
222 48 C250 1 2 0.22U_0201_6.3V6-K PEG_TXN15
228 GND_62 PEX_TX15# PEG_TXN15 5
PEG_TXN0 147 PEG_RX0# PEG_RXN0 PEG_RXN0 244 GND_63
250 GND_64
251 GND_65
GND_66
PLACE CAPS NEAR MXM CONN (within 0.5")
256 MXM Spec requires both TX and RX caps near MXM on planar
257 GND_67
262 GND_68
263 GND_69
268 GND_70
269 GND_71
275 GND_72
GND_73
302
303 E4_GND_74
304 E3_GND_75
305 E4_GND_76
306 E3_GND_77
307 E4_GND_78
308 E3_GND_79
309 E4_GND_80
310 E3_GND_81
311 E4_GND_82
312 E3_GND_83
313 E4_GND_84
314 E3_GND_85
315 E4_GND_86
316 E3_GND_87
317 E4_GND_88
318 E3_GND_89
319 E4_GND_90
A 320 E3_GND_91 A
321 E4_GND_92
E3_GND_93
322
323 GND_94
GND_95
FOX_AS0B826-S55B-7H
ME@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 MXM (1/2)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 31 of 111
5 4 3 2 1
5 4 3 2 1

VCC3B
JMXM1B
DP_X_HPD has 100K PD on MXM module
240 276
242 3V3_1 DP_A_HPD 277 TBT_SNK0_DPHPD 14,46
3V3_2 DP_A_AUX# 279 TBT_SNK0_AUXN 46
1 DP_A_AUX TBT_SNK0_AUXP 46
C251
0.1U_0402_16V7-K 38 253
39 OEM0 DP_A_L0# 255 TBT_SNK0_DP0N 46
2 40 OEM1 DP_A_L0 TBT_SNK0_DP0P 46
41 OEM2 259
PLACE CAPS NEAR MXM CONN OEM3 DP_A_L1# TBT_SNK0_DP1N 46
42 261
D 14 -GPU_EVENT 43 OEM4 DP_A_L1 TBT_SNK0_DP1P 46 D
14 GC6_FB_EN OEM5
To Alpine Ridge
44 265
45 OEM6 DP_A_L2# 267 TBT_SNK0_DP2N 46
42 FRAME_LOCK OEM7 DP_A_L2 TBT_SNK0_DP2P 46
271
26 DP_A_L3# 273 TBT_SNK0_DP3N 46
28 GPIO0 DP_A_L3 TBT_SNK0_DP3P 46
30 GPIO1
GPIO2 274
DP_B_HPD 270 TBT_SNK1_DPHPD 14,46
DP_B_AUX# 272 TBT_SNK1_AUXN 46
168 DP_B_AUX TBT_SNK1_AUXP 46
VGA_RED 246
170 DP_B_L0# 248 TBT_SNK1_DP0N 46
VGA_GREEN DP_B_L0 TBT_SNK1_DP0P 46
172 252
VGA_BLUE DP_B_L1# 254 TBT_SNK1_DP1N 46
DP_B_L1 TBT_SNK1_DP1P 46 To Alpine Ridge
PU on DGFX_PWRGD is VCC3_SUS to
162 258
avoid floating on PCH. Leave as NC 164 VGA_VSYNC DP_B_L2# 260 TBT_SNK1_DP2N 46
VGA_HSYNC DP_B_L2 TBT_SNK1_DP2P 46
264
160 DP_B_L3# 266 TBT_SNK1_DP3N 46
158 VGA_DDC_CLK DP_B_L3 TBT_SNK1_DP3P 46
VCC3_SUS VCC3B
VGA_DDC_DAT
234
DP_C_HPD 223 EXT_DP_HPD 14,43
4 DP_C_AUX# 225 EXT_AUXN 43
29 WAKE# DP_C_AUX EXT_AUXP 43
21 HDMI_CEC 199
14 -GPU_IS_3D_ACC_DEVICE VGA_DISABLE# DP_C_L0# 201 EXT_DP0N 43
DP_C_L0 EXT_DP0P 43

2
2

2
10K_0402_5%

100K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
C 205 C
DP_C_L1# EXT_DP1N 43
R151
R148

R150

R152
31 207 To miniDP
14 LVDS_L_HPD DP_C_L1 EXT_DP1P 43
LVDS_U_HPD or Dock CONN
Leave as NC 35 211
(MUXED)
1
1

1
33 LVDS_DDC_CLK DP_C_L2# 213 EXT_DP2N 43
LVDS_DDC_DAT DP_C_L2 EXT_DP2P 43
217
DP_C_L3# 219 EXT_DP3N 43
23 DP_C_L3 EXT_DP3P 43
41 PANEL_POWER_ON_D 25 PNL_PWR_EN
41 VGA_BLON_D 27 PNL_BL_EN 236
41 PANEL_BKLT_CTRL_D PNL_BL_PWM DP_D_HPD 230 EDP_HPD_D 41
DP_D_AUX# 232 EDP_AUXN_D 41
Panel ctrl signals have 100k pull-down on MXM. DP_D_AUX EDP_AUXP_D 41
32 206
77 I2C_DATA_VIDEO 34 SMB_DAT DP_D_L0# 208 EDP_TXN0_D 41
77 I2C_CLK_VIDEO To read GPU temperature by EC SMB_CLK DP_D_L0 EDP_TXP0_D 41
212
20 DP_D_L1# 214 EDP_TXN1_D 41
77 -VIDEO_THERM_OVERT TH_OVERT# DP_D_L1 EDP_TXP1_D 41 To eDP CONN
22
61,77 -VIDEO_THERM_ALERT 24 TH_ALERT# 218
-VIDEO_THERM_OVERT: LOW = Critical high temp detected on MXM. Need to shutdown in 500 ms. From MXM to EC(?). Open Drain, 100k on both planar and MXM. TH_PWM DP_D_L2# 220 EDP_TXN2_D 41
-VIDEO_THERM_ALERT: HIGH = full power, LOW = reduced power. Used for thermal management. From EC to MXM. Open Drain, 100k on both planar and MXM. DP_D_L2 EDP_TXP2_D 41
224
6 DP_D_L3# 226 EDP_TXN3_D 41
23,43,46 DGFX_PWRGD DGFX_PWRGD: HIGH = All power is stable on MXM. From MXM to PCH. Open Drain, 10k PU to VCC3B on planar and 100k PU on MXM. PWR_GOOD DP_D_L3 EDP_TXP3_D 41
MXM_ON 8
MXM_ON: HIGH = To power on MXM. From EC to MXM. Push-pull. PWR_EN
18 195
77 -VIDEO_POWER_LIMIT -VIDEO_POWER_LIMIT: HIGH = full power, LOW = reduced power. From EC to MXM. Open Drain, 100k PU to VCC3B on MXM. PWR_LEVEL LVDS_UTX0 193
LVDS_UTX0#
189
B 10 LVDS_UTX1 187 B
1 2 12 27MHZ_REF LVDS_UTX1#
18 MXM_ON_PCH GND_76 183
R1014 LVDS_UTX2 181
0_0402_5% LVDS_UTX2#
1 2 159 177
77 MXM_ON_EC JTAG_TDO LVDS_UTX3
161 175
@ R1015 163 JTAG_TDI LVDS_UTX3#
0_0402_5% 165 JTAG_TCLK 171
167 JTAG_TMS LVDS_UCLK 169
JTAG_TRST# LVDS_UCLK#
Leave as NC
Leave as NC
16 202
227 JTAG_TESTEN LVDS_LTX0 200
229 RSVD_2 LVDS_LTX0#
231 RSVD_3 196
233 RSVD_4 LVDS_LTX1 194
235 RSVD_5 LVDS_LTX1#
237 RSVD_6 190
238 RSVD_7 LVDS_LTX2 188
239 RSVD_8 LVDS_LTX2#
241 RSVD_9 184
243 RSVD_10 LVDS_LTX3 182
245 RSVD_11 LVDS_LTX3#
247 RSVD_12 178
249 RSVD_13 LVDS_LCLK 176
RSVD_14 LVDS_LCLK#

FOX_AS0B826-S55B-7H
ME@
A
N16E-Q1/-Q3/-Q5 N16M-Q2 A
MXM OEM /GPIO PIN3
Signal Name I/O Tpye Signal Name I/O Tpye

OEM4 GPU_EVENT# Bi-Dir GPU_EVENT# Bi-Dir

OEM5 GC6_FB_EN IN GC6_FB_EN IN

OEM6 GPIO19_STEREO OUT GPIO7_STEREO OUT Title


Security Classification LC Future Center Secret Data
OEM7 FRAMELOCK IN FRAMELOCK# IN MXM (2/2)
Issued Date 2015/07/16 Deciphered Date 2016/01/16
GPIO0 GPIO26 Tri-state NC(Default) NC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
GPIO1 NC NC GPIO1 Tri-state DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
GPIO2 GPIO25 Tri-state NC(Default) NC Date: Wednesday, December 07, 2016 Sheet 32 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


BLANK
Issued Date 2015/07/16 Deciphered Date 2016/01/16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 33 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


BLANK
Issued Date 2015/07/16 Deciphered Date 2016/01/16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 34 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


BLANK
Issued Date 2015/07/16 Deciphered Date 2016/01/16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 35 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


BLANK
Issued Date 2015/07/16 Deciphered Date 2016/01/16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 36 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

B
BLANK B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 37 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

B
BLANK B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 38 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

B
BLANK B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 39 of 111
5 4 3 2 1
5 4 3 2 1

-LID_CLOSE 1 6 1 6 USBP13-_COLOR_SENSOR

2 5 2 5
D D

-LEDLOGO 3 4 3 4 USBP13+_COLOR_SENSOR

EMC@ D47 @ D44


AOZ8904CIL_SOT23-6 AOZ8904CIL_SOT23-6

VCC3SW VCC3B VCC3M

VCC5B

2
100K_0402_5%
2
F4 F5

R157

0.5A_32V_ERBRD0R50X

0.5A_32V_ERBRD0R50X
COLOR SENSOR

1
F2
0.5A_32V_ERBRD0R50X
C C

2
JCAM1
VCC3M_F_LOGO_LED 30 34
29 30 GND4 33
28 29 GND3 32 JCS1
INDICATOR LED -SATALED_CONN 27 28 GND2 31 1
16 -SATALED_CONN 26 27 GND1 2 1
25 26 15 USBP13-_COLOR_SENSOR 3 2
MIC_DATA 24 25 15 USBP13+_COLOR_SENSOR 4 3
67 MIC_DATA MIC_CLK 23 24 4
67 MIC_CLK -INT_MIC_DTCT 22 23 5
19 -INT_MIC_DTCT 21 22 6 GND1
2D CAM/MIC/(LID) USBP8+_CAMERA_R 20 21 GND2
USBP8-_CAMERA_R 19 20 KYOCE_046811-604-000846
18 19 ME@
17 18
16 17
-LID_CLOSE 15 16
42,76 -LID_CLOSE VCC3SW 14 15
R784 2 1 3.3K_0402_5% 13 14
LOGO LED/LID 12 13
75 -LEDLOGO 11 12
10 11
9 10
8 9
7 8
6 7
5 6
4 5
3 4
2 3
B 1 2 B
1
FOX_GS12301-1011A-9H
ME@

USBP8+_CAMERA R680 1 2 0_0402_5% USBP8+_CAMERA_R -LID_CLOSE -LID_CLOSE


15 USBP8+_CAMERA

1 1
C255 C722
2200P_0402_25V7-K 2200P_0402_25V7-K
USBP8-_CAMERA R681 1 2 0_0402_5% USBP8-_CAMERA_R EMC@ EMC@
15 USBP8-_CAMERA 2 2

A A

For EMC
1 2 1 2 MIC_CLK Title
Security Classification LC Future Center Secret Data
@ C574 @ R644 Issued Date 2016/01/16 CAMERA/TOUCH/PWR BUTTON
10P_0402_50V8-J 33_0402_5%
2015/07/16 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 40 of 111
5 4 3 2 1
5 4 3 2 1

VCC3B Place near Pin Place near Pin Place near Pin
5,8 and 13 18 and 20 30,40 and 42

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

1U_0402_6.3V6-K
D
2 2 2 D

C256

C257

C258

C259
1 1 1

13
18
20
30
40
42
5
8
U6
2

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
42 EDP_TXP0 3 A0_P
42 EDP_TXN0 6 A0_N
42 EDP_TXP1 7 A1_P
42 EDP_TXN1 11 A1_N
42 EDP_TXP2 12 A2_P
42 EDP_TXN2 15 A2_N 9 -DGFX_OUTPUT_ENABLE
42 EDP_TXP3 16 A3_P SEL 41 -DGFX_OUTPUT_ENABLE 14
42 EDP_TXN3 A3_N XSD01 19
38 XSD23
32 EDP_TXP0_D 37 B0_P
32 EDP_TXN0_D 36 B0_N
32 EDP_TXP1_D 35 B1_P
dGPU -> 32 EDP_TXN1_D 29 B1_N
32 EDP_TXP2_D 28 B2_P
32 EDP_TXN2_D 27 B2_N
32 EDP_TXP3_D 26 B3_P
32 EDP_TXN3_D B3_N
34
6 EDP_TXP0_I 33 C0_P
6 EDP_TXN0_I 32 C0_N
6 EDP_TXP1_I 31 C1_P
iGPU -> 6 EDP_TXN1_I C1_N "-DGFX_OUTPUT_ENABLE" signal controls DOCK DP Bus switch
25
6 EDP_TXP2_I 24 C2_P
6 EDP_TXN2_I C2_N High : iGPU output is selected.
23 43
C 6 EDP_TXP3_I 22 C3_P THERMAL_PAD Low : dGPU output is selected. C

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
6 EDP_TXN3_I C3_N

SEL :(L,H) = (B -> A, C ->A)


CBTL04083ABS_HVQFN42_3P5X9 SEL :(L,H) = (dGPU, iGPU)

1
4
10
14
17
21
39
Aux
S : (L,H) = (nA to nB1, nA to nB2)
= (dGPU, iGPU)
DOCK DP Switch
Vendor Vendor PN LCFC PN
NXP CBTL04083ABS
Pericom PI3PCIE3412ZHE+DAX

from / to dGPU VCC5B


B from / to dGPU VCC5B B
from / to iGPU U8
16
from / to iGPU U7 Vcc 4
16 2 1A 7 EDP_AUXN 42
Vcc 4 32 EDP_AUXN_D 3 1B1 2A 9 EDP_AUXP 42
2 1A 7 VGA_BLON 75 6 EDP_AUXN_I 5 1B2 3A 12 EDP_HPD 42
32 VGA_BLON_D 3 1B1 2A 9 PANEL_POWER_ON 85 32 EDP_AUXP_D 6 2B1 4A
16 VGA_BLON_I 5 1B2 3A 12 PANEL_BKLT_CTRL 42 6 EDP_AUXP_I 11 2B2 15
32 PANEL_POWER_ON_D 6 2B1 4A 32 EDP_HPD_D 10 3B1 OE 1 -DGFX_OUTPUT_ENABLE
16 PANEL_POWER_ON_I 11 2B2 15 18 EDP_HPD_I 14 3B2 S
32 PANEL_BKLT_CTRL_D 10 3B1 OE 1 -DGFX_OUTPUT_ENABLE 13 4B1 8
16 PANEL_BKLT_CTRL_I 14 3B2 S 4B2 GND 17
13 4B1 8 T-PAD
4B2 GND 17 CBT3257ABQ_DHVQFN16_2P5X3P5
T-PAD

100K_0402_5%
CBT3257ABQ_DHVQFN16_2P5X3P5

1U_0402_6.3V6-K
R158
1U_0402_6.3V6-K

C260
2
C261

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 eDP DEMUX


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 41 of 111


5 4 3 2 1
5 4 3 2 1

VCC3M VINT20 VBL20

VCC3P F6
1 2
Q4

1 3A_32V_ERBRD3R00X
1 8
C262
2 7 0.01U_0402_25V7-K
2

2
D 3 6 D
R160
4 5 47_0402_5%

1
TPCF8002_2-3U1A

100_0402_5%
2
R161

2
VCC3P
D6
1

RB521CM-30 F7 0.9A

1
VCC3P_DRV VCC3LCD 1 2
85 VCC3P_DRV

0.01U_0402_25V7-K
3A_32V_ERBRD3R00X VBL20

0.1U_0402_25V6-K
2

1U_0402_6.3V6-K
2
C263 R162 1 2 1

C266
C264
0.068U_0402_25V7-K 47K_0402_5%

C265
1 2A

1
2 1 2

VCC3B VCC3B 1 1 1
C268 C269
C267 0.1U_0402_25V6-K 1U_0603_25V6-K
C 0.01U_0402_25V7-K C
VCC3P
LCD CONNECTOR 2 2 2

2
100K_0402_5%
1
F13
FRAME_LOCK FOR NVSR(Intel PSR)

R829

0.5A_32V_ERBRD0R50X
1
Mount R1002 R163
10K_0402_5%

1
2
Unmount R1036

2
JEDP1
32 R1002 1 @ 2 0_0402_5% FRAME_LOCK_R 40 45
FRAME_LOCK 40 G5
C272 1 2 0.1U_0402_25V6-K EDP_TXN3_CONN 39 44
41 EDP_TXN3 1 2 0.1U_0402_25V6-K EDP_TXP3_CONN 38 39 G4 43
C273
41 EDP_TXP3 37 38 G3 42
C270 1 2 0.1U_0402_25V6-K EDP_TXN2_CONN 36 37 G2 41
41 EDP_TXN2 1 2 0.1U_0402_25V6-K EDP_TXP2_CONN 35 36 G1
C274
41 EDP_TXP2 34 35
C271 1 2 0.1U_0402_25V6-K EDP_TXN1_CONN 33 34
41 EDP_TXN1 1 2 0.1U_0402_25V6-K EDP_TXP1_CONN 32 33
C275
41 EDP_TXP1 31 32
C276 1 2 0.1U_0402_25V6-K EDP_TXN0_CONN 30 31
41 EDP_TXN0 1 2 0.1U_0402_25V6-K EDP_TXP0_CONN 29 30
C277
41 EDP_TXP0 28 29
C278 1 2 0.1U_0402_25V6-K EDP_AUXP_CONN 27 28
41 EDP_AUXP 1 2 0.1U_0402_25V6-K EDP_AUXN_CONN 26 27
C279
41 EDP_AUXN 25 26
24 25
B 23 24 B
22 23
21 22
20 21
19 20
18 19
17 18
16 17
41 EDP_HPD 15 16
Test_Point_40MIL TP56 1 14 15
13 14
BACKLIGHT_ON 12 13
75 BACKLIGHT_ON PANEL_BKLT_CTRL 11 12
41 PANEL_BKLT_CTRL 10 11
9 10
Test_Point_40MIL TP57 1 8 9
7 8
6 7
VCC3B_F_TOUCH_PANEL 5 6
D46 1 2 RB521CM_30 -TOUCH_STOP 4 5
40,76 -LID_CLOSE 3 4
2 3
15 USBP10-_TOUCH 1 2
15 USBP10+_TOUCH 1
FOX_GS12401-1114S-9H
1

2 ME@
C280 R1036
1000P_0402_50V7-K 0_0402_5%
@
1
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 LCD CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 42 of 111
5 4 3 2 1
5 4 3 2 1

Circuit to turn on/off pull up resistors on AUXP/AUXN to support DP dongles.

DP_DGL_DTCT DP MODE 2SK3541 RTM002 AUXP/N

LOW DP (Native) OFF OFF No pull-up


HIGH TMDS (Dongle) ON ON Pull up to 4.7k
VCC3B

1U_0402_6.3V6-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.01U_0402_25V7-K

0.01U_0402_25V7-K
D
2 2 2 2 D

C283

C282

C284

C285

C286
1 1 1 1 U9

VCC3B 5 50
21 VDD33_1 OUT1_D0p 49 SYSTEM_DP0P 54
30 VDD33_2 OUT1_D0n 47 SYSTEM_DP0N 54
51 VDD33_3 OUT1_D1p 46 SYSTEM_DP1P 54
57 VDD33_4 OUT1_D1n 45 SYSTEM_DP1N 54
VCC3B
VDD33_5 OUT1_D2p 44 SYSTEM_DP2P 54
OUT1_D2n SYSTEM_DP2N 54

2
42
EXT_DP_HPD 3 OUT1_D3p 41 SYSTEM_DP3P 54
@ R228
14,32 EXT_DP_HPD DP_DGL_DTCT 4 IN_HPD OUT1_D3n SYSTEM_DP3N 54
4.7K_0402_5%
IN_CA_DET

3
S
C290 2 1 0.1U_0402_16V7-K EXT_DP0P_C 6 40
1

32 EXT_DP0P 2 1 EXT_DP0N_C 7 IN_D0p OUT2_D0p 39 DOCK_DP0P 74


C291 0.1U_0402_16V7-K
mDP_Control_Circuit 2
G 32 EXT_DP0N 2 1 EXT_DP1P_C 9 IN_D0n OUT2_D0n 37 DOCK_DP0N 74
@ Q37 C292 0.1U_0402_16V7-K
32 EXT_DP1P 2 1 EXT_DP1N_C 10 IN_D1p OUT2_D1p 36 DOCK_DP1P 74
RTM002P02GT2L_VMT3 C293 0.1U_0402_16V7-K
32 EXT_DP1N 2 1 EXT_DP2P_C 12 IN_D1n OUT2_D1n 35 DOCK_DP1N 74
D C294 0.1U_0402_16V7-K

1
32 EXT_DP2P IN_D2P OUT2_D2p DOCK_DP2P 74

3
1

S
D C295 2 1 0.1U_0402_16V7-K EXT_DP2N_C 13 34
2 32 EXT_DP2N 2 1 EXT_DP3P_C 15 IN_D2n OUT2_D2n 32 DOCK_DP2N 74
C296 0.1U_0402_16V7-K
G 2
G 32 EXT_DP3P 2 1 EXT_DP3N_C 16 IN_D3p OUT2_D3p 31 DOCK_DP3P 74
@ Q40 C297 0.1U_0402_16V7-K
32 EXT_DP3N IN_D3n OUT2_D3n DOCK_DP3N 74
RTM002P02GT2L_VMT3
mDP_HDMI_PU_OUTPUT

S 1 D 27
3

EXT_AUXP_C OUT1_AUXn_SDA SYSTEM_AUXN 54


@ Q36 C298 2 1 0.1U_0402_16V7-K 24 26
32 EXT_AUXP EXT_AUXN_C IN_AUXp OUT1_AUXp_SCL SYSTEM_AUXP 54
LSK3541G1ET2L_VMT3 C299 2 1 0.1U_0402_16V7-K 25 29
32 EXT_AUXN IN_AUXn OUT2_AUXn_SDA 28 DOCK_AUXN 74
EXT_AUXP OUT2_AUXp_SCL DOCK_AUXP 74
R168 2 1 4.7K_0402_5% 22
EXT_AUXN_PU_3V3 R164 2 1 4.7K_0402_5% EXT_AUXN 23 IN_DDC_SCL
IN_DDC_SDA
OUT1/2_HPD has internal PD 150K
48
C OUT1_HPD 38 SYSTEM_DP_HPD 54 C
2 OUT2_HPD DOCK_DP_HPD 74
Test_Point_20MIL I2C_CTL_EN 43
1 PS8338_PI1 1 OUT1_CA_DET 33 SYSTEM_DP_DGL_DTCT 54
TP2
R1064 1 2 0_0201_5% PS8338_PI0 60 PI1/SCL_CTL OUT2_CA_DET
PI0/SDA_CTL
74LVC1G08GW_SOT353-1-5

R1065 1 2 0_0201_5% EXT_AUXP_PU_3V3 VCC3B 56 PS8338_PC10


17 PC10 55 PS8338_PC11
20 CEXT PC11 54 PS8338_PC20
REXT PC20 53 PS8338_PC21
PC21
5

R154 1 2 4.7K_0402_5% 59 8 PS8338_PEQ


VCC3B 58 CFG0 PEQ
Y
VCC

CFG1 11
GND1 19
14 GND2 52
GND

PD GND3

2
U39

R165 1 2 4.7K_0402_5% 18 61
SW EPAD
B

R167

2.2U_0402_6.3V6-M
1M_0402_5%
1

2
1 PS8338BQFN60GTR-A1_QFN60_5X9

1
C281
R166
4.99K_0402_1%
23,32,46 DGFX_PWRGD 2

1
DP_DGL_DTCT

B B
VCC3B Mount R229, R235 LLEQ, Compensate Channel loss up to 8.5db@HBR2
PS8338 Pin3(IN_HPD) Mount R234 Automatic EQ Disable.
have internal PD resistor
don't need external PD resistor(R476). R229 1 2 4.7K_0402_5% PS8338_PEQ R235 1 2 4.7K_0402_5%

EXT_DP_HPD
R230 1 @ 2 4.7K_0402_5% PS8338_PC10 R236 1 @ 2 4.7K_0402_5%
2

R231 1 @ 2 4.7K_0402_5% PS8338_PC11 R237 1 @ 2 4.7K_0402_5%


R476
100K_0402_5%
@ R232 1 @ 2 4.7K_0402_5% PS8338_PC20 R238 1 @ 2 4.7K_0402_5%
1

R233 1 @ 2 4.7K_0402_5% PS8338_PC21 R239 1 @ 2 4.7K_0402_5%

R234 1 2 4.7K_0402_5% PS8338_PI0

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DP DEMUX


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 43 of 111


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DISPLAY PORT CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 44 of 111
5 4 3 2 1
5 4 3 2 1

D12 SP3012-04UTG-1_MO-229

VCC5B VCC5B_HDMI

9 1
VCC5B_HDMI HDMI_HPD HDMI_HPD VCC5B_HDMI
8 2
HDMI_DAT 7 4 HDMI_DAT U13
HDMI_CLK 6 5 HDMI_CLK
1 6
IN OUT

4.7U_0402_6.3V6-M
2 4 5
FAULT ILIM
1

C303
EMC@ C302 3 2

3
EN GND

1
D D
0.1U_0402_25V6-K
1 R169
49.9K_0402_1% 2
TPS2553DBVR_SOT23-6
VCC3B

2
D13 SP3012-04UTG-1_MO-229

1
HDMI_TX0+_CON 9 1 HDMI_TX0+_CON

2
R170

G
HDMI_TX0-_CON 8 2 HDMI_TX0-_CON
HDMI_TXC+_CON 7 4 HDMI_TXC+_CON 1M_0402_5% Q5
HDMI_TXC-_CON 6 5 HDMI_TXC-_CON LSK3541G1ET2L_VMT3

D
3 1
46 TBT_SRC_DPHPD

VCC5B_HDMI

2
EMC@ VCC3B

3
R171
20K_0402_5%
No need diode here because TPS2553 has

2
reverse voltage protection function.

1
D14 SP3012-04UTG-1_MO-229 R172

2
G
1.5K_0402_1%
Q6
LSK3541G1ET2L_VMT3

2
HDMI_TX1+_CON 9 1 HDMI_TX1+_CON

D
HDMI_TX1-_CON HDMI_TX1-_CON 3 1
8 2 46 TBT_HDMI_DDC_DAT R173 R174
HDMI_TX2+_CON 7 4 HDMI_TX2+_CON 1.5K_0402_1% 1.5K_0402_1%
HDMI_TX2-_CON 6 5 HDMI_TX2-_CON

1
C C
VCC3B HDMI CONN.
EMC@
6Gbps
3

2
JHDMI1
R175

2
HDMI_HPD 19

G
1.5K_0402_1% 18 HP_DET
Q7
LSK3541G1ET2L_VMT3 17 +5V
HDMI_DAT 16 DDC/CEC_GND

1
HDMI_CLK SDA

D
3 1 15
46 TBT_HDMI_DDC_CLK SCL
14
13 Reserved
HDMI_TXC-_CON 12 CEC
11 CK-
HDMI_TXC+_CON 10 CK_shield
HDMI_TX0-_CON 9 CK+
8 D0-
C304 1 2 0.1U_0402_25V6-K H_HDMI_TXC- HDMI_TX0+_CON 7 D0_shield
46 TBT_SRC_DP3N H_HDMI_TXC+ HDMI_TX1-_CON 6 D0+
C305 1 2 0.1U_0402_25V6-K
46 TBT_SRC_DP3P 5 D1-
C306 1 2 0.1U_0402_25V6-K H_HDMI_TX0- HDMI_TX1+_CON 4 D1_shield 20
46 TBT_SRC_DP2N H_HDMI_TX0+ HDMI_TX2-_CON 3 D1+ GND1 21
C307 1 2 0.1U_0402_25V6-K
46 TBT_SRC_DP2P 2 D2- GND2 22
C308 1 2 0.1U_0402_25V6-K H_HDMI_TX1- HDMI_TX2+_CON 1 D2_shield GND3 23
46 TBT_SRC_DP1N H_HDMI_TX1+ D2+ GND4
C309 1 2 0.1U_0402_25V6-K
46 TBT_SRC_DP1P
ALLTO_C128D1-K1909-L
C310 1 2 0.1U_0402_25V6-K H_HDMI_TX2- ME@
46 TBT_SRC_DP0N H_HDMI_TX2+
C311 1 2 0.1U_0402_25V6-K
46 TBT_SRC_DP0P

B B

EMC Parts
4
3
2
1

4
3
2
1

RP1 RP2 R1070 2 @ 1 22_0402_5% R1072 2 @ 1 22_0402_5%


470_0804_8P4R_5% 470_0804_8P4R_5%
L2 EMC@ L4 EMC@
5
6
7
8

5
6
7
8

H_HDMI_TXC- 4 3 HDMI_TXC-_CON H_HDMI_TX1- 4 3 HDMI_TX1-_CON


VCC3B HDMI_PD_SW 4 3 4 3

H_HDMI_TXC+ 1 2 HDMI_TXC+_CON H_HDMI_TX1+ 1 2 HDMI_TX1+_CON


1 2 1 2
1

D EXC24CH900U_4P EXC24CH900U_4P
2 Q8 SM070003X00 SM070003X00
G LSK3541G1ET2L_VMT3

S R1071 2 @ 1 22_0402_5% R1073 2 @ 1 22_0402_5%


3

R1074 2 @ 1 22_0402_5% R1076 2 @ 1 22_0402_5%

L3 EMC@ L5 EMC@
H_HDMI_TX0- 4 3 HDMI_TX0-_CON H_HDMI_TX2- 4 3 HDMI_TX2-_CON
4 3 4 3

H_HDMI_TX0+ 1 2 HDMI_TX0+_CON H_HDMI_TX2+ 1 2 HDMI_TX2+_CON


1 2 1 2
EXC24CH900U_4P EXC24CH900U_4P
A SM070003X00 SM070003X00 A

R1075 2 @ 1 22_0402_5% R1077 2 @ 1 22_0402_5%

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 HDMI CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 45 of 111
5 4 3 2 1
5 4 3 2 1

VCC3V3_LC
U14A VCC3_TBT
C312 1 2 0.22U_0201_6.3V6-K PET0_P V23 Y23 PCIE5_L0_TBT_TXP
15 PCIE5_L0_TBT_RXP 1 2 0.22U_0201_6.3V6-K PET0_N V22 PCIE_TX0_P PCIE_RX0_P Y22 PCIE5_L0_TBT_TXN PCIE5_L0_TBT_TXP 15
C315
15 PCIE5_L0_TBT_RXN PCIE_TX0_N PCIE_RX0_N PCIE5_L0_TBT_TXN 15

CPU PCIE TX
CPU PCIE RX
4
3
2
1

1
C316 1 2 0.22U_0201_6.3V6-K PET1_P P23 T23 PCIE5_L1_TBT_TXP
15 PCIE5_L1_TBT_RXP 1 2 0.22U_0201_6.3V6-K PET1_N P22 PCIE_TX1_P PCIE_RX1_P T22 PCIE5_L1_TBT_TXN PCIE5_L1_TBT_TXP 15
RP3 C313 R189

PCIe GEN3
15 PCIE5_L1_TBT_RXN PCIE_TX1_N PCIE_RX1_N PCIE5_L1_TBT_TXN 15
10K_0804_8P4R_5% 10K_0402_5%
C317 1 2 0.22U_0201_6.3V6-K PET2_P K23 M23 PCIE5_L2_TBT_TXP
15 PCIE5_L2_TBT_RXP 1 2 0.22U_0201_6.3V6-K PET2_N K22 PCIE_TX2_P PCIE_RX2_P M22 PCIE5_L2_TBT_TXN PCIE5_L2_TBT_TXP 15
C318

5
6
7
8

2
TBT_TDI 15 PCIE5_L2_TBT_RXN PCIE_TX2_N PCIE_RX2_N PCIE5_L2_TBT_TXN 15
TBT_TMS C319 1 2 0.22U_0201_6.3V6-K PET3_P F23 H23 PCIE5_L3_TBT_TXP
TBT_TCK 15 PCIE5_L3_TBT_RXP 1 2 0.22U_0201_6.3V6-K PET3_N F22 PCIE_TX3_P PCIE_RX3_P H22 PCIE5_L3_TBT_TXN PCIE5_L3_TBT_TXP 15
C314
TBT_TDO 15 PCIE5_L3_TBT_RXN PCIE_TX3_N PCIE_RX3_N PCIE5_L3_TBT_TXN 15
-PLTRST_FAR_TBT L4 V19 PCIE8_CLK_100M_TBT
PERST_N PCIE_REFCLK_100_IN_P T19 -PCIE8_CLK_100M_TBT PCIE8_CLK_100M_TBT 20
PCIe_RBIAS N16 PCIE_REFCLK_100_IN_N TBT_PCIE_CLKREQ_N -PCIE8_CLK_100M_TBT 20
R190 2 1 3.01K_0402_1% AC5 1 @ 2
PCIE_RBIAS PCIE_CLKREQ_N -CLKREQ_PCIE8_TBT 20
C750 1 @ 2 1.5P_0201_25V8-B
D Y3_XTAL_OUT_R R187 1 TBT_XTAL_25_OUT D
2 0_0402_5% R2 AB7 DPSNK0_ML0_P C320 2 1 0.1U_0201_6.3V6-K R866
45 TBT_SRC_DP0P R1 DPSRC_ML0_P DPSNK0_ML0_P AC7 DPSNK0_ML0_N 2 1 TBT_SNK0_DP0P 32
C321 0.1U_0201_6.3V6-K 0_0201_5%
TBT_XTAL_25_IN 45 TBT_SRC_DP0N DPSRC_ML0_N DPSNK0_ML0_N TBT_SNK0_DP0N 32
C751 1 @ 2 1.5P_0201_25V8-B
Y3 25MHZ_18PF_8Y25000004 N2 AB9 DPSNK0_ML1_P C322 2 1 0.1U_0201_6.3V6-K
45 TBT_SRC_DP1P N1 DPSRC_ML1_P DPSNK0_ML1_P AC9 DPSNK0_ML1_N C323 2 1 TBT_SNK0_DP1P 32
0.1U_0201_6.3V6-K
1 3 45 TBT_SRC_DP1N DPSRC_ML1_N DPSNK0_ML1_N TBT_SNK0_DP1N 32
C752 1 @ 2 1.5P_0201_25V8-B

SOURCE PORT 0
To HDMI
1 3 L2 AB11 DPSNK0_ML2_P C324 2 1 0.1U_0201_6.3V6-K

SINK PORT 0
GND1 GND2 45 TBT_SRC_DP2P L1 DPSRC_ML2_P DPSNK0_ML2_P AC11 DPSNK0_ML2_N 2 1 TBT_SNK0_DP2P 32
C325 0.1U_0201_6.3V6-K VCC3_TBT

MXM
45 TBT_SRC_DP2N DPSRC_ML2_N DPSNK0_ML2_N TBT_SNK0_DP2N 32
C753 1 @ 2 1.5P_0201_25V8-B
2 4 J2 AB13 DPSNK0_ML3_P C326 2 1 0.1U_0201_6.3V6-K

0.1U_0402_16V7-K
1 1 45 TBT_SRC_DP3P DPSRC_ML3_P DPSNK0_ML3_P TBT_SNK0_DP3P 32
J1 AC13 DPSNK0_ML3_N C328 2 1 0.1U_0201_6.3V6-K R1027 close to U41 1
45 TBT_SRC_DP3N DPSRC_ML3_N DPSNK0_ML3_N TBT_SNK0_DP3N 32
C327 C329
TP11 TBT_SRC_AUXP Y11 DPSNK0_AUX_P

@ C755
27P_0402_50V8-J 27P_0402_50V8-J 1 Test_Point_20MIL W19 R1027 1 2 0_0201_5%
2 2 TP12 1 Test_Point_20MIL TBT_SRC_AUXN Y19 DPSRC_AUX_P DPSNK0_AUX_P W11 DPSNK0_AUX_N
DPSRC_AUX_N DPSNK0_AUX_N 2
TBT_SRC_DPHPD G1 AA2
45 TBT_SRC_DPHPD DPSRC_HPD DPSNK0_HPD TBT_SNK0_DPHPD 14,32
VCC3_TBT R191 2 1 14K_0402_1% DPSRC_RBIAS N6 Y5 TBT_SNK0_DDC_CLK

3GND VCC 5
DPSRC_RBIAS DPSNK0_DDC_CLK R4 TBT_SNK0_DDC_DATA
TXC 8Y25000004 DPSNK0_DDC_DATA
U1 1
KDS 1ZZHAE25000CC0F 52,53 TBT_I2C_SDA
U2 GPIO_0 AB15 DPSNK1_ML0_P NC -PLTRST_FAR_TBT
10K_0402_5% 52,53 TBT_I2C_SCL GPIO_1 DPSNK1_ML0_P
C332 2 1 0.1U_0201_6.3V6-K
TBT_SNK1_DP0P 32 Y 4
1

TBT_WP_N V1 AC15 DPSNK1_ML0_N C333 2 1 0.1U_0201_6.3V6-K 2


TBT_GPIO_2 GPIO_2 DPSNK1_ML0_N TBT_SNK1_DP0N 32 14,24,52,53,56,60,62 -PLTRST_FAR A
R790

R193 1 2 100K_0402_5% V2

LC GPIO
W1 GPIO_3 AB17 DPSNK1_ML1_P C334 2 1 0.1U_0201_6.3V6-K @ U41
17,54,61,84 -PCIE_WAKE W2 GPIO_4 DPSNK1_ML1_P AC17 DPSNK1_ML1_N C335 TBT_SNK1_DP1P 32
2 1 0.1U_0201_6.3V6-K SN74AUP1G07DCKR_SC-70
23 -CIO_PLUG_EVENT Y1 GPIO_5 DPSNK1_ML1_N TBT_SNK1_DP1N 32
2

45 TBT_HDMI_DDC_DAT Y2 GPIO_6 AB19 DPSNK1_ML2_P C336 2 1 0.1U_0201_6.3V6-K


45 TBT_HDMI_DDC_CLK TBT_SRC_CFG1 AA1 GPIO_7 DPSNK1_ML2_P AC19 DPSNK1_ML2_N TBT_SNK1_DP2P 32
AR/PC COMMON FLASH C337 2 1 0.1U_0201_6.3V6-K

SINK PORT 1

MXM
J4 GPIO_8 DPSNK1_ML2_N TBT_SNK1_DP2N 32
52 TBTA_I2C_INT E2 POC_GPIO_0 AB21 DPSNK1_ML3_P C338 2 1 0.1U_0201_6.3V6-K
53 TBTB_I2C_INT 2 100K_0402_5%TBT_POC_GPIO_2 POC_GPIO_1 DPSNK1_ML3_P AC21 DPSNK1_ML3_N C339 TBT_SNK1_DP3P 32
R812 1 D4 2 1 0.1U_0201_6.3V6-K VCC3_TBT

POC GPIO
H4 POC_GPIO_2 DPSNK1_ML3_N TBT_SNK1_DP3N 32
23 TBT_FORCE_ON -BATLOW_TBT F2 POC_GPIO_3 Y12 DPSNK1_AUX_P
VCC3_TBT R861 close to U42

0.1U_0402_16V7-K
-PCH_SLP_S3_TBT D2 POC_GPIO_4 DPSNK1_AUX_P W12 DPSNK1_AUX_N
POC_GPIO_5 DPSNK1_AUX_N 1
R811 1 2 10K_0402_5% TBT_POC_GPIIO_6 F1
POC_GPIO_6

@ C756
Y6 R861 1 2 0_0201_5%
2 R199 TBT_TEST_EN DPSNK1_HPD TBT_SNK1_DPHPD 14,32
100_0402_5% 1 E1
TEST_EN Y8 TBT_SNK1_DDC_CLK R614 1 2 100K_0402_5% 2
100_0402_5% 1 2 R200 TBT_TEST_PWG AB5 DPSNK1_DDC_CLK N4 TBT_SNK0_CONFIG1

Misc
C
TEST_PWR_GOOD DPSNK1_DDC_DATA C

3GND VCC 5
F4 Y18 DPSNK_RBIAS R201 2 1 14K_0402_1%
52 TBT_RESET_N RESET_N DPSNK_RBIAS 1
TBT_XTAL_25_IN D22 Y4 TBT_TDI D83 RB521CM-30 NC 4 -BATLOW_TBT
XTAL_25_IN TDI Y
TBT_XTAL_25_OUT D23 V4 TBT_TMS 2 1 -BATLOW_UU 2
XTAL_25_OUT TMS T4 TBT_TCK 17,77 -BATLOW A
TBT_EE_DI AB3 TCK W4 TBT_TDO @ U42
52 TBT_EE_DI EE_DI MISC TDO
TBT_EE_DO AC4 R202 +/-0.5% 1 2 SN74AUP1G07DCKR_SC-70
52 TBT_EE_DO TBT_EE_CS_N EE_DO TBT_RBIAS
AC3 H6 2 1 4.75K_0402_0.5%
52 TBT_EE_CS_N TBT_EE_CLK AB4 EE_CS_N RBIAS J6 TBT_RSENSE R865 VCC3_TBT
52 TBT_EE_CLK EE_CLK RSENSE 10K_0402_5%
TBTB_CA2HD_1_P B7 A15 TBTA_CA2HD_1_P R862 close to U43

0.1U_0402_16V7-K
53 TBTB_CA2HD_1_P TBTB_CA2HD_1_N A7 PB_RX1_P PA_RX1_P B15 TBTA_CA2HD_1_N TBTA_CA2HD_1_P 52
53 TBTB_CA2HD_1_N PB_RX1_N PA_RX1_N TBTA_CA2HD_1_N 52 1
R862 1 2 0_0201_5%
0.22U_0201_6.3V6-K TBTB_TX1_P TBTA_TX1_P

@ C757
C343 1 2 A9 A17 C344 1 2 0.22U_0201_6.3V6-K
53 TBTB_HD2CA_1_P PB_TX1_P PA_TX1_P TBTA_HD2CA_1_P 52
C345 1 2 0.22U_0201_6.3V6-K TBTB_TX1_N B9 B17 TBTA_TX1_N C346 1 2 0.22U_0201_6.3V6-K
53 TBTB_HD2CA_1_N PB_TX1_N PA_TX1_N TBTA_HD2CA_1_N 52 17,76,84,95 -PCH_SLP_S3 2
C347 1 2 0.22U_0201_6.3V6-K TBTB_TX0_P A11 A19 TBTA_TX0_P C348 1 2 0.22U_0201_6.3V6-K
53 TBTB_HD2CA_0_P TBTA_HD2CA_0_P 52
TBT PORT B

C349 1 2 0.22U_0201_6.3V6-K TBTB_TX0_N B11 PB_TX0_P PA_TX0_P B19 TBTA_TX0_N C350 1 2 0.22U_0201_6.3V6-K
53 TBTB_HD2CA_0_N PB_TX0_N PA_TX0_N TBTA_HD2CA_0_N 52 2 1

3GND VCC 5
TBTB_CA2HD_0_P A13 B21 TBTA_CA2HD_0_P

TBT PORTS
53 TBTB_CA2HD_0_P TBTB_CA2HD_0_N PB_RX0_P PA_RX0_P A21 TBTA_CA2HD_0_N TBTA_CA2HD_0_P 52
B13 D84 RB521CM-30 1
53 TBTB_CA2HD_0_N PB_RX0_N PA_RX0_N TBTA_CA2HD_0_N 52 NC -PCH_SLP_S3_TBT
4

PORT B

Port A
Y
C351 2 1 0.1U_0201_6.3V6-K TBTB_AUX_P Y16 Y15 TBTA_AUX_P C352 2 1 0.1U_0201_6.3V6-K 1 2 -PCH_SLP_S3_UU 2
53 TBTB_DPSRC_AUX_P PB_DPSRC_AUX_P PA_DPSRC_AUX_P TBTA_DPSRC_AUX_P 52 A
C353 2 1 0.1U_0201_6.3V6-K TBTB_AUX_N W16 W15 TBTA_AUX_N C354 2 1 0.1U_0201_6.3V6-K
53 TBTB_DPSRC_AUX_N PB_DPSRC_AUX_N PA_DPSRC_AUX_N TBTA_DPSRC_AUX_N 52
R863 @ U43
TBTB_USB2_D_P E19 E20 TBTA_USB2_D_P 10K_0402_5% SN74AUP1G07DCKR_SC-70
53 TBTB_USB2_D_P PB_USB2_D_P PA_USB2_D_P TBTA_USB2_D_P 52
TBTB_USB2_D_N D19 D20 TBTA_USB2_D_N
53 TBTB_USB2_D_N PB_USB2_D_N PA_USB2_D_N TBTA_USB2_D_N 52
TBTB_LSTX B4 A5 TBTA_LSTX
53 TBTB_LSTX TBTB_LSRX PB_LSTX PA_LSTX TBTA_LSRX TBTA_LSTX 52
B5 A4
53 TBTB_LSRX TBTA_LSRX 52

POC
PB_LSRX PA_LSRX

POC
TBTB_HPD G2 M4 TBTA_HPD VCC3_FLASH
53 TBTB_HPD PB_DPSRC_HPD PA_DPSRC_HPD TBTA_HPD 52
R203 2 1 PB_USB2_RBIAS F19 H19 PA_USB2_RBIAS R204 2 1 499_0402_1%
PB_USB2_RBIAS PA_USB2_RBIAS
2
499_0402_1% D6 AC23
MONDC_SVR THERMDA_1 AB23 C341
A23 THERMDA_2
ATEST_P
Leave as NC 0.1U_0402_16V7-K

8
B23 V18 U15 1
ATEST_N PCIE_ATEST
PU on -PCIE_WAKE is VCC3_TBT Leave as NC

VCC
B B
placed on PCH page. E18 DEBUG AC1
USB2_ATEST TEST_EDM
W13 L15 TBT_EE_CS_N 1 5 TBT_EE_DI
-CIO_PLUG_EVENT R344 2 1 10K_0402_5% MONDC_DPSNK_0 FUSE_VQPS_64 N15 /CS DI(IO0)
-BATLOW_TBT R345 2 1 10K_0402_5% W18 FUSE_VQPS_128
@ PU on -PCH_SLP_S3 MONDC_DPSNK_1
-PCH_SLP_S3_TBT R858 1 @ 2 10K_0402_5% is not required. C23 TBT_EE_DO 2 6 TBT_EE_CLK
AB2 MONDC_CIO_0 C22 DO(IO1) CLK
TBT_I2C_SDA R209 2 1 2.2K_0402_5% MONDC_DPSRC MONDC_CIO_1
TBT_I2C_SCL R210 2 1 2.2K_0402_5% DSL6540-SLL44-C0_FC-CSP337 TBT_WP_N 3 7 TBT_HOLD_N
TBTA_I2C_INT R211 1 2 10K_0402_5% /WP(IO2) /HOLD(IO3)
TBTB_I2C_INT R212 1 2 10K_0402_5%
VCC3_FLASH
For EMC

GND
5 4 TBT_EE_CS_N
TBT_FORCE_ON R347 1 2 10K_0402_5% 1 2 C457_R640 1 2 TBT_EE_CLK 6 3 TBT_EE_DO
7 2 TBT_WP_N W25Q80BLSNIG_SO8

4
TBTA_HPD R530 1 2 100K_0402_5% @ C457 @ R640 8 1 TBT_HOLD_N
TBTB_HPD R531 1 2 100K_0402_5% 10P_0402_50V8-J 33_0402_5%
RP10
TBT_SRC_DPHPD R215 1 2 100K_0402_1% 2.2K_0804_8P4R_5%
VCC5B
TBT_SNK0_DPHPD
TBT_SNK1_DPHPD
R216 1
R217 1
2 100K_0402_1%
2 100K_0402_1%
Alpine Ridge U37
16
TBTA_LSTX R218 1 2 1M_0402_5% Vcc 4 TBT_SNK0_AUXP_U R833 1 2 0_0201_5%
TBTA_LSRX DPSNK0_AUX_P DPSNK0_AUX_P_U 2 1A 7 TBT_SNK0_AUXN_U R834 1 2 0_0201_5% TBT_SNK0_AUXP 32 from / to
R220 1 2 1M_0402_5% C711 2 1 0.1U_0201_6.3V6-K
DPSNK0_AUX_N C712 2 1 0.1U_0201_6.3V6-K SNK0_DDC_CLK_U 3 1B1 2A 9
TBT_SNK0_AUXN 32 dGPU DP_A
TBTB_LSTX R221 1 2 1M_0402_5% DPSNK0_AUX_N_U 5 1B2 3A 12
TBTB_LSRX SINK0 SNK0_DDC_DATA_U 6 2B1 4A
R223 1 2 1M_0402_5%
TBT_SNK0_DDC_CLK R836 1 2 0_0201_5% 11 2B2 15
TBT_SNK0_DDC_DATA R837 1 2 0_0201_5% 10 3B1 OE 1 TBT_SNK0_CONFIG1
3B2 S SINK0_CONFIG1
14
13 4B1 8 VCC5B is Off : Low
1U_0402_6.3V6-K

4B2 GND 17
T-PAD VCC5B is ON :
C713

VCC3_TBT
CBT3257ABQ_DHVQFN16_2P5X3P5 Low : AUX (Displayport)
TBT_SNK0_CONFIG1 1 5
High : DDC (HDMI1.4)
B VCC
A
23,32,43 DGFX_PWRGD
2
A
S : (L,H) = (nA to nB1, nA to nB2) A

3 4 TBT_AUX_PU_SOURCE
100K_0402_5%

GND Y
1

SINK1 DPSNK1_AUX_P C714 2 1 0.1U_0201_6.3V6-K


2.2K_0402_5%

from / to
2.2K_0402_5%
R835

TBT_SNK1_AUXP 32
2

U44 DPSNK1_AUX_N C715 2 1 0.1U_0201_6.3V6-K


TBT_SNK1_AUXN 32 dGPU DP_B
R206

R205

74LVC1G08GW_SOT353-1-5
TBT_SNK0_DDC_CLK R856 1 @ 2 0_0201_5% TBT_SNK0_AUXP
2

TBT_SNK0_DDC_DATA R857 1 @ 2 0_0201_5% TBT_SNK0_AUXN


1

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Alpine Ridge (1/6)


TBT_SNK0_DDC_CLK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
TBT_SNK0_DDC_DATA Size Document Number Rev

WWW.AliSaler.Com
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 46 of 111


5 4 3 2 1
5 4 3 2 1

IN from outside of Alpine Ridge

VCC3V3_LC VCC3V3_S0

D MAX MAX D
0.1A 0.9A
Internal Use (TBD) (TBD)
OUT
VCC0R9_TBT_DP
VCC0R9_TBT_CIO VCC0R9_TBT_USB VCC0R9_TBT_PCIE VCC0R9_TBT_DP VCC3_TBT VCC3_TBT

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

10U_0603_6.3V6-M

10U_0603_6.3V6-M
10U_0603_6.3V6-M

10U_0603_6.3V6-M
0.1U_0402_16V7-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1 1 1 1 1

C356

C357

C358

C359

C360

C361

C366

C367

C368
C355

C369

C371

C372
C370

C373
2 2 2 2 2

R13
R6

H9
F8
U14B
L8 A2

VCC3P3_SX

VCC3P3_S0

VCC3P3A
VCC3P3_LC
VCC0R9_TBT_USB L11 VCC0P9_DP_1 VCC3P3_SVR_1 A3
L12 VCC0P9_DP_2 VCC3P3_SVR_2 B3
M8 VCC0P9_DP_3 VCC3P3_SVR_3
T11 VCC0P9_DP_4 VCC 0.9V from SVR (Step Voltage Regulator)
VCC0P9_DP_5 IN
1U_0402_6.3V6-K
1U_0402_6.3V6-K

T12 L9
L6 VCC0P9_DP_6 VCC0P9_SVR_1 M9

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K
M6 VCC0P9_ANA_DPSRC_1 VCC0P9_SVR_2 E12
VCC0P9_ANA_DPSRC_2 VCC0P9_SVR_ANA_1
C377

C383

C384

C385

C387

@ C767
C374

C386
V11 E13
V12 VCC0P9_ANA_DPSNK_1 VCC0P9_SVR_ANA_2 F11
V13 VCC0P9_ANA_DPSNK_2 VCC0P9_SVR_ANA_3 F12
VCC0P9_ANA_DPSNK_3 VCC0P9_SVR_ANA_4 F13
M13 VCC0P9_SVR_ANA_5 F15
M15 VCC0P9_PCIE_1 VCC0P9_SVR_ANA_6 J9
M16 VCC0P9_PCIE_2 VCC0P9_SVR_SENSE
VCC0P9_PCIE_3 OUT
L19 L6
VCC0R9_TBT_PCIE N19 VCC0P9_ANA_PCIE_1_1 C1 TBT_SVR_IND 1 2 VCC0R9_TBT_SVR
L18 VCC0P9_ANA_PCIE_1_2 SVR_IND_1 C2

47U_0603_6.3V6-M

47U_0603_6.3V6-M
47U_0603_6.3V6-M

47U_0603_6.3V6-M
0.6UH_CMME051B-R60MS_7A_20%
M18 VCC0P9_ANA_PCIE_2_1 SVR_IND_2 D1
C N18 VCC0P9_ANA_PCIE_2_2 SVR_IND_3 C
VCC0P9_ANA_PCIE_2_3 1 1 1 1
1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

C390

C391
C388

C389
XFL4012-601MEC

VCC
R15 A1
R16 VCC0P9_USB_1 SVR_VSS_1 B1
VCC0P9_USB_2 SVR_VSS_2 2 2 2 2
C393

C394
C392

C395

C376

B2
R8 SVR_VSS_3
R9 VCC0P9_CIO_1
R11 VCC0P9_CIO_2
R12 VCC0P9_CIO_3 F18 VCC0R9_TBT_LVR
VCC0P9_CIO_4 VCC0P9_LVR_1 H18
VCC3_TBT_ANA_PCIE L16 VCC0P9_LVR_2 J11 VCC 0.9V from LVR (Linear Voltage Regulator)
VCC3_TBT_ANA_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR_3 H11 Internal Use
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE

1U_0402_6.3V6-K

1U_0402_6.3V6-K
VCC0R9_TBT_CIO A6 V5
A8 VSS_ANA_1 VSS_ANA_81 V6

10U_0603_6.3V6-M
10U_0603_6.3V6-M

1U_0402_6.3V6-K
1U_0402_6.3V6-K
A10 VSS_ANA_2 VSS_ANA_82 V8
VSS_ANA_3 VSS_ANA_83 1 1

C399

C400

C404
C403
A12 V9
VSS_ANA_4 VSS_ANA_84
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

C402
C401
A14 V15
A16 VSS_ANA_5 VSS_ANA_85 V16
A18 VSS_ANA_6 VSS_ANA_86 V20 2 2
VSS_ANA_7 VSS_ANA_87
C405

C406

C407

A20 W5
A22 VSS_ANA_8 VSS_ANA_88 W6
B6 VSS_ANA_9 VSS_ANA_89 W8
B8 VSS_ANA_10 VSS_ANA_90 W9
B10 VSS_ANA_11 VSS_ANA_91 W20
B12 VSS_ANA_12 VSS_ANA_92 W22
B14 VSS_ANA_13 VSS_ANA_93 W23
B16 VSS_ANA_14 VSS_ANA_94 Y9
B18 VSS_ANA_15 VSS_ANA_95 Y13
B20 VSS_ANA_16 VSS_ANA_96 Y20
VCC3V3_S0 VCC3_TBT VCC3_SUS B22 VSS_ANA_17 VSS_ANA_97 AA22
D8 VSS_ANA_18 VSS_ANA_98 AA23
D9 VSS_ANA_19 VSS_ANA_99 AB6
L51 @ R1060 D11 VSS_ANA_20 VSS_ANA_100 AB8
1 2 1 2 D12 VSS_ANA_21 VSS_ANA_101 AB10
D13 VSS_ANA_22 VSS_ANA_102 AB12
VSS_ANA_23 VSS_ANA_103
1U_0402_6.3V6-K

D15 AB14
47U_0603_6.3V6-M

1UH_PCFE20161T-1R0MDR_2.1A_20% 0.001_0603_5%
D16 VSS_ANA_24 VSS_ANA_104 AB16
1 VSS_ANA_25 VSS_ANA_105
C716

C717

VCC3M D18 AB18

GND
E8 VSS_ANA_26 VSS_ANA_106 AB20
B
R1061 E9 VSS_ANA_27 VSS_ANA_107 AB22 B
2 1 2 E11 VSS_ANA_28 VSS_ANA_108 AC6
E15 VSS_ANA_29 VSS_ANA_109 AC8
0.001_0603_5% E16 VSS_ANA_30 VSS_ANA_110 AC10
E22 VSS_ANA_31 VSS_ANA_111 AC12
E23 VSS_ANA_32 VSS_ANA_112 AC14
F9 VSS_ANA_33 VSS_ANA_113 AC16
F16 VSS_ANA_34 VSS_ANA_114 AC18
F20 VSS_ANA_35 VSS_ANA_115 AC20
G22 VSS_ANA_36 VSS_ANA_116 AC22
G23 VSS_ANA_37 VSS_ANA_117 D5
H1 VSS_ANA_38 VSS_1 E4
H2 VSS_ANA_39 VSS_2 E5
H12 VSS_ANA_40 VSS_3 E6
H13 VSS_ANA_41 VSS_4 F5
H15 VSS_ANA_42 VSS_5 F6
H16 VSS_ANA_43 VSS_6 H5
H20 VSS_ANA_44 VSS_7 H8
J5 VSS_ANA_45 VSS_8 J8
J18 VSS_ANA_46 VSS_9 J12
J19 VSS_ANA_47 VSS_10 J13
J20 VSS_ANA_48 VSS_11 J15
J22 VSS_ANA_49 VSS_12 L13
J23 VSS_ANA_50 VSS_13 M11
K1 VSS_ANA_51 VSS_14 M12
K2 VSS_ANA_52 VSS_15 N8
L5 VSS_ANA_53 VSS_16 N9
L20 VSS_ANA_54 VSS_17 N11
L22 VSS_ANA_55 VSS_18 N12
L23 VSS_ANA_56 VSS_19 N13
M1 VSS_ANA_57 VSS_20 T6
M2 VSS_ANA_58 VSS_21 T8
M5 VSS_ANA_59 VSS_22 T9
M19 VSS_ANA_60 VSS_23 T13
VSS_ANA_61 VSS_24
VSS_ANA_67
VSS_ANA_68
VSS_ANA_69
VSS_ANA_70
VSS_ANA_71
VSS_ANA_72
VSS_ANA_73
VSS_ANA_74
VSS_ANA_75
VSS_ANA_76
VSS_ANA_77
VSS_ANA_78
VSS_ANA_79
VSS_ANA_80
M20 T15
N5 VSS_ANA_62 VSS_25 T16
N20 VSS_ANA_63 VSS_26 T18
N22 VSS_ANA_64 VSS_27 AB1
N23 VSS_ANA_65 VSS_28 AC2
A
VSS_ANA_66 VSS_29 A
DSL6540-SLL44-C0_FC-CSP337
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Alpine Ridge (2/6)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 47 of 111


5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Alpine Ridge (3/6)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 48 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

B
BLANK B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Alpine Ridge (4/6)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 49 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

B
BLANK B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Alpine Ridge (5/6)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 50 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 Alpine Ridge (6/6)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. PAYTON
Date: Wednesday, December 07, 2016 Sheet 51 of 111
5 4 3 2 1
5 4 3 2 1

VCC5M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M
VCC2V5_ACEA_LDO_BB
1 1 1 1
VCC1V8D_ACEA_LDO

C409

C410

C411

C412
VCC1V8A_ACEA_LDO

0.47U_0402_25V6-K

0.47U_0402_25V6-K
0.47U_0402_25V6-K

0.47U_0402_25V6-K
2.2U_0402_6.3V6-M

2.2U_0402_6.3V6-M

2.2U_0402_6.3V6-M
VCC3_TBTA 2 2 2 2
1 1 1 1

C433

C435
C434

C436
1 1 1

C414

C415

C416

1U_0402_6.3V6-K
D D
2 2 2 2
2 2 2 VCC_TBTA

C419
L25
VCC_TBTA_3A 1 2

VCC3_SUS BLM31PG330SN1L_2P
VCC3_FLASH R1020 1 @ 2 0_0402_5% JTBT1

3
VCC3M 4 5 TBTA_CC1
R1021 1 2 0_0402_5% 9 VBUS1 CC1 17 TBTA_CC2
@ D7 16 VBUS2 CC2
VBUS3
10U_0805_25V6-K
GSOT24C 21 8 TBTA_RFU1
VBUS4 SBU1

10U_0805_25V6-K
TBTA_VIN_3V3 20 TBTA_RFU2
1 SBU2
TBTA_USB2_N_T
C420

1 7

1
TBTA_USB2_P_T DN1

C417
6

H10

C11
D11

H11
A11
B11

K11
DP1

J10
J11
G1
H1

H2
K1

A2

E1
B1
2 R823 TBTA_USB2_N_B 19
2 1 2 F1 TBTA_USB2_P_B 18 DN2

VDDIO
VIN_3V3

LDO_3V3

VOUT_3V3

PP_5V0_1
PP_5V0_2
PP_5V0_3

VBUS_1
VBUS_2
VBUS_3
LDO_1V8A

PP_5V0_4

VBUS_4
LDO_1V8D

LDO_BMC

PP_CABLE
I2C_ADDR DP2
1
TBT_I2C_SDA 0_0402_5% D1 C708 3 1
46,53 TBT_I2C_SDA TBT_I2C_SCL D2 I2C_SDA1 46 TBTA_HD2CA_0_N 2 SSTX_N1 GND1 12
1U_0603_25V6-K
46,53 TBT_I2C_SCL C1 I2C_SCL1 46 TBTA_HD2CA_0_P 23 SSTX_P1 GND2 13
46 TBTA_I2C_INT I2C_IRQ1Z 2 46 TBTA_CA2HD_0_P 22 SSRX_P1 GND3 24
ACE_I2C_SDA2 A5 46 TBTA_CA2HD_0_N SSRX_N1 GND4 25
52,53,77 ACE_I2C_SDA2 ACE_I2C_SCL2 I2C_SDA2 GND5
B5 3A 10 26
52,53,77 ACE_I2C_SCL2 TBTA_I2C_IRQ2Z I2C_SCL2 46 TBTA_CA2HD_1_N SSRX_N2 GND6
B6 11 27
53,76 TBTA_I2C_IRQ2Z I2C_IRQ2Z 46 TBTA_CA2HD_1_P SSRX_P2 GND7
A10 15 28
TBTA_ACE_GPIO0 B2 SENSEN 46 TBTA_HD2CA_1_N 14 SSTX_N2 GND8 29
52 TBTA_ACE_GPIO0 TBTA_ACE_GPIO1 C2 GPIO0 B10 46 TBTA_HD2CA_1_P SSTX_P2 GND9 30
TBTA_ACE_GPIO2 D10 GPIO1 SENSEP GND10
C TBTA_ACE_GPIO3 G11 GPIO2 A6 Sue_No9 R1048 1 2 0_0201_5% JAE_DX07S024JJ2 C
TBTA_HPD C10 GPIO3 PP_FCM_A6 A7 Sue_No10 R1049 1 2 0_0201_5% ME@

52,53
46 TBTA_HPD

TBTA_ACE_GPIO6
TBTA_ACE_GPIO5
TBTA_ACE_GPIO6
TBTA_ACE_GPIO7
E10
G10
D7
GPIO4
GPIO5
GPIO6
Primary PP_FCM_A7
PP_FCM_A8
PP_FCM_B7
A8
B7
Sue_No11
Sue_No12
R1050 1
R1051 1
2
2
0_0201_5%
0_0201_5%
52,53 TBTA_ACE_GPIO7 TBTB_I2C_IRQ2Z H6 GPIO7
53,76,77 TBTB_I2C_IRQ2Z GPIO8 K6 TBTA_USB2_P_T
A3 C_USB_TP L6 TBTA_USB2_N_T
46 TBT_EE_CLK B4 SPI_CLK C_USB_TN
46 TBT_EE_DI A4 SPI_MOSI A9
46 TBT_EE_DO B3 SPI_MISO HV_GATE2 B9 TBTA_CC1 1 2 1 2 TBTA_RFU1
46 TBT_EE_CS_N SPI_SSZ HV_GATE1 1 2 1 2
L5
46 TBTA_USB2_D_P USB_RP_P
K5 K7 TBTA_USB2_P_B D85 EMC@ D86 EMC@
46 TBTA_USB2_D_N USB_RP_N C_USB_BP TBTA_USB2_N_B
L7 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
UART_MOSI E2 C_USB_BN
53 UART_MOSI UART_MISO F2 UART_TX TBTA_CC2 2 1 1 2 TBTA_RFU2
53 UART_MISO UART_RX 2 1 1 2
Test_Point_12MIL TP73 1 F4 L9 TBTA_CC1 C703 1 2 220P_0402_50V7-K
Test_Point_12MIL TP74 1 G4 SWD_DATA C_CC1 L10 TBTA_CC2 C704 1 2 220P_0402_50V7-K D88 EMC@ D87 EMC@
SWD_CLK C_CC2 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
R758 2 1 1M_0402_5%
VCC3_FLASH
R241 1 @ 2 100K_0402_5% TBTA_MRESET E11 K9
MRESET RPD_G1 K10
14,24,46,53,56,60,62 RPD_G2 TBTA_USB2_P_T TBTA_USB2_N_T
R846 1 @ 2 0_0402_5% 1 2 1 2
-PLTRST_FAR 1 2 1 2
R847 1 2 0_0402_5%
53,77 -TBT_ACE_MRESET E4 TBT_1ST_DEBUG_CTL1 R791 1 2 10K_0402_5%
L4 DEBUG_CTL1 D5 TBT_1ST_DEBUG_CTL2 R792 1 2 10K_0402_5% D72 EMC@ D78 EMC@
46 TBTA_LSTX K4 LSX_R2P DEBUG_CTL2 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
4 5 46 TBTA_LSRX LSX_P2R
3 6 TBTA_DIG_AUD_P L3 TBTA_USB2_P_B 2 1 1 2 TBTA_USB2_N_B
B 2 7 TBTA_DIG_AUD_N K3 DEBUG3 K8 TBTA_RFU1 2 1 1 2 B
1 8 DEBUG4 C_SBU1
TBTA_DEBUG1 L2 L8 TBTA_RFU2 D73 EMC@ D79 EMC@
RP4 TBTA_DEBUG2 K2 DEBUG1 C_SBU2 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
100K_0804_8P4R_5% DEBUG2
TBTA_DPSRC_AUX_P J1 Recommended ESD 0201 structures
GND_3/HRESET

46 TBTA_DPSRC_AUX_P AUX_P
VCC3_FLASH TBTA_DPSRC_AUX_N J2 F11 65982D_RST 1 2 on high speed lines
46 TBTA_DPSRC_AUX_N AUX_N RESETZ TBT_RESET_N 46
F10 R1035
BUSPOWERZ
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18

GND_19
GND_20
NC_L11

0_0402_5%
GND_1
GND_2

GND_4
GND_5
GND_6
GND_7
GND_8
GND_9

TBTA_ACE_ROSC G2 TBTA_HD2CA_0_P 2 1 1 2 TBTA_HD2CA_1_P


R_OSC 2 1 1 2
SS
2

U16 D64 EMC@ D68 EMC@


A1
B8
2D6
D8
E5
0_0201_5% E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H7
H8

R225 TPS65982DAZQZR_BGA96 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962


L11
L1

15K_0402_0.1%

TBTA_HD2CA_0_N TBTA_HD2CA_1_N
R1078

+/-0.1% 2 1 1 2
1

2 1 1 2
1

VCC3_FLASH D65 EMC@ D69 EMC@


PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
TBTA_SS

VCC3M R1058 1 2 0_0402_5%

R1023 1 @ 2 0_0402_5% TBTA_CA2HD_0_P 2 1 1 2 TBTA_CA2HD_1_P


VCC3_SUS 2 1 1 2
1
R1022 1 @ 2 0_0402_5% D66 EMC@ D70 EMC@
C701 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
TBTA_ACE_GPIO0 R796 1 2 10K_0402_5% 0.22U_0402_10V6-K
52 TBTA_ACE_GPIO0 TBTA_ACE_GPIO7 2
R797 1 2 10K_0402_5%
52,53 TBTA_ACE_GPIO7 TBTA_CA2HD_0_N 2 1 1 2 TBTA_CA2HD_1_N
A ACE_I2C_SDA2 R799 2 1 3.3K_0402_5% 2 1 1 2 A
52,53,77 ACE_I2C_SDA2 ACE_I2C_SCL2 R800 2 1 3.3K_0402_5%
52,53,77 ACE_I2C_SCL2
D67 EMC@ D71 EMC@
TBTA_I2C_IRQ2Z R801 1 2 10K_0402_5% PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
53,76 TBTA_I2C_IRQ2Z

VCC3_FLASH Title
TBTA_ACE_GPIO1 R1039 1 2 1M_0201_5%
Security Classification LC Future Center Secret Data
TBTA_ACE_GPIO2 R1040 1 2 1M_0201_5%
TBTA_DPSRC_AUX_N TBTA_ACE_GPIO3 Issued Date 2015/07/16 Deciphered Date 2016/01/16 Thunderbolt Power TPS65982/USB Type-C (1/2)
R802 1 2 100K_0402_5% R1041 1 2 1M_0201_5%
TBTA_DPSRC_AUX_P R803 1 2 100K_0402_5% TBTA_ACE_GPIO5 R1042 1 2 1M_0201_5%
TBTA_ACE_GPIO6 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
R798 1 2 10K_0402_5% Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
52,53 TBTA_ACE_GPIO6

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 52 of 111
5 4 3 2 1
5 4 3 2 1

VCC5M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M
VCC2V5_ACEB_LDO_BB
1 1 1 1
VCC1V8D_ACEB_LDO

C424

C421
C423

C422
VCC1V8A_ACEB_LDO

2.2U_0402_6.3V6-M

2.2U_0402_6.3V6-M

2.2U_0402_6.3V6-M
VCC3_TBTB 2 2 2 2

0.47U_0402_25V6-K

0.47U_0402_25V6-K
0.47U_0402_25V6-K

0.47U_0402_25V6-K
1 1 1

C426

C427

C428
D D

1U_0402_6.3V6-K
1 1 1 1

C438

C440
C437

C439
2 2 2

C431
VCC_TBTB
2 2 2 2
VCC3V3_TBTB_LDO L24
VCC_TBTB_3A 1 2
VCC3V3_TBTB_LDO
10U_0805_25V6-K

VCC3_SUS BLM31PG330SN1L_2P
1 VCC3M R1018 1 @ 2 0_0402_5%
C432

3
R1019 1 2 0_0402_5%
10U_0805_25V6-K

JTBT2
2 TBTB_VIN_3V3 @ D8 4 5 TBTB_CC1
GSOT24C 9 VBUS1 CC1 17 TBTB_CC2
1 VBUS2 CC2
C429

VCC3V3_TBTB_LDO 16
21 VBUS3 8 TBTB_RFU1

H10

C11
D11

H11

1
A11
B11

K11
VBUS4 SBU1

J10
J11
20 TBTB_RFU2

G1
H1

H2
K1

A2

E1
B1
2 TBTB_USB2_N_T 7 SBU2
@ R824 1 2 0_0402_5% F1 TBTB_USB2_P_T 6 DN1

VDDIO
VIN_3V3

LDO_3V3

VOUT_3V3

PP_5V0_1
PP_5V0_2
PP_5V0_3

VBUS_1
VBUS_2
VBUS_3
PP_5V0_4

VBUS_4
LDO_1V8A

LDO_1V8D

LDO_BMC

PP_CABLE
I2C_ADDR DP1
TBT_I2C_SDA D1 TBTB_USB2_N_B 19
46,52 TBT_I2C_SDA TBT_I2C_SCL D2 I2C_SDA1 TBTB_USB2_P_B 18 DN2
46,52 TBT_I2C_SCL I2C_SCL1 1 DP2
C1 C707
46 TBTB_I2C_INT I2C_IRQ1Z 3 1
1U_0603_25V6-K
ACE_I2C_SDA2 A5 46 TBTB_HD2CA_0_N 2 SSTX_N1 GND1 12
52,77 ACE_I2C_SDA2 ACE_I2C_SCL2 I2C_SDA2 2 46 TBTB_HD2CA_0_P SSTX_P1 GND2
B5 3A 23 13
52,77 ACE_I2C_SCL2 TBTB_I2C_IRQ2Z I2C_SCL2 46 TBTB_CA2HD_0_P SSRX_P1 GND3
B6 22 24
52,76,77 TBTB_I2C_IRQ2Z I2C_IRQ2Z A10 46 TBTB_CA2HD_0_N SSRX_N1 GND4 25
TBTB_ACE_GPIO0 B2 SENSEN 10 GND5 26
53 TBTB_ACE_GPIO0 TBTB_GPIO1 GPIO0 46 TBTB_CA2HD_1_N SSRX_N2 GND6
C2 B10 11 27
C TBTB_GPIO2 GPIO1 SENSEP 46 TBTB_CA2HD_1_P SSRX_P2 GND7 C
D10 15 28
TBTB_GPIO3 G11 GPIO2 A6 Sue_No5 46 TBTB_HD2CA_1_N 14 SSTX_N2 GND8 29
R1052 1 2 0_0201_5%
46 TBTB_HPD
TBTB_HPD
TBTB_GPIO5
TBTA_ACE_GPIO6
C10
E10
G10
GPIO3
GPIO4
GPIO5
Secondary PP_FCM_A6
PP_FCM_A7
PP_FCM_A8
A7
A8
B7
Sue_No6
Sue_No7
Sue_No8
R1053 1
R1054 1
R1055 1
2
2
2
0_0201_5%
0_0201_5%
0_0201_5%
46 TBTB_HD2CA_1_P SSTX_P2

JAE_DX07S024JJ2
GND9
GND10
30

52 TBTA_ACE_GPIO6 TBTA_ACE_GPIO7 D7 GPIO6 PP_FCM_B7 ME@


52,53 TBTA_ACE_GPIO7 TBTA_I2C_IRQ2Z H6 GPIO7
52,76 TBTA_I2C_IRQ2Z GPIO8 K6 TBTB_USB2_P_T
VCC3V3_TBTB_LDO R775 1 2 0_0201_5% Sue_No1 A3 C_USB_TP L6 TBTB_USB2_N_T
R776 1 2 0_0201_5% Sue_No2 B4 SPI_CLK C_USB_TN
R777 1 2 0_0201_5% Sue_No3 A4 SPI_MOSI A9 TBTB_CC1 1 2 1 2 TBTB_RFU1
R778 1 2 0_0201_5% Sue_No4 B3 SPI_MISO HV_GATE2 B9 1 2 1 2
R1056 1 @ 2 0_0201_5% SPI_SSZ HV_GATE1
L5 D89 EMC@ D90 EMC@
46 TBTB_USB2_D_P USB_RP_P TBTB_USB2_P_B
K5 K7 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
46 TBTB_USB2_D_N USB_RP_N C_USB_BP TBTB_USB2_N_B
L7
UART_MISO E2 C_USB_BN
52 UART_MISO UART_MOSI F2 UART_TX TBTB_CC2 2 1 TBTB_RFU2
1 2
52 UART_MOSI UART_RX 2 1 1 2
Test_Point_12MIL TP75 1 F4 L9 TBTB_CC1 C705 1 2 220P_0402_50V7-K
Test_Point_12MIL TP76 1 G4 SWD_DATA C_CC1 L10 TBTB_CC2 C706 1 2 220P_0402_50V7-K D92 EMC@ D91 EMC@
SWD_CLK C_CC2 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
R809 2 1 1M_0402_5%

R251 1 @ 2 100K_0201_5% TBTB_MRESET E11 K9


MRESET RPD_G1 K10 VCC3V3_TBTB_LDO
14,24,46,52,56,60,62 RPD_G2 TBTB_USB2_P_T 1 2 TBTB_USB2_N_T
R848 1 @ 2 0_0402_5% 1 2
-PLTRST_FAR 1 2 1 2
R849 1 2 0_0402_5%
52,77 -TBT_ACE_MRESET E4 TBT_2ND_DEBUG_CTL1 R793 1 2 10K_0402_5%
L4 DEBUG_CTL1 D5 TBT_2ND_DEBUG_CTL2 R794 1 2 10K_0402_5% D63 EMC@ D80 EMC@
46 TBTB_LSTX K4 LSX_R2P DEBUG_CTL2 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
46 TBTB_LSRX LSX_P2R
RP11
B 8 1 TBTB_DIG_AUD_P L3 B
7 2 TBTB_DIG_AUD_N K3 DEBUG3 K8 TBTB_RFU1 TBTB_USB2_P_B 1 2 1 2 TBTB_USB2_N_B
6 3 DEBUG4 C_SBU1 1 2 1 2
5 4 TBTB_DEBUG1 L2 L8 TBTB_RFU2
TBTB_DEBUG2 K2 DEBUG1 C_SBU2 D74 EMC@ D81 EMC@
VCC3V3_TBTB_LDO 100K_0804_8P4R_5% DEBUG2 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
TBTB_DPSRC_AUX_P J1
GND_3/HRESET

46 TBTB_DPSRC_AUX_P TBTB_DPSRC_AUX_N AUX_P


J2 F11 Recommended ESD 0201 structures
46 TBTB_DPSRC_AUX_N AUX_N RESETZ
VCC3V3_TBTB_LDO
on high speed lines
F10
BUSPOWERZ
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18

GND_19
GND_20
NC_L11
GND_1
GND_2

GND_4
GND_5
GND_6
GND_7
GND_8
GND_9

TBTB_ACE_ROSC G2 TBTB_HD2CA_0_P 2 1 1 2 TBTB_HD2CA_1_P


R_OSC 2 1 1 2
SS
2

U17 D55 EMC@ D59 EMC@


A1
B8
2D6
D8
E5
0_0201_5% E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H7
H8

R227 TPS65982DAZQZR_BGA96 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962


L11
L1

15K_0402_0.1%
R1079

+/-0.1% TBTB_HD2CA_0_N 2 1 1 2 TBTB_HD2CA_1_N


1

2 1 1 2
1

VCC3V3_TBTB_LDO D56 EMC@ D60 EMC@


PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
TBTB_SS

VCC3M R1059 1 2 0_0402_5%

VCC3_SUS R1025 1 @ 2 0_0402_5% TBTB_CA2HD_0_P 2 1 1 2 TBTB_CA2HD_1_P


2 1 1 2
R1024 1 @ 2 0_0402_5% 1
D57 EMC@ D61 EMC@
C702 PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962
TBTB_ACE_GPIO0 R804 1 2 10K_0402_5% VCC3_FLASH 0.22U_0402_10V6-K
53 TBTB_ACE_GPIO0 TBTA_ACE_GPIO7 2
R805 1 @ 2 10K_0402_5%
A 52,53 TBTA_ACE_GPIO7 TBTB_CA2HD_0_N 2 1 1 2 TBTB_CA2HD_1_N A
2 1 1 2

TBTB_DPSRC_AUX_N R806 1 2 100K_0402_5% D58 EMC@ D62 EMC@


TBTB_DPSRC_AUX_P R807 1 2 100K_0402_5% PESD5V0H1BSF_SOD962 PESD5V0H1BSF_SOD962

VCC3V3_TBTB_LDO
Security Classification LC Future Center Secret Data Title
R808 1 2 10K_0402_5% TBTB_I2C_IRQ2Z
Issued Date 2016/01/16 Thunderbolt Power TPS65982/USB Type-C (2/2)
TBTB_GPIO1 R1043 1 2 1M_0201_5%
2015/07/16 Deciphered Date
TBTB_GPIO2 R1044 1 2 1M_0201_5%
TBTB_GPIO3 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
R1045 1 2 1M_0201_5% Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
TBTB_GPIO5 R1046 1 2 1M_0201_5% DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 53 of 111


5 4 3 2 1
5 4 3 2 1

IO BOARD RIGHT CONN

VCC5M

VCC3M
D VCC3B D
VCC5M

NEAR B2B CONN

JIOR
1 2
3 1 2 4 SYSTEM_DP3N_C C300 2 1 0.1U_0402_16V7-K
3 4 SYSTEM_DP3N 43

2
5 6 SYSTEM_DP3P_C C301 2 1 0.1U_0402_16V7-K
SYSTEM_DP_HPD 7 5 6 8 SYSTEM_DP3P 43
F17 F9
43 SYSTEM_DP_HPD SYSTEM_DP_DGL_DTCT 9 7 8 10 SYSTEM_DP2N_C
0.5A_32V_ERBRD0R50X 3A_32V_ERBRD3R00X C363 2 1 0.1U_0402_16V7-K
43 SYSTEM_DP_DGL_DTCT 11 9 10 12 SYSTEM_DP2P_C SYSTEM_DP2N 43
C362 2 1 0.1U_0402_16V7-K
13 11 12 14 SYSTEM_DP2P 43
15 13 14 16 SYSTEM_DP1N_C C365 2 1 0.1U_0402_16V7-K

1
54,74,83,84 -PWRSWITCH 17 15 16 18 SYSTEM_DP1P_C SYSTEM_DP1N 43
C364 2 1 0.1U_0402_16V7-K
IO BOARD LEFT CONN 75 -LEDPWR
19 17 18 20 SYSTEM_DP1P 43
USBP9-_FINGER_PRINT 21 19 20 22 SYSTEM_DP0N_C C378 2 1 0.1U_0402_16V7-K
15 USBP9-_FINGER_PRINT USBP9+_FINGER_PRINT 23 21 22 24 SYSTEM_DP0P_C SYSTEM_DP0N 43
C375 2 1 0.1U_0402_16V7-K
15 USBP9+_FINGER_PRINT 25 23 24 26 SYSTEM_DP0P 43
JIOL
-USB_PORT3_OC3 27 25 26 28 SYSTEM_AUXN
1 USB3P1_SYSP1_RXN 15 -USB_PORT3_OC3 -USB_PORT2_OC2 29 27 28 30 SYSTEM_AUXP SYSTEM_AUXN 43
1 2 USB3P1_SYSP1_RXP USB3P1_SYSP1_RXN 19 15 -USB_PORT2_OC2 31 29 30 32 SYSTEM_AUXP 43
2 3 USB3P1_SYSP1_RXP 19 33 31 32 34 USBP6+_SYSP4
VCC3M
3 4 USB3P1_SYSP1_TXN 35 33 34 36 USBP6-_SYSP4 USBP6+_SYSP4 15
4 5 USB3P1_SYSP1_TXP USB3P1_SYSP1_TXN 19 37 35 36 38 USBP6-_SYSP4 15
5 6 USB3P1_SYSP1_TXP 19 39 37 38 40 USB3P6_SYSP4_RXN
6 7 41 39 40 42 USB3P6_SYSP4_RXP USB3P6_SYSP4_RXN 19
7 8 USB_ON1 43 41 42 44 USB3P6_SYSP4_RXP 19
8 9 USB_ON1 76 -USB_PORT1_OC1 45 43 44 46 USB3P6_SYSP4_TXN
9 10 15 -USB_PORT1_OC1 USB_ON2 47 45 46 48 USB3P6_SYSP4_TXP USB3P6_SYSP4_TXN 19
VCC3B
10 11 76 USB_ON2 49 47 48 50 USB3P6_SYSP4_TXP 19
11 12 R816 VCC3M 51 49 50 52 USBP5+_SYSP3
C 12 13 AOU_SEL1 76 2 1 53 51 52 54 USBP5-_SYSP3 USBP5+_SYSP3 15 C
13 14 AOU_SEL2 76 55 53 54 56 USBP5-_SYSP3 15
14 15 -USB_PORT0_OC0 -AOU_IFLG 76 57 55 56 58 USB3P5_SYSP3_RXN
10K_0402_5%
21 15 16 USBP1+_SYSP1 -USB_PORT0_OC0 15 59 57 58 60 USB3P5_SYSP3_RXP USB3P5_SYSP3_RXN 19
22 GND_1 16 17 USBP1-_SYSP1 USBP1+_SYSP1 15 61 59 60 62 USB3P5_SYSP3_RXP 19
23 GND_2 17 18 USBP1-_SYSP1 15 20 -CLKREQ_PCIE6_EXPCARD 63 61 62 64 USB3P5_SYSP3_TXN
24 GND_3 18 19 65 63 64 66 USB3P5_SYSP3_TXP USB3P5_SYSP3_TXN 19
25 GND_4 19 20 67 65 66 68 USB3P5_SYSP3_TXP 19
GND_5 20 15 USBP12-_EXP_SLOT 69 67 68 70 USBP2+_SYSP2
15 USBP12+_EXP_SLOT 71 69 70 72 USBP2-_SYSP2 USBP2+_SYSP2 15
73 71 72 74 USBP2-_SYSP2 15
FOX_GS12207-11141-9H
14,61,75,82,83,84 -PLTRST_NEAR 75 73 74 76 USB3P2_SYSP2_RXN
ME@
17,46,61,84 -PCIE_WAKE 77 75 76 78 USB3P2_SYSP2_RXP USB3P2_SYSP2_RXN 19
14 -EXC_PWR_SHDN 79 77 78 80 USB3P2_SYSP2_RXP 19
104,77,83,84,95,98,99 B_ON 81 79 80 82 USB3P2_SYSP2_TXN
83 81 82 84 USB3P2_SYSP2_TXP USB3P2_SYSP2_TXN 19
20 -PCIE6_CLK_100M_EXPCARD 85 83 84 86 USB3P2_SYSP2_TXP 19
20 PCIE6_CLK_100M_EXPCARD 87 85 86 88
89 87 88 90 HP_L_JACK
15 PCIE1_EXP_SLOT_RXN 91 89 90 92 HP_R_JACK HP_L_JACK 31,67
15 PCIE1_EXP_SLOT_RXP 93 91 92 94 HP_JACK_SYS HP_R_JACK 61,67
95 93 94 96 MIC_RING2 HP_JACK_SYS 68,69
15 PCIE1_EXP_SLOT_TXN 97 95 96 98 MIC_SLEEVE MIC_RING2 70
15 PCIE1_EXP_SLOT_TXP 99 97 98 100 MIC_SLEEVE 70
99 100

TE_5177985-4
ME@ AGND

B B

ON/OFF switch
SW2
EVQPLHA15_4P
3 1
B A
4 2
B1 A1
Power Button
Bottom Side 6 5
GND2 GND1

@ J39
Bottom Side 1 2 -PWRSWITCH
-PWRSWITCH 54,74,83,84
SHORT PADS
@

A A

Security Classification LC Future Center Secret Data Title


B2B CONN (IO BOARD RIGHT)
Issued Date 2015/07/16 Deciphered Date 2016/01/16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 54 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 USB POWER/CONN (2/2)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 55 of 111
5 4 3 2 1
5 4 3 2 1

VCC3B VCC3GBE VCC3M

D D

2
R494
R254 R255 @ 4.7K_0402_5%
10K_0402_5% 10K_0402_5%

1
U21

-CLKREQ_PCIE3_GBE 48 13 MDI_0+
20 -CLKREQ_PCIE3_GBE -PLTRST_FAR 36 CLK_REQ_N MDI_PLUS[0] 14 MDI_0- MDI_0+ 57
14,24,46,52,53,60,62 -PLTRST_FAR PE_RST_N MDI_MINUS[0] MDI_0- 57
PCIE3_CLK_100M_GBE 44 17 MDI_1+
20 PCIE3_CLK_100M_GBE -PCIE3_CLK_100M_GBE 45 PE_CLKP MDI_PLUS[1] 18 MDI_1- MDI_1+ 57
20 -PCIE3_CLK_100M_GBE PE_CLKN MDI_MINUS[1] MDI_1- 57

PCIE
MDI
PCIE4_GBE_RXP C459 1 2 0.1U_0402_25V6-K PCIE4_RXP_C 38 20 MDI_2+
15 PCIE4_GBE_RXP PCIE4_GBE_RXN C460 1 2 0.1U_0402_25V6-K PCIE4_RXN_C 39 PETp MDI_PLUS[2] 21 MDI_2- MDI_2+ 57
VCC3GBE
15 PCIE4_GBE_RXN PETn MDI_MINUS[2] MDI_2- 57
PCIE4_GBE_TXP 41 23 MDI_3+
15 PCIE4_GBE_TXP PCIE4_GBE_TXN 42 PERp MDI_PLUS[3] 24 MDI_3- MDI_3+ 57
15 PCIE4_GBE_TXN PERn MDI_MINUS[3] MDI_3- 57
SMBUS DEVICE ADDRESSES 0XC8
SML0_CLK R257 1 2 0_0402_5% SML0_CLK_R 28 6 U21_SVR_EN_N R256 1 2 0_0402_5%
17 SML0_CLK SML0_DATA SML0_DATA_R SMB_CLK SVR_EN_N
R258 1 2 0_0402_5% 31

SMBUS
17 SML0_DATA SMB_DATA 1 U21_RSVD1_VCC3P3 R259 1 2 4.7K_0402_5%
RSVD1_VCC3P3
-LANWAKE 2 5
17 -LANWAKE 3 LANWAKE_N VDD3P3_IN
LANPHYPC
17 LANPHYPC LAN_DISABLE_N 4
VDD3P3_4
15 C461 1 2 1U_0402_6.3V6-K
C RJ45_LINKUP 26 VDD3P3_15 19 C
57,76 RJ45_LINKUP RJ45_ACTIVITY 27 LED0 VDD3P3_19 29
57 RJ45_ACTIVITY 25 LED1 VDD3P3_29 VCC0R9GBE

LED
LED2
47 VCC0R9GBE
VDD0P9_47 46
VCC3GBE 32 VDD0P9_46 37
34 JTAG_TDI VDD0P9_37
2 1 10K_0402_5% U21_JTAG_TMS 33 JTAG_TDO 43
KEEP SHORT AND WIDE
R260
PATTERN

JTAG
R261 2 1 10K_0402_5% U21_JTAG_TCK 35 JTAG_TMS VDD0P9_43
JTAG_TCK 11
VDD0P9_11
Y4_XTAL_OUT_R R262 2 1 0_0402_5% XTAL_OUT 9 40
XTAL_IN 10 XTAL_OUT VDD0P9_40 22
XTAL_IN VDD0P9_22 16
VDD0P9_16 8
U21_TEST_EN 30 VDD0P9_8
TEST_EN
RBIAS 12 7 VCC0R9GBE_L FL1 1 2 4.7UH_LQH32PN4R7NN0L_30%
Y4 25MHZ_18PF_8Y25000004 RBIAS CTRL0P9
49 Placed close to FL1
1 3 GND
1 3 WGI219LM-SLKJ2-A0_QFN48_6X6
GND1 GND2 FL1 1
C462
2 2
2

2
2 2 4 2
R263 R264
TDK FLF3215T-4R7M 22U_0805_6.3V6-M C463 C464 @
0.1U_0402_25V6-K 0.1U_0402_25V6-K
C465 C466 1K_0402_5% 3.01K_0402_1% MURATA LQH32PN4R7NN0 2 1 1
27P_0402_50V8-J 27P_0402_50V8-J
1 1 1
1

B B

TXC 8Y25000004
KDS 1ZZHAE25000CC0F

VCC3LAN VCC3LAN_F VCC3GBE

F20 R265
1 2 1 2

3A_32V_ERBRD3R00X 0.01_0603_LE_1%
2 2 1 2
C469
C467 C468 22U_0805_6.3V6-M C470
0.1U_0402_25V6-K 0.1U_0402_25V6-K 0.1U_0402_25V6-K
U21 GBE PHY 1 1 2 1

vPRO Model Non-vPRO Model

I219LM I219V

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 GBE JACKSONVILLE


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 56 of 111
5 4 3 2 1
5 4 3 2 1

VCC3GBE

D D

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K
VCC3GBE

2 2 2 2 2

2
1 1 1 1 1

C472

C471

C473

C474

C475
R266
4.7K_0402_5%

39
30
21
14
8
4
1
U22

VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1
38 DOCK_MDI_3-
B0+ 37 DOCK_MDI_3+ DOCK_MDI_3- 74
MDI_3- 2 B0- DOCK_MDI_3+ 74
56 MDI_3- A0+ 34 DOCK_MDI_2-
MDI_3+ 3 B1+ 33 DOCK_MDI_2+ DOCK_MDI_2- 74
56 MDI_3+ A0- B1- DOCK_MDI_2+ 74
C 29 DOCK_MDI_1- C
MDI_2- 6 B2+ 28 DOCK_MDI_1+ DOCK_MDI_1- 74
56 MDI_2- A1+ B2- DOCK_MDI_1+ 74
MDI_2+ 7 25 DOCK_MDI_0-
56 MDI_2+ A1- B3+ 24 DOCK_MDI_0+ DOCK_MDI_0- 74
B3- DOCK_MDI_0+ 74
MDI_1- 9 17
56 MDI_1- A2+ LEDB0 18
MDI_1+ 10 LEDB1 41
56 MDI_1+ A2- LEDB2
36 SYS_MDI_3-
MDI_0- 11 C0+ 35 SYS_MDI_3+ SYS_MDI_3- 58
56 MDI_0- A3+ C0- SYS_MDI_3+ 58
MDI_0+ 12 32 SYS_MDI_2-
56 MDI_0+ A3- C1+ 31 SYS_MDI_2+ SYS_MDI_2- 58
C1- SYS_MDI_2+ 58
-DOCK_ATTACHED_AUX 13 27 SYS_MDI_1-
74 -DOCK_ATTACHED_AUX SEL C2+ 26 SYS_MDI_1+ SYS_MDI_1- 58
C2- SYS_MDI_1+ 58
15 23 SYS_MDI_0-
56 RJ45_ACTIVITY 16 LEDA0 C3+ 22 SYS_MDI_0+ SYS_MDI_0- 58
56,76 RJ45_LINKUP 42 LEDA1 C3- SYS_MDI_0+ 58
LEDA2 19
LEDC0 RJ45_ACTIVITY_SYS 59
5 20
PD LEDC1 RJ45_LINKUP_SYS 59
40
43 LEDC2
PAD_GND

PI3L720ZHEX+CX_TQFN42_9X3P5
B B

U22

Vendor P/N

Pericom PI3L720ZHEX+CX
TI TS3L501E

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 GBE LAN SWITCH


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 57 of 111


5 4 3 2 1
5 4 3 2 1

T1

SYS_MDI_3- 1 1:1
57 SYS_MDI_3- MX1+ T1/B 24 RJ45_TXD3N
TD1+ RJ45_TXD3N 59

SYS_MDI_3+ 2
57 SYS_MDI_3+ MX1-
23 RJ45_TXD3P
TD1- RJ45_TXD3P 59
3 22
MCT1 T1/A TCT1

4 21
SYS_MDI_2- 5 MCT2 1:1 TCT2
D 57 SYS_MDI_2- MX2+ T1/B RJ45_TXD2N D
20
TD2+ RJ45_TXD2N 59

SYS_MDI_2+ 6
57 SYS_MDI_2+ MX2- 19 RJ45_TXD2P
TD2- RJ45_TXD2P 59

T1/A

SYS_MDI_1- 7 1:1
57 SYS_MDI_1- MX3+ T1/B 18 RJ45_TXD1N
TD3+ RJ45_TXD1N 59

SYS_MDI_1+ 8
57 SYS_MDI_1+ MX3-
17 RJ45_TXD1P
TD3- RJ45_TXD1P 59
9 16
MCT3 T1/A TCT3

10 15
SYS_MDI_0- 11 MCT4 1:1 TCT4
57 SYS_MDI_0- MX4+ T1/B RJ45_TXD0N
14
TD4+ RJ45_TXD0N 59

SYS_MDI_0+ 12
57 SYS_MDI_0+ MX4- 13 RJ45_TXD0P
TD4- RJ45_TXD0P 59

75_0805_5%
75_0805_5%

75_0805_5%

75_0805_5%
T1/A
C C
BOTH_NA69LF
EMC@ Change R267~R270
THE WIDTH OF THESE TRACE SHOULD from 1/8W to 1/2W
BE WIDER THAN 35MIL TO PREVENT for PAL EMC-026 test
VOLTAGE DROP.

1
1

1
1U_0402_6.3V6-K

0.1U_0402_25V6-K
0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

EMC@
EMC@

EMC@

EMC@

R270 2
R267 2

R268 2

R269 2
PATTERN MUST BE
1 1 1 1 1 1 1 SHORT AND WIDE.

C303 2 2 2 2 2 2 2
SHOULD BE PLACED AS CLOSE

C481
C477

C478

C479

C480

C482
TO MAGNETICS AS POSSIBLE.

2
C476

2
R271 EMC@ HIGH VOLTAGE
@ @ 1M_0805_5% C483
1500P_1808_2KV7K
1500PF CAP
IS OPTIONAL

1
1
ESD REASON
B B

Vendor P/N

Timag IH-115-F

Bothhand NA69LF

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 GBE MAGNETICS


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 58 of 111
5 4 3 2 1
5 4 3 2 1

D D

D23, D24 EMC Parts


@ D23 SP3012-04UTG-1_MO-229 @ D24 SP3012-04UTG-1_MO-229

RJ45_TXD1P 1 9 RJ45_TXD1P RJ45_TXD0P 1 9 RJ45_TXD0P


RJ45_TXD1N 2 8 RJ45_TXD1N RJ45_TXD0N 2 8 RJ45_TXD0N
RJ45_TXD3P 4 7 RJ45_TXD3P RJ45_TXD2P 4 7 RJ45_TXD2P
RJ45_TXD3N 5 6 RJ45_TXD3N RJ45_TXD2N 5 6 RJ45_TXD2N

3
VCC3GBE

C C

JGBE1
10
57 RJ45_ACTIVITY_SYS Yellow_LED-
R547
2 1 Yellow_LED+ 9
Yellow_LED+
RJ45_TXD0P 330_0402_5% 1
58 RJ45_TXD0P PR1+
RJ45_TXD0N 2
58 RJ45_TXD0N PR1-
RJ45_TXD1P 3
58 RJ45_TXD1P PR2+
RJ45_TXD2P 4
58 RJ45_TXD2P PR3+
RJ45_TXD2N 5
58 RJ45_TXD2N PR3-
RJ45_TXD1N 6
58 RJ45_TXD1N PR2-
RJ45_TXD3P 7 14
58 RJ45_TXD3P PR4+ G2
RJ45_TXD3N 8 13
58 RJ45_TXD3N PR4- G1
12
57 RJ45_LINKUP_SYS Green_LED-
R554
2 1 Green_LED+ 11
Green_LED+

0.1U_0402_25V6-K

0.1U_0402_25V6-K
330_0402_5% SINGA_2RJ3062-138211F
ME@

B B

2 2

@ C485

@ C486
1 1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 RJ45 CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 59 of 111


5 4 3 2 1
5 4 3 2 1

M.2 PCIe SSD M.2 SATA SSD


Planar M.2 PCIe SSD Module Planar M.2 SATA SSD Module
PCH SOCKET PLUG CHIP PCH SOCKET PLUG CHIP

PCIE9_RXP/SATA0A_RXP PCIE9L0_SATA0A_MD2_SSD1_RXP 41: PERN0/SATA_B+ 41: PETN0 PCIE9_RXP/SATA0A_RXP PCIE9L0_SATA0A_MD2_SSD1_RXP 41: PERN0/SATA_B+ 41: SATA B+

PCIE9_RXN/SATA0A_RXN PCIE9L0_SATA0A_MD2_SSD1_RXN 43: PERP0/SATA_B- 43: PETP0 PCIE9_RXN/SATA0A_RXN PCIE9L0_SATA0A_MD2_SSD1_RXN 43: PERP0/SATA_B- 43: SATA B-

D D
PCIe: Lane Polarity Inversion Used SATA: Straight

0.22uF 0.22uF
PCIE9_TXN/SATA0A_TXN PCIE9L0_SATA0A_MD2_SSD1_TXN 47: PETN0/SATA_A- 47: PERN0 PCIE9_TXN/SATA0A_TXN PCIE9L0_SATA0A_MD2_SSD1_TXN 47: PETN0/SATA_A- 47: SATA A-

PCIE9_TXP/SATA0A_TXP PCIE9L0_SATA0A_MD2_SSD1_TXP 49: PETP0/SATA_A+ 49: PERP0 PCIE9_TXP/SATA0A_TXP PCIE9L0_SATA0A_MD2_SSD1_TXP 49: PETP0/SATA_A+ 49: SATA A+

0.22uF 0.22uF

VCC3B VCC3B

M.2 SSD slot 2

2
R843 R844
M.2 SSD slot 1 0.01_0603_LE_1%
Type-M 2280 0.01_0603_LE_1%

Type-M 2280

1
JSSD2
VCC3B VCC3B
JSSD1 1 2
3 GND_1 3.3V_1 4
C 1 2 5 GND_2 3.3V_2 6 C
GND_1 3.3V_1 16 PCIE17L3_MD2_SSD2_RXN PERN3 N/C_2
3 4 7 8
GND_2 3.3V_2 16 PCIE17L3_MD2_SSD2_RXP PERP3 N/C_3 -DAS_MD2_SSD2
5 6 M.2 SSD2 L3 9 10
16 PCIE9L3_MD2_SSD1_RXN PERN3 N/C_2 GND_3 DAS/DSS#
7 8 11 12
16 PCIE9L3_MD2_SSD1_RXP PERP3 N/C_3 -DAS_MD2_SSD1 16 PCIE17L3_MD2_SSD2_TXN PETN3 3.3V_3
M.2 SSD1 L3 9 10 13 14
GND_3 DAS/DSS# 16 PCIE17L3_MD2_SSD2_TXP PETP3 3.3V_4
11 12 15 16
16 PCIE9L3_MD2_SSD1_TXN PETN3 3.3V_3 GND_4 3.3V_5

2
13 14 17 18
16 PCIE9L3_MD2_SSD1_TXP PETP3 3.3V_4 16 PCIE17L2_MD2_SSD2_RXN PERN2 3.3V_6
15 16 19 20 R273
GND_4 3.3V_5 16 PCIE17L2_MD2_SSD2_RXP PERP2 N/C_4

2
17 18 M.2 SSD2 L2 21 22 10K_0402_5%
16 PCIE9L2_MD2_SSD1_RXN PERN2 3.3V_6 GND_5 N/C_5
19 20 R272 23 24
16 PCIE9L2_MD2_SSD1_RXP PERP2 N/C_4 16 PCIE17L2_MD2_SSD2_TXN PETN2 N/C_6
M.2 SSD1 L2 21 22 10K_0402_5% 25 26
16 PCIE17L2_MD2_SSD2_TXP

1
23 GND_5 N/C_5 24 27 PETP2 N/C_7 28
16 PCIE9L2_MD2_SSD1_TXN 25 PETN2 N/C_6 26 29 GND_6 N/C_8 30
16 PCIE9L2_MD2_SSD1_TXP 16 PCIE17L1_MD2_SSD2_RXN

1
27 PETP2 N/C_7 28 31 PERN1 N/C_9 32
GND_6 N/C_8 16 PCIE17L1_MD2_SSD2_RXP PERP1 N/C_10
29 30 M.2 SSD2 L1 33 34
16 PCIE9L1_MD2_SSD1_RXN PERN1 N/C_9 GND_7 N/C_11
31 32 35 36
16 PCIE9L1_MD2_SSD1_RXP PERP1 N/C_10 16 PCIE17L1_MD2_SSD2_TXN PETN1 N/C_12
M.2 SSD1 L1 33 34 37 38
GND_7 N/C_11 16 PCIE17L1_MD2_SSD2_TXP PETP1 DEVSLP DEVSLP4_MD2_SSD2 19
35 36 39 40
16 PCIE9L1_MD2_SSD1_TXN 37 PETN1 N/C_12 38 41 GND_8 N/C_13 42
16 PCIE9L1_MD2_SSD1_TXP PETP1 DEVSLP DEVSLP0_MD2_SSD1 19 16 PCIE17L0_SATA4_MD2_SSD2_RXP PERN0/SATA-B+ N/C_14
39 40 43 44
GND_8 N/C_13 16 PCIE17L0_SATA4_MD2_SSD2_RXN PERP0/SATA-B- N/C_15
41 42 M.2 SSD2 L0 45 46
16 PCIE9L0_SATA0A_MD2_SSD1_RXP PERN0/SATA-B+ N/C_14 GND_9 N/C_16
43 44 47 48
16 PCIE9L0_SATA0A_MD2_SSD1_RXN PERP0/SATA-B- N/C_15 16 PCIE17L0_SATA4_MD2_SSD2_TXN PETN0/SATA-A- N/C_17
M.2 SSD1 L0 45 46 49 50
GND_9 N/C_16 16 PCIE17L0_SATA4_MD2_SSD2_TXP PETP0/SATA-A+ PERST# -PLTRST_FAR 14,24,46,52,53,56,60,62
47 48 51 52
16 PCIE9L0_SATA0A_MD2_SSD1_TXN PETN0/SATA-A- N/C_17 GND_10 CLKREQ# -CLKREQ_PCIE7_MD2_SSD2 20
49 50 53 54
16 PCIE9L0_SATA0A_MD2_SSD1_TXP PETP0/SATA-A+ PERST# -PLTRST_FAR 14,24,46,52,53,56,60,62 20 -PCIE7_CLK_100M_MD2_SSD2 REFCLKN PEWAKE#
51 52 55 56
GND_10 CLKREQ# -CLKREQ_PCIE4_MD2_SSD1 20 20 PCIE7_CLK_100M_MD2_SSD2 REFCLKP N/C_18
53 54 57 58
20 -PCIE4_CLK_100M_MD2_SSD1 55 REFCLKN PEWAKE# 56 GND_11 N/C_19
20 PCIE4_CLK_100M_MD2_SSD1 REFCLKP N/C_18
57 58 59 NC NC 60
GND_11 N/C_19 61 NC NC 62
59 NC NC 60 63 NC NC 64
61 NC NC 62 65 NC NC 66
B 63 NC NC 64 67 68 B
65 NC NC 66 PCIE_DETECT_SSD2 69 N/C_1 SUSCLK 70
67 68 71 PEDET 3.3V_7 72
PCIE_DETECT_SSD1 69 N/C_1 SUSCLK 70 73 GND_12 3.3V_8 74
PEDET 3.3V_7 72 GND_13 3.3V_9

10U_0603_6.3V6-M
71 75
GND_12 3.3V_8 74 77 -SSD2_DTCT GND_14
73 1 2
75 GND_13 3.3V_9 77 76 C490
77 -SSD1_DTCT GND_14 PEG1 PEG2
10U_0603_6.3V6-M

C489
0.01U_0402_25V7-K
77 76 @
PEG1 PEG2 1 2
C488 PCIe RXP/RXN is using TE_2-2199119-8 2 1
C487

TE_2-2199119-8
0.01U_0402_25V7-K
@ polarity inversion function. ME@

ME@ 2 1
PCIe RXP/RXN is using
polarity inversion function.
VCC3B

D5
VCC3B -DAS_MD2_SSD1 1 2 -PCIE_DETECT_SSD2
-SATALED 16 -PCIE_DETECT_SSD2 16

2
RB521CM-30 R275
10K_0402_5%
-PCIE_DETECT_SSD1 D9
-PCIE_DETECT_SSD1 16
2

-DAS_MD2_SSD2 1 2 TABLE
1

1
R274 D
10K_0402_5% RB521CM-30 PCIE_DETECT_SSD2 2 Q14
G LSK3541G1ET2L_VMT3 -PCIE_DETECT_SSD2 Device
PEDET (PE_DTCT)
1

D S
SATA Device GND

3
PCIE_DETECT_SSD1 2 Q13 High SATA SSD
A G LSK3541G1ET2L_VMT3 TABLE PCIe Device Open A

PEDET (PE_DTCT)
SATA Device GND
S Low PCIe SSD
3

-PCIE_DETECT_SSD1 Device
PCIe Device Open
High SATA SSD
Security Classification LC Future Center Secret Data Title
Low PCIe SSD Issued Date 2015/07/16 Deciphered Date 2016/01/16 M.2 SATA/PCIE SSD CARD SLOT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 60 of 111
5 4 3 2 1
5 4 3 2 1

PRTC3

BATT CR2032 3V 225MAH


D RTC@ D

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/11/08 Deciphered Date 2013/11/08 Load BOM Only(RTC BATTERY)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 60 of 60
5 4 3 2 1
5 4 3 2 1

TYPE-B NGFF CCARD FOR WWAN


VCC3WAN
VCC3WAN

VCC3WAN
3.2H CONNECTOR

@
10U_0603_6.3V6-M
1U_0402_6.3V6-K
R277
JWWAN1 47K_0402_5% 1 1 1
1 2 0.1U_0402_25V6-K
16 WWAN_CFG3 CONFIG_3 3.3VAUX1 C491

C492

C493
3 4

1
5 GND1 3.3VAUX2 6
R278 1 2 0_0402_5% USBP3+_WWAN_C 7 GND2 FULL_CARD_POWER_OFF# 8 -WWAN_DISABLE 2 2 2
D 15 USBP3+_WWAN USBP3-_WWAN_C USB_D+ W_DISABLE#1 -WWAN_DISABLE 83 D
R276 1 2 0_0402_5% 9 10
15 USBP3-_WWAN 11 USB_D- GPIO9/LED1#/DAS/DSS#
GND3 NC 12
13 NC NC 14
15 NC KEY-B NC 16
17 NC NC 18
19 NC 20
21 GPIO_5 22
19 WWAN_CFG0 23 CONFIG_0 GPIO_6 24
25 GPIO_11 GPIO_7 26 JSIM1
27 DPR GPIO_10 28 1
29 GND4 GPIO_8 30 UIM_RESET 5 VCC 4
31 PERn1/USB3.0-RX-/SSIC-RxN UIM-RESET 32 UIM_CLK_R R279 1 2 200_0402_1% UIM_CLK VPP GND1 8
33 PERp1/USB3.0-RX+/SSIC-RxP UIM-CLK 34 UIM_DATA Micro SIM Conn GND2 9
35 GND5 UIM-DATA 36 UIM_PWR GND3 10
37 PETn1/USB3.0-TX-/SSIC-TxN UIM-PWR 38 2 GND4 11
39 PETp1/USB3.0-TX+/SSIC-TxP DEVSLP 40 3 RST GND5 12
41 GND6 GPIO_0 42 6 CLK GND6 13
43 PERn0/SATA-B+ GPIO_1 44 I/O GND7 14
45 PERp0/SATA-B- GPIO_2 46 GND8 15
GND7 GPIO_3 GND9

FTZ6.8EGT148_SC-74A5
47 48 16
@ D25 49 PETn0/SATA-A- GPIO_4 50 7 GND10 17
51 PETp0/SATA-A+ PERST# 52 Detection_Switch GND11
GND8 CLKREQ# 2
RCLAMP0502BPTCT_SC75-3 53 54 C494
REFCLKN PEWake#

1
2
3
5

4.7U_0402_6.3V6-M
55 56 47P_0402_50V8-J

1
57 REFCLKP NC1 58 @ TE_2229333-2
GND9 NC2 1 1

C495
59 60 D26 ME@
61 ANTCTRL0 COEX3 62

4
63 ANTCTRL1 COEX2 64
65 ANTCTRL2 COEX1 66 2
ANTCTRL3 SIM_DETECT

2
R826 2 1 0_0402_5% 67 68
16 -WWAN_RESET 69 RESET# SUSCLK 70 R280
C 16 WWAN_CFG1 71 CONFIG_1 3.3VAUX3 72 C
51_0402_1%
73 GND10 3.3VAUX4 74 @
75 GND11 3.3VAUX5

1
16 WWAN_CFG2 CONFIG_2
76 77 VCC3WLAN
PEG1 PEG2
ARGOS_NASB0-S6705-TSH4
ME@

5A_32V_ERBRE5R00V
1
TYPE-A NGFF CCARD FOR WLAN

F21
VCC3WLAN_F

2
VCC3WLAN_F
3.2H CONNECTOR
JWLAN1

@
10U_0603_6.3V6-M
1U_0402_6.3V6-K
1 2
R282 1 2 0_0402_5% USBP14+_WLAN_C 3 GND1 3.3VAUX1 4
15 USBP14+_WLAN USB_D+ 3.3VAUX2 0.1U_0402_25V6-K 1 1 1
R283 1 2 0_0402_5% USBP14-_WLAN_C 5 6
15 USBP14-_WLAN USB_D- KEY A LED1# C496

C497

C498
7
GND2 NC 8
9 NC NC 10 2 2 2
11 NC NC 12
13 NC NC 14
16
15 NC LED2#
17 18
19 MLDIR_SENSE GND16 20
21 DP_ML3N DP_AUXN 22
B 23 DP_ML3P DP_AUXP 24 B
25 GND3 GND13 26
27 DP_ML2N DP_ML1N 28
29 DP_ML2P DP_ML1P 30
31 GND4 GND14 32
33 DP_HPD DP_ML0N 34 WLAN CARD LCFC UART CARD
35 GND5 DP_ML0P 36
15 PCIE3_WLAN_SLOT_TXP 37 PETP0 GND15 38
15 PCIE3_WLAN_SLOT_TXN 39 PETN0 RESERVED1 40 -CL_RST_WLAN 16
PIN54 BDC_ON NC (RX NOT USED)
41 GND6 RESERVED2 42 CL_DATA_WLAN 16
15 PCIE3_WLAN_SLOT_RXP 43 PERP0 RESERVED3 44 CL_CLK_WLAN 16
15 PCIE3_WLAN_SLOT_RXN 45 PERN0 COEX3 46 PIN64 RESERVED UART_TX
47 GND7 COEX2 48
20 PCIE2_CLK_100M_WLAN 49 REFCLKP0 COEX1 50 SUSCLK_32K
20 -PCIE2_CLK_100M_WLAN 51 REFCLKN0 SUSCLK 52 -PLTRST_NEAR SUSCLK_32K 17,75
R611 ASM NO_ASM
-CLKREQ_PCIE2_WLAN 53 GND8 PERST0# 54 -PLTRST_NEAR 14,54,75,82,83,84
20 -CLKREQ_PCIE2_WLAN -PCIE_WAKE 55 CLKREQ0# W_DISABLE2# 56 -WLAN_RF_KILL BDC_ON 83
17,46,54,84 -PCIE_WAKE 57 PEWAKE0# W_DISABLE1# 58 -WLAN_RF_KILL 83
R609 NO_ASM ASM
59 GND9 I2C_DATA 60 2016/04/07 Delete EC_P80DATA due to no use.
VCC3B 61 PETP1 I2C_CLK 62
63 PETN1 ALERT# 64 R609 1 @ 2 0_0402_5%
65 GND10 RESERVED4 66 -VIDEO_THERM_ALERT 32,77
67 PERP1 PERST1#
1

68
R284 69 PERN1 CLKREQ1# 70
10K_0402_5% 71 GND11 PEWAKE1# 72 LOGIC
73 REFCLKP1 3.3VAUX4 74 @ JTX 1 2 SHORT PADS
75 REFCLKN1 3.3VAUX5 HP_R_JACK 54,67
2

GND12
76 77 For UART TX DEBUG
PEG1 PEG2
IOR-B change FL8, FL9 to 0Ω
2

ARGOS_NASA0-S6705-TSH4 @R315 and R317 Mount JTX and JRX


@ D27 ME@
A A
RCLAMP0502BPTCT_SC75-3
1

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 M.2 WIRELESS CARD SLOT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 61 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC3B VCC3B_UHS2

R286
2 1

10U_0603_6.3V6-M
0.01_0603_LE_1%

0.1U_0402_25V6-K
1 2

C500
close to IC

C499
2 1
VCC3_AUX_UHS2

VCC3B SD_CLK

6.8P_0201_25V8--J
2

C572
EMC Part
R289
2 1 1

C 0.01_0603_LE_1% @ C

0.1U_0402_25V6-K

4.7U_0402_6.3V6-M
2 1

C502
C501
AV12 AV12

1 2 VCC3R3_SD VCC3B_UHS2 MS_INS# has internal pull up


resisters 200K ohm. VCC3_AUX_UHS2
U23

VCC3B_UHS2 11 30
3V3_IN SD_CD# -SD_CD 63
close to IC DV33_18 18 31
DV33_18 MS_INS#

1U_0402_6.3V6-K
R290
1 AV12 10 32 2 1
AV12 WAKE#

C506
14 10K_0402_5%
VCC3_AUX_UHS2 DV12S
2
15 SD_D1_RCLK_M_R R300 1 2 0_0402_5%
SP1 SD_D1_RCLK_M 63
VCC3R3_SD 12 16 SD_D0_RCLK_P_R R299 1 2 0_0402_5%
Card_3V3 SP2 SD_D0_RCLK_P 63
17 SD_CLK_R R296 1 2 0_0402_5%
27 SP3 SD_CLK 63
3V3aux 19 SD_CMD_R R295 1 2 0_0402_5%
R298 SP4 SD_CMD 63
2 1 RREF 9 20 SD_D3_R R294 1 2 0_0402_5%
RREF SP5 SD_D3 63
21 SD_D2_R R293 1 2 0_0402_5%
6.2K_0402_1% SP6 SD_D2 63
PCIE13_MEDIACARD_TXP 3 29
B 16 PCIE13_MEDIACARD_TXP HSIP SP7 -SD_WPI 63 B
PCIE13_MEDIACARD_TXN 4
16 PCIE13_MEDIACARD_TXN HSIN close to IC VCC1R8_SD
PCIE13_MEDIACARD_RXP C504 1 2 0.1U_0402_25V6-K PCIE13_CARD_RXP_C7
16 PCIE13_MEDIACARD_RXP HSOP
PCIE13_MEDIACARD_RXN C505 1 2 0.1U_0402_25V6-K PCIE13_CARD_RXN_C8 13 VCC1R8_SD
16 PCIE13_MEDIACARD_RXN HSON SD_VDD2
22
close to IC SD_LN1_P SD_D1P 63
PCIE0_CLK_100M_UHS2 5 23
20 PCIE0_CLK_100M_UHS2 REFCLKP SD_LN1_M SD_D1M 63
-PCIE0_CLK_100M_UHS2 6 24 SDREG2
20 -PCIE0_CLK_100M_UHS2 REFCLKN SDREG2
Zdiff = 100 ohm 25
SD_LN0_M SD_D0M 63
-PLTRST_FAR 1 26
14,24,46,52,53,56,60 -PLTRST_FAR PERST# SD_LN0_P SD_D0P 63

1U_0402_6.3V6-K
-CLKREQ_PCIE0_UHS2 2
20 -CLKREQ_PCIE0_UHS2 CLK_REQ# 1

C503
R291
2 1 28 33
close to IC GPIO E-PAD 2
AV12 VCC3B_UHS2 10K_0402_5%
RTS5234S-GR_QFN32_4X4

VCC3_AUX_UHS2
2
10K_0402_5%
0.1U_0402_25V6-K

0.1U_0402_25V6-K

R292
4.7U_0402_6.3V6-M

2 1 2
C508
C507

C509

A A
1 2 1

C507 Close to Pin10 Security Classification LC Future Center Secret Data Title
C508, C509 Close to Pin14 Issued Date 2015/07/16 Deciphered Date 2016/01/16 MEDIA CARD CONTROLLER UHS-II
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 62 of 111


5 4 3 2 1
5 4 3 2 1

Normal type UHS-II SD Slot


Pin No SD Mode UHS II Mode
1 CD/DAT3
2 CMD
3 VSS1
4 Bottom View
VDD VDD1
5 CLK
6 VSS2 UHS II Interface UHS I Inteface
7 DAT0 RCLKP 4 VDD1 3.3V 1 CD/DAT3
8 DAT1 RCLKM 12345678
D 9 DAT2
9 7 RCLKP 2 CMD D
10 VSS3 8 RCLKM 3 VSS1
11 D0P
12 D0M
10 VSS3 4 VDD 3.3V
13 VSS4 10 1314 17 11 D0P 5 CLK
14 VDD2 1112 1516
15 D1M
12 D0M 6 VSS2
16 D1P 13 VSS4 7 DAT0
17 VSS5 14 VDD2 1.8V 8 DAT1
CD
WP 15 D1M 9 DAT2
CARD DETECT 16 D1P
WRITE PROTECT
17 VSS5

VCC3R3_SD VCC1R8_SD

JSD1

4 14
VDD_1 VDD_2 11
D0+ 12 SD_D0P 62
D0- 15 SD_D0M 62
2 D1- 16 SD_D1M 62
C 62 SD_CMD 5 CMD D1+ 10 SD_D1P 62 C
62 SD_CLK CLK VSS_3 13
7 VSS_4 17
62 SD_D0_RCLK_P 8 DAT0/RCLK+ VSS_5
62 SD_D1_RCLK_M 9 DAT1/RCLK- 20
62 SD_D2 1 DAT2 GND_1 21
62 SD_D3 CD/DAT3 GND_2 22
GND_3 23
18 GND_4 24
62 -SD_CD 19 CARD_DETECT GND_5 25
62 -SD_WPI WRITE_PROTECT GND_6 26
GND_7
3
VSS_1
0.1U_0402_10V7-K

0.1U_0402_10V7-K
4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M
6
VSS_2
2 1 TAISO_156-1000302612 2 1
C511

C513
C510

C512
ME@

1 2 1 2

CD : Low => Insertion Card


High => No Card
WP : Low => Write Protection On
High => Wite Protection Off or No Card

B B

For EMC
1 2 1 2 SD_CLK

@ C573 @ R643
10P_0402_50V8-J 33_0402_5%

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 MEDIA CARD INTERFACE UHS-II
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 63 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC5B VCC3B

0.5A_32V_ERBRD0R50X
2

2
F8
R648
10K_0402_5%
C C

1
JSC1
1 VCC5B_FUSED
1 2
2 3 USBP11-_SMART_CARD 15
3 4 USBP11+_SMART_CARD 15
4 5
5 6
6 -SC_DTCT 18

7
8 GND1
GND2
KYOCE_046811-606-000846
ME@

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 SMART CARD READER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 64 of 111


5 4 3 2 1
5 4 3 2 1

VCC5B
Design note:
RF solution, close to SATA conn.

D D

2
1 1
R306 RF@ RF@
0.01_0603_LE_1% C525 C718
47P_0402_50V8-J 0.1U_0402_25V6-K
2 2

1
AC Cap for TX side placed on PCH side JHDD1

1
SATA2_HDDBAY_TXP 2 GND1
16 SATA2_HDDBAY_TXP SATA2_HDDBAY_TXN 3 A+
16 SATA2_HDDBAY_TXN 4 A-
SATA2_HDDBAY_RXN C526 1 2 0.01U_0201_6.3V7-K SATA2_HDDBAY_RXN_C 5 GND2
16 SATA2_HDDBAY_RXN SATA2_HDDBAY_RXP 1 2 0.01U_0201_6.3V7-K SATA2_HDDBAY_RXP_C 6 B-
C527
16 SATA2_HDDBAY_RXP 7 B+
GND3

8
9 VCC_3V3_1
10 VCC_3V3_2
11 VCC_3V3_3
12 GND4
77 -HDDBAY_DTCT 13 GND5
VCC5B_HDD 14 GND6
15 VCC5_1
C 16 VCC5_2 C
17 VCC5_3
18 GND7
19 RESERVED
20 GND8
21 VCC12_1
22 VCC12_2
VCC12_3

10U_0603_6.3V6-M
2 1
C528

C529
0.01U_0402_25V7-K HIGHS_SA2S0221-1211H
@ ME@
1 2

SATA HDD on Board CONN

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 SATA HDD CONN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 65 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC5MUBAY

C C

10U_0603_6.3V6-M
0.1U_0402_10V7-K

1U_0402_6.3V6-K
NO DEVICE ODD BAY ADAPTER w/HDD
2 1

C530

C531

C532
PIN#8 DP DEVICE SIDE OPEN 1K ohm 4.7K ohm
1 2
PIN#8 DP VOLTAGE(TYP) 3.3V 0.3V 1.1V

PIN#11 MD FUNCTION OPEN -EJECT OPEN

JODD1

1
SATA3_ODDBAY_TXP 2 GND1
16 SATA3_ODDBAY_TXP SATA3_ODDBAY_TXN 3 A+
16 SATA3_ODDBAY_TXN 4 A-
SATA3_ODDBAY_RXN C533 1 2 0.01U_0201_6.3V7-K SATA3_ODDBAY_RXN_CONN 5 GND2
16 SATA3_ODDBAY_RXN SATA3_ODDBAY_RXP SATA3_ODDBAY_RXP_CONN B-
C534 1 2 0.01U_0201_6.3V7-K 6
16 SATA3_ODDBAY_RXP 7 B+
GND3
R1029 1 2 0_0402_5%
77 BAY_ADAPTER_DTCT_ANALOG_EC
B R1030 1 @ 2 0_0402_5% BAY_ADAPTER_DTCT_ANALOG 8 B
16 BAY_ADAPTER_DTCT_ANALOG_PCH 9 DP
10 +5V_1
R1031 1 2 0_0402_5% -BAY_MEDIA_EJECT 11 +5V_2
77 -BAY_MEDIA_EJECT_EC 12 MD
R1032 1 @ 2 0_0402_5% 13 GND4 14
16 -BAY_MEDIA_EJECT_PCH GND5 G1 15
VCC3M VCC3SW VCC3M G2

10K_0402_5%
10K_0402_5%
PIN#8 DP was called "-BAY_ATTACH" in CS13

1
2
10K_0402_5%

FOX_LN27137-C00R-9H
2

ME@

R444
R440
@ R1047

2
1
1

SATA ODD CONN


EC Control mount R440
PCH Control mount R1047

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 SATA ODD CONN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 66 of 111
5 4 3 2 1
5 4 3 2 1

Max 0.4A
VCC3SW VCC3_SUS
VCC3B VCC1R8BA VCC5B

2.2U_0402_6.3V6-M
R308 R309 FL2 MPZ1608S331AT_2P R310

2.2U_0402_6.3V6-M
1 2 1 2 1 2 1 2 Max 1.5A

1M_0402_5%
10U_0603_10V6-K

10U_0603_10V6-K

10U_0603_6.3V6-M
0.1U_0402_16V7-K

0.1U_0402_16V7-K
1

1
0_0603_5% 0_0603_5% 0_0603_5%

0_0603_5%
10U_0603_10V6-K

C543

0.1U_0402_16V7-K

0.1U_0402_16V7-K
1 1 1 1 1

10U_0603_10V6-K

10U_0603_10V6-K
@ R1026
C540

C541

C542

C544
1 1

C537

C538

R655

C545
0.1U_0402_16V7-K

0.1U_0402_16V7-K
2 1 1 1 1

10U_0603_10V6-K

C546

C547

C548

C549
VCC3B 1 2 2 2 2 2

C539
1 1

2
2 2

C535

C536
2 2 2 2
2 AGND
2 2 AGND
SENSE A: Pin 9 200K : HP Detect

1
100K_0402_1%

100K_0402_1%
D AGND AGND AGND D
SENSE B: Pin 8 200K : Dock Mic Detect Analog plane.

2
100K : Dock HP Detect R1010 Place next to CODEC VCC5B

R314
R313
0_0603_5% FL3 MPZ1608S331AT_2P R318
1 2 1 2 Max 1.5A

2
0_0603_5%
Analog plane. VCC5BA

1
1
Max 0.25A

0.1U_0402_16V7-K
10U_0603_10V6-K

10U_0603_10V6-K

10U_0603_10V6-K
SENSE_A

0.1U_0402_16V7-K

0.1U_0402_16V7-K
R337 1 2 200K_0402_1%
69 SENSE_A_SYS_HP
1 1 1 1 1 1

C551

C553
C552

C554

C550

C555
10

18

19

22

24

29

31

44

51

46

45
7
R341 1 2 100K_0402_1% SENSE_B PCB trace width of Mic1-R/Mic1-L(SLEEVE/RING2) are U25
69 SENSE_B_DOCK_HP required at least 40 mil for HP crosstalk consideration

DVDD-IO

PVDD2

PVDD1

AVDD1
VD33STB

LDO3-CAP

LDO2-CAP

CPVPP

CPVEE

LDO1-CAP
DVDD

AVDD2/CPVDD
R446 1 2 200K_0402_1% and its length should be as short as possible 2 2 2 2 2 2
69 SENSE_B_DOCK_MIC

Analog plane. Place next to CODEC

HP_L_JACK R315 1 2 43_0402_1% HP_L_JACK_R 32 1 AGND 0_0402_5% 1 2 R316 DOCK_I2S_LRCLK


31,54 HP_L_JACK HPOUT-L I2S-LRCK/GPIO9 DOCK_I2S_LRCLK 74
HP_R_JACK R317 1 2 43_0402_1% HP_R_JACK_R 33 2
54,61 HP_R_JACK HPOUT-R GPIO1/DMIC-CLK2/SPDIF-OUT/I2S-IN-JD
34 3 0_0402_5% 1 2 R319 DOCK_I2S_SD_O
LINE1-R GPIO6/I2S-OUT DOCK_I2S_SD_O 74
35 4 1 TP8 Test_Point_20MIL VCC3B
LINE1-L GPIO2/DMIC-DATA2/I2S-OUT-JD
36 5 DOCK_I2S_SD_I
70 RING2 MIC1-L/RING2 GPIO5/I2S-IN DOCK_I2S_SD_I 74
37 6 R495 1 2 100K_0402_5%
70 SLEEVE MIC1-R/SLEEVE GPIO0/IRQOUT/HD-I2S-SEL
8 SENSE_B
C BEEP_MIX_ATT C556 1 2 0.1U_0402_16V7-K 23 I2S-OUT-JD/MIC-JD C
72 BEEP_MIX_ATT PCBEEP 9 SENSE_A
HP-JD/LINE-JD
CODEC_SP_OUTL+ 47 11
71 CODEC_SP_OUTL+ SPK-OUT-LP I2C-DATA
CODEC_SP_OUTL- 48 12
71 CODEC_SP_OUTL- SPK-OUT-LN I2C-CLK
CODEC_SP_OUTR- 49 13 HDA_BCLK
Speaker 4 ohm ==> 40 mils 71 CODEC_SP_OUTR- SPK-OUT-RN AUDIOLINK_BCLK/BCLK HDA_BCLK 17
Speaker 8 ohm ==> 20 mils CODEC_SP_OUTR+ 50 14
71 CODEC_SP_OUTR+ SPK-OUT-RP AUDIOLINK_SYNC/LRCK HDA_SYNC 17
15 -HDA_RST
AUDIOLINK_RESETO/MCLK -HDA_RST 17
21 16 HDA_SDIN0_R 33_0402_5% 1 2 R320 HDA_SDIN0
VBG/VREF1 AUDIOLINK_SDATA-IN/DOUT HDA_SDIN0 17
C557 1 2 2.2U_0402_6.3V6-M 25 17 HDA_SDO
CBN2 AUDIOLINK_SDATA-OUT/DIN HDA_SDO 17
26
CBP2 52 -SPK_MUTE
1 2 2.2U_0402_6.3V6-M 27 EAPD+PD#/GPIO11 -SPK_MUTE 75
C558
CBP1 53 R677 1 EMC@ 2 0_0402_5% MIC_CLK
28 DMIC-CLK1 MIC_CLK 40
CBN1 54 MIC_DATA
30 DMIC-DATA1 MIC_DATA 40
CPVREF 55 0_0402_5% 1 @ 2 R321 DOCK_I2S_MCLK
38 GPIO8/I2S-MCLK/SPDIF-IN DOCK_I2S_MCLK 74
70 MIC1_VREFOL MIC1-VREFO-L/AGPO-0 56 1 2 R322 DOCK_I2S_BCLK
0_0402_5%
39 GPIO7/I2S-BCLK DOCK_I2S_BCLK 74
70 MIC1_VREFOR MIC1-VREFO-L/AGPO-1 1 2 R661 I2S_CTRL
0_0402_5%
40 I2S_CTRL 74
LINE1-VREFO
41

Thermal_pad
B MIC1-CAP B
43
TABLE: INTERNAL MIC HW ENABLE/DISABLE

AVSS1

AVSS2
VREF
33P_0402_50V8-J

33P_0402_50V8-J

33P_0402_50V8-J

33P_0402_50V8-J

10U_0603_6.3V6-M
10U_0603_6.3V6-M

0.1U_0402_16V7-K
2.2U_0402_6.3V6-M

Enable Diasble
1 1 1 1 1
C559

C561

DOCK_I2S_SD_I R323
C562

C563

1 1 1 42 ALC3268-CG_QFN56_7X7 2 1 10K_0402_5%

20

57
C566

C567
C565
C564

R53 ASM NOASM


@
2 2 2 2 2 -HDA_RST R324 1 2 47K_0402_5%
2 2 2 @
R677 ASM NOASM HDA_SDO 1 2
C560 47P_0402_50V8-J
@ @ @ @

↑ -SPK_MUTE R325 2 1 10K_0402_5%

LOGIC EMC@
AGND MIC_CLK C568 1 2 33P_0402_50V8-J
Place next to pin 43
Near Codec EMC@
MIC_DATA
PLACE UNDER ALC3268 C569 1 2 33P_0402_50V8-J
Analog plane.
1 2

EMC@ R326
0.001_0603_5%
VCC1R8B VCC1R8BA VCC5B VCC5BA

R327 R328 AGND


For EMC
1 2 1 2 1 2 1 2 HDA_BCLK
EMC Part
0.1U_0402_16V7-K

0.1U_0402_16V7-K
0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.01_0603_LE_1% 0.01_0603_LE_1% 1 2 @ C484 @ R642


10U_0603_10V6-K

10U_0603_10V6-K
10U_0603_10V6-K
10U_0603_10V6-K

10P_0402_50V8-J 33_0402_5%
A @ C570 A
1 1 1 1 1 1 1 1
C576

C579

C582
C578

C581
C575

C577

C580

0.01U_0402_25V7-K

2 2 2 2 2 2 2 2 AGND

C583 @ C584 @
1 2 1 2 Security Classification LC Future Center Secret Data Title
0.01U_0402_25V7-K 0.01U_0402_25V7-K Issued Date 2015/07/16 Deciphered Date 2016/01/16 AUDIO ALC3268
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AGND AGND Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
PAYTON
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 67 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

D28
DAN222MGT2L_VMD3
B 2 HP_JACK_IN B
54,69 HP_JACK_SYS 1 HP_JACK_IN 75
3
VCC3B

2
VCC3B
R332
470K_0402_5%

1
R334

4.7K_0402_5%
100K_0402_5%

2
R335

1
SENSE_B_DOCK_HP_CTRL 69

1
2 Q18
74 -DOCK_HP_DCT
DTC115EMGT2L_VMT3

3
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 AUDIO CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 68 of 111


5 4 3 2 1
5 4 3 2 1

D D

SENSE_A_SYS_HP
SENSE_A_SYS_HP 67

1
R573 D
HP_JACK_SYS 1 2 2 Q19
54,68 HP_JACK_SYS G LSK3541G1ET2L_VMT3
22K_0402_5%
1 S

3
C588
2.2U_0402_6.3V6-M
@
2

AGND AGND

SENSE_B_DOCK_HP
SENSE_B_DOCK_HP 67

1
R585 D
SENSE_B_DOCK_HP_CTRL 1 2 2 Q39
C 68 SENSE_B_DOCK_HP_CTRL G C
LSK3541G1ET2L_VMT3
22K_0402_5%
1 S

3
C623
2.2U_0402_6.3V6-M
@
2

VCC3B

VCC3B
TABLE: DOCK MIC HW ENABLE/DISABLE

2
Enable Diasble
1

R339
R340 100K_0402_5%
R340 ASM NOASM 10K_0402_5%
1
SENSE_B_DOCK_MIC 67
2

B B
R446 ASM NOASM
1

1
R339 ASM NOASM R342 D
2 Q20 1 2 2 Q21
74 -DOCK_MIC_DCT G LSK3541G1ET2L_VMT3
DTC115EMGT2L_VMT3 22K_0402_5%
Q20 ASM NOASM S
2
3

3
C589
R342 ASM NOASM 1000P_0402_50V7-K
1
Q21 ASM NOASM


LOGIC

EMC Part
2 1
A @ R475 A
0_0402_5%

AGND

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 AUDIO JACK SENSE


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 69 of 111
5 4 3 2 1
5 4 3 2 1

67 MIC1_VREFOR

1U_0402_6.3V6-K

2
1

C590
D R574 D
2.2K_0402_5%
2
TABLE: HS MIC HW ENABLE/DISABLE

1
Enable Diasble
AGND 1 2
L19 ASM NOASM
EMC@ L19
BK1005HS102-T_2P
67 MIC1_VREFOL L20 ASM NOASM

1U_0402_6.3V6-K
1 R578 NOASM ASM

2
C591
R577 R576 NOASM ASM
2 2.2K_0402_5%

1
LOGIC
AGND

1 2

EMC@ L20
BK1005HS102-T_2P

C C

R839
MIC_SLEEVE 1 2
54 MIC_SLEEVE SLEEVE 67
0_0603_5%

1
2
R578 C592
0_0402_5% 1000P_0402_50V7-K
@
PCB trace width of Mic1-R/Mic1-L(SLEEVE/RING2) are 1

2
required at least 40 mil for HP crosstalk consideration
and its length should be as short as possible

AGND

R840
MIC_RING2 1 2
54 MIC_RING2 RING2 67
0_0603_5%

1
B B
2
R576 C593
0_0402_5% 1000P_0402_50V7-K
@
1

2
EMC Part
2 1

@ R575
0_0402_5%
AGND

AGND

NEAR EXT MIC CONN


1 2

EMC@ C594
0.01U_0402_25V7-K

AGND

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 AUDIO EXT MIC I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 70 of 111
5 4 3 2 1
5 4 3 2 1

D D

ALC3268 speaker output part


EMC@ FL10 BLM18SG260TN1D_2P
1 2 SP_OUTR+
67 CODEC_SP_OUTR+
EMC@ FL11 BLM18SG260TN1D_2P
1 2 SP_OUTR-
67 CODEC_SP_OUTR-

EMC@ FL12 BLM18SG260TN1D_2P


1 2 SP_OUTL-
67 CODEC_SP_OUTL-
EMC@ FL13 BLM18SG260TN1D_2P
1 2 SP_OUTL+
67 CODEC_SP_OUTL+

1000P_0402_50V7-K

1000P_0402_50V7-K

1000P_0402_50V7-K

1000P_0402_50V7-K
C595

C596

C597

C598
2 2 2 2

@ @ @ @
PLACE NEAR Codec 1 1 1 1 Speaker 4 ohm ==> 40 mils
Speaker 8 ohm ==> 20 mils

C C

EMC Part

JSPK1

SP_OUTR+ 1
SP_OUTR- 2 1
SP_OUTL- 3 2 5
SP_OUTL+ 4 3 GND1 6
4 GND2

2 2 2 2 HIGHS_WS32041-S0471-HF
EMC@ EMC@ EMC@ EMC@ ME@
C599 C600 C601 C602
220P_0402_50V7-K 220P_0402_50V7-K 220P_0402_50V7-K 220P_0402_50V7-K
1 1 1 1

PLACE, NEAR SPEAKER CONNECTOR

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 AUDIO SPEAKER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 71 of 111
5 4 3 2 1
5 4 3 2 1

D D

D34 for Enhanced PC Beep function.


No use mount R999, unmount D34, D35

EC_SPKR D34 2 1 RB521CM-30


75 EC_SPKR

1
PCH_SPKR D35 2 1 RB521CM-30
17 PCH_SPKR
R350
10K_0402_5%

R999 1 @ 2 0_0402_5%

2
C C

2
R351
10K_0402_5%

1
BEEP_MIX_ATT
BEEP_MIX_ATT 67

1
D
-BEEP_ENABLE 2 Q22
75 -BEEP_ENABLE G LSK3541G1ET2L_VMT3

3
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 AUDIO BEEP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 72 of 111


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 SMART AMP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 73 of 111
5 4 3 2 1
5 4 3 2 1

VCC3SW
-PWRSHUTDOWN and DISCHARGE are not used in Thorpe.
VCC3B
Payton needs these signals because system AC
adapter can be attached even when docked.

1
4 5 DOCKID3
3 6 DOCKID2 R365
2 7 DOCKID1 33K_0402_5%
1 8 DOCKID0 DOCK_DCIN20 @ JDOCK1A

2
RP7 70 1 -DOCKED0
4.7K_0804_8P4R_5% 69 GND_1 DOCKED0# 2 DOCK_MDI_0+
68 RESERVE_7 DOCK_MDI_0P 3 DOCK_MDI_0- DOCK_MDI_0+ 57
67 NC DOCK_MDI_0N 4 DOCK_MDI_0- 57
D 66 DOCK_DCIN20 GND_5 5 DOCK_MDI_1+ D
-PWRSWITCH 65 NC will be update symbol DOCK_MDI_1P 6 DOCK_MDI_1- DOCK_MDI_1+ 57
54,83,84 -PWRSWITCH DOCK_I2S_MCLK 64 DOCK_PWR_SW# DOCK_MDI_1N 7 DOCK_MDI_1- 57
67 DOCK_I2S_MCLK DOCK_I2S_SD_I 63 DOCK_I2S_MCLK GND_6 8 DOCK_MDI_2+
67 DOCK_I2S_SD_I DOCK_I2S_SD_O 62 DOCK_I2S_SD_I DOCK_MDI_2P 9 DOCK_MDI_2- DOCK_MDI_2+ 57
67 DOCK_I2S_SD_O DOCK_I2S_BCLK 61 DOCK_I2S_SD_O DOCK_MDI_2N 10 DOCK_MDI_2- 57 VCC3B
67 DOCK_I2S_BCLK DOCK_I2S_LRCLK 60 DOCK_I2S_BCLK GND_7 11 DOCK_MDI_3+
67 DOCK_I2S_LRCLK -DOCK_HP_DCT 59 DOCK_I2S_LRCLK DOCK_MDI_3P 12 DOCK_MDI_3- DOCK_MDI_3+ 57
68 -DOCK_HP_DCT -DOCK_MIC_DCT 58 DOCK_HP_DCT# DOCK_MDI_3N 13 DOCK_MDI_3- 57
69 -DOCK_MIC_DCT 57 DOCK_MIC_DCT# GND_8 14
RESERVE_1 RESERVE_5

2
-PWRSHUTDOWN 56 15
85,86,88 -PWRSHUTDOWN DISCHARGE 55 #DOCK_PWRSHUTDOWN RESERVE_6 16 DOCK_DP_HPD
74,84,85 DISCHARGE -DOCK_PWRDCT 54 DOCK_DISCHARGE DOCK_DP0_HPD 17 DOCK_DP_HPD 43
R366
87 -DOCK_PWRDCT 53 #DOCK_PWRDCT DOCK_DP0_DGL_DCT 18 100K_0402_5%
52 DOCK_PWRGOOD DOCK_DP0_DDC_DATA 19

1
84 -PWRON_DOCK 51 DOCK_PWRON# DOCK_DP0_DDC_CLK 20
DOCKID3
14,77 DOCKID[3:0] DOCKID2 50 DOCK_ID3 GND_9 21
DOCKID1 49 DOCK_ID2 DOCK_DP0_AUXN 22 DOCK_AUXN 43
48 DOCK_ID1 DOCK_DP0_AUXP 23 DOCK_AUXP 43
DOCKID0
ACDC_ID 47 DOCK_ID0 GND_10 24 DOCK_DP3N_C C625 1 2 0.1U_0402_10V7-K
76,86 ACDC_ID DOCK_ACDC_ID DOCK_DP0_LANE3N DOCK_DP3N 43

2
DOCK_CONSUMP 46 25 DOCK_DP3P_C C626 1 2 0.1U_0402_10V7-K
88 DOCK_CONSUMP 45 DOCK_CONSUMP DOCK_DP0_LANE3P 26 DOCK_DP3P 43
44 GND_2 GND_11 27 DOCK_DP2N_C C627 1 2 0.1U_0402_10V7-K R367
19 USB3P4_DOCK_TXP DOCK_USB_SS_TXP DOCK_DP0_LANE2N DOCK_DP2P_C DOCK_DP2N 43
43 28 C628 1 2 0.1U_0402_10V7-K 100K_0402_5%
19 USB3P4_DOCK_TXN DOCK_USB_SS_TXN DOCK_DP0_LANE2P DOCK_DP2P 43
42 29

1
41 GND_3 GND_12 30 DOCK_DP1N_C C629 1 2 0.1U_0402_10V7-K
19 USB3P4_DOCK_RXP DOCK_USB_SS_RXP DOCK_DP0_LANE1N DOCK_DP1N 43
40 31 DOCK_DP1P_C C630 1 2 0.1U_0402_10V7-K
19 USB3P4_DOCK_RXN DOCK_USB_SS_RXN DOCK_DP0_LANE1P DOCK_DP1P 43
39 32
38 GND_4 GND_13 33 DOCK_DP0N_C C631 1 2 0.1U_0402_10V7-K
15 USBP4+_DOCK DOCK_USB_SS_DP DOCK_DP0_LANE0N DOCK_DP0N 43
37 34 DOCK_DP0P_C C632 1 2 0.1U_0402_10V7-K
15 USBP4-_DOCK DOCK_USB_SS_DN DOCK_DP0_LANE0P DOCK_DP0P 43
36 35 -DOCKED0
DOCKED2# DOCKED1#
C C

TE_2129525-6 NEAR DOCK CONN DOCK_PWR20_IN


ME@

DOCKED2#
JDOCK1B

DOCK_PWR20 DOCK_PWR20_IN 71 73
D36 1 2 1SS400CMT2R I2S_CTRL PWR20 SHELL_1 74
I2S_CTRL 67 SHELL_2 75
Q23
SI7135DP-T1-GE3 POWERPAK SO-8 SHELL_3 76
1 SHELL_4 77
2 SHELL_5 78
3 D37 1 2 1SS400CMT2R -DOCK_ATTACHED_20 SHELL_6 79
5 SHELL_7 80
SHELL_8 81
72 SHELL_9 82
4

GND_14 SHELL_10
2

1
R368 C633
2
100_0402_5%

200K_0402_1% 0.1U_0402_25V6-K
2
VCC3M
1

R370 1 R371
R369

2
-DOCK_ATTACHED_20 2 1 TE_2129525-6
100K_0402_5%
D39 ME@
3 -DOCK_ATTACHED_3M
100K_0402_5% 1 -DOCK_ATTACHED_3M 83
DCIN_PWR20_F 2 -DOCK_ATTACHED_AUX
-DOCK_ATTACHED_AUX 57
B DAN222MGT2L_VMD3 B
1

R372
1M_0402_5%
VCC3SW
DCIN_PWR20_F DCIN_PWR20_F
2

D40
2 1
86,88 -DOCK_ATTACHED_BAT_OP

2
1SS400CMT2R R373

1
100K_0402_5%
1

R375 R376
R374 1M_0402_5% 1M_0402_5%

1
1M_0402_5%

2
DISCHARGE2
2

DISCHARGE2 86

1
D
2

1
1 G

1
1

1
D D R379
-DOCK_ATTACHED_BAT_OP 2 R377 2 R378 Q24 S 0_0402_5%

3
1
G 1M_0402_5% G 1M_0402_5% D LSK3541G1ET2L_VMT3 @
2

2
Q25 S Q26 S G
2

2
3

3
LSK3541G1ET2L_VMT3 LSK3541G1ET2L_VMT3 Q27
S LSK3541G1ET2L_VMT3

3
A A

DISCHARGE
74,84,85 DISCHARGE

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 DOCKING CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 74 of 111


5 4 3 2 1
5 4 3 2 1

VCC3B
VCC3_SUS VCC3M

2
10K_0402_5%

R566
1

1
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
4.7K_0402_5%

4.7K_0402_5%
R565

R564

R380

R381

R384

R387

R388
R382

R383
U27A

1
1

2
D D
DRV[17:0] 78
F1 L11 DRV0
84 -EC_RESET RESETI# KSO0 B7 DRV1
KSO1 E6 DRV2
B3 KSO2 B6 DRV3
17,61 SUSCLK_32K 32KHZ_IN/GPIO165 KSO3 H12 DRV4
J5 KSO4 G10 DRV5 VCC3B
19 -KBRC KBRST KSO5 G9 DRV6
KSO6 H13 DRV7
K6 KSO7 C6 DRV8
23 -EC_SCI EC_SCI# KSO8 C7 DRV9
KSO9

2
N7 B5 DRV10
23 -EC_WAKE SMI# KSO10 H10 DRV11 R386
KSO11

HOST I/F
H6 H11 DRV12 100K_0402_5%
19,83 -SUS_STAT LPCPD# KSO12 A5 DRV13
L5 KSO13 L13 DRV14

1
17,83 -CLKRUN CLKRUN# KSO14 N12 DRV15
N5 KSO15 M11 DRV16
19,83 IRQSER SER_IRQ KSO16/GPIO152 D5 DRV17
KSO17/GPIO175 VCC3M VCC3SW

Keyboard/TrackPoint
M5
4,54,61,82,83,84 -PLTRST_NEAR LRESET# SENSE[7:0] 78
L6 N13 SENSE0
19,83 -LPC_FRAME LFRAME# KSI0

100K_0402_5%

20K_0402_5%
100K_0402_5%
J6 SENSE1
KSI1

1
1
N6 N8 SENSE2
19 LPCCLK_EC_24M PCI_CLK KSI2

R389

R391
R390
J11 SENSE3
LPC_AD0 M6 KSI3 J12 SENSE4
LPC_AD1 M7 LAD0 KSI4 J13 SENSE5
LPC_AD2 L7 LAD1 KSI5 M12 SENSE6

2
2
LPC_AD3 K7 LAD2 KSI6 M13 SENSE7
LAD3 KSI7
C C
19,83 LPC_AD[3:0] C2
VCI_IN2#/GPIO161 -HOTKEY 78
1 R392 2 K3 M9
87 M_TEMP ADC0/GPIO200 PWM0/GPIO053 KBD_BL_PWM 78
1K_0402_5%
E7 A6
87 I2C_DATA_BT SMB00_DATA GPIO036 -KBD_BL_DTCT 78
A7
87 I2C_CLK_BT SMB00_CLK

Battery
F11 R393 1 2 33_0402_5%
H7 PS2_CLK0A/GPIO114 IPDCLK 79
88 -CHG_PROCHOT GPIO223 K13 R394 1 2 33_0402_5%
K1 PS2_DAT0A/GPIO115 IPDDATA 79
87 BAT_FET_HOT ADC1/GPIO201
J7
1 2 100_0402_5% E8 GPIO052 -PAD_RESET 79
R395
88 I2C_DATA_CHARGE 1 2 100_0402_5% B8 SMB02_DATA A13
R396
88 I2C_CLK_CHARGE SMB02_CLK GPIO133 TP4_RESET 78,79

1 C12
EC changes thermal table L4 GPIO134 BYPASS_PAD 79
C287
0.1U_0402_25V6-K based on "-I_AM_WALTER" bit. ADC4/GPIO204
@ -I_AM_WALTER G7
2 GPIO224
C9
GPIO143/SMB04_DATA VGA_BLON 41

LCD
A8
GPIO144/SMB04_CLK BACKLIGHT_ON 42
A4
40 -LEDLOGO LED0/GPIO156
F5
54 -LEDPWR LED1/GPIO157 C11
GPIO145/JTAG_TDI BDC_ON_R 83

Wireless
C3 A11
B 78 -LEDMICMUTE GPIO024 GPIO146/JTAG_TDO -WWAN_DISABLE_R 83 B
D12 C10
78 -LED_MUTE GPIO035 GPIO147/JTAG_CLK -WLAN_RF_KILL_R 83

LED
F6
78 -LEDFNLOCK GPIO034
H2
78 -LEDCAPSLOCK GPIO221 J8
PWM2/GPIO055 EC_SPKR 72
LED_AC_ADAPTER_ON C5 K5
GPIO225 GPIO166 -BEEP_ENABLE 72

Audio
LED_AC_ADAPTER_CHG H1 D10
GPIO226 GPIO171/MSDATA -SPK_MUTE 67
E10
GPIO170/MSCLK HP_JACK_IN 68

ORANGE

220P_0402_50V7-K

220P_0402_50V7-K

4700P_0402_25V7-K

100K_0402_5%
1 1 1

1
C634

C635

C636
R149 LED1 MEC1653
LED_AC_ADAPTER_CHG

R398
1 2 2 1 R385
100K_0402_5%
470_0402_5% 2 2 2
3

2
R568 12-22A-S2G6C-A30-2C_ORG_YEL_GREEN
LED_AC_ADAPTER_ON 2 1

300_0402_1%

GREEN Thorpe has 0 ohm jumpers on MSDATA/MSCLK


but it's not required on Payton because
Place near DC-IN LNV/LCFC won't use it. (CT_20140903)
A A
CONNECTOR (MB EDGE)

For EMC
1 2 1 2 LPCCLK_EC_24M Title
Security Classification LC Future Center Secret Data
@ C458 @ R641
10P_0402_50V8-J 33_0402_5%
Issued Date 2015/07/16 Deciphered Date 2016/01/16 MEC1653L(1/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 75 of 111
5 4 3 2 1
5 4 3 2 1

VCCSTG
Test_Point_40MIL TP66 1 -PWRSW_EC VCC3M

VCC3M

1
R406

2
100K_0402_5%

10K_0402_5%

100K_0402_5%

10K_0402_5%

100K_0402_5%

10K_0402_5%
750_0402_1%

D41
RB521CS-30GT2RA_VMN2-2
510_0402_5%

R399

R400

R401

R402

R403

R404

R405
R410 @
2 1

2
-PROCHOT 102,7,91

1
100K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
@ Q28

LSK3541G1ET2L_VMT3
1
R407

R408

R409
D 75_0402_1%

1
PROCHOT_EC

47P_0402_50V8-J
@ 2
G

100K_0402_5%
1

2
2

C637
D S D

3
R411
U27B

22_0402_5% 2

Sensor
D7 D8 R570 1 2
84 -PWRSW

2
GPIO127/A20M SMB01_DATA/GPIO005 I2C_DATA_GSENSE 81
G2 C8 R569 1 2
17 -PWRSW_EC GPIO106 SMB01_CLK/GPIO006 I2C_CLK_GSENSE 81
22_0402_5% to/from APS sensor
RB521CM-30
D42 1 2 L9 Damper resisters to fine-tune
84,88 -EXTPWR GPIO001/PWM4 I2C signals
1 R412 2 L2 M1
74,86 ACDC_ID ADC2/GPIO202 ADC3/GPIO203 FAN_ID_CPU 80
10K_0402_5%
E2

FAN
17 AC_PRESENT GPIO022 N9 to/from CPU FAN Module
PWM1/GPIO054 FAN_ON_CPU 80

R1069 1 2 0_0201_5% -PCH_SLP_SUS_R K12 D6


17 -PCH_SLP_SUS GPIO140/SMB06_CLK FAN_TACH0/GPIO050 FAN_FRQ_CPU 80
-RSMRST R854 1 2 0_0402_5% -RSMRST_EC E3
17,24 -RSMRST BGPO3/GPIO172 -SHUTDOWN 85
B2 VCCST
85 SUS_ON1 BGPO1/GPIO101

1
C4
96 SUS_ON2 BGPO2/GPIO102 2
BPWRG Q29

Power Management
B11
VREF_VTT DTC115EMGT2L_VMT3
G11 B12 33_0402_5% 1 2 R413
17,46,84,95 -PCH_SLP_S3

3
GPIO110 PECI_DAT PECI 16,7
G12 VCC3B
17,84 -PCH_SLP_S4 GPIO111
C F3 C
17,24,83,85 BPWRG VCC_PWRGD
D9 100_0402_5% 1 2 R414
SMB03_DATA/GPIO007 EC_SDA2 17

1
1
R810 1 2 0_0402_5% -LID_CLOSE_EC A1 F8 100_0402_5% 1 2 R415 from/to PCH-H R416 R417 C638
40,42 -LID_CLOSE VCI_IN3#/GPIO000 SMB03_CLK/GPIO010 EC_SCL2 17
4.7K_0402_5% 1K_0402_5% 0.1U_0402_25V6-K
2

2
A12
17 -PCH_SLP_WLAN GPIO043
E12 R418 1 2 0_0402_5% -THRM
M8 SYS_SHDN#
85 VCC5_TP_ON GPIO222

Thermal

3
1
E
1 1 C 1
G3 2 Q30 2
B S TR 2SCR523MT2L NPN VMT3
56,57 RJ45_LINKUP GPIO033 Q31
G13 C639 C640 B S TR 2SCR523MT2L NPN VMT3 C641
DP1_DN4 E
C

1
3
B10 2 2 2
83 -DOCK_ATTACHED_3M_R GPIO150/JTAG_TMS F13 2200P_0402_25V7-K 22P_0402_50V8-J 22P_0402_50V8-J
DN1_DP4

3
1
N1 E13
E
1 1 C 1
88 ISYS ADC5/GPIO205 DP2_DN5 S TR 2SCR523MT2L NPN VMT3
2 2
B
Q32
J4 C642 C643 B S TR 2SCR523MT2L NPN VMT3 C644 Q33
88 -BOOST_MODE GPIO227 D13
C
E

1
3
PROCHOT_EC D3 DN2_DP5 2 2 2
LED2/GPIO153 2200P_0402_25V7-K 22P_0402_50V8-J 22P_0402_50V8-J
C13
DP3_DN6

3
1
E
1 1 C 1
B13 2 Q34 2
B S TR 2SCR523MT2L NPN VMT3
M10 DN3_DP6 C645 C646 B S TR 2SCR523MT2L NPN VMT3 C647 Q35
B 54 AOU_SEL1 GPIO015/PWM7 E
C B

1
3
L8 2 2 2
54 AOU_SEL2 GPIO016 2200P_0402_25V7-K 22P_0402_50V8-J 22P_0402_50V8-J

USB/AOU
H9 Plance near EC pinout
54 -AOU_IFLG GPIO025/UART_CLK TBTA_TBTB_IRQ
D11 Cap should be placed near 2SCR523M
GPIO220/VIN

B4
54 USB_ON1 BGPO4/GPIO173 E11
E4 VSET R420 1 2 0_0402_5%
54 USB_ON2 BGPO5/GPIO174 TBTB_I2C_IRQ2Z 52,53,77

1
R1068 1 2 0_0402_5%
TBTA_I2C_IRQ2Z 52,53
ESD5Z3.3T1G_SOD523-2

R419
4.53K_0402_1%
1

MEC1653

2
1

1
1

1
1
100K_0402_5%

100K_0402_5%
100K_0402_5%

100K_0402_5%
100K_0402_5%

Thermal Diode Table


R425

R423
R421

R424
R422
D54

Sensor Device Placed on


2

Diode 0 EC Internal(for WWAN) BOTTOM


2

2
2

2
2

VCC3_SUS Diode 1(Q30) CPU DCDC TOP


VCC3SW
Diode 2(Q32) NEAR VIDEO FAN BOTTOM
Diode 3(Q34) VCC5M/3M BOTTOM
2
2

R853 @ R855 Diode 4(Q31) NEAR CPU FAN BOTTOM


10K_0402_5% -RSMRST 10K_0402_5%
Diode 5(Q33) SSD BOTTOM
1
1

A D A
Diode 6(Q35) DIMM TOP
2 Q71 -RSMRST 2 1 -RSMRST_EC
G LSK3541G1ET2L_VMT3
@ D82
S 1 RB521CS-30GT2RA_VMN2-2
3
1

D
2 Q70 @ C721
17,85 MPWRG
G LSK3541G1ET2L_VMT3 100P_0402_50V8-J Title
2 Security Classification LC Future Center Secret Data
S Issued Date 2015/07/16 Deciphered Date 2016/01/16 MEC1653L(2/3)
3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 76 of 111


5 4 3 2 1
5 4 3 2 1

VCC3M VCC3M_EC VCC3M

R426
1 2 10_0402_5% 1 2 R427
VCC3B VCC3M
0_0603_5%

10U_0603_10V6-K
0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.01U_0402_25V7-K
1 1 2 1
VCC3M

C648

C649

C650

C651
2 2 1 2

1
100K_0402_5%

100K_0402_5%

100K_0402_5%
R431

R430
R428
D D

2
2

2
VCC3SW

4.7U_0402_6.3V6-M
1

C652
52,53 -TBT_ACE_MRESET

F12
1
100K_0402_5%

G6
G8
H8

H3

H4
F4

J1
J3
2
R433
U27C

VTR_REG
VTR_18
VBAT

VR_CAP
VTR

VTR_LPC

VTR_FLASH

AVTR_ADC
VREF_ADC
2

Damper resisters to fine-tune


I2C signals

R571 1 2 22_0402_5% J10 L12


B_ON 104,54,83,84,95,98,99
32 I2C_DATA_VIDEO GPIO130/SMB10_DATA GPIO012/SMB07_DATA
R572 1 2 22_0402_5% K10 K11
DOCKID3 14,74
32 I2C_CLK_VIDEO GPIO131/SMB10_CLK GPIO013/SMB07_CLK
VCC3B N11 TBTB_I2C_IRQ2Z_R R451 1 @ 2 0_0402_5%
GPIO014/PWM6 TBTB_I2C_IRQ2Z 52,53,76
JTAG Port Option (JTAG_RST#)
R859 1 2 0_0402_5% E9
Set to High : Enable 52,53 ACE_I2C_SDA2 GPIO141/SMB05_DATA
Set to Low : Disable R860 1 2 0_0402_5% B9 E1 1R05VIDEO_ON
52,53 ACE_I2C_SCL2 GPIO142/SMB05_CLK GPIO023
R432 1 2 100K_0402_5% F10
-PCH_SLP_LAN 17
GPIO135
F9
32,61 -VIDEO_THERM_ALERT GPIO104/UART_TX
C A9 M3 C
31 -GPU_RST_EC GPIO105/UART_RX ADC6/GPIO206 MXM_ON_EC 32
VCC3M N3
ADC7/GPIO207 FAN_ID_VIDEO 80
10K_0402_5%

N10 J2 EC_GPIO210
80 FAN_ON_VIDEO GPIO056/PWM3 ADC8/GPIO210
2

R434

E5 K2
80 FAN_FRQ_VIDEO GPIO051/FAN_TACH1 ADC9/GPIO211 GSENSE_INT 81
L1
F2 ADC10/GPIO212 -LEDNUMLOCK 78
@
1

GPIO062 L3
ADC11/GPIO213 -VIDEO_THERM_OVERT 32
A10
JTAG_RST# M2 EC_P80DATA
VCC3SW ADC12/GPIO214
0.1U_0402_25V6-K

1
10K_0402_5%

1 N2
ADC13/GPIO215 BAY_ADAPTER_DTCT_ANALOG_EC 66
C653

R435

J9 M4
84 ECSPI_CLK SPI_CLK ADC14/GPIO216 -VIDEO_POWER_LIMIT 32
2 K9 N4
84 ECSPI_MOSI
2

SPI_MOSI ADC15/GPIO217 -EC_SLP_LAN 84


1

1
1
1M_0402_5%

1M_0402_5%
1M_0402_5%

100K_0402_5%

SPI
R436

R439

R437
R438

K8
84 ECSPI_MISO SPI_MISO
L10
84 -ECSPI_SS SPI_CS#
2

2
2

D2
VBAT
65 -HDDBAY_DTCT VCI_IN0#/GPIO163

G1 D1
B 14 -INTRUDER_EC VCI_IN1#/GPIO162 VCI_OUT EC_PWRREQ 84 B

B1
66 -BAY_MEDIA_EJECT_EC VCI_IN4#/GPIO234

A2 C1
60 -SSD1_DTCT VCI_IN5#/GPIO235 BGPO0 -BATLOW 17,46

10K_0402_5%

10K_0402_5%

100K_0402_5%
100K_0402_5%

10K_0402_5%

100K_0402_5%
100K_0402_5%

10K_0402_5%

10K_0402_5%
10K_0402_5%
D4
60 -SSD2_DTCT VCI_IN6#/GPIO167

1
1

2
2

2
2

@ R448

R449

R450
R441

R443

R825
R611

@ R452

@ R453
R442
VSS_ADC
VSS_RO

These are device tamper detection INTRUDER pin has two function.

2
2

1
1

1
1
1

1
1

BGND
10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%

VSS0
VSS1
VSS2

pins. If storage is detached, BIOS (1) FAST POST


R457

R458
R454

R455

R456

will not automatically send password BIOS will skip device test in POST
MEC1653
to storage. if door is not opened.
H5
G5
F7
G4

K4

A3
2

2
2

(2) SAFE BOTTOM ACCESS


@ @ @ @ @
EC will turn off power of devices if
door is opened to be safe.

PD on -PCH_SLP_LAN is NO_ASM on
Thorpe but keep for Payton for the case
of Hi-Z in PCH side. (CT_20150428)

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 MEC1653L(3/3)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 77 of 111
5 4 3 2 1
5 4 3 2 1

VCC3M

D VCC3M D

0.5A_32V_ERBRD0R50X

0.1U_0402_25V6-K
15K_0804_8P4R_5%

15K_0804_8P4R_5%
1

C719
5
6
7
8

5
6
7
8

2
2

RP6

RP5

F10
4
3
2
1

4
3
2
1

1
JKBD1
40 42
39 40 GND2 41
R841 1 2 100_0402_5% 38 39 GND1
77 -LEDNUMLOCK DRV17 37 38
DRV16 36 37
35 36
78 TRACKPOINT_BTN_MIDDLE 34 35
78 TRACKPOINT_BTN_RIGHT 33 34
78 TRACKPOINT_BTN_LEFT 32 33
R842 1 2 0_0402_5% 31 32
75 -LEDCAPSLOCK 30 31
-HOTKEY 29 30
75 -HOTKEY 1 2 510_0402_5% -LEDMICMUTE_KBD 28 29
R468
75 -LEDMICMUTE 1 2 510_0402_5% -LED_MUTE_KBD 27 28
R467
75 -LED_MUTE -LEDFNLOCK_KBD 27
R469 1 2 0_0402_5% 26
75 -LEDFNLOCK VCC3M_FUSE_KBD 25 26
DRV11 24 25
75 DRV[17:0] 23 24
DRV8
DRV10 22 23
C DRV12 21 22 C
DRV9 20 21
DRV13 19 20
DRV15 18 19
DRV5 17 18
DRV7 16 17
DRV6 15 16
DRV3 14 15
75 SENSE[7:0] 13 14
DRV1
SENSE5 12 13
DRV2 11 12
DRV4 10 11 VCC5_TP VCC5_TP VCC5_TP VCC5B
SENSE0 9 10
SENSE2 8 9
DRV0 7 8
SENSE1 6 7
6

0.01U_0402_25V7-K
SENSE4 5
5

4.7K_0402_5%

4.7K_0402_5%

10K_0402_5%
DRV14 4
SENSE6 3 4
SENSE7 2 3
SENSE3 1 2
1

1A_32V_ERBRD1R00X
1A_32V_ERBRD1R00X
JAE_FJ04B040HT1R3000-DT
ME@

2
2
1

F12
F11
2

C654
R470 1

R471 1

R472 2

1
1
B JTP1 B

12 14
-KBD_BL_DTCT 11 12 GND2 13
75 -KBD_BL_DTCT KBD_BL_PWM 10 11 GND1
75 KBD_BL_PWM 9 10
TP4CLK 8 9
79 TP4CLK 7 8
6 7
78 TRACKPOINT_BTN_LEFT 5 6
78 TRACKPOINT_BTN_RIGHT 4 5
78 TRACKPOINT_BTN_MIDDLE TP4_RESET 3 4
75,79 TP4_RESET TP4DATA 2 3
79 TP4DATA 1 2
1
JAE_FL10F012HA1R3000
ME@

1 1 1
C656 C657
C655 22U_0805_6.3V6-M 22U_0805_6.3V6-M
220P_0402_50V7-K
2 2 2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 KEYBOARD CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 78 of 111


5 4 3 2 1
5 4 3 2 1

VCC3B VCC5B

0.5A_32V_ERBRD0R50X
D D

2
R473 R474
4.7K_0402_5% 4.7K_0402_5%

F14
1

1
JCP1
1
2 1
27,28,29,30,83 SMB_CLK_3B 3 2
4 3
78 TP4DATA 5 4
78 TP4CLK 6 5
27,28,29,30,83 SMB_DATA_3B CP_VCC5B_FUSE 7 6
8 7
75 -PAD_RESET 9 8
75 IPDCLK 10 9
75 IPDDATA 11 10 13
75,78 TP4_RESET BYPASS_PAD 12 11 GND1 14
75 BYPASS_PAD 12 GND2
KYOCE_046811-612-000846
ME@

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 TOUCH PAD


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 79 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC5B
VCC5B
FAN CURRENT FAN CURRENT
IS 0.5A MAX IS 0.5A MAX

C C
FUSE 2.0A FUSE 2.0A

2
F15
F16
2A_32V_ERBRD2R00X
2A_32V_ERBRD2R00X
1
GPU FAN

1
CPU FAN
JCFAN1 JVFAN1
VCC5B_CPU_FAN 1 VCC5B_VIDEO_FAN 1
FAN_ON_CPU 2 1 FAN_ON_VIDEO 2 1
76 FAN_ON_CPU 3 2 77 FAN_ON_VIDEO 3 2
4 3 4 3
5 4 5 4
76 FAN_FRQ_CPU 6 5 77 FAN_FRQ_VIDEO 6 5
76 FAN_ID_CPU 6 77 FAN_ID_VIDEO 6
7 7
8 GND1 8 GND1
GND2 GND2
FAN_FRQ is 5V output from FAN. HIGHS_WS32061-S0471-HF
FAN_FRQ is 5V output from FAN. HIGHS_WS32061-S0471-HF
FAN_ID is open drain output from FAN. ME@ FAN_ID is open drain output from FAN. ME@

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 FAN CONNECTOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 80 of 111


5 4 3 2 1
5 4 3 2 1

D D

TABLE

CS Mode Selection

H I2C Mode

L SPI Mode

C VCC3M C

VCC3M VCC3M

2 1

2
C662 C663
R481 0.1U_0402_25V6-K 10U_0603_6.3V6-M
10K_0402_5% 1 2

1
R480
10K_0402_5%
@

14
1
U28

1
TABLE

IO_Vdd

Vdd
P/N ADDR_SEL Address 76 I2C_CLK_GSENSE
I2C_CLK_GSENSE 4 13
SCLK/SCL TRIG
I2C_DATA_GSENSE 6 2
76 I2C_DATA_GSENSE SDI/SDA NC_1
H 32h (W) & 33h (R) ADDR_SEL 7 3
LIS3DH SDO/ADDR NC_2
L 30h (W) & 31h (R) 8 10
B nCS NC_3 PIN #10, 15, 16 should be connected B

Test_Point_20MIL 1 TP22 9
INT2 NC_4
15 to GND for LIS3DH.
H 3Eh (W) & 3Fh (R) 77 GSENSE_INT
11 16 (CT_20140927)
KX023-1025 INT1 NC_5
L 3Ch (W) & 3Dh (R)
2

R482

GND_1

GND_2
10K_0402_5%
1

KX023-1025_LGA16_3X3

12
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 G-SENSOR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 81 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC3_SUS
TABLE

Pin TCG Infineon ST


No PTP Spec (v38) SLB9670VQ2.0 ST33HTPH2E32AAE6

1 VDD VDD NIC


2 GND GND GND

2
R483 1 1 1 3 GPIO NCI NIC

2
10K_0402_5%
R647

0.1U_0402_25V6-K
C664

1U_0603_25V6-K
C665
0.1U_0402_25V6-K
C725
10K_0402_5% 4 GPIO NCI NIC
@
5 NC NCI NIC

1
2 2 2 6 VNC/GPIO GPIO NC
7 GPIO/VDD PP PP

1
8 VDD VDD NIC

22

1
C
9 GND GND NIC C

VDD3

VDD2

NCI/VDD1
10 VNC NCI NIC
19 -TPM_IRQ
-TPM_IRQ 18
PIRQ#
11 NC NCI NIC
3
NCI1 4
12 NC NCI NIC
SPI_MOSI_IO0 R486 1 2 33_0402_5% SPI_MOSI_IO0_2_R 21 NCI2 5 13 VNC/GPIO NCI NIC
14,26 SPI_MOSI_IO0 SPI_MISO_IO1 SPI_MISO_IO1_2_R MOSI NCI3
14,26 SPI_MISO_IO1
R487 1 2 33_0402_5% 24
MISO NCI4
10 14 VDD NCI/VDD NIC
11
NCI5 12
15 NC NCI NIC
NCI6 13 16 GND NCI/GND NIC
-SPI_CS2 R484 1 2 33_0402_5% -SPI_CS2_R 20 NCI7 14
14 -SPI_CS2 CS# VDD/NCI8 15
SPI_CLK R485 1 2 33_0402_5% SPI_CLK_2_R 19 NCI9 16
14,26 SPI_CLK SCLK GND/NCI10 25
-PLTRST_NEAR 17 NCI11 26
14,54,61,75,83,84 -PLTRST_NEAR RST# NCI12 27
17 SPI_RST# RST# SPI_RST#
6 NCI13 28 18 SPI_PIRQ# PIRQ# SPI_PIRQ#
GPIO NCI14
NCI15
31 19 SPI_CLK SCLK SPI_CLK
7
PP 20 SPI_CS# CS# SPI_CS#
21 MOSI MOSI MOSI
NC1
29 22 VDD VDD VPS
30
NC2 23 GND GND NIC

GND1

GND2

GND3

GND4

GND5
24 MISO MISO MISO
U29

23

32

33
SLB9670VQ2.0_VQFN32_5X5 25 NC NCI NIC
26 NC NCI NIC
27 NC NCI NIC
B 28 NC NCI NIC B
For EMC 29 VNC/GPIO NC NIC
1 2 1 2 SPI_CLK_2_R 30 VNC/GPIO NC NIC
@ C585 @ R645
31 VNC NCI NIC
10P_0402_50V8-J 33_0402_5% 32 GND GND NIC

Infineon NCI : Not Connected Internally


ST NIC : Not Internally connected

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 TPM


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
PAYTON 0.1

Date: Wednesday, December 07, 2016 Sheet 82 of 111


5 4 3 2 1
5 4 3 2 1

-PWRSWITCH 54,74,84
JDBUG1

LPCCLK_DEBUG_24M 1 2 -PWRSWITCH
19 LPCCLK_DEBUG_24M 3 1 2 4 LPC_AD_DBG0 1 2 0_0402_5% LPC_AD0
LPC Debug Port R488 @
-LPC_FRAME 5 3 4 6 LPC_AD_DBG1 R489 1 @ 2 0_0402_5% LPC_AD1
19,75 -LPC_FRAME 7 5 6 8 LPC_AD_DBG2 1 2 0_0402_5% LPC_AD2
-CLKRUN R490 @
17,75 -CLKRUN 9 7 8 10 LPC_AD_DBG3 1 2 0_0402_5% LPC_AD3
ENABLE DISABLE IRQSER R491 @
19,75 IRQSER -PLTRST_NEAR 11 9 10 12
14,54,61,75,82,84 -PLTRST_NEAR B_ON 13 11 12 14 -SUS_STAT LPC_AD[3:0] 19,75
104,54,77,84,95,98,99 B_ON 13 14 -SUS_STAT 19,75
J30 ASM NO_ASM
15 16
R488 ASM NO_ASM GND1 GND2
D @ HRS_DF12L3P014DP0P5V86A D
R489 ASM NO_ASM

R490 ASM NO_ASM

R491 ASM NO_ASM


For EMC
1 2 1 2 LPCCLK_DEBUG_24M
VCC3M
@ C454 @ R637 JTAG DEBUG CONN FOR EC
10P_0402_50V8-J 33_0402_5%
PAYTON PRE DV ONLY
LOGIC
Page : 77
JTAG Port Option (JTAG_RST#)
Set to High : Enable

2
JTAG can work in MHz order @ @ @ @ Set to Low : Disable
R604 R605 R606 R607
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

1
JHB1
R600 1 @ 2 0_0402_5% EC_JTAG_TMS 1
76 -DOCK_ATTACHED_3M_R 2 1
R601 1 @ 2 0_0402_5% EC_JTAG_TDI 3 2
75 BDC_ON_R 4 3
R602 1 @ 2 0_0402_5% EC_JTAG_TDO 5 4
75 -WWAN_DISABLE_R 6 5
R603 1 @ 2 0_0402_5% EC_JTAG_TCK 6
75 -WLAN_RF_KILL_R 7
8 GND1
C GND2 C
PLACE NEAR EC HIGHS_WS32061-S0471-HF
@

R94 1 2 0_0402_5%
-DOCK_ATTACHED_3M 74
R95 1 2 0_0402_5%
BDC_ON 61
R103 1 2 0_0402_5% DO NOT PLACE UNDER WLAN
-WWAN_DISABLE 61
R104 1 2 0_0402_5%
-WLAN_RF_KILL 61

VCC3B
10K_0402_5%
10K_0402_5%

VCC5M
2
1

B B
R493
R492
1
2

U30
SMB_CLK_3B 1 5
27,28,29,30,79 SMB_CLK_3B A Vcc

2
B

3 4
GND OE

TC7SB385FU_SSOP5 SMB_CLK
SMB_CLK 17
SMB_DATA
SMB_DATA 17
BPWRG
17,24,76,85 BPWRG
U31
SMB_DATA_3B 1 5
27,28,29,30,79 SMB_DATA_3B A Vcc

2
B

3 4
GND OE
1
C666
TC7SB385FU_SSOP5 0.01U_0402_25V7-K
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 EEPROM/SMBUS SW


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com PAYTON
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 83 of 111
5 4 3 2 1
5 4 3 2 1

Test_Point_40MIL TP62 1 -PCH_SLP_S3

Test_Point_40MIL TP63 1 -PCH_SLP_S4

Test_Point_40MIL TP64 1 -PCH_SLP_S5


AND LOGIC. Once -PCH_SLP_S3 is de-asserted,
Test_Point_40MIL TP65 1 -PCH_SLP_M VCC3B
VCCST_PWRGD and IMVP VR_ON should be de-asserted in <= 1 usec.
These are tCPU28 and tPLT17 defined in Intel SKL-H PDG.
(CT_20141216)

2
VL5
VCC3SW VCC3SW R813
10K_0402_5%
D D

1
0.01U_0402_25V7-K

0.01U_0402_25V7-K
1

2
CPUCORE_ON_ASIC

1U_0402_6.3V6-K
D43 1 2 RB521CM_30 to DCDC

47K_0402_5%
CPUCORE_ON 101,102,103,7,91
R496 1 1

R497
-PCH_SLP_S3

C667

C668
10K_0402_5% D45 1 2 RB521CM_30

C669
2

1
2 2
**IMPORTANT**
C669 should be 1uF for Toshiba T/E.
CT_20151204

1
D
2 Q38
2 G LSK3541G1ET2L_VMT3
C670
1000P_0402_50V7-K S U32A

3
1
from charger
-EXTPWR_ASIC F5 E7 to DCDC
76,88 -EXTPWR EXTPWR# EON M_ON 90
D9 VCCLAN_ON 85 to ASIC
from PCH -PCH_SLP_S3 H7 LANON
17,46,76,95 -PCH_SLP_S3 SLP_S3# E8
from PCH -PCH_SLP_S4 J7 MEON
17,76 -PCH_SLP_S4 SLP_S4# F9 to DCDC
AON A_ON 100,104,99
from PCH -PCH_SLP_S5 J8
17 -PCH_SLP_S5 SLP_S5# E9 to DCDC
BON B_ON 104,54,77,83,95,98,99
from EC -EC_SLP_LAN G6
77 -EC_SLP_LAN SLP_LAN# E6 CPUCORE_ON_ASIC
from PCH -PCH_SLP_M F6 CPUON
C 17 -PCH_SLP_M SLP_M# C
SUS_PWR_ACK H6
SUSPWRACK

from PCH -PLTRST_NEAR A7 B8 to Dock


14,54,61,75,82,83 -PLTRST_NEAR PLTRST# PWRON_DOCK# -PWRON_DOCK 74

-PWRSW_ASIC F8
PWRSW#
1/2
from M.2 WLAN slot F7 B6 -EC_RESET 75
17,46,54,61 -PCIE_WAKE PME# ECRST# to EC

PGPIO0 C6
PGPIO0
from EC C7 H3
77 EC_PWRREQ PGPIO1 MTRCL
PGPIO2 C8 G3
PGPIO2 STRCL
PGPIO3 C9 B7 BAT_CRG
PGPIO3 BATCRG BAT_CRG 88 to charger
DISCHARGE E4
74,85 DISCHARGE PGPIO4
PGPIO5 A8
PGPIO5 H9 ECSPI_CLK_R R498 1 2 33_0402_5%
SPISCK ECSPI_CLK 77 from EC
H8 ECSPI_MOSI_R R499 1 2 33_0402_5%
SPIMOSI ECSPI_MOSI 77 from EC
2

A1
R512 A9 (TEST_IN1) G8 -ECSPI_SS_R R500 1 2 33_0402_5%
(TEST_IN2) SPISS# -ECSPI_SS 77 from EC
VCC3SW 100K_0402_5% J1
J9 (TEST_IN3) G7 ECSPI_MISO_R R501 1 2 0_0402_5%
B (TEST_IN4) SPIMISO ECSPI_MISO 77 to EC B
G5
1

TEST
100K_0402_5%

100K_0402_5%
100K_0402_5%

100K_0402_5%
1

1
1

1
4.7K_0402_5%
1

R504

R506
R503

R505
R502

BD4178GSW-ZE2_BGAW080A80

BAT_CRG
2

2
2

2
2

ECSPI_CLK_R
PGPIO0
PGPIO2 -ECSPI_SS_R
PGPIO3

100K_0402_5%

100K_0402_5%
100K_0402_5%
1

1
1
PGPIO5

R507

R509
R508
VCC3M
-PWRSW_ASIC

2
2
1 1
R510
2

C720 SUS_PWR_ACK
10K_0402_5%
0.22U_0402_10V6-K D48
1SS400CMT2R
1

2
2
100K_0402_5%
1
R511

For EMC
D49 1 2 1 2 ECSPI_CLK_R
1 2
2

54,74,83 -PWRSWITCH -PWRSW 76 @ C456 @ R639


10P_0402_50V8-J 33_0402_5%
RB521CM-30
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/07/16 Deciphered Date 2016/01/16 THINK ENGINE 2(1/2)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 84 of 111
5 4 3 2 1
5 4 3 2 1

VREGIN20 VINT20
VREGIN20

2
1

2
R517
R514 R515 R516 10_0603_5%
1.78M_0402_1% 20_0603_5% 20_0603_5%
ESR03EZPJ200/ROHM ESR03EZPJ200/ROHM

1
2

1
D D
VCC5M
VCC5M
VDD10
R518
1 2 D50 D51
VCC3M VCC5M VDD10
1 1 2 1 2
No need Reset Switch 0_0402_5% C673
VCC3SW

1U_0603_25V6-K

1U_0603_25V6-K
0.1U_0402_25V6-K

RB520CM-30T2R_VMN2M2

RB520CM-30T2R_VMN2M2
on Workstation model. 1 1 1

2.2U_0805_25V6-K
2 VCC5B

C675

C676

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K
C672
1
Because of detachable R520 1 1 1

470P_0402_50V8-J

C678

C679
C677
battery. 1.24M_0402_1%

100_0402_5%
1
2 2 2

R519
1U_0402_6.3V6-K
2 2 2 2

C671
2
1

C674
VREGIN20

H1

A5

A2

2
VCC5MUBAY 1 U32B
2

VCC5M
VREGIN20

VDD10
1

R521
100K_0402_5% G1
VINT20
2

A4
R429 G2 CP10OUT
2

100_0402_5% BAT_VOLT J4 VCC3SW_R R1028 1 2 0_0402_5%


H2 VCC3SW C5
3SW_OFF# 5B
1

B4 B3
RD0_ON/5MUBAY RD0_DRV/UBAY_DRV VCC5MUBAY_DRV 106
G4 C3 VCC3LAN_DRV 106
84 VCCLAN_ON RD1_ON RD1_DRV
C H4 D4 C
76 SUS_ON1 RD2_ON RD2_DRV SUS_DRV 105
J5 D3 VCC5_TP_DRV 105
76 VCC5_TP_ON RD3_ON RD3_DRV
R522 1 2 0_0402_5% H5 D2
RD4_ON RD4_DRV
D1 VCC3WLAN_DRV 108
RD5_DRV/WLAN_DRV
E3 VCC3WAN_DRV 108
RD6_DRV/WWAN_DRV
F3 B_DRV 1 TP71 Test_Point_20MIL
RD7_DRV/B_DRV
2/2
F4 B5 VCC3B
41 PANEL_POWER_ON 3P_ON 3P_DRV VCC3P_DRV 42
VCC3M
A6 VCC3B_DRV 107
VINT20 3B_DRV C4
5B_DRV VCC5B_DRV 107

1
E2
M1_DRV

1
C680 1 2 1U_0603_25V6-K E1 C1 M2_DRV 87 R524
CP25OUT M2_DRV R523 2.2K_0402_5%
D52 D53
2 1 2 1 B1 F1 10K_0402_5%
VCPIN25 S1_DRV
0.22U_0805_25V7-K

C2

2
RB521CM-30 RB521CM-30 1 S2_DRV

2
C682

J6 F2 BAT_DRV 87
74,84 DISCHARGE DISCHARGE BAT_DRV B2
1 VCC3SW DCIN_DRV 86
C681 DCIN_DRV
0.01U_0402_25V7-K 2 D7 D6 R525 1 2 0_0402_5%
SHUTDWNIN# M_PGS MPWRG 17,76
D5 BPWRG 17,24,76,83
B_PGS
1

2
R526 J3 D8
TH_DET PWRSHUTDWN#

1
33K_0402_5% 1 2
B VCC3SW R978 B
D93

DGND1
PGND1
PGND2
AGND1
0_0402_5%
2

RB521CM-30

2
76 -SHUTDOWN 1 2
TH_DET_1

90 5M_3M_PWRG

1
BD4178GSW-ZE2_BGAW080A80
2

G9
A3
B9
J2
R529 @ R527 2
R528 33K_0402_5% 0_0402_5% C683
0_0402_5% 470P_0402_50V8-J
@ @

2
1
1

-PWRSHUTDOWN 74,86,88
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
Location Place near Power
RT530 PQ1 DCIN20_PWR FET
0.1U_0402_25V6-K

RT531 PQ25 VCC5M_PWR FET


2

2
2

2
TH_DET_10

TH_DET_11
TH_DET_2

TH_DET_3

TH_DET_4

TH_DET_9
TH_DET_5

TH_DET_6

TH_DET_7

TH_DET_8
1
C684

RT531

RT532

RT533

RT534

RT536

RT538

RT540
RT530

RT535

RT537

RT539
RT532 PQ26 VCC3M_PWR FET
RT533 Q23 DOCK_PWR FET 2
1

1
1

1
RT534 U1 CPU die
RT535 PU5 VCCCPUCORE
A RT536 PU8 VCCGFXCORE_I A

RT537 PQ27 DDR_PWR FET


RT538 PQ20 Battery Charger FET
RT539 PQ46 Charge FET
RT540 PQ10 M_BAT_PWR FET Security Classification LC Future Center Secret Data Title

PRT1(BAT_FET_HOT) PQ11 BAT_IN Issued Date 2015/07/16 Deciphered Date 2016/01/16 THINK ENGINE 2(2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Wednesday, December 07, 2016 Sheet 85 of 111
5 4 3 2 1
5 4 3 2 1

1 2

PR243 @ 0_0402_5%
PQ40 PQ41
LSK3541G1ET2L_VMT3 LSK3541G1ET2L_VMT3
1 3 ACDC_ID_C 3 1
ACDC_ID 74,76

D
D

G
G
2

2
1
PD26

1
D D
ESD5Z3.3T1G SOD-523

-DOCK_ATTACHED_BAT_OP 74,88

2
2
DCIN DCIN_PWR20_F

PJ1 PQ1 DOCK_PWR20 VINT20


ME@ SI7135DP-T1-GE3_POWERPAK SO-8
1
1 PF1 2
1 6 1 2 3 PQ2
6 7 5 SIS476DN-T1-GE3_POWERPAK1212-8-5
7 8 15A_32V_0501015.WR 1
8 PR2

0.47U_0402_25V6-K
9 2

4
9
1000P_0402_25V7-K

2 2 CV20 3 5 1 2
2
100P_0402_50V8J

3
3

2
470K_0402_5%

200K_0402_5%

PC2
10 4 0.005_3008_LE_1%_2W
PTH1 4
2

1
PC1

PC3

11 5 PR4

4
PTH2 5

2
2
1

0_0201_5%
0_0201_5%
PR1

PR3
100_0402_5% PQ3
PD1

1M_0402_5%

EDZVT2R15B_EMD2-2

PRJ2
PRJ1
FOX_GS7309Y-10272-M-7H DTC115EMGT2L_VMT3
1

2 1 2 3 1

100_0402_5%

0.01U_0402_25V7K
PC4 @ @

1
1
PR5
PD27
0.01U_0402_25V7K 1SS400CMT2R_VMN2M2 2 2
1

470P_0402_50V7K
PC5

PC6
2CV20_E 2
2
2

270_0402_5%
C C

1
1 1

PR6

PR7 1
1
PQ4 PD28
3 1 1SS400CMT2R_VMN2M2

1
PR9

2
1 2 2 1
DTA114EMGT2L_VMT3 85 DCIN_DRV

2
PR244 @ 0_0402_5% 100K_0402_5%
PR8
100K_0402_5%
1

PQ5 D
2

1
G PQ42
LSK3541G1ET2L DTA015EMT2L_VMT3
S 3 1
3

PQ6
DTC115EMGT2L_VMT3

2
1

1M_0402_5%
2
2
PR10
@ 0_0402_5%

2
3

1
B B

PR245
1
1

PQ7 D
2
74 DISCHARGE2

1
G PQ43 D
LSK3541G1ET2L -DOCK_ATTACHED_BAT_OP 2
S G
3

LSK3541G1ET2L

2
S

3
PR11
1

PQ8 D @ 0_0402_5%
2
74,85,88 -PWRSHUTDOWN G
1

LSK3541G1ET2L
S
3

TABLE
PEAK SHIFT YES NO 88 DCIN_CURRENT_P

88 DCIN_CURRENT_N
PR10 NO-ASM ASM
PR1 ASM NO-ASM
PQ6 ASM NO-ASM
A
PQ7 ASM NO-ASM A

Security Classification LC Future Center Secret Data Title

LOGIC Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC-IN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 86 of 111
5 4 3 2 1
5 4 3 2 1

VCC3M

2
PR12
6.19K_0402_1%

1
M-BAT-PWR
D D
BAT CONN BAT-PWR12 VINT20

PJ2
FOX_BBP27D1-B460A-7H PQ10
ME@ SI7135DP-T1-GE3_POWERPAK SO-8
7 PF2 1 PQ11
7 6 M_BAT_IN 1 2 2 SIS476DN-T1-GE3_POWERPAK1212-8-5
6 5 3 PR50 1
PR13
5 4 100_0402_5% 30A_125V_0456030.ER 5 1 2 2
4 3 2 1 3 5

EDZVT2R15B_EMD2-2
9 3 2 I2C_CLK_BT 75
PR14 0.005_3008_LE_1%_2W

4
8 PTH2 2 1

1
100_0402_5%
PTH1 1

2
0_0201_5%

0_0201_5%
2 1 PR15 2

4
I2C_DATA_BT 75

1
PD29
100_0402_5%

PRJ3

PRJ4
510K_0402_5% PC423
PC7 0.1U_0402_25V6

PR16
0.01U_0402_25V7K @

2BAT_PWR12_D 2

2
M_TEMP 75 1
@ @

1
2200P_0402_25V7-K

2200P_0402_25V7-K

2
100_0402_5%
390P_0402_50V

390P_0402_50V
@
1

1
2

2
PC9

PC11

PR17
PC8

PC10
2

1
1

1
PR20
PD30 750K_0402_1%
@ @ @ 1SS400CMT2R_VMN2M2 2 1 BAT_DRV_R

PR18

1
PR21 PD2
27K_0402_1% PR246
2 1 2 1 2 1 1 2
85 M2_DRV
150K_0402_5% 2 @ 0_0402_5%
88 SRN
1SS400CMT2R_VMN2M2
PC12
88 SRP 1 1500P_0402_50V7K 85 BAT_DRV

C C
PQ44
DTA015EMT2L_VMT3
3 1

BAT-PWR12

2
2
2
PR248
PR247 1M_0402_5%
1M_0402_5%

1
1

1
PQ45 D
2
74 -DOCK_PWRDCT G
LSK3541G1ET2L

2
S

3
PR249
1M_0402_5%

1
B B

VCC3B

2
M-BAT-PWR M-BAT-PWR_F VREGIN20
PR30
4.7K_0402_5%
PD3
DAN222MGT2L_VMD3

1
PF4 2

0.1U_0402_10V7-K
2 1 1

1
PC17
3
BAT_FET_HOT 75
0.5A_32V_ERBRD0R50X

1
DOCK_DCIN20 DOCK_DCIN20_F
PD4 PRT1
DAN222MGT2L_VMD3 540_0402NEW_30%_PRF15BB541NB6RC
PF6 2 NEAR TO PQ11
1 2 1

2
3
0.5A_32V_ERBRD0R50X
DCIN_PWR20_F DCIN_PWR20_F_F

PD6
DAN222MGT2L_VMD3
PF7 2
1 2 1
3
0.5A_32V_ERBRD0R50X
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 BATTERY INPUT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17

WWW.AliSaler.Com Date: Wednesday, December 07, 2016 Sheet 87 of 111


5 4 3 2 1
5 4 3 2 1

BAT-PWR12
CHARGER_OUT12

PQ46
SI7135DP-T1-GE3_POWERPAK SO-8
1
2
3
5

1U_0603_25V7-K
4

470K_0402_5%

2
PC483
2

PR251
100_0402_5%
D D
VREGIN20 PR283 PR250

1
PR252
PR231 @ 0_0402_5% 39K_0402_1%

1
ESR03EZPJ200_20ohm/5%/0603/0.25W 2 1 DCIN_CURRENT_P 86
1 2

1
DCIN_CURRENT_N 86

2
PR253
1 2 100K_0402_1%

PR232

1
ESR03EZPJ200_20ohm/5%/0603/0.25W

2
PR233 PR254

1
4.99_0402_1% 200K_0402_1% PQ47 D
DCIN_PWR20_F_F 1 2 2
PR235 84 BAT_CRG G

1
@ 0_0603_5% PR234

0.033U_0402_16V
LSK3541G1ET2L

2
PC484
2 1 1K_0402_1% S

3
1 2
DOCK_CONSUMP 74
PR255

1
PD31
PQ38 1K_0402_1%
1 2 1 2
3 1
PC22
1 2 1SS400CMT2R_VMN2M2
2

RSM002P03GT2L_SC-105AA
2

1U_0603_25V7-K
0.1U_0402_25V6
PR236

2
PC26
1M_0402_5% PC24

2
DOCK_DCIN20_F 0.1U_0402_25V6 PC25
1

PR42 PR43 0.1U_0402_25V6

1
RB530SM-30T2R_EMD2-2
RB530SM-30T2R_EMD2-2

0_0402_5% 0_0402_5%
@ @
2
2

1
2

CH_AGND CH_AGND CH_AGND


C C
1
1

PR237 VINT20
1M_0402_5%
PD25
PD24
1

2200P_0402_25V7-K
BQ24780_ACDET_R

10U_0805_25V6-K
10U_0805_25V6-K

10U_0805_25V6-K
10U_0805_25V6-K

47P_0402_50V8-J

1
1
1

2
1

1
PC30
PC27

PC29
PC28

EMC@ PC489
EMC@ PC488
PC478
1

PQ49 D 0.1U_0402_25V6

1
2 @

2
2
2

1
2

2
ACN
ACP
74,86 -DOCK_ATTACHED_BAT_OP G PR46 PC462
LSK3541G1ET2L 432K_0603_1% 1 2
S
3

5
5
1U_0603_25V7-K

1
PR48 PC32

ACP

ACN
66.5K_0603_1% 2.2U_0603_25V6M 12A
CH_AGND
1 2 28 24 1 2
VCC REGN 4 4
6 PC34 PQ51 CHARGER_OUT12
PC33 ACDET PR49 0.047U_0603_25V7M PQ20 CSD17510Q5A_SON8-5
1 2 25 BST_CHG
1 2 2 1
BTST CSD17510Q5A_SON8-5 PL1

3
2
1
3
2
1
@ 0.1U_0402_25V6 @ 0_0603_5% 2.2UH_PCMB104E-2R2MS_20%
3 26 DH_CHG
CMSRC HIDRV 1 2
4 PC38 PC39
ACDRV

PC528
PC537
5
27 LX_CHG

10U_0805_25V6-K

10U_0805_25V6-K
PHASE 1

2
1

2
1
PC527
5 PC35
ACOK @680P_0603_50V7-K

10U_0805_25V6-K
10U_0805_25V6-K
2

1
2

1
2
PR53 2 1 @ 0_0402_5% 11 2
75 I2C_DATA_CHARGE SDA DL_CHG
23 4

10U_0805_25V6-K
PU1 LODRV

1
PR55 2 1 @ 0_0402_5% 12 22
75 I2C_CLK_CHARGE SCL BQ24780SRUYR GND CH_AGND
PQ21 PR54

3
2
1
PR56 2 1 @ 0_0402_5% 7 29 CSD17552Q3A_SON8-5 @ 75_0805_5%
B 76 ISYS IADP PAD B

2
2 1 @ 0_0402_5% 8 18 PC36
PR57
IDCHG BATDRV 2 1
CH_AGND
PR58 2 1 @ 0_0402_5% 9
91 PSYS PMON 17 PR293 2 1 10_0402_1% 0.1U_0402_25V6
BATSRC
PC41 20 PR60 2 1 @ 0_0402_5% SRP SRP 87
PR61 2 1 10 SRP
75 -CHG_PROCHOT PROCHOT#

2
@ 0_0402_5%
100P_0402_50V8J
2

PR238 1 2 13 PC529
PC40 PC42 10K_0402_5% CMPIN 0.1U_0402_25V6

1
BATPRES#
PR239 1 2 14
TB_STAT#
100P_0402_50V8J 100P_0402_50V8J
1

VCC3SW CH_AGND 10K_0402_5% CMPOUT 19 PR62 2 1 @ 0_0402_5% SRN


SRN SRN 87
21
VCC3M PR448 ILIM
PC37
10K_0402_5%
CH_AGND CH_AGND CH_AGND 1 2 1 2
CH_AGND
16

15

PRJ5
0.1U_0402_25V6
2

1 2
VCC3SW PR63
2

0_0402_5%
PR256 @ PR294 @ 0_0402_5%
2

100K_0402_5% PR64 10K_0402_5%


1

PR257 127K_0402_1%
100K_0402_5% 1 2 CH_AGND
VCC3M
1

2
1

76,84 -EXTPWR
PR295
1

1M_0603_5%
1
1

D PQ48 PR66 CH_AGND


2

PC485 2 PC43 100K_0402_1%


2

47P_0402_50V8-J G 0.01U_0402_25V7-K -BOOST_MODE 76


2
1

PQ52 D
1

S LSK3541G1ET2L 2
3

LSK3541G1ET2L S CH_AGND CH_AGND


3

A
CH_AGND CH_AGND A
1

PQ53 D
2
74,85,86 -PWRSHUTDOWN G

LSK3541G1ET2L S
3

Security Classification LC Future Center Secret Data Title


CH_AGND BATTERY CHARGER
Issued Date 2014/07/01 Deciphered Date 2015/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 88 of 111
5 4 3 2 1
5 4 3 2 1

D D

BLANK
C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 89 of 111
5 4 3 2 1
5 4 3 2 1

PJ3
2 1
VCC3MP 2 1 VCC3M
@ JUMP_43X118

D D

PJ4
2 1
VCC5MP 2 1 VCC5M
@ JUMP_43X118

PJ5
2 1
2 1
@ JUMP_43X79

PJ6
2 1 5V_VIN
VINT20 2 1
@ JUMP_43X118
10U_0603_25V6-M
10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

2200P_0402_25V7-K
1 1 1 1 1 1 VINT20

0.1U_0402_25V6
47P_0402_50V8-J
1

2
3.3V_ALW
PC44

PC45
PC445

PC490

PC491
PC447

PC446

PC444

PC482
2

2
2 2 2 2 2 2 PJ7

2
PR71 3V_VIN 2 1
@ 0_0402_5% VL5 2 1 VINT20
RF@ @ JUMP_43X79

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
2200P_0402_25V7-K
EMC@ EMC@ PR72 1 1 1 1

47P_0402_50V8-J
1

1
@ 0_0402_5% PC481

PC46

PC47

PC448
PC492

PC493

PC449
0.1U_0402_25V6

4.7U_0402_6.3V

4.7U_0402_6.3V
2 1 1 1 RF@
84 M_ON

2
1
2 2 2 2

PC49

PC50
PC48
0.1U_0603_25V7K

2
2 2
EMC@ EMC@

12

13

3
C
MAX:25A C

VREG5

VREG3
VIN
TDC:22A 20
EN1 EN2
6
PR180 PR179
@ 0_0603_5% @ 0_0603_5% PQ26
VCC5MP 2 1 5V_DH 16 10 3V_DH 2 1 BSC0924NDI

2
2
2

DRVH1 DRVH2
1 1 PC51 PR73 PR74 PC52 1
1 2 2 1 5V_BST17 9 2 1 1 2 PL5
MAX:15A
PL4 VBST1 PU2 VBST2 1UH_PCMC063T-1R0MN_+-20% TDC:12A
1UH_PCMC133E-1R0MF_24A_20% 0.1U_0603_25V7K @ 0_0603_5% TPS51285BRUKR_WQFN20_3X3 @ 0_0603_5% 0.1U_0603_25V7K
1 2 7 7 5V_LX 18 8 3V_LX 7 1 2
SW1 SW2 VCC3MP
1

PC57 6 6 6

1
@ 680P_0402_50V7K 5V_DL 15 11 3V_DL PC58 PC471 PC53 PC54

0.1U_0402_25V6

2200P_0402_25V7-K
DRVL1 DRVL2 @ 680P_0402_50V7K 1 1 1
2

1
PC494
220U_B2_6.3VM_R35M
220U_B2_6.3VM_R35M
2

220U_B2_6.3VM_R35M
14 4 3V_VFB2 + + +

EMC@PC495
3
4
5
5
4
3
5
4
3
2

VO1 VFB2

PGOOD
PC470 PC469 PC468 PC56 PC55
0.1U_0402_25V6

2200P_0402_25V7-K

2
EMC@
2
5V_FB1 2

VCLK
1 1 1 1 1 PR75

GND
CS1

CS2
VFB1
1

1
@ 4.7_0603_5% PQ25 PR76 2 2 2
EMC@PC496

EMC@PC497

220U_B2_6.3VM_R35M
220U_B2_6.3VM_R35M

220U_B2_6.3VM_R35M

220U_B2_6.3VM_R35M
220U_B2_6.3VM_R35M

+ + + + + PR77 BSC0924NDI PQ50 @ 4.7_0603_5% PR78


15.8K_0402_1% BSC0924NDI 13.7K_0402_1%
2

19

21

7
1

1
2 2 2 2 2
1

2
2

11.3K_0402_1%
2

2
PR81

PR80

1
PR79 15K_0402_1%

2
200_0402_1% PR82

1
2

5M_3M_PWRG 85 PC20 20K_0402_1%

1
1
2

PR83 PC19 @ 100P_0402_50V8J

1
10K_0402_1% @ 100P_0402_50V8J

2
1
1

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCC5M/VCC3M


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 90 of 111
5 4 3 2 1
5 4 3 2 1

PC59
1000P_0402_50V close to PL11 VCCST
1 2
PR85 PRT2 PR87 PR88
@ 0_0402_5% PR86 100K_0402_1%_NCP15WF104F03RC 13.3K_0402_1% 6.81K_0603_1%
2 1 1 2 VSN_1PH 1 2 2 1 1 2
11 VSSSA_SENSE SW_1PH 94
42@ 2K_0402_1%
44e@1K_0402_1%

1
PC60 PC61

1
1000P_0402_25V7-K 1 2 AGND_NCP81205 PR89 PR90

2
100_0402_1%
PR93 @ PR91 PC62

45.3_0402_1%
44e@1.62K_0402_1% 42@ 0.015U_0402_25V7-K 0.1U_0402_25V6

2
VCC3B

56.2_0402_1%
42@ 2.61K_0402_1% 44e@0.022U_0402_25V7-K
2 1 1 2 VSP_1PH PC63 1 2
11 VCCSA_SENSE

1
1
D D
PC64

1
2
PR92 42@ 4700P_0402_25V7-K CPUCORE_PWRGD 102,17,24 PR96 AGND_NCP81205
2
@ 0_0402_5% 2 1 44e@1000P_0402_25V7-K PR95 81205_SCLK 1 2

1
42@ 48.7K_0402_1% 49.9_0402_1% SVID_CLK 102,7
94 CSN_1PH 44e@61.9K_0402_1% PWM1_1PH/ICCMAX1 94
1000P_0402_25V7-K PC66 1000P_0402_25V7-K PR97 PR176 PR98
1 2 1 81205_ALERT 2 1
10K_0402_1% 0_0402_5%

1
PC65 @ 0_0402_5% -SVID_ALERT 102,7
@
AGND_NCP81205 1 PR99 2 470P_0402_50V7K PR104 PR100

2
24.9K_0402_1% 42@ 34.8K_0402_1% 81205_SDIO 1 2
44e@25.5K_0402_1% SVID_DATA 102,7
PR102 10_0402_1%
750_0402_1% 1 2
AGND_NCP81205
PR105 1 2 1 2 PC67 2 1
AGND_NCP81205 CPUCORE_ON 101,102,103,7,84
@ 0_0402_5% 81205_SCLK
2 1 VSP_3PH_A 0.015U_0402_25V7-K 81205_ALERT PR103
9 VCCCORE_SENSE 81205_SDIO
PC68 1 2 @ 0_0402_5%

15P_0402_50V

2
PC69 PR107
1000P_0402_25V7-K @ 0_0402_5%
PR109 VSN_1PH 2 1

1
1.24K_0402_1% VCCGT_SENSE 10
2 1 1 2 VSN_3PH_A
9 VSSCORE_SENSE

1
VSP_1PH PC71
PR108 PC70 1000P_0402_25V7-K
@ 0_0402_5% 1 2

2
AGND_NCP81205 PR111
2200P_0402_25V7-K 1.4K_0402_1%
1 2 2 1
VSSGT_SENSE 10
PC72 PR112
PC73 PC74 1 2 @ 0_0402_5%

53

52
51
50
49
48
47
46
45
44
43
42
41
40
47P_0402_50V8-J PR114 470P_0402_50V7K
49.9_0402_1% PR115 2200P_0402_25V7-K

ALERT#
PAD

VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH

PWM_1PH/ICCMAX_1PH
EN

SDIO
VR_RDY

SCLK
1 2 1 2 1 2 42@ 24.9K_0402_1%
44e@23.7K_0402_1% PC77 PC78
PC75 1 2 -PROCHOT 102,7,76 PR118 680P_0402_50V7-K 47P_0402_50V8-J
PR116 2200P_0402_25V7-K PR119 49.9_0402_1%
C 1 2 1 2 1 2 PC76 VSP_3PH_A 1 39 PR388 2 1 100_0402_5% 24.9K_0402_1% 1 2 1 2 1 2 C
PR117 470P_0402_50V7K VSN_3PH_A 2 VSP_3PH_A VR_HOT# 38 1 2 PC79
42@ 3K_0402_1% 1K_0402_1% 1 2 3 VSN_3PH_A VSP_3PH_B 37 1 PR120 2 1 PR121 2 1 2
AGND_NCP81205 IMON_3PH_A VSN_3PH_B AGND_NCP81205
44e@3.74K_0402_1% DIFFOUT_3PH_A 4 36 PC80 1 2 1K_0402_1%
FB_3PH_A 5 DIFFOUT_3PH_A IMON_3PH_B 35 DIFFOUT_3PH_B 470P_0402_50V7K 3.74K_0402_1% 2200P_0402_25V7-K
COMP_3PH_A 6 FB_3PH_A DIFFOUT_3PH_B 34 FB_3PH_B
1 2 PR122 ILIM_3PH_A 7 COMP_3PH_A PU3 FB_3PH_B 33 COMP_3PH_B
CSCOMP_3PH_A 8 ILIM_3PH_A COMP_3PH_B 32 ILIM_3PH_B 1 2 PR123
close to PL6 42@ 14.7K_0402_1%
CSCOMP_3PH_A
NCP81205MNTXG_QFN52_6X6
ILIM_3PH_B
CSSUM_3PH_A 44e@14.3K_0402_1% 9 31 42@ 17.4K_0402_1% CSCOMP_3PH_B close to PL9
2

10 CSSUM_3PH_A CSCOMP_3PH_B 30 CSSUM_3PH_B 44e@15.8K_0402_1%

PWM1_3PH_A/ICCMAX_3PH_A

PWM1_3PH_B/ICCMAX_3PH_B
CSREF_3PH_A CSSUM_3PH_B

2
2

2
PR124 CSP1_3PH_A 11 29
CSP1_3PH_A CSREF_3PH_B
73.2K_0402_1%

PRT3 CSP2_3PH_A 12 28 CSP1_3PH_B PR125 PRT4

PWM3_3PH_B/ROSC_3PH
PWM2_3PH_B/ROSC_1PH
CSP2_3PH_A CSP1_3PH_B

1
220K_0402_3%_NCP15WM224E03RC PC82 PC83 PC81 CSP3_3PH_A 13 27 CSP2_3PH_B 220K_0402_3%_NCP15WM224E03RC
2

CSP3_3PH_A CSP2_3PH_B

PWM3_3PH_A/VBOOT

100P_0402_50V
100P_0402_50V

1000P_0402_25V7-K

73.2K_0402_1%
0.01U_0402_25V

TTSENSE_1PH/PSYS
PWM2_3PH_A/ADDR
1

1
2
PC85 PC86

1
1

1
2
TTSENSE_3PH_A

TTSENSE_3PH_B

1000P_0402_25V7-K
PR126 PC84
1

1 2 0.01U_0402_25V PR129
91,92 SW1_3PH_A

2
1
2

CSP3_3PH_B

2
42@ 113K_0603_1% 44e@121K_0603_1% 1 2

1
PR130 PR127 PR128 42@ 56.2K_0603_1% SW1_3PH_B 91,93
1 2 AGND_NCP81205 165K_0402_1% 44e@107K_0603_1%
91,92 SW2_3PH_A

DRON
VRMP
165K_0402_1%

42@ 113K_0603_1% 44e@121K_0603_1%

VCC
VINT20 PR132
PR131 PR135 is ASM for 42 only AGND_NCP81205
1

1
1 2 1 2
91,92 SW3_3PH_A
42@ 113K_0603_1% 44e@121K_0603_1%
PR135 is NO-ASM for 44e only 42@ 56.2K_0603_1% SW2_3PH_B 91,93

17
18
19
20
21
22
23
14
15
16

24
25
26
2
PR133 44e@107K_0603_1%
1 2 PR134 PR135 0_0402_5% 42@ PR299
92 CSN1_3PH_A CSP3_3PH_B 2
10_0402_1% 1K_0402_1% PC87 1 1 2
VCC5M PSYS 88 SW3_3PH_B 91,93
PR136 0.1U_0402_25V6 PR299 is ASM for 44e only 44e@ 107K_0603_1%
1 2 CSREF_3PH_A PC88 2 1 TSENSE_3PH_A PC89 AGND_NCP81205
92 CSN2_3PH_A 1
10_0402_1% 0.01U_0402_25V 0.1U_0402_25V6 PR141
PR139 1 2 TSENSE_3PH_B 2 1 13.3K_0402_1% PR137 1 2
AGND_NCP81205 CSN1_3PH_B 93
1 2 VCC5M 2 1 2 1 10_0402_1%
92 CSN3_3PH_A
10_0402_1% PR140 1 2 AGND_NCP81205

1U_0402_10V6-K
2.2_0603_1% PR142 CSREF_3PH_B PR138 1 2
PR143 42@ 43K_0402_1% 10_0402_1% CSN2_3PH_B 93

44e@57.6K_0402_1%
42@ 53.6K_0402_1%
2 1 CSP1_3PH_A PC90 44e@73.2K_0402_1%
91,92 SW1_3PH_A

1
PR144

2
2

2.26K_0402_1% PR145 PWM1_3PH_B/ICCMAX3B 93 PR300 1 2


1
1

2
2
B CSN3_3PH_B 93 B

3.92K_0402_1%
PC91 PR336 44e@ 10_0402_1%
0.1U_0402_25V6 0_0402_5% @ PR146
97.6K_0402_1% PR147 PWM2_3PH_B/DOSC1 93 PR300 is ASM for 44e only
2

2
97.6K_0402_1%
92,93,94 DRON

1
1

CSREF_3PH_A 2 1
92 PWM1_3PH_A/ICCMAX3A

1
1
PR339 @ 0_0402_5%
AGND_NCP81205
PR148
92 PWM2_3PH_A/ADDR CSP1_3PH_B 2 1
AGND_NCP81205 AGND_NCP81205
AGND_NCP81205 SW1_3PH_B 91,93
PRJ9

1
2
2.26K_0402_1%
1 2 PWM3_3PH_B/DOSC3 93 PR202 PC92
92 PWM3_3PH_A/VBOOT
PR149 @ 0_0402_5% 0.1U_0402_25V6

2
2
2 1 CSP2_3PH_A
91,92 SW2_3PH_A
@ 0_0402_5% PR152

1
2

2.26K_0402_1% 24.9K_0402_1% PR333 2 1@ 0_0402_5% CSREF_3PH_B


1

PR337
PC93 0_0402_5% @
1 PR150
0.1U_0402_25V6
2

AGND_NCP81205 CSP2_3PH_B 2 1
1

CSREF_3PH_A 2 1 SW2_3PH_B 91,93

1
PR340 @ 0_0402_5% AGND_NCP81205 PR152 Vboot for Core/GT 2.26K_0402_1%
TSENSE_3PH_A TSENSE_3PH_B PR210 PC94
@ 0_0402_5% 0.1U_0402_25V6

2
24.9Kohm 0V
2
2

PR151

1
2 1 CSP3_3PH_A PR153 PR154 PR335 2 1@ 0_0402_5% CSREF_3PH_B
91,92 SW3_3PH_A
1.5K_0402_1% 1.5K_0402_1% 169Kohm 1.05V
2

2.26K_0402_1%
1

PR338
1
1

PC95 0_0402_5% @ 44e@


0.1U_0402_25V6 PR301 2.26K_0402_1%
2

2
2

PR155 PR156 CSP3_3PH_B 2 1


1

SW3_3PH_B 91,93
7.32K_0402_1%

7.32K_0402_1%

CSREF_3PH_A 2 1

1
2
PR341 @ 0_0402_5% PRT5 PRT6
100K_0402_1%_NCP15WF104F03RC 100K_0402_1%_NCP15WF104F03RC PR221 PC534 44e@
@ 0_0402_5% 0.1U_0402_25V6

2
1

1
1

A A
close to PU5 close to PU8 44e@

1
PR334 2 1 0_0402_5% CSREF_3PH_B

PR301, PC534,PR334 are ASM for 44e only

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC IMVP8

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 91 of 111
5 4 3 2 1
A
B
C
D

91
91

91

91,92,93,94
91,92,93,94
91,92,93,94

VCC5M
DRON
VCC5M

PWM3_3PH_A/VBOOT
DRON
PWM2_3PH_A/ADDR
PWM1_3PH_A/ICCMAX3A

DRON
VCC5M

PR106
1
PC177

PR113
2.2_0603_1%

1
1U_0402_10V
PR162

5
5

PC215
2 1 1 2

2.2_0603_1%
2

2
2
1U_0402_10V
PR263

PR167
PR264

PR266
PR265
PR94
PC125

VCC5M
2 1 1 2
2.2_0603_1%

2
1
1U_0402_10V
PR157

2 1

2
2
2

@ 0_0402_5%
PR262
PR261

VCC5M
1 2 2 1 1 2

@ 0_0402_5%
VINT20
1 2 2 1

1
1
VINT20
VCC5M

PL24
PL23

PC176

PL26
PL25
2 2 1

@ 0_0402_5%
EMC@

@ 0_0402_5%

@ 0_0402_5%
@ 0_0402_5%
EMC@
VINT20

@
PR110
1
1

1
1

1U_0402_10V
@ 0_0402_5%

EMC@
EMC@

PC214
PL22
PL21

1 2

PR241
1
3
31
2
4
5
7
6

1
0_0402_5%

3
31
2
4
5
7
6

1U_0402_10V
EMC@

@ 0_0402_5%
@ 0_0402_5%
EMC@

PC113

0_0402_5%
1
1

@
3
31
2
4
5
7
6

1U_0402_10V

VCC

PWM
VCCD

DISB#
PR101

VCC
SMOD#
CGND1

PWM
1

VCCD

DISB#
ZCD_EN
2
2

BLM18KG300TN1D
BLM18KG300TN1D
THWN

SMOD#
CGND1
1 8
0_0402_5%

ZCD_EN
2
2
VCC

BLM18KG300TN1D
BLM18KG300TN1D
THWN GL1
PWM

8 9 20
VCCD

DISB#

GL1 GL2 VIN1


SMOD#
CGND1

9 20 10 21 PC169 1
ZCD_EN
2
2

BLM18KG300TN1D
BLM18KG300TN1D

10 GL2 VIN1 21 11 GL3 VIN2 22 10U_0805_25V 8 THWN


11 GL3 VIN2 22 PC207 GL4 VIN3 23 9 GL1 20
GL4 VIN3 VIN4 GL2 VIN1

2
1
23 10U_0805_25V 24 10 21 PC96

PU5
VIN4 24 VIN5 25 PC170 11 GL3 VIN2 22 10U_0805_25V

PU6
VIN5 VIN6 GL4 VIN3

2
1
25 10U_0805_25V 23
VIN6 VIN4
2
1

PC208 28 24
PU4

GH VIN5

2
1
28 10U_0805_25V 19 25 PC97
19 GH 26 PGND1 30 VIN6

NCP81382MNTXG_QFN39-31_6X4
PC171 10U_0805_25V
PGND1 PGND2 BOOT

2
1
26

NCP81382MNTXG_QFN39-31_6X4
30 10U_0805_25V 28

2
PGND2 BOOT GH
2
1

PC209 19

2
PGND1
2
1

26
NCP81382MNTXG_QFN39-31_6X4

10U_0805_25V 30 PC98
PC172 PGND2 BOOT 10U_0805_25V
2

PHASEF
PHASED

VSW7
VSW6
VSW5
VSW4
VSW3
VSW2
VSW1
PR163

2
1
10U_0805_25V

PHASEF
PHASED

VSW7
VSW6
VSW5
VSW4
VSW3
VSW2
VSW1
PR168
2
1

PC210

6.2_0603_1%
1

18
17
16
15
14
13
12
27
29
2
1

10U_0805_25V PC99

6.2_0603_1%
1
PHASEF
PHASED

VSW7
VSW6
VSW5
VSW4
VSW3
VSW2
VSW1
PR158

18
17
16
15
14
13
12
27
29
1 2 PC173 10U_0805_25V

2
1
10U_0805_25V
6.2_0603_1%
1
2
1

18
17
27

16
15
14
13
12
29

1 2 PC211 1 2 2 1
2
1

1 2 2 1 10U_0805_25V PC100
PC175

@
PC174 1 2 10U_0805_25V

2
1

@
@
10U_0805_25V 1 2 2 1

PC188

PR164
2
1

PC212

PC213

4
4

2
1
@
@

10U_0805_25V PC101

1
PL7

PR169
PC502 10U_0805_25V
PC102

PR159
PC147

2
1
0.22U_0603_25V7-K

0.1U_0201_25V6
1

PL8

PC231
2
1

PC504 2 1

680P_0402_50V7K
EMC@

0.1U_0201_25V6 PC498

680P_0402_50V7K
2

0.22U_0603_25V7-K
PL6

2 1 0.1U_0201_25V6
2

EMC@
PC503 2 1

2
680P_0402_50V7K
0.22U_0603_25V7-K

EMC@
EMC@

2
1

2.2_0603_5%_ESR03EZPJ2R2
PC505
2

EMC@
PR161

CMLE064T-R15MS0R725-88(0.72mohm+/-5%)

2.2_0603_5%_ESR03EZPJ2R2
2200P_0201_25V7-K PC499

2
1
2 1
1

2
2

2
@ 0_0402_5%
EMC@
2
1

CMLE064T-R15MS0R725-88(0.72mohm+/-5%)
2.2_0603_5%_ESR03EZPJ2R2

2200P_0201_25V7-K
PR165

PR166
2 1 PC522 2200P_0201_25V7-K
CMLE064T-R15MS0R725-88(0.72mohm+/-5%)

68P_0402_50V8J 2 1
1

1
@ 0_0402_5%

@ 0_0402_5%
RF@

PR170
PR160

PR171
PC530
68P_0402_50V8J PC487

1
1

1
@ 0_0402_5%
@ 0_0402_5%

@ 0_0402_5%
RF@
68P_0402_50V8J
RF@

SW1_3PH_A

SW2_3PH_A
CSN2_3PH_A
CSN1_3PH_A

91

SW3_3PH_A
91

CSN3_3PH_A
91
91

91
91
PC126 PC103 PC148 PC199 PC178
1 2 1 2 1 2 2 1 2 1 PC216
2 1 330U_B2_2.5VM_R9M
1
2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


2
PC224 1

PC129 PC104 PC149 PC200 PC179 22U_0603_6.3V6M PC226


1 2 1 2 1 2 2 1 2 1 PC217 47U_0805_6.3V6M
H42-45W

2 1
1
2
H44e-45W

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 330U_B2_2.5VM_R9M

3
3

PC130 PC105 PC150 PC201 PC180 22U_0603_6.3V6M PC227


2
+

1 2 1 2 1 2 2 1 2 1 PC218 47U_0805_6.3V6M
2 1
1
2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 330U_B2_2.5VM_R9M


PC131 PC106 PC151 PC202 PC181 22U_0603_6.3V6M PC228
1uF 63pcs
2
+

1 2 1 2 1 2 2 1 2 1 PC219 47U_0805_6.3V6M
2 1
1
2
@

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 330U_B2_2.5VM_R9M


PC132 PC107 PC152 PC203 PC182 22U_0603_6.3V6M PC229
2
+

1 2 1 2 1 2 2 1 2 1 PC220 47U_0805_6.3V6M
1
2
Panasonic:ETQP4LR15AFM

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 330U_B2_2.5VM_R9M

Issued Date
PC127 PC108 PC153 PC204 PC183 22U_0603_6.3V6M
2
PC225 1 PC230 1 PC418 1 PC419 1

1 2 1 2 1 2 2 1 2 1 PC221

Security Classification
1
2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


MAX:74A,TDC:56A,OCP:88.8A
MAX:68A,TDC:56A,OCP:81.6A

PC128 PC109 PC154 PC205 PC184 22U_0603_6.3V6M


1 2 1 2 1 2 2 1 2 1
PC222
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M
Cyntec:CMLE064T-R15MSOR725-88

1
2

PC133 PC110 PC155 PC206 PC185


1 2 1 2 1 2 2 1 2 1 22U_0603_6.3V6M
PC223
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M
1
2

PC134 PC111 PC156 PC195 PC186


1 2 1 2 1 2 2 1 2 1 22U_0603_6.3V6M
47uF 4pcs

2014/07/01
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M
EMC@
PC500

PC135 PC112 PC157 PC196 PC187 0.1U_0402_25V6


1 2 1 2 1 2 2 1 2 1 2 1

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


PC114 PC158 PC189 2 1
330uF 3pcs

PC136 PC197
1 2 1 2 1 2 2 1 2 1
2200P_0402_25V7-K
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M
PC501

PC115 PC159 PC137 PC190


1 2 1 2 1 2 PC198 2 1
EMC@

2 1
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M

2
2

PC116 PC160 PC138 10U_0603_6.3V6M PC191


1 2 1 2 1 2 PC193 2 1
2 1
22uF 8pcs

Deciphered Date

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M


VCCCPUCORE

PC117 PC161 PC139 10U_0603_6.3V6M PC192


1 2 1 2 1 2 PC194 2 1
2 1
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
LC Future Center Secret Data

PC118 PC162 PC140 10U_0603_6.3V6M


1 2 1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


PC119 PC163 PC141
1 2 1 2 1 2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/12/31

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

PC120 PC164 PC142


1 2 1 2 1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


PC121 PC165 PC143
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

1 2 1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


C

PC122 PC166 PC144


1 2 1 2 1 2
Size

Date:
Title

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


10uF 28pcs

PC123 PC167 PC145


1 2 1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


PC124 PC168 PC146
1 2 1 2 1 2
Document Number

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


DC/DC VCCPUCORE

1
1

Wednesday, December 07, 2016


Payton17
Sheet
92
of
111
Rev
0.1
A
B
C
D
A
B
C
D

91
91
91

91,92,93,94
91,92,93,94
91,92,93,94

PWM3_3PH_B/DOSC3
PWM2_3PH_B/DOSC1

DRON
DRON

VCC5M
VCC5M
PWM1_3PH_B/ICCMAX3B

PC659
PC318
DRON

2.2_0603_1%

44e@ 2.2_0603_1%

44e@ 1U_0402_10V
1U_0402_10V

5
5

PR177

PR350
VCC5M
2 1 1 2 2 1 1 2

PR305

PR317
1

1
VCC5M
VCC5M

1
1
2
2

PR270
PR269
2 1 2 1

PC238

44e@
2.2_0603_1%

1U_0402_10V
PR172

PR242
2
2

1
PR268
PR267
2 1 1 2

2
44e@
PC316

PC660

0_0402_5%
VINT20
VINT20

2
2
1
1

@ 0_0402_5%

44e@ PR355 0_0402_5%


44e@ PR353 0_0402_5%
VCC5M

1 2 1 2

PL80
PL31

PL81

PL82
PL32
PL30

1U_0402_10V
2 1

EMC@

EMC@
EMC@

1U_0402_10V
@ 0_0402_5%
@ 0_0402_5%
1
1

1
1

1
1
1
VINT20

@
@
3
31
2
4
5
7
6

3
31
2
4
5
7
6
@ 0_0402_5%
1 2
PL29
PL27

PL28

VCCGFXCORE_I Phase3 are POP for 44e only

PR319
PR306
PC239

@ 0_0402_5%
@ 0_0402_5%

44e@

44e@

44e@
EMC@
EMC@

EMC@

1
1

0_0402_5%
0_0402_5%
VCC

VCC
1U_0402_10V

PWM

PWM
@

VCCD

VCCD
DISB#

DISB#
3
31
2
4
5
7
6

CGND1

CGND1
SMOD#

SMOD#
1 1

ZCD_EN

ZCD_EN
2
2

2
2
2
PR304
THWN THWN

BLM18KG300TN1D
BLM18KG300TN1D

BLM18KG300TN1D

BLM18KG300TN1D
BLM18KG300TN1D
BLM18KG300TN1D
8 8
9 GL1 20 9 GL1 20

0_0402_5%
VCC

GL2 VIN1 GL2 VIN1


PWM

10 21 10 21
VCCD

DISB#

GL3 VIN2 GL3 VIN2


CGND1

SMOD#

11 22 PC650 11 22 PC310 1
ZCD_EN
2
2

GL4 VIN3 GL4 VIN3 THWN


BLM18KG300TN1D
BLM18KG300TN1D

BLM18KG300TN1D

23 10U_0805_25V 23 10U_0805_25V 8

44e@
VIN4 24 VIN4 24 9 GL1 20

PU8

44e@
VIN5 VIN5 GL2 VIN1

2
1
2
1
25

PU25
25 10 21
VIN6 PC651 VIN6 PC311 11 GL3 VIN2 22 PC232
28 10U_0805_25V 28 10U_0805_25V GL4 VIN3 23 10U_0805_25V
19 GH 19 GH VIN4 24
PU7

44e@
PGND1 PGND1 VIN5

2
1
2
1

2
1
26 30 26 30 25

NCP81382MNTXG_QFN39-31_6X4

NCP81382MNTXG_QFN39-31_6X4
PGND2 BOOT PC652 PGND2 BOOT PC312 VIN6 PC233
10U_0805_25V 10U_0805_25V 28 10U_0805_25V

2
2
19 GH

44e@
PGND1
2
1

2
1

2
1
26 30

44e@
VSW7
VSW6
VSW5
VSW4
VSW3
VSW2
VSW1

VSW7
VSW6
VSW5
VSW4
VSW3
VSW2
VSW1
PHASEF
PHASED

PHASEF
PHASED
NCP81382MNTXG_QFN39-31_6X4

PC653 PC313 PGND2 BOOT PC234


2

PR351
PR178
10U_0805_25V 10U_0805_25V 10U_0805_25V

18
17
16
15
14
13
12
27
29

18
17
16
15
14
13
12
27
29
1
1

44e@

6.2_0603_1%
6.2_0603_1%
2
1
2
1

2
1
VSW7
VSW6
VSW5
VSW4
VSW3
VSW2
VSW1
PHASEF
PHASED
PR173

PC654 PC314 PC235


1 2 10U_0805_25V 1 2 10U_0805_25V 10U_0805_25V
1
6.2_0603_1%

18
17
16
15
14
13
12
27
29

WWW.AliSaler.Com
1 2 2 1 1 2 2 1

44e@
2
1

2
1
2
1

PC315
PC655 10U_0805_25V PC236
10U_0805_25V 1 2 2 1 1 2 10U_0805_25V

PC317

PC658

44e@

PC661
PC340

PR181

PR357
2
1

44e@
2
1
2
1

PC510

4
4

PC656 0.1U_0201_25V6 PC237

44e@
PC281

PR175

0.1U_0201_25V6 2 1 10U_0805_25V
PC240

1
1

1
EMC@

2 1

44e@
2
1

0.22U_0603_25V7-K

0.22U_0603_25V7-K

@ 680P_0402_50V7K
@ 680P_0402_50V7K
PL9

PC511 PC506

PL10

PL83
PC657 0.1U_0201_25V6

44e@
680P_0402_50V7K

2
1

2 1

2
1
0.22U_0603_25V7-K

2200P_0201_25V7-K

2
2

2
EMC@

2200P_0201_25V7-K 2 1

@ 2.2_0603_5%_ESR03EZPJ2R2

@ 2.2_0603_5%_ESR03EZPJ2R2
2 1 PC507
EMC@

PC532
2.2_0603_5%_ESR03EZPJ2R2
2
1

@
PC533 68P_0402_50V8J

1
RF@

68P_0402_50V8J 2200P_0201_25V7-K
1

CMLE064T-R15MS0R725-88(0.72mohm+/-5%)

2 1
EMC@

PR288 PC531

1
PR287
CMLE064T-R15MS0R725-88(0.72mohm+/-5%)

CMLE064T-R15MS0R725-88(0.72mohm+/-5%)
68P_0402_50V8J
2
2
RF@

@ 0_0402_5%

PR289
@ 0_0402_5%

2
@ 0_0402_5%
SW2_3PH_B
CSN2_3PH_B
SW1_3PH_B
CSN1_3PH_B

91
91
91
91

SW3_3PH_B
CSN3_3PH_B

91
91
PC302 PC261 PC292 PC341 PC319 PC352 330U_B2_2.5VM_R9M
1 2 1 2 1 2 2 1 2 1 2 1
1
2
2
PC336 1

3
3

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M PC330


PC303 PC262 PC293 PC342 PC320 PC353 47U_0805_6.3V6M
1 2 1 2 1 2 2 1 2 1 2 1 330U_B2_2.5VM_R9M
44e@

1
2
H42-45W

2
PC337 1

+
H44e-45W

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M PC331


PC304 PC263 PC294 PC343 PC321 PC354 47U_0805_6.3V6M
1 2 1 2 1 2 2 1 2 1 2 1
1
2

330U_B2_2.5VM_R9M
44e@

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M PC332


2
+

PC305 PC264 PC295 PC344 PC322 PC355 47U_0805_6.3V6M


1 2 1 2 1 2 2 1 2 1 2 1
1
2

330U_B2_2.5VM_R9M
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M PC333
2
+

PC306 PC265 PC296 PC345 PC323 PC356 47U_0805_6.3V6M


1 2 1 2 1 2 2 1 2 1 2 1
1
2
@

330U_B2_2.5VM_R9M
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M PC334
2
+

PC307 PC266 PC297 PC346 PC324 PC357 47U_0805_6.3V6M


1 2 1 2 1 2 2 1 2 1 2 1
MAX:55A,TDC:39A,OCP:66A

1
2
@

330U_B2_2.5VM_R9M
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M PC335
2
PC338 1 PC339 1 PC420 1 PC421 1

PC308 PC267 PC298 PC347 PC325 PC358 47U_0805_6.3V6M


MAX:94A,TDC:80A,OCP:112.8A

1 2 1 2 1 2 2 1 2 1
1
2

Issued Date
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M
PC309 PC268 PC299 PC348 PC326 PC359

Security Classification
1 2 1 2 1 2 2 1 2 1
1
2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 22U_0603_6.3V6M


PC251 PC269 PC300 PC349 PC327
1 2 1 2 1 2 2 1 2 1

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


PC252 PC270 PC301 PC350 PC328
EMC@

1 2 1 2 1 2 2 1 2 1 0.1U_0402_25V6
PC508

2 1
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M
PC253 PC282 PC241 PC351 PC329
1 2 1 2 1 2 2 1 2 1 2 1
2014/07/01
47uF 6pcs

1U_0402_6.3V6K
330uF 4pcs

1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 2200P_0402_25V7-K


PC254 PC283 PC242 PC366 PC360
PC509

1 2 1 2 1 2 2 1 2 1
EMC@

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


2
2

PC255 PC284 PC243 PC367 PC361


1 2 1 2 1 2 2 1 2 1
22uF 8pcs

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


PC256 PC285 PC244 PC368 PC362
1 2 1 2 1 2 2 1 2 1
PC337 and PC338 are ASM for 44e only

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


VCCGFXCORE_I

PC257 PC286 PC245 PC369 PC363


1 2 1 2 1 2 2 1 2 1
Deciphered Date

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


PC258 PC287 PC246 PC370 PC364
1 2 1 2 1 2 2 1 2 1
LC Future Center Secret Data

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


PC259 PC288 PC247 PC371 PC365
1 2 1 2 1 2 2 1 2 1

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M


PC260 PC289 PC248 PC372
1 2 1 2 1 2 2 1
2015/12/31

1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M


MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1U_0402_6.3V6K
PC271 PC290 PC249
1 2 1 2 1 2
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


PC272 PC291 PC250
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

1 2 1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

PC273 PC276 PC279


Date:
Title

1 2
Custom

1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


PC274 PC277 PC280
1 2 1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


PC275 PC278
Size Document Number
10uF 35pcs

1 2 1 2

1U_0402_6.3V6K 1U_0402_6.3V6K
1
1

DC/DC VCCGFXCORE_I

Payton17
93 Wednesday, December 07, 2016 Sheet
1uF 68pcs

of
111
Rev
0.1
A
B
C
D
5 4 3 2 1

D D

VINT20

1 2
PL33 BLM18KG300TN1D
EMC@ PC373 1 PC374 1 PC512 PC513 1 PC540 PC546 PC547

1
2200P_0201_25V7-K

2200P_0402_25V7-K
10U_0805_25V
10U_0805_25V

0.1U_0201_25V6

68P_0402_50V8J

68P_0402_50V8J
2

2
2 2 2

EMC@ RF@
VCC5M EMC@
PR183 RF@ RF@
2 1
3.9_0603_5%_ESR03EZPJ3R9
2

2
PC377
0.22U_0603_25V7-K

1
PR182

20
21
22
23
24
25

28

30
1
2.2_0603_1% H42-45W
1

VIN1
VIN2
VIN3
VIN4
VIN5
VIN6

BOOT
THWN

GH
6
VCC
MAX:11.1A,TDC:9A,OCP:13.32A
29
PHASED H44e-45W
1

PC376 7 27
VCCD PHASEF
1

PC375 MAX:8A,TDC:9A,OCP:13.32A
1U_0402_10V 1U_0402_10V PL11
2

0.47UH_PCMB063T-R47MS3R675_18A_20%(DCR+/-5%)
2

C 5 12 1 2 C
CGND1 PU9 VSW1 13
VCCSA
VSW2 14 PC378
NCP81382MNTXG_QFN39-31_6X4 VSW3
2 1 4 15 PR184 PC545 PC544 PC514 PC515
PWM VSW4

1
2200P_0402_25V7-K

2200P_0402_25V7-K
91 PWM1_1PH/ICCMAX1 CSN_1PH 91

330U_B2_2.5VM_R9M

0.1U_0402_25V6

0.1U_0402_25V6
PR271 @ 0_0402_5% 16 2 1 1
2 1 2 VSW5 17
91,92,93 DRON PR272 @ 0_0402_5% DISB# VSW6 18 @ 0_0402_5% +

2
31 VSW7
VCC5M ZCD_EN PR185

PGND1
PGND2
1 2 3 2 1 SW_1PH 91 2
SMOD#
GL1
GL2
GL3
GL4

PR307 0_0402_5%

1
@ 0_0402_5% RF@ EMC@
@
330uF 1pcs
2

PC391
8
9
10
11

19
26

PR308 680P_0402_50V7K RF@ EMC@

2
@ 0_0402_5% @
1

47U_0805_6.3V6-M
47U_0805_6.3V6-M
PR186
2.2_0603_5%_ESR03EZPJ2R2 1 1
47uF 2cs

PC380
PC379
1 @

2 2

B B

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
10U_0603_6.3V6M

10U_0603_6.3V6M
1

1
1

1
1

1
PC382

PC383

PC385
PC381

PC386
PC384

PC387
10uF 7pcs

2
2

2
2

2
1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K
1uF 3pcs

2
2

2
PC389
PC388

PC390
1
1

1
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCCSA


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 94 of 111
5 4 3 2 1
5 4 3 2 1

PJ8
2 1 VCCCPUIO
VCCCPUIOP 2 1
VCC3M @ JUMP_43X79
D D

1
PR22
20K_0402_1%

2
AGND_CPUIO
2 1 PR204
VCC3M 104,17 -PCH_SLP_S0 3.3_0603_5%
PR273 0_0402_5% 1 2
@

9
1

2
VCC5M PC433
PR450 0.22U_0603_25V MAX:5.5A

LP#

MODE

BST
10K_0402_5% PJ9 EMC@ EMC@

1
TDC:5.5A

22U_0805_6.3V6M

0.1U_0402_10V
2 1 1
2 1 VIN

2200P_0402_25V7-K
PL16
2

1
2

1
PC432

PC463
0.68UH_PCMB063T-R68MS_+-20% VCCCPUIOP
@ JUMP_43X39

PC516
8 1 2
SW
PU14

2
1

0.1U_0402_10V
PD34 PR281

2200P_0402_25V7-K
RB521CS-30GT2RA_VMN2-2 12 2 1
VOUT

1
1
PC434

PC435

PC436

PC464
22U_0805_6.3V

22U_0805_6.3V

22U_0805_6.3V
1 2 2 1 5
104,54,77,83,84,98,99 B_ON EN

PC517
PR274 @ 0_0402_5% 6.8_0402_5%
NB681AGD-C669-Z_QFN13_2x3

2
2
PD35 VCCCPUIO_C1 3
RB521CS-30GT2RA_VMN2-2 C1
1 2 EMC@
C 17,46,76,84 -PCH_SLP_S3 VCCCPUIO_C0 4 2 C
C0 PGND PR282

3V3
11 2 1

PG
EMC@
AGND

AND LOGIC.Once -PCH_SLP_S3 is de-asserted @ 6.8_0402_5%

13

10
VCC3M
VCCCPUIO should be shut down in <= 1usec
PR205 PR220
This is tPLT18 defined in Intel SKL-H PDG 1 2 1 2

100K_0402_1% 5.1_0402_1%

1
1 2
VCCCPUIO_SENSE 11
PC437 PR258 @ 0_0402_5%
1U_0402_10V

2
1 2
VSSCPUIO_SENSE 11
PR259 @ 0_0402_5%

VCC3M VCC3M AGND_CPUIO


PRJ6
1 2
2
2

PR314 PR275
20K_0402_1% 20K_0402_1% @ 0_0402_5%
@
1
1

B
Control Bit Definitions B
AGND_CPUIO
VCCCPUIO_C1 VCCCPUIO_C0

LP# C1 C0 VOUT(V)
2
2

PR315 PR276

@
20K_0402_1% 20K_0402_1%
0 X X 0
1
1

1 0 0 0.85
AGND_CPUIO AGND_CPUIO

1 0 1 0.875
1 1 0 0.95
1 1 1 0.975

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCCCPUIO


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 95 of 111
5 4 3 2 1
5 4 3 2 1

D D

PJ10 VCC1R0_SUS
2 1
VCC1R0P_SUS 2 1
@ JUMP_43X79

1
1
PR277
PC443 95.3K_0402_1%
0.1U_0402_25V7-K

2
1 2
PR206 @ 0_0402_5% SUS_ON2 76

VCC1R0_REFIN

VCC1R0_VREF
C AGND_1R0_SUS PR278 C

VCC1R0_EN
100K_0402_1%
VCC3M VCC3M

2
24

25

26

27

28

29
PR207 PR209
AGND_1R0_SUS 100K_0402_1% 100K_0402_1%

REFIN2

GND2
REFIN

EN
VREF

RA

1
23 1
GSNS PGOOD
22 2
VSNS LP#
1 2 VCC1R0_SLEW 21 3
AGND_1R0_SUS
PC467 2700P_0402_50V7-K SLEW MODE TDC:8A
1 2 VCC1R0_TRIP 20 4 PC439 VCC1R0P_SUS
VCC5M TRIP NC
PR279 @ 0_0402_5% 0.1U_0603_25V7K
1 2 19 5 VCC1R0_BST 2 1VCC1R0_BST_2 1 2 PL17
AGND_1R0_SUS
@ PR280 0_0402_5%
AGND_1R0_SUS GND1 PU15 BST PR446 @ 0_0603_5% 0.68UH_PCMB063T-R68MS_+-20%
VCC5M 2 1 VCC1R0_V5 18 6 VCC1R0_SW 1 2
PR208 @ 0_0603_5% V5 SW1
1 2 17 7

0.1U_0402_10V
AGND_1R0_SUS VIN3 SW2
PC472 2.2U_0603_10V_X7R

2200P_0402_25V7-K
1

1
16 8

PC16

PC18
PC440

PC441

PC442

PC466
22U_0805_6.3V

22U_0805_6.3V

22U_0805_6.3V

22U_0805_6.3V

22U_0805_6.3V
PJ11 VIN2 SW3 PC1007

PC519
2 1 VCC1R0_VIN 15 9 @ 1000P_0402_50V7-K
VCC5M

2
2

2
2 1 VIN1 SW4
PGND1

PGND2

PGND3

PGND4

PGND5
@ JUMP_43X39 EMC@
0.1U_0402_10V
22U_0805_6.3V6M

2
2200P_0402_25V7-K
2

1
PC438

PC465

14

13

12

11

10
SN1409027RVER_QFN28_3P5X4P5 PR447 EMC@
PC518

@ 4.7_0603_5%
1

1
B B
EMC@

EMC@

PRJ7
1 2

@ 0_0402_5%

AGND_1R0_SUS

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCC1R0_SUS


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 96 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 97 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC5M

PJ15
VCC1R8_VIN 2 1
2 1

2
PR323 @ JUMP_43X39 VCC1R8BP VCC1R8B
10_0402_5% PJ14

2200P_0402_25V7-K
22U_0805_10V6-M

0.1U_0402_25V7-K
2 1
2 1
1

1
PC450

EMC@ PC479

EMC@ PC541
@ JUMP_43X39

2
1
PC416
1000P_0402_16V7-K
2
C C

17
PU18 1.5A
AGND_1R8

THERMAL_PAD
13 9 VCC1R8BP
GND VCC
16 7
15 PGND1 PVCC3 6
14 PGND2 PVCC2 5 PL19
PGND3 PVCC1 2.2UH_PH041H-2R2MS_20%
12
11 ITH 4 1 2
2 1 10 ADJ SW4 3
104,54,77,83,84,95,99 B_ON EN SW3 2
PR285 @ 0_0402_5%
8 SW2 1
BST SW1
2

22U_0805_10V6-M

22U_0805_10V6-M

0.1U_0402_10V
BD9139MUV-E2_VQFN16_3X3

1
PC477

PC451

EMC@ PC520
PR332
8.2K_0402_1% @ 0_0402_5% PC542
1 2 1 2

2
1

PR324 0.1U_0603_25V7K
12.7K_0402_1%
1 2

1 PR19
PC480
6800P_0402_25V
PRJ12
2
B 2 B
1 2 PR174
10K_0402_1%
@ 0_0402_5%
1

AGND_1R8

AGND_1R8

AGND_1R8

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCC1R8B


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 98 of 111
5 4 3 2 1
5 4 3 2 1

PJ16
2 1
VCC1R2AP 2 1 VCC1R2A
@ JUMP_43X118

PJ17
VCC0R6BP VCC0R6B 2 1
2 1
PJ18 @ JUMP_43X118
2 1
2 1 PJ24
2 1
@ JUMP_43X39 VCC1R2AP 2 1
D @ JUMP_43X118 D

EMC@ PJ19

10U_0603_6.3V6M
2 1
2 1 VINT20

10U_0603_6.3V6M
0.1U_0402_6.3V7-K
PC394

2200P_0402_25V7-K
68P_0402_50V8J
47P_0402_50V8-J
EMC@ PC392

PC395

0.1U_0402_25V6
@ JUMP_43X118

0.1U_0402_6.3V7-K

10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K
PC393

1
1

1
1
RF@ PC399
10U_0805_25V6-K

PC396

PC397

PC398

EMC@ PC401

EMC@PC402
RF@ PC400
21

PC486
2

2
4 3

PAD

2
2

2
2
VTTGND VTT
0.6A

2
1 2
VCC0R6BP VTTSNS VLDOIN PC403
PR187 0.1U_0603_25V7K
1K_0402_1% 7 15 DDR_VBST
2 1 1 2 PQ27
1 2 GND VBST BSC0924NDI PQ28
51716_AGND

2
PR188 @ 0_0603_5% BSC0924NDI
1 2 51716_AGND 19 14 DRVH 2 1 1 1
VCC1R2AP PR189 @ 0_0402_5% MODE DRVH
PR240 @ 0_0603_5% PL13 22A
DDR_VREF 6 13 DDR_SW PCMB104T-R36MS-88
VREF SW 7 7 1 2
VCC1R2AP
1

1
PR190 11 DRVL 6 6
DRVL
1

10K_0402_1% PC409

2200P_0402_25V7-K

68P_0402_50V8J
330U_D2_2V_R9M
330U_D2_2V_R9M

0.1U_0402_25V6
PC404 @ 1000P_0402_50V7-K 1 1

2
0.1U_0402_6.3V7-K DDR_REFIN 8 10
2
2

REFIN PGND

1
1
1
PC406

RF@ PC548
EMC@ PC408
PC405

EMC@ PC407
C + + C

3
4
5

3
4
5

2
DDR_VDDQS 9

2
2
2
PR192 VDDQSNS 2 2
@ 0_0402_5% PR191
51716_AGND TP77 1 2 1 SMDDR_VREF_C 5 @ 4.7_0603_5%
VTTREF PR194

1
1
2

@ 0_0603_5%
1

PR193 PC411 TPS51716_S3 17 12 DDR_V5IN 2 1


PC410 19.6K_0402_1% 0.22U_0402_10V6-K S3 V5IN VCC5M
2

0.01U_0402_25V7K
2

1
TPS51716_S5 16 PC412
1

S5 1U_0402_10V
51716_AGND

2
18 20
TRIP PGOOD
1

PC413 PU10
2

@ 1000P_0402_25V7-K PR195 TPS51716RUKR_WQFN20_3X3 2 1


2

0_0402_5% PR196
@ 46.6K_0402_1% PR197
100K_0402_5%
2

51716_AGND
1

51716_AGND 51716_AGND

PR200
@ 0_0402_5%
1 2
7 DDR_VTT_PG_CTRL PRJ13
B B
1 2
PR198
@ 0_0402_5%
1 2 TPS51716_S3 @ 0_0402_5%
104,54,77,83,84,95,98 B_ON 1
PC414
100P_0402_50V8-J
2 51716_AGND

51716_AGND

PR199
69.8K_0402_1%
1 2 TPS51716_S5
100,104,84 A_ON
1

PC415
0.1U_0402_6.3V7-K
2

51716_AGND

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCC1R2A/VCC0R6B


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 99 of 111
5 4 3 2 1
5 4 3 2 1

D D

PJ20
2 1
VCC5M VCC2R5AP 2 1 VCC2R5A
PJ21 @ JUMP_43X79
2 1 VCC2R5A_VIN
2 1

22U_0805_10V6-M

22U_0805_10V6-M

2200P_0402_25V7-K
C C

0.1U_0402_25V7-K
@ JUMP_43X39

1
EMC@ PC474

EMC@ PC538

100_0603_5%
1

1
1

1
PC424

PC475

PR201
2

2
2

2
1
PC425
1000P_0402_16V7-K
2
5A

10

6
AGND_2R5
PR321 VCC2R5AP

PVCC3

PVCC2

PVCC1
AVCC
@ 0_0402_5% 12 PC524
2 1 11 PGD 0.1U_0603_25V7K
104,84,99 A_ON EN 9 1 2
BST PL14
0.47UH_PCMB053T-R47MS
PU11 5 1 2
13 SW5 4

2200P_0402_25V7-K
RES SW4 3

0.1U_0402_10V
PC539
SW3

1
1

EMC@ PC521
2 2 1

22U_0805_6.3V
22U_0805_6.3V

22U_0805_6.3V
SW2

1
PC417
PC13

PC14
BD91364BMUU-ZE2_VQFN20_4X4 1
PRJ11 SW1

EMC@ PC525
220P_0402_50V7-K

2
2

2
1 2 AGND_2R5 14 PR320 PR322

2
SS 15 2 1 2 1
1 FB
@ 0_0402_5% PC476 21 42.2K_0402_1% 300_0402_1%

PGND1

PGND2

PGND3
ThermalPad

1
AGND
1000P_0402_16V7-K
2 PR260
RS

20K_0402_1%
AGND_2R5
16

17

18

19

20
AGND_2R5

2
B B
AGND_2R5

AGND_2R5

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCC2R5A


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 100 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev

WWW.AliSaler.Com
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 101 of 111
5 4 3 2 1
5 4 3 2 1

PR358 44e@ PR359 close to PL85


28K_0402_1% 44e@ 6.81K_0603_1%
1 2 1 2
AGND_NCP81210 81210_SWN 102
PC662 44e@ PR360 44e@ PRT19
1 2 13.3K_0402_1% 100K_0402_1%_NCP15WF104F03RC VINT20
2 1 2 1 210_VIN
81210_SENSE_RETURN 102
44e@ 470P_0402_50V7K
PC663 0.015U_0402_25V7-K 1 2

2200P_0201_25V7-K
44e@ 2 1 PL84 BLM18KG300TN1D

68P_0402_50V8J
10U_0805_25V

10U_0805_25V
10U_0805_25V

10U_0805_25V
D PR363 D
44e@
PR362 PC664 4700P_0402_25V7-K 44e@ 15K_0402_1% 1 1 1 1 1

1
PC665

PC667

PC526
PC666

PC668

PC523

PC543
0.1U_0201_25V6
1 2 44e@ 1 2 1 2
VCC5M
44e@ 2_0603_5% 44e@ PC669

2
1000P_0402_25V7-K 2 2 2 2 2
81210_ILIM 2 1 44e@ 44e@ 44e@ 44e@
AGND_NCP81210
2 1 PC671 44e@
AGND_NCP81210 81210_COMP 1 2 1 PR364 2 44e@ 44e@
AGND_NCP81210
PC670 44e@
1U_0402_10V7-K 81210_VSN 44e@ 2200P_0402_25V 2.49K_0402_1%
PR389 81210_VSP 1 2
44e@ AGND_NCP81210
101,103,7,84,91 CPUCORE_ON 2 1
44e@ 0_0402_5% PR368 PC672 15P_0402_50V8-J

1
AGND_NCP81210 2 1 44e@
VCC5M
44e@ PR365 100_0402_5% PR451
2 1 210_HOT_N 0_0402_5% 10K_0402_5%
7,76,91 -PROCHOT @ 44e@

39
38

37

36
35
34
33

32
31
30
29
44e@ PR366 10_0402_1%

2
1 2 210_SDIO

ILIM
IOUT
CSP

COMP

VSP
PSYS
GND
EN

VCC

CSN

VSN
7,91 SVID_DATA
44e@ PR369
44e@ PR367 0_0402_5% AGND_NCP81210 150K_0402_1%
7,91 -SVID_ALERT 2 1 210_ALERT# 1 28 81210_ADDR/VBOOT 1 2
VRHOT# DOSC/ADDR/VBOOT 81210_TSENSE AGND_NCP81210
2 27
44e@ PR370 49.9_0402_1% 3 SDIO TSENSE 26 81210_IMAX
ALERT# IMAX

1
7,91 SVID_CLK 1 2 210_SCLK 4 25
SCLK PVCC VCC5M

0.1U_0402_25V6
15.8K _0402_1%
5 PU26 24 PR371
PGND1 PGND8

2
2 1 6 42

4.7U_0402_6.3V
17,24,91 CPUCORE_PWRGD 44e@ 0_0402_5%
210_VIN1 VR_RDY GL3

PR372

PC673
44e@ PR390 0_0402_5% 7 23 1 44e@
BST1 8 VIN1 GL2 22 81210_GL

100K_0402_1%_NCP15WF104F03RC
2
1
BST GL1

PC674
9
10 GH NCP81210MNTXG_QFN40-42_5X5 21

2
C SW1 SW2 2 C

PGND2
PGND3
PGND4
PGND5
PGND6
PGND7
PGND9
1

44e@

VIN2
VIN3
VIN4
VIN5
VIN6

2
44e@ PR373 44e@ 44e@

1
210_VIN

PRT18

11.3K_0402_1%
2.2_0603_5%_ESR03EZPJ2R2

PR374
11
12
13
14
40

15
16
17
18
19
20
41
2

1
210_VIN1

2
2 1 close to PU26
210_VIN
1
PC675 44e@
PC15 44e@ 0.22U_0603_25V7-K 44e@
0.1U_0402_25V6-K
2 44e@
MAX:20A,TDC:9A,OCP:24A
VCCGTX
44e@ PL85
44e@ PC676 0.47UH_PCMB063T-R47MS3R675_18A_20%(DCR+/-5%)
1000P_0402_25V7-K 81210_SW1 1 2
1 2 1 1 1
PC677 PC678 PC422 PC535 PC536

2200P_0402_25V7-K
+ + +

0.1U_0402_25V6
PR375 44e@

330U_B2_2.5VM_R9M

330U_B2_2.5VM_R9M

330U_B2_2.5VM_R9M
2K_0402_1%

1
10 VSSGTX_SENSE 1 2 81210_VSN

1
1
PC686 2 2 2
1

@ 680P_0402_50V7K PR377 81210_SENSE_RETURN


102

2
44e@ PC685 2 1

2
2
1000P_0402_25V7-K 44e@0_0402_5%
1 2

2
@ 44e@ @ 44e@ 44e@

PR391
PR376
@ 2.2_0603_5%_ESR03EZPJ2R2 2
PR379
1
330uF 2pcs
100_0402_1% 44e@ 44e@ 0_0402_5% 81210_SWN 102
B PR378 B
44e@
1

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M
1.69K_0402_1%
2

10 VCCGTX_SENSE 1 2 81210_VSP
2 2 2 2 2 2 2 2

PC681
PC680

PC683

PC687

PC688
PC682

PC684
PC679
PR380
1.4K_0402_1%
2 1 1 2
PRJ10
44e@ 1 44e@ 1 44e@ 1 44e@ 1 44e@ 1 44e@ 1 44e@ 1 44e@ 1
22uF 8pcs
PC693 44e@
44e@ 3300P_0402_50V7-K 1 2

@ 0_0402_5%

10U_0603_6.3V6M
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1

1
1

1
PC690

PC692
PC689

PC691
AGND_NCP81210 10uF 4pcs

2
2

2
44e@ 44e@ 44e@ 44e@

1uF 12pcs

1U_0402_6.3V6K

1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
2

2
2

2
2

2
2

2
PC698
PC697

PC1000
PC694

PC699

PC1003

PC1005
PC696
PC695

PC1001

PC1002

PC1004
1

1
1

1
1

1
1

1
A A

44e@ 44e@ 44e@ 44e@ 44e@ 44e@ 44e@ 44e@ 44e@ 44e@ 44e@ 44e@

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 DC/DC VCCGTX


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 102 of 111
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 103 of 111
5 4 3 2 1
5 4 3 2 1

D D

C VCC3M VCC1R0_SUS VCCSTG C


VCC1R0_SUS VCCST

2
PR203
10K_0402_1% PU13
PU12

1
A1 A2
A1 A2 PD12 IN OUT Slew Rate=10uS<TR<65us
PR449 IN OUT RB521CS-30GT2RA_VMN2-2
10K_0402_1% 1 2 B1 B2
2 1 B1 B2 54,77,83,84,95,98,99 B_ON EN GND

0.1U_0402_6.3V7-K
100,84,99 A_ON EN GND

1
0.1U_0402_6.3V7-K

@ PD13
1

PC426
RB521CS-30GT2RA_VMN2-2 SIP32451DB-T2-GE1_WCSP4

2
PC427

SIP32451DB-T2-GE1_WCSP4 1 2

2
17,95 -PCH_SLP_S0

2
2
1

PR453 PC428
10K_0402_1% 10U_0402_6.3V

1
2

1
PC430
PR452 10U_0402_6.3V
2

5.1K_0402_1%

B B

SIP32451DB-T2-GE1 SIP32451DB-T2-GE1
EN pin Max Voltage Rating is 2.75V EN pin Max Voltage Rating is 2.75V

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 LOAD SW VCCST/VCCSTG


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 104 of 111
5 4 3 2 1
5 4 3 2 1

D D

VCC3M 15mA
2A
VCC3_SUS VCC5_TP
VCC5B

1
PJ22

1
JUMP_43X39
@

2
2
PR211

1 2

@ 0_0603_5%

PQ31

5
@ RW1E014SNT2R_WEMT6
PQ30
TPCF8002_2-3U1A 6
5
2 4
1

2
C C

2
PR212
33_0402_5%

2
PR213
1

4 @ 33_0402_5%

1
PR215
100_0402_5%

1
@
2

2
@ PD15
RB521CS-30GT2RA_VMN2-2

1
PR214
100_0402_5%
1

PD14
RB521CS-30GT2RA_VMN2-2 85 VCC5_TP_DRV
1

2
85 SUS_DRV PC453
@ 0.1U_0402_25V6

1
2

PC452
B 0.1U_0402_25V6 B
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 LOAD SW PCH SUS/TRACK POINT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 105 of 111
5 4 3 2 1
5 4 3 2 1

D D

0.5A
1.2A
VCC3LAN
VCC3M VCC5MUBAY
VCC5M

5
PQ32
TPCF8002_2-3U1A PQ39
TPCF8002_2-3U1A
C C
1

2
PR217
33_0402_5% PR309
33_0402_5%

1
2

2
2

2
PR218 PD16
100_0402_5% RB521CS-30GT2RA_VMN2-2 PR284 PD33
1
1

100_0402_5% RB521CS-30GT2RA_VMN2-2

1
85 VCC3LAN_DRV
B 85 VCC5MUBAY_DRV B
2

2
PC454
0.1U_0402_25V6 PC473
1

0.1U_0402_25V6

A 1 A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 LOAD SW LAN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 106 of 111
5 4 3 2 1
5 4 3 2 1

D D

11A
VCC3B
9A
VCC5B
VCC5M
VCC3M

PQ33 PQ34
SIS402DNT1GE_POWERPAK1212-8-5 SIS402DNT1GE_POWERPAK1212-8-5
1 1
2 2
5 3 5 3
4

4
C C
2

2
PR222
270_0402_5%
PR223
100_0402_5%
1

1
2

1
PC456
2

2
PC455 @ 0.1U_0402_25V6
1

2
@ 0.1U_0402_25V6

PR224 PR225
2

2
100_0402_5% 100_0402_5%
1

1
PD18 PD19
RB521CS-30GT2RA_VMN2-2 RB521CS-30GT2RA_VMN2-2
1

1
85 VCC3B_DRV 85 VCC5B_DRV
B B
2

1
PC458 PC459
0.1U_0402_25V6 0.047U_0402_25V6
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 LOAD SW B


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 107 of 111
5 4 3 2 1
5 4 3 2 1

D D

2.7A
2.7A
VCC3M VCC3WLAN
VCC3WAN
1

VCC3B
PJ25
1

JUMP_43X39
VCC3M
@
2
2

PR226
1 2

0.001_0603_5%

5
PQ36
TPCF8002_2-3U1A PQ37
TPCF8002_2-3U1A
@

C C
1

2
PR227
33_0402_5% PR228
33_0402_5%

1
@

1
2

2
2

2
PR229 PD20
100_0402_5% RB521CS-30GT2RA_VMN2-2 PR230 @ PD21
1

100_0402_5% RB521CS-30GT2RA_VMN2-2

1
@

85 VCC3WLAN_DRV
85 VCC3WAN_DRV
2

2
B B
PC461 PC460
1

0.1U_0402_25V6 0.1U_0402_25V6

1
@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 LOAD SW WWAN&WLAN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 108 of 111
5 4 3 2 1
5 4 3 2 1

H15 H16
PAD_C8P0D2P5 PAD_C8P0D2P5

@ @

1
H20 H21
PAD_CT6P0B8P0D2P5 PAD_C8P0D2P5
D D

1 @ @

H1 H2 1 H3 H4
PAD_C6P0D3P3 PAD_C6P0D3P3 PAD_C6P0D3P3 PAD_C6P0D3P3

@ @ @ @
1

1
H5 H6 H7 H8 H9
PAD_CT4P5B6P0D3P3 PAD_CT4P5B6P0D3P3 PAD_C6P0D3P3 PAD_C6P0D3P3 PAD_C6P0D3P3

@ @ @ @ @
1

1
C C
H10 H14
PAD_C6P0D3P3 PAD_C8P0D3P3

@ @
1

H11 H12
PAD_C6P0D2P0 PAD_CT6P0D2P0

@ @
1

H23 H24
PAD_C6P0D2P5 PAD_CT7P5B6P0D2P5

@ @
1
1

B B
H25 H26
PAD_OT9P5X14P5CB9P5D3P0_DF2P5 PAD_OT9P5X14P5CB9P5D3P0_DF2P5

@ @
1

H28 H29 H30 H31 H32


PAD_C11P0D10P0 PAD_C8P0D3P0 PAD_C6P0D3P0 PAD_C6P0D3P0 PAD_C10P0D6P5

@ @ @ @ @
1

PCB Fedical Mark PAD


FD1 FD2 FD3 FD4 FD5 FD6
H33 H34
PAD_C2P1D2P1N PAD_O2P1X2P5D2P1X2P5N

1
H36
@ @ PAD_C9P0D9P0N
1

@
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/07/01 Deciphered Date 2015/12/31 BLANK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Payton17
Date: Wednesday, December 07, 2016 Sheet 109 of 111
5 4 3 2 1

You might also like