T8110B

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SDS-8110

TrustedTM Industrial Control System


TrustedTM TMR Processor-T8110B

FRONT PANEL FEATURES


Each processor has an independent
power supply fed from the dual-
Triple modular
redundant 24Vdc power supply of the
TM redundant, fault
Trusted Controller chassis backplane.
tolerant 3-2-0
The processor power supplies provide
operation
short circuit protection and regulated
power to the module electronics.
Two-out-of-three
The processors operate concurrently to voting on internal
achieve triple modular redundancy and operations
fault tolerance. By providing 2-out-of-3
hardware voting on every inter- Automatic fault
processor exchange and memory data handling without
retrieval, uncompromised fault detection nuisance alarming
and error-free operation are assured.
TM
TM Trusted Operating
Trusted TMR Processors System kernel (IEC
communicate with other modules via a 61508 SIL3)
backplane mounted, triplicated Inter-
Module Bus. Additionally, interface
modules are used to support Time-stamped fault
communication with I/O sub-systems historian
and other equipment.
Module replacement
Module faults are automatically without program
detected, time-stamped, and stored for down-loading
historical review. Transient faults, once
they are recorded, are cleared Non-volatile
automatically without nuisance alarming. memory for
Permanent faults in a processor are program storage
annunciated on the front panel of the
module, without disturbing on-going Full suite of IEC
processing in the two remaining 1131-3 languages
DESCRIPTION processors.

TM When a failed Trusted


TM
TMR Multiple process
Trusted TMR Processors contain and
Processor is replaced, the replacement program execution
execute the operating and application software
programs in a triple redundant, fault tolerant module is automatically initialized
controller system.. without external loaders or other TÜV certified for
equipment. safety, SIL3
The fault tolerant design contains six fault
containment regions. The three synchronized Application programs are developed
processor fault containment regions each using the full suite of IEC 1131-3
contain a 600 series microprocessor, its languages. The user can load, run,
memory, voter, and associated circuits. stop, single-step or delete the
application program. A front panel
The non-volatile memory is used to store the maintenance enable keyswitch allows
configuration and application programs for the the download of application programs.
system.

Issue 7 Dec 2006


SDS-8110
TrustedTM Industrial Control System
TrustedTM TMR Processor-T8110B

BLOCK DIAGRAM MECHANICAL


SPECIFICATION
Dimensions (HxWxD):
241mm x 90mm x 300mm
(9.5ins x 3.6ins x 11.8ins)

Weight:
2.71kg (5.95lbs)

ENVIROMENTAL
Operating Temperature:

-5°C to 60°C
(23°F to 140°F)

Operating Humidity:
5 to 95%, non-condensing

Vibration:
10 to 57Hz ±0.075mm
ELECTRICAL SPECIFICATION 57 to 150Hz 1.0g

Voltage Range 20 to 32V dc Shock:


Maximum Load 75W 15g, ½ sine wave, 11ms
Heat Dissipation 70W
Use With Chassis T8100 EMI (IEC 801):
Processor Clock ESD
100MHz
Air discharge to 15kV
Memory Type And Size
Contact discharge to 8kV
DRAM 16MB EDO 60ns
EPROM 512kB
Radiated Fields
FLASH 2MB
10V/m, 27MHz to
NVRAM 128kB
500MHz
I/O Interface Triple redundant Inter-Module Bus
Transients and Bursts
2kV, 2.5kHz for
t=60 seconds

ICS Triplex Technical data sheets are intended for


information and guidance. The Company
has a policy of continual product
development and improvement.
Specifications are subject to change
without notice. For latest information, visit
our Website:- www.icstriplex.com

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