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  • Compal Confidential: WWW - Vinafix.vn

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    Rizal Muhammad
    28 views39 pages
    The document is a schematics document for a mobile computer model C-7M. It contains confidential information about the computer's design including components like the CPU, north bridge, south bridge, memory, graphics, network interfaces, audio, and other circuits. The document notes that it contains proprietary and confidential information belonging to Compal Electronics and is not to be distributed without permission. It provides schematics and details for the components over 39 pages.

    Original Description:

    Original Title

    LA-3941P

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    © © All Rights Reserved

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    The document is a schematics document for a mobile computer model C-7M. It contains confidential information about the computer's design including components like the CPU, north bridge, south bridge, memory, graphics, network interfaces, audio, and other circuits. The document notes that it contains proprietary and confidential information belonging to Compal Electronics and is not to be distributed without permission. It provides schematics and details for the components over 39 pages.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pdf or txt
    28 views39 pages

    Compal Confidential: WWW - Vinafix.vn

    Uploaded by

    Rizal Muhammad
    The document is a schematics document for a mobile computer model C-7M. It contains confidential information about the computer's design including components like the CPU, north bridge, south bridge, memory, graphics, network interfaces, audio, and other circuits. The document notes that it contains proprietary and confidential information belonging to Compal Electronics and is not to be distributed without permission. It provides schematics and details for the components over 39 pages.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pdf or txt
    of 39

    A B C D E

    1 1

    Compal confidential 2

    Schematics Document
    Mobile C-7M uFBGA with
    3
    VIA 896 NB & 8237S SB 3

    2007-11-19
    REV:0.4

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cover Sheet

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 1 of 39
    A B C D E
    A B C D E

    Compal confidential
    File Name : LA-3941P

    Thermal Sensor VIA C7M 1G Clock Generator


    1
    ICS953009AF+ 1
    ADM1032AR uFBGA CPU ICS9P936AF
    page 5 400 pins
    page 11
    page 4,5

    FSB

    CRT CONN
    single channel
    North Bridge
    page 12
    DDR2-SO-DIMM X1
    DDRII 667MHz 1.8V BANK 0, 1, 2, 3
    LCD CONN LVDS VT 1637 VN 896
    page 10

    page 13 page 13
    Dual Channel
    951 pins

    PCI-E BUS page 6,7,8,9

    2 2

    Power USB conn


    V-Link page 25

    USB2.0
    10/100/1000 LAN Mini-Card USB conn x 2
    South Bridge
    page 25
    BCM5784/BCM5787 WLAN
    page 18
    Azalia
    PCI BUS VT 8237S RJ11 CONN
    page 19
    IDE MDC V1.5
    542 pins page 28 page 28
    SATA
    page 15,16,17
    RJ45 CONN Audio CKT TPA6041
    page 20 CardBus Controller AMP & Audio Jack
    AD1984AHD page 23
    page 24
    Ricoh R5C847
    page 21
    SPI ROM SSD_FM1024A10C5G
    page 28
    page 18
    3 3

    CardBus SD/MMC ODD CONN


    page 22 page 22
    page 18

    LPC BUS
    1.8" SATA CONN
    page 18

    LED TPM1.2 SMSC 1070


    page 28 SLB9635TT Docking CONN.
    page 25 page 27
    *RJ-45(LED*2)
    *CRT
    RTC CKT. *LINE IN
    page 15 Touch Pad Int.KBD *LINE OUT
    page 28 page 28 *USB x2
    *DC JACK
    4
    Power On/Off CKT. TrackPoint 4

    page 28 page 26
    page 28

    Security Classification Compal Secret Data Compal Electronics, Inc.


    DC/DC Interface CKT. Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    Block Diagram
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    www.vinafix.vn
    page 29 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 2 of 39
    A B C D E
    A

    Voltage Rails
    +B +5VALW +1.8V +5VS
    LDO3 +3VALW +3VS
    power
    Install below BOM structure for ver. 0.4
    plane LDO5 +1.5VALW +1.8VS
    +1.5VS
    +1.6VS_NB 45@ : means just put it in the BOM 0f 45 level.
    +CPU_CORE
    +VCCP HDD@ : means just build when 1.8" SATA HDD function enable. Remove before MP

    State
    +0.9VS DEBUG@ : means just build when PCIE port 80 CARD function enable. Remove before MP
    +VCCA
    1394@ : means just build when 1394 function enable. Remove before MP
    SSC@ : means just build when LVDS SS function enable. Reserve only
    S0 O O O O QW@ : means just build when dock CRT quick switch function enable.
    5787@ : means just build when 5787 function enable.
    S1
    O O O O
    S3
    O O O X
    O O Reserve below BOM structure for ver. 0.4
    S5 S4/AC
    X X
    @ : means just reserve , no build
    S5 S4/ Battery only
    O X X X
    CONN@ : means ME part.
    S5 S4/AC & Battery
    X X X X BT@ : means just build when BT function enable. Install at DB-1 only
    don't exist
    NOSSC@ : means just build when LVDS SS function disable.
    O MEANS ON X MEANS OFF NOQW@ : means just build when dock CRT quick switch function disable.
    PCI Devices 5784@ : means just build when 5784 function enable.

    1
    TPM@ : means just build when TPM function enable. Install at DB-2, SI-1 only 1

    SMBUS Control Table


    THERMAL CAP
    SOURCE BATT SENSOR SODIMM CLK CHIP MINI CARD LCD SENSOR
    (CPU)

    SMB_EC_CK1
    SMB_EC_DA1
    EC
    V X X X X X X
    Cap_CLK
    Cap_DAT
    EC X X X X X X V
    SB_SMCLK
    SB_SMDATA SB X V V V V X X
    LCD_CLK
    LCD_DAT NB X X X X X V X

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    Notes List

    www.vinafix.vn
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 3 of 39
    A
    5 4 3 2 1

    U1A
    6 HA[3:31]
    HA3 F3 A3# A20M# B9 H_A20M# 15 06/11
    HA4 H3 A8 FERR_CPU#
    HA5 A4# FERR# +3VL H_PWRGD
    J1 A5# INIT# A10 H_INIT# 15
    HA6 F2 B8 +VCCP
    A6# INTR H_INTR 15
    HA7 J2 C9 U38C

    14
    A7# NMI H_NMI 15
    HA8 K1 D9 BREQ1# R1 1 2 100_0402_5%
    A8# IGNNE# H_IGNNE# 15 D

    1
    HA9 G3 C10 BREQ2# R2 1 2 100_0402_5%
    H_SMI# 15

    P
    HA10
    A9# SMI# Q60 BREQ3# R3 100_0402_5%
    K3 A10# SLP# A11 H_CPUSLP# 6,15 15,21,27 SB_PWRGD 5 I O 6 2 1 2
    HA11 L2 B10 G 2N7002_SOT23 H_PSI# R4 1 2 51.1_0402_1%
    A11# STPCLK# H_STPCLK# 15

    G
    D HA12 L3 A18 S D
    A12# DPWR# DPWR# 6

    3
    HA13 J3 B1
    A13# ADS# ADS# 6

    7
    HA14 M3 D3
    A14# BNR# BNR# 6
    HA15 L1 A1
    A15# DBSY# DBSY# 6
    HA16 M1 A2
    A16# DEFER# DEFER# 6
    N2 A4 TC74LCX14FT_TSSOP14
    A17# DRDY# DRDY# 6
    N3 A18# HIT# B3 HIT# 6
    HA30 N1 C3
    A30# HITM# HITM# 6
    TRDY# B2 HTRDY# 6
    BPRI# C4 BPRI# 6
    C1 BREQ0#
    BREQ0# BREQ0# 6
    U1 BREQ1#
    BREQ1# BREQ2# +VCCP
    BREQ2# C5

    21X21 D5 BREQ3#
    BREQ3#
    LOCK# D4 HLOCK# 6
    H_STPCLK# R7 1 2 150_0402_5%
    H_INTR R8 150_0402_5%
    NANO BGA REQ0# D1 HREQ0# 6 1 2
    D2 H_IGNNE# R9 1 2 150_0402_5%
    REQ1# HREQ1# 6
    F1 H_A20M# R10 1 2 150_0402_5%
    REQ2# HREQ2# 6
    H_SMI# R12 1 2 150_0402_5%
    H_CPUSLP# R13 1 2 150_0402_5%
    HD0 A20 B4 H_INIT# R14 1 2 150_0402_5%
    6 HD[0:63] D0# RS0# RS0# 6
    HD1 F18 A3 06/06 VIA H_NMI R15 1 2 150_0402_5%
    D1# RS1# RS1# 6
    HD2 D18 E3 PROCHOT# R16 1 2 150_0402_5%
    D2# RS2# RS2# 6
    HD3 C19 H_DPSLP# R17 1 2 150_0402_5%
    D3# CPU_BSEL0 R18
    HD4 E18 D4# ASTBN0# G1 HA_STB0N# 6 1 2@ 150_0402_5%
    HD5 H20 G2 CPU_BSEL1 R20 1 2@ 150_0402_5%
    D5# ASTBP0# HA_STB0P# 6
    C HD6 C20 C
    HD7 D6#
    C18 D7#
    HD8 B19 E19
    D8# DSTBP0# HD_STBP0# 6
    HD9 E20 F19 +VCCP
    D9# DSTBN0# HD_STBN0# 6
    HD10 G20 U20
    D10# DSTBP1# HD_STBP1# 6
    HD11 G18 T20
    D11# DSTBN1# HD_STBN1# 6
    HD12 J18 W15 FERR_CPU# 1 2
    D12# DSTBP2# HD_STBP2# 6
    HD13 D20 V15 R21
    D13# DSTBN2# HD_STBN2# 6
    HD14 F20 Y6 51.1_0402_1%
    D14# DSTBP3# HD_STBP3# 6
    HD15 H18 D15# DSTBN3# Y5 HD_STBN3# 6 06/23 BIOS
    HD16 L19 TRIP_CPU# 1 2
    HD17 D16# R23
    L18 D17# BCLK A14 CLK_BCLK 11
    HD18 U19 A13 51.1_0402_1%
    D18# BCLK# CLK_BCLK# 11
    HD19 V19 PROCHOT# 3 1 H_PROCHOT#
    D19# H_PROCHOT# 16
    HD20 M20 C14 CPU_BSEL0 Q1
    HD21
    D20# BSEL0 CPU_BSEL1 @ MMBT3904_SOT23
    K19 D21# BSEL1 D14
    HD22 K20 D22#

    2
    HD23 N20 C13 1 2
    D23# RESET# H_RST# 6 +VCCP
    HD24 R19 C8 H_PWRGD R24 @ 10K_0402_5%
    HD25 D24# PWRGD +VCCP
    P19 D25#
    HD26 P18 D26# BREQ0# R25
    HD27 U18 D27# 1 2 200_0402_5%
    HD28 W20 H_PWRGD R26 1 2 51.1_0402_1%
    D28# H_RST# R27
    HD29 M19 D29# PSI# C7 H_PSI# 35 1 2@ 51.1_0402_1%
    HD30 T18
    HD31 D30# CPU_COMP0 The resistors need to place within
    R20 D31# COMP0 H17
    HD32 Y12 200mil of the processor. TRIP_CPU# 3 1
    D32# H_THERMTRIP# 16
    HD33 V13 T3 CPU_COMP2 Q2
    HD34 D33# COMP2 MMBT3904_NL_NPN_SOT23
    B Y17 D34# MPI U5 B
    HD35 W17 D35#

    2
    HD36 V16 C17
    D36# THERMDA H_THERMDA 5
    HD37 Y19 A17 1 2
    D37# THERMDC H_THERMDC 5 +VCCP
    HD38 W18 A16 TRIP_CPU# R29 10K_0402_5%
    HD39
    D38# THERMTRIP# PROCHOT#
    V18 D39# PROCHOT# B18
    HD40 W12 CPU_COMP2 R34 1 2 27.4_0402_1%
    HD41
    D40# DPB0 T1 PAD +3VS TCK R35 47_0402_5%
    Y14 D41# DP0# J20 1 2
    HD42 Y13 R18 DPB1 T2 PAD TRST# R36 1 2 680_0402_5%
    HD43
    D42# DP1# DPB2 T3 PAD R39 CPU_COMP0 R37 27.4_0402_1%
    Y16 D43# DP2# V11 1 2

    1
    HD44 W14 Y10 DPB3 T4 PAD
    HD45 D44# DP3# 10K_0402_5%
    Y11 D45#
    HD46 V12 B11
    D46# DPSLP# H_DPSLP# 15
    HD47 V14
    HD48
    D47# TDI FERR_CPU#
    W10 D48# TDI C15 3 1 FERR# 15

    2
    HD49 Y8 A15 TDO Q3
    HD50 D49# TDO TMS MMBT3904_NL_NPN_SOT23 +VCCP
    V10 D50# TMS B15
    HD51 W4 B16 TRST#
    D51# TRST#

    2
    HD52 W7 C16 TCK +VCCP
    HD53
    D52# TCK
    Y9 D53# 1 2
    HD54 W8 B7 R42 10K_0402_5%
    D54# VID0 CPU_VID0 35
    HD55 W5 C6 TDI R40 1 2 150_0402_5%
    D55# VID1 CPU_VID1 35
    HD56 V6 A7 TDO R41 1 2 150_0402_5%
    D56# VID2 CPU_VID2 35
    HD57 V9 B6 TMS R43 1 2 47_0402_5%
    D57# VID3 CPU_VID3 35
    HD58 V3 A6
    D58# VID4 CPU_VID4 35
    HD59 Y3 A5
    D59# VID5 CPU_VID5 35
    HD60 Y4
    HD61 D60# DBI3#
    V7 D61# DINV3# V5 DBI3# 6
    HD62 V4 V17 DBI2#
    A D62# DINV2# DBI2# 6 A
    HD63 V8 N18 DBI1#
    D63# DINV1# DBI1# 6
    H19 DBI0#
    DINV0# DBI0# 6

    ZZZ1 C7-M ULV 3.5W 1G/400_NANOBGA2-400 Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    CPU PART1
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    C LA-3941P 0.4

    www.vinafix.vn
    PCB 03B LA-3941P REV0 M/B MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 4 of 39

    5 4 3 2 1
    5 4 3 2 1

    +CPU_CORE +VCCP

    M15

    M13

    M11
    G16

    G14

    G12

    G10

    G17
    N16
    R16

    H15

    N14
    R14

    H13

    N12
    R12

    H11

    N10
    R10

    R17
    U17

    U14
    U11

    D12
    D16
    U13
    K15

    P15

    E14

    K13

    P13

    K11

    P11

    E10

    E16

    E12

    K17
    F15

    T15

    F13

    T13

    F11

    T11
    L16

    L14

    L12

    L10

    L17
    J16

    J14

    J12

    J10

    W2
    M9

    M7

    M5
    G8

    G6

    G4
    H9

    N8
    R8

    H7

    N6
    R6
    H5

    U8

    R4

    D8

    U9
    K9

    P9

    K7

    P7

    E6

    K5

    V1
    V2
    E8

    P5
    F9

    T9

    F7

    T7

    T5

    F5
    L8

    L6

    L4
    J8

    J6
    D U1B D
    F16 P1
    VCC_CORE1
    VCC_CORE2
    VCC_CORE3
    VCC_CORE4
    VCC_CORE5
    VCC_CORE6
    VCC_CORE7
    VCC_CORE8
    VCC_CORE9
    VCC_CORE10
    VCC_CORE11
    VCC_CORE12
    VCC_CORE13
    VCC_CORE14
    VCC_CORE15
    VCC_CORE16
    VCC_CORE17
    VCC_CORE18
    VCC_CORE19
    VCC_CORE20
    VCC_CORE21
    VCC_CORE22
    VCC_CORE23
    VCC_CORE24
    VCC_CORE25
    VCC_CORE26
    VCC_CORE27
    VCC_CORE28
    VCC_CORE29
    VCC_CORE30
    VCC_CORE31
    VCC_CORE32
    VCC_CORE33
    VCC_CORE34
    VCC_CORE35
    VCC_CORE36
    VCC_CORE37
    VCC_CORE38
    VCC_CORE39
    VCC_CORE40
    VCC_CORE41
    VCC_CORE42
    VCC_CORE43
    VCC_CORE44
    VCC_CORE45
    VCC_CORE46
    VCC_CORE47
    VCC_CORE48
    VCC_CORE49
    VCC_CORE50
    VCC_CORE51
    VCC_CORE52
    VCC_CORE53
    VCC_CORE54
    VCC_CORE55
    VCC_CORE56
    VCC_CORE57
    VCC_CORE58
    VCC_CORE59
    VCC_CORE60
    VCC_CORE61
    VCC_CORE62
    VCC_CORE63
    VCC_CORE64
    VCC_CORE65
    VCC_CORE66

    VCCP1
    VCCP2
    VCCP3
    VCCP4
    VCCP5
    VCCP6
    VCCP7
    VCCP8
    VCCP9
    VCCP10
    VCCP11
    VCCP12
    VCCP13
    VCCP14
    VCCP15
    VCCP16
    VCCP17
    VCCP18
    VCCP19
    VCCP20
    VCCP21
    VCCP22
    VCCP23
    VCCP24
    VCCP25
    GND CF0
    H16 GND CF1 R1
    K16 GND CF2 T1
    M16 GND CF3 P2
    P16 GND CF4 R2
    T16 GND CF5 T2
    U16 GND CF6 P3
    W16 GND CF7 R3
    E15 GND CF8 P4
    G15 GND
    J15 GND BEVO0 B12
    L15 GND BEVO1 C12 06/06 VIA
    N15 GND BEVO2 C11
    R15 GND BEVO3 D11
    U15 GND
    Y15 GND

    21X21
    F14 F17 CPUVCCA0
    GND VCCA0
    H14 GND
    K14 A9 CPUVCCA1
    GND VCCA1

    NANO BGA
    M14 GND
    P14 GND
    T14 GND VCCSENSE U3 CPU_VCC_SENSE 35
    D15 GND VSSSENSE U4 CPU_VSS_SENSE 35
    E13 GND
    G13 E1 T5 PAD
    GND RSVD1 T6 PAD
    J13 GND RSVD2 B5
    L13 N4 T7 PAD
    GND RSVD3 T8 PAD
    C N13 GND RSVD4 B17 C
    R13 Y20 T9 PAD
    GND RSVD5 T10 PAD
    W13 GND RSVD6 U2
    B14 W1 T11 PAD
    GND RSVD7 T12 PAD
    F12 GND RSVD8 Y1
    H12 GND
    K12 +VCCP
    GND
    M12
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND C623 1
    P12 GND 2 220U_D_4VM

    +
    C7-M ULV 3.5W 1G/400_NANOBGA2-400 C1 1 2 0.01U_0402_16V7K
    T12
    U12
    B13
    D13
    E11
    G11
    J11
    L11
    N11
    R11
    W11
    A12
    F10
    H10
    K10
    M10
    P10
    T10
    U10
    E9
    G9
    J9
    L9
    N9
    R9
    W9
    D10
    F8
    H8
    K8
    M8
    P8
    T8
    E7
    G7
    J7
    L7
    N7
    R7
    U7
    Y7
    F6
    H6
    K6
    M6
    P6
    T6
    U6
    W6
    E5
    G5
    J5
    L5
    N5
    R5
    D7
    E4
    F4
    H4
    J4
    K4
    M4
    T4
    M2
    D6
    W3
    K2
    H2
    E2
    C2
    H1
    Y2
    B20
    L20
    P20
    V20
    D19
    G19
    J19
    N19
    T19
    W19
    K18
    M18
    Y18
    A19
    D17
    E17
    J17
    M17
    N17
    P17
    T17
    +CPU_CORE C2 1 2 0.01U_0402_16V7K
    C3 2 1 22U_0805_6.3V6M
    C4 1 2 0.01U_0402_16V7K
    C5 2 1 22U_0805_6.3V6M
    C7 1 2 0.01U_0402_16V7K
    C6 2 1 22U_0805_6.3V6M
    C10 1 2 0.01U_0402_16V7K
    +1.5VS C8 2 1 10U_0805_10V4Z
    C13 1 2 0.01U_0402_16V7K
    C9 2 1 10U_0805_10V4Z
    1 1 +CPU_CORE C16 1 2 0.01U_0402_16V7K
    C18 C19 C11 2 1 10U_0805_10V4Z
    C20 1 2 0.01U_0402_16V7K C22 1 2 0.01U_0402_16V7K
    1000P_0402_50V7K C23 1 2 0.01U_0402_16V7K C14 2 1 10U_0805_10V4Z
    2 2 C25 1 0.01U_0402_16V7K C27 1
    2 2 0.01U_0402_16V7K
    C30 1 2 0.01U_0402_16V7K C17 2 1 10U_0805_10V4Z
    4.7U_0805_10V4Z C32 1 2 0.01U_0402_16V7K C34 1 2 0.01U_0402_16V7K
    B B
    C24 2 1 10U_0805_10V4Z
    C36 1 2 0.01U_0402_16V7K C38 1 2 0.01U_0402_16V7K
    C39 1 2 0.01U_0402_16V7K C31 2 1 10U_0805_10V4Z
    C41 1 2 0.01U_0402_16V7K C43 1 2 0.01U_0402_16V7K
    C44 1 2 0.01U_0402_16V7K C35 2 1 10U_0805_10V4Z
    C46 1 2 0.01U_0402_16V7K C48 2 1 22U_0805_6.3V6M
    10U_0805_10V4Z L1 C40 2 1 10U_0805_10V4Z
    CPUVCCA0 2 2 1 2 C50 1 2 0.01U_0402_16V7K C52 2 1 22U_0805_6.3V6M
    +1.5VS
    C55 FBMA-L10-160808-121LMT 0603 C53 1 2 0.01U_0402_16V7K C45 2 1 10U_0805_10V4Z
    CPUVCCA1 C56 C57 1 2 0.01U_0402_16V7K C59 2 1 22U_0805_6.3V6M

    Thermal Sensor ADM1032 10U_0805_10V4Z C60 1 2 0.01U_0402_16V7K C49 2 1 10U_0805_10V4Z


    1 1 C62 1 0.01U_0402_16V7K
    2
    C54 2 1 10U_0805_10V4Z
    L2
    +3VS 1 2 C61 2 1 10U_0805_10V4Z
    +1.5VS
    2 2 FBMA-L10-160808-121LMT 0603
    C64 C63 2 1 10U_0805_10V4Z
    2 C65
    1

    C66 10U_0805_10V4Z
    R55 1 1
    06/20
    0.1U_0402_16V4Z @ 10K_0402_5% 10U_0805_10V4Z
    1 +CPU_CORE
    U3
    2

    1 8 SB_SMCLK C624 1 2 330U_D2_2.5VM_R15

    +
    VDD SCLK SB_SMCLK 10,11,16,18
    H_THERMDA 2 7 SB_SMDATA C625 1 2 330U_D2_2.5VM_R15

    +
    C70 D+ SDATA SB_SMDATA 10,11,16,18
    1 2 H_THERMDC 3 6 C626 1 2 330U_D2_2.5VM_R15

    +
    A D- ALERT# EC_THERM# 16 A
    2200P_0402_50V THERM# 4 5
    THERM# GND
    R58
    +3VS 1 2 ADM1032ARMZ-2REEL MSOP8

    10K_0402_5% Address:1001_101 Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    H_THERMDA 4 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    CPU PART2
    Size Document Number Rev
    H_THERMDC 4 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    C LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 5 of 39
    5 4 3 2 1
    A B C D E

    +VCCP

    Close to NB

    G17
    G18
    G19
    G20
    G21
    C17
    C18
    C19
    C20
    C21
    D17
    D18
    D19
    D20
    D21
    A17
    A18
    A19
    A20
    A21
    B17
    B18
    B19
    B20
    B21

    E17
    E18
    E19
    E20
    E21
    F17
    F18
    F19
    F20
    F21
    U4A R59
    B35 HD0 +VCCP 1 2 GTLVREF_NB
    HD[0:63] 4

    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    HA3 HD00# HD1 49.9_0402_1%
    4 HA[3:31] M33 HA03# HD01# A36

    1
    HA4 N34 C33 HD2
    HA5 HA04# HD02# HD3 R60
    R33 HA05# HD03# C32
    HA6 T33 E31 HD4 100_0402_1%
    4 HA7 HA06# HD04# HD5 4
    R34 HA07# HD05# B34
    HA8 P36 B33 HD6
    HA08# HD06#

    2
    HA9 P34 A34 HD7
    HA10 HA09# HD07# HD8
    N35 HA10# HD08# D30
    HA11 R36 A30 HD9
    HA12 HA11# HD09# HD10
    U36 HA12# HD10# B31
    HA13 U34 B30 HD11 +VCCP
    HA14 HA13# HD11# HD12 C71
    U35 HA14# HD12# E30
    HA15 T30 C29 HD13 1 2

    +
    HA16 HA15# HD13# HD14 47uF_6.3V_1.3_H1.9
    U32 HA16# HD14# B29
    HA17 W35 C30 HD15 C72
    HA18 HA17# HD15# HD16
    V32 D36 1 2

    +
    HA19 HA18# HD16# HD17 47uF_6.3V_1.3_H1.9
    V36 HA19# HD17# F36
    HA20 V34 G36 HD18
    HA21 HA20# HD18# HD19 NEED CLOSEST N.B
    W36 HA21# HD19# H34
    HA22 W34 H35 HD20
    HA23 HA22# HD20# HD21
    AA36 HA23# HD21# F35
    HA24 V33 G35 HD22
    HA25 HA24# HD22# HD23
    AA34 HA25# HD23# C36
    HA26 Y35 D35 HD24
    HA27 HA26# HD24# HD25 +VCCP
    Y33 HA27# HD25# F34 C73
    HA28 AA32 F33 HD26
    HA29 HA28# HD26# HD27
    W32 HA29# HD27# G34 1 2
    HA30 V31 G33 HD28 10U_0805_10V4Z
    HA30# HD28# C74
    HA31 W31 E33 HD29
    HA31# HD29# HD30
    HD30# H32 1 2
    G32 HD31 10U_0805_10V4Z
    HD31# C75
    E28 HD32
    HD32# HD33
    3
    HD33# E29 1 2 3
    D28 HD34 10U_0805_10V4Z
    HD34# HD35
    4 HA_STB0P# R35 HADSTB0P# HD35# D27
    W33 C28 HD36
    HADSTB1# HD36# HD37
    HD37# H28
    L35 G28 HD38
    4 ADS# HADS# HD38#
    K35 F28 HD39 +VCCP
    4 BNR# HBNR# HD39#
    J32 E27 HD40
    4 BPRI# HBPRI# HD40#
    M34 D26 HD41
    4 BREQ0# HBREQ0# HD41#
    4 DBSY# K32 HDBSY# HD42# D25 HD42 1 2 C76
    J33 E25 HD43 2.2U_0805_16V4Z
    4 DEFER# HDEFER# HD43#
    K33 F25 HD44
    4 DRDY# HDRDY# HD44#
    4 HIT# L36 HHIT# HD45# G25 HD45 1 2 C77
    L34 H26 HD46 0.01U_0402_16V7K
    4 HITM# HHITM# HD46#
    J34 H25 HD47
    4 HLOCK# HLOCK# HD47#
    4 HTRDY# M35 HTRDY# HD48# B23 HD48 1 2 C78
    B25 HD49 0.01U_0402_16V7K
    HD49# HD50
    4 HREQ0# T32 HREQ0# HD50# E23
    4 HREQ1# T31 HREQ1# HD51# B27 HD51 1 2 C79
    R32 B28 HD52 0.01U_0402_16V7K
    4 HREQ2# HREQ2# HD52#
    PAD T13 M32 A28 HD53
    PAD T14 HREQ3# HD53#
    M31 HREQ4# HD54# B24 HD54 1 2 C80
    J35 B26 HD55 0.01U_0402_16V7K
    4 RS0# HRS0# HD55#
    N36 A26 HD56
    4 RS1# HRS1# HD56#
    4 RS2# J36 HRS2# HD57# C23 HD57 1 2 C81
    C22 HD58 0.01U_0402_16V7K
    DBI0# HD58# HD59
    4 DBI0# C31 HDBI0# HD59# A23
    DBI1# E35 G23 HD60 1 2 C82
    4 DBI1# HDBI1# HD60#
    DBI2# G27 A24 HD61 0.01U_0402_16V7K
    2 4 DBI2# HDBI2# HD61# 2
    DBI3# D22 B22 HD62
    4 DBI3# HDBI3# HD62#
    HD63# E22 HD63 1 2 C83
    F22 0.1U_0402_16V4Z
    4 H_RST# CPURST#
    HDSTB0P# A32 HD_STBP0# 4
    11 CLK_NB_BCLK AC29 HCLK+ HDSTB0N# B32 HD_STBN0# 4
    AC30 +VCCP
    11 CLK_NB_BCLK# HCLK-
    HDSTB1P# C35 HD_STBP1# 4
    HDSTB1N# C34 HD_STBN1# 4 1 2 C84
    0.1U_0402_16V4Z
    0.01U_0402_16V7K 0.01U_0402_16V7K GTLVREF_NB U30 G26
    HGTLVREF0 HDSTB2P# HD_STBP2# 4
    C86 C87 C88 J25 E26 1 2 C85
    HGTLVREF1 HDSTB2N# HD_STBN2# 4
    1

    1000P_0402_50V7K
    180_0402_1% C24
    HDSTB3P# HD_STBP3# 4
    1 R61 2 GTLCOMPP G22 HGTLCOMPP HDSTB3N# C25 HD_STBN3# 4 1 2 C89
    2

    1 2 GTLCOMPN H22 HGTLCOMPN


    1000P_0402_50V7K
    0.01U_0402_16V7K +VCCP R62
    360_0402_1% T35
    HADSTB0N# HA_STB0N# 4

    Close to NB CPUSLPIN# AB32 H_CPUSLP# 4,15

    HDPWR# L31 DPWR# 4


    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND

    CN896_HSBGA951
    A1
    A2
    A3
    A8
    A10
    A22
    A25
    A27
    A29
    A31
    A33
    A35
    B2
    B3
    B4
    B36
    C2
    C3
    C4
    C5
    C26
    C27
    D3
    D4
    D5
    D6
    D8
    D11
    D23
    D24
    D29
    D31
    D32
    D34
    E2
    E4
    E5
    E6

    1 1

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HOST
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    C LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 6 of 39
    A B C D E
    A B C D E

    +1.8V +1.8V +1.8V


    0.1U_0402_16V4Z 1U_0603_10V4Z
    2 1 1 1 2 C90 1 2 C91
    1U_0603_10V4Z 0.01U_0402_16V7K
    C92 C93 C94
    1 2 C95 1 2 C96
    1 2 2 0.1U_0402_16V4Z 0.01U_0402_16V7K

    AM25
    AM27
    AM29
    AM31
    1U_0603_10V4Z 2 C97 2 C98

    AC24
    AD16
    AD17
    AD18
    AD19
    AD20
    AD21
    AD22
    AD23
    AD24

    AN26
    AN27
    AN31
    AN33

    AR26
    AR33
    AA24
    AB24

    AK25
    AK27
    AK29

    AP30

    AT25
    AT28
    AT31
    AT35
    1 1

    AL26
    AL28
    AL30
    AJ26
    AJ28
    0.1U_0402_16V4Z 0.01U_0402_16V7K
    U4B
    10 DDR_A_D[0..63] DDR_A_D0 AF35 1 2 C99 1 2 C100

    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    VCCMEM
    4 DDR_A_D1 MD00 0.1U_0402_16V4Z 1U_0603_10V4Z 4
    AG34 MD01
    DDR_A_D2
    DDR_A_D3
    AJ36
    AK35
    MD02 MBA0 AR28
    AP29
    DDR_A_BS0 10 NEAR NB
    MD03 MBA1 DDR_A_BS1 10
    DDR_A_D4 AF34 AP33
    MD04 MBA2 DDR_A_BS2 10
    DDR_A_D5 AG35 AT29 DDR_A_MA0
    MD05 MA00 DDR_A_MA[0..13] 10
    DDR_A_D6 AJ34 AR30 DDR_A_MA1
    DDR_A_D7 MD06 MA01 DDR_A_MA2
    AK34 MD07 MA02 AR29
    DDR_A_D8 AG32 AT30 DDR_A_MA3
    DDR_A_D9 MD08 MA03 DDR_A_MA4 +1.8V R63
    AF32 MD09 MA04 AN30
    DDR_A_D10 AH30 AP31 DDR_A_MA5 DMCOMP 1 2
    DDR_A_D11 MD10 MA05 DDR_A_MA6 301_0402_1%
    AJ31 MD11 MA06 AR31
    DDR_A_D12 AF31 AT32 DDR_A_MA7

    10U_0805_10V4Z
    4.7U_0805_10V4Z

    4.7U_0805_10V4Z

    4.7U_0805_10V4Z
    MD12 MA07 1 1 1 1
    DDR_A_D13 AH32 AP32 DDR_A_MA8 C101 C102 C103 C104
    DDR_A_D14 MD13 MA08 DDR_A_MA9
    AH31 MD14 MA09 AN32
    DDR_A_D15 AJ32 AN29 DDR_A_MA10
    DDR_A_D16 MD15 MA10 DDR_A_MA11 2 2 2 2
    AK33 MD16 MA11 AR32
    DDR_A_D17 AL36 AT33 DDR_A_MA12
    DDR_A_D18 MD17 MA12 DDR_A_MA13
    AP35 MD18 MA13 AR25 MEMDET= 1: DDR2
    DDR_A_D19 AL34
    DDR_A_D20 MD19 +1.8V
    AL35 MD20 MSRAS# AN28 DDR_A_RAS# 10
    DDR_A_D21 AM35 AR27 R64
    MD21 MSCAS# DDR_A_CAS# 10
    DDR_A_D22 AT36 AP28 MEMDET 1 2
    MD22 MSWE# DDR_A_WE# 10
    DDR_A_D23 AM34 1K_0402_1%
    DDR_A_D24 MD23
    AK24 MD24 MCS0# AT27 DDR_CS0_DIMMA# 10
    DDR_A_D25 AL23 AP27
    MD25 MCS1# DDR_CS1_DIMMA# 10
    DDR_A_D26 AM24 AT24
    DDR_A_D27 MD26 MCS2# C105 5P_0402_50VC DDR_A_MA0
    AJ22 MD27 MCS3# AP26 1 2
    DDR_A_D28 AK23 C106 1 2 5P_0402_50VC DDR_A_MA1
    DDR_A_D29 MD28 C107 5P_0402_50VC DDR_A_MA2
    3 AN24 MD29 MCKE0 AT34 DDR_CKE0_DIMMA 10 1 2 3
    DDR_A_D30 AM23 AP34 C108 1 2 5P_0402_50VC DDR_A_MA3
    MD30 MCKE1 DDR_CKE1_DIMMA 10
    DDR_A_D31 AM22 AR34 C109 1 2 5P_0402_50VC DDR_A_MA4
    DDR_A_D32 MD31 MCKE2 C110 5P_0402_50VC DDR_A_MA5
    AK20 MD32 MCKE3 AN34 1 2
    DDR_A_D33 AK19 C111 1 2 5P_0402_50VC DDR_A_MA6
    DDR_A_D34 MD33 C112 5P_0402_50VC DDR_A_MA7
    AM19 MD34 MODT0 AT26 M_ODT0 10 1 2
    DDR_A_D35 AR18 AP25 C113 1 2 5P_0402_50VC DDR_A_MA8
    MD35 MODT1 M_ODT1 10
    DDR_A_D36 AL20 AR24 C114 1 2 5P_0402_50VC DDR_A_MA9
    DDR_A_D37 MD36 MODT2 C115 5P_0402_50VC DDR_A_MA10
    AM20 MD37 MODT3 AN25 1 2
    DDR_A_D38 AL18 C116 1 2 5P_0402_50VC DDR_A_MA11
    DDR_A_D39 MD38 C117 5P_0402_50VC DDR_A_MA12
    AM18 MD39 1 2
    DDR_A_D40 AR17 AJ35 C118 1 2 5P_0402_50VC DDR_A_MA13
    MD40 MDQS0+ DDR_A_DQS0 10
    DDR_A_D41 AT16 AH35 C119 1 2 5P_0402_50VC DDR_A_BS0
    MD41 MDQS0- DDR_A_DQS#0 10
    DDR_A_D42 AN16 AH33 C120 1 2 5P_0402_50VC DDR_A_BS1
    MD42 MDQS1+ DDR_A_DQS1 10
    DDR_A_D43 AN15 AH34 C121 1 2 5P_0402_50VC DDR_A_BS2
    MD43 MDQS1- DDR_A_DQS#1 10
    DDR_A_D44 AM17 AR36 C122 1 2 5P_0402_50VC DDR_A_RAS#
    MD44 MDQS2+ DDR_A_DQS2 10
    DDR_A_D45 AP17 AP36 C123 1 2 5P_0402_50VC DDR_A_CAS#
    MD45 MDQS2- DDR_A_DQS#2 10
    DDR_A_D46 AM16 AR22 C124 1 2 5P_0402_50VC DDR_A_WE#
    MD46 MDQS3+ DDR_A_DQS3 10
    DDR_A_D47 AM15 AP23
    MD47 MDQS3- DDR_A_DQS#3 10
    DDR_A_D48 AN22 AP18
    MD48 MDQS4+ DDR_A_DQS4 10
    DDR_A_D49 AN21 AN18
    MD49 MDQS4- DDR_A_DQS#4 10
    DDR_A_D50 AP19 AP15
    MD50 MDQS5+ DDR_A_DQS5 10
    DDR_A_D51 AT18 AR15 PULL DOWN GND OR PULL UP +1.8VDIMM
    MD51 MDQS5- DDR_A_DQS#5 10
    DDR_A_D52
    DDR_A_D53
    AT21
    AR21
    MD52
    MD53
    MDQS6+
    MDQS6-
    AP20
    AR20
    DDR_A_DQS6
    DDR_A_DQS#6
    10
    10
    CLOSE TO SODIMM
    DDR_A_D54 AT19 AR12
    MD54 MDQS7+ DDR_A_DQS7 10
    DDR_A_D55 AR19 AR13
    MD55 MDQS7- DDR_A_DQS#7 10
    DDR_A_D56 AR14
    DDR_A_D57 MD56
    2 AM14 MD57 2
    DDR_A_D58 AP13 AB34 MCLKIT
    MD58 MCLKI MCLKIT 11
    DDR_A_D59 AR11
    DDR_A_D60 MD59
    AP14 MD60
    DDR_A_D61 AN14 AB35 M_CLKO+ R65 1 2 22_0402_5%
    MD61 MCLKO+ MCLKOT 11
    DDR_A_D62 AT12 AB36 M_CLKO- R66 1 2 22_0402_5%
    MD62 MCLKO- MCLKOC 11
    DDR_A_D63 AP12 +1.8V
    MD63 MVREF_NB
    MEMVREF0 AG29
    10 DDR_A_DM0 AH36 MDQM0# MEMVREF1 AJ18

    1
    10
    10
    DDR_A_DM1
    DDR_A_DM2
    AF30
    AN36
    MDQM1#
    MDQM2#
    MCLKOT/C as short as passable R67
    10
    10
    DDR_A_DM3
    DDR_A_DM4
    AN23
    AN20
    MDQM3#
    MDQM4#
    MCLKIT = DCLKx + 2 " 150_0402_1%

    AT15 AF36 MEMDET


    10 DDR_A_DM5 MDQM5# MEMDET

    2
    10 DDR_A_DM6 AP21 MDQM6#
    AT13 MVREF_NB C126 C127 C128 C129
    10 DDR_A_DM7 MDQM7#
    DMCOMP

    1000P_0402_50V7K

    1000P_0402_50V7K

    1000P_0402_50V7K

    1000P_0402_50V7K
    MEMCOMP AM33 1 1 1 1

    1
    R68
    150_0402_1%
    2 2 2 2

    2
    1 1
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND

    CN896_HSBGA951
    E7
    E9
    E34
    E36
    F1
    F2
    F4
    F5
    F6
    F7
    F10
    F14
    F23
    F24
    F26
    F27
    F29
    F30
    F32
    G1
    G2
    G4
    G7
    G11
    G29
    H2
    H4
    H7
    H23
    H24
    H27
    H31
    H33
    H36
    J2
    J4
    J5
    J6
    J7

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DRAM
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    C LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 7 of 39
    A B C D E
    A B C D E

    +3VS

    1.6V x 536/(1240+536) = 0.482V


    LVREF_NB= 0.45V FOR VT8237S

    AC13
    AA13
    AB13
    W13

    AK1
    AK2
    AK3
    AK4
    AK5
    AK6
    AK7
    N13
    N14

    R13

    U13
    P13

    V13

    Y13
    T13

    AJ1
    AJ2
    AJ3
    AJ4
    AJ5
    AJ6
    AJ7
    U4C 08/15 HP

    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    VCC33PEX
    C185 +1.6VS_NB
    VLAD0 AP1 B1 PCIE_WLAN_TX_P1 1 2 0.1U_0402_16V4Z
    15 VLAD0 VD00 PEXTX00+ PCIE_TXP1 19
    VLAD1 AN3 C1 PCIE_WLAN_TX_N1 1 2 0.1U_0402_16V4Z
    15 VLAD1 VD01 PEXTX00- PCIE_TXN1 19

    1
    VLAD2 AT3 D1 C186
    15 VLAD2 VLAD3 VD02 PEXTX01+ R185
    15 VLAD3 AR4 VD03 PEXTX01- E1
    4 VLAD4 AN2 H1 1.24K_0402_1% 4
    15 VLAD4 VLAD5 VD04 PEXTX02+
    15 VLAD5 AN1 VD05 PEXTX02- J1
    VLAD6 AP5 K1 +3VS +3VS
    15 VLAD6 VD06 PEXTX03+

    2
    VLAD7 AN5 L1 +3VS VLREF_NB
    15 VLAD7 VD07 PEXTX03-
    PEXTX04+ L4

    1
    PEXTX04- M4 1

    2
    AN4 M1 L3 L5 R186
    15 VBE# VBE# PEXTX05+ L4 536_0402_1% C284
    PEXTX05- N1
    N4 FBMA-L10-160808-121LMT 0603 0.1U_0402_16V4Z
    PEXTX06+ FBMA-L10-160808-121LMT 0603 FBMA-L10-160808-121LMT 0603 2
    15 UPSTB AT2 VUPSTB+ PEXTX06- P4

    2
    15 UPSTB# AR3 VUPSTB- PEXTX07+ P1

    1
    R1 VCCA33PE VCCA33HCK
    PEXTX07-

    1
    VCCA33PE00

    1000P_0402_50V7K

    1000P_0402_50V7K

    22U_0805_6.3V6M
    AR1 T1

    1U_0603_10V4Z

    @ 10U_0805_10V4Z

    1U_0603_10V4Z
    15 DNSTB VDNSTB+ PEXTX08+

    1000P_0402_50V7K
    AT1 U1

    1U_0603_10V4Z

    @ 10U_0805_10V4Z
    15 DNSTB# VDNSTB- PEXTX08- 1 1 1 1 1 1
    U4 C130 C131 1 1 1 C134 C135 C611
    UPCMD PEXTX09+ C627 C132 C133
    15 UPCMD AR5 VUPCMD PEXTX09- V4
    DNCMD AP4 V1 C628
    15 DNCMD VDNCMD PEXTX10+ 2 2 2 2 2 2
    PEXTX10- W1
    270_0402_1% VLREF_NB 2 2 2
    AL6 VLVREF PEXTX11+ W4
    R71 1 2 LCOMPP AM5 Y4
    R72 LCOMPN VLCOMPP PEXTX11-
    1 2 AL5 VLCOMPN PEXTX12+ Y1
    340_0402_1% AA1
    PEXTX12-
    11 VCLK_NB AL4 VCLK PEXTX13+ AB1
    AC1 +3VS +3VS
    PEXTX13- +3VS +3VS
    AD13 VCC15VL PEXTX14+ AC4
    AD14 VCC15VL PEXTX14- AD4
    AD15 AD1 C137 C138 C139 C140
    VCC15VL PEXTX15+

    2
    M12 AE1

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    4.7U_0805_10V4Z

    4.7U_0805_10V4Z
    VCC15 PEXTX15- 1 1

    1
    3 +1.6VS_NB M13 L6 L7 3
    VCC15 L8
    M14 VCC15 PEXRX00+/DVP0D11 E3 PCIE_RXP1 19 FBMA-L10-160808-121LMT 0603
    M15 VCC15 PEXRX00-/DVP0D10 D2 PCIE_RXN1 19 FBMA-L10-160808-121LMT 0603
    2 2

    2
    +3VS M16 F3 FBMA-L10-160808-121LMT 0603
    VCC15 PEXRX01+/DVP0D09
    M20 VCC15 PEXRX01-/DVP0D08 G3 08/15 HP

    1
    C153 C154 C155 M21 H3 VCCA33PE1 VCCA33PE01
    VCC15 PEXRX02+/DVP0D07

    1
    VCCA33MCK

    1000P_0402_50V7K

    1000P_0402_50V7K
    M22 J3

    1U_0603_10V4Z

    @ 10U_0805_10V4Z

    1U_0603_10V4Z

    @ 10U_0805_10V4Z
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    1 1 1 VCC15 PEXRX02-/DVP0D06

    1000P_0402_50V7K

    22U_0805_6.3V6M
    M23 K3

    1U_0603_10V4Z
    VCC15 PEXRX03+/DVP0CLK 1 1 1 1 1 1
    M24 L3 C141 C142 C143 C144 1 1 1
    VCC15 PEXRX03-/DVPTVCLKR C629 C630 C145 C146 C612
    N12 VCC15 PEXRX04+/DVP0D05 K6
    2 2 2
    N25 VCC15 PEXRX04-/DVP0D04 L6
    2 2 2 2 2 2 +3VS
    P12 VCC15 PEXRX05+/DVP0D03 M3
    2 2 2
    P25 VCC15 PEXRX05-/DVP0D02 N3
    R12 M6 C149 C150 C151 C152
    VCC15 PEXRX06+/DVP0D01
    T12 N6

    10U_0805_10V4Z
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    VCC15 PEXRX06-/DVP0D00 1 1 1 1
    T25 VCC15 PEXRX07+/DVP0DE P3
    Decoupling capacitors U12 R3
    VCC15 PEXRX07-/DVP0HS DVP1D11
    U25 VCC15 PEXRX08+/DVP1D11 T3 DVP1D[0..11] 13
    +3VS DVP1D10 2 2 2 2
    V12 VCC15 PEXRX08-/DVP1D10 U3
    W12 T6 DVP1D9
    C170 C171 C172 C173 VCC15 PEXRX09+/DVP1D09 DVP1D8
    W25 VCC15 PEXRX09-/DVP1D08 U6
    Y12 V3 DVP1D7
    0.01U_0402_16V7K

    0.01U_0402_16V7K

    4.7U_0805_10V4Z

    4.7U_0805_10V4Z

    1 1 VCC15 PEXRX10+/DVP1D07
    1

    Y25 W3 DVP1D6
    VCC15 PEXRX10-/DVP1D06 DVP1CLK
    AA12 VCC15 PEXRX11+/DVP1CLK W6 DVP1CLK 13
    AB12 V6 DVP1D5
    2 2 VCC15 PEXRX11-/DVP1D05
    2

    AB25 Y3 DVP1D4
    VCC15 PEXRX12+/DVP1D04 DVP1D3 +1.6VS_NB
    AC12 VCC15 PEXRX12-/DVP1D03 AA3
    AC25 AA6 DVP1D2 1 2 C156 0.1U_0402_16V4Z
    VCC15 PEXRX13+/DVP1D02 DVP1D1
    2 AD12 VCC15 PEXRX13-/DVP1D01 AB6 1 2 C157 0.1U_0402_16V4Z 2
    AB3 DVP1D0 1 2 C158 0.1U_0402_16V4Z +1.6VS_NB
    PEXRX14+/DVP1D00 DVP1DE C159 4.7U_0805_10V4Z
    PEXRX14-/DVP1DE AC3 DVP1DE 13 1 2
    AD3 DVP1HS 1 2 C160 4.7U_0805_10V4Z
    PEXRX15+/DVP1HS DVP1HS 13
    +1.5VALW AD31 AE3 DVP1VS +1.6VS_NB 1 2 C161 4.7U_0805_10V4Z
    VSUS15 PEXRX15-/DVP1VS DVP1VS 13
    1 2 C162 0.1U_0402_16V4Z 1 2 C163 4.7U_0805_10V4Z
    16 SUSST# AD35 SUSST# PEXTX16+ AG1 PCIE_TXP0_R 1 2 C147 0.1U_0402_16V4Z PCIE_TXP0 18 1 2 C164 0.1U_0402_16V4Z
    TESTIN_NB AE36 AF1 PCIE_TXN0_R 1 2 C148 0.1U_0402_16V4Z 1 2 C165 0.1U_0402_16V4Z
    TESTEN PEXTX16- PCIE_TXN0 18
    AD36 1 2 C166 0.1U_0402_16V4Z 1 2 C167 2.2U_0805_16V4Z
    14,18,21,25,28 PCI_RST# RESET#
    AD34 AF4 PCIE_RXP0 18 08/15 HP 1 2 C168 0.1U_0402_16V4Z 1 2 C169 2.2U_0805_16V4Z
    16 PWROK_NB PWROK PEXRX16+
    AE4 PCIE_RXN0 18 1 2 C174 0.1U_0402_16V4Z 1 2 C175 2.2U_0805_16V4Z
    VCCA33HCK PEXRX16- C176 2.2U_0805_16V4Z
    AC31 VCCA33HCK 1 2
    VCCA33MCK AD30 AG6 CLK_PCIE_NB 1 2 C177 0.01U_0402_16V7K 1 2 C178 2.2U_0805_16V4Z
    VCCA33MCK PEXCLK+ CLK_PCIE_NB 11
    AF6 CLK_PCIE_NB# 1 2 C179 0.01U_0402_16V7K
    PEXCLK- CLK_PCIE_NB# 11
    VCCA33PE00 G6 1 2 C180 0.01U_0402_16V7K
    VCCA33PE01 VCCA33PEX0 R73 C181 0.01U_0402_16V7K
    AE6 VCCA33PEX1 PEXINTR# B6 INTRH# 14 1 2
    VCCA33PE PEDET C182 0.01U_0402_16V7K
    VCCA33PE1
    AH5
    AH3
    VCCA33PEXCK PEXDET B5
    AC34
    2 1 +3VS 1
    1
    2
    2 C183 0.01U_0402_16V7K
    under NB( solder side)
    VCCA33PEX2 PEXWAKE# PEWAKE# 16,18,19
    +1.5VALW AF7 AC36 PEXHPSCI# 4.7K_0402_5% 1 2 C184 0.01U_0402_16V7K
    VSUS15PEX PEXHPSCI# PEPMESCI#
    PEXPMESCI# AC33 PEPMESCI# 16
    AC32 D7 TCSEN#
    GNDAHCK TCSEN# PE0RCOMP0 R74 249_0402_1%
    AD29 GNDAMCK PEXCOMP0 H5 1 2
    H6 AD7 PE0RCOMP1 1 R75 2 249_0402_1% Strapping For NB_TEST Mode
    GNDAPEX0 PEXCOMP1 PE0REXT0 R76 10.7K_0402_1%
    AE7 G5 1 2
    05/29 VIA AH6
    GNDAPEX1 PEXREXT0
    AD6 PE0REXT1 1 R77 2 10.7K_0402_1% TESTIN BISTIN RBF WBF 06/05 VIA +3VS
    GNDAPEXCK PEXREXT1 PE1RCOMP R78 249_0402_1%
    VCLK_NB 1
    AH4 GNDAPEX2 PEXCOMP2 AH1
    PE1REXT
    1
    R79
    2
    10.7K_0402_1%
    1 1 x x
    2 AH2 1 2
    C615 PEXREXT2 Disable all TEST mode
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND

    @ 22P_0402_50V8J TCSEN# R575


    1 4.7K_0402_5% 1
    Close to NB
    CN896_HSBGA951 PEXHPSCI# R576
    K2
    K4
    K5
    K7
    K31
    K34
    K36
    L2
    L5
    L7
    L32
    L33
    M2
    M5
    M7
    M36
    N2
    N5
    N7
    P2
    P5
    P6
    P7
    P14
    P15
    P16
    P17
    P18
    P19
    P20

    4.7K_0402_5%

    TESTIN_NB R80

    Compal Electronics, Inc.


    4.7K_0402_5%
    Security Classification Compal Secret Data
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    GFX
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    C LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 8 of 39
    A B C D E
    A B C D E

    +VCC33GFX
    +VCCP
    05/29 VIA

    W14
    W15
    W16
    W17
    W18
    W19
    W20
    W21
    W22
    W23
    N15
    N16
    N17

    U18
    U19
    U20
    U21
    U22
    U23
    U31
    U33

    D13

    C12
    V14
    V15
    V16
    V17
    V18
    V19
    V20
    V21
    V22
    V23
    V30
    V35

    F13
    W2
    W5
    W7
    V2
    V5
    V7

    Y2

    W24
    M17
    M18
    M19
    N18
    N19
    N20
    N21
    N22
    N23
    N24

    R24

    U24
    P24

    V24

    Y24
    T24
    U4D +1.6VS_NB
    FDP4 R488 1 210K_0402_5% U4E

    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    VCC33GFX
    VCC33GFX
    VCC33GFX
    FDP5 R489 1 210K_0402_5% Y5

    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    VTT
    FDP6 R490 GND
    1 210K_0402_5% Y6 GND VCC15 AE14
    FDP7 R491 1 210K_0402_5% Y7 AE16
    FDP10 R492 GND VCC15
    DVP2D00 H11 1 210K_0402_5% Y14 GND VCC15 AE18
    DVP2D01 D10 Y15 GND VCC15 AE20
    DVP2D02 C11 Y16 GND VCC15 AE21
    4 AM1 C10 Y17 AE22 4
    NC DVP2D03 FDP4 GND VCC15
    AM3 NC DVP2D04 E10 Y18 GND VCC15 AJ10
    AT5 G10 FDP5 Y19 AJ11
    NC DVP2D05 FDP6 GND VCC15
    AM6 NC DVP2D06 F11 Y20 GND VCC15 AJ12
    AL2 C9 FDP7 FD4 =>Port Muxing Y21 AJ13
    NC DVP2D07 0: Two 12-bit DVI interface(1637) GND VCC15
    AL1 NC DVP2D08 E8 Y22 GND VCC15 AJ14
    AN6 B7 1: One 24-bit Panel interface Y23 AK9
    NC DVP2D09 FDP10 GND VCC15
    AT6 NC DVP2D10 F9 FD5 =>Dedicated DVI Port Configuration Y30 GND VCC15 AK10
    C7 0: TMDS Y32 AK11
    DVP2D11 1: TV Encoder GND VCC15
    Y34 GND VCC15 AK12
    VPAR AM4 FD6 =>Dedicated DVI Port Selection Y36 AK13
    15 VPAR VPAR GND VCC15
    0: Disable AA2 AK15
    1: Enable GND VCC15
    AA4 GND VCC15 AL8
    FD7 =>GFX Clock Select(VCK/LCDCK/ECK) AA5 GND VCC15 AL9
    0: Refer Internal PLL(Default) AA7 AL10
    1: From External GND VCC15
    AA14 GND VCC15 AL11
    FD10 =>CPUCK/MCK Clock Select AA15 GND VCC15 AL12
    RED C14 0: From NB(Default) AA16 AL14
    12 RED CRTAR GND VCC15
    GREEN D14 1: From External AA17 AM7
    12 GREEN CRTAG GND VCC15
    BLUE E14 C6 AA18 AM8
    12 BLUE CRTAB DVP1DET GND VCC15
    DVP0VS A5 AA19 GND VCC15 AM9
    E12 +3VS AA20 AM10
    12 HSYNC CRTHSYNC GND VCC15
    12 VSYNC F12 CRTVSYNC DVP2CLK B9 AA21 GND VCC15 AM11
    1 2 C187 AA22 GND VCC15 AM12
    VCCDAC1 A13 0.1U_0402_16V4Z AA23 AM13
    VCCDAC2 VCCA33DAC1 GND VCC15
    A12 VCCA33DAC2 DVP2DE D9 AA31 GND VCC15 AN7
    AA33 GND VCC15 AN8
    B13 GNDADAC AA35 GND VCC15 AN9
    3 Trace width = 10 mils B12 GNDADAC DVP2TVCLKR/DVP2DET A9 AB2 GND VCC15 AN10 3
    +1.6VS_NB AB4 AN11
    80.6_0402_1% 1 RSET C189 GND VCC15
    2 C13 CRTRSET AB5 GND VCC15 AP7
    R81 E11 1 2 AB7 AP8

    +
    DVP2HS GND VCC15
    14,21 PCI_PIRQA# H13 INTA# AB14 GND VCC15 AP9
    @ 330U_D2_2.5VM AB15 AP10
    GND VCC15
    13 ENPVEE B8 GPO0 DVP2VS B10 AB16 GND VCC15 AP11
    A6 GPOUT AB17 GND VCC15 AR7
    AB18 GND VCC15 AR8
    DVPSPCLK C8 LCD_CLK 13 AB19 GND VCC15 AR9
    CRTSPCLK G13 DDCCLK 12 AB20 GND VCC15 AR10
    AB21 GND VCC15 AT7
    11 CLK_NB_14M D12 XIN DVPSPD A7 LCD_DAT 13 AB22 GND VCC15 AT8
    CRTSPD E13 DDCDATA 12 AB23 GND VCC15 AT9
    AC2 GND VCC15 AT10
    VCCPLL1 A16 AC35 AC5
    VCCA33PLL1 BUSY# AGPBZ# 15 GND
    VCCPLL2 A15 AC6
    VCCPLL3 VCCA33PLL2 GND
    A14 VCCA33PLL3 AC7 GND
    H12 DISPCLKO R497 1 2 22_0402_5% AC14
    DISPCLKO DISPCLKI GND
    DISPCLKI G12 AC15 GND
    B16 GNDAPLL NOSSC@ 05/29 VIA AC16 GND
    B15 GNDAPLL LVDSENBLT A11 ENBLT 27 AC17 GND
    B14 GNDAPLL LVDSENVDD B11 ENAVDD 13 AC18 GND
    AC19 GND
    AC20 AN17
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND GND
    AC21 GND GND AN19
    AC22 GND GND AN35
    CN896_HSBGA951 +3VS AC23 AP2
    GND GND
    P21
    P22
    P23
    P33
    P35
    R2
    R4
    R5
    R6
    R7
    R14
    R15
    R16
    R17
    R18
    R19
    R20
    R21
    R22
    R23
    R30
    R31
    T2
    T4
    T5
    T7
    T14
    T15
    T16
    T17
    T18
    T19
    T20
    T21
    T22
    T23
    T34
    T36
    U2
    U5
    U7
    U14
    U15
    U16
    U17

    2 06/07 AD2 GND GND AP3 2


    AD5 GND GND AP6
    LCD_CLK R581 1 2 10K_0402_5% AD32 AP16
    GND GND
    AE2 GND GND AP22
    LCD_DAT R582 1 2 10K_0402_5% AE5 AP24
    GND GND
    AE32 GND GND AR2
    AE34 GND GND AR6
    AF2 GND GND AR16
    AF3 GND GND AR23
    +3VS +3VS +3VS AF5 AR35
    +3VS GND GND
    AG2 GND GND AT4
    2

    L9 L10
    FBMA-L10-160808-121LMT 0603
    L11
    FBMA-L10-160808-121LMT 0603
    C729 1 2 LVDS SSC AG3
    AG4
    AG5
    GND
    GND
    GND
    GND
    AT11
    AT14
    AT17
    U41 GND GND
    2

    FBMA-L10-160808-121LMT 0603 SSC@ 0.1U_0402_10V6K AG30 AT20


    GND GND
    AG31 AT22
    VDD

    VCCDAC1 VCCPLL1 VCCPLL2 GND GND


    AG33 GND GND AT23
    1

    1
    1000P_0402_50V7K

    1000P_0402_50V7K

    1000P_0402_50V7K

    AG36
    1U_0603_10V4Z

    1U_0603_10V4Z

    1U_0603_10V4Z

    DISPCLKO DISPCLKI GND


    1 1 1 1 1 1 1 X1/CLK CLK 4 R671 1 2
    C190 C191 C192 C193 C194 C195 SSC@ 22_0402_5%

    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    +3VS
    S1_1709 7 8 SD_1709
    2 2 2 2 2 2 S1 PD# S0_1709 R672 1 2 @ 0_0402_5% CN896_HSBGA951

    AJ19
    AJ20
    AJ23
    AJ33
    AK17
    AK18
    AK22
    AK32
    AK36
    AL3
    AL7
    AL15
    AL16
    AL17
    AL19
    AL22
    AL24
    AL33
    AM2
    AM36
    AN12
    AN13
    S0_1709 6 5 R673 1 2 @ 0_0402_5%
    GND

    S0 LEE
    +3VS +3VS S1_1709 R674 1 2 @ 0_0402_5%
    +3VS 11/19 VIA R675 1 2 SSC@ 0_0402_5%
    3
    2

    MK1709SLF_SO8
    2

    L12 L13 SSC@ SD_1709 R676 1 2 SSC@ 0_0402_5%


    1 L65 FBMA-L10-160808-121LMT 0603 R677 1 1
    FBMA-L10-160808-121LMT 0603 2 @ 0_0402_5%
    FBMA-L10-160808-121LMT 0603 Default Spread frequency from 50~100MHz, +-0.6%
    VCCPLL3 VCCDAC2
    1

    +VCC33GFX
    1000P_0402_50V7K

    1000P_0402_50V7K
    1U_0603_10V4Z

    1U_0603_10V4Z

    Compal Electronics, Inc.


    1

    Compal Secret Data


    1000P_0402_50V7K

    Security Classification
    1U_0603_10V4Z

    1 1 1 1
    1 1 C196 C197 C198 C199
    C188 C741 Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    2 2 2 2
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DISPLAY
    2 2 Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom LA-3941P 0.4

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 9 of 39
    A B C D E
    5 4 3 2 1

    +1.8V
    +1.8V +1.8V

    1
    R82
    7 DDR_A_DQS#[0..7]
    75_0402_1%
    7 DDR_A_D[0..63] JP1
    MVREF_DDR 1 2
    VREF VSS

    2
    3 4 DDR_A_D5
    7 DDR_A_DM[0..7] VSS DQ4
    DDR_A_D4 5 6 DDR_A_D0
    DQ0 DQ5

    1
    DDR_A_D1

    0.1U_0402_16V4Z
    7 DDR_A_DQS[0..7] 7 DQ1 VSS 8
    R83 DDR_A_DM0

    C200
    1 9 10
    DDR_A_DQS#0 VSS DM0
    7 DDR_A_MA[0..13] 75_0402_1% 11 12
    DDR_A_DQS0 DQS0# VSS DDR_A_D6
    13 DQS0 DQ6 14
    15 16 DDR_A_D7
    2 VSS DQ7

    2
    DDR_A_D2 17 18
    D DDR_A_D3 DQ2 VSS DDR_A_D13 D
    19 DQ3 DQ12 20
    21 22 DDR_A_D12
    DDR_A_D8 VSS DQ13
    23 DQ8 VSS 24
    DDR_A_D14 25 26 DDR_A_DM1
    DQ9 DM1
    27 28
    DDR_A_DQS#1 VSS VSS
    Layout Note: DDR_A_DQS1
    29 DQS1# CK0 30 M_CLK_DDR0 11
    31 32
    Place near JP9 33
    DQS1 CK0#
    34
    M_CLK_DDR#0 11
    DDR_A_D9 VSS VSS DDR_A_D11
    35 DQ10 DQ14 36
    DDR_A_D15 37 38 DDR_A_D10
    DQ11 DQ15
    39 VSS VSS 40

    41 42
    DDR_A_D16 VSS VSS DDR_A_D22
    43 44
    +1.8V DDR_A_D17 DQ16 DQ20 DDR_A_D21
    45 46
    DQ17 DQ21
    47 VSS VSS 48
    DDR_A_DQS#2 49 50
    DDR_A_DQS2 DQS2# NC DDR_A_DM2
    51 DQS2 DM2 52
    53 54
    DDR_A_D18 VSS VSS DDR_A_D23
    220U_D_4VM

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    1 55 56
    DDR_A_D19 DQ18 DQ22 DDR_A_D20
    1 1 1 1 1 1 1 1 1 57 58
    + DQ19 DQ23
    C201

    C202

    C203

    C204

    C205

    C206

    C207

    C208

    C209

    C210
    59 VSS VSS 60
    DDR_A_D29 61 62 DDR_A_D28
    DDR_A_D24 DQ24 DQ28 DDR_A_D25
    63 64
    2 2 2 2 2 2 2 2 2 2 DQ25 DQ29
    65 VSS VSS 66
    DDR_A_DM3 67 68 DDR_A_DQS#3
    DM3 DQS3# DDR_A_DQS3
    69 70
    NC DQS3
    71 VSS VSS 72
    DDR_A_D26 73 74 DDR_A_D31
    DDR_A_D27 DQ26 DQ30 DDR_A_D30
    75 76
    DQ27 DQ31
    77 78
    C DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA C
    7 DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA 7
    81 82
    VDD VDD
    83 84
    DDR_A_BS2 NC NC/A15
    7 DDR_A_BS2 85 BA2 NC/A14 86
    87 VDD VDD 88
    DDR_A_MA12 89 90 DDR_A_MA11
    DDR_A_MA9 A12 A11 DDR_A_MA7
    Layout Note: DDR_A_MA8
    91 A9 A7 92
    DDR_A_MA6
    93 94
    Place one cap close to every 2 pullup 95
    A8 A6
    96
    DDR_A_MA5 VDD VDD DDR_A_MA4
    resistors terminated to +0.9V DDR_A_MA3
    97
    A5 A4
    98
    DDR_A_MA2
    99 A3 A2 100
    DDR_A_MA1 101 102 DDR_A_MA0
    A1 A0
    103 VDD VDD 104
    DDR_A_MA10 105 106 DDR_A_BS1
    DDR_A_BS0 A10/AP BA1 DDR_A_RAS# DDR_A_BS1 7
    7 DDR_A_BS0 107 108 DDR_A_RAS# 7
    DDR_A_WE# BA0 RAS# DDR_CS0_DIMMA#
    109 110 DDR_CS0_DIMMA# 7
    7 DDR_A_WE# WE# S0#
    111 112
    DDR_A_CAS# VDD VDD M_ODT0
    7 DDR_A_CAS# 113 114 M_ODT0 7
    +0.9VS DDR_CS1_DIMMA# CAS# ODT0 DDR_A_MA13
    115 116
    7 DDR_CS1_DIMMA# NC/S1# NC/A13
    117 VDD VDD 118
    M_ODT1 119 120
    7 M_ODT1 NC/ODT1 NC
    121 122
    DDR_A_D49 VSS VSS DDR_A_D52
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    123 124
    DDR_A_D48 DQ32 DQ36 DDR_A_D53
    125 126
    DQ33 DQ37
    1 1 1 1 1 1 1 1 1 1 1 1 1 127 128
    DDR_A_DQS#6 VSS VSS DDR_A_DM6
    129 130
    DDR_A_DQS6 DQS4# DM4
    131 DQS4 VSS 132
    133 134 DDR_A_D51
    2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_D54 VSS DQ38 DDR_A_D55
    135 136
    DDR_A_D50 DQ34 DQ39
    C211

    C212

    C213

    C214

    C215

    C216

    C217

    C218

    C219

    C220

    C221

    C222

    C223

    137 138
    DQ35 VSS DDR_A_D39
    139 140
    DDR_A_D37 VSS DQ44 DDR_A_D38
    141 142
    B DDR_A_D36 DQ40 DQ45 B
    143 DQ41 VSS 144
    145 146 DDR_A_DQS#4
    DDR_A_DM4 VSS DQS5# DDR_A_DQS4
    147 148
    DM5 DQS5
    149 VSS VSS 150
    DDR_A_D35 151 152 DDR_A_D34
    DDR_A_D32 DQ42 DQ46 DDR_A_D33
    153 154
    DQ43 DQ47
    155 156
    DDR_A_D40 VSS VSS DDR_A_D45
    157 158
    DDR_A_D44 DQ48 DQ52 DDR_A_D43
    159 160
    DQ49 DQ53
    161 VSS VSS 162
    163 NC,TEST CK1 164 M_CLK_DDR1 11
    165 166 M_CLK_DDR#1 11
    DDR_A_DQS#5 VSS CK1#
    167 DQS6# VSS 168
    +0.9VS Layout Note: DDR_A_DQS5 169 170 DDR_A_DM5
    DQS6 DM6
    Place these resistor 171 VSS VSS 172
    RP1 RP2 56_0404_4P2R_5% DDR_A_D41 173 174 DDR_A_D47
    DDR_A_MA8 1 4 4 1 DDR_CKE0_DIMMA
    closely JP9,all DDR_A_D46 175
    DQ50 DQ54
    176 DDR_A_D42
    DDR_A_MA5 trace length Max=1.5" DQ51 DQ55
    2 3 3 2 DDR_A_BS2 177 178
    DDR_A_D61 VSS VSS DDR_A_D57
    179 180
    RP3 56_0404_4P2R_5% RP4 56_0404_4P2R_5% DDR_A_D60 DQ56 DQ60 DDR_A_D56
    181 182
    DDR_A_MA3 DQ57 DQ61
    1 4 4 1 DDR_A_MA6 183 184
    DDR_A_MA1 VSS VSS
    2 3 3 2 DDR_A_MA7 DDR_A_DM7 185 DM7 DQS7# 186 DDR_A_DQS#7
    187 188 DDR_A_DQS7
    RP5 56_0404_4P2R_5% RP6 56_0404_4P2R_5% DDR_A_D59 VSS DQS7
    189 DQ58 VSS 190
    DDR_CS0_DIMMA# 1 4 4 1 DDR_A_MA12 DDR_A_D58 191 192 DDR_A_D62
    DDR_A_RAS# DQ59 DQ62
    2 3 3 2 DDR_A_MA9 193 194 DDR_A_D63
    VSS DQ63
    5,11,16,18 SB_SMDATA 195 SDA VSS 196
    RP7 56_0404_4P2R_5% RP8 56_0404_4P2R_5% 197 198
    DDR_A_MA10 5,11,16,18 SB_SMCLK SCL SAO
    1 4 4 1 DDR_A_MA2 +3VS 199 200
    DDR_A_BS0 VDDSPD SA1
    2 3 3 2 DDR_A_MA4

    1
    10K_0402_5%

    10K_0402_5%
    C225

    0.1U_0402_16V4Z

    RP9 56_0404_4P2R_5% RP10 56_0404_4P2R_5% 1 YCO_292527-4_200P


    CONN@
    A DDR_A_WE# A
    1 DDR_A_BS1
    SO-DIMM A

    R84

    R85
    1 4 4
    DDR_A_CAS# 2 3 3 2 DDR_A_MA0
    2

    2
    RP11 56_0404_4P2R_5% RP12 56_0404_4P2R_5%
    M_ODT1 2 3 4 1 DDR_A_MA13
    DDR_CS1_DIMMA# 1 4 3 2 M_ODT0

    Compal Electronics, Inc.


    56_0404_4P2R_5% RP13 56_0404_4P2R_5%
    4 1 DDR_A_MA11
    Security Classification Compal Secret Data
    3 2 DDR_CKE1_DIMMA Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DDRII-SODIMM SLOT1

    www.vinafix.vn
    Add for using DDR2 2Gb tech. 6/9 <BOM Structure>
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 10 of 39
    5 4 3 2 1
    A B C D E

    Clock Generator
    10/04 IDT
    L14
    +CLK_VDD1 U6

    +3VS 1 2 46 48 CPUCLKT1 R109 1 2 22_0402_5%


    VDDCPU CPUCLKT0 CLK_BCLK 4
    1 1 1 8 47 CPUCLKC1 R111 1 2 22_0402_5%
    VDDAGP CPUCLKC0 CLK_BCLK# 4
    1 BLM15AG102SN1D_0402 C226 C227 C241 17 1
    VDD48 CPUCLKT0 R106 1
    4 VDDPCI CPUCLKT1 45 2 22_0402_5% CLK_NB_BCLK 6
    10U_0805_10V4Z 0.1U_0402_16V4Z 21 44 CPUCLKC0 R107 1 2 22_0402_5%
    2 2 2 VDD25Mhz CPUCLKC1 CLK_NB_BCLK# 6
    +CLK_VDD2 23
    L15 0.1U_0402_16V4Z VDD3.3 SYNC R578 1
    58 VDDPCIEX Sync/AGPCLK0_2X_F 10 2 0_0402_5% VCLK_NB 8
    +3VS 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 61 11 FS1 R577 1 2 0_0402_5%
    VDDREF FSLB/AGPCLK1_F VCLK_SB 15
    1 1 1 1 1 1 1 12 R118 1 2 0_0402_5%
    +VDD18 (CPU_STOP#)/AGPCLK2 CPU_STP# 16
    KC FBMA-L11-160808-301LMA20T C228 C229 C230 C231 C232 C605
    31 15 FS0 R112 2 1 22_0402_5%
    VDD2.5/1.8 FSLA/USB_48Mhz USBCLK 14
    C233 38 16 SEL24_48
    2 2 2 2 2 2 2 VDD2.5_/1.8 SEL24_48#/24_48Mhz CLK_DEBUG_PORTR R104 1 2 22_0402_5% CLK_DEBUG_PORT 18
    10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 FS2 R98 1 2 22_0402_5%
    FSLC/PCICLK0_2X SPCLK 15
    2 PCI_STP#_R
    (PCI_STOP#)/PCICLK1_2X CLK_PCI_PCM_R R100
    5,10,16,18 SB_SMCLK 50 SCLK PCICLK2_2X 5 1 2 22_0402_5% CLK_PCI_PCM 21
    L16 49 6 CLK_PCI_TPM_R R101 1 2 22_0402_5%
    +VDD18 5,10,16,18 SB_SMDATA SDATA PCICLK3_2X CLK_PCI_TPM 25
    KC FBMA-L11-160808-301LMA20T 7 CLK_LPC_DEBUG_R R102 1 2 22_0402_5%
    PCICLK4_F CLK_LPC_DEBUG 28
    +1.8V 1 2 +CLK_VDD2 R591 CLK_PCI_EC_R R99 1 2 22_0402_5% CLK_PCI_EC 27
    1 1 1 1 1 1 2 13 R569 2 1 10_0402_5%
    RESET_IN#/RESET# CLK_14M_KBC 27
    C236 C240 C237 C238 C239 63 MODE R108 2 1 10_0402_5%
    REF0_2X/Mode CLK_NB_14M 9
    1K_0402_5% 62 R110 2 1 10_0402_5%
    REF1/(PECLKREQ#) CLK_SB_14M 16
    @ 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z R117 R738 1 2 0_0402_5%
    2 2 2 2 2 MINI_CLKREQ# 18
    1 2 18 R739 1 2@ 0_0402_5%
    VTT_PWGD/PD#/WOL_STOP# CLKREQ_LAN# 19
    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    Freerun/25Mhz_0 19 Can be disabled by BIOS
    4.7K_0402_5% 20
    25Mhz_1F
    10/04 IDT PCI_STP#_R 1 2@ 0_0402_5% PCI_STP# 16
    R119
    22_0402_5% 2 1 R86 PCIEXT1_NB 57 27 CLK_DDR0 R583 1 2 0_0402_5%
    8 CLK_PCIE_NB PCIeT_L0 DDRT0 M_CLK_DDR0 10
    22_0402_5% 2 1 R87 PCIEXC1_NB# 56 28 CLK_DDR0# R584 1 2 0_0402_5%
    8 CLK_PCIE_NB# PCIeC_L0 DDRC0 M_CLK_DDR#0 10
    2 22_0402_5% 2 1 R88 CLK_PCIE_LAN_R 55 29 CLK_DDR1 R585 1 2 0_0402_5% 2
    19 CLK_PCIE_LAN PCIeT_l1 DDRT1 M_CLK_DDR1 10
    22_0402_5% 2 1 R89 CLK_PCIE_LAN#_R 54 30 CLK_DDR1# R586 1 2 0_0402_5%
    19 CLK_PCIE_LAN# PCIeC_L1 DDRC1 M_CLK_DDR#1 10
    22_0402_5% 2 1 R90 PCIEXT2_MCARD 52 34
    18 CLK_PCIE_MCARD PCIeT_L2 DDRT2
    22_0402_5% 2 1 R91 PCIEXC2_MCARD# 51 33
    18 CLK_PCIE_MCARD# PCIeC_L2 DDRC2 M_CLK_DDR0 C723 2 1@ 10P_0402_50V8J
    36 M_CLK_DDR#0 C724 2 1@ 10P_0402_50V8J
    DDRT3 M_CLK_DDR1 C725
    7 MCLKOT 24 BUF_INT DDRC3 35 2 1@ 10P_0402_50V8J
    25 M_CLK_DDR#1 C726 2 1@ 10P_0402_50V8J
    BUF_INC
    2

    R136 40
    R477 MCLKIT_R DDRT4
    7 MCLKIT 2 1 26 FB_OUTT DDRC4 39
    Can be disabled by BIOS
    100_0402_5% 22_0402_5% 60 42
    X1 DDRT5
    DDRC5 41
    1

    59 CLK_14M_KBC C671 2 1@ 10P_0402_50V8J

    GND_1
    GND_2
    GND_3
    GND_4
    GND_5
    GND_6
    GND_7
    GND_8
    7 MCLKOC X2
    2 2 CLK_NB_14M C672 2 1@ 10P_0402_50V8J

    GND
    C631 C234 CLK_SB_14M C673 2 1@ 10P_0402_50V8J
    C632 1 2 XTALIN_CLK USBCLK C674 2 1@ 10P_0402_50V8J
    @ 5P_0402_50VC @ 5P_0402_50VC ICS9LPR704AGLF-T VCLK_SB C675 2 1@ 10P_0402_50V8J
    1 1

    3
    9
    14
    22
    32
    37
    43
    53
    64
    22P_0402_50V8J VCLK_NB C676 2 1@ 10P_0402_50V8J
    1

    Y1 10/04 IDT SPCLK C677 2 1@ 10P_0402_50V8J

    C235
    2

    1 2 XTALOUT_CLK
    14.31818MHZ_20P_6X1430004201
    22P_0402_50V8J
    2 MCLKIT
    3 C125 +CLK_VDD2 +CLK_VDD2 3
    @ 5P_0402_50VC MINI_CLKREQ# 1 R733 2
    1 10K_0402_5% FS0 R123 1 2 10K_0402_5%
    SYNC 1 R120 2 R502 1 2 @ 10K_0402_5%
    Near to U6 Set PCIE synchronous 10K_0402_5%
    MODE 1 R122 2 FS2 R125 1 2 10K_0402_5%
    Set Mobile mode 10K_0402_5% R503 1 2 @ 10K_0402_5%
    SEL24_48 1 R124 2
    PIN16 48MHz output 10K_0402_5% R504 1 2 @ 10K_0402_5%
    FS1 R127 1 2 10K_0402_5%

    FSL2 FSL1 FSL0 CPU SRC PCI REF USB


    *1 *0 *1 100.00 100.00 33.33 14.318 48.000
    0 1 0 200.00 100.00 33.33 14.318 48.000

    4 4

    Security Classification
    2007/11/19
    Compal Secret Data
    2008/11/19 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomLA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 11 of 39
    A B C D E
    A B C D E

    26 RED_R

    26 GREEN_R +5VS +RCRT_VCC +CRTVDD BLUE_R


    GREEN_R
    26 BLUE_R

    CRT Connector
    F1 D1 RED_R
    1 2 2 1 W=40mils D_HSYNC
    D_VSYNC
    1.1A_6VDC_FUSE CH491D_SC59
    Close to NB

    DAN217_SC59

    DAN217_SC59

    DAN217_SC59

    DAN217_SC59

    @ DAN217_SC59
    1
    C245
    L56

    D35

    D36
    1

    1
    BK1608LL560-T 0603 L62 11/21 VIA 0.1U_0402_16V4Z

    D32

    D33

    D34
    2 JP2
    9 RED 1 2 1 2 27 CRT_DET
    1 L57 0_0805_5% 1
    6
    BK1608LL560-T 0603 L63 11
    1 2 1 2 RED_R 1 @ @ @ @
    9 GREEN +CRTVDD
    L58 0_0805_5% 7

    3
    BK1608LL560-T 0603 L64 12
    9 BLUE 1 2 1 2 GREEN_R 2

    75_0402_5%

    75_0402_5%

    75_0402_5%
    0_0805_5%

    10P_0402_50V8J

    10P_0402_50V8J

    10P_0402_50V8J

    10P_0402_50V8J

    10P_0402_50V8J

    10P_0402_50V8J
    8

    1
    1 1 1 1 1 1 13
    BLUE_R

    R498

    R499

    R500
    3
    9 06/06 HP
    2 2 2 2 2 2 08/20 for test 14 16

    C246

    C247

    C248

    C249

    C250

    C251
    4 17

    2
    10
    15
    5
    +3VS
    +5VS +5VS CONN@
    C252 C253 SUYIN_070546FR015S333ZR_15P
    1 2 1 2

    0.1U_0402_16V4Z 0.1U_0402_16V4Z

    R143

    R144
    2

    2
    5
    1

    U8
    SN74AHCT1G125GW_SOT353-5 +CRTVDD +CRTVDD
    OE#
    P

    2 4 R_HSYNC R145 1 2 0_0603_5% D_HSYNC


    9 HSYNC A Y

    1
    G

    5
    1

    2.2K_0402_5%

    2.2K_0402_5%
    D_HSYNC 26
    R146 R147
    OE#
    P
    3

    2 4 R_VSYNC R148 1 2 0_0603_5% D_VSYNC


    9 VSYNC A Y 2.2K_0402_5% 2.2K_0402_5%
    G

    U9
    R149

    R150

    D_VSYNC 26

    2
    2 SN74AHCT1G125GW_SOT353-5 2
    1 1
    3

    C254 C255 Q7A


    2

    26 D_DDCDATA 6 1 DDCDATA 9
    @ 5P_0402_50VC @ 5P_0402_50VC
    2 2 2N7002DW T/R7_SOT-363-6

    5
    1

    1
    51K_0402_5%

    51K_0402_5%

    26 D_DDCCLK 3 4 DDCCLK 9

    Q7B
    2N7002DW T/R7_SOT-363-6

    L Place cloce to MXM connector JP39

    3 3

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    CRT & HDMI

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 12 of 39
    A B C D E
    5 4 3 2 1

    LCD/PANEL BD. CONN. LCD POWER CIRCUIT


    1 ALC control
    B+_LCD 2 PWM
    C256
    2 1 3 Power for ALS and controller
    0.1U_0603_50V4Z 4,5 GND LCDVDD LCDVDD +3VALW
    Q9
    C257 6,7 VIN (B+) AP2301GN 1P SOT23-3

    1
    2 1
    R151 1 3

    S
    D 68P_0402_50V8J JP3 D

    2 1
    100_0402_1% 11/28 HP
    1 L18 2 NB_TXOUT0-
    B+

    G
    4 3

    3 2

    2
    0_0805_5% NB_TXOUT0+ R152 1 2 150K_0402_5%
    +3VS 6 5
    8 7 NB_TXOUT1- Q56B
    LCDVDD 10 9 C258
    11/08 NB_TXOUT1+ 2N7002DW T/R7_SOT-363-6
    0_0402_5%1 R509 ALS_EN 12 11 R153 1
    2 14 13 5 2 47K_0402_5% 1 2
    INV_PWM NB_TXOUT2-
    27 INV_PWM 16 15
    DISPLAYOFF# NB_TXOUT2+ 0.1U_0603_25V_X7R

    C260
    18 17

    C259

    C261
    20 19 NB_TXCLK-
    22 21

    1
    NB_TXCLK+ 1
    24 23 Q11
    26 25 1 1
    DTC124EK_SC59
    28 27 LCD_CLK 9
    30 29 LCD_DAT 9 2
    2
    9 ENAVDD 2 2

    4.7U_0805_10V4Z
    32 31
    11/08

    0.1U_0402_16V4Z

    @ 4.7U_0805_10V4Z
    3
    +3VALW +5VS
    ACES_88242-3001_30P

    2
    R154 R505

    4.7K_0402_5% 4.7K_0402_5%

    21

    1
    06/23
    Q56A
    1 6 DISPLAYOFF#
    C 27 BK_OFF# C
    2N7002DW T/R7_SOT-363-6

    Close to NB +2.5VS_LVDS LVDSVCC


    PLLVCC
    8 DVP1D[0..11] +1.5VS 200mA +2.5VS_LVDS
    L19
    RP17 +2.5VS 1 2
    2

    5 4 LVDSVS BLM15AG102SN1D_0402

    29

    13
    22

    27
    8 DVP1VS

    5
    6 3 LVDSHS R161 C262 1 2@ 0.1U_0402_16V4Z U10 1 1
    8 DVP1HS
    7 2 LVDSDE 1K_0402_5% C263 C264
    8 DVP1DE

    VCC25
    VCC25

    VCCPLL
    VCCLVDS
    VCCLVDS
    VCCLVDS
    DVP1D0 8 1 LVDSD0 LVDSCLK 42
    LVDSDE XCLK 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    33 3
    DE CLK2+ 2 2
    1

    22_0804_8P4R_5% VREF_1637 LVDSHS 31 4


    LVDSVS HSYNC CLK2-
    30
    VSYNC
    2

    RP18 2 6
    DVP1D1 LVDSD1 R162 LVDSD0 A5+
    5 4 36 7
    DVP1D2 LVDSD2 C685 LVDSD1 D[0] A5- PLLVCC
    6 3 1K_0402_5% 37
    DVP1D3 LVDSD3 LVDSD2 D[1] L20
    7 2 0.1U_0402_16V4Z 38 8
    DVP1D4 LVDSD4 1 LVDSD3 D[2] A4+
    8 1 39 9 +2.5VS 1 2
    D[3] A4-
    1

    LVDSD4 40 BLM15AG102SN1D_0402
    B 22_0804_8P4R_5% LVDSD5 D[4] C265 1 B
    41 D[5] A3+ 11 1
    LVDSD6 43 12 0.1U_0402_16V4Z C266
    LVDSD7 D[6] A3-
    44
    RP19 LVDSD8 D[7] NB_TXCLK+ L21 0.1U_0402_16V4Z
    45 D[8] CLK1+ 15
    DVP1D5 LVDSD5 LVDSD9 NB_TXCLK- 2
    PLLGND 2
    5 4 46 16 1 2
    LVDSCLK DUAL: L= Single Channel LVDSD10 D[9] CLK1- BLM15AG102SN1D_0402
    8 DVP1CLK 6 3 47
    DVP1D6 LVDSD6 H= Daul Channel LVDSD11 D[10] NB_TXOUT2+
    7 2 48 17
    DVP1D7 LVDSD7 D[11] A2+ NB_TXOUT2-
    8 1 +2.5VS R156 1 2@ 4.7K_0402_5%
    A2-
    18
    LVDSVCC
    R157 1 2 4.7K_0402_5% 2
    22_0804_8P4R_5% R158 1 DUAL NB_TXOUT1+
    2@ 4.7K_0402_5% 28 R_FB A1+ 20 L22
    PD# NB_TXOUT1-
    +2.5VS R159 1 2 4.7K_0402_5% 34 PDB A1- 21 +2.5VS 1 2
    BLM15AG102SN1D_0402
    RP20 R_FB: L= Falling Edge VREF_1637 32 23 NB_TXOUT0+

    GNDLVDS
    GNDLVDS
    GNDLVDS
    VREF A0+ 1 1 1

    GNDPLL
    DVP1D8 5 4 LVDSD8 H= Rising Edge 24 NB_TXOUT0- 0.1U_0402_16V4Z C267 C268 C269
    DVP1D9 LVDSD9 A0-
    6 3 25
    DVP1D10 LVDSD10 VSWING GND L23
    7 2
    2 LVDSGND
    2 2
    1

    DVP1D11 8 1 LVDSD11 1 1 2
    VT1637_LQFP48 BLM15AG102SN1D_0402 0.1U_0402_16V4Z
    35

    10
    14
    19

    26
    22_0804_8P4R_5% R160 C270 0.1U_0402_16V4Z
    2.4K_0402_1% 10P_0402_50V8J
    2
    2

    PLLGND
    +2.5VS
    LVDSGND

    +2.5VS
    2

    05/28 VIA AP329 R485


    1K_0402_5%
    2

    R486
    1

    2.2K_0402_5% PD#
    D
    1

    A A
    1

    2 Q50
    G 2N7002_SOT23
    R487
    1

    S
    3

    2 1 2 Q51
    9 ENPVEE
    MMBT3904_SOT23
    1K_0402_5% 2
    3

    C607 Security Classification Compal Secret Data Compal Electronics, Inc.


    @ 1U_0402_6.3V4Z
    1 Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LCD CONN & Q-Switch & GPIO Ext.

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 13 of 39
    5 4 3 2 1
    5 4 3 2 1

    +3VUSBPLL +3VS
    L24
    +3VUSBPLL 1 2
    PCI_AD[0..31] 2 2 FBMA-L10-160808-121LMT 0603 2
    21 PCI_AD[0..31] 0.1U_0402_16V4Z C271 C272 C273
    10U_0805_10V4Z 0.1U_0402_16V4Z
    U11A L25
    PCI_AD0 G2 GND33USBPLL 1 1
    1 2
    1
    PCI_AD1 AD00
    J4 AD01 VCCA33PLLUSB A23 +3VUSBPLL FBMA-L10-160808-121LMT 0603
    PCI_AD2 J3 B23 +1.5VUSBPLL
    PCI_AD3 AD02 VCCA15PLLUSB
    H3 AD03
    PCI_AD4 F1 D23 GND15USBPLL +1.5VUSBPLL +1.5VS
    PCI_AD5 AD04 GNDA15PLLUSB
    D G1 AD05 GNDA33PLLUSB C23 GND33USBPLL L26 D
    PCI_AD6 H4 +1.5VUSBPLL 1 2
    AD06
    PCI_AD7
    PCI_AD8
    F2
    E1
    AD07
    AD08
    PCI USB USBP0+ E20 USB20_P0 25
    0.1U_0402_16V4Z
    2
    C274
    2 FBMA-L10-160808-121LMT 0603 2
    C275 C276
    PCI_AD9 G3 AD09 USBP0- D20 USB20_N0 25 Right side 10U_0805_10V4Z 0.1U_0402_16V4Z
    PCI_AD10 E3 A20 L27
    PCI_AD11 AD10 USBP1+ GND15USBPLL 1 1 1
    D1 AD11 USBP1- B20 1 2
    +3VS PCI_AD12 G4 E18 FBMA-L10-160808-121LMT 0603
    AD12 USBP2+ USB20_P2 18
    PCI_AD13 D2 AD13 USBP2- D18 USB20_N2 18 Minicard
    RP34 PCI_AD14 D3 AD14 USBP3+ A18 USB20_P3 26 11/27 BIOS
    1 8 PCI_PIRQA# PCI_AD15 F3 AD15 USBP3- B18 USB20_N3 26 Dock
    2 7 PCI_PIRQB# PCI_AD16 K3 D16 +3VALW
    AD16 USBP4+ USB20_P4 25
    3 6 PCI_PIRQC# PCI_AD17 L3 AD17 USBP4- E16 USB20_N4 25 USB/B RP24
    4 5 PCI_PIRQD# PCI_AD18 K2 A16 USBOC#5 4 5
    AD18 USBP5+ USB20_P5 25
    PCI_AD19 K1 AD19 USBP5- B16 USB20_N5 25 Power USB USBOC#1 3 6
    2.2K_0804_8P4R_5% PCI_AD20 M4 D14 USBOC#3 2 7
    AD20 USBP6+ USB20_P6 25
    PCI_AD21 L2 AD21 USBP6- E14 USB20_N6 25 BT USBOC#0 1 8
    PCI_AD22 N4 A14
    RP35 PCI_AD23 AD22 USBP7+ 100K_0804_8P4R_5%
    L1 AD23 USBP7- B14
    1 8 PCI_GNT#3 PCI_AD24 M2
    PCI_PIRQE# PCI_AD25 AD24 RP26
    2 7 M1 AD25
    3 6 PCI_PIRQF# PCI_AD26 P4 C26 USBOC#0 USBOC#2 4 5
    PCI_REQ#3 PCI_AD27 AD26 USBOC0# USBOC#1 USBOC#6
    4 5 N3 AD27 USBOC1# D24 3 6
    PCI_AD28 N2 B26 USBOC#2 USBOC#7 2 7
    2.2K_0804_8P4R_5% PCI_AD29 AD28 USBOC2# USBOC#3 USBOC#4
    N1 AD29 USBOC3# C25 1 8
    PCI_AD30 P1 B24 USBOC#4
    RP27 PCI_AD31 AD30 USBOC4# USBOC#5 100K_0804_8P4R_5%
    P2 AD31 USBOC5# A24
    1 8 PCI_GNT#1 A26 USBOC#6
    PCI_GNT#2 USBOC6# USBOC#7
    2 7 21 PCI_C/BE#0 E2 CBE0# USBOC7# A25
    C 3 6 PCI_GNT#0 C1 C
    PCI_REQ#1 21 PCI_C/BE#1 CBE1#
    4 5 21 PCI_C/BE#2 L4 CBE2#
    M3 E23 USBCLK
    21 PCI_C/BE#3 CBE3# USBCLK USBCLK 11
    2.2K_0804_8P4R_5%

    1
    PCI_FRAME# J1
    RP28 21 PCI_FRAME# PCI_DEVSEL# FRAME# R164 2 R163
    21 PCI_DEVSEL# H2 DEVSEL# USBREXT B25 1
    1 8 PCI_TRDY# PCI_IRDY# J2
    PCI_FRAME# 21 PCI_IRDY# PCI_TRDY# IRDY# 5.62K_0402_1% @ 10_0402_5%
    2 7 21 PCI_TRDY# H1 TRDY#
    3 6 PCI_IRDY# PCI_STOP# K4 D26 R510 1 2 10K_0402_5%
    21 PCI_STOP# STOP# GPI9/UDPWR

    2
    4 5 PCI_STOP# PCI_SERR# C2 D25 +3VALW
    21,27 PCI_SERR# SERR# VRDSLP/GPI29/GPO9 DPRSLPVR 35 2
    PCI_PAR F4 C750
    2.2K_0804_8P4R_5% 21 PCI_PAR PCI_PERR# PAR R167 1
    21 PCI_PERR# C3 PERR# 2 10K_0402_5%
    PCIRST# R1 Keyboard R168 1 2 10K_0402_5% @ 10P_0402_50V8J
    15,16 PCIRST# PCIRST# 1
    RP29
    PCI_PERR# PCI_PIRQA#
    Controller GATEA20
    1 8 9,21 PCI_PIRQA# A4 INTA# KBCK/KA20G W3 GATEA20 27
    2 7 PCI_SERR# PCI_PIRQB# B4 V1
    21 PCI_PIRQB# INTB# KBDT/KBRC KB_RST# 27
    3 6 PCI_PAR PCI_PIRQC# B5
    21 PCI_PIRQC# INTC# +3VS
    4 5 PCI_DEVSEL# PCI_PIRQD# C4
    PCI_PIRQE# INTD# IRQ1 DPRSLPVR R169 1
    D4 INTE#/GPIO12 MSCK/IRQ1 W1 2
    2.2K_0804_8P4R_5% PCI_PIRQF# E4 W2 IRQ12 4.7K_0402_5%
    PCI_PIRQG# INTF#/GPIO13 MSDT/IRQ12
    A3 INTG#/GPIO14
    RP31 8 INTRH# INTRH# B3
    PCI_REQ#2 INTH#/GPIO15
    1 8
    2 7 PCI_REQ#0 PCI_REQ#0 A5 A6 PCI_GNT#0
    21 PCI_REQ#0 REQ0# GNT0# PCI_GNT#0 21
    3 6 PCI_PIRQG# PCI_REQ#1 B6 D6 PCI_GNT#1
    INTRH# PCI_REQ#2 REQ1# GNT1# PCI_GNT#2 +3VALW
    4 5 C5 REQ2# GNT2# C6
    PCI_REQ#3 D5 E5 PCI_GNT#3
    2.2K_0804_8P4R_5% PCI_REQ#4 REQ3# GNT3# PCI_GNT#4 IRQ1 R664 1
    P3 REQ4# GNT4# R4 2 10K_0402_5%
    R3 R2 PCI_GNT#5 IRQ12 R665 1 2 10K_0402_5%
    B 27 PREP#_SB REQ5#/GPI7 GNT5#/GPO7 B
    RP32
    1 8 PCI_GNT#5 VT8237S_PBGA542 11/08 BIOS 07/30
    2 7 PCI_REQ#4 06/06 HP
    3 6 PREP#_SB
    4 5 PCI_GNT#4

    2.2K_0804_8P4R_5%
    11/08

    06/05 VIA +3VS


    5

    U12
    PCIRST# 1
    P

    B PCI_RST#
    Y 4 PCI_RST# 8,18,21,25,28
    2 A
    G
    3

    @ TC7SH08FUF_SSOP5

    2 1 R172
    0_0402_5%

    A A

    Security Classification Compal Secret Data


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    !
    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 14 of 39
    5 4 3 2 1
    5 4 3 2 1

    U11C
    VLAD0 H25
    8 VLAD0 VAD00
    8
    8
    VLAD1
    VLAD2
    VLAD1
    VLAD2
    G26
    K26
    VAD01
    VAD02
    MII MCRS
    MCOL
    A11
    B11
    VLAD3 J23 +3VS
    8 VLAD3 VLAD4 VAD03 R173 2
    8 VLAD4 F26 VAD04 MTXEN C11 1 10K_0402_5% RP30
    VLAD5 G25 A10 4 5
    8 VLAD5 VLAD6 VAD05 MTXD0 LPC_DRQ0#
    8 VLAD6 K22 VAD06 MTXD1 B10 3 6
    VLAD7 K24 B9 LPC_AD3 2 7
    8 VLAD7 VAD07 MTXD2 LPC_FRAME#
    E24 VAD08 MTXD3 A9 1 8
    G23 VAD09 MTXC C10
    05/29 VIA L26 VAD10
    D L25 D10 4.7K_0804_8P4R_5% D
    VAD11 MRXER

    VLINK
    VCLK_SB 1 2 E26 C9
    C616 VAD12 MRXC
    E25 VAD13 MRXDV D8
    @ 22P_0402_50V8J L24 C8
    VAD14 MRXD0
    Close to NB M26 VAD15 MRXD1 B8
    MRXD2 A8
    VBE# G24 C7
    8 VBE# VBE# MRXD3
    UPCMD K23 A7 05/31 VIA
    8 UPCMD UPCMD MDC +1.5VS
    DNCMD K25 B7
    8 DNCMD DNCMD MDIO
    F8 L59
    UPSTB PHYPWRDN# +1.5VS_LAN
    +1.5VS
    VLINK_REF 8 UPSTB J26 UPSTB+ PHYRST# D7 1 2
    UPSTB# J24 2 1 FBMA-L10-160808-121LMT 06032
    Trace=12Mil 8 UPSTB# UPSTB-
    D11 0.1U_0402_16V4Z C633 C634 C635
    SEECS
    1

    Space=15Mil 8 DNSTB
    DNSTB H26 DNSTB+ SEEDO B12 For strap 10U_0805_10V4Z 0.1U_0402_16V4Z
    R69 DNSTB# H24 A12 SEEDI
    1K_0402_1% VLREF_SB=0.45V 8 DNSTB# DNSTB- SEEDI
    C12
    SEEDI 16
    GNDLAN 1 2 1
    4.7K_0402_5% 1 SEECK
    +1.5VS 2 R174
    VPAR F24 E7 +1.5VS_LAN
    9 VPAR VPAR VCC15LAN
    2

    VLREF_SB VLREF_SB H22 VLVREF GNDLAN


    E6
    0.1U_0402_16V4Z

    GNDLAN
    1

    1 R176 1 2 VCOMP J22


    R70 C136 360_0402_1% VLCOMP
    FERR# U24 FERR# 4
    432_0402_1%
    11 VCLK_SB
    VCLK_SB L22 VCLK CPU A20M# U26 H_A20M#
    H_A20M# 4
    2
    Close to Ball H22
    IGNNE#
    INIT#
    T24
    R26
    H_IGNNE# 4
    H_INIT# 4
    Pull-high on CPU side
    2

    F23 NC1 INTR T25 H_INTR 4


    NMI T26 H_NMI 4
    C G22 U25 C
    NC2 SMI# H_SMI# 4
    STPCLK# R24 H_STPCLK# 4
    +3VS

    18,25,27,28 LPC_AD0
    LPC_AD0 AD8 LPC
    LAD0
    SLP# V26 H_CPUSLP# 4,6 +3VS
    RP33 LPC_AD1 AF7 P21 2 1
    18,25,27,28 LPC_AD1 LAD1 DPSLP#/GPIO23/LDTSTP# H_DPSLP# 4
    1 8 LPC_AD2 LPC_AD2 AE7 0_0402_5% R177 AGPBZ# R178 2 1
    LPC_AD0 18,25,27,28 LPC_AD2 LPC_AD3 LAD2 VGATE 1K_0402_5%
    2 7 18,25,27,28 LPC_AD3 AD7 LAD3 DPRSTP#/GPIO28 AC9 VGATE 27,35
    3 6 LPC_AD1 AC8 SATA_LED# SATA_LED# R179 1 2
    SATALED# SATA_LED# 18
    4 5 LPC_DRQ1# AB9 PEXRST# 4.7K_0402_5%
    PEXRST#/GPO29 AGPBZ# FRD# R180 1
    AGPBZ#/GPI6 AD10 AGPBZ# 9 2
    4.7K_0804_8P4R_5% LPC_FRAME# AF6 4.7K_0402_5%
    18,25,27,28 LPC_FRAME# FRAME#
    LPC_DRQ0# AE6 SPCLK PEXRST# R595 1 2
    DRQ0# SPCLK 11
    LPC_DRQ1# AE8 4.7K_0402_5%
    DRQ1#
    PCICLK R23 1 R181 2 1 2 C278
    Control by EC The same power sequence as cpu_pok @ 10_0402_5% @ 12P_0402_50V8J
    Delay 50ms after +3VALW ready SB_PW RGD AC5 U23 FRD# FRD# 28
    4,21,27 SB_PW RGD PWRGD SPIDI/GPIO19
    GPO22/SPICS# R22 FSEL# 16,28
    27 PM_RSMRST#
    PM_RSMRST# 2 1 RSMRST# AD4 RSMRST# SPICK/GPIO10 R25 SPI_CLK 28 06/27 VIA
    R182 1 2 R692 10K_0402_5% T23 FW R# 28
    SPIDO/GPIO11
    09/19 HP 47K_0402_5%
    +1.5VSBPLL +1.5VS
    +RTCVCC AF4 VBAT VCCA15PLL T22
    RSMRST# L28
    32 RSMRST#
    1 SB_32KHI AE4 U22 0.1U_0402_16V4Z 1 2
    C707 RTCX1 GNDAPLL
    2 1 FBMA-L10-160808-121LMT 06032
    SB_32KH0 AF3 C279 C280 C281
    SB_32KH0 SB_32KHI @ 10U_0805_10V4Z RTCX2 10U_0805_10V4Z 0.1U_0402_16V4Z
    2 VT8237S_PBGA542 L29
    06/27 VIA GNDSBPLL 1 2
    1 2
    1
    FBMA-L10-160808-121LMT 0603
    15P_0402_50V8J
    4

    B B
    Y2 Close to SB Ball AF4
    IN
    OUT

    R511
    2 1
    C282 1 C283 1 0_0402_5%
    NC

    NC

    +3VS
    15P_0402_50V8J SPI_CLK
    2 2
    3

    5
    U32
    R663 PEXRST# 1

    P
    32.768KHZ_12.5P_1TJS125DJ2A073 B
    Y 4 PEX_RST0# 18
    @ 10_0402_5% 2
    14,16 PCIRST# A

    G
    2
    2

    3
    C728 07/06 EMI @ TC7SH08FUF_SSOP5

    +3VL JBATT1 @ 10P_0402_50V8J


    +RTCVCC 1
    D2
    1U_0603_10V4Z
    1
    3
    R188
    BATT1.1
    + - 05/31 VIA

    2 2 BATT1.2 1 2 1 2
    + -
    2

    2 W=20mils
    C285 JCOMS1 C286 1K_0603_5%
    DAN202U_SC70
    1 0.1U_0402_16V4Z
    1
    A
    LOTES_AAA-BAT-019-K01_2P A
    1

    PAD-NO SHORT 2x2m BATT1

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    @ ML1220 MAXELL LITHIUM RTC BATTERY THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    " !
    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomLA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 15 of 39
    5 4 3 2 1
    5 4 3 2 1

    18 PD_D[0..15] U11B DO connect to Codec, D1 connect to Modem


    PD_D0 AA22 33_0402_5% 2 1 R189
    +3VS PDD00 AZ_BITCLK_HD 23
    1K_0402_5%
    R1931 VD0
    PD_D1
    PD_D2
    PD_D3
    Y24
    AA26
    PDD01
    PDD02
    HDA AZBITCLK
    AZSDIN0
    T1
    U3
    AZ_BITCLK
    AZ_SDIN0_HD
    AZ_SDIN1_MDC
    33_0402_5% 2 1 R190 AZ_BITCLK_MDC 28
    AZ_SDIN0_HD 23
    2 AA25 PDD03 AZSDIN1 V2 AZ_SDIN1_MDC 28
    VD[1:0]= FSB Frequency
    LL: 100MHz
    R1951 2 PD_D4 AB26 PDD04 AZSDIN2/GPIO20/PCS0# U1 LP_EN#
    LP_EN# 19
    10/5 HP,BIOS
    2.2K_0402_5% @ PD_D5 AC26 V3 W L_OFF
    LH: 133MHz PDD05 AZSDIN3/GPIO21/PCS1# W L_OFF 18
    PD_D6 AC23 T2 AZ_SYNC 33_0402_5% 2 1 R191
    HL: 200MHz PDD06 AZSYNC AZ_SYNC_MDC 28
    1K_0402_5% PD_D7 AD25 U2 AZ_SDOUT 33_0402_5% 2 1 R192
    HH:
    * Auto (166MHz can PDD07 AZSDOUT AZ_SDOUT_HD 23
    R1991 2 H_PROCHOT# PD_D8 AD26 T3 AZ_RST# AZ_SYNC 33_0402_5% 2 1 R194
    be obtained) PDD08 AZRST# AZ_SYNC_HD 23
    R2011 2 PD_D9 AC24 AZ_SDOUT 33_0402_5% 2 1 R196
    PDD09 AZ_SDOUT_MDC 28
    D 2.2K_0402_5% @ PD_D10 AC25 AZ_RST# 33_0402_5% 2 1 R197 D
    PDD10 AZ_RST_HD# 23
    PD_D11 AB24 33_0402_5% 2 1 R198
    PDD11 AZ_RST_MDC# 28
    @1K_0402_5% PD_D12
    EIDE
    VD2= IOQ Depth AB23
    L:* 8Level R2041 VD2 PD_D13 PDD12 W AKE# R200
    2 AA24 PDD13 WAKE# Y5 1 2 0_0402_5% PEW AKE# 8,18,19
    H: 1Level R2051 2 PD_D14 Y26 W4 SB_PME#
    2.2K_0402_5% PD_D15 PDD14 PME# LOW _BAT#
    AA23 PDD15 GPI5/BATLOW# V4 LOW _BAT# 27
    Y1 EC_THERM# AZ_BITCLK C636 1 2@ 22P_0402_50V8J
    CPUMISS/GPI17 EC_THERM# 5
    VD3= AGTL+ internal @1K_0402_5% PD_DREQ# Y23 Y2 GPI3 R223 2 1 22_0402_5% EC_SCI# 27 AZ_SDIN0_HD C637 1 2@ 22P_0402_50V8J
    Pullups 18 PD_DREQ# PDDREQ GPI3/RING#
    R2081 VD3 PD_DACK# SUSST# AZ_SYNC C638 2@ 22P_0402_50V8J
    L:* Enable
    2 18 PD_DACK# V24 PDDACK# GPO3/SUSST# Y3 SUSST# 8 08/10 EC 1
    R2091 2 PD_IOR# W26 Y4 THRM# R206 2 1 0_0402_5% AZ_SDOUT C639 1 2@ 22P_0402_50V8J
    H: Disable 18 PD_IOR# PDIOR#/PHDMARDY/PHSTROBE AOLGPI/THRM#/GPI18 PEPMESCI# 8
    2.2K_0402_5% PD_IOW # Y25 AA1 EC_SMI# AZ_RST# C640 1 2@ 22P_0402_50V8J
    18 PD_IOW # PDIOW#/PSTOP GPI2/EXTSMI# EC_SMI# 27
    PD_IORDY Y22 AB1 SMBALRT# 08/14 EC
    18 PD_IORDY PDIORDY/PDDMARDY/PDSTROBE SMBALT#
    VD4= Vlink compensation 1K_0402_5% PD_CS#1 V22 AC1 LID# R207 2 1 0_0402_5%
    H=* Manual mode 18 PD_CS#1 PDCS1# GPI4/LID# LID_OUT# 27
    R2101 2 PD_A0 PD_CS#3 V23 AD2 ON/OFFBTN# ON/OFFBTN# 28 05/31 VIA
    L= Auto mode 18 PD_CS#3 PDCS3# PWRBTN#
    R2111 2 PD_A0 W23 AF1
    18 PD_A0 PDA0 PWROK PW ROK_NB 8
    2.2K_0402_5% @ PD_A1 V25 AB7 PM_CLKRUN#
    18 PD_A1 PDA1 CLKRUN# PM_CLKRUN# 21,25,27
    PD_A2 W24 AC7 CPU_STP#
    18 PD_A2 PDA2 GPO5/CPUSTP# CPU_STP# 11
    VD5= V4-Lite Capability @ 1K_0402_5% PD_IRQA AD24 AD6 PCI_STP#
    L:* Disable 18 PD_IRQA IRQ14 GPO6/PCISTP# PCI_STP# 11
    H: Enable
    R2141
    R2151
    2
    2
    PD_A1
    AC20 AE1 INTRUDER#
    11/26 SB Strapping +3VS
    SDD00 INTRUDER#/GPI16
    2.2K_0402_5% 09/15 VIA AB20 SDD01
    1K_0402_5% V-Link 4X mode
    L: Auto mode
    AC21 SDD02 SUSCLK/GPO4 AB3 SUSCLK 10/5 HP PD_DACK# 2 1 R212
    H: *Manual mode
    VD6= V4 Capability 1K_0402_5% AE18 2 1 R213
    L: Disable SDD03
    H:* Enable
    R2181
    R2191
    2
    2
    PD_A2 AF18
    AD18
    SDD04
    SDD05
    SMB SMBCK1
    SMBDT1
    AC4
    AB2
    SMCLK1
    SMDAT1
    @ 2.2K_0402_5%

    @ 2.2K_0402_5% AD19 1K_0402_5% SATA Stagger Spin Up


    SD_D7 SDD06 GPI27 R751 1 L: Disable
    AF19 SDD07 SMBCK2/GPIO27 AC3 2@ 0_0402_5% CABLE_DET 20,27 PD_CS#1 2 1 R216
    VD7= V-Link reference @ 1K_0402_5% AE20 AD1 ODD_DET 2 1 R217 H: *Enable
    voltage select(4x) SDD08 SMBDT2/GPIO26 ODD_DET 18
    L:* 0.75V (8237S)
    R2221 2 PD_CS#3 AF20 SDD09 11/27 2.2K_0402_5%
    C
    H: 0.9V (8237A)
    R2241 2 AD20 SDD10 GPO2/SUSA# AA2 XMIT_OFF_SB#
    XMIT_OFF_SB# 18 11/8 BIOS @
    C
    2.2K_0402_5% AE21 SDD11 SUSB# AD3 SLP_S3#
    SLP_S3# 19,23,27,29,34,36 10/5 HP,BIOS 1K_0402_5% LPC FWH command
    L: Enable
    AF21 SDD12 SUSC# AF2 SLP_S5#
    SLP_S5# 25,29,33 11/26 AZ_SYNC 2 1 R220
    H:* Disable
    AD21 SDD13 2 1 R221
    NB Strapping AD22
    AF22
    SDD14 GPI0 AE2
    AC2
    GPI0 @ 2.2K_0402_5%
    SDD15 GPI1 H_THERMTRIP# 4
    AA3 1K_0402_5% Auto Reboot
    GPO0 BT_OFF 25 L: Enable
    SDREQ AD17 AE3 NPCI_RST# AZ_SDOUT 2 1 R225
    SDDREQ GPO1 NPCI_RST# 27 H:* Disable
    AD23 AE5 H_PROCHOT# 2 1 R226
    SDDACK# PCREQA/GPIO24/GPIOA H_PROCHOT# 4
    AF23 AD5 VD2 @ 2.2K_0402_5%
    SDIOR#/SHDMARDY/SHSTROBE PCREQB/GPIO25/GPIOB
    AE23 SDIOW#/SSTOP PCGNTA/GPIO30/GPIOC AF5 VD0 07/03 BIOS
    +3VALW 1 R240 2 H_THERMTRIP# 2 1 SDRDY AF17 AC6 VD3 1K_0402_5% 100NHz VLink clock
    MAINPW ON 27,30,32 SDIORDY/SDDMARDY/SDSTROBE PCGNTB/GPIO31/GPIOD L: Enable
    10K_0402_5% D3 AF25 PCI_STP# 2 1 R227
    CH751H-40_SC76 SDCS1# SIRQ H:* Disable
    AF26 SDCS3# SERIRQ AD9 SIRQ 21,25,27 2 1 R228
    AF24 AF8 SB_SPKR @ 2.2K_0402_5%
    SDA0 SPKR SB_SPKR 23
    AC22 AB8 CLK_SB_14M
    SDA1 OSC CLK_SB_14M 11
    AE24 @ 1K_0402_5% LAN shadow EEPROM
    IRQ15 SDA2 TPO_SB L:* Disable
    AE26 IRQ15 TPO AF9 15 SEEDI 2 1 R229
    AE9 TEST_SB 2 1 R230 H: Enable
    TEST 2.2K_0402_5%
    AC19 SVREF,NC
    AB21 AC10 VDDA0
    R232 2 SCOMPP,NC VCCA15SXO
    1 249_0402_1% 1K_0402_5% CPU FREQ Strapping
    C287 AA11 AB10 SB_SPKR 2 1 R231 L: Enable
    0.01U_0402_16V7K 2 SATAR50COMP GNDASXO H:* Disable
    18 SATA_TXP0 1SATA_TXP0_C AB13 STX0+ 2 1 R233
    18 SATA_TXN0
    0.01U_0402_16V7K 2 1SATA_TXN0_C
    C28807/21
    AC13 STX0- SATA SREXT AD11 2
    R234
    SATA_X2
    1
    10.7K_0402_1%
    @ 2.2K_0402_5%

    @ 1K_0402_5%
    +3VALW
    LAN PHY Reset
    18 SATA_RXN0 AF13 SRX0- SXO AE10
    AE13 R237 XMIT_OFF_SB# 2 1 R235 L:* Mobile mode
    18 SATA_RXP0 SRX0+ H: Desktop mode
    HDD@ C659 AF10 SATA_X1 2 1 2 1 R236
    B 0.01U_0402_16V7K 2 SXI B
    1SATA_TXP1_C 10M_0402_5% 2.2K_0402_5%

    SATA_X1

    SATA_X2
    18 SATA_TXP1 AB15 STX1+
    0.01U_0402_16V7K 2 1SATA_TXN1_C AC15 AF11 VDDA33
    18 SATA_TXN1 STX1- VCCA33SPLL
    HDD@ C660 Y3
    2 1 AF15 AE11 1 2 +3VS
    18 SATA_RXN1 SRX1- GNDASPLL
    R512 0_0402_5% AE15 1 1 1K_0402_5% SPI ROM function
    18 SATA_RXP1 SRX1+ L: Disable
    25MHZ_20P 2 1 R238
    +3VS C289 15,28 FSEL# H: *Enable
    VT8237S_PBGA542 C290 2 1 R239
    18P_0402_50V8J 18P_0402_50V8J @ 2.2K_0402_5%
    2 2
    5

    U33
    SUSCLK 1
    P

    B +3VS L30
    Y 4 PEX_RST1# 19
    2 +1.5VS 1 2 VDDA0
    14,15 PCIRST# A
    G

    R657 2 1 4.7K_0402_5% SMCLK1 2


    @ TC7SH08FUF_SSOP5 R658 2 1 4.7K_0402_5% SMDAT1 FBMA-L10-160808-121LMT 0603
    3

    05/31 VIA C291


    +3VS 0.1U_0402_16V4Z
    +3VALW 1
    R245 1 2 4.7K_0402_5% TPO_SB
    R478 2 1 10K_0402_5% EC_SMI# R249 2 1 4.7K_0402_5% PD_IORDY
    R479 2 1 10K_0402_5% EC_THERM# R251 2 1 4.7K_0402_5% CPU_STP#

    R481 2 1 10K_0402_5% BT_OFF R513 2 1 4.7K_0402_5% SDRDY


    R250 2 1 4.7K_0402_5% PM_CLKRUN# L31
    R482 2 1 10K_0402_5% SUSST# R525 2 1 4.7K_0402_5% PD_IRQA +3VS 1 2 VDDA33
    R483 2 1 10K_0402_5% PW ROK_NB R526 2 1 4.7K_0402_5% IRQ15 SMCLK1 R257 1 2 0_0402_5% SB_SMCLK 2 1
    SB_SMCLK 5,10,11,18
    R263 2 1 10K_0402_5% SUSCLK FBMA-L10-160808-121LMT 0603
    R480 2 1 10K_0402_5% NPCI_RST# SMDAT1 R255 1 2 0_0402_5% SB_SMDATA C292 C745
    +RTCVCC SB_SMDATA 5,10,11,18 0.1U_0402_16V4Z
    A 10U_0805_10V4Z A
    R514 10K_0402_5% GPI3 R254 1M_0402_5% INTRUDER# 1 2
    2 1 2 1
    R515 2 1 10K_0402_5% SB_PME# R256 2 1 1M_0402_5% GPI0
    R516 2 1 10K_0402_5% W AKE# R258 1 2 4.7K_0402_5% AZ_SDIN0_HD
    R260 1 2 4.7K_0402_5% GPI27 R259 1 2 4.7K_0402_5% AZ_SDIN1_MDC
    R517 2 1 10K_0402_5% LOW _BAT#

    Compal Electronics, Inc.


    R518 2 1 10K_0402_5% THRM# R262 2 1 5.6K_0402_5% PD_DREQ#
    R519 2 1 10K_0402_5% SMBALRT# R264 1 2 4.7K_0402_5% TEST_SB Security Classification Compal Secret Data
    R520 2 1 10K_0402_5% LID# R265 2 1 10K_0402_5% PD_D7
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    R521 2 1 4.7K_0402_5% LP_EN# R523 2 1 10K_0402_5% SD_D7
    R524 2 1 5.6K_0402_5% SDREQ
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    #$ %# !
    R261 1 2 4.7K_0402_5% ODD_DET R522 2 1 4.7K_0402_5% W L_OFF Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    R252 2 1 4.7K_0402_5% AZ_RST# DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomLA-3941P 0.4
    09/12 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 16 of 39
    5 4 3 2 1
    U11E
    1A A13 USBGND1 GND P11
    +3VS
    200mA +3VS +1.5VS +1.5VS
    A15 USBGND2 GND P12
    C298 A17 USBGND3 GND P13
    C293 C294 C295 U11D C296 C297 A19 P14
    USBGND4 GND
    2 1 1 2 2 1 H9 VCC33-1 VCC15-1 J9 2 1 1 2 2 1 A21 USBGND5 GND P15
    H10 VCC33-2 VCC15-2 J10 B13 USBGND6 GND P16
    1U_0402_6.3V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z H11 J11 10U_0805_10V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K B15 R11
    VCC33-3 VCC15-3 USBGND7 GND
    H12 VCC33-4 VCC15-4 J12 C304 B17 USBGND8 GND R12
    C299 C300 C301 J8 K9 C302 C303 B19 R13
    VCC33-5 VCC15-5 USBGND9 GND
    2 1 1 2 2 1 K8 VCC33-6 VCC15-6 L9 2 1 1 2 2 1 B21 USBGND10 GND R14
    L8 VCC33-7 VCC15-7 L18 C13 USBGND11 GND R15
    1U_0402_6.3V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z M8 M9 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K C14 R16
    VCC33-8 VCC15-8 USBGND12 GND
    C307 N8 VCC33-9 VCC15-9 M18 C310 C15 USBGND13 GND R21
    C305 C306 P8 N9 C308 C309 C16 T11
    VCC33-10 VCC15-10 USBGND14 GND
    2 1 1 2 2 1 R8 VCC33-11 VCC15-11 N18 2 1 1 2 2 1 C17 USBGND15 GND T12
    R19 VCC33-12 VCC15-12 P9 C18 USBGND16 GND T13
    1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K T8 P18 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K C19 T14
    VCC33-13 VCC15-13 USBGND17 GND
    C313 T19 VCC33-14 VCC15-14 R9 C316 C20 USBGND18 GND T15
    C311 C312 U8 R18 C314 C315 C21 T16
    VCC33-15 VCC15-15 USBGND19 GND
    2 1 1 2 2 1 U19 T9 2 1 1 2 1 2 D13 W22

    +
    VCC33-16 VCC15-16 USBGND20 GND
    V8 VCC33-17 VCC15-17 T18 D15 USBGND21 GND W25
    1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K V19 U9 1U_0402_6.3V4Z 0.1U_0402_16V4Z @ 330U_D2_2.5VM_R15 D17 AA21
    VCC33-18 VCC15-18 USBGND22 GND
    C318 V21 VCC33-19 VCC15-19 U18 D19 USBGND23 GND AB19
    C704 C317 W9 V9 C319 C320 D21 AB22
    VCC33-20 VCC15-20 USBGND24 GND
    1 2 1 2 2 1 W10 VCC33-21 VCC15-21 V10 2 1 1 2 E13 USBGND25 GND AB25
    W11 VCC33-22 VCC15-22 V11 E15 USBGND26 GND AC18
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K W17 V12 1U_0402_6.3V4Z 0.1U_0402_16V4Z E17 AE17
    VCC33-23 VCC15-23 USBGND27 GND
    C323 W18 VCC33-24 VCC15-24 V13 E19 USBGND28 GND AE19
    C705 C706 W19 V14 C324 C325 E21 AE22
    VCC33-25 VCC15-25 USBGND29 GND
    1 2 1 2 2 1 W21 VCC33-26 VCC15-26 V15 2 1 1 2 H13 USBGND30 GND AE25
    Y21 VCC33-27 VCC15-27 V16 H14 USBGND31 GND AA9
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K W8 V17 1U_0402_6.3V4Z 0.1U_0402_16V4Z H15 AB18
    VCC33-28 VCC15-28 USBGND32 GND
    06/26 VIA AP418B VCC15-29 V18
    +1.5VS
    H16 USBGND33 GND T21
    L32 H17 AA10
    VDDATS_3V C326 C327 USBGND34 GND
    +3VS 2 1 2 2 W12 VDDATS-1 H18 USBGND35 GND K19
    FBMA-L10-160808-600LMT 0603 W13 L23 2 1 1 2 A1
    C329 C330 VDDATS-2 VCCVK1 GND
    W14 VDDATS-3 VCCVK2 K21 AB14 GNDATS0 GND A2
    0.1U_0402_16V4Z 4.7U_0603_6.3V6K W15 L21 10U_0805_10V4Z 0.1U_0402_16V4Z AC14 B1
    1 1 VDDATS-4 VCCVK3 GNDATS1 GND
    W16 VDDATS-5 VCCVK4 N21 AD12 GNDATS2 GND B2
    L33 N22 C331 C332 AD13 E8
    VCCA15 VCCVK5 GNDATS3 GND
    +1.5VS 2 1 2 2 AC17 VCCA15S1 VCCVK6 N23 2 1 1 2 AD14 GNDATS4 GND F25
    FBMA-L10-160808-600LMT 0603 AC11 N24 AD15 H23
    C334 C335 VCCA15S2 VCCVK7 1U_0402_6.3V4Z 0.1U_0402_16V4Z GNDATS5 GND
    AB17 VCCA15S3 VCCVK8 N25 AD16 GNDATS6 GND J21
    0.1U_0402_16V4Z AB11 N26 AE12 J25
    1 1 1U_0402_6.3V4Z VCCA15S4 VCCVK9 C336 C337 GNDATS7 GND
    VCCVK10 P22 AE14 GNDATS8 GND F6
    VCCVK11 P23 2 1 1 2 AE16 GNDATS9 GND F7
    +3VALW 0.1U_0402_16V4Z 10U_0805_10V4Z D9 P24 AF12 J5
    VCC33MII-1 VCCVK12 1U_0402_6.3V4Z 0.1U_0402_16V4Z GNDATS10 GND
    2 2 2 E9 VCC33MII-2 VCCVK13 P25 AF14 GNDATS11 GND K5
    E10 VCC33MII-3 VCCVK14 P26 AF16 GNDATS12 GND P5
    05/29 VIA C617 C618 C619 E11 M21 C339 C340 R5
    VCC33MII-4 VCCVK15 GND
    VCCVK16 M22 2 1 1 2 AC16 GNDAS1 GND L11
    1 1 1
    VCCVK17 M23 AC12 GNDAS2 GND L12
    0.1U_0402_16V4Z D12 M24 1U_0402_6.3V4Z 0.1U_0402_16V4Z AB16 L13
    MIIVSUS15-1 VCCVK18 GNDAS3 GND
    +1.5VALW E12 MIIVSUS15-2 VCCVK19 M25 AB12 GNDAS4 GND L14
    2 2 100mA VCCVK20 L19 C341
    GND L15
    +3VALW VCCVK21 M19 1 2 W5 GND GND L16
    C620 C621 0.1U_0402_16V4Z 10U_0805_10V4Z AA4 N19 V5 M11
    VSUS33-1 VCCVK22 0.1U_0402_16V4Z GND GND
    2 2 2 AB4 VSUS33-2 VCCVK23 P19 M16 GND GND M12
    1 1
    AB5 VSUS33-3 N11 GND GND M13
    0.1U_0402_16V4Z 10U_0805_10V4Z C343 C344 C345 AB6 VSUS33-4 500mA L34 N12 GND GND M14
    A22 4.7U_0603_6.3V6K +3VALW USB_1 2 1 +3VALW N13 M15
    1 1 1 USBVCC1 GND GND
    100mA USBVCC2 B22 2 2 2 2 2 1 FBMA-L10-160808-600LMT 0603 N14 GND GND K18
    0.1U_0402_16V4Z T4 C22 C346 C347 C348 C349 C350 C351 N15 N16
    VSUS15-1 USBVCC3 GND GND
    +1.5VALW U4 VSUS15-2 USBVCC4 D22
    2 2 E22 10U_0805_10V4Z VT8237S_PBGA542
    USBVCC5 1 1 1 1 1 2
    USBVCC6 F22
    C352 C353 J13 1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z
    10U_0805_10V4Z USBVCC7 0.1U_0402_16V4Z
    USBVCC8 J14
    1 1
    USBVCC9 J15
    0.1U_0402_16V4Z J16
    R266 USBVCC10
    +1.5VALW 1 2 C24 VSUS15USB USBVCC11 J17
    0_0402_5% 2 J18
    USBVCC12
    C354 VT8237S_PBGA542
    0.1U_0402_16V4Z
    1

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    & ' "# !
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom LA-3941P 0.4

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 17 of 39
    A B C D E

    Mini Card +3VS_WLAN

    Isolate SLOT power from SYSTEM power. +3VS_WLAN


    Reserve for port80 card
    +1.5VS_WLAN +1.5VS
    UIM_PWR R268 1 2 DEBUG@ 0_0402_5% LPC_FRAME# 15,25,27,28

    2
    R270 R693 09/19 UIM_DATA R269 1 2 DEBUG@ 0_0402_5% LPC_AD3
    2 1 UIM_CLK R271 1 2 DEBUG@ 0_0402_5% LPC_AD2
    0_1206_5% 47K_0402_5% UIM_RST R272 1 2 DEBUG@ 0_0402_5% LPC_AD1
    CONN@ UIM_VPP R273 1 2 DEBUG@ 0_0402_5% LPC_AD0
    1 JP4 1
    LPC_AD[0..3] 15,25,27,28

    21
    PEWAKE# 1 2
    8,16,19 PEWAKE# 1 2
    09/19 3 4 PLT_RST#_R R274 2 1 DEBUG@ 0_0402_5% PCI_RST#
    3 4 XMIT_OFF#
    5 6 6 1 XMIT_OFF_SB# 16
    5 6
    11 MINI_CLKREQ# 1 2 CLKREQD#_MC 7 8 UIM_PWR R276
    7 8
    R275 0_0402_5% 9 9 10 10 UIM_DATA For WWAN Q63A
    CLK_DEBUG_PORT_R2 1 DEBUG@ 0_0402_5% CLK_DEBUG_PORT 11
    CLK_PCIE_MCARD# 11 12 UIM_CLK
    11 CLK_PCIE_MCARD# CLK_PCIE_MCARD 11 12 UIM_RST 2N7002DW T/R7_SOT-363-6 Open to avoid EMI issue
    11 CLK_PCIE_MCARD 13 13 14 14
    15 16 UIM_VPP
    PLT_RST#_R 15 16
    17 18
    17 18
    Reserve for port80 card CLK_DEBUG_PORT_R 19 19 20 20 XMIT_OFF#
    R277 0_0402_5% 21 22
    PCIE_RXN0 PCIE_C_RXN0 21 22 PEX_RST0# 15 +3VALW +3VS_WLAN
    8 PCIE_RXN0 1 2 23 24 Q54
    PCIE_RXP0 PCIE_C_RXP0 23 24 AO3413_SOT23
    8 PCIE_RXP0 1 2 25 26
    R278 0_0402_5% 25 26
    27 28
    27 28

    D
    29 30 3 1
    29 30 SB_SMCLK 5,10,11,16

    2
    PCIE_TXN0 31 32
    8 PCIE_TXN0 PCIE_TXP0 31 32 SB_SMDATA 5,10,11,16
    33 34 R506
    8 PCIE_TXP0 33 34
    35 36 47K_0402_5%

    G
    35 36 USB20_N2 14

    2
    +3VS_WLAN 37 38
    37 38 USB20_P2 14
    39 40 47K_0402_5%
    39 40

    1
    41 42 2 1 +3VALW
    41 42
    Mini Card STANDOFF 43
    45
    43 44 44
    46
    WL_LED# R688
    WL_LED# 26 16 WL_OFF 1
    R507
    2
    47K_0402_5%
    45 46

    1
    47
    47 48
    48
    Q63B
    05/30 HP: for Broadcom WLAN.
    H1 H2 49 50 D26
    49 50 2N7002DW T/R7_SOT-363-6 R508

    3
    HOLEA HOLEA 51 52 220K_0402_5%
    51 52
    9/19 CH751H-40_SC76
    53 GND1GND2 54

    2
    5 C6222 1 22P_0402_50V8J
    BT_LED 25
    1

    FOX_AS0B226-S40N-7F_52P

    5
    4
    2 2
    PEX_RST0# 3 4
    +3VALW
    +3VS_WLAN +1.5VS_WLAN Q39B
    2N7002DW T/R7_SOT-363-6

    1
    1 1 C355 1 1 1
    C356 C357 C358 C359 C360
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z 4.7U_0805_10V4Z 2 0.01U_0402_16V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z
    2 2 2 2 2

    SATA CD-ROM Connector


    +5VS

    0.1U_0402_16V4Z

    10U_0805_10V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    JP5
    1 1 1 1

    C368

    C370

    C371
    SSD Connector
    1 C369
    GND SATA_TXP0
    2 SATA_TXP0 16
    A+ 2 2 2 2
    +5VS
    Placea caps. near HDD CONN. A-
    3 SATA_TXN0
    SATA_TXN0 16
    4
    GND SATA_RXN0_C C366 1
    5 2 1200P_0402_50V7K SATA_RXN0 SATA_RXN0 16
    B- SATA_RXP0_C C367 1
    0.1U_0402_16V4Z @ 10U_0805_10V4Z
    B+ 6 2 1200P_0402_50V7K SATA_RXP0 SATA_RXP0 16
    GND
    7 Pleace near ODD CONN (JP5)
    1 1 1 1 1 07/21
    C361 C362 C363 C364 C365 +3VL
    10U_0805_10V4Z 8 ODDDET#
    DP

    2
    9 ODD_DET 16
    3 2 2 2 2 2 V5 R744 3
    V5 10 +5VS
    1000P_0402_50V7K @ 1U_0603_10V4Z 11
    MD
    12
    GND
    GND 13 47K_0402_5% 10/5 HP

    1
    D

    1
    Q66
    PD_D[0..15] ODDDET# 2
    16 PD_D[0..15]
    TYCO_2-1759952-1_13P G 2N7002_SOT23
    1 S

    3
    C740

    JP6 +5VS HDD@


    PCI_RST# 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    8,14,21,25,28 PCI_RST# 1 2
    PD_D7 1 2 PD_D8

    10U_0805_10V4Z
    3 4

    0.1U_0402_16V4Z
    3 4

    1.8" SATA HDD CONN


    PD_D6 PD_D9

    0.1U_0402_16V4Z
    5 6 1 1 1 1
    PD_D5 5 6 PD_D10

    HDD@ C663

    HDD@ C665

    HDD@ C666
    7 7 8 8
    PD_D4 9 10 PD_D11 C664
    PD_D3 9 10 PD_D12
    11 12
    PD_D2 11 12 PD_D13 2 2 2 2
    SSD STANDOFF PD_D1
    13
    15
    13 14
    14
    16 PD_D14
    PD_D0 15 16 PD_D15
    17
    17 18
    18 CONN@ 09/24
    H3 19 20 JP32
    PD_DREQ# 19 20
    HOLEA
    16 PD_DREQ# 21 21 22 22 1 Pleace near HD CONN (JP32)
    PD_IOW# 23 24 SATA_TXP1
    16 PD_IOW# PD_IOR# 23 24 2 SATA_TXN1 SATA_TXP1 16
    16 PD_IOR# 25 25 26 26 3 SATA_TXN1 16
    PD_IORDY 27 28 PCSEL R279 1 2 470_0402_5%
    16 PD_IORDY 27 28 4
    1

    PD_DACK# 29 30 SATA_RXN1_C C661 1 2 HDD@ 1200P_0402_50V7K +3VS HDD@


    16 PD_DACK# 29 30 5 SATA_RXN1 16
    PD_IRQA 31 32 SATA_RXP1_C C662 1 2 HDD@ 1200P_0402_50V7K 0.1U_0402_16V4Z
    16 PD_IRQA PD_A1 31 32 6 SATA_RXP1 16

    10U_0805_10V4Z
    33 34

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    16 PD_A1 PD_A0 33 34 PD_A2 7
    16 PD_A0 35 36 PD_A2 16 1 1 1 1
    PD_CS#1 35 36 PD_CS#3 8

    HDD@C667
    C667

    HDD@ C669

    HDD@ C670
    16 PD_CS#1 37 38 PD_CS#3 16
    SSD_LED# 37 38 9 C668
    39 40 +5VS
    39 40 10

    HDD@
    +5VS 41 41 42 42 +5VS
    4
    43 44 2 2 2 2 4
    SSD_LED# 43 44 ACES_85205-10001_10P
    +5VS 1 2 45 GND GND 46

    R280 100K_0402_5%
    SUYIN_200138FR044G277ZU Pleace near HD CONN (JP32)

    SSD_LED# IDE_LED#
    Security Classification Compal Secret Data Compal Electronics, Inc.
    1 2 IDE_LED# 26 Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    D25 CH751H-40_SC76
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Mini-Card

    www.vinafix.vn
    1 2 Size Document Number Rev
    15 SATA_LED# AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    D37 CH751H-40_SC76 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 18 of 39
    A B C D E
    5 4 3 2 1

    Layout Notice : Place as close +2.5V_LAN_+1.2V_VDDCIO


    +3V_LAN +AVDDH
    chip as possible. +1.2V_LAN R709 +1.2V_LAN
    1 2 +2.5V_LAN_+1.2V_VDDCIO FBM-L11-160808-601LMT_0603
    +3VALW +3V_LAN 10/03 Broadcom 5787@ 0_0402_5% 2 1 +AVDDL

    5784@ 0_0402_5%

    5787@ 0_0402_5%
    Q15A L38 2 2

    2
    S
    3 1

    56
    61
    15
    19

    38
    52
    68
    1

    6
    2N7002DW T/R7_SOT-363-6 Q14 U45 C386 C387
    SI2301BDS_SOT23 4.7U_0805_10V4Z 0.1U_0402_16V4Z

    4.7U_0805_10V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    27,31,32 ADP_PRES 2

    VDDIO
    VDDIO
    VDDIO
    VDDIO
    VDDIO

    DC
    DC
    DC
    1 1

    R710

    R711
    2 2 2 2

    G
    2

    1
    R281 +LAN_BIASVDD FBM-L11-160808-601LMT_0603

    C373

    C374

    C376

    C377
    36
    4.7K_0402_5% BIASVDDH
    5 VDDC_IO 2 1 +GPHY_PLLVDD
    1 1 1 1

    6
    R283 55 L39 2 2
    VDDC_IO

    2
    2 1 +1.2V_LAN 13 VDDC
    D 47K_0402_5% C389 C390 D
    20 VDDC XTALVDDH 23 +XTALVDD

    3
    34 4.7U_0805_10V4Z 0.1U_0402_16V4Z
    Q15B VDDC 1 1
    60 VDDC

    16,23,27,29,34,36 SLP_S3# 5 FBM-L11-160808-601LMT_0603


    2 1 +PCIE_PLLVDD
    2N7002DW T/R7_SOT-363-6 L40 2 2
    4

    48 AVDDH_LANTX2- C395
    AVDDH AVDDH_LANTX1- LAN_TX1- C394 0.1U_0402_16V4Z
    42 LAN_TX1- 20
    +2.5V_LAN_+1.2V_VDDCIO R712 AVDDH LAN_TX1+ 4.7U_0805_10V4Z 1 1
    LAN_TX1+ 20
    +AVDDL 1 2
    +3V_LAN 5784@ 0_0402_5% FBM-L11-160808-601LMT_0603
    R714 39 LAN_TX2- 2 1
    +AVDDL AVDDL LAN_TX2- 20 +PCIE_VDD
    1 2 45 LAN_TX2+ L41 1 2
    +AVDDH AVDDL LAN_TX2+ 20
    5787@ 0_0402_5% 51
    AVDDL
    1

    Layout Notice : Filter place as close C396 C397


    R713 R715 4.7U_0805_10V4Z 0.1U_0402_16V4Z
    0_0402_5%

    0_0402_5%

    chip as possible. LAN_TX3- 2 1


    TRD3_N 49 LAN_TX3- 20
    LAN_TX3+
    5787@

    5784@

    50 LAN_TX3+ 20
    TRD3_P
    +GPHY_PLLVDD 35
    GPHY_PLLVDDL
    2

    L35 47 LANTX2+_LANTX2-
    TRD2_N AVDDL_LANTX2+
    2 1 +XTALVDD TRD2_P 46
    FBM-L11-160808-601LMT_06032 R716 +PCIE_PLLVDD
    1 2 43 LANTX1-_LANTX1+ R717 1 2 +AVDDH
    +PCIE_PLLVDD TRD1_N
    C372 5784@ 0_0402_5% 44 AVDDL_LANTX1+ 5784@ 0_0402_5%
    0.1U_0402_16V4Z R719 TRD1_P AVDDH_LANTX2- R718 1 LAN_TX2-
    30 2
    1 PCIE_PLLVDDL LAN_TX0- 5787@ 0_0402_5%
    +PCIE_VDD 1 2 27 41 LAN_TX0- 20
    5787@ 0_0402_5% PCIE_PLLVDDL TRD0_N LAN_TX0+
    TRD0_P 40 LAN_TX0+ 20
    +PCIE_VDD R720 1 2 LAN_TX2-
    L37 R721 2 LINKLED# 20,26,27 5784@ 0_0402_5%
    +LAN_BIASVDD LINKLED# LANTX2+_LANTX2- R722 1 LAN_TX2+
    2 1 +PCIE_VDD 1 2 1 2
    C FBM-L11-160808-601LMT_0603 1 5784@ 0_0402_5% SPD100LED# 5787@ 0_0402_5% C
    SPD1000LED# 67
    C384 R723 33 66 ACTIVITY# 20,26
    PCIE_VDDL TRAFFICLED# R724 1 LAN_TX2+
    1 2 24 2
    0.1U_0402_16V4Z 5787@ 0_0402_5% PCIE_VDDL 5784@ 0_0402_5%
    GPIO2 8
    2 AVDDL_LANTX2+ R725 1 2 +AVDDL
    10/03 Broadcom 5787@ 0_0402_5%

    L36 9 R304 2 1 @ 0_0402_5% R726 1 2 +AVDDH


    UART_MODE +3V_LAN
    2 1 7 LAN_WP R302 2 1 @ 4.7K_0402_5% 5784@ 0_0402_5%
    +AVDDH GPIO1_SERIALDI
    FBM-L11-160808-601LMT_06032 2 0.1U_0402_16V4Z C393 PCIE_MRX_C_LTX_P1 26 4 R301 2 1 @ 0_0402_5% AVDDH_LANTX1- R727 1 2 LAN_TX1-
    8 PCIE_RXP1 PCIE_TXD_P GPIO0_SERIALDO
    0.1U_0402_16V4Z C392 PCIE_MRX_C_LTX_N1 25 5787@ 0_0402_5%
    8 PCIE_RXN1 PCIE_TXD_N
    C380 C381
    8 PCIE_TXP1 31
    PCIE_RXD_P 10/03 Broadcom
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 32 R728 1 2 LAN_TX1-
    1 1 8 PCIE_TXN1 PCIE_RXD_N
    8,16,18 PEWAKE# 12 5784@ 0_0402_5%
    WAKE# LANTX1-_LANTX1+ R729 1 LAN_TX1+
    16 PEX_RST1# 10 2
    PERST# LAN_CLK 5787@ 0_0402_5%
    11 CLK_PCIE_LAN 29 65
    PCIE_REFCLK_P SCLK_EECLK SI
    NOTE: 11 CLK_PCIE_LAN# 28
    PCIE_REFCLK_N SI
    63
    64 LAN_DATA R730 1 2 LAN_TX1+
    FBM-L11-160808-601LMT_0603: SO_EEDATA
    62 CS# 5784@ 0_0402_5%
    CS#
    600 ohm@100MHz, 350mA AVDDL_LANTX1+ R731 1 2 +AVDDL
    5787@ 0_0402_5%

    59 +3V_LAN
    ENERGY_DET
    C385 1 2 0.1U_0402_16V4Z
    R295 1 2 1K_0402_5% 54 +2.5V_LAN_+1.2V_VDDCIO
    +3V_LAN VAUX_PRSNT
    +3VS R292 1 2 1K_0402_5% 53 C388 1 2 4.7U_0805_10V4Z
    VMAIN_PRSNT
    Layout Notice : Place as close 16 LP_EN# 3
    LOW_PWR 10/03 Broadcom

    3
    chip as possible. R732 Q17
    B
    10/03 Broadcom +3V_LAN R299 2 1 5784@ 4.7K_0402_5% 58
    TEST1 VDDC_IO
    17 1 2
    B
    +3V_LAN R300 2 1 5784@ 4.7K_0402_5% 57 5784@ 0_0402_5% CTL12 1 MMJT9435T1G_SOT223
    TEST2
    +2.5V_LAN_+1.2V_VDDCIO XTALO 22 18 CTL25 +1.2V_LAN
    XTALI XTALO REGOUT12_IO
    21 XTALI

    2
    4
    10/03 Broadcom R297 1 2 1.21K_0402_1% 37
    RDAC 2 1
    C608 C391
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    2 2
    R305 0.1U_0402_16V4Z 10U_0805_10V4Z
    C736

    C737

    2 1 XTALO 1 2
    200_0603_1%
    1 1 XTALI +3V_LAN
    Y4 21.5
    CTL12 +3V_LAN 10/03 Broadcom
    27P_0402_50V8J

    27P_0402_50V8J

    1 2 14
    REGCTL12
    1

    2 25MHZ_16P_XSL025000FK1H 2 C738 1 2 4.7U_0805_10V4Z


    R740
    C401

    C402

    5784@ 4.7K_0402_5% C375 2 1 0.1U_0402_16V4Z

    4
    Q18
    1 1
    2

    11 5787@ PBSS5350D PNP SC74-6


    11 CLKREQ_LAN# CLK_REQ#
    2

    CTL25 3
    GND

    R741 16
    SUPER_IDDQ
    Layout Notice : 1.2V filter. Place as close
    +3V_LAN 5787@ 0_0402_5% BCM5787MA0KMLG_QFN68_10x10
    chip as possible.
    69

    1
    2
    5
    6
    1

    1 2
    +1.2V_LAN
    1

    C403
    0.1U_0402_16V4Z
    R306 R307
    4.7K_0402_5% 4.7K_0402_5%
    4.7U_0805_10V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    A +2.5V_LAN_+1.2V_VDDCIO C398 5787@ 10U_0805_10V4Z A


    2 2 2 2 2 2 2
    2

    U14 1 2
    C404

    C405

    C406

    C407

    C408

    C409

    C610

    8 VCC A0 1
    LAN_WP 7 2 1 2
    1 1 1 1 1 1 1 LAN_CLK WP A1 C609
    6 SCL NC 3
    LAN_DATA 5 4 5787@ 0.1U_0402_16V4Z
    SDA GND
    AT24C02BN-SH-T SO 8P
    R308
    Security Classification Compal Secret Data
    LAN_CLK 1 2 4.7K_0402_5% Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    SI
    R309
    4.7K_0402_5%
    BCM5787M/BCM5784M
    2 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    www.vinafix.vn
    R310 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    CS# 1 2 4.7K_0402_5% DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 19 of 39
    5 4 3 2 1
    5 4 3 2 1

    +2.5V_LAN_+1.2V_VDDCIO

    5787@L55
    5787@ L55 U15
    2 1
    FBM-L11-160808-601LMT_0603
    LAN_TX0- 12 13 MDO0- C412 1000P_1808_3KV7K
    19 LAN_TX0- LAN_TX0+ TD4- MX4- MDO0+
    11 14 75_0402_1%
    19 LAN_TX0+ TRM_CT TD4+ MX4+
    C410 2 1 10 15 C746 1 2<BOM Structure> 2 1 R311 1 2
    TCT4 MCT4
    0.1U_0402_16V4Z LAN_TX1- 9 16 MDO1- 0.01U_0402_50V7K
    19 LAN_TX1- TD3- MX3-
    LAN_TX1+ 8 17 MDO1+ 75_0402_1% 10/03 Broadcom
    D 19 LAN_TX1+ TD3+ MX3+ D
    C413 2 1 TRM_CT 7 18 C747 1 2<BOM Structure> 2 1 R312
    TCT3 MCT3
    0.1U_0402_16V4Z LAN_TX2- 6 19 MDO2- 0.01U_0402_50V7K
    19 LAN_TX2- LAN_TX2+ TD2- MX2- MDO2+
    5 20 75_0402_1%
    19 LAN_TX2+ TRM_CT TD2+ MX2+
    C415 2 1 4
    TCT2 MCT2
    21 C748 1 2<BOM Structure> 2 1 R313 11/21 SKYY
    0.1U_0402_16V4Z LAN_TX3- 3 22 MDO3- 0.01U_0402_50V7K
    19 LAN_TX3- LAN_TX3+ TD1- MX1- MDO3+
    2 23 75_0402_1%
    19 LAN_TX3+ TRM_CT TD1+ MX1+
    C417 2 1 1 24 C749 1 2<BOM Structure> 2 1 R314
    TCT1 MCT1
    0.1U_0402_16V4Z 0.01U_0402_50V7K
    X'FORM_ BOTH-GST5009-LF

    GIGA SP050005610 (S X'FORM_ BOTH-GST5009-LF LAN)


    10/100 SP050001X10 (S X'FORM_ TST1284-LF ETHERNET 10/100)

    V_3P3_LAN
    JP7
    R315 11 Yellow LED+

    19,26 ACTIVITY# 1 2 12
    300_0402_5% Yellow LED-
    SHLD1 15
    26 MDO3- 8 PR4-
    C419 13
    26 MDO3+ DETECT PIN1 CABLE_DET 16,27
    7
    C PR4+ C
    1 2
    26 MDO1- MDO1- 6
    @ 680P_0402_50V7K PR2-
    1
    26 MDO2- 5 C420
    PR3-
    26 MDO2+ 4 0.1U_0402_16V4Z
    0125 EMI request PR3+ 2
    26 MDO1+ MDO1+ 3
    PR2+
    26 MDO0- MDO0- 2
    PR1-
    26 MDO0+ MDO0+ 1
    PR1+
    SHLD1 14
    V_3P3_LAN 9
    Green LED+

    19,26,27 LINKLED# R316 1 2 10


    300_0402_5% Green LED-
    SUYIN_100073FR014G303ZL_13P
    C421
    1 2

    @ 680P_0402_50V7K

    0125 EMI request


    +3V_LAN V_3P3_LAN
    S

    3 D1
    1

    Q19
    B R317 NTR4101PT1G_SOT23 B
    G
    2

    100K_0402_5%
    2

    D
    1

    2 Q20
    26,27 PREP#
    G 2N7002_SOT23
    S
    3

    Table 1 - Component Stuffing Requirements

    Install Not Installed

    5787M

    5784M

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LAN CONTROLLER

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 20 of 39
    5 4 3 2 1
    5 4 3 2 1

    VCC_ROUT
    Change in 4/19

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.47U_0402_6.3V6K

    0.47U_0402_6.3V6K
    1 1 1 1

    C422

    C423

    C424

    C425
    2 2 2 2

    06/28 RICHO
    +3VS

    10U_0805_10V4Z

    10U_0805_10V4Z
    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.01U_0402_16V7K

    0.1U_0402_16V4Z
    D D
    1 1 1 1 1 1 1 1 1 1 1

    Close to Pin F5, J19 & K19. Close to Pin W3, R11, R12.

    C428

    C429

    C430

    C431

    C432

    C433

    C434

    C435

    C436

    C437

    C438
    2 2 2 2 2 2 2 2 2 2 2

    R12
    R11
    K19

    E14

    E13
    J19

    W3
    G5

    R6
    A4

    F5

    L1
    U16B
    Close to Pin

    VCC_3V3

    VCC_3V3
    VCC_3V2
    VCC_3V1

    VCC_ROUT2
    VCC_ROUT1
    VCC_RIN2
    VCC_RIN1

    VCC_PCI3
    VCC_PCI2
    VCC_PCI1
    VCC_MD3V
    PCI_AD[0..31] PCI_AD31 M2
    14 PCI_AD[0..31] AD31 A17 & E10.
    PCI_AD30 M1
    PCI_AD29 AD30 AVCC_PHY
    N5 AD29 +3VS
    PCI_AD28

    10U_0805_10V4Z
    0.01U_0402_16V7K

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    N4

    1000P_0402_50V7K

    1000P_0402_50V7K
    PCI_AD27 AD28
    N2 1 1 1 1 1 1
    PCI_AD26 AD27
    N1
    PCI_AD25 AD26
    08/17 RICHO

    C439

    C440

    C441

    C442

    C443

    C444
    P5 AD25
    PCI_AD24 P4 E10
    PCI_AD23 AD24 AVCC_PHY3V1 2 2 2 2 2 2
    R4 AD23 AVCC_PHY3V2 E11
    PCI_AD22 R2 A17
    PCI_AD21 AD22 AVCC_PHY3V3
    R1 B17
    AD21 AVCC_PHY3V4

    2
    PCI_AD20 T2
    PCI_AD19 AD20 R613
    T1 AD19
    PCI_AD18 U2 1394@ 0_0402_5% NO1394@ 0_0402_5%
    PCI_AD17 AD18
    U1 2 1
    PCI_AD16 AD17 R614
    V1 AD16 CPS D11

    1
    PCI_AD15 T7 XIN 1 2
    PCI_AD14 AD15
    V7
    AD14
    C697 06/21 HP

    1
    PCI_AD13 W7 1394@ 10P_0402_50V8J
    PCI_AD12 AD13 X1 1394@
    R8 AD12 XI A16
    PCI_AD11
    PCI_AD10
    T8
    V8
    AD11
    24.576MHz_16P_3XG-24576-43E1
    C698 1394@ 10P_0402_50V8J ONLY FOR DEBUG
    AD10

    2
    C PCI_AD9 XOUT C
    Layout : W8 AD9 XO B16 1 2
    PCI_AD8 R9
    PCI_AD7 AD8
    Please add GND shield 4/27 V9
    AD7 Layout : With GND shield.
    PCI_AD6 W9
    CLK_PCI_PCM PCI_AD5 AD6
    T11 AD5 FIL0 A14
    PCI_AD4 V11 1394@
    AD4
    1

    R5C847
    PCI_AD3 W11 B14 R604 2 1 10K_0402_1% 1394@ 1394@ 1394@
    R318 PCI_AD2 AD3 REXT 56.2_0402_1% 56.2_0402_1% 0.33U_0603_16V4Z
    T12
    @ 10_0402_5% PCI_AD1 AD2 C699
    V12 AD1 VREF D13 1 2 0.01U_0402_16V7K

    1
    PCI_AD0 W12 1394@ 1 1
    AD0 R605 R606 C700 C701
    2

    1 PCI_CBE#3 P2 0.01U_0402_16V7K
    C445 14 PCI_C/BE#3 PCI_CBE#2 C/BE3# XTPBIAS0 1394@
    W2 C/BE2# TPBIAS0 D12
    @ 15P_0402_50V8J 14 PCI_C/BE#2 PCI_CBE#1 2 2
    W6
    14 PCI_C/BE#1 C/BE1#

    2
    PCI_CBE#0 T9
    2 14 PCI_C/BE#0 C/BE0#
    XTPB0-
    14 PCI_PAR
    14 PCI_FRAME#
    V6
    V3
    PAR TPBN0
    A13
    1394 CONN
    FRAME# XTPB0+ CONN@
    14 PCI_TRDY# W4 B13
    TRDY# TPBP0
    14 PCI_IRDY# V4 JP27
    R319 IRDY#
    14 PCI_STOP# V5 1
    100_0402_5% 14 PCI_DEVSEL# STOP# XTPA0- XTPB0-
    T5 A12 2
    PCI_AD19 PCI_IDSEL DEVSEL# TPAN0 XTPB0+
    1 2 P1 3
    IDSEL XTPA0+ XTPA0-
    14 PCI_PERR# W5 B12 4
    PERR# TPAP0 XTPA0+
    14,27 PCI_SERR# T6 5
    SERR# GND

    1
    14 PCI_REQ#0 M4
    REQ# Layout : 6
    GND
    M5 R607 R608 7
    R320
    14 PCI_GNT#0 GNT#
    E12
    With GND shield. 56.2_0402_1% 56.2_0402_1% 8
    GND
    0_0402_5% CLK_PCI_PCM NC1 1394@ 1394@ GND
    11 CLK_PCI_PCM K1
    PRST# PCICLK SUYIN_020204FR004S506ZL_4P
    8,14,18,25,28 PCI_RST# 2 1 L4 D10
    PCIRST# NC2

    2
    1 2 GRST# G2
    4,15,27 SB_PWRGD GBRST#
    R321 @ 0_0402_5% A11
    NC3

    2
    B C702 1 B
    16,25,27 PM_CLKRUN# L5 CLKRUN#
    PCI_PME853# G4 B11 R609
    Add by Richo 5/4 RI_OUT#/PME# NC4
    5.1K_0402_5%
    9,14 PCI_PIRQA#
    R322 1 2 0_0402_5% J2 INTA# NC5 A10 Place those components as 270P_0402_25V8J
    2
    1394@ Install 1394 Remove 1394
    R323 1 2 0_0402_5% K4 1394@
    14 PCI_PIRQB# INTB# close to R5C847.

    1
    14 PCI_PIRQC#
    R324 1 2 0_0402_5% K2
    INTC# NC6
    B10 R607 56.2 ohm 0 ohm
    L2
    NC
    R608 56.2 ohm 0 ohm
    G1
    UDIO5
    R574 1 2 10K_0402_5% H5 UDIO4 TEST1 F4 R609 5.1K ohm 0 ohm
    1394_DAT H4
    1394_CLK UDIO3
    H2 R7
    UDIO2 TEST2
    H1 UDIO1
    +3VS R326 1 2 0_0402_5% J4 When you don't use 1394; (1394@ is not mount.)
    16,25,27 SIRQ UDIO0/SRIRQ#
    10K_0402_5%
    06/28 RICHO R329 1 2 HWSPND# F2 Please connect to GND the XI, TPBN0 and TPBP0 signal.
    HWSPND#
    R330 1 2 PCM_SPK F1 Please don't connect to anywhere the CPS, FIL0, REXT,
    AGND6
    AGND5
    AGND4
    AGND3
    AGND2
    AGND1
    GND10

    SPKROUT#
    08/17 RICHO
    GND9
    GND8
    GND7
    GND6
    GND5
    GND4
    GND3
    GND2
    GND1

    100K_0402_5% VREF, TPBIAS0, TPAN0 and TPAP0 signal. (OPEN)


    R327 R5C847
    M19
    L15
    W10
    V10
    T10
    R10
    E9
    K5
    J5
    J1

    B15
    A15
    D14
    D9
    B9
    A9

    @ 100K_0402_5%

    23 PCM_SPK PCM_SPK

    +3VS

    R610 1 2 1394@ 10K_0402_5% 1394_CLK +3VS


    A R611 10K_0402_5% 1394_DAT A
    1 2
    R328 1 2 10K_0402_5% PCI_PME853# C703
    R331 1 2 100K_0402_5% GRST# 1 2
    C658
    2 1 @ 0.1U_0402_16V4Z

    1U_0402_6.3V4Z U39

    1394_CLK
    8
    7
    VCC
    WP
    A0
    A1
    1
    2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    6 SCL A2 3 Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    1394_DAT 5 SDA GND 4
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    RICOH R5C853 (1/2)

    www.vinafix.vn
    @ AT24C02N-10SU-2.7_SO8 Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 21 of 39
    5 4 3 2 1
    5 4 3 2 1

    +3VS +S1_VCC Near to PCMCIA slot.


    U17

    10 7 +S1_VCC

    0.1U_0402_16V4Z
    AVCC3IN AVCCOUT
    1 6 8
    AVCC5IN AVCCOUT
    Slot A
    VCC3EN#

    C446
    2 AVCC3_EN Power AVPPOUT 9 +S1_VPP 1 1
    VCC5EN# 1 Supply C447 C448
    2 AVCC5_EN
    VPPEN0 4 5 10U_0805_10V4Z 0.1U_0402_16V4Z
    AEN0 TST +5VS 2 2
    U16A VPPEN1 3 AEN1
    D S1_A25 J18 W13 VPPEN1 +SD_3VCC D
    S1_A24 CADR25/CAD19 VPPEN1 VPPEN0 +5VS
    J15 CADR24/CAD17 VPPEN0 V13
    S1_A23 K16 T13 VCC3EN# 11 13
    CADR23/CFRAME# VCC3EN# BVCC3IN BVCCOUT

    1
    S1_A22 VCC5EN# R332

    0.1U_0402_16V4Z
    L16 R13 15 14
    S1_A21 CADR22/CTRDY# VCC5EN# BVCC5IN BVCCOUT
    L18 1
    S1_A20 CADR21/CDEVSEL# SD_PWRON# 19 Slot B +S1_VPP
    M16 CADR20/CSTOP# BVCC3_EN BVPPOUT 12
    S1_A19

    C449
    N19 C1 +5VS 2 1 20 Power
    R333 S1_A18 CADR19 NC 100K_0402_5% R618 10K_0402_5% BVCC5_EN
    N16 CADR18 Supply
    2

    2
    33_0402_5% S1_A17 P16 D1 06/28 RICHO 17 16 1 1
    S1_A16_C S1_A16 CADR17/CAD16 NC BEN0 GND C450 C451
    1 2 L19 18
    S1_A15 CADR16/CCLK BEN1
    Close to Pin L19 S1_A14
    K15 CADR15/CIRDY# NC E1
    0.1U_0402_16V4Z
    N18 10U_0805_10V4Z
    within 100mils. CADR14/CPERR# 2 2

    1
    S1_A13 N15 C2 R5534V-E2-FB_SSOP20
    S1_A12 CADR13/CPAR NC R334 R335
    K18
    S1_A11 CADR12/CCBE2# 100K_0402_5% 100K_0402_5%
    R18 D2
    S1_A10 CADR11/CAD12 NC
    U19
    S1_A9 CADR10/CAD9
    R19 CADR9/CAD14 NC E2

    2
    S1_A8 P15
    S1_A7 CADR8/CCBE1#
    J16 CADR7/CAD18 NC E4
    S1_A6 H15
    S1_A5 CADR6_CAD20
    H18
    S1_A4 CADR5/CAD21
    G15
    S1_A3 CADR4/CAD22
    G18 CADR3/CAD23
    S1_A2 F15
    S1_A1 CADR2/CAD24
    F18 E8
    S1_A0 CADR1/CAD25 MDIO19
    E16 CADR0/CAD26
    D8
    MDIO18
    S1_D15 U18 JP8
    CDATA15/CAD8
    R5C847
    S1_D14 W18 B8 MMC_D7
    S1_D13 CDATA14 MDIO17 MMC_D6
    V17 A8 1 35
    S1_D12 CDATA13/CAD6 MDIO16 MMC_D5 S1_D3 GND GND S1_CD1#
    V16 E7 2 36
    C S1_D11 CDATA12/CAD4 MDIO15 MMC_D4 S1_D4 S1_D3 S1_CD1# S1_D11 C
    V15 CDATA11/CAD2 MDIO14 D7 3 S1_D4 S1_D11 37
    S1_D10 B19 B7 SD3 S1_D5 4 38 S1_D12
    S1_D9 CDATA10/CAD31 MDIO13 SD2 S1_D6 S1_D5 S1_D12 S1_D13
    C18
    CDATA9/CAD30 MDIO12
    A7 Layout : 5
    S1_D6 S1_D13
    39
    S1_D8 D18 E6 SD1 S1_D7 6 40 S1_D14
    S1_D7 CDATA8/CAD28 MDIO11 SD0
    With GND shield. S1_CE1# S1_D7 S1_D14 S1_D15
    W17 CDATA7/CAD7 MDIO10 D6 7 S1_CE1# S1_D15 41
    S1_D6 W16 S1_A10 8 42 S1_CE2#
    S1_D5 CDATA6/CAD5 S1_OE# S1_A10 S1_CE2# S1_VS1
    W15 CDATA5/CAD3 9 S1_OE# S1_VS1 43
    S1_D4 T15 B6 SD_CLK_R 1 2 SD_CLK S1_A11 10 44 S1_IORD#
    S1_D3 CDATA4/CAD1 MDIO09 R336 10_0402_5% S1_A9 S1_A11 S1_IORD# S1_IOWR#
    R14 CDATA3/CAD0 11 S1_A9 S1_IOWR# 45
    S1_D2 C19 A6 SD_CMD S1_A8 12 46 S1_A17
    S1_D1 CDATA2 MDIO08 S1_A13 S1_A8 S1_A17 S1_A18
    D19 CDATA1/CAD29 13 S1_A13 S1_A18 47
    S1_D0 E19 D5 S1_A14 14 48 S1_A19
    CDATA0/CAD27 MDIO07 S1_WE# S1_A14 S1_A19 S1_A20
    15 S1_WE# S1_A20 49
    B5 S1_RDY# 16 50 S1_A21
    S1_OE# MDIO06 S1_RDY# S1_A21
    T19 +S1_VCC 17 51 +S1_VCC
    S1_WE# OE#/CAD11 S1_VCC S1_VCC
    M15 A5 18 52 +S1_VPP
    S1_CE2# WE#/CGNT# MDIO05 +S1_VPP S1_A16_C S1_VPP S1_VPP S1_A22
    T18 19 53
    S1_CE1# CE2#/CAD10 SD_PWRON# S1_A15 S1_A16 S1_A22 S1_A23
    V19 B4 20 54
    S1_REG# CE1#/CCBE0# MDIO04 S1_A12 S1_A15 S1_A23 S1_A24
    F16 21 55
    S1_RST REG#/CCBE3# SD_WP S1_A7 S1_A12 S1_A24 S1_A25
    H19 RESET/CRST# MDIO03 B3 22 S1_A7 S1_A25 56
    S1_WAIT# G16 S1_A6 23 57 S1_VS2
    S1_WP WAIT#/CSERR# S1_A5 S1_A6 S1_VS2 S1_RST
    A18 A3 24 58
    S1_RDY# WP/CCLKRUN# MDIO02 S1_A4 S1_A5 S1_RST S1_WAIT#
    M18 25 59
    S1_BVD2 RDY/CINT# S1_A3 S1_A4 S1_WAIT# S1_INPACK#
    F19 A2 26 60
    S1_BVD1 BVD2/CAUDIO MDIO01 S1_A2 S1_A3 S1_INPACK# S1_REG#
    E18 27 61
    S1_VS2 BVD1/CSTSCHG SD_CARD_DET# S1_A1 S1_A2 S1_REG# S1_BVD2
    H16 B1 28 62
    S1_VS1 VS2#/CVS2 MDIO00 S1_A0 S1_A1 S1_BVD2 S1_BVD1
    R16 VS1#/CVS1 29 S1_A0 S1_BVD1 63
    S1_CD2# D15 S1_D0 30 64 S1_D8
    S1_CD1# CD2#/CCD2# S1_D1 S1_D0 S1_D8 S1_D9
    T14 31 65
    S1_INPACK# CD1#/CCD1# S1_D2 S1_D1 S1_D9 S1_D10
    G19 32 66
    INPACK#/CREQ# S1_WP S1_D2 S1_D10 S1_CD2#
    33 67
    S1_IORD# S1_WP S1_CD2#
    P18 34 68
    B S1_IOWR# IORD#/CAD13 GND GND B
    P19 IOWR#/CAD15 69 GND GND 70
    71 GND GND 72
    V14 73 74
    USBDP GND GND
    W14 USBDM 75 GND GND 76
    77 78
    GND GND
    79 80
    R5C847 GND GND
    81 82
    C452 GND GND
    83 84
    S1_CD1# GND GND
    1 2

    270P_0402_50V8J SANTA_130611-6_68P_RT

    C453
    S1_CD2# 1 2

    270P_0402_50V8J

    06/28 RICHO
    JP9
    SD0 7 4 4.7U_0805_10V4Z
    D0 VDD +SD_3VCC
    SD1 8 D1
    2

    SD2 9 08/15 1 C457


    SD3 D2 R619 C456
    1 D3
    MMC_D4 10 14 SD_WP
    MMC_D5 D4 WP SD_CARD_DET# 150K_0402_5% 0.1U_0402_16V4Z
    11 15
    @ 22P_0402_50V8J MMC_D6 D5 CD 2
    12 D6
    1

    MMC_D7 13 6
    C455 R337 @ 10_0402_5% D7 VSS2 C454 1
    3 2
    VSS1
    1 2 SD_CLK 5
    CLK VSS3
    16
    17 100P_0402_50V8J Near to JP9.
    SD_CMD VSS4
    2 CMD
    A A

    TAI_PSDBT0-16GNBS7N14N0_15P

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    RICOH R5C853 (2/2)

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 22 of 39
    5 4 3 2 1
    A B C D E

    AMP. FOR INTERNAL SPEAKER

    1
    VDDA_CODEC GAIN1 GAIN0
    09/01 HP +5VALW
    D5 @
    PACDN042_SOT2
    VDDA_CODEC +5VALW
    10dB 0 0

    1
    20_0402_5%

    3
    06/30 HP 12dB 0 1

    R649
    15.6dB 1 0
    JP10

    1
    MIC_BIAS_IN R_SPK+
    1 21.6dB 1 1
    R_SPK-

    @ 100K_0402_5%
    R342

    C458

    C460

    C461
    2 2
    100K_0402_5%

    Close to Pin29

    Close to Pin30
    1 C719 ACES_85204-02001_2P 1

    R341
    2 1 2
    GAIN1 R338 0_0402_5%

    100P_0402_50V8J

    100P_0402_50V8J
    4.7U_0805_10V4Z 2 1
    1

    2
    +5VALW
    1 1
    09/28 HP GAIN0

    0.1U_0402_10V6K_X5R

    1U_0603_10V4Z_X5R
    R339 1 @ 0_0402_5%

    C462

    C463
    2
    1 2 1 VDDA_CODEC
    C716 2 HP_IN_L

    10U_0805_10V4Z
    1
    2 2 2.2U_0603_16V6K_X5R
    C717 2 1 HP_IN_R
    2.2U_0603_16V6K_X5R

    HP_INR
    HP_INL
    GAIN1

    GAIN0
    SLP_S3# 16,19,27,29,34,36
    DVCORE

    2 2

    33

    32

    31

    30

    29

    28

    27

    26

    25
    C482 C683 U18
    0.1U_0402_16V4Z 4.7U_0805_10V4Z 06/30 HP

    TML

    GAIN1

    GAIN0

    HP_INL
    REG_OUT
    VDD

    SGND

    HP_INR

    REG_EN
    1 1 07/04 HP
    C720 R651 0_0402_5% R653 0.47U_0402_6.3V6K_X5R
    LINE_OUTL 1 2 LINE_C_OUTL 1 2 2 2 1 1 2 24 2 1
    VDDA_CODEC C721 1U_0603_10V4Z_X5R C466 17.4K_0603_1% SPKR_RIN+ BYPASS C465
    LINE_OUTR 1 2 LINE_C_OUTR 1 2 LINE_OUT 2.2U_0603_16V6K_X5R 1 23 A_SD
    R652 0_0402_5% SPKR_RIN- SPKR_EN#
    1

    1U_0603_10V4Z_X5R C468 2 1 3 22 HP_EN 1 R347 2 +5VALW


    0.47U_0402_6.3V6K_X5R SPKR_LIN+ HP_EN @ 100K_0402_5%
    R348 C467 2 1 4 21
    10K_0402_5% C469 06/28 HP 0.47U_0402_6.3V6K_X5R SPKR_LIN- SPGND
    0.1U_0402_16V4Z R350 5 SPGND 20 R_SPK+
    ROUT+
    2

    1 2 1 2 100K_0402_5% 1 2 MONO_IN_HD
    C470 0.1U_0402_16V4Z 2 1 L_SPK+ 6 19 R_SPK-
    LOUT+ ROUT-
    6

    Q21A C471 0.47U_0402_6.3V6K_X5R


    +3VS L_SPK-
    R353

    C473

    2N7002DW T/R7_SOT-363-6 2 1 7 18 +5VALW


    2 R352 C472 0.47U_0402_6.3V6K_X5R LOUT- SPVDD 2
    0_0805_5%

    C474
    C475
    21 PCM_SPK 2 +5VALW 8 17
    VDDA_CODEC SPVDD HPVDD
    1

    2 2 1

    1U_0603_10V4Z_X5R
    C476

    C477

    HP_OUTR
    2 1

    HP_OUTL
    1

    +3VS_CODEC

    10U_0805_10V4Z

    CPGND
    CPVDD

    CPVSS

    HPVSS
    1 1 2

    C1N
    C1P
    VDDA_CODEC

    1U_0603_10V4Z_X5R
    C478 C479 C481 C483 C484
    1 2
    2

    0.01U_0402_16V7K

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    1 1 1 1 1 2
    10K_0402_5%

    TPA6041A4RHBR QFN 32P

    10U_0805_10V4Z
    MIC_BIAS_IN
    2 1

    10

    11

    12

    13

    14

    15

    16
    1

    C485

    DVCORE
    R354 4.7U_0805_10V4Z
    10K_0402_5% 2 2 2 2 2 1

    C487
    1U_0603_10V4Z
    C486

    10U_0805_10V4Z
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    1

    1U_0603_10V4Z_X5R
    0.1U_0402_16V4Z R355 HP_OUTL 24
    2

    1 2 1 2 HP_OUTR 24

    C488
    2
    3

    Q21B 100K_0402_5%

    25

    38

    33

    9
    2N7002DW T/R7_SOT-363-6 U19 2
    47uF_6.3V_1.3_H1.9 R644 L60 09/01 HP 06/28 HP

    DVIO
    AVDD1

    AVDD2

    DVCORE
    MIC_BIAS_IN

    DVDD
    5 1 2 C714 2 1 2 1

    +
    16 SB_SPKR DLINE_OUT_L 26
    60.4_0402_1% CHB1608B121YZF_0603
    C491 1
    1 2 C715 2 1 2 1

    +
    DLINE_OUT_R 26
    4

    R356 2 1 4.7K_0402_5% DLINE_IN_R_L 1 2 DLINE_IN_RC_L 14 35 R645 CHB1608B121YZF_0603


    26 DOCK_LINE_IN_L AUX1 LINE_OUT_L

    10K_0402_5%
    R357 2 1 4.7K_0402_5% C492 1U_0603_10V4Z_X5R 47uF_6.3V_1.3_H1.9 60.4_0402_1% L61

    1
    DLINE_IN_R_R 2 DLINE_IN_RC_R

    10K_0402_5%
    R358 2 1 4.7K_0402_5% 1 15 36
    26 DOCK_LINE_IN_R AUX2 LINE_OUT_R
    R359 4.7K_0402_5% 1U_0603_10V4Z_X5R

    R646

    R647
    2 1
    LINE_OUTL 16 32 06/28 HP +5VALW
    AUX3 MONO_OUT
    06/28 HP
    LINE_OUTR 17 39 HP_IN_L
    AUX4 HP_LOUT_L

    2
    1 2 INT_MICL_C 23 41 HP_IN_R R642 SENSE_A_A
    C489 1U_0603_10V4Z_X5R LINE_IN_L HP_LOUT_R R360 2 1 @ 10_0402_5% C494 1 2 @ 10P_0402_50V8J 100K_0402_5%

    3
    3 C490 1 INT_MICR_C 3
    24 INT_MIC 2 24 LINE_IN_R
    1U_0603_10V4Z_X5R 6 AZ_BITCLK_HD 16
    BIT_CLK

    1
    R349
    8 AC97_SDIN0_CODEC 2 1 HP_EN 1 2 5 Q30B
    SDATA_IN AZ_SDIN0_HD 16
    Place close to U19 R361 33_0402_5%
    R707 1 2 15K_0402_1% VDDA_CODEC 0_0402_5%

    4
    C684 1 2 1U_0603_10V4Z 19 R678 2 1 4.7K_0402_5% VDDA_CODEC
    CD_GND
    GPIO_0/EAPD
    47 R679 1 2@ 10K_0402_5% 08/17 HP 24 HP_DET
    1 2 MIC1_C 21 31 R587 2 1 0_0402_5% 2N7002DW T/R7_SOT-363-6
    VDDA_CODEC 24 MIC1 MIC1 GPIO_1/MIC_BIASE-E A_EAPD 27
    C495 1U_0603_10V4Z X5R 30 D45 2 1@ CH751H-40_SC76 A_SD 27
    MIC2_C GPIO_2 R680 2
    2 1 1 2 22 MIC2 DM_1/DM_2 2 1@ 4.7K_0402_5%
    C497 0.1U_0805_25V7M 24 MIC2 C496 1U_0603_10V4Z X5R 4
    R362 1 SENSE_A DM_3/DM_4
    2 2.67K_0402_1% 13 SENSE_A/SRC_B DM_CLK 46
    R365 1 2 2.67K_0402_1% SENSE_B 34
    SENSE_B/SRC_A SENSE_A R364 1 SENSE_A_A
    2 1 24 SENSE_A 2 39.2K_0402_1%
    C500 0.1U_0805_25V7M +3VS R659 2 1@ 4.7K_0402_5% 1

    1
    27 AUD_REF R366 1 2 20K_0402_1% SENSE_A_B
    VREF_FILT R639 C727

    1U_0603_10V4Z
    11

    0.1U_0402_16V4Z
    16 AZ_RST_HD# RESET# @ 0_0402_5% 1U_0603_10V4Z

    C498

    C499
    2 1 28 MIC_BIAS_B 1 1
    MIC_BIAS_B 2
    C502 0.1U_0805_25V7M
    16 AZ_SYNC_HD 10
    SYNC MIC_BIAS_C
    29 MIC_BIAS_C 06/28 HP

    2
    5 12 MONO_IN_HD SENSE_B R367 1 2 SENSE_B_C
    16 AZ_SDOUT_HD SDATA_OUT PCBEEP 2 2
    2 1
    C503 0.1U_0805_25V7M 18 1 39.2K_0402_1%
    N/C

    6
    20 C501 Q23A
    N/C 2N7002DW T/R7_SOT-363-6
    37
    N/C SENSE_A_B 1U_0603_10V4Z
    2 1 N/C 43
    R370 0_1206_5% 44 2 2
    N/C 3 LINE_IN_SENSE 26
    08/21 48
    S/PDIF_OUT N/C
    40

    1
    45 1
    N/C

    1
    R369 C504
    4
    GND GNDA AVSS1 26
    PIN42
    5 MIC_SENSE 24 100K_0402_5% 0.1U_0402_16V4Z
    4
    7 42
    DVSS AVSS2 Q23B 2
    4

    2
    AD1984AJCPZ-RL_LFCSP48_7X7 2N7002DW T/R7_SOT-363-6
    Port A = headphone out
    Port B = external mic in
    Port C = internal mic array
    Port D = dock headphone out Security Classification Compal Secret Data Compal Electronics, Inc.
    Port E = dock line in Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    Port F = internal speaker out
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AC97 CODEC AD1981HD

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 23 of 39
    A B C D E
    A B C D E

    06/28 HP
    JP11
    23 HP_DET 5

    L44 4
    CHB1608B121YZF_0603
    HP_OUTR 1 2 1 2 3
    23 HP_OUTR
    R640 60.4_0402_1% 6
    HP_OUTL 1 2 1 2 HP_OUT_L 2
    23 HP_OUTL
    R641 L45 1

    470P_0402_50V7K

    470P_0402_50V7K
    60.4_0402_1%

    C506

    C507
    2

    2
    CHB1608B121YZF_0603 10/20 CONN@ FOX_JA6033L-B5S3-7F_6P
    R376 R377 1 1
    1 2
    1 10K_0402_5% 10K_0402_5% C730 @ 0.1U_0402_50V 1

    2 2 08/17 HP

    1
    D38 VDDA_CODEC +V_AMP
    R660
    3
    1 1 2 0_0402_5%
    +5VALW 2
    +5VALW R661
    07/01 HP
    @ 1 2 @ 0_0402_5%
    PACDN042_SOT2

    1
    R379
    47K_0402_5%

    +V_AMP CODEC_REF

    2
    JP12 VDDA_CODEC
    MIC_SENSE 5
    MIC_BIAS_B 23 MIC_SENSE

    1
    L46 4
    CHB1608B121YZF_0603 R387
    1 2 EXT_MICB 1 2 EXT_MICB_R 3 47K_0402_5%
    R382 3.9K_0402_1% 6

    4
    1 2 EXT_MICA 1 2 EXT_MICA_R 2 U20A

    2
    R384 3.9K_0402_1% L47 1 3 TLV2464_TSSOP14

    P
    +

    470P_0402_50V7K

    470P_0402_50V7K
    CHB1608B121YZF_0603

    C514

    C515

    C516
    0.1U_0402_16V4Z
    OUT 1 1 2

    1
    CONN@ FOX_JA6033L-B5S3-7F_6P 1 2 R388
    -

    G
    1 1 1 C517 R389 100_0402_5% 1
    47K_0402_5% C518

    11
    4.7U_0805_10V4Z 4.7U_0805_10V4Z
    2
    2 2 2 2

    2
    2 2
    1 2
    C731 @ 0.1U_0402_50V
    08/17 HP

    EXTERNAL MICROPHONE/LINE OUT JACK

    CODEC_REF
    EXT_MICA_2 1
    C519
    2
    100P_0402_50V8J
    AMP. FOR EXTERNAL MICROPHONE EXT_MICB_2
    CODEC_REF
    1
    C520
    2
    100P_0402_50V8J
    1 2
    1 2 R390 100K_0402_5%
    R391 100K_0402_5%
    100P_0402_50V8J

    100P_0402_50V8J
    C521

    C522
    1 1
    +V_AMP +V_AMP

    2 2
    4

    4
    L50 5 L51 10
    P

    P
    HLC0603CSCCR11JT_0603 + MIC1 HLC0603CSCCR11JT_0603 + MIC2
    7 MIC1 23 8 MIC2 23
    3 EXT_MICA OUT OUT 3
    2 1 EXT_MICA_1 1 2 EXT_MICAR 1 2 6 -
    EXT_MICB 2 1 EXT_MICB_1 1 2 EXT_MICB1 1 2 9 -
    G

    G
    C525 0.47U_0402_6.3V6K X5R R394 10K_0402_5% U20B C526 0.47U_0402_6.3V6K X5R R395 10K_0402_5% U20C
    TLV2464_TSSOP14 TLV2464_TSSOP14
    11

    11
    1 1
    C528 C530
    68P_0402_50V8J 68P_0402_50V8J
    2 2

    MIC_BIAS_C
    R643
    1

    INT_MIC_4 C531 1 2 220P_0402_25V7K


    D46 23 SENSE_A 1 2
    PACDN042_SOT2 1 2
    2

    6
    @ R397 100K_0402_5% 5.1K_0603_1%
    R648
    3K_0402_5%
    2

    CODEC_REF +V_AMP Q30A 2 DOCK_HPS# 26


    JP13 2N7002DW T/R7_SOT-363-6
    1

    AMP. FOR INTERNAL


    INT_MIC_2
    1

    2
    2 R662
    100P_0402_50V8J
    C533

    0.1U_0402_16V4Z

    1 2
    ACES_85204-02001_2P
    MICROPHONE
    100K_0402_5%
    CONN@ C536
    C535

    1
    VDDA_CODEC 2 08/17 HP 1
    0.1U_0402_16V4Z

    1
    4 4

    2
    4

    R402 L52 R403 12


    P

    @ 3K_0402_5% C537 HLC0603CSCCR11JT_0603 10K_0402_5% + INT_MIC


    OUT 14 INT_MIC 23
    1 2 INT_MIC_1 1 2 1 2 INT_MIC_3 1 2 INT_MIC3 1 2 13
    -
    G

    R401 @ 3K_0402_5% U20D


    1 0.1U_0402_16V4Z 1 TLV2464_TSSOP14 Security Classification Compal Secret Data Compal Electronics, Inc.
    11
    1

    C538 C539
    1U_0603_10V4Z C718 68P_0402_50V8J Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    2
    @ 47P_0402_50V8J
    2 AMP & Audio Jack
    2

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 24 of 39
    A B C D E
    5 4 3 2 1

    +3VS +3VALW
    USB CONNECTOR 0
    +5VALW USB_VCCA
    TPM1.2 on board

    C540

    C541

    C542

    C543
    TPM@ 0.1U_0402_16V4Z

    TPM@ 0.1U_0402_16V4Z

    TPM@ 0.1U_0402_16V4Z

    TPM@ 0.1U_0402_16V4Z
    U21 1 1 1 1
    D D
    1 GND OUT 8 W=100mils JP14 CONN@
    2 IN OUT 7 1 1
    USB20_N0_R 2 2 2 2 2

    150U_D_6.3VM

    0.1U_0402_16V4Z
    3 IN OUT 6 1 2
    1 4 5 1 1 USB20_P0_R 3
    C545 EN# OC# + 3

    C544

    C546
    4
    C547 4
    5 GND
    4.7U_0805_10V4Z G548A2P1U 6
    2 2 2 2 1000P_0402_50V7K GND
    7 GND
    8

    24
    19
    10
    GND

    5
    <BOM Structure> U22
    SUYIN_020173MR004S558ZL_4P

    VSB
    VDD
    VDD
    VDD
    SLP_S5 LPC_AD0 26
    15,18,27,28 LPC_AD0 LPC_AD1 LAD0
    23 LAD1
    15,18,27,28 LPC_AD1 LPC_AD2
    For EMI R407
    1 2 +5VALW +3VS 15,18,27,28 LPC_AD2 LPC_AD3
    20
    17
    LAD2
    6 TPM_GPIO +3VS
    15,18,27,28 LPC_AD3 LAD3 GPIO PAD T28
    R406 0_0402_5% 10K_0402_5% LPC_FRAME# 22 2 TPM_GPIO2 PAD T29
    D6 15,18,27,28 LPC_FRAME# PCI_RST# LFRAME# GPIO2
    1 2 8,14,18,21,28 PCI_RST# 16 LRESET#
    Base I/O Address

    1
    1 3 USB20_P0_R R408 1 2 28 0 = 02Eh
    GND IO2 LPCPD#
    L66 TPM@ 10K_0402_5% 16,21,27 SIRQ 27 SERIRQ
    1 =* 04Eh
    1 1 2 USB20_N0_R 2 4 USB_VCCA 11 CLK_PCI_TPM 21 R409
    USB20_N0 2 USB20_N0_R IO1 VIN LCLK R411 TPM@ 4.7K_0402_5%
    14 USB20_N0 USB20_P0 USB20_P0_R @ PRTR5V0U2X_SOT143-4 TPM@ 0_0402_5%
    2 1 2 1
    14 USB20_P0

    2
    4 3 +3VS C548 R410 @ 10_0402_5% 15 8 2 1 2 1
    4 3 @ 10P_0402_50V8J CLKRUN# TEST1
    TESTB1/BADD 9
    @ KING_WCM-2012-670T 11/19 EMI 16,21,27 PM_CLKRUN# R412

    1
    7 @ 4.7K_0402_5%
    PP
    1 2
    R415 0_0402_5% R413 3
    @ 4.7K_0402_5% TPM_XTALO NC
    14 XTALO NC 12
    NC 1

    2
    TPM_XTALI 13
    XTALI/32K IN
    USB/B CONNECTOR

    1
    C C

    GND
    GND
    GND
    GND
    R414
    +5VALW TPM@ 0_0402_5% SLB 9635 TT 1.2_TSSOP28

    25
    18
    11
    4
    U23 USB_VCCB TPM@ TPM@

    2
    USB_VCCB C553 2 1 18P_0402_50V8J TPM_XTALI
    1 GND OUT 8 W=60mils JP15
    2 7
    IN OUT
    150U_D_6.3VM

    0.1U_0402_16V4Z

    3 IN OUT 6 1 1

    1
    1 4 5 1 1 USB20_N4 Y5
    C550 EN# OC# + 14 USB20_N4 USB20_P4 2 6 R417
    C549

    C551

    3 2 NC IN 1
    C552 14 USB20_P4 10M_0402_5%
    4.7U_0805_10V4Z G548A2P1U 4 5 TPM@
    3 NC OUT 4
    2 2 2 2 1000P_0402_50V7K

    2
    TPM@ 32.768KHZ_1TJS125BJ4A421P
    ACES_87213-0410_4P
    C554 2 1 18P_0402_50V8J TPM_XTALO
    TPM@
    Need update the Footprint
    29 SLP_S5 1 2 +5VALW
    R418
    10K_0402_5%

    BT Connector
    JP28
    1 +3VAUX_BT
    2
    3 USB20_P6 14
    USB CONNECTOR 2
    B B
    4 USB20_N6 14 7/13
    3.75A nominal with 3.5A minimum 5 BT_LED 18
    USB_VCCC 6

    2
    7
    W=160mils R419 Q33 W=160mils 8
    R694
    +5VALW 1 2 8
    D S
    1 10K_0402_5% 9/19
    ACES_87213-0800G_8P
    2.2U_0805_16V4Z

    0.1U_0402_16V4Z

    7 2 1
    0.01_2512_1% D S
    1 1 6 3 1 1
    D S

    1
    5 4 C555 + C558 C559
    D G
    SI4800DY_SO8 220U_D_6.3VM 0.1U_0402_16V4Z 1000P_0402_50V7K
    C556

    C557

    2 2 2 2 2
    1

    0.1U_0402_16V4Z

    R420
    +3VALW +3VAUX_BT
    1
    U24 1K_0805_1% JP16 Q59
    C560

    SLP_S5# 13 8 BT@AO3413_SOT23
    16,29,33 SLP_S5# ENABLE IN 1
    2

    USB_OC#5 USB20N5

    D
    11 3 1
    FAULT USB_ISENSE1 2 USB20P5 2
    12 10
    PWRGD ISET 3
    4

    1
    7 USB_ISENSE2 1 1

    G
    ISENSE 5 1 1

    2
    3 R579 C680 C681
    TIMER 6
    1000P_0402_50V7K

    2200P_0402_50V

    C678 C679
    4 1 For EMI
    0.1U_0402_16V4Z

    VREG GATE 7 1U_0603_10V4Z 100K_0402_5% 4.7U_0805_10V4Z


    1 1 1 8 2 2
    2 14 R745 0_0402_5% BT@ @ 2 2 BT@ BT@
    DGND DISCH

    2
    6 1 2 0.1U_0402_16V4Z
    AGND SUYIN_020173MR004S558ZL_4P BT@0.01U_0402_16V7K
    C561

    C562

    C563

    9 AGND VSENSE 5
    2 2 2 L67 R580
    TPS2331IPWRG4_TSSOP14 1 1 2 0_0402_5%
    USB20_N5 2 USB20N5
    14 USB20_N5 16 BT_OFF 2 1 1
    USB20_P5 USB20P5 C682
    14 USB20_P5
    A
    4 4 3 3 06/20 A
    @0.1U_0402_16V4Z
    2
    @ KING_WCM-2012-670T 11/19 EMI
    SLP_S5# 1 2
    1

    USB_OC#5 R746 0_0402_5%


    D8
    R749
    @ 0_0402_5% 1 3 USB20P5
    R165 GND IO2
    Compal Electronics, Inc.
    R166
    SLP_S5_R 1 2 1 2 USB20N5 2 4
    Security Classification Compal Secret Data
    +3VALW IO1 VIN USB_VCCC
    2

    1 10K_0402_5%
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    C277 1K_0402_5% @ PRTR5V0U2X_SOT143-4
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    USB I/O Connector

    www.vinafix.vn
    1000P_0402_50V7K Size Document Number Rev
    2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 25 of 39
    5 4 3 2 1
    5 4 3 2 1

    DOCKING CONNECT VA

    0.1U_0603_50V 0.1U_0603_50V 0.1U_0603_50V 0.1U_0603_50V


    08/21 +3VS

    1
    1 1 1 1 1 1 1 1
    C688 C689 C690 C691 C692 C693 C694 C695 +3VALW R683
    QW@
    10K_0402_5%
    2 2 2 2 2 2 2 2

    2
    R682 ISO_PREP

    56
    JP17 0.1U_0603_50V 0.1U_0603_50V 0.1U_0603_50V 0.1U_0603_50V
    10K_0402_5%

    56
    D

    1
    2
    D PREP# Q62 D
    VA 53 53 54 54 2
    1 G 2N7002_SOT23
    51 52 C696 S QW@
    51 52

    3
    20 MDO0+ MDO0+ 49 50 MDO2+ MDO2+ 20 0.1U_0402_16V4Z
    20 MDO0- MDO0- 49 50 MDO2- MDO2- 20 2
    47 47 48 48
    20 MDO1+ MDO1+ 45 46 MDO3+ MDO3+ 20
    20 MDO1- MDO1- 45 46 MDO3- MDO3- 20
    43 43 44 44
    +5VALW
    +5VALW 37
    35
    37 38 38
    36
    Closed to JP17
    35 36
    +5VS 33 33 34 34 08/21
    31 32 LINKLED#_DOCK
    31 32 ACTIVITY#_DOCK +3VS
    29 30
    29 30 +3VS +3VS
    27 28
    14 USB20_P3 27 28 ADP_SIGNAL
    25 25 26 26 ADP_SIGNAL 30,36 C732 C733 C734
    14 USB20_N3
    23 24 ON/OFF# 28
    23 24
    21 21 22 22 PREP# 20,27 2 1 1 2 2 1
    19 20 QW@ QW@ 0.1U_0402_16V4Z
    19 20 D_DDCDATA 12
    LED_STB#_R 17 18 0.1U_0402_16V4Z QW@ 0.1U_0402_16V4Z
    17 18 D_DDCCLK 12 U44
    15 16 U42 U43
    L_BLUE 15 16 D_HSYNC 12
    13 13 14 14 D_VSYNC 12 5 VCC 5 VCC 5 VCC
    L_GREEN 11 12
    L_RED 11 12
    9 10 12 BLUE_R 1 12 GREEN_R 1 12 RED_R 1
    9 10 LINE_IN_SENSE L_BLUE A L_GREEN A L_RED A
    7 7 8 8 LINE_IN_SENSE 23 2 B 2 B 2 B
    5 6 DOCK_HPS# 24
    5 6 DOCK_LINE_IN_L ISO_PREP ISO_PREP ISO_PREP
    23 DLINE_OUT_L 3 4 DOCK_LINE_IN_L 23 4 4 4
    3 4 DOCK_LINE_IN_R OE OE OE
    23 DLINE_OUT_R 1 1 2 2 DOCK_LINE_IN_R 23
    3 GND 3 GND 3 GND
    FSA66P5X_SC70-5 FSA66P5X_SC70-5 FSA66P5X_SC70-5
    55

    C QW@ QW@ QW@ C


    FOX_QL1027L-C2405R-9F_54P
    55

    R685 R686 R687


    L_BLUE 1 2 BLUE_R 08/22 HP L_GREEN 1 2 GREEN_R L_RED 1 2 RED_R

    NOQW@ 0_0603_5% NOQW@ 0_0603_5% NOQW@ 0_0603_5%

    2N7002DW T/R7_SOT-363-6
    Q65A

    6 1 LINKLED#_DOCK
    19,20,27 LINKLED#

    R708 V_3P3_LAN
    SWITCH BOARD. POWER LED +3VL
    2

    LAN_LINK_EN 1 2
    5

    10K_0402_5%

    1
    @ R421 0_0402_5%
    19,20 ACTIVITY# 3 4 ACTIVITY#_DOCK Cap_RST# 1 2 Cap_RST#_EC 27
    R684
    360_0402_5%
    Q65B Cap_INT

    2
    2N7002DW T/R7_SOT-363-6 09/21 HP

    1
    1

    2
    08/15 HP R422
    06/30 HP 10K_0402_5% C564 D42
    10P_0402_50V8J
    2 aquq white
    LED BOARD.
    @ QSMW-B121

    2
    B +3VS +3VL JP18 B
    1 1

    1
    2
    Cap_RST# 2
    3 3
    4 LED_STB#_R
    18 WL_LED# 4
    5
    +3VS Cap_CLK 5
    27 Cap_CLK 6
    Cap_DAT 6
    +5VS +3VL +3VS
    11/26 ESD 27 Cap_DAT 7
    7
    2 Cap_INT 8
    27 Cap_INT 8
    2 9 9 11/26 ESD
    C751 LED_STB# 10
    @ 330P_0402_50V7K C742 10 +3VS +3VL
    1
    JP34 11/14 EMI @ 680P_0402_50V7K
    1
    11 11
    1 12 2 2
    1 12
    2 2

    LID SWITCH BOARD.


    3
    3 +3VL
    11/26 ESD ACES_85203-1002 C752 C753
    AMBER_BATLED# 4 @ 330P_0402_50V7K @ 330P_0402_50V7K
    27 AMBER_BATLED# GREEN_BATLED# 4 +5VS 1 1
    27 GREEN_BATLED#
    18 IDE_LED#
    IDE_LED#
    5
    6
    5
    6 2
    WL,Vol up,Vol down,Mute,Present button
    7 2
    LED_STB#_R 7 +3VS
    8
    8 11/14 EMI
    WL_LED# 9 C754
    9 1 C743
    10 C755 470P_0402_50V7K
    10 1 Cap_RST# Cap_CLK Cap_INT
    1 2
    11
    11 06/27 ESD
    12 @ 330P_0402_50V7K JP35 07/03 HP WL_LED# Cap_DAT LED_STB#
    12 @ 330P_0402_50V7K R612 U38E U38D
    14

    14
    @ 1

    2
    ACES_87151-1007G_10P 1 2 0_0402_5%
    27 LID_SW# 2 D47 D48 D49
    P

    P
    3 LED_STB#_R LED_STB#
    10 11 8 9 PACDN042_SOT2 PACDN042_SOT2 PACDN042_SOT2
    O I O I
    4 @ @ @
    G

    G
    2 TC74LCX14FT_TSSOP14
    A 5 A
    11/14 EMI TC74LCX14FT_TSSOP14
    7

    1
    AMBER_BATLED# IDE_LED# WL_LED# C744
    @ 330P_0402_50V7K 53398-0310
    GREEN_BATLED# LED_STB#_R 1
    11/26 ESD
    LID_SW#
    3

    D50 D51 D52


    PACDN042_SOT2
    @
    PACDN042_SOT2
    @
    PACDN042_SOT2
    @
    D53
    PACDN042_SOT2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    @ Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    DOCK/SUB Board
    1

    11/26 ESD THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1

    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    11/26 ESD DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 26 of 39
    5 4 3 2 1
    5 4 3 2 1

    +3VL
    +3VL
    +3VL 09/17
    RP36

    2
    R528 AB1A_CLK 1 8
    2 1 +3VS R666 AB1A_DATA 2 7
    1 0_0402_5% @ 10K_0402_5% AB1B_CLK 3 6
    AB1B_DATA 4 5
    0.1U_0402_16V4Z C641

    1
    1 1 1 1 1 1 2 06/13 BIOS 2.2K_0804_8P4R_5%
    C642 C643 C645 C646 C647
    LID_SW# 26
    C644 PREP# 20,26
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z R747 2 1 0_0402_5% CABLE_DET 16,20
    2 2 2 2 2 2
    +3VL
    R529 1 2 0_0402_5% A_EAPD 23 11/23 BIOS
    +3VL
    D D
    RP37 1 R750
    KSI0 PCI_SERR# 14,21 +3VL CABLE_DET 2
    1 8 1

    127
    128

    106

    119

    100
    126
    2 7 KSI3 10U_0805_10V4Z C648

    94
    95
    96
    97

    39
    58
    84

    14

    49

    15

    93
    98
    99
    KSI2 U34 2 10K_0402_5%
    3 6

    1
    4 5 KSI1 KSO[0..13] 10K_0402_5%
    28 KSO[0..13]

    VCC1
    VCC1
    VCC1
    VCC1
    VCC1

    VCC1

    VCC2

    GPIO28
    GPIO29
    GPIO30
    GPIO31
    GPIO32
    CAP
    NC
    NC
    NC
    NC
    NC
    NC
    10K_0804_8P4R_5% KSO0 21 124 KBC_PWR_ON R531 07/31
    KSO1 KSO0 OUT0 GREEN_BATLED# KBC_PWR_ON 32
    20 KSO1 OUT1/IRQ8# 125
    RP38 KSO2 GREEN_BATLED# 26 KB_RST# 14
    19
    KSO2

    2
    D

    1
    1 8 KSI7 KSO3 18 123 EC_SMI#
    KSI6 KSO4 KSO3 OUT7/SMI# KBRST EC_SMI# 16 2N7002_SOT23
    2 7 17 122 2
    KSI5 KSO5 KSO4 OUT8/KBRST A_SD G Q61
    3 6 16 KSO5 OUT9/PWM2 121 A_SD 23
    KSI4 KSO6

    Keyboard/Mouse Interface
    4 5 13 120 S

    General Purpose I/O Interface


    KSO6 OUT10/PWM0 INV_PWM 13

    3
    KSO7 12 118 CHGCTRL
    10K_0804_8P4R_5% KSO8 KSO7 OUT11/PWM1 CHGCTRL 31 +3VL
    10
    KSO9 KSO8
    9 KSO9 GPIO01 107 Cap_RST#_EC 26 06/23 EC 06/15 HP
    KSO10 8 79 ON/OFFBTN_KBC# ON/OFFBTN_KBC# 28
    KSO11 KSO10 GPIO02 R601
    7 KSO11 GPIO03 80 LOW_BAT# 16
    KSO12 6 81 Cap_CLK 1 2
    KSO13 KSO12/GPIO00/KBRST GPIO04/KSO14 R602 5.1K_0402_5%
    5 83
    +5VS KSO13/GPIO18 GPIO05/KSO15 Cap_DAT
    28 KSI[0..7] 1 2
    85 PM_RSMRST# 5.1K_0402_5%
    RP39 GPIO07/PWM3 PM_RSMRST# 15
    KSI0 29 86 06/23 LPC_PD 1 2
    TP_CLK KSI1 KSI0 GPIO08/RXD ENBLT 9
    1 8 28 87 R534 @ 100K_0402_5%
    TP_DATA KSI2 KSI1 GPIO09/TXD EC_GPIO27 1 R537
    2 7 27 KSI2 2
    3 6 SP_CLK KSI3 26 88 AB2A_DATA R538 1 2 0_0402_5% 100K_0402_5%
    KSI3 GPIO11/AB2A_DATA Cap_DAT 26
    4 5 SP_DATA KSI4 25 89 AB2A_CLK R539 1 2 0_0402_5%
    KSI4 GPIO12/AB2A_CLK Cap_CLK 26
    KSI5 24 90 LID_OUT# 16 11/21 VIA
    10K_0804_8P4R_5% KSI6 KSI5 GPIO13/AB2B_DATA

    SMSC_1070_TQFP-128P
    23 KSI6 GPIO14/AB2B_CLK 91 CRT_DET 12
    KSI7 22 92 BAT_ID# 06/20 06/23
    KSI7 GPIO15/FAN_TACH1 BAT_ID# 30 R543 C649
    101 BK_OFF# 13
    C GPIO16/FAN_TACH2 A20M @ CH751H-40_SC76 CLK_14M_KBC1 C
    GPIO17/A20M 102 1 2 2 1 2
    TP_CLK R544 1 D28 GATEA20 14
    28 TP_CLK 35 2 +3VL
    TP_DATA IMCLK NUM_LED# 10K_0402_5%
    28 TP_DATA 36 103 NUM_LED# 28
    IMDAT GPIO20/PS2CLK SLP_S3# 10_0402_5% 10P_0402_50V8J
    28 SP_CLK 38 KCLK GPIO21/PS2DAT 105 SLP_S3# 16,19,23,29,34,36
    40 4 R748 2 1 0_0402_5% @ @
    28 SP_DATA KDAT GPIO24/KSO16 LINKLED# 19,20,26
    41 74 EC_GPIO27 2 1
    EMCLK GPIO27 ADP_PRES 19,31,32
    42 D29 CH751H-40_SC76
    EMDAT
    A20M 1 2 GATEA20
    111 AB1A_DATA R691 0_0402_5%
    AB1A_DATA SMB_EC_DA1 30
    112 AB1A_CLK 09/15
    AB1A_CLK SMB_EC_CK1 30
    Access Bus Interface
    +3VS PM_CLKRUN# 55 109 AB1B_DATA
    16,21,25 PM_CLKRUN# SIRQ CLKRUN# AB1B_DATA AB1B_CLK
    16,21,25 SIRQ 57 110
    CLK_PCI_EC SER_IRQ Power Mgmt/SIRQ AB1B_CLK
    11 CLK_PCI_EC 54
    EC_SCI# PCI_CLK Cap_INT
    16 EC_SCI# 76 73 Cap_INT 26
    EC_SCI# PGM Strap/GPIO25
    108 EA#
    R546 LPC_AD3 EA Strap#/GPIO26/KSO17 CLK_14M_KBC +3VL
    15,18,25,28 LPC_AD3 51 59 CLK_14M_KBC 11
    LAD[3] CLOCKI R568
    1 2 EC_SCI# 15,18,25,28 LPC_AD2
    LPC_AD2 50 LAD[2] 32KHZ_OUT/GPIO22 75 ADP_EN
    ADP_EN 36

    Miscellaneous
    LPC_AD1 48 60 SB_PWRGD EA# 2 1
    15,18,25,28 LPC_AD1 LAD[1] RESET_OUT#/GPIO06 SB_PWRGD 4,15,21
    @ 10K_0402_5% LPC_AD0 46 LPC 78 1K_0402_5%
    15,18,25,28 LPC_AD0 LAD[0] PWRGD VCC1_PWRGD VGATE 15,35
    Bus 77
    LPC_FRAME# VCC1_PWRGD
    15,18,25,28 LPC_FRAME# 52 61 PREP#_SB 14
    LFRAME# 24MHZ_OUT/GPIO19/WINDMON R559
    16 NPCI_RST# 53
    LPC_PD LRESET# TEST SB_PWRGD 1
    45 69 1 2 2
    LPCPD#/GPIO23 TEST PIN R547 300_0402_5%
    100K_0402_5%
    CRY1 70 116
    CRY2 XTAL1 DMS_LED#/GPIO10 AMBER_BATLED# ADP_ID 36
    1 2 71 113 AMBER_BATLED# 26
    CLK_PCI_EC XTAL2 BAT_LED# STB_LED#
    115 STB_LED# 28
    R548 PWR_LED#/8051TX CAPS_LED#
    114 CAPS_LED# 28
    FDD_LED#/8051RX
    1

    B @ 2M_0402_5% R553 B
    68 VCC0
    +RTCVCC
    AGND

    R552 2 1
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    120K_0402_5% @ R554 0_0402_5%
    NC
    NC
    NC
    NC
    NC
    NC
    NC
    NC
    NC
    NC

    NC
    NC
    NC
    NC
    NC
    NC
    32.768KHZ 1TJS125DJ4A420P

    @ 10_0402_5% 1 2
    +3VL KBC1070_VTQFP128
    2

    1
    2
    3
    30
    31
    32
    33
    34
    43
    44

    72

    11
    37
    47
    56
    104
    82
    117

    62
    63
    64
    65
    66
    67
    1

    2
    2

    C650 Y6 1 2 R556
    OUT
    IN

    1 1 @ R555 0_0402_5%
    @ 10P_0402_50V8J 18P_0402_50V8J 0_0402_5%
    1 C651 C652
    2 1
    @ C653 @ C654
    NC

    NC

    2 2 18P_0402_50V8J
    1

    AGND FILTER
    0.1U_0402_16V4Z
    1U_0603_10V4Z
    1 2
    2

    06/21 HP Alan
    C655
    +3VL 1 2
    +3VL MAINPWON 16,30,32
    KBC Power OK 1M_0402_5% R695
    2

    2 1 0.1U_0402_16V4Z
    2

    D43
    R696 09/20 HP +3VL R697 1SS355_SOD323
    R698
    8

    23.7K_0402_1% 10K_0402_5%
    1

    2 1 3
    P

    +
    2 1

    2
    2200P_0402_50V

    1 VCC1_PWRGD 28
    23.7K_0402_1% O
    1 2
    -
    G

    R699
    2

    U46A +3VL
    4

    51.1K_0402_1% VL LM393M_SO8
    C686

    2
    2

    VL R700 11/08
    1

    R701
    2

    R703 115K_0402_1%
    1

    A R702 3.48K_0402_1% A
    1M_0402_5%
    2 1
    3

    100K_0402_5%
    1 2

    D44
    1

    D RH1
    DAN202U_SC70
    2 Q64
    2 G 2N7002_SOT23

    Compal Electronics, Inc.


    C735 S Security Classification Compal Secret Data
    3

    11

    0.1U_0402_16V4Z
    1
    R705 Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    2VREF_8734
    57.6K_0402_1% 100K +-1% TSM1A104F4361RZ 0603
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LPC47N1070

    www.vinafix.vn
    detects when VCC1 is below 2.9V AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    2

    hold KBC in reset when temp is too high DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 27 of 39
    5 4 3 2 1
    D40
    2
    @ CH511H-30_SC76
    1 SPI ROM +3VS LPC Debug Port
    INT_KBD CONN.
    07/13 BIOS
    R599 0_0402_5%
    R669
    +3VS 1 2
    HOLD# 1 2
    U27
    20mils 8 4 KSO[0..11]
    VCC VSS 4.7K_0402_5% B+ 27 KSO[0..11]
    1
    C578 WP# 3 KSI[0..7]
    W 27 KSI[0..7]
    0.1U_0402_16V4Z
    HOLD# 7
    2 HOLD
    1 2 SPI_FSEL# 1 JP20 CP1 CP2
    15,16 FSEL# S
    R449 0_0402_5% JP21 KSO11 1 KSI_D_10 4 5 KSO8 1 8
    SPI_CLK_R KSO0 1 KSI_D_12 KSO3
    15 SPI_CLK 1 2 6 C 1 Ground 2 2 3 6 2 7
    R450 0_0402_5% 2 KSO2 3 KSI_D_8 2 7 KSI_D_3 3 6
    11 CLK_LPC_DEBUG LPC_PCI_CLK 3
    15 FWR# FWR# 1 2 SPI_FWR# 5 SPI_SO 1 2 2 FRD# FRD# 15 3 KSO5 4 KSI_D_14 1 8 KSI_D_1 4 5
    R451 0_0402_5% D Q R452 0_0402_5% Ground KSI_D_14 4
    15,18,25,27 LPC_FRAME# 4 5
    CONN@ ACES_91960-0084L_Flash LPC_FRAME# KSI_D_8 5 @ 100P_0805_8P4C_50V8 @ 100P_0805_8P4C_50V8
    +3VS_DEBUG 5 6
    8,14,18,21,25 PCI_RST# +V3S KSI_D_12 6
    6 7
    DC020711088 LPC_RESET# KSI_D_10 7 CP3 CP4
    7 8
    ACES_91960-0084L_Flash +V3S KSI_D_0 8 KSO5 KSO10
    15,18,25,27 LPC_AD0 8 LPC_AD0 9 9 4 5 1 8
    9 KSI_D_4 10 KSO2 3 6 KSO6 2 7
    15,18,25,27 LPC_AD1 LPC_AD1 10
    &U1 10 KSI_D_2 11 KSO0 2 7 KSO7 3 6
    15,18,25,27 LPC_AD2 LPC_AD2 KSI_D_1 11 KSO11 KSO4
    R453 0_0402_5% 11 12 1 8 4 5
    SPI_CLK 15,18,25,27 LPC_AD3 LPC_AD3 12
    1 2 SPI_CLK_JP52 12 KSI_D_3 13
    VCC_3VA KSO3 13 @ 100P_0805_8P4C_50V8 @ 100P_0805_8P4C_50V8
    27 STB_LED# 13 PWR_LED# 14 14
    45level R454 0_0402_5% 14 KSO8 15
    FSEL# 27 CAPS_LED# CAPS_LED# 15
    1 2 SPI_CS#_JP52 NUM_LED# 15 KSO4 16 CP5 CP6
    45@ SST25LF080B_SO8-200mil 27 NUM_LED# NUM_LED# KSO7 16 KSI_D_0 KSI7
    27 VCC1_PWRGD 16 VCC1_PWRGD 17 17 4 5 1 8
    R455 0_0402_5% SPI_CLK_JP52 17 KSO6 18 KSI_D_4 3 6 KSI_D_6 2 7
    FWR# SPI_CLK 18
    1 2 SPI_SI_JP52 SPI_CS#_JP52 18 KSO10 19 KSI_D_2 2 7 KSI_D_5 3 6
    SPI_SI_JP52 SPI_CS# KSO1 19 KSO1
    19 SPI_SI 20 20 1 8 4 5
    R456 0_0402_5% SPI_SO_JP52 20 KSI_D_5 21
    HOLD# SPI_SO 21
    1 2 SPI_HOLD#_0 SPI_HOLD#_0 21 KSI_D_6 22 @ 100P_0805_8P4C_50V8 @ 100P_0805_8P4C_50V8
    +3VL SPI_HOLD# KSI7 22
    22 23
    Reserved 23
    R457 0_0402_5% 1 R670 2 NUM_LED# 23 Reserved
    KSI_D_13 24 24
    CP7
    FRD# 1 2 SPI_SO_JP52 100K_0402_5% 24 KSI_D_11 25 KSO9 1 8
    Reserved KSI_D_9 25 KSI_D_9
    26 2 7
    KSO9 26 KSI_D_11
    +3VS +3VS_DEBUG
    07/19 27 27 3 6
    CONN@ ACES_87216-2404_24P 28 KSI_D_13 4 5
    JDEBUG1 LEFT 28
    29
    RIGHT 29 @ 100P_0805_8P4C_50V8
    2 1 30 30

    PAD-NO SHORT 2x2m 06/25 Key part 31 GND1


    32
    GND2
    D15
    CONN@ 2 KSI_D_6

    MDC 1.5 Conn.


    HRS_FH28-60-30-SB-1SH-86_30P KSI6 1
    KSI_D_14
    RJ-11 CONN.
    K/B CONN need update! 3
    JP31
    1 MOD_RING
    +3VS 1 MOD_TIP DAP202U_SOT323
    2
    2 JP22
    MOD_TIP 1
    JP23 MOD_RING TIP
    G1 3 2 RING
    CONN@ ACES_88025-120L_12P 4 D16 D17
    G2 2 2
    1 1 C579 @ 220P_1808_3KV KSI_D_8 KSI_D_11
    2 2 ACES_88266-02001 C580 KSI0 1
    2
    KSI3 1
    2
    3 3
    4 4
    16 AZ_SDOUT_MDC 3
    GND KSI_D_0 KSI_D_3
    5 5
    6 6 CONN@ 4 3 3
    1 1 GND
    7 7
    16 AZ_SYNC_MDC 8 8 FOX_JM74613-V5-7F_2P DAP202U_SOT323
    1 2 9 9
    16 AZ_SDIN1_MDC
    R458 33_0402_5% 10 10 DAP202U_SOT323
    11 11
    16 AZ_RST_MDC# 12 12 AZ_BITCLK_MDC 16
    @ 220P_1808_3KV D18 D19
    2 1 1 2 2 KSI_D_1 2 KSI_D_12
    GND
    GND
    GND
    GND
    GND
    GND

    +3VS R459 C581 KSI1 1 KSI4 1


    @ 10_0402_5% @ 10P_0402_50V8J 3 KSI_D_9 3 KSI_D_4
    13
    14
    15
    16
    17
    18

    DAP202U_SOT323 DAP202U_SOT323
    MDC STANDOFF
    1000P_0402_50V7K

    D20 D21
    C582

    C583

    C584
    0.1U_0402_16V4Z

    @ 4.7U_0805_10V4Z

    1 1 1 2 KSI_D_10 2 KSI_D_13
    KSI2 1 KSI5 1
    H4 H5 3 KSI_D_2 3 KSI_D_5
    HOLEA HOLEA
    2 2 2 DAP202U_SOT323 DAP202U_SOT323
    1

    Power BTN
    ON/OFF Botton
    TrackPoint CONN. TP CONN.
    +3VL 2/23

    1
    2
    D22
    D23 +5VS
    E&T_6700-Q08N-00R CONN@
    1

    SF10402ML080C_0402 06/25 Key part


    R570 RIGHT 1 1 2 @ PACDN042_SOT2 JP25
    @ 2
    2

    SW1 LEFT 3 3 4 SP_CLK


    1 4 SP_CLK 27 1

    3
    1BT002-0121L_4P R57 100K_0402_5% SP_DATA 5 5 6 TP_CLK
    27 SP_DATA 6 27 TP_CLK 2
    3 1 10K_0402_5% 7 7 8 TP_DATA
    8 +5VS 27 TP_DATA 3
    2

    U37A ON/OFFBTN_KBC#
    14

    ON/OFFBTN_KBC# 27 4
    4 2 SN74LVC14APWLE_TSSOP14 9
    9 10
    10 1/12
    1

    D
    1

    R572
    P

    ON/OFF# Q58 +3VALW +5VS 5


    1
    O 2
    1 2 2 JP24
    I 6
    5
    6

    G 2N7002_SOT23 R573
    G

    1 100K_0402_5% 1 S 1 2 1
    3

    C656 C657 100K_0402_5% C585 ACES_87151-04051_4P


    7

    1U_0603_10V4Z 1U_0603_10V4Z 1 2 ON/OFFBTN# 0.1U_0402_16V4Z


    2 2 ON/OFFBTN# 16 2
    D31
    CH751H-40_SC76

    ON/OFF# 26

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    MDC/KBD/ON_OFF/LID
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    www.vinafix.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 28 of 39
    A B C D E

    +3VALW to +3VS Transfer +1.5VALW TO +1.5VS +5VALW to +5VS Transfer +5VALW


    08/02
    +3VALW +3VS
    B+ +1.5VALW +5VALW +5VS

    1
    U28 R462
    8 1 10U_0805_10V4Z U31 U30
    D S
    1
    7 2 8 1 +1.5VS 8 1 100K_0402_5%
    R463 D S D S D S
    1 6 3 7 2 7 2
    D S D S D S

    2
    C589 5 4 1 1 6 3 1 6 3
    330K_0402_5% D G C590 C591 D S C598 D S
    5 D G 4 1 1 5 D G 4 1 1
    SI4800DY_SO8 C601 C602 C599 C600 SLP_S5
    2 10U_0805_10V4Z 25 SLP_S5
    2

    6
    1 SI4856ADY-T1-E3_SO8 SI4800_SO8 1
    R620 2 2 2 10U_0805_10V4Z
    1 4.7U_0805_10V4Z 1U_0402_6.3V4Z 10U_0805_10V4Z
    RUNON 1 2 2 2 2 2 Q39A
    C603 RUNON SLP_S5# 2
    16,25,33 SLP_S5#

    1
    39K_0402_5% 0.1U_0402_16V4Z 4.7U_0805_10V4Z
    2
    3

    R465 0.1U_0402_16V4Z R742 2N7002DW T/R7_SOT-363-6

    1
    08/23 HP 1
    470_0402_5% C708 R469 1 2 0_0402_5% RUNON @ 10K_0402_5%
    S_PWR_EN# 5 2

    2
    Q43B 1 @ 0.1U_0402_16V4Z
    2 PJP13

    2
    2N7002DW T/R7_SOT-363-6 C597 06/28 HP
    4

    06/28 HP C604
    +1.5VS 1 2 +1.6VS_NB (2A,80mils ,Via NO.= 4)
    3300P_0402_50V7K 0.1U_0603_25V7K 08/02
    2

    1
    <BOM Structure> @ PAD-OPEN 3x3m VL

    09/17

    1
    R468

    100K_0402_5%

    2
    1M_0402_5% R621 S_PWR_EN#.
    33,35 S_PWR_EN#
    PWR_OK circuit 2 1
    +3VS
    07/02 HP
    34 S_PWR_EN D

    1
    +5VS R654 1 2 S_PWR_EN 2 Q42
    34 VDD_POK

    1
    G 2N7002_SOT23
    09/19 HP 1 R622 @ 0_0402_5% S

    3
    07/02 HP C709
    34 VCCP_POK 2 1 10K_0402_5% R655 1 2
    2 16,19,23,27,34,36 SLP_S3# 2
    10K_0402_5% R623 0.1U_0402_16V4Z 0_0402_5%
    2

    2
    8
    R625 20K_0402_5%
    J2

    1
    +5VS 2 1 R624 2 1 3

    P
    147K_0402_1% + R743
    O 1 1 2 PWR_GD 35
    2VREF_8734 2 -

    G
    +3VS 2 1 @ 10K_0402_5%
    95.3K_0402_1% U40A SHORT PADS

    2
    R626 1 LM393M_SO8
    C710

    1000P_0402_50V7K
    2
    1

    1
    R627 C711

    73.2K_0402_1% 1000P_0402_50V7K
    2
    2

    06/28 HP
    1M_0402_5% R629
    VDD_POK 2 1 2 1
    @ 10K_0402_5% R628

    +1.5VS 2 1 R630
    86.6K_0603_1%
    8

    R632 20K_0402_5% U40B H6 H7 H8 H9 H10 H11 H12 H13


    +0.9VS 2 1 2 1 5 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
    P

    52.3K_0402_1% R633 +
    7
    R631 O
    2VREF_8734 2 1 6
    -
    G

    1
    3 63.4K_0402_1% LM393M_SO8 3
    1
    4

    C712
    1

    1
    1000P_0402_50V7K R634 C713
    2 H15 H16 H17 H18 H19 H20 H21 H22
    66.5K_0402_1% 1000P_0402_50V7K HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
    2
    2

    1
    For NB
    H23 H25 H26 H27 H28
    HOLEA HOLEA HOLEA HOLEA HOLEA
    H14 H24
    HOLEA HOLEA

    1
    Discharge circuit

    1
    +5VS +3VS +1.8V +1.5VS +0.9VS

    FM1 FM2 FM3 FM4 FM5 FM6


    1

    1 1 1 1 1 1
    R470 R471 R472 R475 R476

    470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%


    62

    62

    62

    32

    32

    4 4
    Q45B
    2N7002DW T/R7_SOT-363-6
    S_PWR_EN# 2 S_PWR_EN# 2 SLP_S5 2 S_PWR_EN# 5 S_PWR_EN# 5
    1

    Q43A Q44A Q45A Q44B

    Compal Electronics, Inc.


    2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6
    2N7002DW T/R7_SOT-363-6 Security Classification Compal Secret Data
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DC/DC Interface

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 29 of 39
    A B C D E
    A B C D

    1 1

    VIN
    PJP12
    4 V- ID 3 ADP_SIGNAL 26,36
    5 V- PL1
    6 GND_1
    1 ADPIN
    HCB2012KF-121T50_0805
    1 2
    VIN VA
    V+ PL2
    7 GND_2 HCB2012KF-121T50_0805
    8 100P_0402_50V8J 1 2

    1000P_0402_50V7K

    1000P_0402_50V7K
    GND_3

    1000P_0402_50V7K
    2

    9 2

    100P_0402_50V8J
    GND_4 V+
    1

    1
    PC4
    FOX_JPD113D-LBA21-7F

    PC3
    PC2

    PC6
    2 2
    2

    2
    PC1

    PD6
    1

    @PJSOT24C_SOT23
    2007/11/22

    PH1 under CPU botten side :


    CPU thermal protection at 90 +-3 degree C
    Recovery at 47 +-3 degree C

    PR42
    VMB BATT +5VS 47K_0402_1%
    PJP11
    SUYIN_200275MR005G187ZL PJP9 CPU 1 2

    +5VS
    1 1 EC_SMD
    1 2
    +5VS
    2 2 EC_SMC
    3 3 PAD-OPEN 4x4m

    1
    6 GND 4 4 PR43

    2
    7 GND 5 5 PH1 10K_0402_5%
    1

    1
    100P_0402_50V8J

    100P_0402_50V8J

    100P_0402_50V8J

    10K_TH11-3H103FT_0603_1%
    PC5 MAINPWON 16,27,32
    1

    3 PC13 PC14 0.1U_0402_10V7K 3


    2

    2
    1

    @1000P_0402_50V7K @0.01U_0402_50V4Z PR44

    1
    8
    PR49 15K_0402_1%
    D

    1
    1K_0402_1% 1 2 5
    PC19

    PC20

    PC21

    P
    +
    2

    7 2 PQ6
    O
    2

    +5VS 1 2 6 G 2N7002KW _SOT323-3


    +3VL -

    G
    PR45 S
    PU3B

    3
    1

    1
    1 2 150K_0402_1% LM393DG_SO8

    4
    1

    1
    PR48 PR46

    1
    PR40 PC15
    210K_0402_1% PR41 2.55K_0402_1%
    100_0402_5% 0.22U_0603_10V7K PR47
    100_0402_5%
    2

    150K_0402_1% PC16
    2

    2
    BAT_ID# 27 1000P_0402_50V7K

    2
    SMB_EC_DA1 SMB_EC_DA1 27

    SMB_EC_CK1 SMB_EC_CK1 27
    1

    PD3 PD4 PD5


    BAV99_SOT323-3 BAV99_SOT323-3 BAV99_SOT323-3
    2

    4
    +3VL 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DC Connector/CPU_OTP

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 30 of 39
    A B C D
    A B C D

    VIN P2 P4 B+ P4 BATT
    PQ101 PQ102 PQ103
    AO4433_SO8 AO4433_SO8 PR101 PL101 AO4433_SO8
    1 8 8 1 0.02_2512_1% HCB2012KF-121T50_0805 1 8
    2 7 7 2 1 2 1 2 CHG_B+ 2 7
    3 6 6 3 3 6
    5 5 5

    1000P_0402_50V7K
    1 2

    4.7U_0805_25V6M

    4.7U_0805_25V6M

    4.7U_0805_25V6M
    PC101

    4
    1

    1
    0.22U_0603_16V7K ACDET PC102
    +3VL
    1 2 1U_0603_6.3V6M

    PC103

    PC104

    PC117

    PC126
    PR102

    0.1U_0603_25V7K
    1
    PR104 1 2 1

    2
    1 2 56K_0402_1%

    1
    PR105 200K_0402_5%

    PC120
    1
    1 2 PR107 PR106
    200K_0402_5% PC105 100K_0402_1% PC121 0_0402_5%
    @0.1U_0603_25V7K

    2
    1
    0.01U_0402_16V7K

    1
    2

    P2

    2
    PR109 CHGEN#
    150K_0402_5%
    PR132 CHG_B+
    220K_0402_5%

    1
    D
    1

    LPMD

    ACN

    CHGEN
    ACP
    LPREF

    ACSET

    ACDET
    D

    1
    2 TP 29
    G 2 ADP_PRES
    S G
    PQ109
    3

    5
    6
    7
    8
    S PQ107 8 28 1 2
    2N7002KW _SOT323-3 IADSLP PVCC
    3

    2N7002KW _SOT323-3 PC106 PC107

    D
    D
    D
    D
    1

    1U_0805_25V5K 0.1U_0402_10V7K
    9 27 BST_CHG 1 2
    36 BATCAL# PR108 AGND BTST PQ104
    150K_0402_5% BQ24740VREF

    G
    S
    S
    S
    PC108 PU101 AO4466_SO8
    1 2 10 VREF
    BQ24740RHDR_QFN28_5X5
    HIDRV 26 DH_CHG BATT
    2

    4
    3
    2
    1
    PR110
    PD104 +3VL
    1U_0603_6.3V6M 0.02_2512_1%
    2 1 ADP_EN# 36 11 25 LX_CHG 1 2 1 2
    VDAC PH PL102
    PD102

    5
    6
    7
    8
    10U_LF919AS-100M-P3_4.5A_20%
    RLS4148_LL34-2 VADJ REGN
    PR120 12 24 2 1

    D
    D
    D
    D
    VADJ REGN
    143K_0402_1%

    4.7U_0805_25V6M

    4.7U_0805_25V6M

    4.7U_0805_25V6M

    4.7U_0805_25V6M
    2 2

    DL_CHG RLS4148_LL34-2
    PR122 13 EXTPWR LODRV 23
    2

    1
    S
    S
    S
    VCTRL 1 2
    PQ105

    PC109

    PC110

    PC118

    PC119
    @0_0402_5%

    4
    3
    2
    1
    1

    14 22 AO4466_SO8
    ISYNSET PGND

    2
    1

    PR119

    DPMDET
    1
    PC122 1 2

    IADAPT
    100K_0402_1%

    SRSET

    CELLS
    1U_0603_10V6K PC111

    SRN

    SRP
    2

    BAT
    PR113 0.1U_0402_10V7K
    2

    1
    39K_0402_5% PC112

    15

    16

    17

    18

    19

    20

    21
    1U_0603_10V6K

    2
    1IADAPT

    BATT
    PC123
    100P_0402_50V8J

    0.1U_0603_25V7K

    @0.1U_0603_25V7K
    PR114

    1
    36 SRSET 2 1 CHGCTRL 27

    PC124

    PC125
    118K_0402_1%

    2
    1
    PR115 +3VL
    470K_0402_1% PC113
    1U_0603_10V6K

    2
    3 3
    2

    PR118
    1 2

    2
    255K_0402_1% Charge Detector AC Detector

    470K_0402_5%
    +3VL

    PR128
    P2 VL High 17.588 High 13.774 PC114
    0.047U_0402_16V7K
    PR116
    Low 16.706 P2 +3VL
    Low 13.357

    1
    1 2

    1
    681K_0402_1% PR129

    NC
    P
    1

    2 CHG 1
    A Y 4 2 AC_AND_CHG
    1

    PR123 10K_0402_5%

    G
    75K_0402_1% PC115 PR117 PU4
    0.1U_0402_10V7K 57.6K_0402_1% PR124 SN74LVC1G14DCKR_SC70-5
    2

    3
    10K_0402_1% PC116 PR130 D
    2

    1
    PR133 PU103B
    2

    3 PR134 1 2 5 CHGCTRL 1 2 1 2 2
    P

    + AC_AND_CHG ACDET + G PQ108


    O 1 1 2 4.32K_0402_1% O 7
    ADP_PRES 19,27,32 1000P_0402_50V7K
    1

    2 11.3K_0402_1% 6 1K_0402_5% S 2N7002KW _SOT323-3


    - -

    3
    G

    G
    1

    PU103A

    470K_0402_5%

    1SS355_SOD323
    PR127 PR121

    1
    LM393DG_SO8 PR135 10K_0603_0.1% LM393DG_SO8
    10K_0603_0.1% BQ24740VREF
    4

    100K_0402_1%

    PR131

    PD103
    2

    2VREF_8734
    2
    1

    2VREF_8734

    2
    PR125
    10K_0402_5%
    2

    CHGEN#
    4 4
    D
    1

    2 PQ106
    G 2N7002KW _SOT323-3
    S
    3

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Charger

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 31 of 39
    A B C D
    A B C D E

    PC301 PC302
    0.1U_0402_10V7K 0.1U_0402_10V7K
    1 1 2 BST_5V_B BST_3.3V_B 1 2 1

    2
    PD301
    PL301 CHP202UPT_SOT323-3
    B++
    B+ HCB2012KF-121T50_0805 B++ VL

    1
    2 1

    2200P_0402_50V7K

    4.7U_0805_25V6M
    2200P_0402_50V7K

    4.7U_0805_25V6M

    4.7U_0805_25V6M

    1
    B++

    47_0402_5%
    1

    8
    7
    6
    5

    5
    6
    7
    8
    PC307

    PC308
    2
    PQ301 PC306 PQ302

    PC304

    PC305

    PR302
    D
    D
    D
    D

    D
    D
    D
    D
    2

    2
    AO4466_SO8 PR301 0.1U_0402_10V7K AO4466_SO8
    PC303

    0.1U_0603_25V7K
    2

    2
    0_0402_5%

    1
    PR304 PR303

    PC309
    G

    G
    0_0402_5%

    S
    S
    S

    S
    S
    S
    0_0402_5%

    1
    DH_5V_B 1 2 DH_3.3V_B

    1
    2
    3
    4
    2VREF_8734

    4
    3
    2
    1
    VL

    1
    4.7U_0805_10V6K

    2
    1U_0603_10V6K
    0_0402_5%

    PC310
    8
    7
    6
    5

    5
    6
    7
    8
    PR306
    PR305

    2
    PQ304

    PC311
    D
    D
    D
    D

    D
    D
    D
    D
    0_0402_5%

    2
    1 AO4466_SO8

    0_0402_5%
    2
    PL302 PQ303

    18

    20

    13

    17

    @499K_0402_1%

    @499K_0402_1%
    G

    G
    2

    2
    S
    S
    S

    S
    S
    S
    4.7UH_PCMC063T-4R7MN_6A_20% FDS6690AS_SO8 PU301

    PR309
    2 BST_5V 14 2

    LD05

    TON

    VCC
    V+
    BST5

    PR307
    1
    2
    3
    4

    4
    3
    2
    1
    5

    PR308
    ILIM3
    2

    DH_5V 16 DH5

    1
    +5VALWP

    1
    LX_5V 15
    DL_5V LX5
    19 DL5 ILIM5 11
    21 PL303
    @10.2K_0402_1%

    OUT5 BST_3.3V 4.7UH_SIQB74B-4R7PF_4A_20%


    9 FB5 BST3 28
    2

    1 26 DH_3.3V
    N.C. DH3

    2
    B++ 24 DL_3.3V
    PR310
    220U_6.3VM_R15

    DL3 LX_3.3V
    6 SHDN# LX3 27
    1 MAINPW ON 4 22
    2VREF_8734 1 PR311 2 ON5 OUT3
    1

    3
    47K_0402_5%

    ON3
    1

    + 7
    PC312

    470K_0402_5% FB3
    12 2 +3VALWP
    PR313

    SKIP# PGOOD
    2

    34 1.5VALW_GD
    0_0402_5%

    PRO#
    LDO3
    8
    PR315

    @3.57K_0402_1%
    GND
    REF
    2

    2
    PR314

    PR316
    0.1U_0603_25V7K

    220U_6.3VM_R15
    0_0402_5% MAX8734AEEI+_QSOP28
    1

    23

    25

    10
    1

    PR317 1
    2 1
    RSMRST# 15

    0.22U_0603_10V7K
    1

    1
    +
    PC313

    PC315
    2VREF_8734 0_0402_5%

    4.7U_0805_6.3V6K
    2

    2
    PC314

    2
    +3VLP PR319
    2

    1
    0_0402_5%

    PC316

    PR320
    0_0402_5%
    2

    1
    3 3

    +3VL
    +3VLP +3VL

    1
    MAINPW ON MAINPWON 16,27,30 PR321 PJP8
    2 1
    100K_0402_5%
    PAD-OPEN 2x2m
    2

    VL
    D
    1

    PR318
    2 1 2
    G KBC_PWR_ON 27
    499K_0402_1%
    S PQ306
    3

    2N7002KW _SOT323-3
    D
    1

    PC317
    1

    0.047U_0402_16V7K 2
    G
    S
    2

    PQ305
    D
    1

    2N7002KW _SOT323-3
    2 ADP_PRES 19,27,31
    G
    S PQ307
    3

    2N7002KW _SOT323-3

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    3.3VALWP/5VALWP
    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 32 of 39
    A B C D E
    A B C D

    PL401
    HCB1608KF-121T30_0603
    1.8V_B+ 1 2 B+

    2200P_0402_50V7K
    4.7U_0805_25V6M

    4.7U_0805_25V6M
    1

    1
    PC401

    PC403

    PC402
    PR401
    SE_1.8V 1 2 PC404

    2
    5
    6
    7
    8
    1
    18.2K_0402_1% @680P_0402_50V7K 1

    D
    D
    D
    D
    PD401 +5VALW
    1 2

    G
    S
    S
    S
    PQ401

    13

    14

    15

    16
    DDR2_PG PU401 AO4466_SO8
    RLS4148_LL34-2

    4
    3
    2
    1
    DH_1.8V PL402

    ILIM

    NC

    NC

    DH
    2.2UH_PCMC063T-2R2MN_8A_20%
    1 2 12 1 LX_1.8V 1 2 +1.8VP
    5,29 SLP_S5# EN LX

    220U_V_4VM_R15M
    PR402
    1

    5
    6
    7
    8

    1
    0_0402_5% PR403 PR404 PR405
    +5VALW 1 2 11 2 BST_1.8V 1 2 LX_1.8V_BST 1 2 1

    0.1U_0402_10V7K

    0.1U_0402_10V7K
    D
    D
    D
    D
    PC405 PGOOD BST PC406 @4.7_1206_5%
    10K_0402_5% 0_0402_5%
    2

    +5VALW

    1
    @1000P_0402_50V7K 0.1U_0402_10V7K +

    PC407

    PC408

    PC409
    10 3 1 2 PQ402
    VOUT VCC

    2 2
    G
    S
    S
    S
    PC421 FDS6690AS_SO8
    2

    2
    +1.8VP +1.8VP 1U_0603_10V6K PC410
    PR411 PR406

    4
    3
    2
    1
    2 1 1 2 9 4 DL_1.8V

    GND
    FB DL

    RTN
    @680P_0603_50V7K

    NC

    NC
    14.3K_0603_0.1%

    TP
    0_0402_5%

    1
    1

    PC420 1 2 SC412AMLTRT_MLPQ16_3X3

    17
    0.01U_0402_16V7K PC411
    2

    @10P_0402_50V8J
    1

    PR407
    10K_0402_1%
    2

    2 2

    +1.8VP

    PU402
    1 VIN VCNTL 6 +5VALW (500mA,40mils ,Via NO.= 1)
    PU403
    2 5 APL5508_SOT89 +2.5VSP
    10U_0805_6.3V6M

    @10U_0805_10V4Z

    GND NC
    +3VS
    1

    3 VREF NC 7 2 IN OUT 3
    1

    1
    PR408 PC414
    4 8
    PC412

    PC413

    VOUT NC GND

    1
    1K_0402_1% 1U_0603_10V6K
    2

    2
    9 PC416 PR412
    TP 1
    2

    PC415 4.7U_0805_6.3V6K @150_1206_5%

    2
    G2992F1U_SO8 1U_0603_6.3V6M

    2
    +0.9VSP
    0.1U_0402_10V7K
    1

    PQ403 PR409
    2N7002KW _SOT323-3 D
    1

    3
    1K_0402_1% 3

    1 2 2 PC418
    29,35 S_PWR_EN#
    2

    G 10U_0805_6.3V6M
    PC417

    PR410
    2

    0_0402_5% S
    3
    1

    PC419
    2

    @0.1U_0402_16V7K

    PJP1 PJP2

    +5VALW P 1 2 +5VALW (6A,240mils ,Via NO.= 12) +3VALW P 1 2 +3VALW (3A,120mils ,Via NO.= 6)
    PAD-OPEN 4x4m PAD-OPEN 4x4m

    PJP3 PJP4

    +1.8VP 1 2 +1.8V (6A,240mils ,Via NO.= 12) +0.9VSP 1 2 +0.9VS (2A,80mils ,Via NO.= 4)
    PAD-OPEN 4x4m
    PAD-OPEN 3x3m

    PJP5 PJP6
    +1.05VSP 1 2 +VCCP (4A,160mils ,Via NO.= 8) +1.5VALW P 1 2 +1.5VALW (1A,40mils ,Via NO.=2)
    4 4

    PAD-OPEN 4x4m PAD-OPEN 4x4m

    PJP7

    +2.5VSP 1 2 +2.5VS (500mA,40mils ,Via NO.= 1)


    PAD-OPEN 3x3m Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    PJP10
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1.8VP/0.9VSP/2.5VSP

    www.vinafix.vn
    1 2 +1.6VS_NB (2A,80mils ,Via NO.= 4) Size Document Number Rev
    +1.6VSP AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    PAD-OPEN 3x3m MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 33 of 39
    A B C D
    5 4 3 2 1

    PR504 PR503 PR502 PR501


    D +1.05VSP 1 2 1 2 2 1 2 1 +1.5VALW P D
    29.4K_0402_1% 75K_0402_1% 73.2K_0402_1% PL501
    75K_0402_1% B+++ B+
    HCB1608KF-121T30_0603
    2 1
    +3VALW

    2
    PR505
    PR506 0_0402_5%
    @10K_0402_5%

    1
    29 VCCP_POK 1.5VALW_GD 32
    B+++
    @2200P_0402_50V7K

    @2200P_0402_50V7K
    4.7U_0805_25V6M
    1

    1
    PC505 PU501
    4.7U_0805_25V6M

    @0.022U_0603_25V7K

    VO2

    VFB2

    TONSEL

    VFB1

    VO1
    GND

    1
    25 PC522
    P PAD

    2
    1

    8
    7
    6
    5
    @0.01U_0402_16V7K PQ501

    PC502

    PC501
    5
    6
    7
    8
    AO4466_SO8
    PC504

    PC503

    D
    D
    D
    D

    2
    7 24

    D
    D
    D
    D
    PGOOD2 PGOOD1
    2

    PC507
    PC508 8 23
    EN2 EN1 0.1U_0402_10V7K
    G
    S
    S
    S

    PQ502 0.1U_0402_10V7K PR508


    PR507

    G
    S
    S
    S
    AO4466_SO8 2 1 2 1 BST_1.05V 9 22 BST_1.5V 2 1 1 2
    VBST2 VBST1
    1
    2
    3
    4

    0_0402_5% 0_0402_5% +1.5VALWP


    +1.05VSP

    4
    3
    2
    1
    PL503 UG1_1.05V 2 1 UG_1.05V 10 21 UG_1.5V 2 1 UG1_1.5V
    DR VH2 DR VH1 PL502
    3.3UH_SIQB74-3R3RF_4.8A_30% 0_0402_5% PR510 0_0402_5% PR509
    220U_6.3VM_R15

    +1.05VSP 2 1 LX_1.05V 11 20 LX_1.5V 1 2 +1.5VALW P


    LL2 LL1
    1
    C LG_1.05V 12 19 LG_1.5V 3.3UH_SIQB74-3R3RF_4.8A_30% 1 C
    DR VL2 DR VL1
    1

    8
    7
    6
    5

    5
    6
    7
    8
    + PQ503
    PC511

    220U_6.3VM_R15
    2
    PC510 PQ504 AO4466_SO8 +

    PC509
    PGND2

    PGND1
    V5FILT
    D
    D
    D
    D

    D
    D
    D
    D
    TRIP2

    TRIP1
    4.7U_0805_6.3V6K AO4466_SO8 PC512

    V5IN
    2
    2

    4.7U_0805_6.3V6K
    2

    1
    G

    G
    S
    S
    S

    S
    S
    S
    TPS51124RGER_QFN24_4x4

    13

    14

    15

    16

    17

    18
    1
    2
    3
    4

    4
    3
    2
    1
    1
    PR511 PR512 PR513
    18.2K_0402_1% 16.5K_0402_1% 0_0402_5%
    2 1 1 2 1 2 1.5VALW _ON
    29 S_PWR_EN PR514

    2
    20K_0402_5%
    1

    1
    1.5VALW _ON

    PC514 PC513
    2

    2
    0.1U_0402_10V7K PR515 @0.1U_0402_16V7K
    1 2 +5VALW
    3.3_0402_5% VL
    1

    1
    PC516
    PC515 4.7U_0805_10V6K
    1U_0603_10V6K
    +5VALW
    2

    1
    PC519 +1.8V

    1
    B @1U_0603_10V6K B

    2
    PR516
    @10K_0402_5%

    6
    PU502

    1
    5

    VCNTL
    VIN

    2
    VDD_POK 7
    29 VDD_POK POK
    9 PC520
    VIN

    2
    @4.7U_0805_6.3V6K
    VOUT 3

    16,19,23,27,29,36 SLP_S3# 1 2 8 EN VOUT 4 +1.6VSP


    PR518

    GND

    1
    @0_0402_5% 2
    FB PC518

    1
    PC521 @APL5913-KAC-TRL_SO8 @22U_0805_6.3V6M

    2
    1
    @0.1U_0402_16V7K

    1
    2
    PR519
    @31.6K_0402_1% PC517

    2
    @47P_0402_50V8J

    2
    1
    PR517
    @30.9K_0402_1%

    2
    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1.05VSP/1.5VALWP/1.6VSP
    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 34 of 39
    5 4 3 2 1
    5 4 3 2 1

    D D

    CPU_B+ B+
    +5VALW PL201
    HCB1608KF-121T30_0603

    1
    PC214 1 2

    0.01U_0402_50V4Z
    1

    2200P_0402_50V7K
    4.7U_0805_25V6M

    4.7U_0805_25V6M
    1U_0603_10V6K

    1
    2

    1
    DL_CPU +
    PD201

    2
    SE_CPU 2 1 PC205 PC206

    PC204
    PC203
    @68U_25V_M 2

    2
    C @1000P_0402_50V7K C

    PC201

    PC202
    5
    6
    7
    8
    PR221 RB751V_SOD323-2
    1 2
    21

    22

    23

    24

    25

    26

    27

    28

    29

    30
    5 CPU_VSS_SENSE

    D
    D
    D
    D
    0_0402_5%
    PR201 PC207

    LG
    NC

    NC

    NC

    NC

    NC

    NC

    NC

    VDDP

    VSSP
    PR220 0_0402_5% 0.22U_0603_10V7K

    G
    S
    S
    S
    1 2 20 31 BST_CPU
    1 2 1 2
    5 CPU_VCC_SENSE VSEN BOOT
    0_0402_5% PQ201
    DH_CPU1 PR202 2

    4
    3
    2
    1
    19 DRS UG 32 DH_CPU_1 AO4466_SO8 PL202 +CPU_CORE
    PR204 0_0402_5% 1UH_MPLC1040L1R0_14.3A_20%
    47K_0402_1% 18 33 LX_CPU 1 2
    PR203 PR205 STV PHASE
    1 2 1 2 1 2 PR206

    1
    71.5K_0402_1% 53.6K_0402_1% 17 34 SE_CPU 1 2
    OCSET ISEN

    5
    6
    7
    8
    1 2 4.22K_0402_1% PR207
    16 35 B+ 1 2 +5VALW
    PR230 @10K_0402_5% @4.7_1206_5%

    D
    D
    D
    D
    VSS VBAT PC213 PR229
    15 36 0.1U_0603_25V7K 1 2
    SOFT VDD

    2 2
    1 2 SOFT_CPU 1_0402_5%
    PR208

    1U_0603_10V6K

    G
    1

    S
    S
    S
    PC208 14 37 1 2
    NC DACOUT

    PC209
    0.015U_0603_25V7K PU201 0_0402_5% PQ202
    PR209

    4
    3
    2
    1
    +CPU_CORE 1 2 13 ISL6218CRZ_QFN40_6X6 38 DL_CPU FDS6690AS_SO8 PC210
    FB DSV

    1
    3.57K_0402_1% PC211 @680P_0603_50V7K

    200K_0402_1%
    PR210
    1 2 2 1 12 COMP FSET 39

    1
    18.2K_0402_1%
    2200P_0402_50V7K 11 40

    PR211
    EA+ NC
    PR231
    PR212
    PGOOD

    1 2 1 2 1 2 41
    DSEN#

    PC215 PC212 @2200P_0402_50V7K GND PAD


    @18.2K_0402_1% 47.5K_0402_1%
    VID5

    VID4

    VID3

    VID2

    VID1

    VID0

    DRS

    2
    EN

    B @2200P_0402_50V7K B

    PR213
    10

    SOFT_CPU 1 2
    1.15K_0402_1%

    VGATE PW R_GD 29
    15,27 VGATE
    PR214 +3VS
    CPU_VID5 1 2 DPRSLPVR 14
    4 CPU_VID5
    0_0402_5% PR215
    CPU_VID4 1 2 PR222
    4 CPU_VID4 H_PSI# 4
    0_0402_5% 10K_0402_5%
    PR216 PR217
    CPU_VID3 1 2 1 2 CPU_VID0 CPU_VID0 1 2
    4 CPU_VID3 CPU_VID0 4
    0_0402_5% PR218 PR219 0_0402_5%
    CPU_VID2 2 1 1 2 CPU_VID1 PR223
    4 CPU_VID2 CPU_VID1 4
    0_0402_5% 10K_0402_5%
    0_0402_5%
    CPU_VID1 1 2

    PR224
    10K_0402_5%
    CPU_VID2 1 2
    +3VS
    PR225
    10K_0402_5%
    1

    CPU_VID3 1 2

    PR228 PR226
    1K_0402_5% 10K_0402_5%
    CPU_VID4 1 2
    2

    A
    VGATE A
    PR227
    10K_0402_5%
    D
    1

    CPU_VID5 1 2
    PR232
    1 2 2 PQ203
    29,33 S_PWR_EN# G 2N7002KW _SOT323-3
    0_0402_5%
    1

    S
    Security Classification Compal Secret Data Compal Electronics, Inc.
    3

    PC216
    @0.1U_0402_10V7K
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    2

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    CPU_CORE
    Size Document Number Rev

    www.vinafix.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 35 of 39
    5 4 3 2 1
    5 4 3 2 1

    SRSET 31

    PQ1
    PR14 NDS0610_NL_SOT23-3 PQ2
    PD2

    1
    100_0402_5% PR12
    C MMBT3904_SOT323
    D 26,30 ADP_SIGNAL D

    D
    1 2 3 1 2 1 1 2 2
    B
    100K_0402_5% E
    1SS355_SOD323

    3
    2

    G
    2
    PR13

    3.9K_0402_5%

    3900P_0402_50V7K
    1
    191K_0402_1% 1

    PR10
    VIN

    PC17
    1
    2

    2
    1
    PR1
    226K_0402_1%

    2
    1
    1 2
    PR2
    PR6
    100K_0402_1%
    VIN 1M_0402_5%

    BATCAL# 31

    2
    C C

    1
    D

    1
    PR15
    1_0805_1% 2 PQ3
    VIN 16,19,23,27,29,34 SLP_S3# G 2N7002KW_SOT323-3
    S

    3
    VIN +3VL

    1
    1

    1
    PR4
    PR8 47K_0402_5%
    PR3

    1
    22.6K_0402_1% PR5 220K_0402_5%
    PC18 ADP_EN 27
    47K_0402_5%

    2
    0.1U_0603_25V7K
    2

    2
    8
    D

    1
    3
    P

    + PQ4
    O 1 1 2 2
    2 PD1 G 2N7002KW_SOT323-3
    -
    G
    1

    1
    1SS355_SOD323 S

    3
    PR9 PU1A
    PR7
    4

    10K_0402_1% LM393DG_SO8
    220K_0402_5%
    B B
    +3VL
    2

    1
    PR11
    10K_0402_5%

    2
    ADP_EN# 31 ADP_ID 27

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    ADP_OCP
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 36 of 39
    5 4 3 2 1

    www.vinafix.vn
    5 4 3 2 1

    " # !
    D D
    1 Page35 CPU_CORE 2007/06/13 Compal Add VID pull high resistors Add PR222~PR227 and connect to +3VS for VID0~5 PreDB-->DB1
    2 Page36 ADP_OCP 2007/06/15 HP Add ADP_OCP circuit Add ADP_OCP circuit PreDB-->DB1
    3 Page32 3.3VALWP/5VALWP 2007/06/28 HP Fine tune ALWP Power Sequence 5VALWP-->1.5VALWP-->3.3VALWP PreDB-->DB1
    Page34 1.05VSP/1.5VALWP/
    1.6VSP

    4 Page35 CPU_CORE 2007/06/28 HP Fine tune CPU_CORE Power Sequence Change the EN of PU201 from VCCP_POK to PWR_GD PreDB-->DB1
    5 Page34 1.05VSP/1.5VALWP/ 2007/06/28 HP Fine tune +1.05VSP Power Sequence Change PR514 from 0 to 20K PreDB-->DB1
    1.6VSP Install PC514 as 0.1uf

    6 Page31 Charger 2007/07/02 Compal Fine tune the charger current contorl Change PR114 from 2.49K to 24.9K PreDB-->DB1
    Change PR115 from 10K to 100K
    Change PC113 from 0.01uf to 1uf
    Change signal of PR410.1 from VDD_POK# to S_PWR_EN#
    7 Page33 1.8VP/0.9VSP/ 2007/07/02 Compal Fine tune +0.9VSP Power Sequence PreDB-->DB1
    2.5VSP
    C C

    8 Page34 1.05VSP/1.5VALWP/ 2007/07/02 HP Install the pull high resistor and change the pull high Install PR516 as 10K PreDB-->DB1
    1.6VSP level Reconnect PR516.1 from +3VALW to +5VALW

    9 Page34 1.05VSP/1.5VALWP/ 2007/07/02 HP Fine tune +1.05VSP Power Sequence Change signal of PR514.2 from VDD_POK# to S_PWR_EN# PreDB-->DB1
    1.6VSP

    10 Page35 CPU_CORE 2007/07/02 HP Add VGATE control circuit Add PR228 as 4.7K PreDB-->DB1
    Add PQ203 as 2N7002KW

    11 Page36 ADP_OCP 2007/07/02 HP Fine tune the smart adpater function 1. Add PR14 as 10K between PR13 and GND PreDB-->DB1
    Change PR13 from 191K to 181K
    Reconnect the node of PR6.1 and PU1.3 to the
    connected node of PR13 and PR14
    2. Change PR12 from 10K to 100K

    12 Page31 Charger 2007/07/05 compal Modify charger circuit after review by TI 1. Add PC119 as 4.7uf PreDB-->DB1
    Reconnect PC109 and PC110 from BATT to the
    connected node of PL102 and PR110
    B 2. Add PC120 and PC121 as 0.1uf B

    3. Change PR113 from 150K to 39K

    13 Page35 CPU_CORE 2007/07/05 compal Modify CPU regulator circuit after review by Intersil 1. Add PR229 as 1 ohm PreDB-->DB1
    2. Add PC213 as 0.1uf
    3. Add PC214 as 1uf
    4. Reserve PR230, PR231, PC215 and PC216
    5. Add PR232 as 0 ohm
    6. Add PD402 as RB751V
    7. Change PR228 from 4.7K to 1K
    8. Chagne PR203 from 60.4K to 71.5K
    9. Chagne PR204 from 2.94K to 47K
    10. Chagne PR205 from 82.5K to 53.6K
    11. Chagne PR206 2.49K to 4.22K
    12. Chagne PR208 2.74K to 0 ohm

    A A

    Security Classification Compal Secret Data


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    PWR PIR Sheet (1)
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 37 of 39
    5 4 3 2 1
    5 4 3 2 1

    $
    " # !
    D D
    14 Page31 Charger 2007/08/16 Compal 1. For TI's suggestion 1. Add PC124 as 0.1uf DB1-->DB2
    2. Add resistor divider for OVP function of charger Reserve PC125
    3. Add charging voltage control circuit Add PC123 as 100pf
    Connect Pin8 (IADSLP) to GND
    2. Add PR134 and PR135
    3. Add PR119 as 100K
    Add PR120 as 143K
    Reserve PR122
    Reserve PC122

    15 Page36 ADP_OCP 2007/08/17 Compal 1. Prevent spike or reverse voltage 1. Add PR15 as 47 ohm DB1-->DB2
    2. For E-STAR, increse the resistor divider in propotional Add PC18 as 0.1uf
    Add PD3 as 1N4148
    2. Change PR1 and PR8 from 22.6K to 226K
    Change PR2 and PR9 as 100K

    16 Page31 Charger 2007/08/17 HP Reserve ESD protection diode for BAT_ID Reserve PD7 DB1-->DB2
    17 Page31 Charger 2007/08/20 Compal 1. Fine tune resistor divider for CHGCTRL 1. Change PR114 from 24.9K to 118K DB1-->DB2
    C
    2. Fine tune resistor divider for Constant Power point Change PR115 from 100K to 470K C

    3. Fine tune the AC detector 2. Change PR102 from 4.22K to 56K


    Change PR107 from 10K to 100K
    3. Change PR118 from 133K to 255K

    18 Page30 DC Connector/ 2007/11/22 Compal Rename "BAT_ID" to "BAT_ID#" to indicate this signal is Rename "BAT_ID" to "BAT_ID#". SI1-->SI2
    CPU_OTP low active.

    19 Page30 DC Connector/ 2007/11/22 Compal For EMI requestion. Add PC6 and PC126 as 1000pf SI1-->SI2
    CPU_OTP
    Page31 Charger
    20 Page30 DC Connector/ 2007/11/22 Compal Follow SKYY 1. Add PC19, PC20, PC21 as 100P_0402_50V8J SI1-->SI2
    CPU_OTP 2. Add PR49 as 1K_0402_1%
    3. Change PR48 from 10K_0402_5% to 210K_0402_1%
    4. Populate PD3, PD4, PD5
    21 Page35 CPU_CORE 2007/11/22 HP Re-connect the regulator power from +5VS to +5VALW Re-connect the regulator power from +5VS to +5VALW SI1-->SI2

    B B

    22 Page31 Charger 2007/11/29 HP Correct the connection of signal SRSET Reconnect the signal "SRSET" from PU101.6 SI1-->SI2
    to PU101.16

    23 Page34 1.05VSP/ 2007/11/29 HP The power plane of VIA chipset is changed from +1.6VS Remove all the related component of +1.6VSP SI1-->SI2
    1.5VALWP/1.6VSP to +1.5VS, and the +1.5VS could be generated from +1.5VALW.

    A A

    Security Classification Compal Secret Data


    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title
    PWR PIR Sheet (2)
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 38 of 39
    5 4 3 2 1
    EE PIR list
    1 2 3 4 5

    DB Build: 10/08/2007
    08/10/2007 Page 16 -Swap LP_EN# and XMIT_OFF_SB#, CABLE_DET and WL_OFF
    Page 18 -Add ODD_DET# circuit.
    Page 9 -Reserve LVDS SSC.
    Page 26 -reserve R745 and R746 for EMI.
    Page 13 - change C258 from 0.1u to 0.47u for LCD power sequence
    1
    Page 14 - Add a 10K PU for IRQ1/IRQ12 1

    Page 16 - change EC_SCI# from GPI0 to GPI3 SI-2 Build:


    Page 16 - change C287, C288, C659 and C660 from 3900pF to 0.01pF for SATA
    Page 16 - change R522 from PU to PL for minicard power 11/08/2007
    Page 18 - change C366, C367, C661 and C662 from 3900pF to 1200pF for SATA Page 13 -connect R154.2 to +3VALW to fix the white screen issue.
    Page 18 - reverse SSD pin Page 13,14 -Set ALS_EN as low to disable light sensor.
    Page 20 - update LAN LINK LED circuit Page 24 -Connect JP11.1 to AGND for HP can't play record file issue.
    Page 27 - Add 2N7002 to reverse KB_RST# Page 26 -Connect JP17.26 from ADP_ID to ADP_SIGNAL for DOCK charge issue.
    Page 29 - Install R655 and remove R645 for power sequence Page 27 -Change R701 from 14K to 3.48K for system shut down issue.

    08/15/2007 11/19/2007
    Page 8 -Swap PCIE channel for minicard and LAN. Page 9 -Add L65, C188 and C741 for +VCC33GFX by VIA request.
    Page 16 -tie EC_SMI# from EC pin123 to GPI2/EXTSMI# of SB Page 25 -Reserve L66 and L67 for EMI
    Page 22 -modify the footpring of SD socket to meet vendor new drawing. Page 26 -Reserve C742, C743 and C744 for EMI
    Page 26 -modify the power rail of cap sense board (JP18) from +3VALW to +3VL.
    11/27/2007
    08/20/2007 Page 14,16 -Change LP_EN# from GPO7 to GPO2.
    2 2

    Page 12 -Reserve L62, L63, L64 for CRT fine tune. Page 15 change USB of DOCK from port 7 to port 3
    Page 23 -Install R370 for internal speaker issue. Page 16- change ODD_DET from GPI16 to GPIO26
    Page 26 -Add quick switch for dock CRT support. Page 16, 27- change CABLE_DET from SB to EC GPIO30
    Page 25-change the enable pin of U24 to SLP_S5#.
    Page 26- reserve ESD diode on LID/B, Cap/B and LED/B for ESD
    SI-1 Build:
    Page 27- change the pull high value of battery I2C bus to 2.2K
    09/01/2007
    11/28/2007
    Page 23 -remove 6044 supported
    Page 13- Change R152 from 1M to 150K and C258 from 0.47u to 0.1u for LCD timing.
    09/15/2007 Page 16- change XMIT_OFF_SB# from GPIO20 to GPO2
    Page 16- change LP_EN# from GPO2 to GPIO20.
    Page 16 -change strpa pin of V4-Lite Capability from enable to disable
    Page 16- reserve CABLE_DET at GPIO27
    09/19/2007
    11/29/2007
    Page 15 -Add the circuit for RSMRST to fix RTC lose issue.
    Page 29- remove C708 and change C597 to 3300P.
    Page 18 -Add Q63 for XMIT_OFF# and BT LED indicator
    3 3
    Page 15 -change the RST# pin of TPM from NPCI_RST# to PCI_RST# for +3VS leakage issue.
    Page 26 -add the level shift for DOCK LAN LED.
    Page 27 -Modify the VCC1_PWRGD circuit of EC
    Page 29 -remove the diode of VCC1_PWRGD
    Page 29 -Add a jumper for +1.6VS_NB option

    09/24/2007
    Page 11 -Modify the clock generator and clock buffer to single clock generator.
    Page 18 -change SATA CONN from 20pins to 10 pins
    Page 19,20 -Add 5784 and 5787 co-layout circuit.
    Page 23 -Add D45 to fix the leakage of A_SD
    Page 23 -change R651 and R652 to 0 ohm

    09/28/2007
    Page 23 -Change C716 and C717 from 1uF to 2.2uF.

    4 4
    10/02/2007
    Page 23 -change the gain of AMP from 10dB to 12dB.
    Page 27 -Change PREP#_SB from U34.91 to U34.61 to fix the +3VS leakage during S3.
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2007/11/19 Deciphered Date 2008/11/19 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    H/W2 EE Dept. PIR SHEET

    www.vinafix.vn
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Thursday, November 29, 2007 Sheet 39 of 39
    1 2 3 4 5

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