QMLE4/5: Eureka UMA

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om
.c
fix
se
ro
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1 1
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QMLE4/5
2
Eureka UMA 2
LA-8864P REV 0.3 Schematic

3
AMD Trinity FS1r2 APU / Hudson M3 FCH 3
2012-03-14 Rev 0.3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/11/21 Deciphered Date 2011/12/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB LA-8864
Size Document Number Rev
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AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019IS
Date: Monday, March 26, 2012 Sheet 1 of 40
A B C D E
A B C D E
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RPM Fan Control GCLK
.c
SLG3NB238VTR
ix
page 5 page 22
AMD APU
f FS1r2 Processor
se
DP2 (X4)
ro
HDMI Conn. Memory BUS(DDRIII)

200pin DDRIII-SO-DIMM X2
w.
1 1
page 20 Trinity uPGA-722 Dual Channel BANK 0, 1, 2, 3 page 10,11

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35mm*35mm
1.5V DDRIII 1333/1600 MT/s
page 5,6,7,8,9
DP0 DP1
LVDS Translator (X2) (X4) PCIe X1
UMI X4 1.2V 5GT/s Right USB2.0 Right USB2.0 Int. Camera
RTD2136S 2.5GT/s
USB port 0 USB port 1 USB port 4
page 17 page 21 page 21 page 18
PCIe X1
1.2V 5GT/s
Left USB 3.0 Left USB 3.0
USB2.0 USB port 10 USB port 11
LVDS Conn. page 24 page 24
5V 480MHz
page 18
2
USB2.0 PCIeMini Card 2
5V 480MHz WLAN + BT
CRT
USB port 3
page 19 APU PCIe port 1
page 22
AMD FCH
RTL8105E 10/100M Hudson M3
RJ45 SATA port 0 SATA HDD
page 23
RTL8111E 1G 5V 6GHz(600MB/s) SATA port 0
APU PCIe port 0 page 21
page 23
FCBGA-656 SATA port 1 SATA ODD

24.5mm*24.5mm
5V 6GHz(600MB/s) SATA port 1
page 21
Cardreader Conn. USB2.0 USB 3.0
RTS5129 5V 480MHz
USB 3.0
USB3.0 port 0
USB port 2 page 12,13,14,15,16 5GHz page 24
page 26
3 3
SPI Bus USB 3.0 USB 3.0
3.3V 33 MHz 5GHz USB3.0 port 1
page 24
LPC Bus HD Audio 3.3V 24MHz
3.3V 33 MHz
HDA Codec
ALC259
SPI ROM page 25
(4MB) Debug Port ENE KB9012
page 14 page 28
page 27
RTC CKT.
page 12
TPM 1.2 Int. SPK Conn JCRIO
page 26 page 25
ODD/B MIC Conn (HP &page
MIC)
page 18 26
DC/DC Interface CKT. LS-8862P page 21 Touch Pad Int.KBD
page 29 page 28
page 30
Touchpad/B
4 4
Power Circuit DC/DC LS-8863P page 29
page 31,32,33,34,35
36,37,38,39
CR & Audio/B
LS-8864P page 40 Security Classification Compal Secret Data Compal Electronics, Inc.
Power On/Off CKT. USB & PWR/B SCHEMATIC,MB LA-8864
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Size
Document Number Rev
page 29 LS-8865P page 31 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019IS A

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5 4 3 2 1
om
.c
DESIGN CURRENT 0.1A +3VL
ix
DESIGN CURRENT 0.1A +5VL
f B+
se
Ipeak=5A, Imax=3.5A, Iocp min=7.9A DESIGN CURRENT 7A +5VALW
ro
SUSP
w.
D D
ww
N-CHANNEL DESIGN CURRENT 6A +5VS

SI4800
ODD_PWR
DESIGN CURRENT 1.6A +5VS_ODD
P-CHANNEL
AO-3413
RT8205LZQW
Ipeak=5A, Imax=3.5A, Iocp min=7.7A DESIGN CURRENT 5A +3VALW
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN

AO-3413
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS

SI4800 LCD_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD

C AO-3413 C
+3VS
LDO DESIGN CURRENT 1A +2.5VS

APL5508-25DC
FCH_PWR_EN
Ipeak=5.3A, Imax=3.71A, Iocp min=6.814A DESIGN CURRENT 4A +1.1VALW

SY8036LDBC
SUSP
N-CHANNEL DESIGN CURRENT 4A +1.1VS

FDS6676AS
VR_ON
Ipeak=54A, Imax=36A, Iocp min=65A DESIGN CURRENT 36A +APU_CORE

B B
ISL6277HRTZ-T Ipeak=27.5A, Imax=22A, Iocp min=35A DESIGN CURRENT 25A +APU_CORE_NB
VR_ON
Ipeak=6.5A, Imax=4.55A, Iocp min=8.553A DESIGN CURRENT 8.5A +1.2VS

TPS51212DSCR
SYSON
Ipeak=20A, Imax=11.2A, Iocp min=24.136A DESIGN CURRENT 12A +1.5V
RT8207MZQW SUSP
N-CHANNEL DESIGN CURRENT 1A +1.5VS

SUSP#
FDS6676AS
DESIGN CURRENT 1A +0.75VS

A A

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A
4019IS
5 4 3 2 1
A B C D E
om
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( O MEANS ON X MEANS OFF )
Voltage Rails
ix
+5VS BTO Option Table
f +RTCVCC B+ VL +5VALW +1.5V
se
+3VS
+3VL +3VALW Function FCH Clock
+2.5VS
ro
+1.1VALW
power +1.5VS description Hudson-M3 Clock
w.
1 plane +VSB 1
+1.2VS
explain R1 R3 UNBW Green Clock No Green Clock
ww
+1.1VS
+0.75VS BTO HUDM3R1@ HUDM3R3@ HUDM3UNBW@ GCLK@ NOGCLK@
+APU_CORE
+APU_CORE_NB
Function LAN Camera Internal Analog MIC TPM
State
description LAN Camera Internal Analog MIC TPM
explain 10/100M GIGA Camera Internal Analog MIC 9635 9655
BTO 8105ELDO@ 8111FVB@ CAM@ AMIC@ TPM9635@ TPM9655@
S0
O O O O O O
S1
O O O O O O
2 2
S3
O O O O O X
S5 S4/AC
O O O O X X
S5 S4/ Battery only
O O O X X X
S5 S4/AC & Battery
don't exist
O X X X X X
FCH SM Bus Address (SCL0/SDA0)
Power Device HEX Address

3 3
+3VS DDR SO-DIMM 0 A0 H 1010 000X b
+3VS DDR SO-DIMM 1 A2 H 1010 001X b
+3VS WLAN
EC SM Bus1 Address EC SM Bus3 Address SIGNAL

STATE SLP_S3# SLP_S5#
Power Device HEX Address Power Device HEX Address Full ON HIGH HIGH
+3VL Smart Battery 16 H 0001 0110 b +3VS LVDS Translator 94 H 1001 0100 b S1(Power On Suspend) HIGH HIGH
+3VL Charger 12 H 0001 0010 b
S3 (Suspend to RAM) LOW HIGH
EC SM Bus2 Address S4 (Suspend to Disk) LOW HIGH
Power Device HEX Address S5 (Soft OFF) LOW LOW

4 4
+3VL SB-TSI 98 H 1001 1001 b G3 LOW LOW

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Size Document Number
Rev
Custom A
4019IS
A B C D E
A B C D E
om
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JAPUA
f PCI EXPRESS
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AB8 P_GFX_RXP0 P_GFX_TXP0 AB2
AB7 P_GFX_RXN0 P_GFX_TXN0 AB1
AA9 AA3
ro
P_GFX_RXP1 P_GFX_TXP1
AA8 P_GFX_RXN1 P_GFX_TXN1 AA2
AA5 P_GFX_RXP2 P_GFX_TXP2 Y5
w.
1 AA6 P_GFX_RXN2 P_GFX_TXN2 Y4 1

Y8 P_GFX_RXP3 P_GFX_TXP3 Y2
Y7 Y1
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P_GFX_RXN3 P_GFX_TXN3
W9 P_GFX_RXP4 P_GFX_TXP4 W3
W8 P_GFX_RXN4 P_GFX_TXN4 W2
W5 P_GFX_RXP5 P_GFX_TXP5 V5
W6 P_GFX_RXN5 P_GFX_TXN5 V4
V8 P_GFX_RXP6 P_GFX_TXP6 V2
GRAPHICS
V7 P_GFX_RXN6 P_GFX_TXN6 V1
U9 P_GFX_RXP7 P_GFX_TXP7 U3
U8 P_GFX_RXN7 P_GFX_TXN7 U2
U5 P_GFX_RXP8 P_GFX_TXP8 T5
U6 P_GFX_RXN8 P_GFX_TXN8 T4
T8 P_GFX_RXP9 P_GFX_TXP9 T2
T7 P_GFX_RXN9 P_GFX_TXN9 T1
R9 P_GFX_RXP10 P_GFX_TXP10 R3
R8 P_GFX_RXN10 P_GFX_TXN10 R2
R5 P_GFX_RXP11 P_GFX_TXP11 P5
R6 P_GFX_RXN11 P_GFX_TXN11 P4
P8 P_GFX_RXP12 P_GFX_TXP12 P2
P7 P_GFX_RXN12 P_GFX_TXN12 P1
N9 P_GFX_RXP13 P_GFX_TXP13 N3
N8 P_GFX_RXN13 P_GFX_TXN13 N2
N5 P_GFX_RXP14 P_GFX_TXP14 M5
N6 P_GFX_RXN14 P_GFX_TXN14 M4
M8 P_GFX_RXP15 P_GFX_TXP15 M2
M7 P_GFX_RXN15 P_GFX_TXN15 M1
PCIE_FRX_C_LANTX_P0 AE5 AD5 PCIE_FTX_LANRX_P0 C50 1 2 0.1U_0402_16V7K

<23> PCIE_FRX_C_LANTX_P0 P_GPP_RXP0 P_GPP_TXP0 PCIE_FTX_C_LANRX_P0 <23>
LAN PCIE_FRX_C_LANTX_N0 AE6 AD4 PCIE_FTX_LANRX_N0 C55 1 2 0.1U_0402_16V7K LAN
<23> PCIE_FRX_C_LANTX_N0 P_GPP_RXN0 P_GPP_TXN0 PCIE_FTX_C_LANRX_N0 <23>
PCIE_FRX_WLANTX_P1 AD8 AD2 PCIE_FTX_WLANRX_P1 C51 1 2 0.1U_0402_16V7K
<22> PCIE_FRX_WLANTX_P1 P_GPP_RXP1 P_GPP_TXP1 PCIE_FTX_C_WLANRX_P1 <22>
WLAN PCIE_FRX_WLANTX_N1 AD7 AD1 PCIE_FTX_WLANRX_N1 C54 1 2 0.1U_0402_16V7K WLAN
2 <22> PCIE_FRX_WLANTX_N1 P_GPP_RXN1 P_GPP_TXN1 PCIE_FTX_C_WLANRX_N1 <22> 2
AC9 P_GPP_RXP2 P_GPP_TXP2 AC3
GPP
AC8 P_GPP_RXN2 P_GPP_TXN2 AC2

AC5 P_GPP_RXP3 P_GPP_TXP3 AB5
AC6 P_GPP_RXN3 P_GPP_TXN3 AB4
UMI_MTX_C_FRX_P0 AG8 AG2 UMI_FTX_MRX_P0 C59 1 2 0.1U_0402_16V7K

<12> UMI_MTX_C_FRX_P0 P_UMI_RXP0 P_UMI_TXP0 UMI_FTX_C_MRX_P0 <12>
UMI_MTX_C_FRX_N0 AG9 AG3 UMI_FTX_MRX_N0 C60 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_N0 P_UMI_RXN0 P_UMI_TXN0 UMI_FTX_C_MRX_N0 <12>
UMI_MTX_C_FRX_P1 AG6 AF4 UMI_FTX_MRX_P1 C61 1 2 0.1U_0402_16V7K
UMI_MTX_C_FRX_N1 AG5 AF5 UMI_FTX_MRX_N1 C62 1 2 0.1U_0402_16V7K
UMI_MTX_C_FRX_P2 AF7 AF1 UMI_FTX_MRX_P2 C122 1 2 0.1U_0402_16V7K
UMI_MTX_C_FRX_N2 AF8 AF2 UMI_FTX_MRX_N2 C123 1 2 0.1U_0402_16V7K
UMI_MTX_C_FRX_P3 AE8 AE2 UMI_FTX_MRX_P3 C120 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_P3 UMI_FTX_C_MRX_P3 <12>
UMI
UMI_MTX_C_FRX_N3 P_UMI_RXP3 P_UMI_TXP3 UMI_FTX_MRX_N3 C121 0.1U_0402_16V7K

<12> UMI_MTX_C_FRX_N3 AE9 P_UMI_RXN3 P_UMI_TXN3 AE3 1 2 UMI_FTX_C_MRX_N3 <12>
+1.2VS 1 2 P_ZVDDP AG11 P_ZVDDP P_ZVSS AH11 P_ZVSS 1 2

R1 196_0402_1% R2 196_0402_1%
LOTES_ACA-ZIF-109-P12-A_FS1R2 @
3 3
FAN Control Circuit
+5VS JFAN @
1A +FAN 1 1
2 2
2 2 3 3
C15
C13 1000P_0402_50V7K 4
10U_0603_6.3V6M @ GND
5 GND
U2 1 1
1 8 ACES_85204-0300N
EN GND
2 VIN GND 7
+FAN 3 6 R59 10K_0402_5%
VOUT GND
<27> EN_DFAN1 4 VSET GND 5 2 1 +3VS
10mil 1
C17 APL5607KI-TRG_SO8
FAN_SPEED1 <27>
1
10U_0603_6.3V6M C14
2 0.01U_0402_25V7K
4 @ 4
2

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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom A
4019IS
A B C D E
A B C D E
om
.c
f ix
se
<10> DDR_A_DQS[0..7] <11> DDR_B_DQS[0..7]
ro
<10> DDR_A_DQS#[0..7] <11> DDR_B_DQS#[0..7]

w.
1 1
ww
JAPUB JAPUC
MEMORY CHANNEL A MEMORY CHANNEL B
<10> DDR_A_MA[0..15] DDR_A_D[0..63] <10> <11> DDR_B_MA[0..15] DDR_B_D[0..63] <11>
DDR_A_MA0 U20 E13 DDR_A_D0 DDR_B_MA0 T27 A14 DDR_B_D0
DDR_A_MA1 MA_ADD0 MA_DATA0 DDR_A_D1 DDR_B_MA1 MB_ADD0 MB_DATA0 DDR_B_D1
R20 MA_ADD1 MA_DATA1 J13 P24 MB_ADD1 MB_DATA1 B14
DDR_A_MA2 R21 H15 DDR_A_D2 DDR_B_MA2 P25 D16 DDR_B_D2
P22 MA_ADD3 MA_DATA3 J15 N27 MB_ADD3 MB_DATA3 E16
DDR_A_MA4 P21 H13 DDR_A_D4 DDR_B_MA4 N26 B13 DDR_B_D4
N24 MA_ADD5 MA_DATA5 F13 M28 MB_ADD5 MB_DATA5 C13
DDR_A_MA6 N23 F15 DDR_A_D6 DDR_B_MA6 M27 B16 DDR_B_D6
N20 MA_ADD7 MA_DATA7 E15 M24 MB_ADD7 MB_DATA7 A16
DDR_A_MA8 N21 DDR_B_MA8 M25
DDR_A_MA9 MA_ADD8 DDR_A_D8 DDR_B_MA9 MB_ADD8 DDR_B_D8
M21 MA_ADD9 MA_DATA8 H17 L26 MB_ADD9 MB_DATA8 C17
DDR_A_MA10 U23 F17 DDR_A_D9 DDR_B_MA10 U26 B18 DDR_B_D9
M22 MA_ADD11 MA_DATA10 E19 L27 MB_ADD11 MB_DATA10 B20
DDR_A_MA12 L24 J19 DDR_A_D11 DDR_B_MA12 K27 A20 DDR_B_D11
AA25 MA_ADD13 MA_DATA12 G16 W26 MB_ADD13 MB_DATA12 E17
DDR_A_MA14 L21 H16 DDR_A_D13 DDR_B_MA14 K25 B17 DDR_B_D13
L20 MA_ADD15 MA_DATA14 H19 K24 MB_ADD15 MB_DATA14 B19
F19 DDR_A_D15 C19 DDR_B_D15
DDR_A_BS0 MA_DATA15 DDR_B_BS0 MB_DATA15
<10> DDR_A_BS0 U24 MA_BANK0 <11> DDR_B_BS0 U27 MB_BANK0
DDR_A_BS1 U21 H20 DDR_A_D16 DDR_B_BS1 T28 C21 DDR_B_D16
<10> DDR_A_BS1 MA_BANK1 MA_DATA16 <11> DDR_B_BS1 MB_BANK1 MB_DATA16
DDR_A_BS2 L23 F21 DDR_A_D17 DDR_B_BS2 K28 B22 DDR_B_D17
<10> DDR_A_BS2 MA_BANK2 MA_DATA17 <11> DDR_B_BS2 MB_BANK2 MB_DATA17
J23 DDR_A_D18 C23 DDR_B_D18
<10> DDR_A_DM[0..7] MA_DATA18 <11> DDR_B_DM[0..7] MB_DATA18
DDR_A_DM0 E14 H23 DDR_A_D19 DDR_B_DM0 D14 A24 DDR_B_D19
DDR_A_DM1 MA_DM0 MA_DATA19 DDR_A_D20 DDR_B_DM1 MB_DM0 MB_DATA19 DDR_B_D20
J17 MA_DM1 MA_DATA20 G20 A18 MB_DM1 MB_DATA20 D20
DDR_A_DM2 E21 E20 DDR_A_D21 DDR_B_DM2 A22 B21 DDR_B_D21
DDR_A_DM3 MA_DM2 MA_DATA21 DDR_A_D22 DDR_B_DM3 MB_DM2 MB_DATA21 DDR_B_D22
F25 MA_DM3 MA_DATA22 G22 C25 MB_DM3 MB_DATA22 E23
DDR_A_DM4 AD27 H22 DDR_A_D23 DDR_B_DM4 AF25 B23 DDR_B_D23
DDR_A_DM5 MA_DM4 MA_DATA23 DDR_B_DM5 MB_DM4 MB_DATA23
AC23 MA_DM5 AG22 MB_DM5
2 DDR_A_DM6 DDR_A_D24 DDR_B_DM6 DDR_B_D24 2
AD19 MA_DM6 MA_DATA24 G24 AH18 MB_DM6 MB_DATA24 E24
DDR_A_DM7 AC15 E25 DDR_A_D25 DDR_B_DM7 AD14 B25 DDR_B_D25
MA_DM7 MA_DATA25 DDR_A_D26 MB_DM7 MB_DATA25 DDR_B_D26
MA_DATA26 G27 MB_DATA26 B27
DDR_A_DQS0 G14 G26 DDR_A_D27 DDR_B_DQS0 C15 D28 DDR_B_D27
DDR_A_DQS#0 MA_DQS_H0 MA_DATA27 DDR_A_D28 DDR_B_DQS#0 MB_DQS_H0 MB_DATA27 DDR_B_D28
H14 MA_DQS_L0 MA_DATA28 F23 B15 MB_DQS_L0 MB_DATA28 B24
DDR_A_DQS1 G18 H24 DDR_A_D29 DDR_B_DQS1 E18 D24 DDR_B_D29
DDR_A_DQS#1 MA_DQS_H1 MA_DATA29 DDR_A_D30 DDR_B_DQS#1 MB_DQS_H1 MB_DATA29 DDR_B_D30
H18 MA_DQS_L1 MA_DATA30 E28 D18 MB_DQS_L1 MB_DATA30 D26
DDR_A_DQS2 J21 F27 DDR_A_D31 DDR_B_DQS2 E22 C27 DDR_B_D31
DDR_A_DQS#2 MA_DQS_H2 MA_DATA31 DDR_B_DQS#2 MB_DQS_H2 MB_DATA31
H21 MA_DQS_L2 D22 MB_DQS_L2
DDR_A_DQS3 E27 AB28 DDR_A_D32 DDR_B_DQS3 B26 AG26 DDR_B_D32
DDR_A_DQS#3 MA_DQS_H3 MA_DATA32 MB_DQS_H3 MB_DATA32
E26 MA_DQS_L3 MA_DATA33 AC27 DDR_A_D33 DDR_B_DQS#3 A26 MB_DQS_L3 MB_DATA33 AH26 DDR_B_D33
DDR_A_DQS4 AE26 AD25 DDR_A_D34 DDR_B_DQS4 AG24 AF23 DDR_B_D34
AD26 MA_DQS_L4 MA_DATA35 AA24 DDR_A_D35 DDR_B_DQS#4 AG25 MB_DQS_L4 MB_DATA35 AG23 DDR_B_D35
DDR_A_DQS5 AB22 AE28 DDR_A_D36 DDR_B_DQS5 AG21 AG27 DDR_B_D36
AA22 MA_DQS_L5 MA_DATA37 AD28 DDR_A_D37 DDR_B_DQS#5 AF21 MB_DQS_L5 MB_DATA37 AF27 DDR_B_D37
DDR_A_DQS6 AB18 AB26 DDR_A_D38 DDR_B_DQS6 AG17 AH24 DDR_B_D38
AA18 MA_DQS_L6 MA_DATA39 AC25 DDR_A_D39 DDR_B_DQS#6 AG18 MB_DQS_L6 MB_DATA39 AE24 DDR_B_D39
DDR_A_DQS7 AA14 DDR_B_DQS7 AH14
DDR_A_DQS#7 MA_DQS_H7 MB_DQS_H7
AA15 MA_DQS_L7 MA_DATA40 Y23 DDR_A_D40 DDR_B_DQS#7 AG14 MB_DQS_L7 MB_DATA40 AE22 DDR_B_D40
MA_DATA41 AA23 DDR_A_D41 MB_DATA41 AH22 DDR_B_D41
DDR_A_CLK0 T21 Y21 DDR_A_D42 DDR_B_CLK0 R26 AE20 DDR_B_D42
<10> DDR_A_CLK0 MA_CLK_H0 MA_DATA42 <11> DDR_B_CLK0 MB_CLK_H0 MB_DATA42
DDR_A_CLK0# T22 AA20 DDR_A_D43 DDR_B_CLK0# R27 AH20 DDR_B_D43
<10> DDR_A_CLK0# MA_CLK_L0 MA_DATA43 <11> DDR_B_CLK0# MB_CLK_L0 MB_DATA43
DDR_A_CLK1 R23 AB24 DDR_A_D44 DDR_B_CLK1 P27 AD23 DDR_B_D44
<10> DDR_A_CLK1 MA_CLK_H1 MA_DATA44 <11> DDR_B_CLK1 MB_CLK_H1 MB_DATA44
DDR_A_CLK1# R24 AD24 DDR_A_D45 DDR_B_CLK1# P28 AD22 DDR_B_D45
<10> DDR_A_CLK1# MA_CLK_L1 MA_DATA45 <11> DDR_B_CLK1# MB_CLK_L1 MB_DATA45
MA_DATA46 AA21 DDR_A_D46 MB_DATA46 AD21 DDR_B_D46
DDR_A_CKE0 H28 AC21 DDR_A_D47 DDR_B_CKE0 J26 AD20 DDR_B_D47
<10> DDR_A_CKE0 MA_CKE0 MA_DATA47 <11> DDR_B_CKE0 MB_CKE0 MB_DATA47
DDR_A_CKE1 H27 DDR_B_CKE1 J27
<10> DDR_A_CKE1 MA_CKE1 <11> DDR_B_CKE1 MB_CKE1
MA_DATA48 AA19 DDR_A_D48 MB_DATA48 AF19 DDR_B_D48
DDR_A_ODT0 Y25 AC19 DDR_A_D49 DDR_B_ODT0 W27 AE18 DDR_B_D49
<10> DDR_A_ODT0 MA_ODT0 MA_DATA49 <11> DDR_B_ODT0 MB_ODT0 MB_DATA49
DDR_A_ODT1 AA27 AC17 DDR_A_D50 DDR_B_ODT1 Y28 AE16 DDR_B_D50
<10> DDR_A_ODT1 MA_ODT1 MA_DATA50 <11> DDR_B_ODT1 MB_ODT1 MB_DATA50
MA_DATA51 AA17 DDR_A_D51 MB_DATA51 AH16 DDR_B_D51
DDR_A_SCS0# V22 AB20 DDR_A_D52 DDR_B_SCS0# V25 AG20 DDR_B_D52
3 <10> DDR_A_SCS0# MA_CS_L0 MA_DATA52 <11> DDR_B_SCS0# MB_CS_L0 MB_DATA52 3
DDR_A_SCS1# AA26 Y19 DDR_A_D53 DDR_B_SCS1# Y27 AG19 DDR_B_D53
<10> DDR_A_SCS1# MA_CS_L1 MA_DATA53 <11> DDR_B_SCS1# MB_CS_L1 MB_DATA53
MA_DATA54 AD18 DDR_A_D54 MB_DATA54 AF17 DDR_B_D54
DDR_A_RAS# V21 AD17 DDR_A_D55 DDR_B_RAS# V24 AD16 DDR_B_D55
<10> DDR_A_RAS# MA_RAS_L MA_DATA55 <11> DDR_B_RAS# MB_RAS_L MB_DATA55
DDR_A_CAS# W24 DDR_B_CAS# V27
<10> DDR_A_CAS# MA_CAS_L <11> DDR_B_CAS# MB_CAS_L
DDR_A_WE# W23 AA16 DDR_A_D56 DDR_B_WE# V28 AG15 DDR_B_D56
<10> DDR_A_WE# MA_WE_L MA_DATA56 <11> DDR_B_WE# MB_WE_L MB_DATA56
MA_DATA57 Y15 DDR_A_D57 MB_DATA57 AD15 DDR_B_D57
MEM_MA_RST# H25 AA13 DDR_A_D58 MEM_MB_RST# J25 AG13 DDR_B_D58
<10> MEM_MA_RST# MA_RESET_L MA_DATA58 <11> MEM_MB_RST# MB_RESET_L MB_DATA58
MEM_MA_EVENT#T24 AC13 DDR_A_D59 MEM_MB_EVENT#T25 AD13 DDR_B_D59
<10> MEM_MA_EVENT# MA_EVENT_L MA_DATA59 <11> MEM_MB_EVENT# MB_EVENT_L MB_DATA59
15mil MA_DATA60 Y17 DDR_A_D60 MB_DATA60 AG16 DDR_B_D60
+MEM_VREF W20 AB16 DDR_A_D61 AF15 DDR_B_D61
M_VREF MA_DATA61 MB_DATA61
MA_DATA62 AB14 DDR_A_D62 MB_DATA62 AE14 DDR_B_D62
+1.5V 1 2 M_ZVDDIO W21 M_ZVDDIO MA_DATA63 Y13 DDR_A_D63 MB_DATA63 AF13 DDR_B_D63
R60 39.2_0402_1%
EVENT# pull high 0.75V Reference Voltage +1.5V

2
+1.5V
4 R64 4
1K_0402_1%
R15
15mil
1 2 1K_0402_5% MEM_MA_EVENT#
1
+MEM_VREF
R61 1 2 1K_0402_5% MEM_MB_EVENT#
2
1 2
R65 C124 C125
1K_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.
1000P_0402_50V7K 0.1U_0402_16V7K 2010/11/11 2011/11/11 Title
2 1 Issued Date Deciphered Date
1
www.vinafix.vn
Custom A
4019IS
A B C D E
A B C D E
om
Close to APU JAPUD
ANALOG/DISPLAY/MISC
C56 1 2 0.1U_0402_16V7K DP0_TXP0 L3 D1 DP0_AUXP C47 1 2 0.1U_0402_16V7K
.c
<17> DP0_TXP0_C DP0_TXP0 DP0_AUXP DP0_AUXP_C <17>
C48 1 2 0.1U_0402_16V7K DP0_TXN0 L2 D2 DP0_AUXN C49 1 2 0.1U_0402_16V7K LVDS DP0_AUXP R25 2 1 1.8K_0402_5%
<17> DP0_TXN0_C DP0_TXN0 DP0_AUXN DP0_AUXN_C <17>
LVDS C58 DP0_TXP1 DP1_AUXP DP0_AUXN
2 0.1U_0402_16V7K C57 2 0.1U_0402_16V7K R58 1 1.8K_0402_5%
ix
<17> DP0_TXP1_C 1 K5 DP0_TXP1 DP1_AUXP E1 1 ML_VGA_AUXP <14> 2
C53 1 2 0.1U_0402_16V7K DP0_TXN1 K4 E2 DP1_AUXN C52 1 2 0.1U_0402_16V7K CRT (To FCH)
<17> DP0_TXN1_C DP0_TXN1 DP1_AUXN ML_VGA_AUXN <14>
DP1_AUXP R10 2 1 1.8K_0402_5%
f K2 D5 UMA_HDMI_CLK
DP0_TXP2 DP2_AUXP UMA_HDMI_CLK <20>
se
K1 D6 UMA_HDMI_DATA HDMI DP1_AUXN R11 2 1 1.8K_0402_5%
DP0_TXN2 DP2_AUXN UMA_HDMI_DATA <20>
DISPLAY PORT 0
J3 E5 LVDS_HPD R74 2 1 100K_0402_5%
ro
DP0_TXP3 DP3_AUXP
J2 DP0_TXN3 DP3_AUXN E6
FCH_CRT_HPD R75 2 1 100K_0402_5%
C63 1 2 0.1U_0402_16V7K DP1_TXP0 H5 F5
w.
1 <14> ML_VGA_TXP0 DP1_TXP0 DP4_AUXP 1

C64 1 2 0.1U_0402_16V7K DP1_TXN0 H4 F6 HDMI_HPD R95 2 1 100K_0402_5%
<14> ML_VGA_TXN0 DP1_TXN0 DP4_AUXN
DISPLAY PORT MISC.

ww
C65 1 2 0.1U_0402_16V7K DP1_TXP1 H2 G5

<14> ML_VGA_TXP1 DP1_TXP1 DP5_AUXP
C66 1 2 0.1U_0402_16V7K DP1_TXN1 H1 G6
<14> ML_VGA_TXN1 DP1_TXN1 DP5_AUXN
CRT C67 DP1_TXP2 LVDS_HPD
<14> ML_VGA_TXP2 1 2 0.1U_0402_16V7K G3 DP1_TXP2 DP0_HPD D3 LVDS_HPD <17>
(To FCH) <14> ML_VGA_TXN2
C68 1 2 0.1U_0402_16V7K DP1_TXN2 G2 E3 FCH_CRT_HPD
FCH_CRT_HPD <14>
DP1_TXN2 DP1_HPD HDMI_HPD +1.5V
DISPLAY PORT 1
DP2_HPD D7 HDMI_HPD <20> 3.3V Tolerance
C69 1 2 0.1U_0402_16V7K DP1_TXP3 F2 E7
<14> ML_VGA_TXP3 DP1_TXP3 DP3_HPD
C70 1 2 0.1U_0402_16V7K DP1_TXN3 F1 F7
<14> ML_VGA_TXN3 DP1_TXN3 DP4_HPD
G7 APU_SVT_R R36 2 @ 1 1K_0402_5%
UMA_HDMI_TX2+ DP5_HPD
<20> UMA_HDMI_TX2+ L9 DP2_TXP0
<20> UMA_HDMI_TX2- UMA_HDMI_TX2- L8 C6 APU_SVC_R R39 2 @ 1 1K_0402_5%
DP2_TXN0 DP_BLON
DP_DIGON B6
<20> UMA_HDMI_TX1+ UMA_HDMI_TX1+ L5 A6 DP_INT_PWM APU_SVD_R R41 2 @ 1 1K_0402_5%
DP2_TXP1 DP_VARY_BL DP_INT_PWM <9>
<20> UMA_HDMI_TX1- UMA_HDMI_TX1- L6 DP2_TXN1 DP_AUX_ZVSS APU_SIC R42
HDMI DP_AUX_ZVSS C1 1 2 2 1 1K_0402_5%
<20> UMA_HDMI_TX0+ UMA_HDMI_TX0+ K8 R16 150_0402_1%
UMA_HDMI_TX0- DP2_TXP2 APU_SID R44
<20> UMA_HDMI_TX0- K7 DP2_TXN2 TEST6 AD12 2 1 1K_0402_5%
DISPLAY PORT 2
TEST9 M18 T5
<20> UMA_HDMI_TXC+ UMA_HDMI_TXC+ J6 N18 T6 APU_ALERT# R46 2 1 1K_0402_5%
UMA_HDMI_TXC- DP2_TXP3 TEST10
<20> UMA_HDMI_TXC- J5 DP2_TXN3 TEST14 F11 T1
G11 T2 DMA_ACTIVE# R48 2 1 1K_0402_5%
APU_CLKP TEST15
<12> APU_CLKP AE11 CLKIN_H TEST16 H11 T3
100MHz (SS) APU_CLKN AD11 J11 T4
<12> APU_CLKN CLKIN_L TEST17 +1.5VS
F12 APU_TEST18 R18 1 2 1K_0402_5%
CLK
APU_DISP_CLKP AB11 TEST18
<12> APU_DISP_CLKP DISP_CLKIN_H TEST19 G12 APU_TEST19 R19 1 2 1K_0402_5%
100MHz (NSS) APU_DISP_CLKN AA11 J12 APU_TEST20 R21 1 2 1K_0402_5%
<12> APU_DISP_CLKN DISP_CLKIN_L TEST20
TEST
TEST24 H12 APU_TEST24 R22 1 2 1K_0402_5% DMA_ACTIVE# R57 2 @ 1 1K_0402_5%
R31 1 @ 2 0_0402_5% APU_SVC_R B3 AE10 TEST25_H R23 1 2 510_0402_1%
<37> APU_SVC SVC TEST25_H
R32 1 @ 2 0_0402_5% APU_SVD_R A3 AD10 TEST25_L R24 1 2 510_0402_1% +1.2VS APU_RST# R52 2 1 300_0402_5%
<37> APU_SVD SVD TEST25_L
TEST28_H L10 T7
2 R33 @ APU_SVT_R APU_PWRGD 2
1 2 0_0402_5% C3 M10 R54 2 1 300_0402_5%
SER.
<37> APU_SVT SVT TEST28_L T8
TEST30_H P19
APU_SIC AG12 R19
<9> APU_SIC SIC TEST30_L
SB-TSI APU_SID AH12 K22 APU_TEST31 R27 1 2 39.2_0402_1%
<9> APU_SID SID TEST31
T19 APU_RST# 1 2
APU_RST# TEST32_H C126 1000P_0402_50V7K
<12> APU_RST# AF10 RESET_L TEST32_L N19 Change TEST35 to pull-high
APU_PWRGD AB12 AA12 APU_TEST35 R28 1 2 300_0402_5% +1.5V
<12,37> APU_PWRGD PWROK TEST35 R29 @ 300_0402_5% for HDMI issue APU_PWRGD
1 2 1 2
CTRL
APU_PROCHOT# AC10 W10 FS1R2 R30 1 2 10K_0402_5% +3VALW C127 1000P_0402_50V7K
APU_THERMTRIP# AE12 PROCHOT_L FS1R2
THERMTRIP_L DMAACTIVE_L AC12 DMA_ACTIVE# DMA_ACTIVE# <12>
APU_ALERT# AF12
<14> APU_ALERT# ALERT_L
TEST4 P18 T11
APU_TDI H10 R18 T12 Stuff C126 and C127 for EMI request on DVT
APU_TDO TDI TEST5
J10 TDO
APU_TCK F10 +3VS
APU_TMS TCK JTAG
G10 TMS
APU_TRST# F9 Y10
APU_DBRDY TRST_L RSVD1 UMA_HDMI_CLK R66
G9 DBRDY RSVD2 AA10 2 1 4.7K_0402_5%
RSVD
APU_DBREQ# H9 Y12
DBREQ_L RSVD3 UMA_HDMI_DATA R67
RSVD4 K21 2 1 4.7K_0402_5%
<37> APU_VDD_RUN_FB_L
R212 1 2 0_0402_5% VSS_SENSE B4 VSS_SENSE
T9 C5 VDDP_SENSE Aux signal are re-configured as I2C signals for DDC
R214 1 2 0_0402_5% VDDNB_SENSE A4
<37> APU_VDDNB_SEN VDDNB_SENSE APU AUX pin are 3.3V tolerant
SENSE
T10 A5 VDDIO_SENSE
R215 1 2 0_0402_5% VDD_SENSE C4
<37> APU_VDD_SEN VDD_SENSE
T13 B5 VDDR_SENSE
+1.5V +1.5VS
3 3
2
R55 R77
1K_0402_5% 1K_0402_5%
HDT Debug conn Asserted as an input to force the @
processor into the HTC-active state
1
+1.5V
Close to JHDT
APU_PROCHOT# 1 @ 2
<12> APU_PROCHOT# H_PROCHOT# <27,37>
R97 1 2 1K_0402_5% APU_TDI R136 0_0402_5%
R100 1 2 1K_0402_5% APU_TCK +1.5V

Reserve R77 and R85 for
JHDT @
R110 1 2 1K_0402_5% APU_TMS 1 2 APU_TCK DeepS3 leakage on DVT
1 2
R116 1 2 1K_0402_5% APU_TRST# 3 4 APU_TMS
3 4 +1.5V +1.5VS
R117 1 2 1K_0402_5% APU_DBREQ# 5 6 APU_TDI
5 6
Close to APU side, Debug Stuff
7 8 APU_TDO
7 8
1
APU_TRST# 1 @ 2 9 10 APU_PWRGD_RR 1 @ 2 APU_PWRGD R68 R69 R85
R121 0_0402_5% 9 10 R125 0_0402_5% 1K_0402_5% 10K_0402_5% 10K_0402_5%
1 @ 2 11 12 APU_RST#_R 1 @ 2 APU_RST# @
R122 10K_0402_5% 11 12 R127 0_0402_5% Thermal Shutdown Temperature:
2 2
2
1 @ 2 13 14 APU_DBRDY
13 14 115 degree
B
R123 10K_0402_5%
1 @ 2 15 16 APU_DBREQ# Q5
15 16
E
R124 10K_0402_5% APU_THERMTRIP# 3 1 H_THERMTRIP# <13>
C
4 @ APU_TEST19 4
17 17 18 18 1 2
R118 0_0402_5% MMBT3904_NL_SOT23-3
19 20 1 @ 2 APU_TEST18
19 20 R119 0_0402_5%
SAMTE_ASP-136446-07-B
www.vinafix.vn
4019IS
A B C D E
A B C D E
om
.c
JAPUF
ix
J20 VSS_1 VSS_73 A19
L4 VSS_2 VSS_74 A21
R7 VSS_3 VSS_75 A23
f W18 VSS_4 VSS_76 A25

se
A15 VSS_5 VSS_77 A7
AB17 VSS_6 VSS_78 AA4
AC22 AA7
ro
+APU_CORE JAPUE +APU_CORE VSS_7 VSS_79

AE21 VSS_8 VSS_80 AB13
Co-layout with C100 on PVT AF24 VSS_9 VSS_81 AB15
F8 R11 AH23 AB19
w.
1 VDD_1 VDD_32 VSS_10 VSS_82 1

H6 VDD_2 VDD_33 T10 AH25 VSS_11 VSS_83 AB21
J1 H8 +1.5V B7 AB23
VDD_3 VDD_34 VSS_12 VSS_84
ww
J14 VDD_4 VDD_35 G1 C14 VSS_13 VSS_85 AB25

P6 VDD_5 VDD_36 U11 C16 VSS_14 VSS_86 AB27
P10 VDD_6 VDD_37 W11 1 C2 VSS_15 VSS_87 AB9
J16 VDD_7 VDD_38 W13 C20 VSS_16 VSS_88 AC14
J18 W15 + C147 C22 AC16
VDD_8 VDD_39 330U_D2_2V_Y VSS_17 VSS_89
J9 VDD_9 VDD_40 W17 C24 VSS_18 VSS_90 AC18
K19 W19 @ C26 AC20
VDD_10 VDD_41 2 VSS_19 VSS_91
K3 VDD_11 VDD_42 AB3 C28 VSS_20 VSS_92 AC24
K17 VDD_12 VDD_43 AD3 D13 VSS_21 VSS_93 AC26
M3 VDD_13 VDD_44 AD6 D15 VSS_22 VSS_94 AC28
K6 VDD_14 VDD_45 AE1 D17 VSS_23 VSS_95 AC4
V10 VDD_15 VDD_46 L1 D19 VSS_24 VSS_96 AC7
V18 Y6 +1.5V D23 AD9
V3 M6 D25 AE13
F3
VDD_17 50A VDD_48
N11 C82 C83 C88 C89 C90 C91 C92 C93 C94 C95 C96 C97 C98 C99 C130 D27
VSS_26 VSS_98
AE15
L18 VDD_19 VDD_50 N1 E4 VSS_28 VSS_100 AE17
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
180P_0402_50V8J
180P_0402_50V8J
V6 VDD_20 VDD_51 T3 1 E9 VSS_29 VSS_101 M9
W1 T6 C81 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 F14 N10
VDD_21 VDD_52 + C100 VSS_30 VSS_102
T18 VDD_22 VDD_53 U19 F16 VSS_31 VSS_103 N4
Y14 VDD_23 VDD_54 U1 F18 VSS_32 VSS_104 N7
AA1 Y16 330U_2.5V_M_R17 F20 R10
VDD_24 VDD_55 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VSS_33 VSS_105
AB6 VDD_25 VDD_56 Y18 F22 VSS_34 VSS_106 R4
AC1 VDD_26 VDD_57 Y3 F26 VSS_35 VSS_107 T11
R1 VDD_27 VDD_58 D4 F28 VSS_36 VSS_108 T9
P3 VDD_28 VDD_59 F4 G13 VSS_37 VSS_109 U10
K10 VDD_29 VDD_60 AF6 G15 VSS_38 VSS_110 U18
H3 VDD_30 VDD_61 AF3 G17 VSS_39 VSS_111 U4
M19 VDD_31 VDD_62 L11 G19 VSS_40 VSS_112 U7
G21 VSS_41 VSS_113 V11
G23 VSS_42 VSS_114 AE19
2
C8 C11 +1.5V G25 AE23 2
+APU_CORE_NB VDDNB_1 VDDNB_13 +APU_CORE_NB VSS_43 VSS_115
D10 VDDNB_2 VDDNB_14 C12 G4 VSS_44 VSS_116 AE25
B8 D9 C103 C104 C131 J22 AE27
VDDNB_3 VDDNB_15 VSS_45 VSS_117
B12 VDDNB_4 VDDNB_16 D8 J24 VSS_46 VSS_118 AE4
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
180P_0402_50V8J
180P_0402_50V8J
C9 VDDNB_5 VDDNB_17 D12 If the VSS plane is cut to J4 VSS_47 VSS_119 AE7
A9 D11 J7 AF14
A10
VDDNB_6 33A VDDNB_18
B11 C102
1 1 1 1
create a VDDIO plane, K11
VSS_48 VSS_120
AF16
A8 VDDNB_8 VDDNB_20 A12 place across the VDDIO K14 VSS_50 VSS_122 AF18
A11 B10 K9 AF20
E10
VDDNB_9 VDDNB_21
E12
2 2 2 2 and VSS plane split AC11
VSS_51 VSS_123
AF22
E11 VDDNB_11 VDDNB_23 B9 L19 VSS_53 VSS_125 AF26
C10 VDDNB_12 L7 VSS_54 VSS_126 AF28
K13 VDDNB_CAP C80 C141 M11 AF9
VDDNB_CAP_1 VSS_55 VSS_127
VDDNB_CAP_2 K12 AF11 VSS_56 VSS_128 AG4
22U_0805_6.3V6M
22U_0805_6.3V6M
180P_0402_50V8J
V19 VSS_57 VSS_129 AG7
C79 1 1 1 V9 AH13
VSS_58 VSS_130
W16 VSS_59 VSS_131 AH15
+1.5V H26 VDDIO_1 VDDIO_19 T23 +1.5V W4 VSS_60 VSS_132 AH17
K20 VDDIO_2 VDDIO_20 T26 W7 VSS_61 VSS_133 AH19
2 2 2
J28 VDDIO_3 VDDIO_21 U22 Y11 VSS_62 VSS_134 AH21
K23 VDDIO_4 VDDIO_22 U25 Y20 VSS_63 VSS_135 P9
K26 VDDIO_5 VDDIO_23 U28 Y22 VSS_64 VSS_136 C18
L22 VDDIO_6 VDDIO_24 Y26 Y9 VSS_65 VSS_137 D21
L25 VDDIO_7 VDDIO_25 T20 A17 VSS_66 VSS_138 W14
L28 VDDIO_8 VDDIO_26 R28 A13 VSS_67 VSS_139 P11
M20 VDDIO_9 VDDIO_27 R25 K16 VSS_68 VSS_140 C7
M23 VDDIO_10 VDDIO_28 R22 F24 VSS_69 VSS_141 E8
M26
N22
VDDIO_11 3.2A VDDIO_29 V20
V23
G8
H7
VSS_70 VSS_142 K18
W12
VDDIO_12 VDDIO_30 VSS_71 VSS_143
N25 VDDIO_13 VDDIO_31 V26 J8 VSS_72
N28 VDDIO_14 VDDIO_32 W22
P20 W25 LOTES_ACA-ZIF-109-P12-A_FS1R2
3 VDDIO_15 VDDIO_33 @ 3
P23 VDDIO_16 VDDIO_34 W28
P26 VDDIO_17 VDDIO_35 Y24
AA28 VDDIO_18 VDDIO_36 G28
+1.2VS
+1.2VS
AH6 VDDP_1 VDDR_1 AG10 VDDR Decoupling
AH5 VDDP_2 VDDR_2 AH8
AH4
AH3
VDDP_3 5A 3.5A VDDR_3 AH9
AH10 C110 C111 C115 C116 C76 C77 C78
+2.5VS VDDP_4 VDDR_4
AH7 VDDP_5
180P_0402_50V8J
180P_0402_50V8J
1000P_0402_50V7K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
L1
1 2 C170 C164 +VDDA AB10 C109 1
FBMA-L11-201209-300LMA30T VDDA 0.75A 1 1 1 1 1 1 1
4.7U_0603_6.3V6K
0.22U_0402_6.3V6K
3300P_0402_50V7K
40mil
1 1
1
C165 LOTES_ACA-ZIF-109-P12-A_FS1R2 2 2 2 2 2 2 2 2
@
Demo Board Capacitor
2
2 2
APU_CORE CORE_NB CORE_NB_CAP VDDIO_SUS
22uF x 10 22uF x 2 22uF x 2 (CPU side)
+1.2VS
VDDP Decoupling 0.22uF x 2 10uF x 1 180pF x 1 22uF x 4
0.01uF x 3 0.22uF x 2 4.7uF x 4
C72 C73 C74 C105 C106 C107 C108 C75
180pF x 2 180pF x 3 0.22uF x 6 +2(split)
180pF x 1 + 2(split)
22U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
180P_0402_50V8J
180P_0402_50V8J
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
1000P_0402_50V7K
C71 1 1 1 1 1 1 1 1 1
@
4
VDDP VDDR VDDA VDDIO_SUS 4
2 2 2 2 2 2 2 2 2 0.22uF x 2 0.22uF x 2 4.7uF x 1 (DIMM x2)
180pF x 2 1nF x 1 0.22uF x 1 100uF x 2
180pF x 2 3.3nF x 1 0.1uF x 12

www.vinafix.vn
4019IS
A B C D E
5 4 3 2 1
om
.c
SB-TSI
fix
se
ro
BSH111, the Vgs is:

min = 0.4V
w.
D @ D
C935 1 Max = 1.3V
2 0.1U_0402_16V4Z
ww
+3VS 1 R535 2 1 R536 2 When APU High -> MOS OFF (Vgs < 0.4V )
APU Low -> MOS ON (Vgs > 1.3V)
31.6K_0402_1% 30K_0402_1%
Vg = 1.607 V
2
G
Q14
APU_SID 3 1 EC_SMB_DA2
<7> APU_SID EC_SMB_DA2 <27>
D
BSH111_SOT23-3
2
G
Q15
APU_SIC 3 1 EC_SMB_CK2
<7> APU_SIC EC_SMB_CK2 <27>
D
BSH111_SOT23-3
C C
Panel PWM
+3VS
1
B R92 R93 B
47K_0402_5% 4.7K_0402_5%
2
APU_INVT_PWM <17>
6
Q25A
2 2N7002KDWH_SOT363-6
1 C Q25B in page30
1
1 2 2 Q21
<7> DP_INT_PWM
R89 2.2K_0402_5% B MMBT3904_NL_SOT23-3
E
3
1
R76
4.7K_0402_5%
2
A A

www.vinafix.vn
Custom A
4019IS
5 4 3 2 1
5 4 3 2 1
om
+1.5V +1.5V
JDDR3H DDR3 SO-DIMM A
.c
1 2
+VREF_DQA
DDR_A_D0
3
5
VREF_DQ
VSS2
VSS1
DQ4 4
6
DDR_A_D4
DDR_A_D5
Standard Type DDR_A_DQS[0..7] <6>
DDR_A_DQS#[0..7] <6>
ix
DDR_A_D1 DQ0 DQ5
7 DQ1 VSS3 8
9 10 DDR_A_DQS#0 DDR_A_D[0..63] <6>
VSS4 DQS#0
f
DDR_A_DM0 11 12 DDR_A_DQS0
DM0 DQS0
se
13 VSS5 VSS6 14 DDR_A_MA[0..15] <6>
DDR_A_D2 15 16 DDR_A_D6
DDR_A_D3 DQ2 DQ6 DDR_A_D7
17 18 DDR_A_DM[0..7] <6>
ro
DQ3 DQ7
19 VSS7 VSS8 20
w.
D
23 DQ9 DQ13 24 D
25 VSS9 VSS10 26
DDR_A_DQS#1 27 28 DDR_A_DM1
ww
DDR_A_DQS1 DQS#1 DM1 MEM_MA_RST#

29 DQS1 RESET# 30 MEM_MA_RST# <6>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
DDR_A_D16 DDR_A_D20 +1.5V
39 DQ16 DQ20 40
DQ17 DQ21
43 VSS15 VSS16 44
1
DDR_A_DQS#2 45 46 DDR_A_DM2
DDR_A_DQS2 DQS#2 DM2 R79
47 DQS2 VSS17 48
49 50 DDR_A_D22 1K_0402_1%
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
2
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56 +VREF_DQA
DQ24 DQ29
1
DDR_A_D25 59 60
DQ25 VSS21 DDR_A_DQS#3 R81
61 VSS22 DQS#3 62 1 1 1
DDR_A_DM3 63 64 DDR_A_DQS3 C114 C156 C157 1K_0402_1%
DM3 DQS3 @
65 VSS23 VSS24 66
1000P_0402_50V7K
0.1U_0402_16V7K
2.2U_0603_6.3V6K
2
DDR_A_D27 DQ26 DQ30 DDR_A_D31 2 2 2
69 DQ27 DQ31 70
71 VSS25 VSS26 72
DDR_A_CKE0 73 74 DDR_A_CKE1
<6> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 <6>
75 VDD1 VDD2 76
C 77 78 DDR_A_MA15 C
DDR_A_BS2 NC1 A15 DDR_A_MA14
<6> DDR_A_BS2 79 BA2 A14 80 Close to JDDRH.1
81 VDD3 VDD4 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98 Co-layout with C218 on PVT
99 VDD9 VDD10 100
DDR_A_CLK0 101 102 DDR_A_CLK1
<6> DDR_A_CLK0 CK0 CK1 DDR_A_CLK1 <6> +1.5V
DDR_A_CLK0# 103 104 DDR_A_CLK1#
<6> DDR_A_CLK0# CK0# CK1# DDR_A_CLK1# <6>
105 VDD11 VDD12 106
DDR_A_MA10 DDR_A_BS1 +1.5V
107 A10/AP BA1 108 DDR_A_BS1 <6>
DDR_A_BS0 109 110 DDR_A_RAS# 1
<6> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <6>
111 VDD13 VDD14 112
1
DDR_A_WE# 113 114 DDR_A_SCS0# + C148
<6> DDR_A_WE# WE# S0# DDR_A_SCS0# <6>
DDR_A_CAS# 115 116 DDR_A_ODT0 R80 330U_D2_2V_Y
<6> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <6>
117 118 1K_0402_1%
DDR_A_MA13 VDD15 VDD16 DDR_A_ODT1 2
119 A13 ODT1 120 DDR_A_ODT1 <6>
DDR_A_SCS1# 121 122
2
<6> DDR_A_SCS1# S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CAA
NCTEST VREF_CA
127 VSS27 VSS28 128
DDR_A_D32 129 130 DDR_A_D36 Change C218 to SF000002080 (330U) on DVT
DQ32 DQ36
1
DDR_A_D33 131 132 DDR_A_D37 1 1 @ 1
DQ33 DQ37 C101 C162 C161 R82
133 VSS29 VSS30 134
DDR_A_DQS#4 135 136 DDR_A_DM4 1K_0402_1%
B DQS#4 DM4 B
1000P_0402_50V7K
0.1U_0402_16V7K
2.2U_0603_6.3V6K
DDR_A_DQS4 137 138 Layout Note:

DQS4 VSS31 DDR_A_D38 2 2 2
139 140
2
DDR_A_D34 VSS32 DQ38 DDR_A_D39 Place near JDDRH

141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
DDR_A_D40 147 148 DDR_A_D45 +1.5V
DDR_A_D41 DQ40 DQ45 @
149 DQ41 VSS35 150
DDR_A_DQS#5 C218 1
Layout Note:
2 330U_6.3V_M_R15
+
151 VSS36 DQS#5 152
DDR_A_DM5 153 DM5 DQS5 154 DDR_A_DQS5 Place near JDDRH.203 and 204
DDR_A_D42
155 VSS37 VSS38 156
DDR_A_D46
Close to JDDR3H.126 C166 1
157 DQ42 DQ46 158 2 0.1U_0402_16V4Z
DDR_A_D43 159 160 DDR_A_D47
DQ43 DQ47 C168 1
161 VSS39 VSS40 162 2 0.1U_0402_16V4Z
DDR_A_D48 163 164 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53 C171 1 +0.75VS +1.5V
165 DQ49 DQ53 166 2 0.1U_0402_16V4Z
167 VSS41 VSS42 168
DDR_A_DQS#6 169 170 DDR_A_DM6 C174 1 2 0.1U_0402_16V4Z @
DDR_A_DQS6 DQS#6 DM6 C85
171 DQS6 VSS43 172 1 2 0.1U_0402_16V4Z
173 174 DDR_A_D54 C173 1 2 0.1U_0402_16V4Z
DDR_A_D50 VSS44 DQ54 DDR_A_D55
175 DQ50 DQ55 176
DDR_A_D51 177 178 C176 1 2 0.1U_0402_16V4Z
DQ51 VSS45 DDR_A_D60 C84
179 VSS46 DQ60 180 1 2 4.7U_0603_6.3V6K
DDR_A_D56 181 182 DDR_A_D61 C179 1 2 0.1U_0402_16V4Z
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7 C178 1 2 0.1U_0402_16V4Z C186 1 2 0.1U_0402_16V4Z
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
189 190 C185 1 2 0.1U_0402_16V4Z C205 1 2 0.1U_0402_16V4Z
DDR_A_D58 VSS49 VSS50 DDR_A_D62
191 DQ58 DQ62 192
DDR_A_D59 193 194 DDR_A_D63 C180 1 2 0.1U_0402_16V4Z
R90 1 DQ59 DQ63
A 2 195 VSS51 VSS52 196 A
10K_0402_5% 197 198 MEM_MA_EVENT#
SA0 EVENT# MEM_MA_EVENT# <6>
199 200 FCH_SDATA0
+3VS VDDSPD SDA FCH_SDATA0 <11,13,22>
FCH_SCLK0
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
201 SA1 SCL 202 FCH_SCLK0 <11,13,22>

1 1 +0.75VS 203 VTT1 VTT2 204 +0.75VS
1
C182
C181 205 206
R91 G1 G2 Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 10K_0402_5% LCN_DAN06-K4806-0102
@
2
www.vinafix.vn
Custom A
4019IS
5 4 3 2 1
A B C D E
om
+1.5V +1.5V
JDDR3L DDR3 SO-DIMM B DDR_B_DQS#[0..7] <6>
.c
1 2
+VREF_DQB
DDR_B_D0
3
5
VREF_DQ
VSS2
VSS1
DQ4 4
6
DDR_B_D4
DDR_B_D5
Standard Type DDR_B_DQS[0..7] <6>
ix
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS3 8 DDR_B_D[0..63] <6>
9 10 DDR_B_DQS#0
VSS4 DQS#0
f
DDR_B_DM0 11 12 DDR_B_DQS0 DDR_B_MA[0..15] <6>
DM0 DQS0
se
13 VSS5 VSS6 14
DDR_B_D2 15 16 DDR_B_D6 DDR_B_DM[0..7] <6>
DDR_B_D3 DQ2 DQ6 DDR_B_D7
17 18
ro
DQ3 DQ7
19 VSS7 VSS8 20
DDR_B_D8 21 22 DDR_B_D12
w.
1
23 DQ9 DQ13 24 1
25 VSS9 VSS10 26
DDR_B_DQS#1 27 28 DDR_B_DM1
ww
DDR_B_DQS1 DQS#1 DM1 MEM_MB_RST#

29 DQS1 RESET# 30 MEM_MB_RST# <6>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
+1.5V
43 VSS15 VSS16 44
DDR_B_DQS#2 45 46 DDR_B_DM2
DDR_B_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
1
49 50 DDR_B_D22
DDR_B_D18 VSS18 DQ22 DDR_B_D23 R83
51 DQ18 DQ23 52
DDR_B_D19 53 54 1K_0402_1%
DQ19 VSS19 DDR_B_D28
55 VSS20 DQ28 56
2
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3 +VREF_DQB
DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
1
DDR_B_D26 67 68 DDR_B_D30 1 1 1
DDR_B_D27 DQ26 DQ30 DDR_B_D31 C112 C184 C183 R84
69 DQ27 DQ31 70
71 72 @ 1K_0402_1%
VSS25 VSS26
1000P_0402_50V7K
0.1U_0402_16V7K
2.2U_0603_6.3V6K
2 2 2
2
DDR_B_CKE0 73 74 DDR_B_CKE1
<6> DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 <6>
75 VDD1 VDD2 76
2 77 78 DDR_B_MA15 2
DDR_B_BS2 NC1 A15 DDR_B_MA14
<6> DDR_B_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86 Close to JDDRL.1
87 VDD5 VDD6 88
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD9 VDD10 100
DDR_B_CLK0 101 102 DDR_B_CLK1
<6> DDR_B_CLK0 CK0 CK1 DDR_B_CLK1 <6>
DDR_B_CLK0# 103 104 DDR_B_CLK1#
<6> DDR_B_CLK0# CK0# CK1# DDR_B_CLK1# <6>
105 VDD11 VDD12 106
DDR_B_MA10 DDR_B_BS1 +1.5V
107 A10/AP BA1 108 DDR_B_BS1 <6>
DDR_B_BS0 109 110 DDR_B_RAS#
<6> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <6>
111 VDD13 VDD14 112
1
DDR_B_WE# 113 114 DDR_B_SCS0#
<6> DDR_B_WE# WE# S0# DDR_B_SCS0# <6>
DDR_B_CAS# 115 116 DDR_B_ODT0 R86
<6> DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 <6>
117 118 1K_0402_1%
DDR_B_MA13 VDD15 VDD16 DDR_B_ODT1
119 A13 ODT1 120 DDR_B_ODT1 <6>
DDR_B_SCS1# 121 122
2
<6> DDR_B_SCS1# S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CAB
NCTEST VREF_CA
127 VSS27 VSS28 128
DDR_B_D37 129 130 DDR_B_D32
DQ32 DQ36
1
DDR_B_D36 131 132 DDR_B_D33 1 1 @ 1
DQ33 DQ37 C113 C188 C187 R94
133 VSS29 VSS30 134
DDR_B_DQS#4 135 136 DDR_B_DM4 1K_0402_1%
3 DQS#4 DM4 3
1000P_0402_50V7K
0.1U_0402_16V7K
2.2U_0603_6.3V6K
DDR_B_DQS4 137 138 Layout Note:

DQS4 VSS31 DDR_B_D38 2 2 2
139 140
2
DDR_B_D34 VSS32 DQ38 DDR_B_D39 Place near JDDRH
141 DQ34 DQ39 142
DDR_B_D35 143 144
DQ35 VSS33 DDR_B_D44
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45 +1.5V
DDR_B_D41 DQ40 DQ45 @
149 DQ41 VSS35 150
DDR_B_DQS#5 C189 1
Layout Note:
2 330U_B2_2.5VM_R15M
+
151 VSS36 DQS#5 152
DDR_B_DM5 153 DM5 DQS5 154 DDR_B_DQS5 Place near JDDRH.203 and 204
DDR_B_D42
155 VSS37 VSS38 156
DDR_B_D46
Close to JDDR3L.126 C167 1
157 DQ42 DQ46 158 2 0.1U_0402_16V4Z
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47 C169 1
161 VSS39 VSS40 162 2 0.1U_0402_16V4Z
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53 C172 1 +0.75VS +1.5V
165 DQ49 DQ53 166 2 0.1U_0402_16V4Z
167 VSS41 VSS42 168
DDR_B_DQS#6 169 170 DDR_B_DM6 C175 1 2 0.1U_0402_16V4Z @
DDR_B_DQS6 DQS#6 DM6 C87
171 DQS6 VSS43 172 1 2 0.1U_0402_16V4Z
173 174 DDR_B_D50 C195 1 2 0.1U_0402_16V4Z
DDR_B_D54 VSS44 DQ54 DDR_B_D51
175 DQ50 DQ55 176
DDR_B_D55 177 178 C177 1 2 0.1U_0402_16V4Z
DQ51 VSS45 DDR_B_D60 C86
179 VSS46 DQ60 180 1 2 4.7U_0603_6.3V6K
DDR_B_D56 181 182 DDR_B_D61 C190 1 2 0.1U_0402_16V4Z
DDR_B_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_B_DQS#7 C191 1 2 0.1U_0402_16V4Z C194 1 2 0.1U_0402_16V4Z
DDR_B_DM7 VSS48 DQS#7 DDR_B_DQS7
187 DM7 DQS7 188
189 190 C192 1 2 0.1U_0402_16V4Z C206 1 2 0.1U_0402_16V4Z
DDR_B_D58 VSS49 VSS50 DDR_B_D62
191 DQ58 DQ62 192
DDR_B_D59 193 194 DDR_B_D63 C193 1 2 0.1U_0402_16V4Z
R98 1 DQ59 DQ63
4 2 195 VSS51 VSS52 196 4
10K_0402_5% 197 198 MEM_MB_EVENT#
SA0 EVENT# MEM_MB_EVENT# <6>
199 200 FCH_SDATA0
+3VS VDDSPD SDA FCH_SDATA0 <10,13,22>
201 202 FCH_SCLK0
SA1 SCL FCH_SCLK0 <10,13,22>
2.2U_0603_6.3V6K
1 1 +0.75VS 203 204 +0.75VS
VTT1 VTT2
2
R99 205 206

C207 C208 10K_0402_5% G1 G2 Security Classification Compal Secret Data Compal Electronics, Inc.
@ 2 2 @ LCN_DAN06-K4406-0102 2011/11/21 2011/12/11 Title
0.1U_0402_16V4Z @
Issued Date Deciphered Date
1
www.vinafix.vn
Custom A
4019IS
A B C D E
A B C D E
om
U1A HUDM3R3@
HUDSON-2
.c
APU_PCIE_RST#_R AE2 AF3 PCI_CLK0 R257 1 2 22_0402_5%
PCIE_RST# PCICLK0 CLK_PCI_TPM_FCH <26>
LPC_RST#_R PCI_CLK1
PCI CLKS
AD5 A_RST# PCICLK1/GPO36 AF1 PCI_CLK1 <15>
ix
PCICLK2/GPO37 AF5
C202 1 2 0.1U_0402_16V7K UMI_MTX_FRX_P0 AE30 AG2 PCI_CLK3 Strap
<5> UMI_MTX_C_FRX_P0 UMI_TX0P PCICLK3/GPO38 PCI_CLK3 <15>
C203 1 2 0.1U_0402_16V7K UMI_MTX_FRX_N0 AE32 AF6 PCI_CLK4
<5> UMI_MTX_C_FRX_N0 UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 <15>
f
C204 1 2 0.1U_0402_16V7K UMI_MTX_FRX_P1 AD33
<5> UMI_MTX_C_FRX_P1 UMI_TX1P
se
C209 1 2 0.1U_0402_16V7K UMI_MTX_FRX_N1 AD31 AB5
<5> UMI_MTX_C_FRX_N1 UMI_TX1N PCIRST#
C210 1 2 0.1U_0402_16V7K UMI_MTX_FRX_P2 AD28
<5> UMI_MTX_C_FRX_P2 UMI_TX2P
C211 1 2 0.1U_0402_16V7K UMI_MTX_FRX_N2 AD29 PCIE_RST# is for PCIE devices on APU
<5> UMI_MTX_C_FRX_N2
ro
C213 0.1U_0402_16V7K UMI_MTX_FRX_P3 UMI_TX2N

<5> UMI_MTX_C_FRX_P3 1 2 AC30 UMI_TX3P AD0/GPIO0 AJ3
C212 1 2 0.1U_0402_16V7K UMI_MTX_FRX_N3 AC32 AL5 APU_PCIE_RST#_R R225 1 2 33_0402_5%
<5> UMI_MTX_C_FRX_N3 UMI_TX3N AD1/GPIO1 APU_PCIE_RST# <22,23>
AG4
w.
AD2/GPIO2
2
1 UMI_FTX_C_MRX_P0 1
<5> UMI_FTX_C_MRX_P0 AB33 UMI_RX0P AD3/GPIO3 AL6 1
UMI_FTX_C_MRX_N0 AB31 AH3 C221 R223
PCI EXPRESS INTERFACES

<5> UMI_FTX_C_MRX_N0 UMI_RX0N AD4/GPIO4
ww
UMI_FTX_C_MRX_P1 AB28 AJ5 100K_0402_5%

<5> UMI_FTX_C_MRX_P1 UMI_RX1P AD5/GPIO5
UMI_FTX_C_MRX_N1 AB29 AL1 150P_0402_50V8J @
<5> UMI_FTX_C_MRX_N1 UMI_RX1N AD6/GPIO6 2
UMI_FTX_C_MRX_P2 Y33 AN5
<5> UMI_FTX_C_MRX_P2
1
UMI_FTX_C_MRX_N2 UMI_RX2P AD7/GPIO7
<5> UMI_FTX_C_MRX_N2 Y31 UMI_RX2N AD8/GPIO8 AN6
UMI_FTX_C_MRX_P3 Y28 AJ1
<5> UMI_FTX_C_MRX_P3 UMI_RX3P AD9/GPIO9
UMI_FTX_C_MRX_N3 Y29 AL8 A_RST# is for LPC devices
<5> UMI_FTX_C_MRX_N3 UMI_RX3N AD10/GPIO10
AD11/GPIO11 AL3
R220 1 2 590_0402_1% PCIE_CALRP AF29 AM7 LPC_RST#_R R226 1 2 33_0402_5%
PCIE_CALRP AD12/GPIO12 LPC_RST# <26,27,28>
+PCIE_VDDR_FCH R221 1 2 2K_0402_1% PCIE_CALRN AF31 PCIE_CALRN AD13/GPIO13 AJ6
2
AD14/GPIO14 AK7 1
V33 AN8 C222 R224
GPP_TX0P AD15/GPIO15 100K_0402_5%
V31 GPP_TX0N AD16/GPIO16 AG9
W30 AM11 150P_0402_50V8J @
GPP_TX1P AD17/GPIO17 2
W32 AJ10
1
GPP_TX1N AD18/GPIO18
AB26 GPP_TX2P AD19/GPIO19 AL12
AB27 GPP_TX2N AD20/GPIO20 AK11
AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 GPP_TX3N AD22/GPIO22 AG12
AE12 PCI_AD23
AD23/GPIO23 PCI_AD23 <15>
AA27 AC12 PCI_AD24
GPP_RX0P AD24/GPIO24 PCI_AD24 <15> +3VS
AA26 AE13 PCI_AD25 Strap
GPP_RX0N AD25/GPIO25 PCI_AD25 <15>
W27 PCI_AD26
PCI INTERFACE
GPP_RX1P AD26/GPIO26 AF13 PCI_AD26 <15>
V27 AH13 PCI_AD27 @
GPP_RX1N AD27/GPIO27 PCI_AD27 <15>
V26 AH14 1 2 GPIO30 1 2
GPP_RX2P AD28/GPIO28 R337 10K_0402_5% R332 10K_0402_5%
W26 GPP_RX2N AD29/GPIO29 AD15
W24 AC15 GPIO30 @
GPP_RX3P AD30/GPIO30 GPIO31 GPIO31
W23 GPP_RX3N AD31/GPIO31 AE16 1 2 1 2
AN3 R340 10K_0402_5% R339 10K_0402_5%
CBE0#
CBE1# AJ8
CBE2# AN10
2 2
+1.1VS_CKVDD R228 1 2 2K_0402_1% CLK_CALRN F27 CLK_CALRN CBE3# AD12
FRAME# AG10
DEVSEL# AK9
Input from external clock generator IRDY# AL10
G30 PCIE_RCLKP TRDY# AF10
NC for internal clock generator
SS G28 PCIE_RCLKN PAR AE10
AH1 Function GPIO30 GPIO31
APU_DISP_CLKP STOP#
<7> APU_DISP_CLKP R26 DISP_CLKP PERR# AM9
APU Display APU_DISP_CLKN T26 AH8 PowerXpress 0 0
<7> APU_DISP_CLKN DISP_CLKN SERR#
REQ0# AG15
NSS H33 DISP2_CLKP REQ1#/GPIO40 AG13 Reserved 0 1
H31 DISP2_CLKN REQ2#/CLK_REQ8#/GPIO41 AF15
REQ3#/CLK_REQ5#/GPIO42 AM17 Discrete 1 0
APU_CLKP T24 AD16
<7> APU_CLKP APU_CLKP GNT0#
APU APU_CLKN T23 AD13 UMA 1 1
<7> APU_CLKN APU_CLKN GNT1#/GPO44
GNT2#/SD_LED/GPO45 AD21
J30 SLT_GFX_CLKP GNT3#/CLK_REQ7#/GPIO46 AK17
K29 SLT_GFX_CLKN CLKRUN# AD19
LOCK# AH9
H27 GPP_CLK0P +RTCBATT_D +RTCBATT
NOGCLK@
H28 GPP_CLK0N INTE#/GPIO32 AF18
0.1U_0402_10V7K
RB751V-40_SOD323-2
INTF#/GPIO33 AE18
J27 GPP_CLK1P INTG#/GPIO34 AC16 1
C256
K26 GPP_CLK1N INTH#/GPIO35 AD18
1
CLK_WLAN F33 D13
CLOCK GENERATOR
<22> CLK_WLAN GPP_CLK2P 2
D14
WLAN CLK_WLAN# F31 RB751V-40_SOD323-2
<22> CLK_WLAN# GPP_CLK2N LPC_CLK0 R255 1 2 22_0402_5%
SS CLK_LAN E33
LPCCLK0 B25 CLK_PCI_EC <15,27>
Strap
<23> CLK_LAN
2
CLK_LAN# GPP_CLK3P LPC_CLK1 R258 1
LAN <23> CLK_LAN# E31 GPP_CLK3N LPCCLK1 D25 2 22_0402_5% CLK_PCI_DDR <15,28>
D27 LPC_AD0 +RTCBATT
LAD0 LPC_AD0 <26,27,28> +3VL
M23 C28 LPC_AD1
3 GPP_CLK4P LAD1 LPC_AD1 <26,27,28> 3
M24 A26 LPC_AD2 LPC_AD2 <26,27,28>
GPP_CLK4N LAD2 LPC_AD3
LPC
LAD3 A29 LPC_AD3 <26,27,28>

M27 A31 LPC_FRAME# If use GCLK, please delete D14
GPP_CLK5P LFRAME# LPC_FRAME# <26,27,28>
M26 GPP_CLK5N LDRQ0# B27
GCLK@ AE27
32K_X1 LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ
<22> FCH_RTCX1_R 1 2 N25 GPP_CLK6P SERIRQ/GPIO48 AE19 SERIRQ <26,27>
R207 0_0402_5% N26 GPP_CLK6N
DMA active. The FCH drives the DMA_ACTIVE# to
Place close to Y2 R23 GPP_CLK7P APU to notify DMA activity. This will cause the APU
R24 G25 DMA_ACTIVE#
GPP_CLK7N DMA_ACTIVE# DMA_ACTIVE# <7>
PROCHOT# E28 APU_PROCHOT#_R 1 R259 2 0_0402_5% APU_PROCHOT# <7> to reestablish the UMI link quicker.
GCLK@ N27 E26 APU_PWRGD_R 1 R266 2 0_0402_5%
GPP_CLK8P APU_PG APU_PWRGD <7,37>
25M_X1
APU
<22> FCH_X1_R 1 2 R27 GPP_CLK8N LDT_STP# G26

R208 0_0402_5% F26 APU_RST#
APU_RST# APU_RST# <7>
S5_CORE_EN is for S5+ mode
Place close to Y1 J26 14M_25M_48M_OSC used to turn off +1.1VALW and
S5_CORE_EN H7 T25
RTCCLK F1 RTC_CLK_R 1 2 RTC_CLK <15,27> Strap +3VALW of FCH on S5+ mode
NOGCLK@ F3 R260 0_0402_5%
C220 1 INTRUDER_ALERT#
2 27P_0402_50V8J 25M_X1 C31 25M_X1 VDDBT_RTC_G E6 +RTCVCC_R
S5 PLUS
1
32K_X1
Y1 R229 32K_X1 G2 Update RTC schematic on PVT
25MHZ_20PF_7A25000012 1M_0402_5% 25M_X2 C33 +RTCVCC +RTCBATT_D
NOGCLK@ NOGCLK@ 25M_X2
2
NOGCLK@ G4 32K_X2 20 mils R271 R277 R268

32K_X2
1 2 1 2 1 2+RTCBATT_R 1 2
C230 27P_0402_50V8J 120_0402_5% 120_0402_5% 1K_0402_5%
1 1 1
1
HUDSON-M3_FCBGA656 C250 C252 JCMOS C295
@
0.1U_0402_16V4Z 1U_0402_6.3V6K 0.1U_0402_16V4Z
2
4 2 2 2 4
C248 1 2 18P_0402_50V8J 32K_X1
NOGCLK@ CMOS Setting

1
Y2
R230 32.768KHZ_12.5P_1TJF125DP1A000D Place under DDR
20M_0402_5% NOGCLK@ Door
NOGCLK@
1
2
C249 1 2 18P_0402_50V8J 32K_X2 2010/11/11 2011/11/11 Title

NOGCLK@
www.vinafix.vn
Custom A
4019IS
A B C D E
A B C D E
om
PCIE_RST2# is for PCIE devices on FCH U1D HUDM3R3@
.c
HUDSON-2
T50
USB MISC
AB6 G8
ix
EC_LID_OUT# PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
<27> EC_LID_OUT# R2 RI#/GEVENT22#
T57 W7 B9 USB_RCOMP R329 1 2 11.8K_0402_1%
SLP_S3# SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
f <27> SLP_S3# T3 SLP_S3#

SLP_S5# W2 H1
se
<27> SLP_S5# SLP_S5# USB_FSD1P/GPIO186
PBTN_OUT# J4 H3
<27> PBTN_OUT# PWR_BTN# USB_FSD1N
FCH_PWRGD N7 Hudson-M2/M3
<27> FCH_PWRGD PWR_GOOD
USB 1.1
ro
H6
ACPI / WAKE UP EVENTS

TEST0 T9
USB_FSD0P/GPIO185
H5
OHCI (DEV-20, FUN-5)
TEST1 TEST0 USB_FSD0N
T10 TEST1/TMS
w.
TEST2 V9 H10
1 TEST2 USB_HSD13P 1
USB_HSD13N G10
GATEA20 AE22 Hudson-M2
ww
<27> GATEA20 GA20IN/GEVENT0#

K10
KB_RST# AG19
USB_HSD12P
J12
<27> KB_RST# KBRST#/GEVENT1# USB_HSD12N
<27> EC_SCI#
EC_SCI# R9 LPC_PME#/GEVENT3#
EHCI (DEV-22, FUN-2)
EC_SMI# C26 G12 USB20_P11
<27> EC_SMI# LPC_SMI#/GEVENT23# USB_HSD11P USB20_P11 <24>
T31 T5 F12 USB20_N11 USB 3.0-Left2 Hudson-M3
LPC_PD#/GEVENT5# USB_HSD11N USB20_N11 <24>
U4
FCH_PCIE_WAKE# K1
SYS_RESET#/GEVENT19#
K12 USB20_P10 XHCI (DEV-16, FUN-0)
<23> FCH_PCIE_WAKE# WAKE#/GEVENT8# USB_HSD10P USB20_P10 <24>
T55 V7 IR_RX1/GEVENT20# USB_HSD10N K13 USB20_N10
USB20_N10 <24> USB 3.0-Left1 XHCI (DEV-16, FUN-1)
H_THERMTRIP# R10
<7> H_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2#
+3VS 1 2 WD_PWRGD AF19 B11
R279 10K_0402_5% WD_PWRGD USB_HSD9P
USB_HSD9N D11
EC_RSMRST# U2
<27> EC_RSMRST# RSMRST#
USB_HSD8P E10
AG24 CLK_REQ4#/SATA_IS0#/GPIO64 USB_HSD8N F10
CLKREQ_LAN#_R AE24 Hudson-M2/M3
<23> CLKREQ_LAN# CLK_REQ3#/SATA_IS1#/GPIO63
AE26 C10
AF22
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD7P
A10
USB 2.0
CLK_REQ0#/SATA_IS3#/GPIO60 USB_HSD7N
AH17 SATA_IS4#/FANOUT3/GPIO55
EHCI (DEV-19, FUN-2)
AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD6P H9
FCH_SPKR AF24 G9
<25> FCH_SPKR SPKR/GPIO66 USB_HSD6N
FCH_SCLK0
GPIO
SM Bus 0-->S0 PWR domain <10,11,22> FCH_SCLK0 AD26 SCL0/GPIO43
FCH_SDATA0 AD25 A8
SM Bus 1-->S5 PWR domain <10,11,22> FCH_SDATA0
FCH_SCLK1 T7
SDA0/GPIO47 USB_HSD5P
C8
SCL1/GPIO227 USB_HSD5N
(for ASF device only) FCH_SDATA1 R7 SDA1/GPIO228
CLKREQ_WLAN# AG25 F8 USB20_P4
<22> CLKREQ_WLAN# CLK_REQ2#/FANIN4/GPIO62 USB_HSD4P USB20_P4 <18>
AG22 E8 USB20_N4 Int. Camera
CLK_REQ1#/FANOUT4/GPIO61 USB_HSD4N USB20_N4 <18>
T30 J2 IR_LED#/LLB#/GPIO184 USB20_P3
AG26 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD3P C6 USB20_P3 <22>
V8 A6 USB20_N3 WLAN (BT) Hudson-M2/M3
DDR3_RST#/GEVENT7#/VGA_PD USB_HSD3N USB20_N3 <22>
LAN_EN W8
<23> LAN_EN
T54 Y6
GBE_LED0/GPIO183
C5 USB20_P2 OHCI (DEV-18, FUN-0)
2 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD2P USB20_P2 <26> 2
V10 GBE_LED2/GEVENT10# USB_HSD2N A5 USB20_N2
USB20_N2 <26> Cardreader EHCI (DEV-18, FUN-2)
AA8 GBE_STAT0/GEVENT11#
AF25 C1 USB20_P1 <Support Wakeup>
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD1P USB20_P1 <21>
C3 USB20_N1 USB-Right2
USB_HSD1N USB20_N1 <21>
M7 E1 USB20_P0 USB-Right1
BLINK/USB_OC7#/GEVENT18# USB_HSD0P USB20_P0 <21>
ODD_DA#_FCH R8 E3 USB20_N0
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 <21> (Debug Port)
T59
USB OC
T1 USB_OC5#/IR_TX0/GEVENT17#
ODD_PLUGIN# P6 C16 USBSS_CALRP R330 1 2 1K_0402_1%
<21> ODD_PLUGIN# USB_OC4#/IR_RX0/GEVENT16# USBSS_CALRP
T58 F5 A16 USBSS_CALRN R334 1 2 1K_0402_1%
T56 USB_OC3#/AC_PRES/TDO/GEVENT15# USBSS_CALRN
P5 USB_OC2#/TCK/GEVENT14# +FCH_VDD_11_SSUSB_S
USB_OC1# is for left USB3.0 ports USB_OC1# J7 A14
<24> USB_OC1# USB_OC1#/TDI/GEVENT13# USB_SS_TX3P
USB_OC0# is for right USB2.0 ports USB_OC0# T8 C14
<21> USB_OC0# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# USB_SS_TX3N
USB_SS_RX3P C12
USB_SS_RX3N A12
R320 1 2 33_0402_5% HDA_BITCLK AB3 D15

<25> AZ_BITCLK_HD AZ_BITCLK USB_SS_TX2P
R321 1 2 33_0402_5% HDA_SDOUT AB1 B15
<25> AZ_SDOUT_HD AZ_SDOUT USB_SS_TX2N
AZ_SDIN0_HD
HD AUDIO
<25> AZ_SDIN0_HD AA2 AZ_SDIN0/GPIO167
AZ_SDIN1_HD Y5 E14 Hudson-M3
USB 3.0
AZ_SDIN2_HD AZ_SDIN1/GPIO168 USB_SS_RX2P
Y3 F14
AZ_SDIN3_HD Y1
AZ_SDIN2/GPIO169 USB_SS_RX2N XHCI (DEV-16, FUN-0)
AZ_SDIN3/GPIO170
<25> AZ_SYNC_HD
R322 1 2 33_0402_5% HDA_SYNC AD6 AZ_SYNC USB_SS_TX1P F15 USB30_TX1P
USB30_TX1P <24> XHCI (DEV-16, FUN-1)
R323 1 2 33_0402_5% HDA_RST# AE4 G15 USB30_TX1N
<25> AZ_RST_HD# AZ_RST# USB_SS_TX1N USB30_TX1N <24>
USB30_RX1P
USB 3.0-Left2
USB_SS_RX1P H13 USB30_RX1P <24>
G13 USB30_RX1N
USB_SS_RX1N USB30_RX1N <24>
T26 K19 J16 USB30_TX0P
PS2_DAT/SDA4/GPIO187 USB_SS_TX0P USB30_TX0P <24>
T27 J19 H16 USB30_TX0N
PS2_CLK/CEC/SCL4/GPIO188 USB_SS_TX0N USB30_TX0N <24>
J21 SPI_CS2#/GBE_STAT2/GPIO166 USB30_RX0P
USB 3.0-Left1
USB_SS_RX0P J15 USB30_RX0P <24>
3 K15 USB30_RX0N 3
Internal Pull-up ? USB_SS_RX0N USB30_RX0N <24>
D21 PS2KB_DAT/GPIO189
+3VALW_FCH C20 H19 R326 1 2 10K_0402_5%
PS2KB_CLK/GPIO190 SCL2/GPIO193 R328 10K_0402_5%
D23 PS2M_DAT/GPIO191 SDA2/GPIO194 G19 1 2 SM Bus 2-->S5 PWR domain
C22 EMBEDDED CTRL G22 R338 1 2 10K_0402_5%
H_THERMTRIP# PS2M_CLK/GPIO192 SCL3_LV/GPIO195 R343 10K_0402_5%
1 2 SDA3_LV/GPIO196 G21 1 2 SM Bus 3-->APU_VDDIO domain for SB-TSI
R278 10K_0402_5% E22
@ EC_LID_OUT# EC_PWM0/EC_TIMER0/GPIO197
1 2 EC_PWM1/EC_TIMER1/GPIO198 H22
R272 10K_0402_5% T33 F21 J22 EC_PWM2 Strap
KSO_0/GPIO209 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM2 <15>
1 2 FCH_PCIE_WAKE# T32 E20 H21
R276 10K_0402_5% T35 KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200
F20 KSO_2/GPIO211
1 2 USB_OC0# T34 A22 K21
R318 10K_0402_5% T37 KSO_3/GPIO212 KSI_0/GPIO201
E18 KSO_4/GPIO213 KSI_1/GPIO202 K22
1 2 USB_OC1# T36 A20 F22
J18 KSO_6/GPIO215 KSI_3/GPIO204 F24
1 2 FCH_SCLK1 T39 H18 E24
G18 KSO_8/GPIO217 KSI_5/GPIO206 B23
1 2 FCH_SDATA1 T44 B21 C24
K18 KSO_10/GPIO219 KSI_7/GPIO208 F18
T47 D19
+3VS T41 KSO_11/GPIO220
A18 KSO_12/GPIO221
T40 C18 +3VALW_FCH +3VS
FCH_SCLK0 T42 KSO_13/GPIO222
1 2 B19 KSO_14/GPIO223
R286 2.2K_0402_5% T43 B17 +3VS
KSO_15/GPIO224
2
1 2 FCH_SDATA0 T49 A24
R287 2.2K_0402_5% T48 KSO_16/GPIO225 R312 R311
D17 KSO_17/GPIO226 Place R425 and C363
1 @ 2 CLKREQ_WLAN# 10K_0402_5% 10K_0402_5%
R291 8.2K_0402_5% close to FCH for ESD @
2
@ CLKREQ_LAN# HUDSON-M3_FCBGA656 Q32
G
1 2
1
R284 8.2K_0402_5%
ODD_DA#_FCH 1 @ 2 ODD_DA#_Q 1 3 ODD_DA# <21>
R425 0_0402_5%
S
1
4 2 1 EC_RSMRST# C363 4
R280 100K_0402_5% 0.1U_0402_16V4Z 2N7002_SOT23-3
1 @ 2 HDA_BITCLK @
R324 10K_0402_5% 2
1 @ 2 AZ_SDIN0_HD For FCH internal debug use
R325 10K_0402_5% +3VALW_FCH
@ AZ_SDIN1_HD
(Internal 10K pull-down)
1 2
R331 10K_0402_5%
1 @ 2 AZ_SDIN2_HD 1 @ 2 TEST0
R333 10K_0402_5% R273 2.2K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1 @ 2 AZ_SDIN3_HD 1 @ 2 TEST1 2010/11/11 2011/11/11 Title
R335 10K_0402_5% R274 2.2K_0402_5%
www.vinafix.vn
1 @ 2 TEST2
R275 2.2K_0402_5% Size Document Number Rev
Custom A
4019IS
A B C D E
A B C D E
om
U1B HUDM3R3@ HDMI_EN# (Internal 8.2K PU)
.c
HUDSON-2
SATA_FTX_DRX_P0 HDMI_EN# HDMI_EN#
<21> SATA_FTX_DRX_P0 AK19 SATA_TX0P SD_CLK/SCLK_2/GPIO73 AL14 2 1 H L
ix
SATA_FTX_DRX_N0 AM19 AN14 R443 1K_0402_1%
<21> SATA_FTX_DRX_N0 SATA_TX0N SD_CMD/SLOAD_2/GPIO74
HDD SATA_FRX_C_DTX_N0 SD_CD/GPIO75 AJ12
AL20 AH12 Non-HDMI
f
<21> SATA_FRX_C_DTX_N0 SATA_RX0N SD_WP/GPIO76
SD CARD
SATA_FRX_C_DTX_P0 SKU HDMI SKU
<21> SATA_FRX_C_DTX_P0 AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13 Need HDMI_EN# Strap ? SKU
se
SD_DATA1/SDATO_2/GPIO78 AM13
SATA_FTX_DRX_P1 AN22 AH15
<21> SATA_FTX_DRX_P1 SATA_TX1P SD_DATA2/GPIO79
SATA_FTX_DRX_N1 AL22 AJ14
ro
<21> SATA_FTX_DRX_N1 SATA_TX1N SD_DATA3/GPIO80

14" ODD SATA_FRX_C_DTX_N1
<21> SATA_FRX_C_DTX_N1 AH20 SATA_RX1N GBE_COL AC4
w.
SATA_FRX_C_DTX_P1 AJ20 AD3

1 <21> SATA_FRX_C_DTX_P1 SATA_RX1P GBE_CRS 1
GBE_MDCK AD9
SATA_FTX_DRX_P2 AJ22 W10
ww
<21> SATA_FTX_DRX_P2 SATA_TX2P GBE_MDIO

SATA_FTX_DRX_N2 AH22 AB8
<21> SATA_FTX_DRX_N2 SATA_TX2N GBE_RXCLK
15"/17" ODD SATA_FRX_C_DTX_N2 GBE_RXD3 AH7
<21> SATA_FRX_C_DTX_N2 AM23 SATA_RX2N GBE_RXD2 AF7
SATA_FRX_C_DTX_P2 AK23 AE7 If an SPI ROM is shared between FCH
<21> SATA_FRX_C_DTX_P2 SATA_RX2P GBE_RXD1
AD7
AH24
GBE_RXD0
AG8 and the Embedded Controller, a 10-k
SATA_TX3P GBE_RXCTL/RXDV
AJ24 SATA_TX3N GBE_RXERR AD1 pull-up resistor to +3.3V_S5 is installed
AB7
GBE LAN
GBE_TXCLK
AN24 SATA_RX3N GBE_TXD3 AF9
AL24 AG6 +3VALW_FCH
+1.5V SATA_RX3P GBE_TXD2
GBE_TXD1 AE8
+3VALW_FCH AL26 AD8 @
SATA_TX4P GBE_TXD0 FCH_SPI_CS1#
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9 1 2
1
R113 10K_0402_5%
SERIAL ATA
GBE_PHY_PD AC2
1
R285 AJ26 AA7
10K_0402_5% R437 SATA_RX4N GBE_PHY_RST# GBE_PHY_INTR
AH26 SATA_RX4P GBE_PHY_INTR W9 1 2 +3VALW_FCH
@ 10K_0402_5% R352 10K_0402_5%
AN29 +3VS
2 2
SATA_TX5P FCH_SPI_MISO
2 AL28 SATA_TX5N SPI_DI/GPIO164 V6
B
@ V5 FCH_SPI_MOSI
SPI_DO/GPIO163
SPI ROM
Q33 AK27 V3 FCH_SPI_CLK UMA_CRT_DATA 1 2
SATA_RX5N SPI_CLK/GPIO162
E
3 1 FCH_ALERT# AM27 T6 FCH_SPI_CS1# R454 2.2K_0402_5%

<7> APU_ALERT# SATA_RX5P SPI_CS1#/GPIO165
C
V1 UMA_CRT_CLK 1 2
MMBT3904_NL_SOT23-3 ROM_RST#/SPI_WP#/GPIO161 R455 2.2K_0402_5%
AL29 NC6
AN31 NC7
L30 UMA_CRT_R
VGA_RED UMA_CRT_R <19>
AL31 NC8
AL33 UMA_CRT_R 1 2
NC9 UMA_CRT_G R367 150_0402_1%
VGA_GREEN L32 UMA_CRT_G <19>
2 UMA_CRT_G 2
AH33 NC10 1 2
AH31 R368 150_0402_1%
NC11 UMA_CRT_B UMA_CRT_B
VGA_BLUE M29 UMA_CRT_B <19> 1 2
AJ33 R369 150_0402_1%
VGA DAC
NC12
AJ31 NC13
M28 UMA_CRT_HSYNC
VGA_HSYNC/GPO68 UMA_CRT_HSYNC <19>
To avoid LED flashing N30 UMA_CRT_VSYNC
VGA_VSYNC/GPO69 UMA_CRT_VSYNC <19>
M33 UMA_CRT_DATA
+5VS VGA_DDC_SDA/GPO70 UMA_CRT_DATA <19>
2 1 SATA_CALRP AF28 N32 UMA_CRT_CLK
SATA_CALRP VGA_DDC_SCL/GPO71 UMA_CRT_CLK <19>
R336 1K_0402_1%
1 2 SATA_LED# +AVDD_SATA 2 1 SATA_CALRN AF27
R444 10K_0402_5% R130 931_0402_1% SATA_CALRN VGA_DAC_RSET
VGA_DAC_RSET K31 1 2
2 1 R366 715_0402_1%
R446 20K_0402_5% SATA_LED# AD22
<29> SATA_LED# SATA_ACT#/GPIO67
V28 ML_VGA_AUXP
AUX_VGA_CH_P ML_VGA_AUXP <7>
V29 ML_VGA_AUXN
AUX_VGA_CH_N ML_VGA_AUXN <7>
VGA MAINLINK
AF21 SATA_X1
U28 AUXCAL 1 2 +VDDAN_11_ML
AUXCAL R364 100_0402_1%
T31 ML_VGA_TXP0
ML_VGA_L0P ML_VGA_TXP0 <7>
T33 ML_VGA_TXN0
ML_VGA_L0N ML_VGA_TXN0 <7> +FCH_VDDAN_33_DAC_R
AG21 T29 ML_VGA_TXP1
SATA_X2 ML_VGA_L1P ML_VGA_TXP1 <7>
T28 ML_VGA_TXN1
ML_VGA_L1N ML_VGA_TXN1 <7>
R32 ML_VGA_TXP2 FCH_CRT_HPD 1 2
+3VS ML_VGA_L2P ML_VGA_TXP2 <7>
ML_VGA_TXN2 R365 10K_0402_5%
ODD_SEL SATA port SKU ML_VGA_L2N R30
P29 ML_VGA_TXP3
ML_VGA_TXN2 <7>
ML_VGA_L3P ML_VGA_TXP3 <7>
P28 ML_VGA_TXN3
ML_VGA_L3N ML_VGA_TXN3 <7>
2
High Port 1 14" R147 C29 FCH_CRT_HPD

3 ML_VGA_HPD/GPIO229 FCH_CRT_HPD <7> 3
10K_0402_5%
Low Port 2 15"/17" AH16 N2 1 2

1
FANOUT0/GPIO52 VIN0/GPIO175 R101 10K_0402_5%

AM15 FANOUT1/GPIO53
ODD_SEL AJ16 HW MONITOR M3 1 2 +3VALW_FCH
<21> ODD_SEL FANOUT2/GPIO54 VIN1/GPIO176 R102 10K_0402_5% @
AK15 L2 1 2 SLP_CHG# 1 2
FANIN0/GPIO56 VIN2/SDATI_1/GPIO177 <24> SLP_CHG#
T16 AN16 R105 10K_0402_5% R134 10K_0402_5%
FANIN1/GPIO57
AL16 FANIN2/GPIO58 VIN3/SDATO_1/GPIO178 N4 1 2
R106 10K_0402_5%
VIN4/SLOAD_1/GPIO179 P1 1 2
ODD_PWR K6 R128 10K_0402_5%
<30> ODD_PWR TEMPIN0/GPIO171
P3 SLP_CHG#1 2
VIN5/SCLK_1/GPIO180 R126 10K_0402_5%
1 2 K5 TEMPIN1/GPIO172 VIN6/GBE_STAT3/GPIO181 M1 1 2 Enable integrated pull-down/up
R111 10K_0402_5% R115 10K_0402_5%
M5 1 2 and leave unconnected
VIN7/GBE_LED3/GPIO182 R114 10K_0402_5%
1 2 K3 TEMPIN2/GPIO173
R103 10K_0402_5%
NC1 AG16
FCH_ALERT# M6 AH10
TEMPIN3/TALERT#/GPIO174 NC2
NC3 A28
NC4 G27
+3VALW_FCH
4M Byte C498 NC5 L4
1 2
U13
FCH_SPI_CS1# 1 8 0.1U_0402_16V4Z HUDSON-M3_FCBGA656
FCH_SPI_MISO CS# VCC
2 SO/SIO1 HOLD# 7
+3VALW_FCH 3 6 FCH_SPI_CLK
WP# SCLK FCH_SPI_MOSI
4 GND SI/SIO0 5
4 4
W25Q32BVSSIG_SO8
For EMI
@ @
R402 C257
FCH_SPI_CLK 2 1 2 1
10_0402_5%
10P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
www.vinafix.vn
Size Document Number
Rev
Custom A
4019IS
A B C D E
A B C D E
om
.c
ix
STRAP PINS
f CRT Power Down Circuit
se
ro
+3VS +FCH_VDDAN_33_DAC_R
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
L32
w.
1 1
PULL ALLOW ENABLE NON_FUSION EC CLKGEN LPC ROM S5 PLUS 1 2
MBK1608221YZF_2P
HIGH PCIE GEN2 DEBUG CLOCK MODE ENABLED ENABLED (INTERNAL MODE
2.2U_0603_6.3V6K
ww
0.1U_0402_16V7K
STRAP 10K PULL-UP) DISABLED
DEFAULT DEFAULT DEFAULT 1 1
C277 C276
PULL FORCE DISABLE FUSION EC CLKGEN SPI ROM S5 PLUS 2 2

LOW PCIE GEN1 DEBUG CLOCK DISABLED DISABLE MODE
STRAP MODE ENABLED
DEFAULT DEFAULT DEFAULT DEFAULT
+3VS +3VS +3VS +3VALW_FCH +3VALW_FCH +3VALW_FCH +3VALW_FCH

1
1
R231 R241 R242 R243 R238 R245 R240
@ @ @ @
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
2
2
PCI_CLK1
<12> PCI_CLK1
PCI_CLK3
2 <12> PCI_CLK3 2
PCI_CLK4
<12> PCI_CLK4
CLK_PCI_EC
<12,27> CLK_PCI_EC
CLK_PCI_DDR
<12,28> CLK_PCI_DDR
EC_PWM2
<13> EC_PWM2
RTC_CLK
<12,27> RTC_CLK
1
1
R232 R233 R234 R237 R244 R239 R246
@ @ @
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2
2
DEBUG STRAPS
FCH HAS 15K INTERNAL PU-UP FOR PCI_AD[27:23]
+3VALW
3 3
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
USE PCI DISABLE USE FC USE DEFAULT DISABLE PCI 2

PULL C523 Vgs=-4.5V,Id=3A,Rds<97mohm
PLL ILA PLL PCIE STRAPS MEM BOOT
HIGH AUTORUN 0.1U_0402_10V7K
2
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT 1
3
S
R5 Q3 PJ2
2
G
<30> FCH_PWR_EN# 1 2 2 JUMP_43X79
PULL BYPASS ENABLE BYPASS USE EEPROM ENABLE PCI @
+3VALW_FCH
1
47K_0402_5% 2 AO3413_SOT23 D
LOW PCI PLL ILA FC PLL PCIE STRAPS MEM BOOT
1
AUTORUN C521
0.01U_0402_25V7K
1
2
1
C520
C522 1U_0402_6.3V6K
PCI_AD27 4.7U_0805_10V4Z 1
<12> PCI_AD27 2
PCI_AD26
<12> PCI_AD26
PCI_AD25
<12> PCI_AD25
PCI_AD24
<12> PCI_AD24
PCI_AD23
<12> PCI_AD23
4 4
1
R247 R248 R249 R250 R251

@ @ @ @ @
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2

www.vinafix.vn
Custom A
4019IS
A B C D E
A B C D E
om
.c
+VCC_FCH_R +1.1VS
ix
U1C HUDM3R3@ U1E HUDM3R3@
+3VS +VCC_FCH_R
10mils 1 2
2.2U_0603_6.3V6K
HUDSON-2 HUDSON-2
f
50mils R193 0_0805_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
+3VS
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0805_6.3V6M
1 2 +VDDIO_33_PCIGP AB17 T14 A3 T25
se
VDDIO_33_PCIGP_1 VDDCR_11_1 VSS VSS
22U_0805_6.3V6M
L30 R20 0_0603_5% AB18 T17 1 1 1 1 1 1 A33 T27
VDDIO_33_PCIGP_2 VDDCR_11_2 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+VDDPL_3.3V C311 C312 C334 C335 C315 C317
PCI/GPIO I/O
1 2 AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20 B7 VSS VSS U6
2.2U_0603_6.3V6K
MBK1608221YZF_2P
ro
0.1U_0402_16V7K
1 1 1 1 1 AD10 VDDIO_33_PCIGP_4 VDDCR_11_4 U16 B13 VSS VSS U14
220 ohm C266 C267 C269 C270 C271 AG7 102mA 1007mA U18 D9 U17
VDDIO_33_PCIGP_5 VDDCR_11_5 2 2 2 2 2 2 VSS VSS
CORE S0
1 1 AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14 D13 VSS VSS U20
w.
C272 C273 AB12 V17 E5 U21

1 2 2 2 2 2 VDDIO_33_PCIGP_7 VDDCR_11_7 VSS VSS 1
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20 E12 VSS VSS U30
AB14 Y17 E16 U32
ww
2 2 VDDIO_33_PCIGP_9 VDDCR_11_9 +1.1VS_CKVDD +1.1VS VSS VSS

AB16 VDDIO_33_PCIGP_10 E29 VSS VSS V11
+VDDPL_3.3V
10mils 20mils +1.1VS_CKVDD
F7 VSS VSS V16
H24 VDDPL_33_SYS 47mA VDDAN_11_CLK_1 H26 1 2 F9 VSS VSS V18
2.2U_0603_6.3V6K
10mils R371 0_0603_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
VDDAN_11_CLK_2 J25 F11 VSS VSS W4
+FCH_VDDAN_33_DAC_R
1U_0402_6.3V6K
1U_0402_6.3V6K
+FCH_VDDPL_33_MLDAC +VDDPL_33_DAC 20mA
CLKGEN I/O
1 2 V22 VDDPL_33_DAC VDDAN_11_CLK_3 K24 F13 VSS VSS W6
R34 0_0402_5% 10mils L22 1 1 1 1 1 F16 W25
+FCH_VDDPL_33_MLDAC +VDDPL_33_ML VDDAN_11_CLK_4 C319 C320 C336 C337 C323 VSS VSS
1 2 1 2 U22 VDDPL_33_ML 12mA 340mAVDDAN_11_CLK_5 M22 F17 VSS VSS W28
R51 0_0603_5% R35 0_0402_5% 10mils N21 F19 Y14
VDDAN_11_CLK_6 VSS VSS
2.2U_0603_6.3V6K
L33 VDDPL_33_SSUSB_S +FCH_VDDAN_33_DAC_R 30mA

0.1U_0402_16V7K
T22 VDDAN_33_DAC VDDAN_11_CLK_7 N22 F23 VSS VSS Y16
2 2 2 2 2
+3VS 1 2
MBK1608221YZF_2P
For Hudson M3 USB3.0 only +FCH_VDDPL_33_SSUSB
10mils VDDAN_11_CLK_8 P22 F25 VSS VSS Y18
1 1
For Hudson M2, connect to GND
L18 VDDPL_33_SSUSB_S 11mA F29 VSS VSS AA6
@ C275 C274 10mils G6 AA12
+FCH_VDDPL_33_USB +PCIE_VDDR_FCH +1.1VS VSS VSS
D7 VDDPL_33_USB_S 14mA 50mils G16 VSS VSS AA13
2 2 +VDDPL_33_PCIE
10mils VDDAN_11_PCIE_1 AB24
+PCIE_VDDR_FCH
G32 VSS VSS AA14
AH29 VDDPL_33_PCIE 11mA VDDAN_11_PCIE_2 Y21 1 2 H12 VSS VSS AA16
PCI EXPRESS
2.2U_0603_6.3V6K
10mils R194 0_0805_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
VDDAN_11_PCIE_3 AE25 H15 VSS VSS AA17
1U_0402_6.3V6K
1U_0402_6.3V6K
+VDDPL_33_SATA 12mA
GROUND
AG28 VDDPL_33_SATA VDDAN_11_PCIE_4 AD24 H29 VSS VSS AA25
LDO_CAP: Internally generated 1.8V 1088mA
VDDAN_11_PCIE_5 AB23 1 1 1 1 1 J6 VSS VSS AA28
@ 15mils AA22 C327 C328 C338 C339 C499 J9 AA30
+3VALW_FCH supply for the RGB output LDO_CAP VDDAN_11_PCIE_6 VSS VSS
1 2 M31 LDO_CAP VDDAN_11_PCIE_7 AF26 J10 VSS VSS AA32
L34 +1.1VS C298 2.2U_0603_6.3V6K AG27 J13 AB25
+FCH_VDDPL_33_SSUSB L24 VDDAN_11_PCIE_8 2 2 2 2 2 VSS VSS
1 2 10mils J28 VSS VSS AC6
2.2U_0603_6.3V6K
MBK1608221YZF_2P +VDDPL_11_DAC V21 7mA

0.1U_0402_16V7K
1 2 1 2 VDDPL_11_DAC J32 VSS VSS AC18

220 ohm MBK1608221YZF_2P R37 0_0402_5% +1.1VS
+VDDAN_11_ML 60mils +AVDD_SATA
K7 VSS VSS AC28
1 1 220 ohm/2A VDDAN_11_SATA_1 AA21 K16 VSS VSS AD27
C279 C278 20mils Y20 +AVDD_SATA 1 2 K27 AE6
VDDAN_11_SATA_4 VSS VSS
2.2U_0603_6.3V6K
R370 0_0805_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2 Y22 VDDAN_11_ML_1 VDDAN_11_SATA_2 AB21 K28 VSS VSS AE15
MAIN LINK
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0805_6.3V6M
R12 0_0603_5%
SERIAL ATA
V23 VDDAN_11_ML_2 VDDAN_11_SATA_3 AB22 L6 VSS VSS AE21
2 2
4.7U_0603_6.3V6K
V24 VDDAN_11_ML_3 226mA VDDAN_11_SATA_5 AC22 1 1 1 1 1 1 L12 VSS VSS AE28
1 1 1 V25 1337mA AC21 C501 C502 C340 C341 C505 C500 L13 AF8
C128 C129 C132 VDDAN_11_ML_4 VDDAN_11_SATA_6 VSS VSS
VDDAN_11_SATA_7 AA20 L15 VSS VSS AF12
2 2
VDDAN_11_SATA_8 AA18 L16 VSS VSS AF16
+3VALW_FCH 2 2 2 2 2 2
VDDAN_11_SATA_9 AB20 L21 VSS VSS AF33
L35 2 2 2
VDDAN_11_SATA_10 AC19 M13 VSS VSS AG30
1 2 +FCH_VDDPL_33_USB AB10 +3VALW_FCH M16 AG32
VDDIO_33_GBE_S VSS VSS
2.2U_0603_6.3V6K
MBK1608221YZF_2P 10mils
0.1U_0402_16V7K
M21 VSS VSS AH5

220 ohm AB11 N18 +VDDIO_33_S 1 2 M25 AH11
GBE LAN
VDDCR_11_GBE_S_1 VDDIO_33_S_1 VSS VSS
2.2U_0603_6.3V6K
R26 0_0402_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 AA11 VDDCR_11_GBE_S_2 VDDIO_33_S_2 L19 N6 VSS VSS AH18
C280 C281 M18 N11 AH19
VDDIO_33_S_3 VSS VSS
3.3V_S5 I/O
1 2 AA9 VDDIO_GBE_S_1 VDDIO_33_S_4 V12 1 1 1 N13 VSS VSS AH21
R129 0_0402_5% AA10 59mA V13 C342 C343 C506 N23 AH23
2 2 +3VALW_FCH VDDIO_GBE_S_2 VDDIO_33_S_5 VSS VSS
VDDIO_33_S_6 Y12 N24 VSS VSS AH25
L56 30mils Y13 P12 AH27
+VDDAN_33_USB VDDIO_33_S_7 2 2 2 VSS VSS
1 2 G7 VDDAN_33_USB_S_1 VDDIO_33_S_8 W11 P18 VSS VSS AJ18
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
.1U_0402_16V7K
FBMA-L11-201209-221LMA30T_0805 H8 P20 AJ28
+3VS VDDAN_33_USB_S_2 +3VALW_FCH VSS VSS
220 ohm/3A J8 VDDAN_33_USB_S_3 P21 VSS VSS AJ29
L36 1 1 1 1 1 K8 10mils L28 P31 AK21
+VDDPL_33_PCIE C133 C134 C135 C136 C137 VDDAN_33_USB_S_4 +VDDXL_3.3V VSS VSS
1 2 K9 VDDAN_33_USB_S_5 5mA VDDXL_33_S G24 1 2 P33 VSS VSS AK25
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
MBK1608221YZF_2P MBK1608221YZF_2P
0.1U_0402_16V7K
0.1U_0402_16V7K
M9 VDDAN_33_USB_S_6 R4 VSS VSS AL18
220 ohm 2 2 2 2 2
M10 VDDAN_33_USB_S_7 470mA 220 ohm R11 VSS VSS AM21
1 1 N9 VDDAN_33_USB_S_8 1 1 R25 VSS VSS AM25
C294 C293 N10 C510 C509 R28 AN1
VDDAN_33_USB_S_9 VSS VSS
M12 VDDAN_33_USB_S_10 T11 VSS VSS AN18
N12 VDDAN_33_USB_S_11 T16 VSS VSS AN28
2 2 2 2
M11 VDDAN_33_USB_S_12 T18 VSS VSS AN33
+1.1VALW
L58 +1.1VALW
20mils N8 T21
USB
+VDDANCR_11_USB VSSAN_HWM VSSPL_DAC
1 2 U12 VDDAN_11_USB_S_1 10mils VSSAN_DAC L28
2.2U_0603_6.3V6K
MBK1608221YZF_2P 140mA +VDDCR_1.1V

0.1U_0402_16V7K
U13 VDDAN_11_USB_S_2 VDDCR_11_S_1 N20 1 2 K25 VSSXL VSSANQ_DAC K33

+3VS 220 ohm 187mA VDDCR_11_S_2 M20 R373 0_0603_5% N28
VSSIO_DAC
1U_0402_6.3V6K
1U_0402_6.3V6K
L22 1 1 H25
+VDDPL_33_SATA C303 C302 VSSPL_SYS
1 2 1 1 EFUSE R6
2.2U_0603_6.3V6K
MBK1608221YZF_2P C512 C518

0.1U_0402_16V7K
220 ohm 2 2
3 1 1 3
C297 C296 2 2 HUDSON-M3_FCBGA656
+1.1VALW
2 2 L59 +1.1VALW Connect to GND through a dedicated via
+VDDCR_1.1V_USB
10mils L29
1 2 T12 VDDCR_11_USB_S_1 42mA 10mils
2.2U_0603_6.3V6K
MBK1608221YZF_2P 70mA VDDPL_11_SYS_S +VDDPL_1.1V

0.1U_0402_16V7K
0.1U_0402_16V7K
T13 VDDCR_11_USB_S_2 J24 1 2
2.2U_0603_6.3V6K
220 ohm MBK1608221YZF_2P
0.1U_0402_16V7K
1 1 1 220 ohm
C316 C304 C324 1 1
C514 C513
2 2 2
2 2
+3VALW_FCH
+FCH_VDD_11_SSUSB_S
20mils 10mils +VDDAN_33_HWM
P16 VDDAN_11_SSUSB_S_1 12mA VDDAN_33_HWM_S M8 1 2
2.2U_0603_6.3V6K
+VDDAN_SSUSB R43 0_0402_5%
0.1U_0402_16V7K
1 2 M14 VDDAN_11_SSUSB_S_2
1U_0402_6.3V6K
R131 0_0603_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
N14 VDDAN_11_SSUSB_S_3
40mils P13 VDDAN_11_SSUSB_S_4 282mA 1 1
+FCH_VDD_11_SSUSB_S
1 1 1 P14 C516 C515

C138 C325 C331 VDDAN_11_SSUSB_S_5
USB SS
2 2
2 2 2 30mils
N16 VDDCR_11_SSUSB_S_1
N17 +3VS
VDDCR_11_SSUSB_S_2
P17 VDDCR_11_SSUSB_S_3 424mA 10mils +VDDIO_AZ
M17 VDDCR_11_SSUSB_S_4 26mA VDDIO_AZ_S AA4 1 2
2.2U_0603_6.3V6K
R45 0_0402_5%
0.1U_0402_16V7K
POWER
L61 1 1
+1.1VALW 2 1 1 2 +VDDCR_11_SSUSB HUDSON-M3_FCBGA656 C519 C517
10U_0603_6.3V6M
1U_0402_6.3V6K
R132 0_0603_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
4 4
FBMA-L11-201209-221LMA30T_0805
2 2
42 ohm/4A 1 1 1 1
C140 C139 C332 C333
2 2 2 2

www.vinafix.vn
Custom A
4019IS
A B C D E
5 4 3 2 1
om
+3VS +3VS_RT Power Consumption:
.c
30mil 30mil
@
Pin5 (DPV33) < 20mA
ix
1 2
RV277 0_0805_5% Pin 11 (DPV12) < 100mA
f Pin 15 (SWR_VCCK) < 100mA (layout trace > 60 mil)

se
Pin 17 (SWR_LX) < 600mA (layout trace > 60 mil) +DVCC33
EEROM
UV27
Pin 18 (SWR_VDD) < 200mA (layout trace > 40 mil)
ro
+AVCC33
Pin 22 (PVCC) < 50 mA RTD2136S

10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
UV26 @
w.
D D
1 1 1 8 1
Pin 43 (VCCK) < 50mA TXOC+ 35 LCD_TXCLK+ <18> 7
VCC
WP
A0
A1 2
+3VS_RT
CV343
CV344
CV321
ww
22 36 LCD_TXCLK- <18> MIIC_SCL 6 3

PVCC TXOC- MIIC_SDA SCL A2
5 SDA GND 4
2 2 2 LV25 2 +DVCC33 40 mils
1 18 SWR_VDD TXO0+ 41 LCD_TXOUT0+ <18>
FBMA-L11-201209-221LMA30T_0805 42 LCD_TXOUT0- <18> CAT24C64WI-GT3_SO8
TXO0-
PWR
LV24 2 1 +AVCC33 5 Addr: A8 (1010 100X)
FBMA-L11-201209-221LMA30T_0805 DP_V33
TXO1+ 39 LCD_TXOUT1+ <18>
Close to LV9 Close to 5 pin +SWR_V12 LV26 1 2 +SW_LX 60 mils 17 40 LCD_TXOUT1- <18>
4.7UH_PG031B-4R7MS_1.1A_20% SWR_LX TXO1-
60 mils 15 37 LCD_TXOUT2+ <18>
SWR_VCCK TXO2+
TXO2- 38 LCD_TXOUT2- <18>
43 +DVCC33
VCCK
TXO3+ 33
+DVCC33 11 34
DP_V12 TXO3-
2
LVDS
10U_0603_6.3V6M
0.1U_0402_16V4Z
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RV278
1 1 1 1 1 TXEC+ 25 LCD_TZCLK+ <18> 4.7K_0402_5% EEPROM
DP0_TXP0_C 7 26 LCD_TZCLK- <18> @
<7> DP0_TXP0_C LANE0P TXEC-
CV322
CV323
CV324
CV325
CV326
DP0_TXN0_C 8
<7> DP0_TXN0_C
1
LANE0N MIIC_SCL
TXE0+ 31 LCD_TZOUT0+ <18>
2 2 2 2 2 DP0_TXP1_C
<7> DP0_TXP1_C 9 LANE1P TXE0- 32 LCD_TZOUT0- <18>
DP0_TXN1_C 10
<7> DP0_TXN1_C LANE1N
2
DP
DP0_AUXP_C 4 30 LCD_TZOUT1- <18> RV279
<7> DP0_AUXP_C AUX-CH_P TXE1-
Close to LV10 Close to 18 pin Close to 22 pin DP0_AUXN_C 3 4.7K_0402_5% ROMLESS
<7> DP0_AUXN_C AUX-CH_N
<7> LVDS_HPD 1 RV327 2 1K_0402_5% LVDS_HPD_OUT 1 28 LCD_TZOUT2- <18>
1
DP_HPD TXE2-
TXE3+ 23
TXE3- 24
C C
<9> APU_INVT_PWM 21 PWMIN
2 46 LCD_EDID_CLK +DVCC33
TP2 TESTMODE MIICSCL1 LCD_EDID_CLK <18>
1 2 12 45 LCD_EDID_DATA LCD_EDID_DATA <18>
DP_REXT MIICSDA1
OTHERS
RV280 12K_0402_1%
20 LCD_ENVDD LCD_ENVDD <18> LCD_EDID_DATA RV281 1 2 4.7K_0402_5%
PANEL_VCC TL_INVT_PWM
PWMOUT 19 TL_INVT_PWM <18>
MIIC_SCL 48 44 EC_ENBKL EC_ENBKL <27> LCD_EDID_CLK RV282 1 2 4.7K_0402_5%
MIIC_SDA 47 MIICSCL0 BL_EN
MIICSDA0 MIIC_SDA RV283 1 2 4.7K_0402_5%
60 mils CSCL @ CIICSCL CSCL RV285 1
1 2 13 CIICSCL1 DP_GND 6 2 4.7K_0402_5%
+SWR_V12 CSDA RV284 1 @ 2 0_0402_5% CIICSDA 14 CIICSDA1
GND
RV287 0_0402_5% 16 UTLGND 1 2 CSDA RV289 1 2 4.7K_0402_5%
GND
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RV288 0_0402_5%
1 1 1 1 PAD 49
CV327
CV328
CV329
CV330
RTD2136S-CG_QFN48_6X6
2 2 2 2
Close to LV26 Close to 11 pin Close to 43 pin
P
u
l
l
-
L
o
w
1
0
0
K
+3VS_RT
B B
+3VS_RT EC_ENBKL
1
1
RV293
100K_0402_5% RV295
2
@ 100K_0402_5%
2
2
DP0_AUXN_C CSDA 1 6 EC_SMB_DA3
EC_SMB_DA3 <27>
DP0_AUXP_C 2N7002KDWH_SOT363-6
Q20A
5
@
1
CSCL 4 3 EC_SMB_CK3
EC_SMB_CK3 <27>
RV294 2N7002KDWH_SOT363-6
100K_0402_5% Q20B
@ @
2
Address: 0x94
1 2
AUX termination RV290 0_0402_5%
1 2
RV291 0_0402_5%
A A

www.vinafix.vn
Custom A
4019IS
5 4 3 2 1
A B C D E
om
.c
<17> LCD_TXOUT0+ LCD_TXOUT0+ <17> LCD_TZOUT0+ LCD_TZOUT0+
LCD_TXOUT0- LCD_TZOUT0- +LCD_VDD +3VALW
ix
<17> LCD_TXOUT0- <17> LCD_TZOUT0-
<17> LCD_TXOUT1+ LCD_TXOUT1+ <17> LCD_TZOUT1+ LCD_TZOUT1+
1
f
1
se
<17> LCD_TXOUT1- LCD_TXOUT1- <17> LCD_TZOUT1- LCD_TZOUT1- R109
100_0805_5% R108
LCD_TXOUT2+ LCD_TZOUT2+ 100K_0402_5% +3VS
<17> LCD_TXOUT2+ <17> LCD_TZOUT2+
ro
2
<17> LCD_TXOUT2- LCD_TXOUT2- <17> LCD_TZOUT2- LCD_TZOUT2-
2
w.
6
1 LCD_TXCLK+ LCD_TZCLK+ 1
<17> LCD_TXCLK+ <17> LCD_TZCLK+
2 W=80mils
ww
<17> LCD_TXCLK- LCD_TXCLK- <17> LCD_TZCLK- LCD_TZCLK- Q1A C228

2 0.047U_0402_25V7K
3
S
<17> LCD_EDID_CLK LCD_EDID_CLK 2N7002KDWH_SOT363-6
1
R133 2LCDPWR_GATE
G
Q17
1 2
1
<17> LCD_EDID_DATA LCD_EDID_DATA 68K_0402_5% 1 AO3413_SOT23
3
D
1
C231 +LCD_VDD
4700P_0402_25V7K W=80mils
LCD_ENVDD 2
<17> LCD_ENVDD 5
Q1B 1
2N7002KDWH_SOT363-6 C233
4
0.1U_0402_10V7K
2
R112 2
For RF @ 100K_0402_5%
C262 47P_0402_50V8J
1 2
1
W=20mils CAM@
0.1U_0402_10V7K
+3VS 1 CAM@ 2 +3VS_LVDS_CAM 1 2
R388 0_0603_5% C225
JLVDS 2
1 1 1
2 USB20_N4_R 3
2 USB20_P4_R D84 AZ5125-02S.R7G_SOT23-3
3 3 1 2
4 @ R78 CAM@ 0_0402_5%
4 INT_MIC_CLK @ L55
5 5 INT_MIC_CLK <25>
6 INT_MIC_DATA USB20_N4_R 3 USB20_N4 <13>
6 INT_MIC_DATA <25> 3 4 4
7 7 +LCD_VDD
2 2
8 8 1 1 2A USB20_P4 <13>
9 USB20_P4_R 2 1
9 C226 C227 2 1
10 10 +3VS
11 LCD_EDID_CLK 0.1U_0402_10V7K 4.7U_0805_10V4Z WCM-2012-900T_0805
11 LCD_EDID_DATA 2 2
12 12
1
13 13 1 2
JLVDS1 14 LCD_TXOUT0- R96 CAM@ 0_0402_5% R70
14 LCD_TXOUT0+ @ 300_0402_5%
GND 12 15 15 For RF
11 16 C258 47P_0402_50V8J Reserve for EMI request @
GND LCD_TZOUT0- 16 LCD_TXOUT1-
10 17 +LCD_VDD 1 2
2
10 LCD_TZOUT0+ 17 LCD_TXOUT1+
9 9 18 18 1
8 LCD_TZOUT1- 19 C287
8 LCD_TZOUT1+ 19 LCD_TXOUT2-
7 7 20 20 10P_0402_50V8J
6 LCD_TZOUT2- 21 LCD_TXOUT2+
6 LCD_TZOUT2+ 21 2 @
5 5 22 22
4 LCD_TZCLK- 23 LCD_TXCLK-
4 LCD_TZCLK+ 23 LCD_TXCLK+
3 3 24 24
2 31 25 LED_PWM Reserved for EHCI CRC errors
2 GND1 25 DISPOFF#
1 1 32 GND2 26 26
33 GND3 27 27
ACES_87036-1001-CP 34 28
@ GND4 28
35 GND5 29 29 +LCD_INV
36 GND6 30 30 1.5A
1 2
STARC_107K30-000001-G2 @
C286 47P_0402_50V8J
For RF
LED_PWM 1 2 TL_INVT_PWM <17>
RB751V40_SC76-2 D19
3 3
1
1.5A
R135
+LCD_INV B+ 47K_0402_5%
L2
2 1
2
1 1 FBMA-L11-201209-221LMA30T_0805
C234 C235
68P_0402_50V8J 0.1U_0402_25V6
2 2
B+
For EMI DISPOFF# 1 2 BKOFF# <27>
D20 RB751V40_SC76-2
1
1 1 1 1
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
R730
C236 C268 C489 C490 10K_0402_5%
@ @ @ @
2
2 2 2 2
4 4

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Custom A
4019IS
A B C D E
A B C D E
om
.c
CRT CONNECTOR
fix
se
If=1A
+5VS +CRT_VCC_R +CRT_VCC
D6
ro
2 F1 40 mils
1 1 2
w.
1 Remove D3~D5 on DVT 3

0.5A_8V_KMC3S050RY
1 1
ww
RB491D_SOT23-3 C237
0.1U_0402_16V4Z
L3 2
<14> UMA_CRT_R 1 2 NBQ100505T-800Y_0402 CRT_R_L @
<14> UMA_CRT_G L4 1 2 NBQ100505T-800Y_0402 CRT_G_L
<14> UMA_CRT_B L5 1 2 NBQ100505T-800Y_0402 CRT_B_L
JCRT
6
T75 PAD 11
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
R138 R139 R140 CRT_R_L 1
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1 7
1
CRT_DDC_DAT 12
C238 C239 C240 C241 C242 C243 CRT_G_L 2
8 G 16
2 2 2 2 2 2 HSYNC 13 G 17
CRT_B_L 3
2
+CRT_VCC 9
VSYNC 14
T76 PAD 4
10
CRT_DDC_CLK 15
5
SUYIN_070546FR015S251ZR
@
2 2
+CRT_VCC
1 2
C244 0.1U_0402_16V4Z 2 1
R141 10K_0402_5%
5
1
P
OE#
2 4 D_CRT_HSYNC 1 2 HSYNC
<14> UMA_CRT_HSYNC A Y
+CRT_VCC L6 10_0402_5% D98 @
G
U6 CRT_R_L 6 3 CRT_B_L
SN74AHCT1G125GW_SOT353-5 I/O4 I/O2
1 2
5
1
C247
0.1U_0402_16V4Z
P
OE#
2 4 D_CRT_VSYNC 1 2 VSYNC +CRT_VCC 5 2
<14> UMA_CRT_VSYNC A Y VDD GND
10P_0402_50V8J
10P_0402_50V8J
L7 10_0402_5% 1 1
G
U7
SN74AHCT1G125GW_SOT353-5 C245 C246
3
@ @ CRT_G_L 4 1
2 2 I/O3 I/O1
AZC099-04S.R7G_SOT23-6
D97 @
CRT_DDC_DAT 6 3 HSYNC
I/O4 I/O2
3 3
+CRT_VCC 5 VDD GND 2
+CRT_VCC
CRT_DDC_CLK 4 1 VSYNC
+3VS I/O3 I/O1
2
R153 R159
Reserve ESD for CRT connector on DVT
4.7K_0402_5% 4.7K_0402_5%
1
2
Q205A
<14> UMA_CRT_CLK 5 1 6 CRT_DDC_CLK
2N7002KDWH_SOT363-6
Q205B
<14> UMA_CRT_DATA 4 3 CRT_DDC_DAT
1 1
1 1 2N7002KDWH_SOT363-6
C284 C283
C282 C285 470P_0402_50V8J 470P_0402_50V8J
33P_0402_50V8K 33P_0402_50V8K @ 2 2 @
@ 2 2 @
4 4

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A
4019IS
A B C D E
5 4 3 2 1
om
.c
fix
se
ro
w.
D D
ww
Change R184 and R185 from 2K to 4.7K

for HDMI detect issue on preMP
+HDMI_5V_OUT
+3VS +HDMI_5V_OUT
R145
CV308 1 2 0.1U_0402_16V7K VGA_DVI_TXC+ HDMI_HPD_U 1 2 HDMI_HPD_C
<7> UMA_HDMI_TXC+
2 1K_0402_5%
CV304 1 2 0.1U_0402_16V7K VGA_DVI_TXC- C264 2
<7> UMA_HDMI_TXC-
2
0.1U_0402_16V4Z R186 C265
1
CV306 1 2 0.1U_0402_16V7K VGA_DVI_TXD0+ U9 100K_0402_5% 0.1U_0402_16V4Z
<7> UMA_HDMI_TX0+ 1
OE#
P
1
1
CV302 VGA_DVI_TXD0- HDMI_HPD 1
<7> UMA_HDMI_TX0- 1 2 0.1U_0402_16V7K 2 A Y 4
R184 R185
1
G
CV303 1 2 0.1U_0402_16V7K VGA_DVI_TXD1+ 4.7K_0402_5% 4.7K_0402_5% 74AHCT1G125GW_SOT353-5
<7> UMA_HDMI_TX1+
3
2
CV301 1 2 0.1U_0402_16V7K VGA_DVI_TXD1-
<7> UMA_HDMI_TX1- <7> UMA_HDMI_CLK
2
G
CV307 1 2 0.1U_0402_16V7K VGA_DVI_TXD2+
<7> UMA_HDMI_TX2+
3 1 HDMI_SCLK
2
CV305 1 2 0.1U_0402_16V7K VGA_DVI_TXD2-
<7> UMA_HDMI_TX2-
D
Q18
BSH111_SOT23-3
3 1 HDMI_SDATA
C <7> UMA_HDMI_DATA C
2 1 +3VS
D
R571
Q19 2.2K_0402_5%
BSH111_SOT23-3
HDMI_HPD
HDMI_HPD <7>
HDMI_R_CK+ 1 2
R195 604_0402_1%
VGA_DVI_TXC- 1 @ 2 HDMI_R_CK- HDMI_R_CK- 1 2
R157 0_0402_5% R197 604_0402_1%
L8 HDMI_R_D1- 1 2
1 2 R198 604_0402_1%
1 2 HDMI_R_D1+ 1 2
R202 604_0402_1% Add C201 and C214 for EMI request on PVT
4 3 HDMI_R_D0+ 1 2
4 3 R201 604_0402_1% D53 F2
OCE2012120YZF HDMI_R_D0- 1 2 +5VS 2 1 +HDMI_5V_OUT_F 1 2 +HDMI_5V_OUT
VGA_DVI_TXC+ 1 @ 2 HDMI_R_CK+ R203 604_0402_1% 1 1
R173 0_0402_5% HDMI_R_D2- 1 2 PMEG2010AEH_SOD123 0.5A_8V_KMC3S050RY C259 C214
R205 604_0402_1% 1 560P_0402_50V7K
0.1U_0402_16V4Z
HDMI_R_D2+ 1 2 C201 @
VGA_DVI_TXD0- @ HDMI_R_D0- R206 604_0402_1% 560P_0402_50V7K 2 2
1 2
1
R175 0_0402_5% D Q24 @
L9 2N7002_SOT23-3 2
+5VS 2
1 2 D95 @ G
1 2 HDMI_R_D0- 1 1 109 HDMI_R_D0- S
3
4 3 HDMI_R_D0+2 2 98 HDMI_R_D0+
4 3
OCE2012120YZF HDMI_R_D2- 4 4 7 7 HDMI_R_D2-
B VGA_DVI_TXD0+ 1 @ 2 HDMI_R_D0+ B
R180 0_0402_5% HDMI_R_D2+5 5 66 HDMI_R_D2+
3 3
VGA_DVI_TXD1- 1 @ 2 HDMI_R_D1- 8
R182
L10
0_0402_5%
HDMI Connector
1 2 AZ1045-04F_DFN2510P10E-10-9
1 2 D96 @ JHDMI @
HDMI_HPD_C 6 3 HDMI_SCLK HDMI_HPD_C 19
I/O4 I/O2 HP_DET
4 4 3 3 +HDMI_5V_OUT 18 +5V
17 DDC/CEC_GND
OCE2012120YZF HDMI_SDATA 16
VGA_DVI_TXD1+ @ HDMI_R_D1+ D94 @ HDMI_SCLK SDA
1 2 +5VS 5 VDD GND 2 15 SCL
R183 0_0402_5% HDMI_R_D1+ 1 1 109 HDMI_R_D1+ 14 Reserved
13 CEC
HDMI_R_D1- 2 2 98 HDMI_R_D1- HDMI_R_CK- 12 20
VGA_DVI_TXD2- @ HDMI_R_D2- HDMI_SDATA CK- GND
1 2 +HDMI_5V_OUT 4 I/O3 I/O1 1 11 CK_shield GND 21
R187 0_0402_5% HDMI_R_CK+ 4 4 7 7 HDMI_R_CK+ HDMI_R_CK+ 10 22
L11 AZC099-04S.R7G_SOT23-6 HDMI_R_D0- CK+ GND
9 D0- GND 23
1 2 HDMI_R_CK- 5 5 6 6 HDMI_R_CK- 8
1 2 HDMI_R_D0+ D0_shield
7 D0+
3 3 HDMI_R_D1- 6 D1-
4 4 3 3 5 D1_shield
8 HDMI_R_D1+
OCE2012120YZF
Reserve ESD for HDMI conn. on DVT HDMI_R_D2-
4
3
D1+
VGA_DVI_TXD2+ @ HDMI_R_D2+ D2-
1 2 2 D2_shield
R188 0_0402_5% AZ1045-04F_DFN2510P10E-10-9 HDMI_R_D2+ 1 D2+
HONGL_13-13201904CP
A A

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Size
Document Number Rev
A
4019IS
5 4 3 2 1
A B C D E
om
SATA HDD Conn. SATA ODD Conn (for 14")
Close to JHDD
.c
JHDD @
GND 1
SATA_FTX_C_DRX_P0 C369 1 2 0.01U_0402_25V7K
ix
RX+ 2 SATA_FTX_DRX_P0 <14>
3 SATA_FTX_C_DRX_N0 C367 1 2 0.01U_0402_25V7K
RX- SATA_FTX_DRX_N0 <14>
GND 4
f
SATA_FRX_DTX_N0 C368 1 2 0.01U_0402_25V7K
TX- 5 SATA_FRX_C_DTX_N0 <14> Close to JODD
se
6 SATA_FRX_DTX_P0 C370 1 2 0.01U_0402_25V7K JODD @
TX+ SATA_FRX_C_DTX_P0 <14>
GND 7 GND 1
2 SATA_FTX_C_DRX_P1 C376 1 2 0.01U_0402_25V7K SATA_FTX_DRX_P1 <14>
ro
A+ SATA_FTX_C_DRX_N1 C377 1
A- 3 2 0.01U_0402_25V7K SATA_FTX_DRX_N1 <14>
GND 4
5 SATA_FRX_DTX_N1 C378 1 2 0.01U_0402_25V7K
w.
1 B- SATA_FRX_C_DTX_N1 <14> 1
8 6 SATA_FRX_DTX_P1 C375 1 2 0.01U_0402_25V7K
3.3V +3VS B+ SATA_FRX_C_DTX_P1 <14>
3.3V 9 GND 7
ww
3.3V 10
11 8 ODD_PLUGIN#
GND DP ODD_PLUGIN# <13>
GND 12 +5V 9 +5VS_ODD +5VS_ODD
GND 13 +5V 10 1 Place components closely ODD CONN.
14 11 ODD_DA# C365 1.1A
5V +5VS MD ODD_DA# <13>
15 14 12 0.1U_0402_10V7K
5V GND1 GND @
5V 16 15 GND2 GND 13 1 1 1 1 1 1
C364 2 C355 C354 C379
GND 17
18 SANTA_206001-1 0.1U_0402_10V7K @ @ C380 C360
Reserved @ 10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0402_6.3V6K 0.1U_0402_10V7K
GND 19
2 2 2 2 2 2
23 GND 12V 20
24 21 0.1U_0402_10V7K
GND 12V +5VS
12V 22 Place closely JHDD SATA CONN. Add C364 and C365 for EMI request on PVT
1.2A
SUYIN_127043FB022G278ZR
1 1 1 1
C356 C357 C358 C359
0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K
10U_0603_6.3V6M
2 2 2 2
SATA ODD Conn (for 15"/17")

2
Power Button & RUSB connector 2
JODDB @
1 1
2 SATA_FTX_C_DRX_P2 C384 1 2 0.01U_0402_25V7K
2 SATA_FTX_DRX_P2 <14>
3 SATA_FTX_C_DRX_N2 C382 1 2 0.01U_0402_25V7K
3 SATA_FTX_DRX_N2 <14>
4 JUSIO @
4 SATA_FRX_DTX_N2 C381 1
5 5 2 0.01U_0402_25V7K SATA_FRX_C_DTX_N2 <14> 1 1
6 SATA_FRX_DTX_P2 C383 1 2 0.01U_0402_25V7K 2 USB20_P1_R
6 SATA_FRX_C_DTX_P2 <14> 2
7 3 USB20_N1_R
7 ODD_PLUGIN# 3
8 8 4 4
9 +5VS_ODD 5 USB20_P0_R
9 5 USB20_N0_R
10 10 6 6
11 ODD_DA# 7
11 7 ON/OFFBTN#
12 12 ODD_SEL <14> 8 8 ON/OFFBTN# <27,29>
13 9 +5VS_PWR_ON_LED 2 1 +5VS
GND 9 R4
GND 14 10 10 +USB_VCCA
11 390_0402_5% W=80mils
ACES_88058-120N 11 +5VALW
12
12
GND 13 2.5A +USB_VCCA
For EMI
14 U14
GND
2 IN OUT 6 2 1
ACES_88058-120N 3 7 C361 1000P_0402_50V7K
USB_EN# IN OUT
<24,27> USB_EN# 4 EN/ENB OUT 8
1 GND OCB 5 USB_OC0# <13>
1
SY6288DCAC_MSOP8
SA00004KB00 C362
4.7U_0805_10V4Z
3 SA00003TV00 2 @ 3
USB20_P1 1 @ 2 USB20_P1_R USB20_P0 1 @ 2 USB20_P0_R

<13> USB20_P1 <13> USB20_P0
RR48 0_0402_5% RR31 0_0402_5%
LR8 LR7
4 4 3 3 4 4 3 3
1 1 2 2 1 1 2 2
WCM-2012-900T_0805 WCM-2012-900T_0805
USB20_N1 1 @ 2 USB20_N1_R USB20_N0 1 @ 2 USB20_N0_R
<13> USB20_N1 <13> USB20_N0
RR47 0_0402_5% RR30 0_0402_5%
1
1
R56 R62
300_0402_5% 300_0402_5%
@ @
2
2
1 1
C260 C261
10P_0402_50V8J 10P_0402_50V8J
4 2 @ 2 @ 4
Reserved for EHCI CRC errors Reserved for EHCI CRC errors

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A
4019IS
A B C D E
A B C D E F G H
om
.c
WLAN&BT Combo module circuits
Slot 1 Half PCIe Mini Card-WLAN BT BT
ix
on module on module
Enable Disable
f 40 mils
se
+3V_WLAN +1.5VS_WLAN
For SED
For SED BT_ON H L
0.1U_0402_16V4Z 0.1U_0402_16V4Z
ro
1 1 1 1 1 1
1
CM1 CM2 CM3 C253 CM7 CM8 CM9 C254
w.
1 47P_0402_50V8J @ @ @ 47P_0402_50V8J 1
2
2 2 2 @ 2 2 2 @ +1.5VS +3V_WLAN
ww
0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z
5
UM5
PJ33 1
P
<12,23> APU_PCIE_RST# IN1
PAD-OPEN 2x2m <27> BT_ON 1 R327 2 E51_RXD_R
O 4 WLAN_RST#_R
@ 1K_0402_5% 2
<27> WLAN_RST# IN2
2
For isolate BT_CTRL and SN74AHC1G08DCKR_SC70-5 RM21
3
Compal Debug Card. Add WLAN_RST# on DVT 100K_0402_5%
+1.5VS_WLAN +3V_WLAN
1
@ JWLAN @
R1443 1 2 WLAN_RST# 1 @ 2
0_0402_5% 1 2 RM19 0_0402_5%
3 3 4 4
BT_ON 1 2BT_CTRL_R 5 6
5 6
<13> CLKREQ_WLAN# 7 7 8 8
9 9 10 10
<12> CLK_WLAN# 11 11 12 12
<12> CLK_WLAN 13 13 14 14
15 15 16 16
R47
17 18 0_0402_5%
17 18 WLAN_OFF# 1 @
19 19 20 20 2 WL_OFF# <27>
21 22 WLAN_RST#_R
21 22
23 24
<5> PCIE_FRX_WLANTX_N1
<5> PCIE_FRX_WLANTX_P1 25
23
25
24
26 26 +3VALW TO +3V_WLAN
27 27 28 28
29 29 30 30 FCH_SCLK0 <10,11,13>
<5> PCIE_FTX_C_WLANRX_N1 31 31 32 32 FCH_SDATA0 <10,11,13>
33 34 +3VS
<5> PCIE_FTX_C_WLANRX_P1 33 34
2 35 35 36 36 USB20_N3 <13> 2
+3VS Vgs=-4.5V,Id=3A,Rds<97mohm
WLAN/ WiFi 37 37 38 38 USB20_P3 <13> BT
+3V_WLAN 39 39 40 40
41 41 42 42
1
43 43 44 44 2
45 46 R63 R142 C907
45 46
2
R17 47 48 300_0402_5% 100K_0402_5%
47 48
10_0402_5%2 E51_TXD_R 49 50 @ 0.1U_0402_10V7K PJ26
2
<27> E51_TXD 49 50 1
1 2 E51_RXD_R 51 52 JUMP_43X79
<27> E51_RXD
2
2
51 52
3
S
0_0402_5% 53 54 1 R143 @
G1 G2
1
G
R49 C263 1 2 2 Q210
<27> WLAN_PWR#
Debug card using 10P_0402_50V8J AO3413_SOT23
1
BELLW_80003-7041 47K_0402_5% 2
D
2 @
1
C908 +3V_WLAN
Change JWLAN symbol to 1
0.01U_0402_25V7K
SP07000TB00 on DVT Reserved for EHCI CRC errors
Add WLAN power circuit on DVT
+3VALW
Green Clock Generator
0.1U_0402_10V7K
1
CCL8
3 GCLK@ 3
2
1 FCH_RTCX1_R_R 1 GCLK@ 2 FCH_RTCX1_R

FCH_RTCX1_R <12>
CCL7 RCL9 0_0402_5%
UCL1 GCLK@ 22U_0805_6.3V6M
GCLK@
2 FCH_X1_R_R
+3VL +3VALW 2 VDD VBAT 10 +RTCBATT 1 GCLK@ 2 FCH_X1_R
FCH_X1_R <12>
+3VL 15 11 RCL1 33_0402_5%
+V3.3A NC
0.1U_0402_10V7K
1 +3V_LAN 8 9 FCH_RTCX1_R_R LAN_X1_R_R 1 GCLK@ 2 LAN_X1_R

VDDIO_25M_A 32K LAN_X1_R <23>
+3VS 3 12 RCL2 33_0402_5% 1
CCL1 VDDIO_25M_B NC
GCLK@ CLK_X1 1 5 FCH_X1_R_R CCL10
2 CLK_X2 XTAL_OUT 25M_B LAN_X1_R_R 5P_0402_50V8C
16 XTAL_IN 25M_A 6
2 GCLK@
4 VSS
7 VSS
+3V_LAN 13 VSS Stuff CCL10 for EMI request on DVT
17 Thermal Pad VDD_RTC_OUT 14 +RTCBATT_D
0.1U_0402_10V7K
1
SLG3NB238VTR TQFN 16P _2X3 1 CCL6
CCL2 2.2U_0603_6.3V6K LAN_X1_R_R 1 @ 2
GCLK@ GCLK@ RCL5 0_0402_5%
2
2
Reserved for Swing Level adjustment

+3VS ( Close GCLK side )
0.1U_0402_10V7K
1
4 CCL3 GCLK@ 4
GCLK@ YCL1 25MHZ_12PF_7V25000012
2
CLK_X1 1 3 CLK_X2
1 3
GND GND
1 2 4 1
CCL4 CCL5
18P_0402_50V8J 18P_0402_50V8J
2
GCLK@
2
GCLK@ Security Classification Compal Secret Data Compal Electronics, Inc.
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A
4019IS
A B C D E F G H
A B C D E
om
UL1 +3V_LAN CL3 to CL6 close to Pin 27,39,47,48
Add test point
.c
+LAN_VDD10 CL7 to CL8 close to Pin 12,42
<5> PCIE_FRX_C_LANTX_P0 CL1 1 2 0.1U_0402_10V7K PCIE_FRX_LANTX_P0 22 31 for pin37 on DVT
HSOP LED3/EEDO LL1
8111FVB@
ix
LED1/EESK 37 TL1 1 2
<5> PCIE_FRX_C_LANTX_N0 CL2 1 2 0.1U_0402_10V7K PCIE_FRX_LANTX_N0 23 40 +LAN_REGOUT 1 2 CL3 0.1U_0402_10V7K
HSON LED0 2.2UH +-5% NLC252018T-2R2J-N 1 2
f
PCIE_FTX_C_LANRX_P0 17 30 RL2 2 @ 1 10K_0402_5% 1 1 CL4 0.1U_0402_10V7K
<5> PCIE_FTX_C_LANRX_P0 HSIP EECS
se
LAN_EN PCIE_FTX_C_LANRX_N0 18 32 RL1 2 @ 1 10K_0402_5% Layout Note: LL1 must be 1 2
<13> LAN_EN <5> PCIE_FTX_C_LANRX_N0 HSIN EEDI
2
within 200mil to Pin36, CL13 CL9 CL5 0.1U_0402_10V7K
G
2N7002_SOT23-3 CL13,CL9 must be within 4.7U_0603_6.3V6K 0.1U_0402_10V7K 1 2
ro
CLKREQ_LAN# 1 3 LANCLK_REQ# 16 1 LAN_MDI0+ 200mil to LL1 8111FVB@ 2 2 8111FVB@ CL6 0.1U_0402_10V7K

<13> CLKREQ_LAN# CLKREQB MDIP0
QL53 2 LAN_MDI0- 1 2
S
APU_PCIE_RST# MDIN0 LAN_MDI1+ 8111FVB@ CL7 0.1U_0402_10V7K
25 4
w.
1 <12,22> APU_PCIE_RST# PERSTB MDIP1 1

5 LAN_MDI1- 1 2
CLK_LAN MDIN1 LAN_MDI2+ 8111FVB@ CL8 0.1U_0402_10V7K
<12> CLK_LAN 19 REFCLK_P NC/MDIP2 7
ww
@ CLK_LAN# 20 8 LAN_MDI2-
<12> CLK_LAN# REFCLK_N NC/MDIN2
1 2 10 LAN_MDI3+
RL28 0_0402_5% NC/MDIP3 LAN_MDI3-
NC/MDIN3 11
LAN_X1 43 CKXTAL1 +LAN_VDD10 +LAN_EVDD10
+3VS LAN_X2 44 13 +LAN_VDD10 CL19, CL20,CL21 close to pin 13,29,45, respectively
CKXTAL2 DVDD10 +LAN_VDD10
RL24 2 1 10K_0402_5% LANCLK_REQ# 29 1 2 CL22 close to pin 3, respectively
DVDD10 LL2 0_0603_5%
DVDD10 41 CL23,CL24,CL25 close to pin 6,9,41, respectively
FCH_PCIE_WAKE# 28 1 1
<13> FCH_PCIE_WAKE# LANWAKEB
1 2
+3V_LAN ISOLATE# 26 27 CL18 CL17 CL19 0.1U_0402_10V7K
ISOLATEB DVDD33 +3V_LAN
RL25 2 @ 1 10K_0402_5% FCH_PCIE_WAKE# 39 1U_0402_6.3V6K 0.1U_0402_10V7K 1 2
DVDD33 2 2 CL20 0.1U_0402_10V7K
14 NC/SMBCLK AVDD33 12 +3V_LAN 1 2
RL21 2 @ 1 10K_0402_5% 15 42 CL21 0.1U_0402_10V7K
RL22 1 @ NC/SMBDATA AVDD33
+3V_LAN 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 Close to Pin 21 1 2
48 8111FVB@ CL22 0.1U_0402_10V7K
AVDD33
1 2
@ ENSWREG 33 8111FVB@ CL23 0.1U_0402_10V7K
+3VS LAN_EN ENSWREG +3V_LAN +LAN_VDDREG
1 2 EVDD10 21 +LAN_EVDD10 1 2
RL26 0_0402_5% +LAN_VDDREG 34 8111FVB@ CL24 0.1U_0402_10V7K
VDDREG
35 VDDREG AVDD10 3 +LAN_VDD10 1 2 1 2
6 8111FVB@ LL3 0_0603_5% 1 1 8111FVB@ CL25 0.1U_0402_10V7K
AVDD10
1
AVDD10 9
1 2 46 45 CL28 CL29
1K_0402_5% RL5 2.49K_0402_1% RSET AVDD10 4.7U_0603_6.3V6K 0.1U_0402_10V7K
RL6 +LAN_REGOUT 8111FVB@ 2 2 8111FVB@
24 GND REGOUT 36
@ 49 60 mils
2
PGND
For P/N and footprint
ISOLATE# 1 2 WOL_EN#
2 RL433 0_0402_5% RTL8111F-CGT_QFN48_6x6
Please place them to ISPD page 2
Placement near to YL1
8111FVB@
RL8 GCLK@ UL1

RL7 1 2 LAN_X2
<22> LAN_X1_R
15K_0402_5% RTL8105E RTL8111E/F 0_0402_5%
Sx Enable Sx Disable S0
Wake up Wake up Pin14 NC NC CL43 10P_0402_50V8J 8105E-VL/VD 8105E-VL/VD
1 2 1 2 +3V_LAN
8111F/F-VB
Pin15 NC 10K ohm PD RL29 22_0402_5% 8105E-VD 10/100M
GCLK@ GCLK@
PWM Mode LDO Mode 8105ELDO@
WOL_EN# LOW HIGH HIGH
1
Pin38 NC 1K ohm PH RL4 0 ohm NC
RL4 (Pull High)
0_0402_5%
8111FVB@ NC 0 ohm
+3VALW TO +3V_LAN Reserve +3VALW_FCH NOGCLK@ YL1 25MHZ_20PF_7V25000016 RL23 (Pull Down)
2
ENSWREG
to +3V_LAN for saving LAN_X1 1 3 LAN_X2
1 3
1
Vgs=-4.5V,Id=3A,Rds<97mohm +3VALW power consumption on DVT GND GND RL23
+3VALW 0_0402_5%
1 2 4 1
+3VALW_FCH CL26 CL27 8105ELDO@
27P_0402_50V8J 27P_0402_50V8J
2
1
2 NOGCLK@ NOGCLK@
RL147 CL483 2 2
100K_0402_5% @
@ 0.1U_0402_10V7K
2
1
PAD-OPEN 2x2m
PAD-OPEN 2x2m
2
S
@ RL432 @ QL51 PJ29 PJ31
LAN Conn.
2
G
1 2 2 @ @
<27> WOL_EN#
+3V_LAN
1
47K_0402_5% 2 AO3413_SOT23 D
1
3 @ JRJ45 @ 3
1
CL482 Swap MDI0 and MDI1 on DVT RJ45_MIDI0+ 1 PR1+

0.01U_0402_25V7K
1 UL3 RJ45_MIDI0-
2 2 PR1-
1
CL682 LAN_MDI1- 1 16 RJ45_MIDI1- RJ45_MIDI1+ 3 For ESD
TD+ TX+ PR2+
1
CL681 1U_0402_6.3V6K LAN_MDI1+ 2 15 RJ45_MIDI1+ CL39 1000P_0402_50V7K
4.7U_0805_10V4Z 1 TD- TX- RJ45_MIDI2+ D92
3 14 2 1 1 2 4
1
@ 2 CT CT RL11 75_0402_1% PR3+
4 NC NC 13 AZC199-02SPR7G_SOT23-3
5 12 CL40 1000P_0402_50V7K RJ45_MIDI2- 5
NC NC PR3-
3
6 CT CT 11 2 1 1 2
LAN_MDI0- 7 10 RJ45_MIDI0- RL12 75_0402_1% RJ45_MIDI1- 6
3
LAN_MDI0+ RD+ RX+ RJ45_MIDI0+ PR2-
8 RD- RX- 9
RJ45_MIDI3+
Reserve ESD for LAN on DVT 7 PR4+ GND 9
+3V_LAN rising time (10%~90%) need > 1ms and <100ms. 10/100M transformer_NS681695 RJ45_MIDI3- 8
GND 10
D99 @ UL4 8111FVB@ PR4-
2
LAN_MDI1- 6 3 LAN_MDI0+ SANTA_130452-S
I/O4 I/O2 LAN_MDI3- RJ45_MIDI3- 8111FVB@ D93
LAN WOL
LAN_EN ISOLATEB 1 16
2
LAN_MDI3+ TD+ TX+ RJ45_MIDI3+ CL41 1000P_0402_50V7K 8111FVB@
2 TD- TX- 15 AZC199-02SPR7G_SOT23-3
S0 Sx S0 Sx 3 CT CT 14 2 1 1 2 @
1
+3V_LAN 5 2 4 13 RL13 75_0402_1%
VDD GND NC NC
---------------------------------------------- 5 12 CL42 1000P_0402_50V7K
1
NC NC
6 CT CT 11 2 1 1 2 For ESD
0 0 0 0 1 1 LAN_MDI2- 7 RD+ RX+ 10 RJ45_MIDI2- RL15 75_0402_1%
LAN_MDI1+ 4 1 LAN_MDI0- LAN_MDI2+ 8 9 RJ45_MIDI2+ 8111FVB@ 8111FVB@
0 1 0 0 1 1 I/O3 I/O1 RD- RX-
1 0 1 1 1 1 10/100M transformer_NS681695 CL36
1 1 1 1 1 0* 1 RJ45_GND 1 2 LANGND
D100 @ Change UL3 and UL4 PN 1 1
LAN_MDI2+ 6 3 LAN_MDI3- CL34 1000P_1808_3KV7K CL37 CL38
4 I/O4 I/O2 0.1U_0402_25V6 to SP050006N00 on DVT @ 4
* 2
2
220P_0402_50V6K
2
4.7U_0603_6.3V6K
S3: after SUSP# assert low over 100ms +3V_LAN 5 VDD GND 2
S4/S5: after SYSON assert low over 100ms
LAN_MDI2- 4 1 LAN_MDI3+
I/O3 I/O1
www.vinafix.vn
4019IS
A B C D E
5 4 3 2 1
om
+5VALW
.c
1
RB73 +5VALW W=60mils
2.5A
ix
4.7K_0402_5% +USB_VCCB
For EMI
@ UR3 W=80mils
U15 @ 2 6 2 1 +USB_VCCB
f
2
CEN SLP_CHG# IN OUT CR38 1000P_0402_50V7K
1 CEN CB 8 SLP_CHG# <14> 3 IN OUT 7
se
USB20_DN10 2 7 USB20_N10 4 8
DM TDM USB20_N10 <13> <27> USB_CHG_EN# EN/ENB OUT
1
USB20_DP10 3 6 USB20_P10 1 5 USB_OC1# <13> 4.7U_0805_10V4Z 0.1U_0402_10V7K

DP TDP USB20_P10 <13> GND OCB
RB74 SELCDP 4 5 +5VALW 1
ro
4.7K_0402_5% SELCDP VDD SY6288DCAC_MSOP8

9 Thermal Pad 1 1 1 1
@ SA00004KB00 CR39 CR46 CR45 CR44
SLG55584AVTR_TDFN8_2X2 4.7U_0805_10V4Z + CR40
1 1
w.
2
D CB25 SA00003TV00 2 @ D
0.1U_0402_16V7K CB49 2 2 2
@ 10U_0603_6.3V6M 2
ww
2 2 @ 1000P_0402_50V7K
220U_6.3V_M
+5VALW @
PJ30
2 2 1 1 150uFx2 or 220uFx1
Pull-up for SLGC55584AV PAD-OPEN 2x2m
1
Q8 @
RB75 +USB_VCCC
4.7K_0402_5% USB20_DN10 USB20_N10
W=80mils
S
1 2 +USB_VCCC 1 3 +USB_VCCB
@ RR44 0_0402_5%
USB20_DP10 1 2 USB20_P10 AO3413_SOT23 4.7U_0805_10V4Z
2
RR45 0_0402_5% 1 @ 2 1
G
+5VALW
2
R568 100K_0402_5% 1 1 1
SELCDP + CR47 CR42 CR43 CR41
USB_EN# @ 1000P_0402_50V7K
<21,27> USB_EN#
1
2 2 2 2
RB76
4.7K_0402_5% 220U_6.3V_M 0.1U_0402_10V7K
@
Pull-down for SLGC55584V
2
USB20_DP10 1 @ 2 USB20_P10_L USB20_P11 1 @ 2 USB20_P11_L

<13> USB20_P11
RR26 0_0402_5% RR39 0_0402_5%
LR3 LR4
4 4 3 3 4 4 3 3
1 1 2 2 1 1 2 2
SLP_CHG# SELCDP Function
WCM-2012-900T_0805 WCM-2012-900T_0805
DCP autodetect with USB20_DN10 1 @ 2 USB20_N10_L USB20_N11 1 @ 2 USB20_N11_L JUSBA @
C <13> USB20_N11 C
0 X mouse/keyboard wakeup RR25 0_0402_5% RR38 0_0402_5% USB30_TX0P_C_L 9 SSTX+
+USB_VCCB 1 VBUS
1
USB30_TX0N_C_L 8
R71 R72 USB20_N10_L SSTX-
1 0 S0 charging with SDP only 2 D-
300_0402_5% 300_0402_5% 7
@ @ USB20_P10_L GND
3 D+ GND 10
1 1 S0 charging with CDP or SDP only USB30_RX0P_L 6 11
2
SSRX+ GND
1 1 4 GND GND 12
C288 C289 USB30_RX0N_L 5 13
SSRX- GND
10P_0402_50V8J 10P_0402_50V8J
OCTEK_USB-09EAEB
2 @ 2 @
Reserved for EHCI CRC errors Reserved for EHCI CRC errors
JUSBB @
USB30_TX1P_C_L 9 SSTX+
+USB_VCCC 1 VBUS
USB30_TX1N_C_L 8
USB20_N11_L SSTX-
2 D-
USB30_RX0N 1 @ 2 USB30_RX0N_L 7
<13> USB30_RX0N GND
RR19 0_0402_5% USB20_P11_L 3 10
LR1 USB30_RX1P_L D+ GND
6 SSRX+ GND 11
4 4 3 3 4 GND GND 12
USB30_RX1N_L 5 13
SSRX- GND
1 2 OCTEK_USB-09EAEB
1 2
KINGCORE WCM-2012HS-670T
USB30_RX0P 1 @ 2 USB30_RX0P_L
<13> USB30_RX0P
RR20 0_0402_5%
B <13> USB30_TX0N 1 2 USB30_TX0N_C 1 @ 2 USB30_TX0N_C_L B

CB22 0.1U_0402_16V7K RR32 0_0402_5%
LR2 DR7 @
4 3 USB30_TX0P_C_L 1 1 109 USB30_TX0P_C_L
4 3
DR1
@ USB30_TX0N_C_L 2 2 98 USB30_TX0N_C_L
1 2 USB20_P10_L 2
1 2 2 USB30_RX0P_L
1 1 4 4 77 USB30_RX0P_L
KINGCORE WCM-2012HS-670T USB20_N10_L 3
USB30_TX0P_C @ USB30_TX0P_C_L 3 USB30_RX0N_L
<13> USB30_TX0P 1 2 1 2 5 5 66 USB30_RX0N_L
CB21 0.1U_0402_16V7K RR22 0_0402_5%
AZC199-02SPR7G_SOT23-3
3 3
8
USB30_RX1N 1 @ 2 USB30_RX1N_L Change ESD Diode for EMI request YSCLAMP0524P_SLP2510P8-10-9

<13> USB30_RX1N
RR42 0_0402_5%
LR5
4 4 3 3
1 2 DR8 @
1 2 USB30_TX1P_C_L 1 1 109 USB30_TX1P_C_L
DR4
USB30_RX1P 1 @ 2 USB30_RX1P_L @ USB30_TX1N_C_L 2 2 98 USB30_TX1N_C_L
<13> USB30_RX1P
RR40 0_0402_5% USB20_P11_L 2
2 USB30_RX1P_L USB30_RX1P_L
1 1 4 4 77
<13> USB30_TX1N 1 2 USB30_TX1N_C 1 @ 2 USB30_TX1N_C_L USB20_N11_L 3
CB24 0.1U_0402_16V7K RR43 0_0402_5% 3 USB30_RX1N_L 5 5 66 USB30_RX1N_L
LR6
AZC199-02SPR7G_SOT23-3
4 4 3 3 3 3
8
1 1 2 2
Change ESD Diode for EMI request YSCLAMP0524P_SLP2510P8-10-9
A A
<13> USB30_TX1P 1 2 USB30_TX1P_C 1 @ 2 USB30_TX1P_C_L
CB23 0.1U_0402_16V7K RR41 0_0402_5%

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Custom A
4019IS
5 4 3 2 1
A B C D E
om
35mA for 3.3V level
.c
close to pin 25 close to pin 38 RA18
UA1 +3VS 1 2 0.1U_0402_16V4Z +DVDD_IO +AVDD 0.1U_0402_10V7K 0.1U_0402_10V7K 1 2 +5VS
RA28 0_0603_5% 0_0603_5%
ix
2 1 2 1 1
MIC1_R_R 4.7U_0603_6.3V6K CA58 MIC1_R_C_R 22 1 +DVDD_IO 1 1
MIC1_R_L 4.7U_0603_6.3V6K CA57 MIC1_R_C_L MIC1_R DVDD +3VS_DVDD CA4 CA42 CA47 CA37 CA50 CA39
21 MIC1_L DVDD_IO 9
f
CA3 @ 10U_0603_6.3V6M
1 2 1 2 2
se
MIC2_R 17 25 +AVDD 10U_0603_6.3V6M
MIC2_L MIC2_R AVDD1 +AVDD 2 2 10U_0603_6.3V6M 10U_0603_6.3V6M
16 MIC2_L AVDD2 38
ro
+MIC1_VREFO_L 31 39 +PVDD 0.1U_0402_16V4Z

MIC1_VREFO_L PVDD1 +PVDD +3VS_DVDD
+MIC1_VREFO_R 30 MIC1_VREFO_R PVDD2 46 +3VS 1 2
29 RA17 0_0603_5% LA6
w.
+MIC2_VREFO MIC2_VREFO 1 1
1 +PVDD 1
1 2 0.1U_0402_10V7K +5VS
SPKR+ CA46 CA45
15 LINE2_R SPK_OUT_R+ 45 1 2 PBY160808T-601Y-N_2P 1 1
ww
14 44 SPKR- 10U_0603_6.3V6M CA33 0.1U_0402_10V7K

LINE2_L SPK_OUT_R- 2 2 CA35 CA34 CA36
close to pin39 10U_0603_6.3V6M
SPKL+ 2 1 2 2
20 MONO_OUT SPK_OUT_L+ 40
41 SPKL- 10U_0603_6.3V6M
MONO_IN SPK_OUT_L-
1 2 12 PCBEEP place close to chip
CA59 100P_0402_50V8J 75_0402_1%
0.01U_0402_25V7K 10 33 RA19 HP_R <26>
<13> AZ_SYNC_HD SYNC HPOUT_R 1
@ CA65 1 2 32 RA20 CA32 0.1U_0402_10V7K
HPOUT_L 75_0402_1% HP_L <26>
<13> AZ_RST_HD# 11 RESET#
close to pin19 2
SDATA_OUT 5 AZ_SDOUT_HD <13>
close to pin 28 8 AZ_SDIN0_HD_R 2 1
SDATA_IN AZ_SDIN0_HD <13>
2 RA30 1AC_JDREF 19 JDREF
RA23 33_0402_5%
10U_0603_6.3V6M 1 2CA60 20K_0402_1% 28 6 AZ_BITCLK_HD
LDO_CAP BCLK AZ_BITCLK_HD <13>
27 VREF
2 1CPVEE 34 CPVEE
AC_VREF CA54 2.2U_0603_10V6K 35 23 @ CA51 For EMI
CBN NC AZ_BITCLK_HD 2
1 1 2 1 36 24 1 1 2 @
CA53 2.2U_0603_10V6K CBP NC
48 10_0402_5% RA29 please place near codec
CA55 CA56 NC 10P_0402_50V8J
2.2U_0603_6.3V6K <18> INT_MIC_DATA 2 GPIO0/DMIC_DATA
2 2 @ INT_MIC_CLK_R 3 GPIO1/DMIC_CLK AVSS1 26
0.1U_0402_10V7K 37
AVSS2
PVSS1 42
SENSE_A 13 43
@ SENSE_B SENSE_A PVSS2
2 1 18 SENSE_B DVSS 7
RA34 20K_0402_1%
47
AGND EC Beep
2 <27> EC_MUTE# 4
EAPD
PD# Thermal Pad 49 <27> EC_BEEP# 1
RA51
2 Beep sound 2
47K_0402_5%
ALC259-VC2-CG_MQFN48_6X6
For EMI
PCI Beep RA52
CA70
RA42 1 2 1 2 MONO_IN
<13> FCH_SPKR
INT_MIC_CLK_R
<18> INT_MIC_CLK
FBMA-10-100505-301T DGND 47K_0402_5%
0.1U_0402_10V7K
CAM@
1 EC_MUTE# Internal AMP
Hight Enable
CA52 CAM@ LOW Disable
2
220P_0402_50V7K
2 RA49 CA69
4.7K_0402_5% 100P_0402_50V8J
1
EC_MUTE#
+MIC2_VREFO
2W 4ohm =40mil placement near Audio Codec
2
1W 8ohm =20mil
Analog MIC SPKL+
LA7
SPK_L1
RA50
2 1 4.7K_0402_5%
0_0603_5% 2
CA71 To solve noise issue
1
1
@ 2
RA24 10U_0603_6.3V6M CA74
1 1U_0402_6.3V4Z
4.7K_0402_5%
AMIC@ Change int. MIC 2 @
CA72 1
2
to MB on DVT @
AMIC@ AMIC@ LA8 10U_0603_6.3V6M
CA26 RA25 JMIC SPKL- 1 SPK_L2
2 1
3 MIC2_L 3
2 1 1U_0402_6.3V4Z 2 1 1K_0402_5% INT_MIC 1 0_0603_5%
2
1
2 SPKR+
LA9
SPK_R1
Ext.MIC/LINE IN JACK
2 1
CA27 3 0_0603_5% 2
MIC2_R GND
2 1 1U_0402_6.3V4Z 2 1 1K_0402_5% 1 2 4 GND
CA76
CA28 RA26 220P_0402_50V7K @
AMIC@ AMIC@ AMIC@ ACES_50271-0020N-001 10U_0603_6.3V6M 2 RA47 2 1 +MIC1_VREFO_R
@ 1 CA73 1K_0402_5% RA48 2.2K_0402_5%
Close to Codec 2 1U_0402_6.3V4Z MIC1_R_R 2 1 MIC1_R <26>
1 1 CA75 @
CA6 CA5 @ 1
@ @ LA10 10U_0603_6.3V6M MIC1_R_L 2 1
1 MIC1_L <26>
470P_0402_50V8J 470P_0402_50V8J SPKR- 2 1 SPK_R2 1K_0402_5%
2 2 0_0603_5% RA45 2 1 +MIC1_VREFO_L
RA46 2.2K_0402_5%
Add CA5 and CA6 for EMI request on PVT

Add bypass caps for EMI request on PVT
SPK Conn. @ DA10 AZ5125-02S.R7G_SOT23-3
CA64 1 2 0.1U_0603_50V7K 2
Sense Pin Impedance Codec Signals Function CA63 1 2 0.1U_0603_50V7K @
1
3
place close to chip CA67 1 2 0.1U_0603_50V7K
39.2K PORT-I (PIN 32, 33) Headphone out CA61 1 2 0.1U_0603_50V7K @ JSPK
<26> MIC_SENSE 2 1 SENSE_A SPK_R1 1
RA32 20K_0402_1% CA66 1 1
2 0.1U_0603_50V7K SPK_R2 2 2
20K PORT-B (PIN 21, 22) Ext. MIC SPK_L1 3
CA62 1 3
SENSE A 2 0.1U_0603_50V7K SPK_L2 4 4
10K PORT-C (PIN 23, 24) 1 2 @ ACES_85204-0400N

4 CA77 1 4
<26> NBA_PLUG 2 0.1U_0603_50V7K 2 @
RA33 39.2K_0402_1% RA31 0_0603_5% 1
5.1K (PIN 48) @ 3
CA68 1 2 0.1U_0603_50V7K
DA11 AZ5125-02S.R7G_SOT23-3
39.2K PORT-E (PIN 14, 15) @
SENSE B 20K PORT-F (PIN 16, 17)

10K PORT-H (PIN 20) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
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A
4019IS
A B C D E
om
.c
ix
CardReader & Audio Conn.
f
se
Reserved for EHCI CRC errors
ro
R73 C290
w.
JCRIO @ 1 2 1 2
14 GND
ww
@ R3 13 300_0402_5% 10P_0402_50V8J
+3VS_CR GND @ @
+3VS 1 2 12 12
11 11
0_0603_5% USB20_N2_R 10
USB20_P2_R 10 USB20_N2 USB20_N2_R
9 9 <13> USB20_N2 1 2
8 RR67 0_0402_5%
HP_R 8 LR9 @
<25> HP_R 7 7
HP_L 6 1
<25> HP_L 6 1 2 2
5 5
MIC1_L 4
<25> MIC1_L 4
MIC1_R 3 4 3
<25> MIC1_R 3 4 3
MIC_SENSE 2
<25> MIC_SENSE 2
NBA_PLUG 1 WCM-2012-900T_0805
<25> NBA_PLUG 1 USB20_P2 1 2 USB20_P2_R
<13> USB20_P2
ACES_88058-120N RR66 0_0402_5%
Update JCRIO pin definition on DVT
TPM1.2 on board CT2

0.1U_0402_10V7K
CT4
0.1U_0402_10V7K
TPM9655@ TPM9655@
CT5
0.1U_0402_10V7K
TPM9655@ +3VS
1 2 TPM_XTALI 0.1U_0402_10V7K 0.1U_0402_10V7K +VSB_TPM RT12 2 1 0_0603_5% +3VS

CT1 22P_0402_50V8J TPM9655@
1
TPM9635@
2 2 2 RT13 2 RT10 2 1 0_0603_5% +3VALW
1
0_0603_5% TPM9635@
2
@ RT1 CT2 CT4 CT5 TPM9655@ CT8

YT1 10M_0402_5% TPM9635@ TPM9635@ TPM9635@ TPM9635@
2
1 1 1 +VDD_TPM 1 0.1U_0402_10V7K CT8
32.768KHZ_12.5P_1TJF125DP1A000D
TPM9635@ 0.1U_0402_10V7K
1
TPM9655@
+VSB_TPM
1 2 TPM_XTALO 0.1U_0402_10V7K
CT6 22P_0402_50V8J
TPM9635@
24
19
10
5
UT1
VSB
VDD
VDD
VDD
LPC_AD0 26
<12,27,28> LPC_AD0 LAD0
LPC_AD1 23
<12,27,28> LPC_AD1 LAD1
LPC_AD2 20
<12,27,28> LPC_AD2 LAD2
LPC_AD3 17 6 TPM_GPIO PAD @ T61
<12,27,28> LPC_AD3 LAD3 GPIO
LPC_FRAME# 22 2 TPM_GPIO2 PAD @ T62
<12,27,28> LPC_FRAME# LFRAME# GPIO2
<12,27,28> LPC_RST# LPC_RST# 16 Base I/O Address
LPC_PD# LRESET#
28 LPCPD#
0 = 02Eh
SERIRQ 27 1 =* 04Eh +3VS
<12,27> SERIRQ SERIRQ
<12> CLK_PCI_TPM_FCH 21 LCLK TPM9635@
1
@ 1 2 1 @ 2 SLB 9635 TT 1.2 0_0402_5%
+VSB_TPM 10P_0402_50V8J CT7 RT4 10_0402_5% 15 8 RT5 1 2 TPM9635@
RT11 1 CLKRUN# TEST1
2 0_0402_5% TESTB1/BADD 9 RT3
TPM9635@ 4.7K_0402_5%
1
2
PP
RT7 3
NC
2
@ 4.7K_0402_5% TPM_XTALO 14 12 TPM9655@
XTALO NC 0_0402_5% RT6
1
2
+3VS TPM_XTALI NC RT14 1 LPC_RST#

13 XTALI/32K IN 2 4.7K_0402_5%
@
1
GND
GND
GND
GND
1
1
RT8
RT2 TPM9635@ RT8 TPM9655@
TPM9635@ 0_0402_5% 0_0402_5% SLB 9635 TT 1.2_TSSOP28
25
18
11
4
4.7K_0402_5% TPM9635@
2
2
LPC_PD#

A
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4019IS
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+3VL +3VL
om
0.1U_0402_10V7K 0.1U_0402_10V7K 1000P_0402_50V7K CB3
.c
1 1 1 1 1 1 0.1U_0402_10V7K
CB1 CB2 CB5 CB7 1 2
0.1U_0402_10V7K
ix
For EMI CB4 CB6
2 2 2 2 2 2
111
125
f
0.1U_0402_10V7K 1000P_0402_50V7K
22
33
96
67
9
se
CLK_PCI_EC UB1
BATT_TEMPA 1 2
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_VDD0
1
CB9 100P_0402_50V8J
ro
RB3
10_0402_5% ACIN_D 1 2
@ GATEA20 1 21 WL_BT_LED# CB10 100P_0402_50V8J
w.
D <13> GATEA20 GATEA20/GPIO00 GPIO0F WL_BT_LED# <29> D

KB_RST# 2 23 EC_BEEP#
<13> KB_RST# EC_BEEP# <25>
2
SERIRQ KBRST#/GPIO01 BEEP#/GPIO10
1 <12,26> SERIRQ 3 SERIRQ GPIO12 26
ww
CB11 LPC_FRAME# 4 27
<12,26,28> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
22P_0402_50V8J LPC_AD3 5
<12,26,28> LPC_AD3 LPC_AD3
@ LPC_AD2 7 PWM Output
2 <12,26,28> LPC_AD2 LPC_AD2
LPC_AD1 8 63 BATT_TEMPA
<12,26,28> LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMPA <31>
LPC_AD0 10 LPC & MISC 64
<12,26,28> LPC_AD0 LPC_AD0 GPIO39
65 ADP_I
ADP_I/GPIO3A ADP_I <31,32> +3VS
CLK_PCI_EC 12 AD Input 66
<12,15> CLK_PCI_EC CLK_PCI_EC GPIO3B
LPC_RST# 13 75
<12,26,28> LPC_RST# PCIRST#/GPIO05 GPIO42
EC_RST# 37 76 EC_ENBKL EC_SMB_CK3 1 2
+3VL EC_RST# IMON/GPIO43 EC_ENBKL <17>
RB2 EC_SCI# 20 RB37 2.2K_0402_5%
<13> EC_SCI# EC_SCII#/GPIO0E
47K_0402_5% WLAN_PWR# 38 EC_SMB_DA3 1 2
<22> WLAN_PWR# GPIO1D
1 2 EC_RST# 68 RB38 2.2K_0402_5%
DAC_BRIG/GPIO3C EN_DFAN1
Add WLAN_PWR# on DVT EN_DFAN1/GPIO3D 70 EN_DFAN1 <5>
1 2 DA Output IREF/GPIO3E 71
CB12 0.1U_0402_10V7K KSI0 55 72
KSI1 KSI0/GPIO30 CHGVADJ/GPIO3F +3VL
56 KSI1/GPIO31
KSI2 57
KSI3 KSI2/GPIO32 EC_MUTE#
58 KSI3/GPIO33 EC_MUTE#/GPIO4A 83 EC_MUTE# <25>
KSI4 59 84 USB_EN# LID_SW# 1 2
KSI4/GPIO34 USB_EN#/GPIO4B USB_EN# <21,24>
KSI5 60 85 EC_SMB_CK3 RB35 47K_0402_5%
KSI5/GPIO35 CAP_INT#/GPIO4C EC_SMB_CK3 <17>
KSI6 61 PS2 Interface 86 EC_SMB_DA3
KSI6/GPIO36 EAPD/GPIO4D EC_SMB_DA3 <17>
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <29>
KSO0 39 88 TP_DATA +5VS
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <29>
KSO1 40
KSO2 KSO1/GPIO21 TP_CLK
41 KSO2/GPIO22 1 2
KSO3 42 97 VGATE RB8 4.7K_0402_5%
KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 VGATE <37>
KSO4 43 98 WOL_EN#
KSO4/GPIO24 WOL_EN/GPXIOA01 WOL_EN# <23>
KSO5 TP_DATA
KSO6
44 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 99
VCIN0_PH VCIN0_PH connect to
1
RB9
2
4.7K_0402_5%
45 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 109 VCIN0_PH <31>
KSO7 46 SPI Device Interface power portion (9012 only)
C KSO8 KSO7/GPIO27 C
47 KSO8/GPIO28
KSO9 48 119 SYSON 1 2
KSI[0..7] KSO10 KSO9/GPIO29 SPIDI/GPIO5B RB10 4.7K_0402_5%
<28> KSI[0..7] 49 KSO10/GPIO2A SPIDO/GPIO5C 120
KSO11 50 SPI Flash ROM 126
KSO[0..15] KSO12 KSO11/GPIO2B SPICLK/GPIO58
<28> KSO[0..15] 51 KSO12/GPIO2C SPICS#/GPIO5A 128
KSO13 52
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73
KSO15/GPIO2F ENBKL/GPIO40
81 KSO16/GPIO48 PECI_KB930/GPIO41 74
RP7 82 89
EC_SMB_CK1 KSO17/GPIO49 FSTCHG/GPIO50 BATT_FULL_LED#
+3VL 1 8 BATT_CHG_LED#/GPIO52 90 BATT_FULL_LED# <29>
2 7 EC_SMB_DA1 91 WLAN_RST# Add WLAN_RST# on DVT
CAPS_LED#/GPIO53 WLAN_RST# <22>
+3VL 3 6 EC_SMB_CK2 EC_SMB_CK1 77 GPIO 92
<31,32> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54
4 5 EC_SMB_DA2 EC_SMB_DA1 78 93 BATT_CHG_LOW_LED#
<31,32> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_CHG_LOW_LED# <29>
EC_SMB_CK2 79 SM Bus 95 SYSON
<9> EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <30,34>
2.2K_0804_8P4R_5% EC_SMB_DA2 80 121 VR_ON
<9> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <30,36,37>
PM_SLP_S4#/GPIO59 127
VCOUT0_PH_L 1 @ 2 VS_ON <33>

SLP_S3# 6 100 EC_RSMRST# RB34 0_0402_5%
<13> SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <13>
SLP_S5# 14 101 EC_LID_OUT# VCOUT0_PH connect to power portion (9012 only)
<13> SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <13>
EC_SMI# 15 102 PROCHOT_IN
<13> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 PROCHOT_IN <31>
16 103 H_PROCHOT_EC
GPIO0A H_PROCHOT#_EC/GPXIOA06 VCOUT0_PH_L
17 GPIO0B VCOUT0_PH/GPXIOA07 104
USB_CHG_EN# 18 GPO 105 BKOFF#
<24> USB_CHG_EN# GPIO0C BKOFF#/GPXIOA08 BKOFF# <18>
BT_ON 19 GPIO 106 PBTN_OUT# RB18
<22> BT_ON GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <13>
25 107 FCH_PWR_EN 330K_0402_5%
EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 FCH_PWR_EN <30,35>
FAN_SPEED1 28 108 2 1 +3VL
<5> FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
WL_OFF# 29
<22> WL_OFF# EC_PME#/GPIO15
E51_TXD 30
<22> E51_TXD EC_TX/GPIO16
E51_RXD 31 110 ACIN_D ACIN_D 2 1
<22> E51_RXD EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN <32>
FCH_PWRGD 32 112 EC_ON_R RB751V40_SC76-2 DB1
B <13> FCH_PWRGD PCH_PWROK/GPIO18 EC_ON/GPXIOD02 B
PWR_SUSP_LED# 34 114 ON/OFFBTN#
<29> PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFFBTN# <21,29>
36 GPI 115 LID_SW#
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <29>
116 SUSP#
SUSP#/GPXIOD05 SUSP# <30,34>
GPXIOD06 117
PECI_KB9012/GPXIOD07 118
AGND/AGND
T14 122 SUSP# 1 2

@ XCLKO XCLKI/GPIO5D +EC_V18R RB21 10K_0402_5%
GND/GND
GND/GND
GND/GND
GND/GND
<12,15> RTC_CLK 1 2 123 XCLKO/GPIO5E V18R 124

@ RB20 0_0402_5% 1
GND0
1 2 LPC_RST# VR_ON 1 2
CB13 1U_0402_6.3V6K CB15 RB23 10K_0402_5%
1
1 4.7U_0805_10V4Z
@ RB22 CB16 KB9012QF-A3_LQFP128_14X14 2
11
24
35
94
113
69
1 2 SUSP# 100K_0402_5% 20P_0402_50V8

CB14 180P_0402_50V8J
2
2
Close to EC
H_PROCHOT# <7,37>
1
Low Active (+1.5V)
RB27 Voltage Comparator Pins FOR 9012 A3 RB36 D
100K_0402_5% EC_ON_R 1 2 H_PROCHOT_EC 2
EC_ON <33>
1 2 E51_TXD G Q34
VCIN0 pin109 2.2K_0402_5% High Active 2N7002K_SOT23-3
>1.2V <1.2V 1 S
VCIN1 pin102
3
1U_0402_6.3V6K
CB50
VCOUT0 pin104 2
HIGH LOW
A +3VS A
VCOUT1 pin103 LOW HIGH
H_PROCHOT_EC 1 @ 2
RB6 10K_0402_5%
For KB9012 EC_ON low pulse work around

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A
4019IS
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1 2 3 4 5 6 7 8
om
LPC Debug Port
.c
fix
se
JDB @
1
ro
1 +3VS
2 2
3 LPC_RST# <12,26,27>
w.
3 CLK_PCI_DDR
A
4 4 CLK_PCI_DDR <12,15> A
5 5 LPC_FRAME# <12,26,27>
ww
6 6 LPC_AD3 <12,26,27>
7 7 LPC_AD2 <12,26,27>
8 8 LPC_AD1 <12,26,27>
9 9 LPC_AD0 <12,26,27>
10 10
GND 11
GND 12
E-T_3801K-F10N-01L C457 R393
1 2 1 2 CLK_PCI_DDR
22P_0402_50V8J 22_0402_5%
@ @
For EMI
B For EMI B
KEYBOARD CONN. Close to JKB

KSO2 1 2
C404 100P_0402_50V8J
KSO1 1 2
C405 100P_0402_50V8J
KSI[0..7] KSO0 1 2
KSI[0..7] <27>
C406 100P_0402_50V8J
KSO[0..15] KSO4 1 2
KSO[0..15] <27>
C407 100P_0402_50V8J
KSO3 1 2
C408 100P_0402_50V8J
KSO5 1 2
C409 100P_0402_50V8J
KSO14 1 2
C410 100P_0402_50V8J
KSO6 1 2
JKB @ C411 100P_0402_50V8J
1 KSO7 1 2
1 KSO15 C412 100P_0402_50V8J
2 2
3 KSO14 KSO13 1 2
3 KSO13 C413 100P_0402_50V8J
4 4
5 KSO12 KSO8 1 2
5 KSO11 C415 100P_0402_50V8J
6 6
7 KSO10 KSO9 1 2
7 KSO9 C416 100P_0402_50V8J
8 8
9 KSO8 KSO10 1 2
C 9 KSO7 C417 100P_0402_50V8J C
10 10
11 KSI7 KSO11 1 2
11 KSI6 C418 100P_0402_50V8J
12 12
13 KSO6 KSO12 1 2
13 KSI5 C419 100P_0402_50V8J
14 14
15 KSO5 KSO15 1 2
15 KSI4 C420 100P_0402_50V8J
16 16
17 KSI3 KSI7 1 2
17 KSI2 C421 100P_0402_50V8J
18 18
19 KSI1 KSI2 1 2
19 KSO4 C422 100P_0402_50V8J
20 20
21 KSI0 KSI3 1 2
21 KSO3 C423 100P_0402_50V8J
22 22
23 KSO2 KSI4 1 2
23 KSO1 C424 100P_0402_50V8J
26 GND 24 24
27 25 KSO0 KSI0 1 2
GND 25 C425 100P_0402_50V8J
ACES_50524-02501-001 KSI5 1 2
C427 100P_0402_50V8J
KSI6 1 2
C429 100P_0402_50V8J
KSI1 1 2
C431 100P_0402_50V8J
D D

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A
4019IS
1 2 3 4 5 6 7 8
5 4 3 2 1
om
.c
ix
For debug
f
se
+3VL
SW5
1 2
ro
2
Place on TOP 3 4 R397
Screw Hole
G
G
w.
D NTC017-DA1J-D160T_4P 100K_0402_5% D
6
5
1
ww
ON/OFFBTN#
ON/OFFBTN# <21,27>
1
C473
For debug 0.1U_0402_25V6 CPU VGA FCH
@
2 H1 H2 H3 H4 H5 H8
SW4 H_4P2 H_4P6 H_4P2x4P6 H_3P5 H_3P0 H_3P0
1 2 @ @ @ @ @ @
1
Place on BOT 3 4 For EMI request
G
G
NTC017-DA1J-D160T_4P
6
5
PTH
H7 H10 H11 H12 H13 H14 H15 H17

H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
@ @ @ @ @ @ @ @
1
C C
H18
Touchpad Connector H_3P0
@
NPTH
1
H9 H16 H20 H21
H_3P0x4P0N H_3P0N H_3P0N H_3P0N
Change JTP symbol to @ @ @ @
1
SP01001BF10 on DVT
+3VL +5VS +5VALW
JTP @
1 1
2 2
TP_CLK 3
<27> TP_CLK 3
TP_DATA 4
<27> TP_DATA 4
5 D89 @
LID_SW# 5 TP_DATA
<27> LID_SW# 6 6 2
BATT_FULL_LED# 7 1
<27> BATT_FULL_LED# 7
BATT_CHG_LOW_LED# 8 TP_CLK 3
<27> BATT_CHG_LOW_LED# 8
PWR_SUSP_LED# 9
<27> PWR_SUSP_LED# 9
HDD_LED# 10 YSDA0502C_SOT23-3
WL_BT_LED# 10
<27> WL_BT_LED# 11 11 G1 13
12 12 G2 14 Place close to JTP
ACES_50504-0120N-001
PCB Fedical Mark PAD
FD1 FD2 FD3 FD4
B @ @ @ @ B
1
ISPD U1 HUDM3R1@ ZZZ
SA000043IN0 DA60000T800
HDD LED
218-0755097 A14 HUDSON-M3 PCB LA-8864P
SATA_LED# <14>
PJP1 45@
2
U1 HUDM3UNBW@
R404
2 1 6 1
+3VS
10K_0402_5% SA000043IO0
5
Q9A
A 2N7002KDWH_SOT363-6 CONN SET 0CL DCJACK-MB 322215-3 A
HDD_LED# 3 4 218-0755097 A14 HUDSON-M3
Q9B
2N7002KDWH_SOT363-6
1 @ 2
R50 0_0402_5%
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4019IS
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Change +1.5VS MOS
om
+3VALW TO +3VS +5VALW TO +5VS +1.5V to +1.5VS to Smaller Current ?
.c
Vgs=10V,Id=9A,Rds=18.5mohm
+3VALW +3VS Vgs=10V,Id=9A,Rds=18.5mohm +5VALW +5VS +1.5V +1.5VS
ix
4.7U_0805_10V4Z 4.7U_0805_10V4Z +5VS Vgs=10V,Id=9A,Rds=18.5mohm 4.7U_0805_10V4Z
1 1 1 1 1 1
f Q29 C459 C460 Q30 C461 C462 Q31 C463 C464

se
470_0805_5%
470_0805_5%
470_0805_5%
8 D S 1 8 D S 1 For EMI 8 D S 1
2
7 2 7 2 1U_0402_6.3V6K 7 2
D S 2 2 R406 D S 2 2 R407 D S 2 2 R408
0.1U_0402_16V4Z
0.1U_0402_16V4Z
6 3 6 3 6 3
ro
D S D S D S
5 D G 4 5 D G 4 2 2 5 D G 4
1U_0402_6.3V6K C822 C821 1U_0402_6.3V6K
1 SI4800BDY_SO8 1 R409 2 SI4800BDY_SO8 1 R410 2 SI4800BDY_SO8 1 R411 2 1
w.
+VSB +VSB +VSB
3 1
3 1
3 1
120K_0402_5%
0.01U_0402_25V7K
200K_0402_5% @ @ 220K_0402_5%
0.022U_0402_25V7K
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1 1 1 1 1
6
C466 1 1
0.1U_0402_25V6
C465 R412 Q10A Q10B C467 C468 R413 Q11A Q11B C469 C470 R414 Q12A Q12B
ww
820K_0402_5% 820K_0402_5% 820K_0402_5%

2 2 SUSP 2 2 @ SUSP 2 2 SUSP
2 5 2 5 2 5
2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6
2
2
2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6
4
+5VALW +1.5V +1.2VS
+5VALW
2
+0.75VS
R5545 R478 +5VALW R479 +5VALW
2
10K_0402_5% 470_0805_5% 470_0805_5%
2
R422
2
R477 100K_0402_5%
3 1
3 1
<15> FCH_PWR_EN# FCH_PWR_EN# R432 R448 470_0805_5%
100K_0402_5% 100K_0402_5%
1
Q22B Q13B SUSP
1
3
6
Q25B 2N7002KDWH_SOT363-6 5 SYSON# 2N7002KDWH_SOT363-6 5 VR_ON#
3
Q6A
6
2 5 2N7002KDWH_SOT363-6 Q6B 2
<27,35> FCH_PWR_EN
4
Q22A Q13A SUSP# 2 2N7002KDWH_SOT363-6
<27,34> SUSP#
1
5 SUSP
4
Q25A in page9 2 2N7002KDWH_SOT363-6 2 2N7002KDWH_SOT363-6

<27,34> SYSON <27,36,37> VR_ON
1
R5529 2N7002KDWH_SOT363-6
4
100K_0402_5%
1
2
+5VS_ODD
+5VS TO +5VS_ODD
+1.1VALW to +1.1VS +1.1VS
2
R457
470_0805_5%
2
3 R417 3
3 1
+1.1VALW +1.1VS 470_0805_5%
Vgs=10V,Id=14.5A,Rds=6mohm 4.7U_0805_10V4Z Q53B

3 1
1 1
Q44 C476 C472 5 ODD_PWR# +5VS
8 1 Q23B 2N7002KDWH_SOT363-6
D S
7 2
4
D S 2 2 SUSP 2N7002KDWH_SOT363-6 +5VALW
6 D S 3 5
5 D G 4
1U_0402_6.3V6K 2
4
2
FDS6676AS_SO8 1 R415 2 +VSB C471 Vgs=-4.5V,Id=3A,Rds<97mohm
220K_0402_5% R441 0.1U_0402_16V7K
4.7U_0805_10V4Z
1 1
1
6
0.1U_0402_25V6
100K_0402_5%
2
C474 C477 R416 Q23A 1
3
S
820K_0402_5% R440 Q45 PJ28
2
1
2 2 SUSP ODD_PWR# 1
G
2 1 2 2 2 JUMP_43X79
2N7002KDWH_SOT363-6 R385 0_0402_5% @
2
+5VS_ODD
1
2 47K_0402_5% 2
D
1
1
C200 AO3413_SOT23
1
6
0.1U_0402_16V4Z C217
@ Q53A 0.01U_0402_25V7K
1 1
1
Need to delay after 2 2N7002KDWH_SOT363-6 1
<14> ODD_PWR
C680
+3VS ramp up C679 1U_0402_6.3V6K
1
4.7U_0805_10V4Z 2
@ 2
4 4

A
4019IS
A B C D E
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A B C D
om
PL1
PH1 under CPU botten side :
.c
HCB2012KF-121T50_0805
1 2 VIN CPU thermal protection at 93 +-3 degree C Please locate these parts
Near EC chip
ix
PL2
HCB2012KF-121T50_0805 Recovery at 56 +-3 degree C
f
ADPIN 1 2
se
@ PJP1
+3VL
ro
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
+ 1
100P_0402_50V8J
1
1
2 <27,32> ADP_I
w.
1
+ 1
PC1
PC2
PC3
PC4
12.1K_0402_1%
2
1
1K_0402_1%
3
2
-
ww
PR4
PR1
- 4
SINGA_2DW-0005-B03
2
PR2 PR5
0_0402_5% 0_0402_5%
100K_0402_1%_TSM0B104F4251RZ
<27> PROCHOT_IN 1 2 <27> VCIN0_PH 1 2
1
20K_0402_1%
PR3
PH1
1
2
PL3
HCB2012KF-121T50_0805
1 2
VMB
@ PJP2 PL4
1 HCB2012KF-121T50_0805
1
2 2 1 2 BATT+
3 EC_SMCA
3 EC_SMDA
4 4
0.01U_0402_25V7K
5 TS_A
5
10U_0805_25V6K
6 6
PJSOT24CW_SOT323-3
+VSBP
2
7 3 1
7 B+
1
1
PC6
PC7
0.22U_0603_25V7K
0.1U_0603_25V7K
CCM_C250137GR007M262ZR PC5
100K_0402_1%
PD1
1000P_0402_50V7K
2
PC9
1
PR6
@
PC8
2
2
VL
2
PQ1
2
@PD2
@ PD2 PR7 TP0610K-T1-E3_SOT23-3
PJSOT24CW_SOT323-3 22K_0402_1%
2 1 2 VSB_N_001
1VSB_N_003
1
3 PR8
100K_0402_1%
1 2 PR9
EC_SMB_CK1 <27,32>
1
PR10 100_0402_1% 0_0402_5% D
<33,35> POK 1 2VSB_N_002 2 PQ2

1 2 G SSM3K7002FU_SC70-3
EC_SMB_DA1 <27,32>
.1U_0402_16V7K
PR11 100_0402_1% S
3
1
PC10
PJP3
1 2 +3VL +VSBP 2 1 +VSB
PR12 100K_0402_1%
2
PAD-OPEN 2x2m
BATT_TEMPA <27>
3 3
RTC Battery
- PBJ1 + PR14
560_0603_5%
PR15
560_0603_5%
2 1 1 2 1 2 +RTCBATT
@ MAXEL_ML1220T10
SP093MX0000
4 4

www.vinafix.vn
Size
Document Number Rev
A
4019IS
A B C D
A B C D
for reverse input protection
om
.c
ix
1
PQ209 D
2
f
G SI1304BDL-T1-E3_SC70-3
se
S
1U_0603_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
1U_0603_25V6K
PR225 PR226
ro
1 2 1 2
PC218
PC217
1
PC207
PC208
1
1M_0402_5% 3M_0402_5%
w.
1 1
2
2
ww
VIN PQ203 P1 PQ205 P2 B+ CHG_B+ PQ207

TPCA8057-H_PPAK56-8-5 DMG4406LSS_SO8 PR211 1UH_NRS4018T1R0NDGJ_3.2A_30% DMG4406LSS_SO8
0.01_1206_1%
1 1 8 1 4 1 2 8 1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2 2 7 7 2
PL201
0.1U_0402_25V6
5 3 3 6 2 3 6 3
0.1U_0402_25V6
5 5
2200P_0402_50V7K
PC216
1
1
0_0402_5%
PC211
PC212
PC213
PC214
PC215
0.01U_0402_50V7K
@ PR231
1
VIN
0_0402_5%
PC231
PR232
4
PC234
2
2
@ @ @
PC230
2
1
2
3
2
@
0.1U_0402_25V6
2
PD230
2
BQ24725_ACDRV_1 BAS40CW_SOT323-3
1
BQ24725_BATDRV 1 2BQ24725_BATDRV_1
PC235
0.047U_0402_25V7K PR233
1 1
10_1206_1%
1 2 4.12K_0603_1%
PC237
PR228
PC236 1 2
0.1U_0402_25V6
5
2.2_0603_5%
PR229
PD231
BQ24725_VCC
2
0.1U_0603_25V7K
RB751V-40_SOD323-2
PQ201
1
PC238
AON7408L
BQ24725_BST 2
BQ24725_REGN2
DH_CHG 4
4.12K_0603_1%
4.12K_0603_1%
2
PC239 2
BQ24725_LX
2
1
1 2 BATT+
PR234
PR235
DH_CHG
PL202
1U_0603_25V6K PC205 4.7UH_ETQP3W4R7WFN_5.5A_20% PR222
3
2
1
0.02_1206_1%
BQ24725_ACP
BQ24725_ACN
1 2
BQ24725_LX 1 2 CHG 1 4
2
1U_0603_25V6K
5
20
19
18
17
16
2 3
PU200
2200P_0402_50V7K
0.01U_0402_50V7K
CSON1
CSOP1
1
680P_0402_50V7K 4.7_1206_5%
BTST
VCC
PHASE
HIDRV
REGN
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PR206
21
FDMC7692S_MLP8-5
0.1U_0402_25V6
0.1U_0402_25V6
PAD
PQ202
PC224
PC225
PC221
PC222
PC223
1
1
1 15 DL_CHG 4
ACN LODRV
PC240
PC241
2
2
2 14 @
ACP GND PR236
3
2
1
2
1
BQ24725RGRR_VQFN20_3P5X3P5 10_0603_1%
PC206
BQ24725_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR237
2
6.8_0603_5%
BQ24725_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN
+3VALW 1 2 BQ24725_ACOK 5 ACOK BATDRV 11 BQ24725_BATDRV PC242

@PR238
@ PR238 10K_0402_1% 0.1U_0603_16V7K
ACDET
IOUT
SDA
ILIM
SCL
1 2 +3VALW
+3VL
6
10
PR239 10K_0402_1%
3
PR241 3
BQ24725_ILIM 1 2
0.01U_0402_25V7K
1 2
<27> ACIN
100K_0402_1%
PR240 10K_0402_1% 150K_0402_1%
PC243
PR242
1
BQ24725_ACDET
VIN 1 2
2
154K_0402_1%
PR243
2
1
270K_0402_1%
PR244
2
Vin Dectector
100P_0402_50V8J
0.1U_0402_25V6
66.5K_0402_1%
EC_SMB_CK1 <27,31>
1
Min. Typ Max.

1
2
1
100_0402_5%
PR245
PC246
PC244
PR246
H-->L 17.23V
EC_SMB_DA1 <27,31>
2
L--> H 17.63V
2
PC245
ILIM and external DPM 2 1 ADP_I <27,31>
100P_0402_50V8J
3.97A
Please locate the RC
4
Near EC chip 4
2011-02-22

www.vinafix.vn
Size
Document Number Rev
A
4019IS
A B C D
A B C D E
om
.c
ix
2VREF_8205
f
se
1
ro
PC333
1U_0603_16V6K
2
w.
1 1
ww
PR330 PR350
13.7K_0402_1% 30K_0402_1%
1 2 1 2
PR331 PR351
B+ 3/5V_B+
20K_0402_1% 20K_0402_1%
3/5V_B+
PL331 1 2 FB_3V FB_5V 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
PR337 PR357
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
4.7U_0805_25V6-K
0.1U_0402_25V6
0.1U_0402_25V6
120K_0402_1% 120K_0402_1%
1 2 1 2
1
1
PC338
PC339
PC340
PC353
PC354
PC358
6
1
PU330
2
5
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
PC341
4 10U_0805_6.3V6M 25
PQ331 P PAD
2
AON7408L
7 24 4 PQ351
VO2 VO1 AON7408L
1
2
3
PC335 8 23 PR355 PC355
0.1U_0402_10V7K PR333 VREG3 PGOOD 2.2_0402_5% 0.1U_0402_10V7K
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2
3
2
1
2 2.2_0402_5% BOOT2 BOOT1 2
PL332 UG_3V 10 21 UG_5V PL352
4.7UH_ETQP3W4R7WFN_5.5A_20% UGATE2 UGATE1 2.2UH_ETQP3W2R2WFN_8.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
5
5
LG_3V 12 19 LG_5V
LGATE2 LGATE1
SKIPSEL
1
1
4.7_1206_5%
4.7_1206_5%
220U_6.3V_M
220U_D2_4VY_R15M
VREG5
PR336
PR356
1 1
GND
VIN
NC
EN
PC331
PC351
4 4 +
POK <31,35>
PR334
1 SNUB_3V 2
13
14
15
16
17
18
SNUB_5V 2
499K_0402_1% RT8205LZQW(2)_WQFN24_4X4
2 PQ352 2
3/5V_B+ 1 2
PQ332 FDMC7692S_MLP8-5
1
2
3
3
2
1
680P_0402_50V7K
FDMC7692S_MLP8-5
1
680P_0402_50V7K
1
PC336
PC356
PR338 PC342 VL
100K_0402_1% 1U_0603_10V6K
2
2
1
PC359
4.7U_0805_10V6K
2
3/5V_B+
1
ENTRIP1
ENTRIP2
2VREF_8205
PC360
2
0.1U_0603_25V7K
3 3
6
D D
PQ333A 2N_3_5V_001 5 PQ333B
SSM6N7002FU_US6 G G SSM6N7002FU_US6
S S
1
PR339 PJP333
100K_0402_5% PJP352
+3VLP 2 1 +3VL
PR340 1 2 1 2 (7A,280mils ,Via NO.= 14)
2.2K_0402_1% VL +5VALWP +5VALW
PAD-OPEN 2x2m
1
1 2 PAD-OPEN 4x4m
<27> EC_ON PQ334
DRC5115E0L_SOD323-3 PJP332
PR341
0_0402_5%
+3VALWP 1 2 +3VALW (5A,200mils ,Via NO.= 10)
1 2 2
<27> VS_ON PAD-OPEN 4x4m
4.7U_0805_25V6-K
1
PC343
3
2
4 4

www.vinafix.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019IS A
A B C D E
5 4 3 2 1
om
.c
ix
0.75Volt +/- 5%
f
se
TDC 0.7A
Peak Current 1A
ro
PL151
HCB1608KF-121T30_0603
B+
w.
D 1 2 1.5V_B+ D
PR155
+1.5V
ww
BST_1.5V 1 2 BOOT_1.5V
2.2_0402_5%
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
4.7U_0805_25V6-K
DH_1.5V +0.75VSP
0.22U_0402_10V6K
PC153
PC154
PC157
PC158
PC155
10U_0805_6.3V6K
10U_0805_6.3V6K
10U_0805_6.3V6K
SW_1.5V
1
PC260
PC261
PC262
@
1
5
DL_1.5V
16
17
18
19
20
PU150
2
PHASE
UGATE
BOOT
VTT
VLDOIN
21 @
PAD
4 15 LGATE VTTGND 1
PQ151 PR152 14 2
PL152 AON7408L 20K_0402_1% PGND VTTSNS
1
2
3
1UH_VMPI0703AR-1R0M-Z01_11A_20% 1 2CS_1.5V
2 1 13 3
+1.5VP PC159 CS RT8207MZQW_WQFN20_3X3 GND
5
1U_0603_10V6K
1 2 12 4 VTTREF_1.5V
PR157 VDDP VTTREF
1
5.1_0603_5%
330U_D2_2V_Y
1
C
+
1 2 VDD_1.5V 11 VDD VDDQ 5 +1.5VP C
PC152
PGOOD
PR156 4
1
4.7_1206_5%
TON
PQ152 +5VALW PC161
FB
S5
S3
SNUB_+1.5VP 2
1
2 FDMC7692S_MLP8-5 0.033U_0402_16V7K
2
PC160
1
2
3
10
6
1U_0603_10V6K
+5VALW
2
PR154
10.2K_0402_1%
FB_1.5V 2 1 +1.5VP
TON_1.5V
1
PC156
680P_0402_50V7K
2
Mode Level +0.75VSP VTTREF_1.5V
2
PR158
S5 L off off
1
887K_0402_1% PR160 PC162
S3 L off on PR159 1.5V_B+ 1 2 10K_0402_1% .1U_0402_16V7K
S0 H on on 0_0402_5%
2
1 2 EN_1.5V
<27,30> SYSON
1
Note: S3 - sleep ; S5 - power off
EN_0.75VSP
1 @ PC163
0.1U_0402_10V7K
B B
2
PR162
0_0402_5%
PJP152
2 1
1 2 <27,30> SUSP#
PAD-OPEN 4x4m
1
PJP153
1 2 (12A,480mils ,Via NO.= 24) @ PC164
+1.5VP +1.5V 0.1U_0402_10V7K
2
PAD-OPEN 4x4m
PJP76
+0.75VSP
1 2
+0.75VS (1A,40mils ,Via NO.= 3)
PAD-OPEN 3x3m
A A
Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2010/07/20 Deciphered Date 2012/12/31
www.vinafix.vn
Custom A
4019IS
5 4 3 2 1
5 4 3 2 1
om
.c
ix
1.1valwp
Peak Current 4A
f
680P_0402_50V7K
current limited 6A
se
2
PC116
ro
1 SNUB_+1.1VALWP
w.
D D
ww
4.7_1206_5%
2
PR116
PU110
PL111 SY8036LDBC_DFN10_3x3 PL112
1
4
HCB1608KF-121T30_0603 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2 1.1VALWP_B+ 10 2 1 2
+5VALW
PG
PVIN LX +1.1VALWP
9 PVIN LX 3
2
10K_0402_1%
220P_0402_25V8K
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
68P_0402_50V8J
8 SVIN
2200P_0402_50V7K
100P_0402_25V8K
220P_0402_25V8K
68P_0402_50V8J
22P_0402_50V8J
22U_0805_6.3V6M
22U_0805_6.3V6M
PR108
@ PC117
@ PC118
PR106
1
@ PC106
@ PC107
@ PC108
0_0402_5% 6
<27,30> FCH_PWR_EN FB
1
PC104
PC112
PC113
PC114
PC115
1 2 EN_1.1VALWP
5 EN
PC109
PC110
PC111
SS
TP
LX
2
2
1
@PC119
@ PC119
11
2
12K_0402_1%
0.1U_0402_10V7K
2
@
PR109
PR107
0_0402_5%
<31,33> POK 1 2
1
C C
PJP112
+1.1VALWP 1 2 +1.1VALW
PAD-OPEN 4x4m
(4A,240mils ,Via NO.= 8)
B B
A A

Issued Date 2011/07/29 Deciphered Date Title
www.vinafix.vn
A
4019IS
5 4 3 2 1
5 4 3 2 1
om
PL121
HCB1608KF-121T30_0603
.c
+1.2VSP_B+ 2 1
B+
ix
f
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
se
0.1U_0402_25V6
1
1
PC121
PC124
PC120
PC123
ro
2
5
w.
D D
ww
PR125
2.2_0603_5% PC125 PQ121
4
1 2 1 2 AON7408L
PU120 0.1U_0603_25V7K
1 10 BST_+1.2VSP
3
2
1
PGOOD VBST
PR127
1 2 TRIP_+1.2VSP 2 TRIP DRVH 9 UG_+1.2VSP PL122
105K_0402_1% 2.2UH_ETQP3W2R2WFN_8.5A_20%
<27,30,37> VR_ON PR120 EN_+1.2VSP 3 8 SW_+1.2VSP 1 2
0_0402_5% EN SW
+1.2VSP
1 2 FB_+1.2VSP 4 7 +1.2VSP_5V
VFB V5IN
+5VALW
2
47K_0402_1%
0.1U_0402_16V7K
RF_+1.2VSP 5 6 LG_+1.2VSP
TST DRVL
1
1
PR121
PQ122 1
1
@ PC127
330U_D2_2.5VY_R15M
TP 11
+
PC122
FDMC7692S_MLP8-5
PC128 PR126
2
1
TPS51212DSCR_SON10_3X3 1U_0603_6.3V6M 4.7_1206_5%
1
2
@ PR129 2
4
470K_0402_1% Ipeak=8.5A
1
PC126
Imax=5.95A
2
1000P_0603_50V7K
3
2
1
2
F=290K
C @ @ C
PC129 PR130
2 1 2 1
PJP122 +1.2VS
PR131 1000P_0402_50V7K 1.2K_0402_1% +1.2VSP 2 2 1 1
7.15K_0402_1% @ JUMP_43X118
2 1
(8.5A,340mils ,Via NO.=17)
+1.2VSP
Iocp=9.17A
2
PR132
10K_0402_1%
1
B B
PU25
APL5508-25DC-TRL_SOT89-3
+3VS PJP252
2 IN OUT 3 +2.5VSP
+2.5VSP 2 1 +2.5VS
2 1
1
GND @ JUMP_43X39
4.7U_0805_6.3V6K
1
1
PC251
@ PR250 (0.75A,40mils ,Via NO.=22)
PC250 1 10K_1206_5%
1U_0603_10V6K
2
2
A A

www.vinafix.vn
A
4019IS
5 4 3 2 1
5 4 3 2 1
om
.c
ix
PC501 PR527
330P_0402_50V7K 2K_0402_1%
2 1 2 1
f <7> APU_VDDNB_SEN
PR528 PR529 PC527 @ PR530
se
2.8K_0402_1% 137K_0402_1%390P_0402_50V7K 32.4K_0402_1%
2 1 2 1 2 1 2 1
PL501
ro
CPU_B+
PR500 PR531 PC528 PR532 PC529 HCB2012KF-121T50_0805
10U_0805_25V6K
10_0402_5% 0_0402_5% 1000P_0402_50V7K 301_0402_1% 100P_0402_50V8J 1 2
w.
D B+ D
560P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
2 1 2 1 2 1 2 1 2 1 PL502
+APU_CORE_NB
100U_25V_M
68P_0402_50V8J
100U_25V_M
100U_25V_M
1 1 1 HCB2012KF-121T50_0805
0.1U_0402_25V6
5
@PC531
TPCA8065-H_SOP-ADV8-5
1 2
1
ww
PC532
1
PC570
PC533
PC534
PC537
PC530
PC536
VSUMP_NB + + +
PC535
PC569
1000P_0402_50V7K
2.61K_0402_1%
10K_0402_5%_ERTJ0ER103J
1
PQ501
2 1
2
2 2 2
PR533
0.047U_0402_16V7-K
0.1U_0402_25V6
UGATE_NB1 4
2
11K_0402_1%
2
PR534
12
PC538
PC539
PH2
PL503
1
3
2
1
1
PR535 0.36UH_MMD10DZR36MS1_24A_20%
634_0402_1% PHASE_NB1 1 4
+APU_CORE_NB
2
VSUMN_NB 2 1 FCCM_NB
1
PC505
0_0603_5%
2 3
PR536
1
1
@ PR537 @ PC541 PR505 0.22U_0603_25V7K
PC540 100_0402_1% 220P_0402_50V7K BOOT_NB1 2 1 2 1 PQ502 PR506 PR538
0.1U_0603_50V7K 2 1 2 1 LGATE_NB1 TPCA8057-H_PPAK56-8-5 4.7_1206_5% 3.65K_0402_1%
2
PR539 @ 0_0603_5% VSUMP_NB 2 1
2
2 1 PHASE_NB1
1 2
10K_0402_1% LGATE_NB1 4 PR540
UGATE_NB1 1_0402_1%
After rev1.1 must change to 133k VSUMN_NB 2 1
APU_CORE_NB
PC506
TDC 25A
2
680P_0603_50V7K
48
47
46
45
44
43
42
41
40
39
38
37
3
2
1
2
PU500 Peak Current 33A

2
PR541
ISUMP_NB
ISEN1_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
FCCM_NB
PWM2_NB
LGATEX
PHASEX
UGATEX
127K_0402_1% PC542 PR542 OCP current 40A
1000P_0402_25V6K 10_0402_5% CPU_B+
Load line -4mV/A
1
+5VS 2 1 1 36 BOOT_NB1
1
PR543 27.4K_0402_1% ISEN2_NB BOOTX PR544

2 1 2 35 2 1
FSW=300kHz
NTC_NB VIN
PH3 BOOT2 0_0603_5%
DCR 1.1mohm +/-5%
3 IMON_NB BOOT2 34
1
470K_0402_5%_TSM0B474J4702RE PR545 0_0402_5% TYP MAX
C 2 1
<7,27> H_PROCHOT# <7> APU_SVC 2 1 SVC 4 33 UGATE2 PC543 C
PR546 0_0402_5%
SVC UGATE2
0.22U_0603_25V7K CPU_B+ H/S Rds(on) :11.7mohm , 14.5mohm
2
2 1 5 32 PHASE2
VR_HOT_L PHASE2 L/S Rds(on) :2.6mohm , 3.2mohm
1
PR548 0_0402_5%
+5VALW
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.01U_0402_25V7K
PR547
<7> APU_SVD 2 1 SVD 6 SVD LGATE2 31 LGATE2
10.5K_0402_1% PR549 0_0402_5% ISL6277HRTZ-T_TQFN48_6X6 PR582 0_0402_5%
+1.5VP
2 1 VDDIO 7 VDDIO VDDP 30 2 1
2 1 PR550 0_0402_5% PR583 PR551
2
1
PC544
PC547
PC545
PC546
<7> APU_SVT 2 1 SVT 8 SVT VDD 29 2 1 2 1
5
1U_0603_16V6K
PC568 1U_0603_16V6K PR552 0_0402_5% 1_0603_5%
0_0402_5%
<27,30,36> VR_ON 2 1 ENABLE 9 28
2
ENABLE PWM_Y
1
1U_0603_16V6K
After rev1.1 must change to 133k PR553 0_0402_5%
PQ503
PC549
PR554
<7,12> APU_PWRGD 2 1 PWROK 10 PWROK LGATE1 27 LGATE1
PC548
118K_0402_1% PR508
2
1 2 11 26 PHASE1 UGATE1 2 1UGATE1-1 4
IMON PHASE1
PC550 12 25 UGATE1 0_0603_5%
1000P_0402_25V6K NTC UGATE1
PGOOD
BOOT1
ISUMN
ISUMP
COMP
ISEN3
ISEN2
ISEN1
+3VS
VSEN
1 2 PL504
RTN
3
2
1
FB2
+5VS 0.36UH_FDUE1030D-H-R36M=P3_32A_20%
FB
TP
PHASE1 1 4
PR555 27.4K_0402_1% PR557 +APU_CORE
13
14
15
16
17
18
19
20
21
22
23
24
49
1
2 1 0_0402_5% PC515 ISEN1 2 PR556 1 2 3 1 2 ISEN2
5
2 1 ISEN3 PR515 0.22U_0603_25V7K 10K_0402_1%
1
PH4 PR558 BOOT1 2 1 2 1 PR516 PR559
470K_0402_5%_TSM0B474J4702RE 2 1 ISEN2 BOOT1 100K_0402_5% 4.7_1206_5% PR561 10K_0402_1%
2 1 0_0603_5% 3.65K_0402_1%
2
PR560
@PR560
@ ISEN1 VSUM+ 2 1
1
0.22U_0402_10V6K
0.22U_0402_10V6K
10_0402_5% LGATE1 4
1 2
1
@PR563
@ PR563 VGATE <27> PC516
1
PR562 10K_0402_1% 680P_0603_50V7K PR564

PQ506
PC553 1_0402_1%
10.5K_0402_1%
10P_0402_25V8K TPCA8059-H_PPAK56-8-5 VSUM- 2 1
APU_core
2
3
2
1
2
PC551
PC552
2 1 TDC 36A
2
VSUM-
CPU_B+ Peak Current 50A
B
VSUM+ OCP current 60A B
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2.61K_0402_1%
@ PR567
0.01U_0402_25V7K
PC554 PR566 PC555
Load line -2.1mV/A
1
1000P_0402_50V7K301_0402_1% 100P_0402_50V8J 32.4K_0402_1%
5
330P_0402_50V7K
PR565
0.022U_0402_16V7K
0.22U_0402_10V6K
2 1 2 1 2 1 2 1 FSW=300kHz
2
1
PC558
PC559
PC562
PC563
DCR 1.1mohm +/-5%
2
2
11K_0402_1%
PQ505
PR569 PR570 PC561
12
TYP MAX
PR568
PC556
PC560
PC557
2.26K_0402_1% 137K_0402_1% 390P_0402_50V7K PR509
2
PH5 2 1 2 1 2 1 UGATE2 2 1UGATE2-1 4
H/S Rds(on) :11.7mohm , 14.5mohm
1
10K_0402_5%_ERTJ0ER103J
1
PR572 0_0603_5%
604_0402_1% PR571 PC564 L/S Rds(on) :2.6mohm , 3.2mohm
2
VSUM- 2 1 2K_0402_1% 680P_0402_50V7K
3
2
1
2 1 2 1 PL505
@ PC566 0.36UH_FDUE1030D-H-R36M=P3_32A_20%
1
@ PR573 PHASE2 1 4
PC565 100_0402_1% 820P_0402_50V7K PR575 +APU_CORE
0.1U_0603_50V7K 2 1 2 1 10_0402_5% PC525 ISEN2 2 PR574 1 2 3 1 2 ISEN1
2
1
2 1 +APU_CORE PR525 0.22U_0603_25V7K 10K_0402_1%
PR577 BOOT2 2 1 2 1 PR526 PR576
0_0402_5% 4.7_1206_5% PR578 10K_0402_1%
2 1 APU_VDD_SEN <7> 0_0603_5% 3.65K_0402_1%
VSUM+ 2 1
1 2
LGATE2 4
PR580 PC526
0_0402_5% 680P_0603_50V7K PR579
0.01U_0402_25V7K
2 1 PQ508 1_0402_1%
2
PR581 VSUM- 2 1
3
2
1
10_0402_5% APU_VDD_RUN_FB_L <7> TPCA8059-H_PPAK56-8-5
2
2 1
PC567
1
A A

Custom A
4019IS
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5 4 3 2 1
5 4 3 2 1
om
.c
+APU_CORE
ix
+APU_CORE +APU_CORE_NB
f
se
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
ro PC801
PC802
PC803
PC804
PC805
+APU_CORE_NB
+APU_CORE_NB
2
2
w.
D D
Local
330U_D2_2V_Y
330U_D2_2V_Y
1 1
ww
+ +
PC825
PC826
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6K
1
1
PC806
PC807
PC808
PC809
PC810
PC827
PC828
PC829
PC830
PC831
2
2
@
22U_0805_6.3V6M
capacitors under processor on bottom side of board
1
22U_0805_6.3VAM
1
PC812
PC811
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
0.22U_0402_16V7K
0.22U_0402_16V7K
2
1
@
@
PC832
PC833
PC834
PC835
PC836
2
2
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
0.22U_0402_16V7K
0.22U_0402_16V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
C C
1
1
PC813
PC814
PC815
PC816
PC817
PC818
PC819
PC820
2
+APU_CORE
Local
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1 1
+ + + +
PC821
PC822
PC823
PC824
2 2 2 2
B B
A A

www.vinafix.vn
A3 A
4019IS
5 4 3 2 1
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NO DATE PAGE MODIFICATION LIST PURPOSE
.c
----------------------------------------------------------------------------------------------------------------------------------------
ix
1. 2012/01/04 P31-PWR-DCIN/BATT CONN/OTP Change PQ1 to SB906100280 Change source
2. 2012/01/04 P32-PWR-CHARGER Change PQ209 to SB00000GC10,PQ203 to PCA8057 Change source
f PQ202 to FDMC7692,PR241 to150K,PR243 to 270K Circuit modify
se
Change PC211,PC212 to unmount ,add PC206,PR206
3. 2012/01/04 P33-PWR-3.3VALWP/5VALWP Change PR350 to 30K,PR351 to 20K,PR337,PR357 Circuit modify
ro
to120K add PC336,PR336,PC356,PR356

4. 2012/01/04 P34-PWR-1.5VP/+0.75VSP Add PR156,PC156
w.
D D
5. 2012/01/04 P37-PWR +CPU_CORE Change PL503 to SH00000HD00,PQ502 to TPCA8057 Change source
ww
C C
B B
A A

www.vinafix.vn
A
4019IS
5 4 3 2 1
5 4 3 2 1
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HW PIR (Product Improve Record)
.c
QMLE4 LA-8864P SCHEMATIC CHANGE LIST
ix
REVISION CHANGE: 0.1 TO 0.2
GERBER-OUT DATE: 2012/02/13
Item f Date Page Solution Request
se
--------------------------------------------------------------------------------------------------------------------------
ro
1. 1/10 P23 Add PJ31 For saving power consumption

2. 1/12 P29 Change JTP symbol to SP01001BF10 For ME request
w.
D D
3. 1/30 P25 Add internal MIC to MB For customer request
ww
4. 1/31 P23 Swap UL3 MDI0 and MDI1 For LAN trace routing
5. 2/1 P22 Add PJ33, WLAN power circuit and reset pin For customer request
6. 2/2 P26 Update JCRIO pin definition Change int. MIC to MB
7. 2/2 P25 Remove CA64, add RA32 and RA33 Move sense resistors to MB
8. 2/3 P22 Change JWLAN symbol to SP07000TB00 For ME request
9. 2/3 P27 Add WLAN_PWR# and WLAN_RST# For customer request
10. 2/8 P23 Add test point TL1 for pin37 For vendor request
11. 2/8 P29 Add screw H17, H20 and H21 For ME request
12. 2/9 P10 Change C218 from 390U to 330U (SF000002080) For cost down
13. 2/9 P20 Reserve ESD D94~D96 for HDMI For ESD request
14. 2/9 P19 Remove D3~D5 and add D97 and D98 For ESD request
15. 2/9 P23 Reserve ESD D99 and D100 for LAN For ESD request
16. 2/9 P21 Add resistors to improve SATA signal quality For SATA ODD co-layout
17. 2/10 P7 Stuff C126 and C127 For EMI request
18. 2/10 P22 Stuff CCL10 For EMI request
19. 2/10 P7 Reserve R77 and R85 For DeepS3 leakage
20. 2/21 P23 Change UL3 and UL4 PN to SP050006N00 For EMI request
--------------------------------------------------------------------------------------------------------------------------
C C
REVISION CHANGE: 0.2 TO 0.3

GERBER-OUT DATE: 2012/03/12
Item Date Page Solution
--------------------------------------------------------------------------------------------------------------------------
1. 3/1 P12 Update RTC scematic For avoiding +3VL short to GND
2. 2/29 P22 Change R108 pull-high from +3VS to +3VALW For LVDS sequence issue
3. 3/7 P26 Add R292 and reserve R293 To avoid PXS_PWREN floating
4. 3/7 P7 Unstuff R121~R124,R118,R119 For debug use
5. 3/7 P27 Update U13 footprint
6. 3/7 P27/30 Connect SATA port2 to 15"ODD connector, and add GPIO54 To solve SATA EA fail issue
7. 3/8 Change RB20,RB34,R3,RV102,R425,R136,R31,R32,R33,RV284,RV287
R62,RV277 to short pad
8. 3/12 P20 Add C201 and C214 For EMI request
9. 3/12 P21 Add C364 and C365 For EMI request
10. 3/12 P25 Add CA5, CA6, CA64, CA67, CA68 and CA77 For EMI request
11. 3/14 P8 Add C147 co-layout with C100 To avoid damage by SMT process
12. 3/14 P10 Add C148 co-layout with C218 To avoid damage by SMT process
--------------------------------------------------------------------------------------------------------------------------
B B
A A

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QMLE4/5: Eureka UMA

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A B C D E

LA-8864P REV 0.3 Schematic

AMD Trinity FS1r2 APU / Hudson M3 FCH 3

2012-03-14 Rev 0.3

Security Classification Compal Secret Data Compal Electronics, Inc.

HDMI Conn. Memory BUS(DDRIII)

page 20 Trinity uPGA-722 Dual Channel BANK 0, 1, 2, 3 page 10,11

FCBGA-656 SATA port 1 SATA ODD

Power Circuit DC/DC LS-8863P page 29

Power On/Off CKT. USB & PWR/B SCHEMATIC,MB LA-8864

Date: Monday, March 26, 2012 Sheet 2 of 40

N-CHANNEL DESIGN CURRENT 6A +5VS

P-CHANNEL DESIGN CURRENT 330mA +3V_LAN

N-CHANNEL DESIGN CURRENT 4A +3VS

P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD

LDO DESIGN CURRENT 1A +2.5VS

Ipeak=5.3A, Imax=3.71A, Iocp min=6.814A DESIGN CURRENT 4A +1.1VALW

N-CHANNEL DESIGN CURRENT 4A +1.1VS

Ipeak=54A, Imax=36A, Iocp min=65A DESIGN CURRENT 36A +APU_CORE

ISL6277HRTZ-T Ipeak=27.5A, Imax=22A, Iocp min=35A DESIGN CURRENT 25A +APU_CORE_NB

Ipeak=6.5A, Imax=4.55A, Iocp min=8.553A DESIGN CURRENT 8.5A +1.2VS

N-CHANNEL DESIGN CURRENT 1A +1.5VS

DESIGN CURRENT 1A +0.75VS

Security Classification Compal Secret Data Compal Electronics, Inc.

explain 10/100M GIGA Camera Internal Analog MIC 9635 9655

BTO 8105ELDO@ 8111FVB@ CAM@ AMIC@ TPM9635@ TPM9655@

FCH SM Bus Address (SCL0/SDA0)

Power Device HEX Address

EC SM Bus1 Address EC SM Bus3 Address SIGNAL

EC SM Bus2 Address S4 (Suspend to Disk) LOW HIGH

Power Device HEX Address S5 (Soft OFF) LOW LOW

Security Classification Compal Secret Data Compal Electronics, Inc.

1 AA6 P_GFX_RXN2 P_GFX_TXN2 Y4 1

PCIE_FRX_C_LANTX_P0 AE5 AD5 PCIE_FTX_LANRX_P0 C50 1 2 0.1U_0402_16V7K

AC8 P_GPP_RXN2 P_GPP_TXN2 AC2

UMI_MTX_C_FRX_P0 AG8 AG2 UMI_FTX_MRX_P0 C59 1 2 0.1U_0402_16V7K

UMI_MTX_C_FRX_N3 P_UMI_RXP3 P_UMI_TXP3 UMI_FTX_MRX_N3 C121 0.1U_0402_16V7K

+1.2VS 1 2 P_ZVDDP AG11 P_ZVDDP P_ZVSS AH11 P_ZVSS 1 2

FAN Control Circuit

Security Classification Compal Secret Data Compal Electronics, Inc.

<10> DDR_A_DQS#[0..7] <11> DDR_B_DQS#[0..7]

EVENT# pull high 0.75V Reference Voltage +1.5V

1 <14> ML_VGA_TXP0 DP1_TXP0 DP4_AUXP 1

DISPLAY PORT MISC.

C65 1 2 0.1U_0402_16V7K DP1_TXP1 H2 G5

R100 1 2 1K_0402_5% APU_TCK +1.5V

f W18 VSS_4 VSS_76 A25

+APU_CORE JAPUE +APU_CORE VSS_7 VSS_79

1 VDD_1 VDD_32 VSS_10 VSS_82 1

J14 VDD_4 VDD_35 G1 C14 VSS_13 VSS_85 AB25

Security Classification Compal Secret Data Compal Electronics, Inc.

BSH111, the Vgs is:

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_DQS1 DQS#1 DM1 MEM_MA_RST#

DDR_A_DQS4 137 138 Layout Note:

DDR_A_D34 VSS32 DQ38 DDR_A_D39 Place near JDDRH

201 SA1 SCL 202 FCH_SCLK0 <11,13,22>

DDR_B_DQS1 DQS#1 DM1 MEM_MB_RST#

DDR_B_DQS4 137 138 Layout Note:

R99 205 206

C213 0.1U_0402_16V7K UMI_MTX_FRX_P3 UMI_TX2N

PCI EXPRESS INTERFACES

UMI_FTX_C_MRX_P1 AB28 AJ5 100K_0402_5%