Asus X407uar X407ubr X407ufr Schematic

SYSTEM PAGE REF.
X407UAR/UBR/UFR SCHEMATIC Revision 1.0 Power
PAGE Content +VCCGT +VCCSA

+VCCCORE
+VCCST
001_Block Diagram
002_System Setting
003_CPU_DISPLAY
BLOCK DIAGRAM
Non Connected Standby +1.0VSUS / +1.8VSUS
Page 80 & 81
004_CPU_DDR4
Page 83
005_CPU_LPC,SPI,SMB,CLINK
006_CPU_POEWR （UAR：UMA）(45W) (Power BOM) +0.95VSG
008_CPU_MISC,JTAG
009_CPU_CFG,RSVD
（UBR：DGPU = Nvidia N16V-GMR1, MX110）(65W) (Power BOM) +VCCPRIM_CORE
010_CPU_POWER_CAP (UFR：DGPU = Nvidia N16S-GTR, MX130）(65W) (Power BOM) Page 84
016_DDR4_SO-DIMM_A_REV
+1.2V / +VTT / +2.5V
017_DDR4_SO-DIMM_B_STD
Page 86
018_DDR4_CA_DQ_VOLTAGE
019_DDR4 eDP DDR4 DDR4 so-dimm
eDP Panel 2133MHz +3VADSW/+5VSUS
020_CPU_PCH_CSI2,EMMC
Page 45
CPU Page 87
021_CPU_PCH_CGPIO, LPIO, MISC
DDR4 DDR4 so-dimm
022_CPU_PCH_AUDIO,SDIO,SDXC DDI_2 DDI_2 Kabylake R- U42 2133MHz
HDMI type A Page 3~9
Load Switch
023_CPU_PCH_PCIE,USB,SATA
Page 48
DDI_1 Page 13~15, 19 Page 88
024_CPU_PCH_CLOCK SIGNALS,RTC
SMB
025_CPU_PCH_SYS_POWER SML1 Charger
026_CPU_PCH_POEWR,GND PCIE Nvidia
PCIE_1~4 MX110/MX130 Page 89
027_CPU_PCH_POEWR,GND
N16V-GMR1/N16S-GTR
028_PCH-SPI ROM,OTH /DEBUG PORT Gen2
Page 70~ 79
+VDDC
029_Silego_Green_CLK_Gen
030_KBC_IT8995E/CX I2C1 Page 91
VRAM x32
031_KBC_KB,TP Touchpad gDDR5 2GB
032_RST_Reset Circuit LPC
Page 31
I2C Debug Conn.
036_AUD-ALC3251 PCIE_9/10/11/12
Page 28 NGFF SSD
037_AUD-HEADPHONE JACK
038_AUD_SPEAKER Keyboard
042_CardReader Connector Page 31 EC PCH Page 51
045_eDP Connector SMB0 PCIE_6

IT8995E 8th Generation WLAN + BT
048_HDMI-type D Charger Page 30 Intel Processor Families
050_FAN & SENSOR Page 88
SPI I/O for U/Y Platforms USB 2.0 USB 2.0_8
051_NGFF(KEY-M)_SSD SPI ROM SPI

CPU SMB1 Page 53
052_USB 3.0 + 2.0 CONN Thermal Sensor W25Q64FVSSIQ
Page 28
MCP
053_NGFF(KEY-E)_WLAN Page 50 USB 2.0_6
Page 20~28 CMOS Camera
057_DSG_Discharge
Vinafix.com
DIMM
058_PRO_Protect Thermal Sensor Page 45
059_Power & WIFI & CAP LED&LID Page 14
060_DC_DC & BAT IN
064_ USB 2.0 Standard Conn.
USB 2.0_2 1 port
065_ME_Conn & Skew Hole
066_ Page 52
067_
068_HDD COnnector
Azalia
SATA
069_EMI
USB 3.0
070_VGA_nVIDIA_N16V/S_PCIE Card Reader
INT. AMIC USB 2.0_4
071_VGA_nVIDIA_N16V/S_FB-IF
072_VGA_nVIDIA_N16V/S_FB-DDR3 Page 42
073_VGA_nVIDIA_N16V/S_VDD Audio Jack
Audio Codec HDA
074_VGA_nVIDIA_N16V/S_DISPLAY Page 37
075_VGA_nVIDIA_N16V/S_ROM,XTAL USB 2.0_1

Speaker L/R ALC3251
076_VGA_nVIDIA_N16V/S_GPIO
Page 38 Page 36
USB 3.0 Standard Conn.
077_VGA_nVIDIA_N16V/S_POWER 1 ports
USB 3.0_1
Page 52
080_PW_IMVP8 (1) (RT3601BCGQW)
081_PW_IMVP8 (2) (RT3601BCGQW)
083_PW_+1.0VSUS / +1.8VSUS SATA_0
084_PW_+1.2VS
HDD
Gen3
Page 68
086_PW_1.35V/+0.675VS (UP9011Q)
087_PW_+3VADSW/+5VSUS (RT8249C)
088_PW_LOAD SWITCH SATA_2
NGFF SSD
089.PW_CHARGER(BQ24780)
090_PW_PROTECTION Page 51
091_PW_DGPU_2PHASE(RT8815A)
CPU XDP Discharge Circuit DC & BATT. Conn. PWM Fan BOM
Project Name Rev

Page 7 Page 57 Page 60 Page 50
X407UA/UV R1.0
Title : Block Diagram

Reset Circuit Skew Holes Size
Custom
Dept.: ASUSTeK COMPUTER INC. Engineer: Brian Chen
Page 32 Page 65
Date: Wednesday, March 07, 2018 Sheet 1 of 102
+1.0VSUS (RT8248AGQW)
f=420kHz
PR8304 PJP8301 @ AC_BAT_SYS
620KOhm 1MM_OPEN_5MIL
1 2 1 2
1 2
P_1.0VSUS_VIN_S
PC8304
0.033UF/16V
1
2 1
GND
PCI8301 PCI8303 + PCE8301
10UF/25V 10UF/25V 68UF/25V
2
P_1.0VSUS_VSENS_10 @ h=6mm
2
nbs_c0805_h57_000s nbs_c0805_h57_000s
GND
+3VSUS
PEA16BA
PQH8301
GND PU8302
GND RT8248AGQW
@
PD8301
5
4
3
2
1
5
D
BAT54CW
VDDQ
GND1
VTTREF
VTTSNS
VTTGND
PR8318 1
100KOhm 3 23 4
GND4
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
@ 2 22 G S
Imax=7.45A
c0805,nb_c0805_h57_hdi
GND3
2
21 PR8315
P_1.0VSUS_BST_R_30 [HF]CYNTEC/PEUB063T-1R0MS
2 6
GND2
20 0Ohm 5% PC8302 PR8302
1
2
3
FB VTT
P_1.0VSUS_FB_10 7 19 nbs_r0603_h24_000s 0.1UF/25V 10KOhm PL8302 +1.0VO +1.0VSUS
S3 VLDOIN
P_1.0VSUS_LDO_EN_10 8 18 @ 1UH PJP8303 @
31,58,84,89 VSUS_ON S5 BOOT
2 1 P_1.0VSUS_EN_10 9 17 P_1.0VSUS_BST_30 1 2 1 2 Irat=12A 3MM_OPEN_5MIL
TON UGATE
1
PR8303 P_1.0VSUS_TON_10 10 16 P_1.0VSUS_HG_30 nbs_c0603_h37_000s 2 1 480mil 1 2
59 1.0VSUS_PWRGD PGOOD PHASE 1 2
560UF/2.5V
30KOhm PC8313 P_1.0VSUS_LX_30
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
0.1UF/25V 7x7x3mm
PCE8302
PCO8306
LGATE
PC8303
PC8305
PC8320
PGND
2
1
VDD
nbs_r0603_h24_000s
VID
CS
1
PC8317 @
PEA16BA
1
+
PQL8302
1000PF/50V
11
12
13
14
15
2
nbs_c0603_h37_000s
@
5
D
2
+5VSUS_PWR
SHORT_PAD
P_1.0VSUS_SNB_S
6mm
P_1.0VSUS_VDDP_30
4
1
P_1.0VSUS_CS_10
G S PR8320 @
PSP8302
1Ohm 5%
PR8321 GND @
nbs_c0603_h37_000s
1
2
3
2.2Ohm nbs_r1206_h30_000s
1
5% PC8310 @
2200PF/50V
1
P_1.0VSUS_LG_30 2 1
2
GND
1
PC8307 RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA
1
1UF/25V
PR8310 OCP=14~16A
P_1.0VSUS_FB_10
2
200KOhm
2
20160530 modify
GND GND
PR8306
820PF/50V
P_1.0VSUS_LX_30 2 1 PR8313
178KOhm PC8315 10Ohm
PR8306 close to PU8302 2 1
2 1 P_1.0VSUS_LOSENS_10
PR8309 PSP8301
PSL8303
Vinafix.com
PT830* 請放置 PU8302旁;並請放置Trace 上! VFB=0.75V 1
0402
2
2 1 P_1.0VSUS_VSENS_10 P_1.0VSUS_RESENS_10 2 1
3.48KOhm @
SHORT_PAD
PT8303 @
1
1 PR8311 PC8301
P_1.0VSUS_HG_30 10KOhm 0.1UF/25V
NB_TPC20T
2
2
PT8301
1
P_1.0VSUS_LX_30
NB_TPC20T
PT8302
1 GND GND
P_1.0VSUS_LG_30
NB_TPC20T
+1.8VSUS [For PCH]

PR8312 0Ohm
31,58,84,89 VSUS_ON 2 1
1
PD8302 @ PC8318
BAT54CW 0.1UF/16V
1 2
@
3
2
Imax=1A
GND
+1.8VSUS
59 1.8VSUS_PWRGD +3VA_DSW
+5VSUS
PU8301
APL5930CQBI-TRG
13
1
GND3
PJP8302 12
1
GND2
1MM_OPEN_5MIL 11
GND1
1 10
2
POK VCNTL
@ 1.8VSUS_PWRGD 2 9
2
FB EN
P_1.8VSUS_FB_10 3 8 P_1.8VSUS_EN_10
VOUT1 VIN3
4 7
VOUT2 VIN2
5 6
VOUT3 VIN1
+1.8VSUSO
PR8314
12.7KOHM
2 1 1 2
@ PSP8303
SHORT_PAD
1
1
PC8316 PR8307 PC8314

1
PC8311 PC8309 PC8319 @ 1UF/16V 10KOhm 10UF/6.3V

10UF/6.3V 10UF/6.3V 1000PF/50V @
1
@ 2 1 PR8308
2
<Variant Name>
2
10KOhm
Project Name Rev
3A LDO REF=0.8V
2
X540UVK R0.1
Title : PW_+1.0VSUS / +1.8VSUS

Size
C
Dept.: NB Power Team Engineer: Andy
BOM
Project Name Rev
X540UVK R1.0
Title : PW_+1.2VS
Vinafix.com
Size
A3
BOM
Project Name Rev
X540UVK R1.0
Title : POWER_+VGFX_COREVinafix.com
Size
Custom
TOP CPU NUT TOP VGA NUT
BAT NUT
H6519
H6515 H6517 H6513
CT236CB195D165
nbs_nut_1p_418
CT189B180D150 CT189B180D150 CT189B180D150 13020-03890000
GND
GND GND GND

20170814 Brian
H6519 footprint from nbs_nut_1p_414(TOP上件)
H6516 H6518 H6514 to nbs_nut_1p_418(BOT上件).
CT189B180D150 CT189B180D150 CT189B180D150

20171013 Brian
H6519 change 13020-03890000 to 13020-04030000
for 螺絲孔徑2.8mm to 2.3mm.
GND GND GND 20171025 Brian

H6519 change to 13020-03890000.
H6501
1 6 H6508 H6509
NP_NC1 GND5
2 5
NP_NC2 GND4
3 4 1 6 1 6
GND2 GND3 NP_NC1 GND5 NP_NC1 GND5
2 5 2 5
NP_NC2 GND4 NP_NC2 GND4
3 4 3 4
GND2 GND3 GND2 GND3
2D_D110N_DO122X98N
GND GND 2D_D110N_D122X98N 2D_D110N_D122X98N
GND GND
GND GND
H6504 H6520
H6503 H6510
1 1 1
NP_NC NP_NC
2 5 1 2 5
C315D91 GND1 GND4 NP_NC GND1 GND4
3 4 2 5 3 4
GND2 GND3 GND1 GND4 GND2 GND3
3 4
GND2 GND3
GND 20171013 Brian C315D110N C197D110N

H6503 change to s11705 GND GND ST354CB315D110N GND GND
for 螺絲孔徑2.8mm to 2.3mm. GND GND
H6506
H6505
1
NP_NC
1 2 5
GND1 GND4
3 4
C315D91 GND2 GND3 H6511
1
20171013 Brian NP_NC
2 5
H6505 change to s08180 C315D110N GND1 GND4
3 4
GND for 螺絲孔徑2.8mm to 2.3mm. GND GND GND2 GND3
H6507 H6526
RT591X571CB315D110N
GND GND
1 1
NP_NC NP_NC
2 5 2 5
GND1 GND4 GND1 GND4
3 4 3 4
GND2 GND3 GND2 GND3
Vinafix.com
C315D110N C315D110N 20180117 Brian
GND GND GND GND
Add H6526 for EMI DIMM-door.
TOP/BOT VRAM GASKET (3*2)

TOP GASKET (6*6)
H6521 H6522 H6523 H6524 H6525

1 1 1 1 1
1 1 1 1 1
SMD98X118 SMD98X118 SMD98X118 SMD118X118 SMD118X118
GND GND GND GND GND
www.teknisi-indonesia.com
<Variant Name>
Title : 65_ME_Conn & Skew Hole
ASUSTeK COMPUTER INC. NB4

Engineer: Bull Tsai
Size Project Name Rev
D X507UA/UV R1.0

+1.2V / +VTT / +2.5V[For Memory]
PR8630 PD8600
0Ohm BAT54AW
1 +VTT
26,31 PM_SUSC#
2 1 3
2 P_1V2_EN_10
31 1.2V_ON
1
1 2
PC8601 PC8600
PR8613
1
PC8613 10UF/6.3V 10UF/6.3V
10KOhm
2
0.22UF/10V
nbs_c0805_h37_000s nbs_c0805_h37_000s
2
f=420kHz
PR8607
620KOhm AC_BAT_SYS
1 2
AC_BAT_SYS
PC8615
1
PD8601 @ 0.1UF/25V PCI8601 PCI8603
BAT54CW 2 1 10UF/25V 10UF/25V
GND
N/A
2
2 nbs_c0805_h57_000s nbs_c0805_h57_000s
P_1V2_VTTREF_10
P_1V2_VSENS_10
3
1
h=6mm
PR8616
QM1830M3
PQH8601
0Ohm
+1.2V GND
5 DDR_PG_CTRL
2 1 P_1V2_LDO_EN_10
5
D
1
PC8614 PU8600 GND
PSL8601
0.1UF/25V RT8248AGQW @
2
@ 4
Imax= 10.06A
5
4
3
2
1
2
G S
VDDQ
VTTREF
GND1
VTTSNS
VTTGND
0603
23
20160316 OCP= 13A
1
2
3
GND4
22
1
GND3
1
21 PR8606 P_1V2_BST_R_30 PR8604
GND2
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
6 20 0Ohm 5% PC8603 10KOhm
c0805,nb_c0805_h57_hdi
FB VTT
P_1V2_FB_10 7 19 +VTT nbs_r0603_h24_000s 0.1UF/25V @ PL8600
P_1V2_LDO_EN_10 8
S3 VLDOIN
18 P_1V2_LDOIN_30 1UH
+1.2V
2
S5 BOOT
P_1V2_EN_10 9 17 P_1V2_BST_30 1 2 1 2 Irat=12A PJP8601
TON UGATE
P_1V2_TON_10 10 16 P_1V2_HG_30 nbs_c0603_h37_000s 2 1 480mil 1 2
59 1.2V_PWRGD PGOOD PHASE 1 2
P_1V2_LX_30 P_1V2_VO_S @
1
PC8604 7x7x3mm 3MM_SHORT_PIN
1UF/25V [HE]CYNTEC/PEUB063T-1R0MS
LGATE
22UF/6.3V
PGND
22UF/6.3V
22UF/6.3V
22UF/6.3V
SHORT_PAD
1
VDD
nbs_c0603_h37_000s PC8609
VID
QM1830M3
CS
PCO8606
PQL8602
PC8607
1000PF/50V
PC8605
PC8610
PSP8600
nbs_c0603_h37_000s
11
12
13
14
15
1
@ @
5
D
1
+ PCE8601
1
+5VSUS P_1V2_SNB_S 330UF/2V
GND 4
2
G S PR8608
1Ohm 5%
P_1V2_VDD_30
nbs_r1206_h30_000s @
1
2
3
2
1
P_1V2_CS_10
P_1V2_LG_30
1
PR8601 @
2
2.2Ohm PC8608
nbs_r0603_h24_000s 1000PF/50V
2
2
@
5%
GND GND
1
1
PC8602 RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA
1UF/25V PR8603
nbs_c0603_h37_000s 402KOhm OCP=13A
2
Vinafix.com
PC8612
2
820PF/50V
2 1
GND GND
PT860* 請放置 PU8600旁;並請放置Trace 上! VFB=0.75V PR8611 PR8609

PR8621 6.2KOhm 10Ohm
2 1
P_1V2_LX_30 2 1 P_1V2_FB_10 2 1 P_1V2_VSENS_10 P_1V2_LOSENS_10
PT8601 178KOhm
1
P_1V2_HG_30
1
NB_TPC20T
PR8612
1
PC8611 PSP8601 @ +1.2V
10KOhm 0.1UF/25V PSL8602 SHORT_PAD
PT8602 1 2
2
1 0402 1 2
2
P_1V2_LX_30 @
NB_TPC20T
PT8603
1 GND GND
P_1V2_LG_30
NB_TPC20T
+2.5V PD8602
BAT54AW
@ PR8615
0Ohm @
1 2 1
3 PM_SUSC#
2
1.2V_ON
2 1
1
PC8620 PR8614
Imax= 3A 0.1UF/25V 10KOhm
OCP= 4.5A @
2
+2.5V
+5VSUS +3VA_DSW
PU8601
APL5930CQBI-TRG
2
13
GND3
PJP8602 @ 12
GND2
1 2
1MM_SHORT_PIN 11
GND1
1 10
59 2.5V_PWRGD POK VCNTL
2.5V_PWRGD 2 9
FB EN
1
P_2.5V_FB_10 3 8 P_2.5V_RCEN_10
VOUT1 VIN3
4 7
VOUT2 VIN2
5 6
VOUT3 VIN1
+2.5VO
PR8623
21.5KOhm
2 1 1 2
@ PSP8602 PC8606 @
SHORT_PAD 1000PF/50V
1
1
2 1 1
PC8617 PR8622 PC8618
1
PC8619 PC8616 1UF/16V 10KOhm 10UF/6.3V

10UF/6.3V 10UF/6.3V @
1
@ 3A LDO REF=0.8V PR8602

2
2
nbs_c0805_h57_000s nbs_c0805_h57_000s 10KOhm <Core Design>
Project Name Rev

2
X540UVK R0.1
Title : PW_+1.2V/+VTT/+2.5V
Size
Dept.: NB Power team Engineer: Andy
A2
+3VA_DSW / +5VSUS [System Power]
PT8713 PT8716
1
PC8706
0.1UF/25V 1 1
P_3VADSW_HG_30 P_5VSUS_HG_30
2
P_5VSUS_BST_R
PT8714 PT8717
1
PR8705 1 1
0Ohm 5% P_3VADSW_LX_30 P_5VSUS_LX_30
P_12VSUS_SKIPSEL_20
nbs_r0603_h24_000s
P_5VSUS_LX_30 2
PT8715 PT8718
P_5VSUS_BST_30
P_5VSUS_EN_10
1 1
P_3VADSW_LG_30 P_5VSUS_LG_30
P_5VSUS_HG_30
20160415_Modify 20170517_Modify
PU8701 Close to PU8701
RT8249CGQW
23
22
21
20
19
18
17
16
+5VSUS IOCP=9.2A
PJP8701 @
GND3
GND2
GND1
EN1
UG1
SKIPSEL
PHASE1
BOOT1
1MM_OPEN_5MIL PR8702
AC_BAT_SYS
1 2 1 2 1 15
1 2 CS1 LG1
P_5VSUS_VIN_S P_5VSUS_CS_10 2 14 P_5VSUS_LG_30 PJP8703 @
FB1 BYP1
30KOHM P_5VSUS_FB_10 3 13 +5VSUSO 1MM_OPEN_5MIL
LDO3 LDO5
1
1
PR8706 +3VAO 4 12 +5VAO 1 2
FB2 VIN AC_BAT_SYS 1 2 AC_BAT_SYS
PCE8702 + PCI8701 1 2 P_3VADSW_FB_10 5 11 P_3VADSW_VIN_S
CS2 LG2
PHASE2
PGOOD
10UF/25V P_3VADSW_CS_10 P_3VADSW_LG_30
BOOT2
68UF/25V
1
UG2
h=6mm 30KOHM
EN2
nbs_c0805_h57_000s
1
PC8705 PCI8705 PCI8707
1
+3VA_DSW IOCP=9.2A PC8702 4.7UF/6.3V 10UF/25V 10UF/25V
6
7
8
9
10
QM1830M3
2
PQH8704
4.7UF/6.3V
QM1830M3
2
PQH8701
nbs_c0603_h39_000s
5
D
2
Imax =9.81A
5
D
P_3VADSW_BST_30
P_3VADSW_EN_10
2P_3VADSW_LX_30
Imax = 9.5A
4
4 P_3VADSW_HG_30 P_3VADSW_HG_30 G S
S G P_5VSUS_HG_30
[HF]CYNTEC/PEUB063T-3R3MS
1
2
3
3
2
1
PL8702
+5VSUS PJP8702 @ 3.3UH [HF]CYNTEC/PEUB063T-3R3MS
3MM_SHORT_PIN Irat=6.5A PR8708
1 2 1 2 5% PL8701
+3VA_DSW
1 2 0Ohm
+5VSUSO P_5VSUS_LX_30 nbs_r0603_h24_000s 3.3UH 20160401 Modify PJP8704 @
7x7x3mm Irat=6.5A 3MM_SHORT_PIN
1
SHORT_PAD
1 2 1 2
+5VSUS_PWR
QM1830M3
1 2
1
PQL8702
P_3VADSW_BST_R P_3VADSW_LX_30 +3VADSWO
1
5
+
PSP8705
PC8723 PCE8703 D PC8714 7x7x3mm

1 2 22UF/6.3V 220UF/6.3V 0.1UF/25V
2
0603
SHORT_PAD
@ V-Chip
1
1
QM1830M3
2
1
4
PQL8703
PSL8705 @ h=4.5mm PR8727
1
S G
PSP8706
680KOhm PC8707
5
D
PSL8705 is close to PJP8702 0511 390PF/50V PCO8711 PC8725 PC8726 PC8727
2
3VA_DSW_PWRGD 26,31,59
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1
3
2
1
2
4 @
2
G S
@
1 2 P_3VADSW_FBMLCC_10
1
2
3
Vinafix.com
P_5VSUS_LG_30 PSL8702 @
2
PC8716 @ SHORT_LAND
P_5VSUS_VSENS_10 2200PF/50V 1 2
31 3VADSW_ON 0402
@
P_3VADSW_EN_10
1
1
1
1
PC8709 PR8703 PC8715 1 2 PC8708

0.1UF/25V 10KOhm 150PF/50V PSL8703 @ P_3VADSW_LG_30 0.01UF/50V P_3VADSW_VSENS_10
@ SHORT_LAND PC8703 @
1
2
2
1
1
1 2 2200PF/50V PC8721 PR8704 PC8710
2
31,58 5VSUS_ON 0402 P_5VSUS_EN_10 150PF/50V 6.8KOhm 0.1UF/25V

@
2
P_5VSUS_FB_10 PSL8704 @
2
SHORT_LAND
1
PR8701 1 2 P_3VADSW_FB_10
0603 +3VA
6.49KOhm +3VAO
1
PR8707
2
10KOhm
2
Adaptor Mode (IMVP8) Battery Mode (IMVP8)
S0 CS S3 DS3 S4 S5 S5 with USB Charger+ S0 CS S3 DS3 S4 S5 S5 with USB Charger+
PS_ON 1 - 1 - 1 - 1 PS_ON 1 - - 1 0 0 1
PD8701
2 1 6 1 3VADSW_ON 1 - 1 - 1 - 1 3VADSW_ON 1 - - 1 0 0 0
P_3VADSW_LG_30 P_12VSUS_CP1_20 +5VSUSO
@
PSL8701 1 2 PC8718 5 2 3VSUS_ON 1 - 1 - 0 - 0 3VSUS_ON 1 - - 0 0 0 0

+12VSUS 0603
P_12VSUS_CP4_20 0.1UF/25V P_12VSUS_CP3_20
1
PC8724 4 3 5VSUS_ON 1 - 1 - 1 - 1 5VSUS_ON 1 - - 1 0 0 1

1
0.1UF/25V PC8722
nbs_c0603_h37_000s BAT54SDW 0.1UF/25V 1.35V_ON 1 - 1 - 0 - 0 1.35V_ON 1 - - 1 0 0 0
2
nbs_c0603_h37_000s
2
SUSC_EC# 1 - 1 - 0 - 0 SUSC_EC# 1 - - 0 0 0 0
2 1
P_12VSUS_CP2_20 SUSB_EC# 1 0 - - 0 SUSB_EC# 1 - - 0 0 0 0
- 0
PC8701
0.1UF/25V
請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm
PT8704
PT8709 PT8702 PT8706 PT8701 PT8708
PT8710 PT8711 PT8707 PT8705

TPC28T TPC28T TPC28T
1 1 1
@
+12VSUS +3VADSWO +3VAO
TPC28T TPC28T
PT8703 PT8712
BOM
1 1
@
+3VA_DSW +3VA Project Name Rev
TPC28T TPC28T TPC28T
1 1 1 X540UVK R0.1
@
@
GND +5VSUSO GND
TPC28T TPC28T TPC28T Title : PW_+3VA_DSW/+5VSUS
1 1 1
@
@
Size
GND +5VSUS GND Dept.: NB Power Team Engineer: Andy
Custom
TPC28T
1 Date: Wednesday, March 07, 2018 Sheet 88 of 102
@
+5VAO
2016/11/18 X542UA_R1.0 #84, Modify to GDDR5
72
72
FBA_CLK0
FBA_CLK0# FBA Partition Memory (1 of 2) 72
72
FBA_CLK1
FBA_CLK1# FBA Partition Memory (2 of 2)
72 FBA_CMD[0:15] 72 FBA_D[0:63]
MF=0 non-Mirror +FBVDDQ GDDR5 X32 72 FBA_CMD[16:31]
MF=0 non-Mirror +FBVDDQ
FBA_D[0:63] U7201 FBA_D[0:63] U7203
20161215 Byte SWAP M2 B1 M2 B1
DQ7/DQ31 VDDQ1 DQ7/DQ31 VDDQ1
20161216 bitd SWAP FBA_D7 FBA_D5 M4 B3 FBA_D63 FBA_D56 M4 B3
FBA_D6 FBA_D0 N2 B12 FBA_D62 FBA_D58 N2 B12
FBA_D5 FBA_D2 N4 B14 20161214 SWAP FBA_D61 FBA_D59 N4 B14
FBA_D4 FBA_D4 T2 D1 FBA_D60 FBA_D57 T2 D1
FBA_D3 FBA_D7 T4 D3 FBA_D59 FBA_D60 T4 D3
FBA_D2 FBA_D3 U2 D12 FBA_D58 FBA_D63 U2 D12
FBA_D1 FBA_D6 U4 D14 FBA_D57 FBA_D61 U4 D14
FBA_D0 FBA_D1 M13 E5 FBA_D56 FBA_D62 M13 E5
FBA_D15 FBA_D12 M11 E10 FBA_D55 FBA_D54 M11 E10
FBA_D14 FBA_D8 N13 F1 FBA_D54 FBA_D55 N13 F1
FBA_D13 FBA_D15 N11 F3 20161214 SWAP FBA_D53 FBA_D52 N11 F3
FBA_D12 FBA_D9 T13 F12 FBA_D52 FBA_D53 T13 F12
FBA_D11 FBA_D13 T11 F14 FBA_D51 FBA_D48 T11 F14
72 FBA_DBI[7..0] DQ10/DQ18 VDDQ14 DQ10/DQ18 VDDQ14
FBA_D10 FBA_D14 U13 G2 FBA_D50 FBA_D51 U13 G2
FBA_DBI0 FBA_D9 FBA_D11 U11 G13 FBA_D49 FBA_D49 U11 G13
FBA_DBI1 FBA_D8 FBA_D10 F13 H3 FBA_D48 FBA_D50 F13 H3
FBA_DBI2 FBA_D23 FBA_D18 F11 H12 FBA_D47 FBA_D46 F11 H12
FBA_DBI3 FBA_D22 FBA_D20 E13 K3 FBA_D46 FBA_D40 E13 K3
FBA_DBI4 FBA_D21 FBA_D19 E11 K12 FBA_D45 FBA_D45 E11 K12
FBA_DBI5 FBA_D20 FBA_D23 B13 L2 FBA_D44 FBA_D41 B13 L2
FBA_DBI6 FBA_D19 FBA_D16 B11 L13 FBA_D43 FBA_D47 B11 L13
FBA_DBI7 FBA_D18 FBA_D21 A13 M1 FBA_D42 FBA_D42 A13 M1
FBA_D17 FBA_D17 A11 M3 FBA_D41 FBA_D44 A11 M3
72 FBA_EDC[7..0] DQ16/DQ8 VDDQ24 DQ16/DQ8 VDDQ24
FBA_D16 FBA_D22 F2 M12 FBA_D40 FBA_D43 F2 M12
FBA_EDC0 FBA_D31 FBA_D24 F4 M14 FBA_D39 FBA_D33 F4 M14
FBA_EDC1 FBA_D30 FBA_D26 E2 N5 FBA_D38 FBA_D35 E2 N5
FBA_EDC2 FBA_D29 FBA_D27 E4 N10 FBA_D37 FBA_D32 E4 N10
FBA_EDC3 FBA_D28 FBA_D25 B2 P1 FBA_D36 FBA_D37 B2 P1
FBA_EDC4 FBA_D27 FBA_D31 B4 P3 FBA_D35 FBA_D39 B4 P3
FBA_EDC5 FBA_D26 FBA_D30 A2 P12 FBA_D34 FBA_D36 A2 P12
FBA_EDC6 FBA_D25 FBA_D28 A4 P14 FBA_D33 FBA_D34 A4 P14
FBA_EDC7 FBA_D24 FBA_D29 T1 FBA_D32 FBA_D38 T1
VDDQ33 VDDQ33
T3 T3
VDDQ34 VDDQ34
T12 T12
VDDQ35 VDDQ35
T14 T14
VDDQ36 VDDQ36
J5 J5
A12/A13 A12/A13
FBA_CMD9 K4 C5 FBA_CMD25 K4 C5
A0/A10/A8/A7 VDD1 A0/A10/A8/A7 VDD1
FBA_CMD6 K5 C10 FBA_CMD22 K5 C10
FBA_CMD7 K10 D11 FBA_CMD23 K10 D11
A3/BA3/A5/BA1 VDD3 A3/BA3/A5/BA1 VDD3
FBA_CMD4 K11 G1 FBA_CMD20 K11 G1
FBA_CMD3 H10 G4 FBA_CMD19 H10 G4
FBA_CMD11 H4 L1 FBA_CMD27 H4 L1
FBA_CMD10 L4 FBA_CMD26 L4
VDD9 VDD9
L11 L11
VDD10 VDD10
L14 L14
VDD11 VDD11
D4 P11 D4 P11
72 FBA_WCK23 WCK23/WCK01 VDD12 72 FBA_WCK45 WCK23/WCK01 VDD12
D5 R5 D5 R5
72 FBA_WCK23# WCK23#/WCK01# VDD13 72 FBA_WCK45# WCK23#/WCK01# VDD13
R10 R10
VDD14 VDD14
P4 P4
72 FBA_WCK01 WCK01/WCK23 72 FBA_WCK67 WCK01/WCK23
P5 P5
72 FBA_WCK01# WCK01#/WCK23# 72 FBA_WCK67# WCK01#/WCK23#
A1 A1
VSSQ1 VSSQ1
FBA_CLK0 R2 A3 R2 A3
EDC0/EDC3 VSSQ2 EDC0/EDC3 VSSQ2
2
FBA_EDC0 R13 A12 FBA_EDC7 R13 A12

R7239 FBA_EDC1 C13 A14 FBA_EDC6 C13 A14
80.6Ohm 20161215 SWAP FBA_EDC2 C2 C1 FBA_EDC5 C2 C1
/VGA FBA_EDC3 C3 FBA_EDC4 C3
VSSQ6 VSSQ6
1% P2 C4 P2 C4
DBI0#/DBI3# VSSQ7 DBI0#/DBI3# VSSQ7
1
FBA_DBI0 P13 C11 FBA_DBI7 P13 C11

FBA_CLK0# FBA_DBI1 D13 C12 FBA_DBI6 D13 C12
20161215 SWAP FBA_DBI2 D2 C14 FBA_DBI5 D2 C14
FBA_DBI3 E1 FBA_DBI4 E1
VSSQ11 VSSQ11
E3 E3
VSSQ12 VSSQ12
FBA_CLK1 E12 E12
VSSQ13 VSSQ13
2
G3 E14 G3 E14
CAS#/RAS# VSSQ14 CAS#/RAS# VSSQ14
R7240 FBA_CMD12 L3 F5 FBA_CMD28 L3 F5
RAS#/CAS# VSSQ15 RAS#/CAS# VSSQ15
80.6Ohm FBA_CMD15 F10 FBA_CMD31 F10
VSSQ16 VSSQ16
/VGA H2 H2
VSSQ17 VSSQ17
1% J3 H13 J3 H13
CKE# VSSQ18 CKE# VSSQ18
1
FBA_CMD14 J11 K2 FBA_CMD30 J11 K2

CK# VSSQ19 CK# VSSQ19
FBA_CLK1# FBA_CLK0# J12 K13 FBA_CLK1# J12 K13
CK VSSQ20 CK VSSQ20
FBA_CLK0 M5 FBA_CLK1 M5
VSSQ21 VSSQ21
M10 M10
VSSQ22 VSSQ22
G12 N1 G12 N1
WE#/CS# VSSQ23 WE#/CS# VSSQ23
FBA_CMD0 L12 N3 FBA_CMD16 L12 N3
CS#/WE# VSSQ24 CS#/WE# VSSQ24
FBA_CMD5 N12 FBA_CMD21 N12
VSSQ25 VSSQ25
N14 N14
VSSQ26 VSSQ26
R7202 1%1 /VGA 2 121Ohm J13 R1 R7207 1%1 /VGA 2 121Ohm J13 R1
GND ZQ VSSQ27 GND ZQ VSSQ27
R7203 1 /VGA 2 1KOhm FBA_ZQ1 J10 R3 R7205 1 /VGA 2 1KOhm FBA_ZQ3 J10 R3
SEN VSSQ28 SEN VSSQ28
FBA_SEN1 R4 FBA_SEN3 R4
VSSQ29 VSSQ29
R11 R11
VSSQ30 VSSQ30
J2 R12 J2 R12
RESET# VSSQ31 RESET# VSSQ31
R7204 /VGA 1KOhm FBA_CMD13 J1 R14 R7206 /VGA 1KOhm FBA_CMD29 J1 R14
GND MF VSSQ32 GND MF VSSQ32
2 1 FBA_MF1 U1 2 1 FBA_MF3 U1
MF=0 non-Mirror VSSQ33
VSSQ34
U3
U12
MF=0 non-Mirror VSSQ33
VSSQ34
U3
U12
VSSQ35 VSSQ35
U14 U14
VSSQ36 VSSQ36
A5 A5
Vpp/NC Vpp/NC
U5 U5
Vpp/NC1 Vpp/NC1
B5 B5
VSS1 VSS1
A10 B10 A10 B10
U10
VREFD1 VSS2
D10 X507 remove C7206/C7207 U10
VREFD1 VSS2
D10
X507 remove C7202/C7203 VREFD2 VSS3
VSS4
G5
G10
VREFD2 VSS3
VSS4
G5
G10
VSS5 VSS5
H1 H1
VSS6 VSS6
H14 H14
VSS7 VSS7
K1 K1
VSS8 VSS8
1 2 J14 K14 1 2 J14 K14
GND VREFC VSS9 GND VREFC VSS9
C7204 820PF/50V
FBA_VREFC0 L5 C7205 820PF/50V
FBA_VREFC1 L5
VSS10 VSS10
/VGA L10 /VGA L10
VSS11 VSS11
P10 P10
VSS12 VSS12
J4 T5 J4 T5
ABI# VSS13 ABI# VSS13
FBA_CMD8 T10 FBA_CMD24 T10
VSS14 VSS14
K4G41325FE-HC28 GND K4G41325FE-HC28 GND
/VGA /VGA
Vinafix.com
+FBVDDQ +FBVDDQ
2
R7235 R7220
549Ohm 549Ohm
/VGA @/VGA
1
R7238 1 2 0Ohm
FBA_VREFC0 /VGA FBA_VREFC1
2
R7236 R7237 R7221 R7222
1.33KOhm 931Ohm 1.33KOhm 931Ohm
/VGA /VGA @/VGA @/VGA
1
1
GND GND
3
Q7201A Q7201B
2 UM6K1N 5 UM6K1N
77 MEM_VREF_CTL
/VGA MEM_VREF_CTL /VGA
4
GND GND
+FBVDDQ
LD R1.2 [chip]
Add Ce7201/02
1
1
1
C7225 C7226 C7227 C7228 C7229 C7230 C7231 C7232 C7233 C7234 + CE7201 + CE7202
0603 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 470uF/2V 470uF/2V
@/VGA /VGA /VGA /VGA @/VGA @/VGA @/VGA @/VGA @/VGA @/VGA @/VGA @/VGA
2
1
1
C7235 C7236 C7237 C7238 C7239 C7240 C7241 C7242 C7243 C7244 C7245 C7246 C7247 C7248 C7249 C7250
0603 4.7UF/6.3V 4.7UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 1UF/6.3V 4.7UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
/VGA /VGA /VGA /VGA /VGA /VGA /@VGA @/VGA @/VGA @/VGA /VGA @/VGA /VGA @/VGA @/VGA /@VGA
2
1
1
C7251 C7252 C7253 C7254 C7255 C7256 C7257 C7258 C7259 C7260 C7261 C7262 C7263 C7264 C7265 C7266
0.1UF/10V 1UF/6.3V 1UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 1UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 0.1UF/10V 1UF/6.3V
2
2
/VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA /VGA
GND
<Variant Name>
Project Name Rev
X407UA/UV R2.0
Title : DDR3L
Size
Custom
Dept.: NB2_RD1_EE1 Engineer: Brian Chen
<=40W <=120W >=120W
PQ8901 PR8938 25m 10m 5m
A/D_DOCK_IN QM3056M6AC PQ8902 PR8938 AC_BAT_SYS
EPC NB G for shipping mode
200mil QM0930M3 10mOHM
S
3 nbs_r0612_h28_000s 240mil
S
3 1 P_CHG_ACMOS_S_20 2 5 1 2
D
4.7MOhm
1 P_CHG_PATH_19V_SHAPE
PR8937
G
1
2
PJ8803.PJ8804 PR8940
4
1
PC8922 請從PR8806內側中間拉線。 20KOhm
0.047UF/50V
nbs_c0603_h37_000s @
2
1
1
2
PSP8903 PSP8904
2
PC8905 SHORT_PAD SHORT_PAD
1000PF/50V
1 2 P_CHG_ACMOS_G_20 @ @
QM0930M3
1
PQ8903
D
1
PR8905
1
1MOhm PR8934 PC8909
4.02KOHM 0.1UF/25V 4
2
G S
2
PR8936 PR8923
2
4.02KOHM 4.02KOHM
1
2
3
1 2
P_CHG_BATDRV_G_20
2 1 PC8903 P_CHG_BATDRV_20
0.1UF/25V
PR8911 PR8928
1 2
1 2
P_CHG_REGN_20
AC_OK 1 2
100KOhm 1KOhm
1
1 2
PC8915 200mil PC8918
AC_BAT_SYS
1
0.1UF/25V AC_BAT_SYS 0.01UF/50V
2
PC8910
0.1UF/25V
2
@
QM1830M3
PQH8901
1
PSL8902 PR8906
P_CHG_CMSRC_20
P_CHG_ACDRV_20
2 1 + PCE8901
P_CHG_ACOK_10
PCI8901 PCI8902 10OHM
P_CHG_ACN_10
P_CHG_ACP_10
A/D_DOCK_IN 31,77 AC_IN_OC# 0402
10UF/25V 10UF/25V 68UF/25V nbs_r0603_h39_000s
6 1
5
@ D
2
EM6K1-G-T2R @ h=6mm
2
PQ8905A
1 2 nbs_c0805_h57_000s nbs_c0805_h57_000s P_CHG_BATSRC_20 1 2
P_CHG_ACDET_10 4 240mil
PR8929 G S
2
127KOhm PC8912 P_CHG_IADP_10
2
PR8924 0.1UF/25V
1
2
3
1
20KOhm PC8907 PR8927
AD : 17.8V
2
47PF/50V PU8901 P_CHG_VCC_20 10KOhm P_CHG_RSENS_SHAPE
7
6
5
4
3
2
1
@ PL8901 PR8926 BAT BAT_CON
IADP
ACDET
ACOK
ACDRV
CMSRC
ACP
ACN
1
2
3.3UH 10mOHM PJP8901 @
1
1
33 PC8921 Irat=6.5A nbs_r0612_h28_000s 3MM_OPEN_5MIL
GND6
32 1UF/25V 2 1 1 2
GND5 2 1
10UF/25V
10UF/25V
10UF/25V
31 nbs_c0603_h37_000s P_CHG_LX_30 2 1
91 P_CHG_ACDET_10 GND4
2
30 [HE]CYNTEC/PEUB063T-3R3MS
PC8906
PC8916
PC8924
GND3
1
29 PC8928
GND2
1
8 28 0.047UF/50V
QM1830M3
IDCHG VCC
SHORT_PAD
SHORT_PAD
1
9 27 + PCE8904
PQL8901
P_CHG_IDCHG_10 P_CHG_VCC_20 PR8918 nbs_c0603_h37_000s PC8925
PMON PHASE
2
81 P_IMVP8_PSYS_INFO
1
PC8917 P_CHG_PMON_10 10 26 P_CHG_LX_30 0Ohm 1000PF/50V @ 68UF/25V

PROCHOT# HIDRV
2
11 25 1 2
PSP8901
PSP8902
47PF/50V P_CHG_PROCHOT#_10 P_CHG_HG_30 @
5
SDA BTST D nbs_c0603_h37_000s
2
P_CHG_SDA_5 12 24 P_CHG_BST_30 P_CHG_BST_R_30 h=6mm
SCL REGN
2
P_CHG_SCL_5 13 23 P_CHG_REGN_20
1
CMPIN LODRV P_CHG_REGN_20
3
14 22 P_CHG_LG_30 4
CMPOUT GND1
1
P_CHG_LG_30 G S P_CHG_SNB_20
2
PC8920 PD8901
1
BATPRES#
BAT54CW PR8908 PR8910 @
TB_STAT#
2.2UF/16V
1
2
3
2
BATSRC
BATDRV
10KOhm 1Ohm
2
SRN
SRP
@
ILIM
2
PSL8901 @
2
1
@
1 2 SN2867RUYR
15
16
17
18
19
20
21
31,61 SMB0_DAT 0402 nbs_r1206_h30_000s
5%
Vinafix.com
+3VA
1 2 P_CHG_ILIM_10 1 2
31,61 SMB0_CLK 0402
PR8921
PSL8903 @ 180KOhm
P_CHG_BATDRV_20
1
P_CHG_BATPRES#_10
P_CHG_TB_STAT#_10
1
PR8919 PC8926
P_CHG_BATSRC_20
P_CHG_SRN_10
91 P_CHG_CMPIN_10
100KOhm 0.1UF/25V
@
I limit : Charge 6 A
P_CHG_SRP_10
2
2
91 P_CHG_CMPOUT_10 DisCharge 24A

PSL8904 nbs_r0603_h39_000s
1 2
+3VACC +3VACC 31 BAT1_IN_OC# 0402 1 2
@ 10OHM PR8931
1
1 2 PC8913
+3VSUS
PR8933 0.1UF/25V PC8901
10KOhm 0.1UF/25V
1
2
PR8909 PR8914
100KOhm 100KOhm
@ nbs_r0603_h39_000s
PR8828 SET
2
x : 0V =>0 OHM 1 2
31 A/D_MAX_POWER 31 MB_MAX_POWER 30W: 0.4V =>14k 10OHM PR8912
40W: 0.8V =>32k
1
PC8929
2
2
45W: 1.2V =>57.6k 0.1UF/25V

PR8916 PR8903 PR8935
65W: 1.6V =>93.1k
2
0Ohm 93.1KOhm 0Ohm

5% 75W: 2.0V =>150k @
90W: 2.4V =>270k 1 2
1
PWRLIMIT_EC# 31
120W: 2.8V =>560k
x : 3.3V =>@
3
+5VS_PWR
PQ8904B
5 EM6K1-G-T2R
4
PR8942
2
100Ohm
PR8920 1 2
PWRLIMIT#_CPU 9
2
150KOHM
PR8917 PD8902
PD8903 PR8932 P_CHG_VCC_20 150KOHM BAT54CW
NEW_PWRLIMIT#_CPU
3
1
BAT54CW 10Ohm 5% PQ8908B
nbs_r1206_h28_000s 2 5 EM6K1-G-T2R
A/D_DOCK_IN
1
2 3 P_PL_AC_THROTTLE_10
4
2
2
BAT 3 1 2 1
1
1 PR8901 PR8913 PC8914 PR8922
6
0Ohm PQ8908A 1MOhm 2200PF/50V 1MOhm
EM6K1-G-T2R
2 EM6K1-G-T2R @ @
2
P_CHG_PROCHOT#_10 1 2
1
PQ8905B
VGA_ALERT_P# ---> GPIO9
1
dGPU_PD# ---> GPIO12
3
PC8908
5 270PF/50V
2
AC_OK PR8904 0Ohm
4
1 2
VGA_ALERT_P# 77
1
@ PR8925 2
dGPU_PD# 77
P_PL_AC_THROTTLE_GPU_10 0Ohm
6
PQ8904A
2 EM6K1-G-T2R
1
BOM
Project Name Rev
X540UVK R0.1
Title : PW_CHARGER
Size
A2
Register Address
Address Selection Table
Address Selection Table Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06
Address 0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70
Address 0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70 R/W W W W R R R R
PR9008 10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k
PR9001 10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k bit 4 = 0
bit 5 = 0
Temp. alert PR9009 Open 8.2k 6.2k 6.8k 4.7k 3.6k 2.7k 2k
Function threshold setting Sensed temp. data bit 6 = 0
PR9002 Open 8.2k 6.2k 6.8k 4.7k 3.6k 2.7k 2k
When ALERT#
assert
PTR7807 place near VRAM. P_TEMPSENS_6_VCC_30

PTR9004 PR9007 PR9008
47KOHM 12KOHM 4.3KOHM
2 1 1 2 PC9006
2 1
1% P_TEMPSENS_6_VCC_30 47PF/50V
PC9007 PR9009 @/VGA
PTR9000 place near PQ8901 0.1UF/25V 3.6KOhm
Close to AC FET P_TEMPSENS_VCC_30 1.0 ~ 3.56V 1 2 1 2
PTR9000 PR9003 PR9001 2 1
100kOhm 12KOHM 10KOhm GND
2 1 ALERT# pull low if sensed temp. GND GND PL9001
2 1
1% 2 1 P_TEMPSENS_VCC_30 is higher than setting PC9005 PU9001 2 1
PC9000 PR9002 47PF/50V TR7806 place near GPU 1 8 0402 SMB1_DAT 29,31,91
ALT/ADD SDA
0.1UF/25V 2KOHM @ 105C @ 5k PTR9005 PR9010 P_TEMPSENS_6_ADDR_10 2 7 P_TEMPSENS_6_SDA_30 PSL9004 @/VGA
40C @ 51k TM3 SCL
1.0 ~ 3.56V 47KOHM 12KOHM P_TEMPSENS_6_TM3_10 3 6 P_TEMPSENS_6_SCL_30 2 1
TM2 GND 0402
2 1 1 @ 2 1 2 2 1 2 1 P_TEMPSENS_6_TM2_10 4 5 SMB1_CLK 29,31,91
TM1 VCC5
1% P_GPU_VRM_TEMP_SENSOR_10 P_TEMPSENS_6_VCC_30 @/VGA
GND GND PSL9001 GND PC9010 UP1905AMA8
PTR9002 place near BAT Connect PU9000 2 1 0.1UF/25V GND Check 其他頁是否有
1 8 0402 SMB1_DAT 29,31,91 1.0 ~ 3.56V 1 2 pull high 到 3.3V
ALT/ADD SDA
105C @ 5k PTR9001 PR9004 P_TEMPSENS_ADDR_10 2 7 P_TEMPSENS_SDA_30 PSL9002
@ 2 1 +5VSUS PC9009
40C @ 51k TM3 SCL
100kOhm 12KOHM P_TEMPSENS_TM3_10 3 6 P_TEMPSENS_SCL_30 2 1 47PF/50V GND
TM2 GND 0402
2 1 P_TEMPSENS_TM2_10 4 5 SMB1_CLK 29,31,91 GND 1 2 @/VGA
TM1 VCC5
2 1 1% P_TEMPSENS_TM1_10 P_TEMPSENS_VCC_30 @
PC9001 UP1905AMA8 PR9011 2.2Ohm 5%
1
0.1UF/25V GND Check 其他頁是否有 nbs_r0603_h24_000s
1.0 ~ 3.56V 1 2 pull high 到 3.3V PR9012 PC9011
2 1 +5VSUS_PWR PC9004 12KOHM 1UF/16V
2
47PF/50V GND 2 1 nbs_c0603_h37_000s
92 P_GPU_VRM_TEMP_SENSOR_10
GND 1 2 @ P_GPU_VRM_TEMP_SENSOR_10 1%
105C @ 5k PC9012 GND
PTR9002 place near PL8901 or PQL8901(CHG page) PR9006 2.2Ohm 5% 40C @ 51k 0.1UF/25V
1
nbs_r0603_h24_000s 1.0 ~ 3.56V
PTR9002 PR9005 PC9003 2 1
105C @ 5k 100kOhm 12KOHM 1UF/16V
2
40C @ 51k 2 1 nbs_c0603_h37_000s GND
2 1 1%
PC9002 GND
0.1UF/25V
1.0 ~ 3.56V
2 1
GND
Vinafix.com
DC Jack Thermal Latch
P_CHG_REGN_20 P_CHG_REGN_20 P_CHG_REGN_20
PTR9003 place near DC JACK

PSL9003 2
2
SHORT_LAND PTR9003
1
1 2 PR9014 PR9017 100kOhm

0402 P_LATCH_OUT_10 100KOhm 10KOhm
1
3
2
1
PQ9001B
5 90 P_CHG_CMPIN_10
EM6K1-G-T2R
2
P_LATCH_ACDET_10
P_LATCH_OUT#_10 PQ9001A
4
EM6K1-G-T2R PR9022
PC9008 7.32KOhm
2 1UF/25V
P_CHG_CMPOUT_10 90
2
1
GND
GND
GND
PR9018
1 2
PR9013
10KOhm
20KOhm
2 1
P_CHG_ACDET_10 90
<Variant Name>
Project Name Rev
X540UVK R0.1
Title : PW_PROTECTION
Size
A2
Skylake IMVP8 Power [For CPU]
PSL8001 PSL8004
1 2 VREF_0.6V 1 2
90 P_IMVP8_PSYS_INFO 0402 0402 IMVP8_PWRGD 26,31
Psys FF=3.2V PR8000 P_IMVP8_VREF_0.6V_S 1

0402
2
ALL_SYSTEM_PWRGD 26,31,59,70
PR8029 PR8029 3.9Ohm 1% PC8000
33W - 97.6K / 10G212976214031 49.9KOhm 0.47UF/16V PSL8005
45W - 71.5K / 10G212715214030 1 2 1 2
65W - 49.9K / 10G212499214030 1 2
90W - 35.7K / 10G212357214030 ADP=65W
120W - 26.7K / 10G212267214031 PR8034
1
PR8020 PR8030 1Ohm 5%
0Ohm 5% 53.6KOhm nbs_r0603_h24_000s
1 2 1%
+VCCST
P_VCCCORE_VCCSENSE_R_50ohm P_IMVP8_SVID_VCC_10 2 1
2
VREF_0.6V
1
Frequency=500kHz PR8018
P_IMVP8_CORE_VSEN_10
1
P_IMVP8_CORE_VSN_10
22KOhm 1% PR8011 PR8041 PR8010 PC8015
P_IMVP8_SA_IMON_10
P_IMVP8_SA_CSN_10
P_IMVP8_SA_CSP_10
1 2 45.3Ohm 110Ohm 100Ohm 0.1UF/25V
2
P_IMVP8_PSYS_10
@ nbs_c0603_h37_000s
2
IMVP8_PWRGD_L
1
1
PR8001 PR8046 PR8006 PR8056 PR8045
12.1KOhm 26.1KOhm 18.7KOhm 8.25kOhm 1 2 3.6KOhm P_IMVP8_EN_10
1% 1% 1% 1% 1 2 1% P_IMVP8_CORE2_PWM_10 PR8031 1 49.9Ohm 2 PSL8002
PR8039 1 2 P_SVID_CLK_50OHM_X2 7
2
2
30KOHM 1% PTRL8002 PR8032 1 10Ohm 2 0402 P_SVID_ALERT#_50OHM_X2 7
100kOhm 1% 1 2 P_SVID_DATA_50OHM_X2 7
IMVP8_VRHOT# 9
1
PU8001
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
Place Close to PL8102 PC8026 ATK1604ACGQW PR8074 100Ohm
47PF/50V
GND5
GND4
GND3
GND2
GND1
RGND_MAIN
VSEN_MAIN
PSYS
FB_SA
RGND_SA
COMP_SA
EN
VREF06/PSET
ISENN_SA
ISENP_SA
IMON_SA
VR_READY
PWM_MAIN
2
1 39 VREF_0.6V PR8063 PR8072 PR8038 PR8052 PR8003 PR8066 PC8001
IMON_MAIN DRVEN
P_IMVP8_CORE_IMON_10 2 38 P_IMVP8_CORE_DRVEN_10
SET1 VCLK Disable SA @ 10Kohm 0ohm 0ohm @ @
P_IMVP8_SET1_10 3
FB_MAIN ALERT#
37 P_SVID_CLK_X1 @
P_IMVP8_CORE_FB_10 4 36 P_SVID_ALERT#_X1 PR8013
5
COMP_MAIN VDIO
35
Enable SA 0ohm @ 4.7Kohm 2.37Kohm 1.4Kohm 1.4Kohm 0.1uF/25V
P_IMVP8_CORE_COMP_10 P_SVID_DATA_X1 37.4KOhm 1%
SET2 VR_HOT#
P_IMVP8_SET2_10 6 34 P_IMVP8_VR_HOT#_10 1 2
SET3 IMON_AUXI
P_IMVP8_SET3_10 7 33 P_IMVP8_GT_IMON_10
ISEN1N_MAIN ISENP_AUXI
P_IMVP8_CORE_CSN1_10 8 32 P_IMVP8_GT_CSP_10
ISEN2N_MAIN ISENN_AUXI
P_IMVP8_CORE_CSN2_10 9 31 P_IMVP8_GT_CSN_10 1 2
ISEN2P_MAIN VSEN_AUXI
P_IMVP8_CORE_TSEN_R_10 P_IMVP8_CORE_CSP2_10 10 30 P_IMVP8_GT_VSEN_10 PR8009 P_VCCGT_VCCSENSE_R_50ohm
ISEN1P_MAIN COMP_AUXI
1 2 P_IMVP8_CORE_CSP1_10 11 29 P_IMVP8_GT_COMP_10 0Ohm 5% VREF_0.6V
TSEN_MAIN RGND_AUXI
P_IMVP8_CORE_TSEN_10 12 28 P_IMVP8_GT_VSN_10
VIN FB_AUXI
PR8057 P_IMVP8_VIN_10 13 27 P_IMVP8_GT_FB_10 1 2 1 2
VCC TSEN_AUXI
PHASE_MAIN
UGATE_MAIN
110KOHM 1% P_IMVP8_VCC_20 P_IMVP8_GT_TSEN_10 P_IMVP8_GT_TSEN_R_10
PHASE_AUXI
LGATE_MAIN
UGATE_AUXI
LGATE_AUXI
1
BOOT_MAIN
BOOT_AUXI
PHASE_SA
UGATE_SA
LGATE_SA
PR8027 PR8048 PR8035 PR8065 PR8028 PR8002
BOOT_SA
1
2.61KOHM 5.76KOhm 11.5KOHM 330KOHM 110KOHM 1% PR8019 8.66KOhm
2
PVCC
2
2
1% 1% 1% 1% PC8080 174KOhm 1%
2
1
PR8054 PC8079 PR8062 PC8065 47PF/50V 1%
2
1
PTR8002
10OHM 0.01UF/50V 1Ohm 4.7UF/6.3V
1
14
15
16
17
18
19
20
21
22
23
24
25
26
2
PR8004
1
PTR8001
1
2
PR8024 PR8026 PR8058 PR8033 1 2 1Ohm
22Ohm 49.9Ohm 300Ohm 330KOHM
100kOhm 1 2
5% 1% 1% 1%
P_IMVP8_CORE1_BST_30
P_IMVP8_CORE1_HG_30
P_IMVP8_CORE1_LG_30
P_IMVP8_CORE1_LX_30
1% +5VSUS_PWR P_IMVP8_GT_BST_30 1 2
2
100kOhm
P_IMVP8_GT_HG_30 P_IMVP8_GT_BST_R_30 PR8052
P_IMVP8_PVCC_20
P_IMVP8_CORE_VIN_S P_IMVP8_GT_LX_30 1 2 1% 0Ohm 5%
Place Close to PQL8102
P_IMVP8_GT_LG_30 PC8010 1 2
PR8037 0.1UF/25V Place Close to PQL8101 P_IMVP8_SA_CSP_10
1Ohm nbs_c0603_h37_000s
2
PC8081
47PF/50V
1
2 1 PR8072
82 P_IMVP8_CORE1_HG_30
P_IMVP8_CORE1_BST_R_30 1KOhm
82 P_IMVP8_CORE1_LX_30 1 2 1 2
+5VSUS_PWR
82 P_IMVP8_CORE1_LG_30 PC8030 P_IMVP8_SA_CSN_10
0.1UF/25V N/A
1
nbs_c0603_h37_000s
PC8006
0.1UF/25V
2
PR8008
1Ohm 5%
nbs_r0603_h24_000s
82 P_IMVP8_GT_ISEN-_10
+5VSUS_PWR
82 P_IMVP8_GT_HG_30 2 1
82 P_IMVP8_GT_LX_30
1
PC8053
82 P_IMVP8_GT_LG_30 2.2UF/6.3V
PR8067 PR8055 PC8002
2
2KOhm 1% 2KOhm 1% 0.1UF/16V

82 P_IMVP8_CORE_VIN_S 1 2 1 2
82 P_IMVP8_GT_ISEN+_10 1 2
82 P_IMVP8_CORE2_PWM_10
Vinafix.com
PR8014
82 P_IMVP8_CORE_DRVEN_10 4.7KOhm 1%
P_IMPV8_GT_LX_R_10 1 2
PR8007
PTRL8004
2.74KOhm 1%
1 2
P_IMVP8_GT_CSP_10 1 2
4.7KOhm
P_IMVP8_GT_CSP_R_10 3%
Place Close to PL8101
P_IMVP8_GT_CSN_10
1
PC8012
0.1UF/25V
2
PC8008
220PF/50V PC8016
Place Close to CPU Place Close to PU8001
PR8050 2 1 2 1 82 P_IMVP8_CORE_ISEN-_10
100Ohm
@
2
+VCCCORE 82PF/50V
2 1 PC8023 PR8070 PR8053
PR8060 1000PF/50V 10KOhm 1% 54.9KOhm 1% PR8068 PR8016 PC8003
1
1 2 2 1 1 2 1.1KOhm 1% 1.1KOhm 1% 0.1UF/16V

7 P_VCCCORE_VCCSENSE_50ohm P_VCCCORE_VCCSENSE_R_50ohm P_IMVP8_CORE_COMP_10 1 2 1 2
0Ohm PR8040 82 P_IMVP8_CORE_ISEN+_10 1 2
2
PC8007 100Ohm
1000PF/50V P_IMVP8_CORE_FB_10
PR8042 1 2 +5VSUS_PWR
1
1 2 @ 1 2 P_IMPV8_CORE1_LX_R_10 PR8015
7 P_VCCCORE_VSSSENSE_50ohm 0402
P_VCCCORE_VSSSENSE_R_50ohm P_IMVP8_CORE_VSN_10 590OHM @
1
0Ohm PR8059 PSL8006 1 2

100Ohm PC8020 P_IMVP8_CORE_CSP1_10
1000PF/50V
2
2 1 @
P_IMVP8_CORE_CSN1_10
1
PC8009
220PF/50V PC8011 PC8018
Place Close to CPU PR8025 2 1 2 1 Place Close to PU8001 0.1UF/25V
2
100Ohm @
2
PC8024
+VCCGT 82PF/50V
1 2 1000PF/50V PR8073 PR8023
1
PR8061 10KOhm 1% 22KOhm 1%

1 2 2 1 1 2
7 P_VCCGT_VCCSENSE_50ohm P_VCCGT_VCCSENSE_R_50ohm P_IMVP8_GT_COMP_10
2
0Ohm PR8043
PC8025 100Ohm
1000PF/50V P_IMVP8_GT_FB_10
1 2 +5VSUS_PWR 82 P_IMVP8_CORE_ISEN2-_10
1
PR8044 @
1
1 2 1 2 PR8005 /U42
7 P_VCCGT_VSSSENSE_50ohm 0402
P_VCCGT_VSSSENSE_R_50ohm P_IMVP8_GT_VSN_10 0Ohm
1
0Ohm PR8064 PSL8007 PR8069 PR8051 PC8004 5%

100Ohm PC8021 1.1KOhm 1% 1.1KOhm 1% 0.1UF/16V
2
1000PF/50V 1 2 1 2
2
1 2 @ 82 P_IMVP8_CORE_ISEN2+_10 1 2
/U42 /U42 /U42
PR8017
P_IMPV8_CORE2_LX_R_10 0Ohm /U22
1 2
P_IMVP8_CORE_CSP2_10
PR8075 /U22
1KOhm
1 2
+5VSUS_PWR
P_IMVP8_CORE_CSN2_10
1
PC8014
0.1UF/25V
2
PR8005 PR8075 PR8017 PR8051 PR8069 N/A
U42 0ohm @ @ 1.1Kohm 1.1Kohm

U22 @ 1Kohm 0ohm @ @
<Variant Name>
Project Name Rev
S430 R0.9
Title : Skylake IMVP8

Size
Dept.: Power team Engineer: EE
Custom
Title
<Title>
Vinafix.com
Size Document Number Rev
A <Doc> <RevCode>

Power on Int.& Ext Power on Int.& Ext
PCH_IBEX GPIO Default States Pull up / down Power PCH_IBEX GPIO Default States Pull up / down Power EC Pin Name Config Signal Name Default status Ext Pull up / down Power
PCH_CPT Use As Signal Name Use As Signal Name
IT8995 Design IP Source:
EXT PU 10K GPA0 O PWR_LED
GPIO GPP_A0 Native1 RC_IN# +3VS PU at EC GPP_D23 GPO N/A
GPIO
LOW
GPP_A1 Native1 LPC_AD0 GPP_E0 GPO DIRECT_ESATA_DETECT_R# EXT PU 10K +3VS GPA1 OD CHG_LED# HIGH EXT 10K PU +3VA_EC
SM_BUS ADDRESS :
GPP_A2 Native1 LPC_AD1 GPP_E1 GPO SATA_ODD_PRSNT_R# EXT PU 10K +3VS GPA2 OD CHG_FULL_LED# HIGH EXT 10K PU +3VA_EC PCH Master
GPP_A3 Native1 LPC_AD2 GPP_E2 GPO MSATA_MPCIE_DET# EXT PU 10K +3VS For 555 N/A GPA3 Alt EC_GPA3 LOW SM-Bus Device SM-Bus Address
GPP_A4 Native1 LPC_AD3 GPP_E3 GPO N/A For 555 N/A GPA4 O EC_GPA4 LOW EXT 10K PU +3VA_EC
GPP_A5 Native1 LPC_FRAME# GPP_E4 GPO SATA0_DEVSLP GPA5 Alt FAN0_PWM LOW
GPP_A6 Native1 INT_SERIRQ EXT PU 10K +3VS GPP_E5 GPO SATA1_PHYSLP_DIRECT GPA6 Alt KB_LED_PWM LOW
GPP_A7 GPO N/A GPP_E6 GPO SATA2_DEVSLP For 555 N/A GPA7 O EC_GPA7 (N/A) HIGH
GPP_A8 Native PM_CLKRUN# EXT PU 8.2K +3VS GPP_E7 GPO N/A GPB0 Alt AC_IN_OC# HIGH EXT 10K PU +3VA
GPP_A9 Native1 CLK_KBCPCI_PCH GPP_E8 NATIVE PCH_SATA_LED# EXT PU 10K +3VS GPB1 I LID_SW# HIGH EXT 10K PU +3VA
GPP_A10 Native CLK_DEBUG GPP_E9 NATIVE USB_OC_1_2#_R EXT PU 10K +3VSUS For 555 N/A GPB2 OD (N/A) LOW EXT 10K PU +3VA_EC
For 555 N/A GPP_A11 GPO N/A 需確認是否具wake 功能 GPP_E10 GPI USB_OC_3_4# EXT PU 10K +3VSUS GPB3 I PWR_SW# HIGH EXT 10K PU +3VA
GPP_A12 GPO N/A GPP_E11 GPI USB_OC_5_6# EXT PU 10K +3VSUS GPB4 O PS_ON HIGH EC Master (SMB1) SM-Bus Address
GPP_A13 Native1 SUSWARN# EXT PU 10K +3VSUS GPP_E12 GPI USB_OC_7_8# EXT PU 10K +3VSUS For 555 N/A GPB5 O A20GATE (N/A) LOW EXT 10K PU +3VS SM-Bus Device
GPP_A14 Native1 PCH_SUS_STAT# GPP_E13 GPO N/A EXT PD 100K PD at IC of eDP to VGA GPB6 OD RC_IN# HIGH EXT 10K PU +3VS DIMM TEMP. 9Ah
Need Add EC GPP_A15 Native1 PCH_SUSACK# GPP_E14 NATIVE HDMI_HP EXT PU 1M +3VS PD at HDMI connFor 555 N/A GPC0 O (N/A) LOW CPU Thermal Sensor 90h
For 555 N/A GPP_A16 GPO N/A (SD_1P8_SEL) GPP_E15 GPO EXT_SMI# EXT PU 10K +3VS GPC1 Alt SMB1_CLK LOW EXT 4.7K PU +3VA_EC
For 555 N/A GPP_A17 GPO N/A (SD_PWR_EN#) GPP_E16 GPI EXT_SCI# EXT PU 10K +3VS GPC2 Alt SMB1_DAT LOW EXT 4.7K PU +3VA_EC USB3 Port
GPP_A18 GPO N/A GPP_E17 NATIVE EDP_HPD_CON PD at LVDS conn GPC3 O PM_PWRBTN# HIGH USB3_1
USB 3.0 Port 0
GPP_A19 GPO N/A GPP_E18 GPO DDPB_SCL_PCH For 555 N/A GPC4 I EC_GPC4 (N/A) LOW EXT 10K PU +3VS USB3_2
GPP_A20 GPO N/A GPP_E19 GPO DDPB_SDA_PCH EXT PU 10K +3VS GPC5 I PM_SUSC# HIGH EXT 100K PD USB3_3
GPP_A21 GPO N/A GPP_E20 NATIVE DDPC_SCL_PCH EXT PU 2.2K +3VS PU at HDMI conn GPC6 Alt BAT1_IN_OC# HIGH EXT 10K PD
PCI Express USB3_4
GPP_A22 GPO N/A GPP_E21 NATIVE DDPC_SDA_PCH EXT PU 2.2K +3VS PU at HDMI conn
For 555 N/A GPC7 I (N/A) LOW PCIE 1
GPP_A23 GPO N/A GPP_E22 GPO N/A GPD0 I PCH_SLP_S0# HIGH PCIE 2
DGPU
For 555 N/A GPP_B0 Native N/A (VCCPRIM_VID0) EXT PU 10K +3VS GPP_E23 GPO N/A GPD1 O ME_AC_PRESENT LOW EXT 100K PU +3VA_DSW PCIE 3
For 555 N/A GPP_B1 Native N/A (VCCPRIM_VID1) EXT PU 10K +3VS GPP_F0 GPO N/A GPD2 Alt BUF_PLT_RST# HIGH EXT 100K PD PCIE 4
GPP_B2 GPO N/A GPP_F1 GPO N/A GPD3 OD EXT_SCI# HIGH EXT 10K PU +3VS PCIE 5
GPP_B3 GPO N/A GPP_F2 GPO N/A GPD4 OD EXT_SMI# HIGH EXT 10K PU +3VS PCIE 6 WLAN SATA Port
GPP_B4 GPO N/A GPP_F3 GPO N/A GPD5 O OP_SD# HIGH SATA 0 HDD
GPP_B5 Native CK_REQ_P0# DGPU EXT PU 10K +3VS For X541UV ADD GPP_F4 GPO N/A GPD6 Alt FAN0_TACH LOW EXT 10K PU +3VS SATA 1A SSD
GPP_B6 Native CK_REQ_P1# EXT PU 10K +3VS For X541UV ADD GPP_F5 GPO N/A For 555 N/A GPD7 Alt (N/A) LOW EXT 10K PU +3VS PCIE 9
GPP_B7 Native CK_REQ_P2# EXT PU 10K +3VS GPP_F6 GPO N/A GPE0 O SUSB_EC# HIGH EXT 10K PD PCIE 10
GPP_B8 Native CK_REQ_P3# EXT PU 10K +3VS GPP_F7 GPO N/A GPE1 O SUSC_EC# HIGH EXT 10K PD PCIE 11
GPP_B9 Native CK_REQ_P4# GLAN EXT PU 10K +3VS GPP_F8 GPO N/A GPE2 O 1.2V_ON
LOW PCIE 12
GPP_B10 Native CK_REQ_P5# WLAN EXT PU 10K +3VS GPP_F9 GPO N/A GPE3 O N/A HIGH
GPP_B11 Native MPHY_PWREN (N/A) EXT PU 20K +3VSUS GPP_F10 GPO N/A For 555 N/A GPE4 O (N/A) HIGH
PCI CLK
GPP_B12 Native PCH_SLP_S0# GPP_F11 GPO N/A GPE5 I PM_SUSB# LOW EXT 100K PD
CLK0 DGPUx4
GPP_B13 Native PLT_RST# GPP_F12 GPO N/A For 555 N/A GPE6 OD CAP_LED# HIGH
CLK1
GPP_B14 GPO PCH_GPPB14 GPP_F13 GPO N/A GPE7 OD THRO_CPU# HIGH EXT 1K PU +VCCSTG
CLK2
For 555 N/A GPP_B15 GPO N/A (GSPI0_CS_R#) GPP_F14 GPO N/A GPF0 O 5VSUS_ON LOW EXT 10K PU/ 1M PD +3VA_EC
CLK3
For 555 N/A GPP_B16 GPO N/A (GSPI0_CLK_R) GPP_F15 GPO N/A GPF1 O VSUS_ON LOW EXT 100K PU +3VA_EC
CLK4
For 555 N/A GPP_B17 GPO N/A (GSPI0_MISO_R) GPP_F16 GPO N/A GPF2 Alt SMB0_CLK HIGH EXT 4.7K PU +3VA_EC
CLK5 WLAN
GPP_B18 GPO N/A (PCH_GPPB18) GPP_F17 GPO N/A GPF3 Alt SMB0_DATA HIGH EXT 4.7K PU +3VA_EC
GPP_B19 GPO BT_ON/OFF# GPP_F18 GPO N/A GPF4 Alt TP_CLK HIGH EXT 4.7K PU +3VS
GPP_B20 GPO GPU_EVENT# EXT PU 10K +3VSG GPP_F19 GPO N/A GPF5 Alt TP_DAT HIGH EXT 4.7K PU +3VS
USB Port
Vinafix.com
GPP_B21 GPI DGPU_FB_CLAMP_GPIO EXT PD 10K PU at DGPU GPP_F20 GPO N/A GPF6 Alt PECI_EC LOW
USB 1 USB 2.0 Port USB 3.0 Port 0
GPP_B22 GPO PCH_GPPB22 GPP_F21 GPO N/A GPF7 O PCH_SPI_OV LOW
USB 2 USB 2.0 Port
GPP_B23 Native SML1ALERT# EXT PU 150K +3VSUS GPP_F22 GPO N/A GPG0 O DGPU_LIMIT LOW
USB 3
GPP_C0 Native SMB_CK EXT PU 2.2K +3VSUS GPP_F23 GPO N/A GPG1 O PCH_SUSACK# HIGH
USB 4 Cardreader
GPP_C1 Native SMB_DATA EXT PU 2.2K +3VSUS For 555 N/A GPP_G0 GPO N/A (SDIO_CMD) GPG2 I PWRLIMIT_EC# HIGH EXT 100K PU +3VA_EC
USB 5
GPP_C2 GPO GPP_C2 For 555 N/A GPP_G1 GPO N/A (SDIO_D0) For 555 N/A GPG6 O (N/A)
LOW
USB 6 CAMERA
For 555 N/A GPP_C3 GPO SML0_CK EXT PU 2.2K +3VSUS For 555 N/A GPP_G2 GPO N/A (SDIO_D1) GPH0 Alt PM_CLKRUN# HIGH EXT 8.2K PU +3VS
USB 7
For 555 N/A GPP_C4 GPO SML0_DATA EXT PU 2.2K +3VSUS For 555 N/A GPP_G3 GPO N/A (SDIO_D2) For 555 N/A GPH1 Alt SMB3_CLK N/A HIGH
USB 8 WLAN/BT
GPP_C5 GPO GPP_C5 For 555 N/A GPP_G4 GPO N/A (SDIO_D3) For 555 N/A GPH2 Alt SMB3_DAT N/A HIGH
USB 9
GPP_C6 GPO SML1_CK EXT PU 2.2K +3VSUS For 555 N/A GPP_G5 GPO N/A (SDIO_CD#) GPH3 O PM_RSMRST# HIGH EXT 10K PD
USB 10
GPP_C7 GPO SML1_DATA EXT PU 2.2K +3VSUS For 555 N/A GPP_G6 GPO N/A (SDIO_CLK) GPH4 O DPWROK_EC LOW EXT 10K PD
For 555 N/A GPP_C8 GPO N/A (PCH_GPPC8) For 555 N/A GPP_G7 GPO N/A (SDIO_WP) GPH5 O PM_PWROK
LOW EXT 100K PD
For 555 N/A GPP_C9 GPO N/A (PCH_GPPC9) For 555 ADD GPD0 Native PM_BATLOW_R# EXT PU 8.2K +3VA_DSW GPH6 O PM_SYSPWROK
LOW EXT 10K PD Device Identification
For 555 N/A GPP_C10 GPO N/A (PCH_GPPC10) GPD1 Native ME_AC_PRESENT_PCH EXT PU 100K +3VA_DSW GPH7 O LCD_BACKOFF# HIGH CPU Thermal Senser
For 555 N/A GPP_C11 GPO N/A (PCH_GPPC11) GPD2 GPO PCH_GPD2# EXT PU 10K +3VA_DSW GPI0 I PM_SLP_SUS# HIGH EXT 10K PU/ 100K PD +3VA_EC 1st 06G023123010 NCT7717U
GPP_C12 GPO DIMM_SEL0 EXT PU 10K +3VSUS GPD3 Native PM_PWRBTN# GPI1 I 3VSUS_PWRGD LOW 2nd
GPP_C13 GPO DIMM_SEL1 EXT PU 10K +3VSUS GPD4 Native PM_SUSB# EXT PD 100K PD at EC GPI2 I ALL_SYSTEM_PWRGD LOW EXT 10K PU +3VS
GPP_C14 GPO DIMM_SEL2 UART1_RTS# EXT PU 10K +3VSUS GPD5 Native PM_SUSC# EXT PD 100K PD at EC GPI3 I IMVP8_PWRGD LOW EXT 10K PU +3VS
GPP_C15 GPO FP_RST#_GPIO UART1_CTS# For 555 ADD GPD6 Native PM_SLP_A_R# GPI4 I 3VA_DSW_PWRGD LOW EXT 100K PU +3VA_DSW
GPP_C16 GPO AOAC_WLANLED(N/A) GPD7 GPO WLAN_ON# GPI5 I ME_SusPwrDnAck_EC LOW

For 555 N/A GPP_C17 GPO N/A (ALS_INT#) For 555 N/A GPD8 GPO NA (SUS_CK) EXT PD 1K GPI6 Alt A/D_MAX_POWER LOW EXT 0 PD
For X541UV N/A GPP_C18 Native I2C1_SDA_TCH_PAD PU 4.7K +3VSUS GPD9 GPO PCH_SLP_WLAN# (N/A) GPI7 Alt MB_MAX_POWER LOW EXT 100K PU/93.1K PD +3VACC
For X541UV N/A GPP_C19 Native I2C1_SCL_TCH_PAD PU 4.7K +3VSUS GPD10 GPO SLP_S5# (N/A) GPJ0 I EC_WAKE_SCI
LOW
GPP_C20 GPI DGPU_PWROK EXT PU 10K +3VSG PU at DGPU GPD11 GPO LAN_PWREN (N/A) VC lose GPJ1 O 3VADSW_ON EXT 100K PU +3VA_EC
LOW
GPP_C21 GPO GPU_RST# EXT PU 10K +3VS For 555 N/A GPJ2 Alt PL_REF_EC N/A LOW
GPP_C22 GPO DGPU_PWR_EN# EXT PU 10K +3VSUS GPJ3 O WLAN_PWR_EN LOW For X540UPR ADD
GPP_C23 GPO TPanel_INT# EXT PU 10K +3VS For 555 N/A GPJ4 Alt IBAT_REF_EC N/A
LOW
GPP_D0 GPO N/A For 555 N/A GPJ5 I EC_GPJ5 LOW
GPP_D1 GPO N/A For 555 N/A GPJ6 I N/A LOW +3VS
GPP_D2 GPO N/A For 555 N/A GPJ7 O N/A HIGH

GPP_D3 GPO N/A *1: EC config GPI; Function output
For 555 N/A GPP_D4 GPI GPIO_SMI_ASM1142(N/A)
GPP_D5 GPO SATA_ODD_PWRGT EXT PU 10K +3VS
GPP_D6 GPI SATA_ODD_DA# EXT PU 10K +3VS
GPP_D7 GPO N/A
GPP_D8 GPO N/A
GPP_D9 GPI PCB_ID0 EXT PD 10K
For X541UV N/A GPP_D10 GPI DMIC_ID EXT PD 10K
GPP_D11 GPI TOUCHPAD_ID EXT PD 10K
GPP_D12 GPI TOUCH_PANEL_ID EXT PD 10K
GPP_D13 GPI TOUCHPAD_INTR# EXT PU 10K +3VS

GPP_D14 GPO WLAN_LED_R
X541UV Change GPP_D15 GPO SNSR_HUB_PWREN
GPP_D16 GPI FP_INT# UART0_CTS#
GPP_D17 GPO N/A
GPP_D18 GPO N/A
For 555 N/A GPP_D19 GPO (N/A) DMIC_CLK_PCH
For 555 N/A GPP_D20 GPO (N/A) DMIC_DATA_PCH
BOM
GPP_D21 GPO N/A
Project Name Rev
GPP_D22 GPO N/A X407UA/UV R1.0
Title : System Setting

Size
D
Main Board
Intel Version ASUS P/N

Display Port
A EDP
B
C HDMI
U0301A
E55 C47
DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 46
F55 C46
DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 46
E58 D46
DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 46
F58 C45
DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 46
F53 A45
DDI1_TXN[2] EDP_TXN[2]
G53 B45
DDI1_TXP[2] EDP_TXP[2]
F56 A47
DDI1_TXN[3] EDP_TXN[3]
G56 B47
DDI1_TXP[3] EDP_TXP[3]
C50 E45
49 HDMI_DATA2N_PCH DDI2_TXN[0] DDI EDP EDP_AUXN EDP_AUXN 46
D50 F45
49 HDMI_DATA2P_PCH DDI2_TXP[0] EDP_AUXP EDP_AUXP 46
C52
49 HDMI_DATA1N_PCH DDI2_TXN[1]
D52 B52 R0302 @ 0Ohm
49 HDMI_DATA1P_PCH DDI2_TXP[1] EDP_DISP_UTIL
A50 DP_UTIL 1 2
49 HDMI_DATA0N_PCH DDI2_TXN[2] +3VS
B50 G50
49 HDMI_DATA0P_PCH DDI2_TXP[2] DDI1_AUXN
D51 F50
49 HDMI_CLKN_PCH DDI2_TXN[3] DDI1_AUXP
C51 E48
49 HDMI_CLKP_PCH DDI2_TXP[3] DDI2_AUXN T0301
F48 DDI2_AUX_DN 1
DDI2_AUXP T0302
G46 DDI2_AUX_DP 1
DISPLAY SIDEBANDS DDI3_AUXN
F46 R0305 10KOhm
Vinafix.com
DDI3_AUXP
L13 EXT_SMI# R0306 1 2 10KOhm
GPP_E18/DDPB_CTRLCLK
DDPB_SCL_PCH L12 L9 EXT_SCI#_X1 1 2
GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0
DDPB_SDA_PCH L7 R0304 @ 10KOhm
GPP_E14/DDPC_HPD1 HDMI_HP 49
N7 L6 DDPB_SCL_PCH R0307 1 @ 2 10KOhm
49 DDPC_SCL_PCH GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 EXT_SMI# 31
N8 N9 EXT_SMI# SL0304 1 2 DDPB_SDA_PCH 1 2
49 DDPC_SDA_PCH GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 0402 EXT_SCI# 31
L10 EXT_SCI#_X1 20160217 X541UV/UA R1.1
GPP_E17/EDP_HPD EDP_HPD_CON 46
N11 EDP_HPD_CON Unstuff R0304
PDG#543016 DDI1 mapping DDPB GPP_E22/DDPD_CTRLCLK
N12 R12 SL0301 1 2 20170505 X540UPR2 DEL DSUB CONN
DDI2 mapping DDPC GPP_E23/DDPD_CTRLDATA EDP_BKLTEN 0402 L_BKLT_EN 46
R11 LCD_BACKEN_PCH_X1 SL0302 1 2
EDP_BKLTCTL 0402 EDP_BRIGHTNESS 46
E52 U13 L_BKLTCTL_PCH_X1 SL0303 1 2 20170511 X506UA Del R0303
EDP_RCOMP EDP_VDDEN 0402 L_VDDEN_PCH 46
EDP_COMP L_VDDEN_PCH_X1 /Chane R0307 to @
SKL-ULT
+VCCSA
2
R0301
24.9Ohm 20170717 Brian
1% Change R0301.2 +VCCIO_CPU to +VCCSA for CPU VCORE plane.
1
EDP_COMP
COMPENSATION PU FOR DP
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_DISPLAY
Size
Custom
Main Board
U0301E
SPI - FLASH
SMBUS, SMLINK TO DIMM / VGA / TP
R0503 1 2 15Ohm AV2 R7
29 SPI_CLK_SPI_2 SPI0_CLK GPP_C0/SMBCLK
R0510 1 2 15Ohm SPI_CLK_SPI_2_X1 AW3 R8 SMB_CK
29 SPI_SO_SPI_2 SPI0_MISO GPP_C1/SMBDATA
R0509 1 2 15Ohm SPI_SO_SPI_2_X1 AV3 R10 SMB_DATA
29 SPI_SI_SPI_2 SPI0_MOSI GPP_C2/SMBALERT#
R0539 1 2 15Ohm SPI_SI_SPI_2_X1 AW2 GPP_C2
29 PCH_SPI_DQ2 SPI0_IO2
R0540 1 2 15Ohm PCH_SPI_DQ2_X1 AU4 R9
29 PCH_SPI_DQ3 SPI0_IO3 GPP_C3/SML0CLK
SL0504 2 1 PCH_SPI_DQ3_X1 AU3 W2 SML0_CK
29 SPI_CS#0_SPI_2 0402 SPI0_CS0# GPP_C4/SML0DATA
SPI_CS#0_SPI_2_X1 AU2 W1 SML0_DATA
SPI0_CS1# GPP_C5/SML0ALERT#
AU1 GPP_C5
SPI0_CS2#
W3
GPP_C6/SML1CLK SML1_CK 29
V3
SPI - TOUCH GPP_C7/SML1DATA SML1_DATA 29
AM7
GPP_B23/SML1ALERT#/PCHHOT#
M2 SML1ALERT#
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1 LPC AY13
GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 LPC_AD0 29,31
BA13
GPP_A2/LAD1/ESPI_IO1 LPC_AD1 29,31
BB13
C LINK GPP_A3/LAD2/ESPI_IO2 LPC_AD2 29,31
AY12
GPP_A4/LAD3/ESPI_IO3 LPC_AD3 29,31
T0502 1 G3 BA12
CL_CLK GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME# 29,31
T0501 1 CL_CK G2 BA11 1 T0504
CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET#
T0503 1 CL_DATA G1
CL_RST#
CL_RST#
AW9 R0512 1 2 33Ohm
GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_KBCPCI_PCH 31
AW13 AY9 CLK_KBCPCI_PCH_X1 R0514 1 2 22Ohm
31,70 RC_IN# GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 CLK_DEBUG 29
AW11 CLK_TPMPCI_PCH_X1 /DEBUG
GPP_A8/CLKRUN# PM_CLKRUN# 31
AY11 PM_CLKRUN#
31 INT_SERIRQ GPP_A6/SERIRQ
INT_SERIRQ X507 Modify R0514 optional to /DEBUG
SKL-ULT
REV = <REV>
+3VSUS +3VS
+12VS
3
+3VS
3
RN0504A RN0504B
RN0503A RN0503B 2.2KOHM 2.2KOHM
Vinafix.com
R0522 8.2KOhm 2.2KOHM 2.2KOHM
2 1 PM_CLKRUN#
4
2
4
R0519 1 2 10KOhm
2
INT_SERIRQ
SMB_CK_S3 17,18
SMB_CK 6 1
SMB_CK_S3
Q0501A
EM6K1-G-T2R
+3VSUS TO DIMM
5
R0508 1 2 150KOHM
SMB_DATA_S3 17,18
SML1ALERT# SMB_DATA SMB_DATA_S3
3 4
RN0501B 2.2KOHM
3 4 Q0501B
SML1_CK
RN0501A 2.2KOHM EM6K1-G-T2R
1 2 SML1_DATA
RN0502B 2.2KOHM
3 4 SML0_CK
RN0502A 2.2KOHM
1 2 SML0_DATA
Transport Layer Security (TLS) Confidentiality
+3VSUS +3VSUS
@ @
R0507 10KOhm R0506 10KOhm
1 2 GPP_C5 1 2 GPP_C2
GPP_C5: weak internal pull down GPP_C2: weak internal pull down BOM
Project Name Rev

PU SPI BUS PU Enable
X407UA/UV R1.0
Disable Intel ME TLS ipher suite
PD LPC is selected for EC (Default) PD ( no confodentiality)(Default) Title : CPU_LPC,SPI,SMB,CLINK
Size
Custom
+VCCCORE +VCCGT
+1.2V
2
+VCCSA
R0655 U0301N
0Ohm CPU POWER 3 OF 4
+VCCCORE +VCCCORE /U42 +1.2V
+1.0V_VCCST 10114-00193000 SL0610 1 2 AU23 AK28
VDDQ_AU23 VCCIO1 20170717 Brian
1
0603 +VDDQ_CPU_CLK AU28 AK30
VDDQ_AU28 VCCIO2 Change +VCCIO_CPU to +VCCSA
1
U0301L R0656 +VCCGT AU35 AL30
R1.0-3 VDDQ_AU35 VCCIO3 for CPU VCORE plane.
CPU POWER 1 OF 4
1 2 U0301M C0615 AU42 AL42
VDDQ_AU42 VCCIO4
0Ohm 10UF/6.3V BB23 AM28
VDDQ_BB23 VCCIO5
2
CPU POWER 2 OF 4
2
A30 G32 /U22 BB32 AM30
VCC_A30 VCC_G32 VDDQ_BB32 VCCIO6
A34 G33 R0606 N70 BB41 AM42 +VCCSA
A39
VCC_A34 VCC_G33
G35 SVID DATA 100Ohm A48
VCCGT56
N71 BB47
VDDQ_BB41 VCCIO7
VCC_A39 VCC_G35 VCCGT1 VCCGT57 VDDQ_BB47
A44 G37 A53 R63 BB51 AK23
VCC_A44 VCC_G37 VCCGT2 VCCGT58 VDDQ_BB51 VCCSA1
AK33 G38 1% A58 R64 AK25
VCC_AK33 VCC_G38 VCCGT3 VCCGT59 VCCSA2
1
AK35 G40 A62 R65 +1.0V_VCCST G23
VCC_AK35 VCC_G40 VCCGT4 VCCGT60 VCCSA3
AK37 G42 A66 R66 AM40 G25
U22_VCCGT_U42_VCCCORE
VCC_AK37 VCC_G42 VCCGT5 VCCGT61 VDDQC VCCSA4
AK38 J30 SL0609 1 2 AA63 R67 +VDDQ_CPU_CLK G27
VCC_AK38 VCC_J30 0402 P_SVID_DATA_50OHM_X2 81 VCCGT6 VCCGT62 VCCSA5
AK40 J33 P_SVID_DATA_X3 AA64 R68 20160119 X541UV SL0633-->R0633 +VCCSTG A18 G28
VCC_AK40 VCC_J33 VCCGT7 VCCGT63 VCCST VCCSA6
AL33 J37 AA66 R69 J22
VCC_AL33 VCC_J37 VCCGT8 VCCGT64 VCCSA7
AL37 J40 AA67 R70 +1.2V +VCCPLL_OC A22 J23
VCC_AL37 VCC_J40 20151230 LAUOYUT 此3組訊號請將 SVID ALERT 擺中間 VCCGT9 VCCGT65 VCCSTG_A22 VCCSA8
AL40 K33 AA69 R71 J27
VCC_AL40 VCC_K33 VCCGT10 VCCGT66 VCCSA9
AM32 K35 +1.0V_VCCST AA70 T62 +VCCGTX +VCCCORE R0633 1 2 0Ohm AL23 K23
VCC_AM32 VCC_K35 VCCGT11 VCCGT67 VCCPLL_OC VCCSA10
AM33 K37 AA71 U65 +1.0V_VCCPLL K25
VCC_AM33 VCC_K37 VCCGT12 VCCGT68 VCCSA11
AM35 K38 AC64 U68 nbs_r0603_h24_000s K20 K27
VCC_AM35 VCC_K38 VCCGT13 VCCGT69 VCCPLL_K20 VCCSA12
1
AM37 K40 AC65 U71 @ C0663 K21 K28
VCC_AM37 VCC_K40 VCCGT14 VCCGT70 VCCPLL_K21 VCCSA13
2
AM38 K42 AC66 W63 K30
VCC_AM38 VCC_K42 VCCGT15 VCCGT71 VCCSA14
2
G30 K43 R0605 AC67 W64 1UF/6.3V
VCC_G30 VCC_K43 SVID ALERT VCCGT16 VCCGT72
2
56Ohm AC68 W65 R0659 AM23
VCCGT17 VCCGT73 VCCIO_SENSE
K32 E32 AC69 W66 0Ohm AM22
RSVD_K32 VCC_SENSE P_VCCCORE_VCCSENSE_50OHM 81 VCCGT18 VCCGT74 VSSIO_SENSE
E33 AC70 W67 /U42
VSS_SENSE VCCGT19 VCCGT75
1
AK32 P_VCCCORE_VSSSENSE_50OHM 81 AC71 W68 H21
RSVD_AK32 VCCGT20 VCCGT76 VSSSA_SENSE
1
B63 J43 W69 H20
VIDALERT# VCCGT21 VCCGT77 VCCSA_SENSE
AB62 A63 P_SVID_ALERT#_X3 R0604 1 2 220Ohm J45 W70
VCCOPC_AB62 VIDSCK P_SVID_ALERT#_50OHM_X2 81 VCCGT22 VCCGT78
P62 D64 P_SVID_CLK_X3 +VCCSTG P_SVID_ALERT#_X3 J46 W71 R0657 R0658
VCCOPC_P62 VIDSOUT VCCGT23 VCCGT79
V62 P_SVID_DATA_X3 J48 Y62 1 2 1 2 SKL-ULT
VCCOPC_V62 VCCGT24 VCCGT80
G20 J50 0Ohm 0Ohm REV = <REV>
VCCSTG_G20 VCCGT25
H63 J52 /U22f /U22f
VCC_OPC_1P8_H63 VCCGT26
J53 AK42
VCCGT27 VCCGTX_AK42
G61 J55 AK43
VCC_OPC_1P8_G61 VCCGT28 VCCGTX_AK43
+VCCGT J56 AK45
AC63 REV = <REV> SVID CLOCK J58
VCCGT29 VCCGTX_AK45
AK46
VCCOPC_SENSE VCCGT30 VCCGTX_AK46
AE63 J60 REV = <REV> AK48
VSSOPC_SENSE VCCGT31 VCCGTX_AK48
K48 AK50
VCCGT32 VCCGTX_AK50
AE62 K50 AK52
VCCEOPIO_1 VCCGT33 VCCGTX_AK52
AG62 1 R0654 2 K52 AK53
VCCEOPIO_2 VCCGT34 VCCGTX_AK53
0Ohm U22_VCCGT K53 AK55
VCCGT35 VCCGTX_AK55
AL63 SL0617 1 2 nbs_r0603_h24_000s K55 AK56
VCCEOPIO_SENSE 0402 P_SVID_CLK_50OHM_X2 81 VCCGT36 VCCGTX_AK56
AJ62 P_SVID_CLK_X3 /U22 K56 AK58
VSSEOPIO_SENSE VCCGT37 VCCGTX_AK58
K58 AK60
VCCGT38 VCCGTX_AK60
K60 AK70
VCCGT39 VCCGTX_AK70
SKL-ULT L62 AL43
CPU W/OPC L63
VCCGT40 VCCGTX_AL43
AL46 U42_VCCCORE
VCCGT41 VCCGTX_AL46
L64 AL50
VCCGT42 VCCGTX_AL50
L65 AL53 +1.2V
VCCGT43 VCCGTX_AL53
L66 AL56
L67
VCCGT44 VCCGTX_AL56
AL60 2A CPU - VDDQ DECAPS- Place close to the package
VCCGT45 VCCGTX_AL60
L68 AM48
VCCGT46 VCCGTX_AM48
L69 AM50
VCCGT47 VCCGTX_AM50
L70 AM52
VCCGT48 VCCGTX_AM52
L71 AM53
VCCGT49 VCCGTX_AM53
M62 AM56
VCCGT50 VCCGTX_AM56
1
N63 AM58 N/A N/A N/A
VCCGT51 VCCGTX_AM58
N64 AU58 C0662 C0618 C0603 C0606 C0614 C0658 C0648
VCCGT52 VCCGTX_AU58
N66 AU63 @10UF/6.3V 10UF/6.3V @10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VCCGT53 VCCGTX_AU63
2
N67 BB57 nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s
VCCGT54 VCCGTX_BB57
N69 BB66
VCCGT55 VCCGTX_BB66
20170727 Brian
J70 AK62 R0634 0Ohm /@
81 P_VCCGT_VCCSENSE_50OHM VCCGT_SENSE VCCGTX_SENSE Unmount C0603/C0662 For POI cost down.
J69 AL61 R0635 2 0Ohm 1 /@ P_VCCGT_VCCSENSE_50OHM
81 P_VCCGT_VSSSENSE_50OHM VSSGT_SENSE VSSGTX_SENSE
2 1 P_VCCGT_VSSSENSE_50OHM +VCCST
+VCCIO +VCCSTG +1.0V_VCCST +VCCST +1.0V_VCCPLL
SKL-ULT
SL0630 1 2 0.04A CPU - VCCGT DECAPS- Underneath the package SL0634 1 2 120mA SL0602 1 2 120mA
0603 0603 0603
+VCCGT
1
31A 2+2 C0616 C0602
1UF/6.3V 1UF/6.3V
Volume Segment
2
+VCCIO is supplied +1.0VS (shared with +VCCSTG)
1
C0601 C0604 C0620 C0607 C0608 C0609 C0610 C0611 C0626 C0617 C0660 C0659
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
@ @ @ @ @ @ @ @ @
20170717 Brian
Change SL0601.2 +VCCIO_CPU to +VCCSA
+VCCIO 7.94A 318mil +VCCSA for CPU VCORE plane.
to PJP8104 4.5A 180mil
Vinafix.com
to U0301N 3.4A 136mil
to SL0630 0.04A 1.6mil
CPU - VCCIO DECAPS- Place close to the package
1
C0628 C0629 C0630 C0631 C0632 C0652 C0643 C0654 C0636 C0666 C0638 SL0601 1 2 3.1A
0805
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
@ @ @ @ @ @ @ @ @ 1UF/6.3V 1UF/6.3V
1
SL0603 1 2 C0622
0805 20170718 Brian
1UF/6.3V Remove C0621/C0619/C0605/C0635 and
2
C0637/0655 change to mount for CPU Vcore.
1
C0640 C0613 C0656 C0667
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
+VCCSA
5.1A
CPU - VCCSA DECAPS- Underneath the package
1
C0625 C0612 C0649 C0650
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
@ @ @ @
2
CPU - VCCGT DECAPS- Place close to the package
1
C0651 C0633 C0653 C0637 C0655 C0657
1UF/6.3V 1UF/6.3V 1UF/6.3V
+VCCGT 1UF/6.3V 1UF/6.3V 1UF/6.3V @
2
CAP above 22UF move to PWR page
+VCCSA
CPU - VCCSA DECAPS- Place close to the package
1
C0664 C0639 C0641 C0668
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_POEWR
Size
D
CPU XDP connector
Vinafix.com
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_XDP
Size
C
Main Board
+1.0V_VCCST
U0301D
T0801 1 D63
CATERR#
H_CATERR# A54
31 PECI_EC PECI
PECI_EC C65 JTAG
PROCHOT#
R0802 1 1% 2 1KOhm H_PROCHOT_D# C63
THERMTRIP#
THERMTRIP# A65 B61
SKTOCC# PROC_TCK
CPU MISC D60 XDP_TCLK_CPU
PROC_TDI
C55 A61 XDP_TDI_CPU
BPM#[0] PROC_TDO
D55 C60 XDP_TDO_CPU
BPM#[1] PROC_TMS
T0803 1 B54 B59 XDP_TMS_CPU
BPM#[2] PROC_TRST#
T0804 1 XDP_BPM2 C56 XDP_TRST_CPU#
BPM#[3]
XDP_BPM3 B56 1 T0802
PCH_JTAG_TCK
A6 D59 PCH_JTAG_TCK
GPP_E3/CPU_GP0 PCH_JTAG_TDI
A7 A56 PCH_JTAG_TDI
GPP_E7/CPU_GP1 PCH_JTAG_TDO
BA5 C59 PCH_JTAG_TDO
GPP_B3/CPU_GP2 PCH_JTAG_TMS
AY5 C61 PCH_JTAG_TMS
GPP_B4/CPU_GP3 PCH_TRST#
A59 PCH_TRST#
JTAGX
AT16 XDP_TCK_JTAGX
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
SKL-ULT
2
2
REV = <REV>
R0813 R0812 R0811 R0810 20160218 X541UV
49.9Ohm 49.9Ohm 49.9Ohm 49.9Ohm R0803,R0804,R0805,R0807,R0814,R0820,R0806 unstuff +VCCSTG
1% 1% 1% 1%
1
@ @
R0803 1 2 0Ohm R0820 1 2 51Ohm
XDP_TCLK_CPU XDP_TCK_JTAGX XDP_TDO_CPU
R0804 1 @ 2 0Ohm
XDP_TDI_CPU PCH_JTAG_TDI
@
R0805 1 @ 2 0Ohm R0806 1 2 51Ohm
Vinafix.com
XDP_TDO_CPU PCH_JTAG_TDO XDP_TCLK_CPU
R0807 1 @ 2 0Ohm
20150108 XDP_TMS_CPU PCH_JTAG_TMS
CPU SIDEBAND SIGNALS Checking

+VCCSTG R0814 1 @ 2 0Ohm
SL0801~0803 near device side
XDP_TRST_CPU# PCH_TRST#
1
R0809
1KOhm OD
2
R0808
1 2 2 1 SL0802
0402 THRO_CPU# 31
H_PROCHOT_D# H_PROCHOT_D#_R
499OHM 2 1 SL0801
0402 IMVP8_VRHOT# 81
1
C0801 2 1 SL0803
0402 PWRLIMIT#_CPU 90
43PF/50V
2
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_MISC,JTAG,CLK
Size
B
Main Board
U0301S U0301T
RESERVED SIGNALS-1 SPARE
E68 BB68 AW69 F6

CFG[0] RSVD_TP_BB68 RSVD_AW69 RSVD_F6
B67 BB69 AW68 E3
CFG[1] RSVD_TP_BB69 RSVD_AW68 RSVD_E3
D65 AU56 C11 XTAL24_U42_IN
CFG[2] RSVD_AU56 RSVD_C11
D67 AK13 AW48 B11
CFG[3] RSVD_TP_AK13 RSVD_AW48 RSVD_B11
E70 AK12 C7 A11
CFG[4] RSVD_TP_AK12 RSVD_C7 RSVD_A11
CFG4 C68 XTAL24_U42_OUT U12 D12
CFG[5] RSVD_U12 RSVD_D12
D68 BB2 U11 C12
CFG[6] RSVD_BB2 RSVD_U11 RSVD_C12
C67 BA3 H11 F52
CFG[7] RSVD_BA3 RSVD_H11 RSVD_F52
1
F71
CFG[8]
G69 C0901 C0902
CFG[9]
F70 AU5 1UF/6.3V 1UF/6.3V
CFG[10] TP5
2
G68 AT5 @ @
CFG[11] TP6
H70 REV = <REV> REV = <REV>
SKL-ULT
CFG[12]
G71
CFG[13]
H69 D5
CFG[14] RSVD_D5
G70 D4
CFG[15] RSVD_D4
B2
RSVD_B2
E63 C2
F63
CFG[16] RSVD_C2 20171023 Jack Add XTAL 24M for KBL-R.
CFG[17]
B3
RSVD_B3
E66 A3
CFG[18] RSVD_A3
F66
CFG[19]
AW1 XTAL 24MHz
RSVD_AW1
E60 07009-00062000 C0903
CFG_RCOMP
E1 2 1
RSVD_E1
E8 E2 XTAL24_U42_IN
ITP_PMODE RSVD_E2
3
27PF/50V
AY2 BA4 /U42
1
RSVD_AY2 RSVD_BA4
AY1 BB4 R0907 X0902
RSVD_AY1 RSVD_BB4
1MOhm 24Mhz 4
D1 A4 /U42 /U42
2
RSVD_D1 RSVD_A4
D3 C4 2
2
R0902 RSVD_D3 RSVD_C4
49.9Ohm
K46 BB5 C0904
1% RSVD_K46 TP4
1
K45 R0904 0OHM 2 1
RSVD_K45
A69 XTAL24_U42_OUT 1 2 XTAL24_OUT_X2
1
RSVD_A69
AL25 B69 /U42 27PF/50V
RSVD_AL25 RSVD_B69
AL27 /U42 GND
RSVD_AL27
AY3
RSVD_AY3
C71
Vinafix.com
RSVD_C71
B70 D71
1
RSVD_B70 RSVD_D71
C70 SL0901
2040
RSVD_C70
F60
RSVD_F60
C54
RSVD_C54
A52 D54
2
RSVD_A52 RSVD_D54
BA70 AY4
RSVD_TP_BA70 TP1
BA68 BB3
RSVD_TP_BA68 TP2
J71 AY71
RSVD_J71 VSS_AY71
J68 AR56
RSVD_J68 ZVM#
1
F65 AW71 SL0902
2040
VSS_F65 RSVD_TP_AW71
G65 AW70
VSS_G65 RSVD_TP_AW70
F61 AP56 R0905
2
RSVD_F61 MSM#
E61 C64
RSVD_E61 PROC_SELECT# +1.0V_VCCST
1 @ 2
100KOhm
SKL-ULT
CFG STRAPS
R0901 1 2 1KOhm
CFG4
1 0 NOTE
BOM
STALL RESET SEQUENCE Project Name Rev

AFTER PCU PLL LOCK
CFG0 NO STALL STALL UNTIL DE-ASSERTED X407UA/UV R1.0
Title : CPU_CFG,RSVD
Size
CFG4 DISABLE ENABLE eDP ENABLE Dept.: ASUSTeK COMPUTER INC. Engineer: Brian Chen
Custom
CPU - VCC DECAPS- Underneath the package
+VCCCORE
28A 2+2

1
1
C1028 C1030 C1031 C1034 C1041 C1043 C1044 C1045
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
@ @ @ @ @
2
2
1
C1046 C1048 C1049

1UF/6.3V 1UF/6.3V 1UF/6.3V
@ @
2
1
C1062 C1061 C1063 C1065 C1064 C1067 C1066
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
@ @ @
2
2
Vinafix.com
1
C1068
1UF/6.3V
@
2
CPU - VCC DECAPS- Place close to the package
+VCCCORE
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_POWER_CAP
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
Size
D
BOM
Project Name www.teknisi-indonesia.com Rev
X407UA/UV R1.0
Title : Vinafix.com
Size
C
Dept.: ASUSTeK COMPUTER INC. Engineer:
Vinafix.com
<Variant Name>
Title : DDR4_TERMINATION_A
Engineer: Brian Chen

C X407UA/UV R1.0

Vinafix.com
<Variant Name>
Title : DDR4_ON-BOARD_A_L32

C X407UA/UV R1.0

<Variant Name>
Title : DDR4_ON-BOARD_A_H32
Engineer:
Vinafix.com Brian Chen
C X407UA/UV R1.0

2016/11/23 X542UA_#86, Add SO-DIMM (ChA), remove P13, P14 & P15 DRAM
2016/12/05 X542UA_R1.0 #98, DDR SWAP

2016/12/07 X542UA_R1.0 #A3, DDR SWAP
M_A_DQ[63:0] 5
SWAP
+1.2V +VTT +2.5V +3VS
J1601A
137 8
5 M_A_CLK_DDR0 CK0_T DQ0
139 7 M_A_DQ4 J1601B
5 M_A_CLK_DDR#0 CK0_C DQ1
138 20 M_A_DQ1 163 258
5 M_A_CLK_DDR1 CK1_T DQ2 VDD19 VTT
140 21 M_A_DQ7 160
5 M_A_CLK_DDR#1 CK1_C DQ3 D0 VDD18
4 M_A_DQ3 159
DQ4 VDD17
109 3 M_A_DQ0 2017/0606 X507 SWAP 154 259
5 M_A_CKE0 CKE0 DQ5 VDD16 VPP2
110 16 M_A_DQ5 153 257
5 M_A_CKE1 CKE1 DQ6 VDD15 VPP1
17 M_A_DQ6 148
DQ7 VDD14
149 28 M_A_DQ2 147
5 M_A_CS#0 S0* DQ8 VDD13
157 29 M_A_DQ8 142
5 M_A_CS#1 S1* DQ9 VDD12
41 M_A_DQ13 141 SL1604
DQ10 VDD11
155 42 M_A_DQ10 136 255 1 2 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
5 M_A_ODT0 ODT0 DQ11 D1 VDD10 VDDSPD 0402
161 24 M_A_DQ11 135
5 M_A_ODT1 ODT1 DQ12 VDD9
1
25 M_A_DQ9 130 C1628 C1627
DQ13 VDD8
115 38 M_A_DQ12 2017/0606 X507 SWAP 129 0.1UF/10V 2.2UF/10V
5 M_A_BG0 BG0 DQ14 VDD7
113 37 M_A_DQ15 124
5 M_A_BG1 BG1 DQ15 VDD6
2
150 50 M_A_DQ14 123
5 M_A_BA0 BA0 DQ16 VDD5
145 49 M_A_DQ18 118
5 M_A_BA1 BA1 DQ17 VDD4
62 M_A_DQ17 117 GND GND
5 M_A_A[13:0] DQ18 VDD3
144 63 M_A_DQ16 112
A0 DQ19 D2 VDD2
M_A_A0 133 46 M_A_DQ23 111
A1 DQ20 VDD1
M_A_A1 132 45 M_A_DQ20
A2 DQ21
M_A_A2 131 58 M_A_DQ21 2017/0606 X507 SWAP
A3 DQ22
M_A_A3 128 59 M_A_DQ19 263 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
A4 DQ23 NP_NC1
M_A_A4 126 70 M_A_DQ22 264 2017/03/16 X542UA_R2.0 #03, Modify SA0 to pull down
A5 DQ24 NP_NC2
M_A_A5 127 71 M_A_DQ28
A6 DQ25
M_A_A6 122 83 M_A_DQ27 261 +3VS +3VS +3VS
A7 DQ26 MT1
M_A_A7 125 84 M_A_DQ30 262
A8 DQ27 D3 MT2
M_A_A8 121 66 M_A_DQ25
A9 DQ28
M_A_A9 146 67 M_A_DQ24 251 252
A10_AP DQ29 VSS1 VSS48
2
M_A_A10 120 79 M_A_DQ29 2017/0606 X507 SWAP 247 248
A11 DQ30 VSS2 VSS49
M_A_A11 119 80 M_A_DQ31 243 244 R1601 R1609 R1602
A12 DQ31 VSS3 VSS50
M_A_A12 158 174 M_A_DQ26 239 238 @ @ @
A13 DQ32 VSS4 VSS51 0Ohm 0Ohm 0Ohm
+1.2V M_A_A13 151 173 M_A_DQ35 235 234
5 M_A_WE# A14_WE* DQ33 VSS5 VSS52
156 187 M_A_DQ36 231 230
5 M_A_CAS# A15_CAS* DQ34 VSS6 VSS53
1
152 186 M_A_DQ39 227 226
5 M_A_RAS# A16_RAS* DQ35 D4 VSS7 VSS54
2
170 M_A_DQ33 223 222 M_A_DIMM0_SA2

DQ36 VSS8 VSS55
169 M_A_DQ32 217 218 M_A_DIMM0_SA1
DQ37 VSS9 VSS56
R1605 114 183 M_A_DQ37 2017/0606 X507 SWAP 213 214 M_A_DIMM0_SA0
5 M_A_ACT# ACT* DQ38 VSS10 VSS57
M_A_VREFCA 240Ohm 182 M_A_DQ38 209 210
DQ39 VSS11 VSS58
143 195 M_A_DQ34 205 206
5 M_A_PAR PARITY DQ40 VSS12 VSS59
1
2
116 194 M_A_DQ41 201 202
5 M_A_ALERT# ALERT* DQ41 VSS13 VSS60
134 207 M_A_DQ44 197 196 SL1603 SL1602 SL1601
EVENT* DQ42 VSS14 VSS61
0402
0402
0402
M_A_DIMM0_EVENT# 108 208 M_A_DQ47 193 192
5,18,70 DDR4_DRAMRST# RESET* DQ43 D5 VSS15 VSS62
191 M_A_DQ43 189 188
DQ44 VSS16 VSS63
164 190 M_A_DQ40 185 184
VREFCA DQ45 VSS17 VSS64
1
203 M_A_DQ45 2017/0606 X507 SWAP 181 180
DQ46 VSS18 VSS65
Place close to SO-DIMM
1
C1617 C1612 254 204 M_A_DQ46 175 176

6,18 SMB_DATA_S3 SDA DQ47 VSS19 VSS66
0.1UF/10V 2.2UF/10V 253 216 M_A_DQ42 171 172
6,18 SMB_CK_S3 SCL DQ48 VSS20 VSS67
215 M_A_DQ48 167 168 GND GND GND
DQ49 VSS21 VSS68
2
166 228 M_A_DQ52 107 106

SA2 DQ50 VSS22 VSS69
M_A_DIMM0_SA2 260 229 M_A_DQ55 103 102 WRITE ADDRESS: 0X
SA1 DQ51 D6 VSS23 VSS70
GND GND M_A_DIMM0_SA1 256 211 M_A_DQ50 99 98
M_A_DIMM0_SA0 212 M_A_DQ51 93 94
DQ53 VSS25 VSS72
224 M_A_DQ53 2017/0606 X507 SWAP 89 90
Place close to SO-DIMM DQ54
225 M_A_DQ54 85
VSS26 VSS73
86
DQ55 VSS27 VSS74
92 237 M_A_DQ49 81 82
CB0_NC DQ56 VSS28 VSS75
91 236 M_A_DQ57 77 78
101 249 M_A_DQ58 73 72
105 250 M_A_DQ63 69 68
Vinafix.com
88 232 M_A_DQ62 65 64
CB4_NC DQ60 D7 VSS32 VSS79
87 233 M_A_DQ60 2017/0606 X507 SWAP 61 60
100 245 M_A_DQ56 57 56
104 246 M_A_DQ61 51 52
M_A_DQ59 47 48
M_A_DQS[7:0] 5 VSS36 VSS83
+1.2V 12 13 43 44
DM0*/DBI0* DQS0_T VSS37 VSS84
33 34 M_A_DQS0 39 40
54 55 M_A_DQS1 X507/2017/06/06 SWAP 35 36 +VTT +2.5V
75 76 M_A_DQS2 31 30 nbs_c0603_h37_000s nbs_c0603_h37_000s
178 179 M_A_DQS3 27 26
199 200 M_A_DQS4 23 22
1
220 221 M_A_DQS5 19 18 C1622 C1607 C1615
241 242 M_A_DQS6 15 14 C1603 C1619 0.1UF/16V C1608 C1604 0.1UF/16V 0.1UF/16V
96 97 M_A_DQS7 9 10 10UF/6.3V 10UF/6.3V @/EMI 10UF/6.3V 10UF/6.3V @/EMI @/EMI
2
5 6 @ @
M_A_DQS#[7:0] 5 VSS46 VSS93
11 1 2
DQS0_C VSS47 VSS94
32 M_A_DQS#0 X507/2017/06/06 SWAP GND GND GND GND GND GND GND
DQS1_C
53 M_A_DQS#1 DDR4_DIMM_260P nbs_c0603_h37_000s nbs_c0603_h37_000s
DQS2_C
74 M_A_DQS#2
DQS3_C Place close to SO-DIMM Socket Place close to SO-DIMM Socket
177 M_A_DQS#3
DQS4_C (+VTT Pin) (+VPP Pin)
198 M_A_DQS#4 GND GND
DQS5_C
219 M_A_DQS#5 2017/02/06 X542UA_R1.1 #26, EMI solution 2017/02/06 X542UA_R1.1 #26, EMI solution
DQS6_C
240 M_A_DQS#6
For ECC DQS7_C
+1.2V
95 M_A_DQS#7
DQS8_C
T1601 1 162
S2*/C0
T1602 1 M_A_DIMM0_S2 165
S3*/C1
M_A_DIMM0_S3
DDR4_DIMM_260P 20170719 Brian
1
12002-00082100 Remove CE1601 and add C1629/C1630/C1631. @ @ @
C1631 C1629 C1630
20170707 Brian 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
Change J1601 12002-00080100 to 12002-00082100(5.2H). nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s
GND Place
GND close to SO-DIMM Socket (VDD Pin)
GND
'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
NON-ECC DIMM: NOT CONNECTED
1
1
1
C1606 C1618 C1613 C1626 C1614 C1610 C1602 C1620
2
2
2
EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH @ @ @ @/EMI
GND GND GND GND GND GND GND GND

nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s
1
C1616
0.1UF/16V C1605 C1611 C1625 C1621 C1624 C1609 C1623
@/EMI 1UF/6.3V 1UF/6.3V 1UF/6.3V 2.2UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
20170727 Brian
Add C1605/C1621/C1624 For POI cost down.
2017/02/06 X542UA_R1.1 #26, EMI solution
BOM
Project Name Rev
X507UA/UV R2.0
Title : DDR3_ON-BOARD_B_L32
Size
C
Dept.: NB2_RD1_EE1 Engineer: Bull Tsai
2016/12/05 X542UA_R1.0 #99, DDR SWAP
2016/11/16 X542UA_#78, Remove R1709
M_B_DQ[63:0] 5
SWAP
+1.2V +VTT +2.5V +3VS
J1701A
137 8
5 M_B_CLK_DDR0 CK0_T DQ0
139 7 M_B_DQ8 J1701B
5 M_B_CLK_DDR#0 CK0_C DQ1
138 20 M_B_DQ12 163 258
5 M_B_CLK_DDR1 CK1_T DQ2 VDD19 VTT
140 21 M_B_DQ15 160
5 M_B_CLK_DDR#1 CK1_C DQ3 D1 VDD18
4 M_B_DQ11 159
DQ4 VDD17
109 3 M_B_DQ13 154 259
5 M_B_CKE0 CKE0 DQ5 VDD16 VPP2
110 16 M_B_DQ9 2017/0606 X507 SWAP 153 257
5 M_B_CKE1 CKE1 DQ6 VDD15 VPP1
17 M_B_DQ10 148
DQ7 VDD14
149 28 M_B_DQ14 147
5 M_B_CS#0 S0* DQ8 VDD13
157 29 M_B_DQ4 142
5 M_B_CS#1 S1* DQ9 VDD12 SL1704
41 M_B_DQ5 141
DQ10 VDD11
155 42 M_B_DQ7 136 255 1 2 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
5 M_B_ODT0 ODT0 DQ11 D0 VDD10 VDDSPD 0402
161 24 M_B_DQ6 135
5 M_B_ODT1 ODT1 DQ12 VDD9
1
25 M_B_DQ1 130 C1705 C1709
DQ13 VDD8
115 38 M_B_DQ0 2017/0606 X507 SWAP 129 0.1UF/10V 2.2UF/10V
5 M_B_BG0 BG0 DQ14 VDD7
113 37 M_B_DQ3 124
5 M_B_BG1 BG1 DQ15 VDD6
2
150 50 M_B_DQ2 123
5 M_B_BA0 BA0 DQ16 VDD5
145 49 M_B_DQ20 118
5 M_B_BA1 BA1 DQ17 VDD4
62 M_B_DQ17 117 GND GND
5 M_B_A[13:0] DQ18 VDD3
144 63 M_B_DQ21 112
A0 DQ19 D2 VDD2
M_B_A0 133 46 M_B_DQ22 111
A1 DQ20 VDD1
M_B_A1 132 45 M_B_DQ19
A2 DQ21
M_B_A2 131 58 M_B_DQ16 2017/0606 X507 SWAP
A3 DQ22
M_B_A3 128 59 M_B_DQ23 263
A4 DQ23 NP_NC1
M_B_A4 126 70 M_B_DQ18 264 2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL
A5 DQ24 NP_NC2
M_B_A5 127 71 M_B_DQ28
A6 DQ25 +3VS +3VS +3VS
M_B_A6 122 83 M_B_DQ24 261
A7 DQ26 MT1
M_B_A7 125 84 M_B_DQ26 262
A8 DQ27 D3 MT2
M_B_A8 121 66 M_B_DQ27
A9 DQ28
M_B_A9 146 67 M_B_DQ29 251 252
A10_AP DQ29 VSS1 VSS48
2
M_B_A10 120 79 M_B_DQ25 2017/0606 X507 SWAP 247 248
A11 DQ30 VSS2 VSS49
M_B_A11 119 80 M_B_DQ31 243 244 R1703 SL1702 R1704
A12 DQ31 VSS3 VSS50
0402
M_B_A12 158 174 M_B_DQ30 239 238 @ 0Ohm @ 0Ohm
A13 DQ32 VSS4 VSS51
+1.2V M_B_A13 151 173 M_B_DQ36 235 234
5 M_B_WE# A14_WE* DQ33 VSS5 VSS52
156 187 M_B_DQ32 231 230
5 M_B_CAS# A15_CAS* DQ34 VSS6 VSS53
1
152 186 M_B_DQ39 227 226
5 M_B_RAS# A16_RAS* DQ35 D4 VSS7 VSS54
2
170 M_B_DQ34 223 222 M_B_DIMM0_SA2

DQ36 VSS8 VSS55
169 M_B_DQ33 217 218 M_B_DIMM0_SA1
DQ37 VSS9 VSS56
R1707 114 183 M_B_DQ37 2017/0606 X507 SWAP 213 214 M_B_DIMM0_SA0
5 M_B_ACT# ACT* DQ38 VSS10 VSS57
M_B_VREFCA 240Ohm 182 M_B_DQ38 209 210
DQ39 VSS11 VSS58
143 195 M_B_DQ35 205 206
5 M_B_PAR PARITY DQ40 VSS12 VSS59
1
2
116 194 M_B_DQ41 201 202
5 M_B_ALERT# ALERT* DQ41 VSS13 VSS60
134 207 M_B_DQ40 197 196 SL1703 R1701 SL1701
EVENT* DQ42 VSS14 VSS61
0402
0402
M_B_DIMM0_EVENT# 108 208 M_B_DQ42 193 192 @
5,17,70 DDR4_DRAMRST# RESET* DQ43 D5 VSS15 VSS62 0Ohm
191 M_B_DQ47 189 188
DQ44 VSS16 VSS63
164 190 M_B_DQ45 185 184
VREFCA DQ45 VSS17 VSS64
1
203 M_B_DQ44 2017/0606 X507 SWAP 181 180
DQ46 VSS18 VSS65
Place close to SO-DIMM
1
C1704 C1701 254 204 M_B_DQ43 175 176

6,17 SMB_DATA_S3 SDA DQ47 VSS19 VSS66
0.1UF/10V 2.2UF/10V 253 216 M_B_DQ46 171 172
6,17 SMB_CK_S3 SCL DQ48 VSS20 VSS67
215 M_B_DQ55 167 168 GND GND GND
DQ49 VSS21 VSS68
2
166 228 M_B_DQ53 107 106

M_B_DIMM0_SA2 260 229 M_B_DQ54 103 102 WRITE ADDRESS: 0XA4
SA1 DQ51 D6 VSS23 VSS70
GND GND M_B_DIMM0_SA1 256 211 M_B_DQ48 99 98
M_B_DIMM0_SA0 212 M_B_DQ52 93 94
DQ53 VSS25 VSS72
224 M_B_DQ49 2017/0606 X507 SWAP 89 90
Place close to SO-DIMM DQ54
225 M_B_DQ51 85
VSS26 VSS73
86
DQ55 VSS27 VSS74
92 237 M_B_DQ50 81 82
91 236 M_B_DQ57 77 78
101 249 M_B_DQ59 73 72
105 250 M_B_DQ62 69 68
CB3_NC DQ59 D7 VSS31 VSS78
88 232 M_B_DQ61 65 64
87 233 M_B_DQ58 61 60
Vinafix.com
100 245 M_B_DQ56 2017/0606 X507 SWAP 57 56
104 246 M_B_DQ60 51 52
M_B_DQ63 47 48
M_B_DQS[7:0] 5 VSS36 VSS83
+1.2V 12 13 43 44
33 34 M_B_DQS1 20161205 swap 39 40
54 55 M_B_DQS0 35 36 +VTT +2.5V
75 76 M_B_DQS2 31 30 nbs_c0603_h37_000s nbs_c0603_h37_000s
178 179 M_B_DQS3 27 26
199 200 M_B_DQS4 23 22
1
220 221 M_B_DQS5 19 18 C1717
241 242 M_B_DQS6 15 14 C1711 C1726 0.1UF/16V C1725 C1710 C1727 C1721
96 97 M_B_DQS7 9 10 10UF/6.3V 10UF/6.3V @/EMI 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V
2
5 6 @ @ @ @
M_B_DQS#[7:0] 5 VSS46 VSS93
11 1 2
DQS0_C VSS47 VSS94
32 M_B_DQS#1 20161205 swap GND GND GND GND GND GND GND
DQS1_C
53 M_B_DQS#0 DDR4_DIMM_260P nbs_c0603_h37_000s nbs_c0603_h37_000s
DQS2_C
74 M_B_DQS#2
DQS3_C Place close to SO-DIMM Socket Place close to SO-DIMM Socket
177 M_B_DQS#3
DQS4_C (+VTT Pin) (+VPP Pin)
198 M_B_DQS#4 GND GND
DQS5_C
219 M_B_DQS#5 2017/02/06 X542UA_R1.1 #26, EMI solution
DQS6_C
240 M_B_DQS#6
For ECC DQS7_C +1.2V
95 M_B_DQS#7
DQS8_C
T1702 1 162
S2*/C0
T1701 1 M_B_DIMM0_S2 165
S3*/C1
M_B_DIMM0_S3
DDR4_DIMM_260P 20170707 Brian
12002-00080300 Remove CE1701 for no-location.
'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
NON-ECC DIMM: NOT CONNECTED
20170707 Brian
Change J1701 12002-00082500 to 12002-00080300(4H). Place close to SO-DIMM Socket (VDD Pin)
EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH
1
1
1
C1712 C1715 C1707 C1722 C1719 C1703 C1716 C1706
2
2
2
@/EMI @ @/EMI @

1
C1718 C1723
C1708 0.1UF/16V C1702 C1714 0.1UF/16V C1724 C1720 C1713
1UF/6.3V @/EMI 1UF/6.3V 1UF/6.3V @/EMI 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
@ @
20170727 Brian
Add C1703/C1716 and unmount C1715/C1719 For POI cost down.
2017/02/06 X542UA_R1.1 #26, EMI solution
<Variant Name>
Project Name Rev
X507UA/UV R2.0
Title : DDR4_SO-DIMM_1
Size
C
Dept.: Engineer: Bull Tsai
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
Size
C
U0301I
CSI-2
A36 C37
CSI2_DN0 CSI2_CLKN0
B36 D37
CSI2_DP0 CSI2_CLKP0
C38 C32
CSI2_DN1 CSI2_CLKN1
D38 D32
CSI2_DP1 CSI2_CLKP1
C36 C29
CSI2_DN2 CSI2_CLKN2
D36 D29
CSI2_DP2 CSI2_CLKP2
A38 B26
CSI2_DN3 CSI2_CLKN3
B38 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 R2002 @ 100Ohm

CSI2_DN4 CSI2_COMP
D31 B7 2 1
CSI2_DP4 GPP_D4/FLASHTRIG
C33
CSI2_DN5
D33
CSI2_DP5 EMMC
A31
CSI2_DN6
B31 AP2 GND
CSI2_DP6 GPP_F13/EMMC_DATA0
A33 AP1
CSI2_DN7 GPP_F14/EMMC_DATA1
B33 AP3
AN3
GPP_F16/EMMC_DATA3
A29 AN1
B29 AN2
C28 AM4
D28 AM1
A27 REV = <REV>
CSI2_DN10
B27 AM2
CSI2_DP10 GPP_F21/EMMC_RCLK
C27 AM3
CSI2_DN11 GPP_F22/EMMC_CLK
D27 AP4
CSI2_DP11 GPP_F12/EMMC_CMD
AT1 R2001 1 @ 2 200Ohm

EMMC_RCOMP
SKL-ULT
GND
Vinafix.com
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_PCH_CSI2,EMMC
Size
B
Main Board
20170720 Brian U0301F

Remove SL2138 for EMI Xtal 0ohm space. LPSS ISH
AN8 P2
32 FP_GSPI0_CS# GPP_B15/GSPI0_CS# GPP_D9
AP7 P3 PCB_ID0
32 FP_GSPI0_CLK GPP_B16/GSPI0_CLK GPP_D10
AP8 P4 DMIC_ID
FingerPrint 32 FP_GSPI0_MISO
@ SL2101 1 2 AR7
GPP_B17/GSPI0_MISO GPP_D11
P1 TOUCHPAD_ID
32 FP_GSPI0_MOSI 0402 GPP_B18/GSPI0_MOSI GPP_D12
PCH_GPPB18 TOUCH_PANEL_ID
AM5 M4 1 T2112
54 BT_ON/OFF# GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA
AN7 N3 SATA_ODD_PWRGT 1 T2113
77 GPU_EVENT# GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
20150105 AP5 SATA_ODD_DA#
77,78 DGPU_FB_CLAMP_GPIO GPP_B21/GSPI1_MISO
Checking AN5 N1
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA
R2138 change to SL PCH_GPPB22 N2
GPP_D8/ISH_I2C1_SCL
R2171 / R2173 / R2118 AB1
GPP_C8/UART0_RXD
R2114 / R2136 / R2131 AB2 AD11
GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA
remove (GPU side reserve) 2016/03/08 X540UP no GC6 W4 AD12
GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
AB3
GPP_C11/UART0_CTS#
AD1 U1
25,78,94 DGPU_PWROK GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD /SML0BDATA/I2C4B_SDA TOUCHPAD_INTR# 32
AD2 U2 TOUCHPAD_INTR#
71 GPU_RST# GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD /SML0BCLK/I2C4B_SCL
AD3 U3 WLAN_LED_R 1 T2114 20170630 Brian
78 DGPU_PWR_EN# GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS#
AD4 U4 SNSR_HUB_PWREN Remove TPanel_INT#(R2169)
GPP_C23/UART2_CTS# GPP_D16 /ISH_UART0_CTS#/SML0BALERT# FP_INT# 32 for Non-Touch Panel.
20170630 Brian AC1
GPP_C12/UART1_RXD/ISH_UART1_RXD
Remove I2C2_SDA_TCHPANEL / U7 AC2 DIMM_SEL0
I2C2_SCL_TCHPANEL and TPanel_INT# GPP_C16/I2C0_SDA GPP_C13/UART1_TXD/ISH_UART1_TXD
U6 AC3 DIMM_SEL1
for Non-Touch Panel. GPP_C17/I2C0_SCL GPP_C14 /UART1_RTS#/ISH_UART1_RTS#
AB4 DIMM_SEL2
GPP_C15 /UART1_CTS#/ISH_UART1_CTS# FP_RST#_GPIO 32
U8
GPP_C18/I2C1_SDA
I2C1_SDA_TCH_PAD U9 AY8
GPP_C19/I2C1_SCL GPP_A18/ISH_GP0
I2C1_SCL_TCH_PAD BA8
GPP_A19/ISH_GP1
AH9 BB7
GPP_F4/I2C2_SDA GPP_A20/ISH_GP2
AH10 BA7
GPP_F5/I2C2_SCL GPP_A21/ISH_GP3
REV = <REV> AY7
GPP_A22/ISH_GP4
AH11 AW7 +3VS
GPP_F6/I2C3_SDA GPP_A23/ISH_GP5
AH12 AP13
GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6
20150106
AF11 Checking R2154 10KOhm
GPP_F8/I2C4_SDA
AF12 Add for GPU_RST# TOUCHPAD_INTR# 1 2
GPP_F9/I2C4_SCL
20160216 X541UV/UA & DGPU_PWR_EN# R2102 @/VGA 10KOhm
GPU_RST# 1 2
I2C1_SDA_TCH_PAD,I2C1_SCL_TCH_PAD Change port 1
SKL-ULT R2101 1 2 10KOhm
@/VGA
Touch Panel ID Touch Pad ID NFC ID Onboard Memory PCB-ID:

+3VSUS +3VSUS
GPP_D12 GPP_D11 GPP_A21
MEM ID GPP_12 => DIMM_SEL0
GPP_13 => DIMM_SEL1 +3VSUS
GPP_14 => DIMM_SEL2
20151223 X541UV
1
R2111 R2139 Del NFC ID SEL0 (GPIO18) SEL1 (GPIO19) SEL2 (GPIO20) NOTE 20170720 Brian
2
10KOhm 10KOhm Remove R2168 for EMI Xtal 0ohm space.
@ @ 0 0 0 03012-00010200 R2181 R2183 R2185
SAMSUNG/K4A4G085WE-BCPB
10KOhm 10KOhm 10KOhm
2
0 0 1 03012-00030000
@/MEMID_H0 @/MEMID_H1 @/MEMID_H2
TOUCH_PANEL_ID TOUCHPAD_ID SAMSUNG/K4A8G085WB-BCPB +3VSUS
1
0 1 0
1
R2137 R2140
10KOhm 10KOhm H: no NFC 0 1 1 0G DIMM_SEL0 DIMM_SEL1 DIMM_SEL2
Vinafix.com
R2150 @ 10KOhm
2
L: NFC 1 0 0 03012-00030100
2
MICRON/MT40A1G8WE-083E:B WLAN_LED_R R2153 1 @ 2 10KOhm

R2180 R2182 R2184
SNSR_HUB_PWREN 1 2
1 0 1 03012-00010300 10KOhm 10KOhm 10KOhm
MICRON/MT40A512M8RH-083E:B
@/MEMID_L0 @/MEMID_L1 @/MEMID_L2
1 1 0 03012-00030300
1
HYNIX/H5AN8G8NMFR-TFC
1 1 1 03012-00010000
HYNIX/H5AN4G8NAFR-TFC
+3VSUS
+3VSUS 20170627 Brian +3VSUS 20160216 X541UV/UA

change from +3VS to +3VSUS PCB-ID:
GPP_D9 => PCB_ID0 R2122 /VGA 10KOhm
GPP_D10=> PCB_ID1 DGPU_PWR_EN# 1 2
20160223
2
GPP_D10=>DMIC_ID
R2120 R2123
PCB ID1 GPP_D10
PCB ID0 GPP_D9 @
10KOhm
@
10KOhm
PCB ID (AMIC DMIC SEL) No Reboot Boot BIOS Strap Bit BBS
1
+3VSUS +3VSUS
PCB_ID0 DMIC_ID PCB_ID0(GPP_D9) DMIC_ID(GPP_D10) NOTE
2
0 0
R2121 R2124
AMIC
1
10KOhm 10KOhm 0 1 R2125 R2160
DMIC
10KOhm 10KOhm
1 0 @ @
1
2
1 1
PCH_GPPB18 PCH_GPPB22
1
R2149 R2161
1KOhm 1KOhm
@ @
2
I2C1 SELECTION FOR I2C 1.8V FROM LPSS RA AND I2C2 SELECTION FOR I2C 1.8V FROM LPSS RA AND NOTE: Enable No Reboot
PCH will disable the TCO
RB SHOULD BE UNSTUFFED AND RC RB SHOULD BE UNSTUFFED AND RC Timer system reboot feature.
This function is useful when running ITP/XDP.
AND RD SHOULD BE STUFFED AND RD SHOULD BE STUFFED
PCH_GPPB18: weak internal pull down PCH_GPPB22: weal internal pull down
+3VS
PU Enable LPC
PD Disable SPI (Default)
1
C2103 20160218 X541UV

1
R2155 R2158 1UF/6.3V C2103 unstuff for cost

2
4.7KOhm 4.7KOhm @
20170630 Brian
Remove R2190/R2191/C2104 for Non-Touch Panel.
2
I2C1_SCL_TCH_PAD 32
I2C1_SCL_TCH_PAD
I2C1_SDA_TCH_PAD 32
I2C1_SDA_TCH_PAD
<Variant Name>
Project Name Rev
X407UA/UV R1.0
Title : CPU_CFG,RSVD,GND
Size
Custom
HD Audio U0301G
AUDIO
RN2201 near PCH

BA22
HDA_SYNC/I2S0_SFRM
HDA_SYNC_SSP0_SFRM_R AY22
HDA_BLK/I2S0_SCLK
5 6 RN2201C HDA_BCLK_SSP0_SCLK_R BB22 SDIO/SDXC
37 HDA_BCLK_SSP0_SCLK 33OHM HDA_SDO/I2S0_TXD
3 4 RN2201B HDA_BCLK_SSP0_SCLK_R HDA_SDO_SSP0_TXD_R BA21
37 HDA_SYNC_SSP0_SFRM 33OHM 37 HDA_SDI0_SSP0_RXD HDA_SDI0/I2S0_RXD
1 2 RN2201A HDA_SYNC_SSP0_SFRM_R AY21 AB11
37,38,39 HDA_RST#_SSP_MCLK 33OHM HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD
7 8 RN2201D HDA_RST#_SSP_MCLK_R AW22 AB13
37 HDA_SDO_SSP0_TXD 33OHM HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0
HDA_SDO_SSP0_TXD_R HDA_RST#_SSP_MCLK_R J5 AB12
GPP_D23/I2S_MCLK GPP_G2/SD_DATA1
AY20 W12
I2S1_SFRM GPP_G3/SD_DATA2
@ T2209 1 AW20 W11
I2S1_TXD GPP_G4/SD_DATA3
C2201 10PF/50V I2S_SDO_BT W10
TPC26T GPP_G5/SD_CD#
HDA_BCLK_SSP0_SCLK 1 @ 2 AK7 W8
GPP_F1/I2S2_SFRM GPP_G6/SD_CLK
C2202 15PF/50V AK6 W7
GPP_F0/I2S2_SCLK GPP_G7/SD_WP
HDA_SDI0_SSP0_RXD 1 2 AK9
GPP_F2/I2S2_TXD
AK10 BA9
RF requirement GND
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7
BB9
GPP_A16/SD_1P8_SEL
H5 AB7
46 DMIC_CLK_PCH GPP_D19/DMIC_CLK0 SD_RCOMP
D7
46 DMIC_DAT_PCH GPP_D20/DMIC_DATA0
D8 AF13
GPP_D17/DMIC_CLK1 GPP_F23
C8
GPP_D18/DMIC_DATA1
AW5
REV = <REV>
GPP_B14/SPKR
PCH_GPPB14
SKL-ULT
UX303 0809
Top Swap Override

+3VSUS_VCCPAZIO +3VSUS
+3VS
1
R2202 R2201
1
3.3KOHM @ 1KOhm R2210
10KOhm
2
2
@
2
HDA_SDO_SSP0_TXD PCH_GPPB14
1
2
20160113 X541UV modify net R2211
R2203
ACZ_SDOUT:(1) PCH: Internal PD 20k 330Ohm
1KOhm
ohm, VIL=0.35V, VIH=0.65~3.3V (2) @
2
ALC269:VIL<0.35*3.3V, VIH>0.65*3.3V
1
Q2201_D
3
D
Q2201
PCH_GPPB14: weak internal pull down
2N7002K
1
31 PCH_SPI_OV
G
S PU Enable
ACZ_SDOUT is a signal used for Flash
2
Descriptor security Override/ME debug mode PD Disable (default)

HIGH : get overrideen, LOW : disable override
GND
Vinafix.com
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_PCH_AUDIO,SDIO,SDXC
Size
C
U0301J
R2423 @ 1KOhm
CLOCK SIGNALS SUS_CK_R 1 2
SL2424 2 1 D42
71 CLK_PCIE_PEG#_PCH CLKOUT_PCIE_N0
SL2416 2 0402 1 CLK_PCIE_PEG#_PCH_X1 C42
To NV VGA 71 CLK_PCIE_PEG_PCH 0402
CLK_PCIE_PEG_PCH_X1 AR10
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#
CK_REQ_P0#
B42
CLKOUT_PCIE_N1
20170627 Brian A42 F43 1 T2402 @
CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N
AT7 E43 CLK_ITP_BCLK_PCH# 1 @
Remove SSD PCIE signal group. GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P T2403
CK_REQ_P1# CLK_ITP_BCLK_PCH
D41 BA17 R2406 1 @ 2 0Ohm
CLKOUT_PCIE_N2 GPD8/SUSCLK SUS_CK 54
C41 SUS_CK_R +1.0VSUS_PCH
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2# XTAL24_IN
E37 X'TAL_U22
CK_REQ_P2# E35 PCH_24M_IN_U22
D40
XTAL24_OUT
PCH_24M_OUT_U22 170220 TIM R2417
52 CLK_PCIE_SSD# CLKOUT_PCIE_N3
C40 E42 1 2
To SSD 52 CLK_PCIE_SSD CLKOUT_PCIE_P3 XCLK_BIASREF change 2.71k ohm 0.5%/ 接1V check
AT10 XCLK_BIASREF
52 CK_REQ_P3# GPP_B8/SRCCLKREQ3# Close E42
AM18 2.7KOhm
RTCX1
B40 AM20 RTC_X1
CLKOUT_PCIE_N4 RTCX2
A40 RTC_X2
CLKOUT_PCIE_P4
AU8 AN18
GPP_B9/SRCCLKREQ4# SRTCRST#
CK_REQ_P4# AM16 SRTC_RST#
RTCRST#
SL2413 2 1 E40 RTC_RST#
54 CLK_PCIE_WLAN# CLKOUT_PCIE_N5
SL2414 2 0402 1 CLK_PCIE_WLAN#_X1 E38
To WLAN 54 CLK_PCIE_WLAN
SL2422 2 0402 1 CLK_PCIE_WLAN_X1 AU7
CLKOUT_PCIE_P5
54 CLKREQ_WLAN# 0402 GPP_B10/SRCCLKREQ5#
CK_REQ_P5#
SKL-ULT
REV = <REV> 20170627 Brian
Remove GCLK schematic. 201690302 X541UV
C2401 C2402 12PF-->10PF 11G232010004070
20170627 Brian
+3VS Change R2437 mount to unmount for SSD SATA only.
UX303 0826 XTAL 24MHz 07009-00062000
20150325 C2401
R2435 10KOhm SRC0 R1.1 modify to port 0 R2425 0OHM 2 1
1 2 CK_REQ_P0# PCH_24M_IN_U22 1 2 XTAL24_IN_X1_U22
3
27PF/50V
R2436 @ 10KOhm SRC1 CK_REQ_P0# /U22
1
1 2 CK_REQ_P1# R2407 X2401
24Mhz 4
R2437 @ 10KOhm SRC2 3 1MOhm
/U22
D
D
1 2 CK_REQ_P2# Q2401 2
2
ME2N7002D
R2438 N/A 10KOhm SRC3 G1 /VGA C2402
22,78,94 DGPU_PWROK
1
1 2 CK_REQ_P3# G R2409 0OHM 2 1
2 S PCH_24M_OUT_U22 1 2 XTAL24_OUT_X1_U22
SRC4
S
R2439 @ 10KOhm 20170629 Brian 27PF/50V
1 2 CK_REQ_P4# /U22 GND
Remove R2425/R2409 0ohm to SL2425/SL2426 for Non-GCLK.
UX303 0205
R2440 10KOhm GND 20171222 Brian
1 2 CK_REQ_P5# SRC5 Change X2401 07009-00063800(2*1.6mm). 2014/02/05-1
to 07009-00062000 C2401/C2402 from 6pF to 27pF.
X506UA for No Use can be NC
20160303 X541UV
GCLK
C2404
RTC CRYSTAL 32.768KHz 15PF/50V
+3VA_RTC SL2401
R2431 0OHM 1 2 1 2
1 2 0402
RTC_X1 RTC_X1_X1
Vinafix.com
GND
1
Kabylake +3VA_RTC MAX:3.2V min:3.0V R2418
1
10MOhm X2402
5% 32.768Khz
R2421 2 1 07009-00112000 C2405
+V3.3A_RTC GENERATION
2
2
20KOhm 1% SRTC_RST# 15PF/50V
nbs_r0402_h16_000s +3VA_RTC
+3VA R2432 0OHM 1 2
RTC_X2 1 2
1
JRST2401 20150119 GND

1
1
C2407 SGL_JUMP UX303C1 0714 Modify to Large Pakage

1 R2401
2
JA - SRTC RST_N 1UF/6.3V 1.5KOhm

JA
2
2
SAVE ME RTC REGISTER -(1-X) DEFAULT 1%

CLEAR ME RTC REGISTER - (1-2)
20170629 Brian
2
Remove R2431/R2432 0ohm to short for Non-GCLK.

SL2402
GND GND 20170720 Brian
1 2 Add R2431/R2432/R2409/R2425 for EMI 黑屏issue.
2 1 0603
R2420 3.3A_RTC_D
20KOhm 1% RTC_RST#
2
1
nbs_r0402_h16_000s C2403
R2403 1UF/10V
45.3KOhm
1
2
JRST2402 1%
1
1
C2406 SGL_JUMP
1
2
JB - RTC REST_N 1UF/6.3V GND

JB
2
2
CLEAR CMOS - (1-2) GND

SAVE CMOS - (1-X) DEFAULT
20170629 Brian
GND GND Remove D2401/R2404/R2402 for +3VA_RTC = 3.2V.
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_PCH_CLOCK SIGNALS,RTC

Size
C
Main Board
U0301K
SYSTEM POWER MANAGEMENT
AT11 2 1 SL2513
GPP_B12/SLP_S0# PCH_SLP_S0# 31
AP15 PCH_SLP_S0_R# 2 0402 1 SL2514
GPD4/SLP_S3# PM_SUSB# 31,59,89
AN10 BA16 SLP_S3_R# 2 0402 1 SL2515
GPP_B13/PLTRST# GPD5/SLP_S4# 0402 PM_SUSC# 31,87
PLT_RST# B5 AY16 SLP_S4_R# 1
20150108 SYS_RESET# GPD10/SLP_S5# T2502
PM_SYSRST_R# AY17 SLP_S5#
Checking RSMRST#
Add R2507 PM_RSMRST#_PCH AN15
SLP_SUS# PM_SLP_SUS# 31
1 A68 AW15 1
T2505 PROCPWRGD SLP_LAN# T2506
R2507 2 1 60.4Ohm H_CPUPWRGD_R B65 BB17 SLP_LAN# 1 T2501
59,70 VCCST_PWRGD_PCH VCCST_PWRGD GPD9/SLP_WLAN#
VCCST_PWRGD_R AN16 PCH_SLP_WLAN# 1 T2507
GPD6/SLP_A#
SL2553 1 2 B6 PM_SLP_A_R#
31,59 DPWROK_EC 0402 SYS_PWROK
PM_SYSPWROK_PCH BA20 BA15 SL2518 1 2
PCH_PWROK GPD3/PWRBTN# 0402 PM_PWRBTN# 31
0OHM @ R2554 PM_PWROK_PCH BB20 AY15
70 PM_RSMRST#_PCH DSW_PWROK GPD1/ACPRESENT
PM_RSMRST#_PCH 2 1 DPWROK_R AU13 ME_AC_PRESENT_PCH
GPD0/BATLOW#
2 1 SL2512 AR13 PM_BATLOW_R# +3VSUS
31 SUSWARN# 0402 GPP_A13/SUSWARN#/SUSPWRDNACK
SL2501 1 2 ME_SusPwrDnAck_R AP11
31 PCH_SUSACK# 0402 GPP_A15/SUSACK#
SUSACK_R# AU11 1 T2508 R2527 1 @ 2 10KOhm
GPP_A11/PME#
R2514 @ 0OHM 1 2 SL2517 BB15 AP16 PCI_PME# SLP_LAN#
54 PCIE_WAKE# 0402 WAKE# INTRUDER#
ME_SusPwrDnAck_R 1 2 PCIE_WAKE#_R AM15 SM_INTRUDER# 1 2 RN2501A
GPD2/LAN_WAKE# 10KOhm
1 PCH_GPD2# AW17 AM10 SUSWARN#
T2503 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE#
LAN_PWREN AT15 AM11 MPHY_PWREN 3 4 RN2501B
54 WLAN_ON# GPD7/RSVD GPP_B2/VRALERT# 10KOhm
PM_SYSRST_R#
R2506 1 2 20KOhm
SKL-ULT MPHY_PWREN
+3VA_RTC
REV = <REV>
R2559 1 2 1MOhm
20160219 X541UV R1.1 +3V SM_INTRUDER#
U2502 unstuff,r2518 stuff for cost
+3VA_DSW
U2502 R2512 8.2KOhm

Checking PM_BATLOW_R# 1 2
1 5 待SR 回來驗，是否拿掉U2502 R2523 1KOhm
INB VCC
2 PCIE_WAKE# 1 2
INA
PLT_RST# 3 4
GND OUTY BUF_PLT_RST# 31,43,52,54,71 5 6 RN2501C
10KOhm
74LVC1G08GW PCH_GPD2#
@
GND
1
R2501 7 8 RN2501D
10KOhm
1 2 100KOhm LAN_PWREN
R2518 0Ohm UX303CN 0311 Intel Review 1221
2
R2555 @ 10KOhm
WLAN_ON# 1 2
PLT_RST# 33
GND
+3VSUS +3VA_DSW
R2505
R2504
R2502
R2503
Vinafix.com
R2560 10KOhm
09'MoW04: PM_RSMRST#_PCH 1 2
2
2
Optional if ME FW is R2561 10KOhm

Ignition FW DPWROK_EC 1 2
10KOhm
10KOhm
10KOhm
100KOhm
1
R2534 1 @ 2 10KOhm
PM_PWROK_PCH
UX303 0809
@ @ @
2 1
31 PM_SYSPWROK
R2540 1KOhm PM_SYSPWROK_PCH
R2530 @ 0OHM
31,59,70,81 ALL_SYSTEM_PWRGD
ALL_SYSTEM_PWRGD 1 2
2 1
31 PM_PWROK
R2552 1KOhm PM_PWROK_PCH
2 1
31 PM_RSMRST#
R2542 1KOhm PM_RSMRST#_PCH
2 @ 1
31 ME_AC_PRESENT
R2541 10KOhm ME_AC_PRESENT_PCH
D2207: Prevent EC drive hign, D2505 2 1 1N4148WS

1
SUS_PWRGD sink low in S5-->G3. R2538 R2539

10KOhm 100KOhm
2
D2501
1
31,81 IMVP8_PWRGD
3
GND GND 2
3VA_DSW_PWRGD
BAT54AW
UX303C1 0620
D2503 2 1 1N4148WS
DPWROK_R
D2502
2014/04/09-1
2
31,59,88 3VA_DSW_PWRGD
3VA_DSW_PWRGD 3
1
Power failure solution (S0-->G3,S5-->G3):
BAT54CW
PM_SYSPWROK_PCH
C2501 @ 0.1UF/6.3V EMI solution
1
ALL_SYSTEM_PWRGD 1 2 @
nbs_c0201_h13_000s C2504
0.1UF/6.3V
2
C2502 @ 0.1UF/6.3V
3VA_DSW_PWRGD 1 2
nbs_c0201_h13_000s
C2503 @ 0.1UF/6.3V
PM_PWROK_PCH 1 2
nbs_c0201_h13_000s
Close D2501
BOM
Project Name Rev

GND
X407UA/UV R1.0
2013/03/15 Paul :For EMI resevered
Title : CPU_PCH_SYS_POWER
Size
C
2017/05/12 remove R2505 ,power sequence will be check 102
Date: Wednesday, March 07, 2018 Sheet 26 of
Checking
20150318
cost 考量被改SL
+1.0VSUS_PCH U0301O 如果用eSPI 要移除
CPU POWER 4 OF 4
+VCCPGPPA
AB19 +VCCPGPP
VCCPRIM_1P0_1
+1.0VSUS AB20 AK15 20mA 1mil +VCCPGPP
VCCPRIM_1P0_2 VCCPGPPA
P18 AG15 +VCCPGPP +3VSUS +VCCPGPPA +1.8VSUS
VCCPRIM_1P0_3 VCCPGPPB
2.6A Y16 +VCCPGPP
VCCPGPPC
AF18 Y15 +VCCPGPPF R2606 @/eSPI 0Ohm
VCCPRIM_CORE1 VCCPGPPD
AF19 T16 +VCCPGPP SL2607 1 2 1 2
VCCPRIM_CORE2 VCCPGPPE 0603
V20 AF16 161mA 8mil nbs_r0603_h24_000s
VCCPRIM_CORE3 VCCPGPPF
1
V21 AD15 41mA 2mil

VCCPRIM_CORE4 VCCPGPPG
C2617 +3VSUS
1UF/6.3V DCPDSW +1.0VSUS_PCH AL1 V19 +1.0VSUS_VCCDTS
DCPDSW_1P0 VCCPRIM_3P3_V19
2
@
1
30mA K17 T1 +1.8VSUS

VCCMPHYAON_1P0_1 VCCPRIM_1P0_T1
C2602 +VCCMPHYG L1
VCCMPHYAON_1P0_2
1UF/6.3V AA1 +3VSUS
VCCATS_1P8
2
N15 +3VSUS +VCCPGPP

VCCMPHYGT_1P0_N15
N16 AK17
VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3
N17 +3VA_RTC
VCCMPHYGT_1P0_N17
P15 AK19 SL2603 1 2 65mA 3mil
VCCMPHYGT_1P0_P15 VCCRTC_AK19 0603
+1.0VM_VCCAMPHYPLL P16 BB14
VCCMPHYGT_1P0_P16 VCCRTC_BB14
1
K15 BB10 C2628 C2622 C2613
VCCAMPHYPLL_1P0_1 DCPRTC
1
+1.0VSUS_VCCAPLL L15 DCPRTC +1.0VSUS_PCH 1UF/6.3V 1UF/6.3V 1UF/6.3V
VCCAMPHYPLL_1P0_2
2
A14 C2610 C2608 C2609 @ @ @
VCCCLK1
V15 +1.0VSUS_VCCCLK2 0.1UF/16V 1UF/6.3V 0.1UF/16V
VCCAPLL_1P0
2
+1.0VSUS_PCH K19
VCCCLK2
AB17 +1.0VSUS_PCH Place close to the AK19
VCCPRIM_1P0_AB17
+3VDSW_VCCPDSW Y18 L21 +1.8VSUS +VCCPGPPF
VCCPRIM_1P0_Y18 VCCCLK3
+1.0VSUS_VCCCLK4
AD17 N20
VCCDSW_3P3_AD17 VCCCLK4
AD18 +1.0VSUS_VCCCLK5
VCCDSW_3P3_AD18
+1.8VSUS +3VSUS_VCCPAZIO AJ17 L19 0.48A SL2608 1 2
VCCDSW_3P3_AJ17 VCCCLK5 0603
SL2633 REV = <REV> +1.0VSUS_VCCCLK6 +3VS
1
1 2 AJ19 A10
0603 VCCHDA VCCCLK6
+3VSUS C2605
AJ16 AN11 R2601 @ 10KOhm 1UF/6.3V
VCCSPI GPP_B0/CORE_VID0
2
+VCCMPHYG AN13 VCCPRIM_VID0 R2602 1 @ 2 10KOhm
GPP_B1/CORE_VID1 Place close to the AA1
AF20 VCCPRIM_VID1 1 2
VCCSRAM_1P0_1
AF21
VCCSRAM_1P0_2
T19
VCCSRAM_1P0_3
+3VSUS T20
VCCSRAM_1P0_4
+1.0VSUS_PCH AJ21
VCCPRIM_3P3_AJ21
+VCCMPHYG AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
1
C2604 SKL-ULT
1UF/6.3V
2
+1.0VSUS +VCCMPHYG
+1.0VSUS +1.0VSUS_PCH +3VA_DSW +3VDSW_VCCPDSW
0.09A
SL2623 1 2 SL2614 1 2
0805 0603
1
+VCCMPHYG +1.0VM_VCCAMPHYPLL
1
C2601
1UF/6.3V C2611 +3VSUS +3VSUS_VCCPAZIO 3.5A
Vinafix.com
2
1UF/6.3V SL2632 1 2 88mA

2
@ 0603
1
1
0.46A R2636 0Ohm C2612
1 2 22UF/6.3V C2603 C2615 C2614
nbs_r0603_h24_000s @ 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
@ @ @
1
1
+1.0VSUS_VCCDTS C2606 C2607 C2618 C2627
1UF/6.3V 0.1UF/16V 1UF/6.3V 1UF/6.3V
2
2
SL2609 1 2 @ @
0603
+1.0VSUS_VCCAPLL
SL2613 1 2 26mA
0603
1
C2623
22UF/6.3V
nbs_c0603_h39_000s
2
+1.0VSUS_VCCCLK6
SL2622 1 2
0603
1
C2616
1UF/6.3V
2
@ +1.0VSUS_PCH +1.0VSUS_VCCCLK5
+1.0VSUS_VCCCLK2 SL2631 1 2
0603
1
SL2629 1 2
0603
C2626
22UF/6.3V
2
1
@
C2624
22UF/6.3V
2
+1.0VSUS_VCCCLK4
SL2630 1 2
0603
1
C2625
22UF/6.3V
2
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_PCH_POEWR,GND
Size
C
U0301P U0301Q
U0301R
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3
A5 AL65 AT63 BA49 F8 L18
VSS1 VSS71 VSS141 VSS209 VSS278 VSS319
A67 AL66 AT68 BA53 G10 L2
A70 AM13 AT71 BA57 G22 L20
AA2 AM21 AU10 BA6 G43 L4
AA4 AM25 AU15 BA62 G45 L8
AA65 AM27 AU20 BA66 G48 N10
AA68 AM43 AU32 BA71 G5 N13
AB15 AM45 AU38 BB18 G52 N19
AB16 AM46 AV1 BB26 G55 N21
AB18 AM55 AV68 BB30 G58 N6
AB21 AM60 AV69 BB34 G6 N65
AB8 AM61 AV70 BB38 G60 N68
AD13 AM68 AV71 BB43 G63 P17
AD16 AM71 AW10 BB55 G66 P19
AD19 AM8 AW12 BB6 H15 P20
AD20 AN20 AW14 BB60 H18 P21
AD21 AN23 AW16 BB64 H71 R13
AD62 AN28 AW18 BB67 J11 R6
AD8 AN30 AW21 BB70 J13 T15
AE64 AN32 AW23 C1 J25 T17
AE65 AN33 AW26 C25 J28 T18
AE66 AN35 AW28 C5 J32 T2
AE67 AN37 AW30 D10 J35 T21
AE68 AN38 AW32 D11 J38 T4
AE69 AN40 AW34 D14 J42 U10
AF1 AN42 AW36 D18 J8 U63
AF10 AN58 AW38 D22 K16 U64
AF15 AN63 AW41 D25 K18 U66
AF17 AP10 AW43 D26 K22 U67
AF2 SKL-ULT AP18 AW45 D30 K61 U69
AF4 AP20 AW47 SKL-ULT D34 K63 SKL-ULT U70
AF63 AP23 AW49 D39 K64 V16
AG16 AP28 AW51 D44 K65 V17
AG17 AP32 AW53 D45 K66 V18
AG18 AP35 AW55 D47 K67 W13
AG19 AP38 AW57 D48 K68 W6
AG20 AP42 AW6 D53 K70 W9
Vinafix.com
AG21 AP58 AW60 D58 K71 Y17
AG71 AP63 AW62 D6 L11 Y19
AH13 AP68 AW64 D62 L16 Y20
AH6 AP70 AW66 D66 L17 Y21
AH63 AR11 AW8 D69
VSS42 VSS112 VSS182 VSS250
AH64 AR15 AY66 E11
AH67 AR16 B10 E15
AJ15 AR20 B14 E18
AJ18 AR23 B18 E21
AJ20 AR28 B22 E46
AJ4 AR35 B30 E50
AK11 AR42 B34 E53
AK16 AR43 B39 E56
AK18 AR45 B44 E6
AK21 AR46 B48 E65
AK22 AR48 B53 E71
AK27 AR5 B58 F1
AK63 AR50 B62 F13
AK68 AR52 B66 F2
AK69 AR53 B71 F22
AK8 AR55 BA1 F23
AL2 AR58 BA10 F27
AL28 AR63 BA14 F28
AL32 AR8 BA18 F32
AL35 AT2 BA2 F33
AL38 AT20 BA23 F35
AL4 AT23 BA28 F37
AL45 AT28 BA32 F38
AL48 AT35 BA36 F4
AL52 AT4 F68 F40
AL55 AT42 BA45 F42
AL58 AT56 BA41
VSS69 VSS139 VSS277
AL64 AT58
VSS70 VSS140
BOM
REV = <REV> REV = <REV> Project Name Rev

REV = <REV>
X407UA/UV R1.0
Title : CPU_PCH_POEWR,GND
Size
B
SPI PCH Power
+3VSUS +3VA D2801 +3VSUS_SPI
R2809 BAT54CW System Management Interface
0Ohm @ @
1 2 1 20160218 X541UV +12VSUS
D2802_PIN12 3 D2801unstuff ,
2 R2811 stuff for cost
R2811
2
0Ohm
1 2
31,91 SMB1_CLK 6 1 SML1_CK 6
R2812 Q2801A
0Ohm UM6K1N
@ @
EC 1 2 PCH
5
+3VSUS_SPI 31,91 SMB1_DAT 3 4 SML1_DATA 6
2nd PCH SPI R2813

0Ohm
Q2801B
UM6K1N
@ @
1 2
R1.2_Change +12VS
1
1
+12VS +3VS
1
R2817 R2818 C2802
1KOhm 1KOhm 0.1UF/10V
@ @
2
2
2
U2801
1
R1.2_Del R2819 For Cost Down R2814 R2815
1 8 GND Q2802A 4.7KOhm 4.7KOhm
CS# VCC
SPI_CS#0_SPI_2_CON 2 7 UM6K1N
2
DO(IO1) HOLD#(IO3) PCH_SPI_DQ3 6
SPI_SO_SPI_2_CON 3 6
2
WP#(IO2) CLK
SPI_WP# 4 5 SPI_CLK_SPI_2_CON
GND DI(IO0) SMB1_CLK_S 51,77
SPI_SI_SPI_2_CON
6 1
1
W25Q64FVSSIQ C2803
6 PCH_SPI_DQ2
05006-00012700 10PF/50V
GND @/EMI Q2802B Thermal Sensor
2
R1.2_Del R2816 For Cost Down (64Mb) UM6K1N
5
GND
SMB1_DAT_S 51,77
2nd : 05006-00012700 GIGADEVICE 20170505 X540UPR2 BOM
3 4
X540LJ/LA add M: 05006-00012700

X541UV/UA add 20160223 05006-00013700
X540UPR BOM change_20170419 05006-00013600
M: 05006-00013600
05006-00013400
05006-00012700
SL2805 2 1
6 SPI_CLK_SPI_2 0402
SL2807 2 1 SPI_CLK_SPI_2_CON
6 SPI_CS#0_SPI_2 0402
SPI_CS#0_SPI_2_CON
SL2806 2 1
Vinafix.com
31 EC_SCK_PCH 0402
SL2808 2 1
31 EC_SCE#_PCH 0402
SL2803 2 1 SL2801 2 1
6 SPI_SO_SPI_2 0402 6 SPI_SI_SPI_2 0402
SPI_SO_SPI_2_CON SPI_SI_SPI_2_CON
SL2804 2 1 SL2802 2 1
31 EC_SO_PCH 0402 31 EC_SI_PCH 0402
20151225
LPC Debug Port 12G183301208-->12018-00102700
更換Debug port 樣式 FFC 正/正
+3V
1
C2801
0.1UF/10V
/DEBUG
2
GND
JDEBUG2801
1
1
6,31 LPC_AD0 2 SIDE1
2 13
3
3
6,31 LPC_AD1 4
4
5
5
6,31 LPC_AD2 6
6
7
7
6,31 LPC_AD3 8
8
9
9
6,31 LPC_FRAME# 10
10
11 SIDE2
11 14
6 CLK_DEBUG 12
12
GND FPC_CON_12P GND

/DEBUG
12018-00102700
<Variant Name>
Title : 28_PCH-SPI ROM,OTH
ASUSTeK COMPUTER INC.

C X407UA/UV R1.0

Main Board
Vinafix.com
Title : Green CLK Gen

C X407UA/UV R1.0

EMI
Internal Keyboard
31,32,33,60 PWR_SW#
KB LED亮度
32 PWR_LED_KB#
330PF/50V 1 2 CN3102A /EMI 330PF/50V 7 8 CN3101D /EMI
KSI0 330PF/50V 5 6 CN3102C /EMI KSO14 330PF/50V 5 6 CN3101C /EMI
1
R3119 KSI4 330PF/50V 3 4 CN3102B /EMI KSO9 330PF/50V 3 4 CN3101B /EMI
1
FPC_CON_30P 0Ohm KSI2 330PF/50V 7 8 CN3102D /EMI KSO3 330PF/50V 1 2 CN3101A /EMI D3105
20161125 chris /KBLED KSI6 KSO1 AZ5525-01F.R7G
1 KSO15 31 For K/B LED
1 /EMI
2
1
2 KSO0 31
2 D3106 330PF/50V 7 8 CN3103D /EMI 330PF/50V 1 2 CN3106A /EMI
3 KSO7 31
3 AZ5525-01F.R7G KSI3 330PF/50V 5 6 CN3103C /EMI KSO15 330PF/50V 3 4 CN3106B /EMI
2
4 KSO5 31
4 KSO12 330PF/50V 3 4 CN3103B /EMI KSO0 330PF/50V 5 6 CN3106C /EMI
5 KSO2 31
5 KSO10 330PF/50V 1 2 CN3103A /EMI KSO7 330PF/50V 7 8 CN3106D /EMI
6 KSO4 31
6 KSO11 KSO5
2
7 KSO8 31
7 GND
3
8 KSO6 31 3 D
8 Q3101 330PF/50V 5 6 CN3104C /EMI 330PF/50V 7 8 CN3105D /EMI
9 KSO11 31
9 2N7002K KSI5 330PF/50V 7 8 CN3104D /EMI KSO6 330PF/50V 5 6 CN3105C /EMI
SIDE1 10 KSO10 31
31 10 GND /KBLED KSO13 330PF/50V 3 4 CN3104B /EMI KSO8 330PF/50V 3 4 CN3105B /EMI
11 KSO12 31
11 1 1 KSI1 330PF/50V 1 2 CN3104A /EMI KSO4 330PF/50V 1 2 CN3105A /EMI
12 KSI3 31 31,60 PWR_LED
12 G KSI7 KSO2
13 KSI0 31
13 20170111 chris
14 KSI2 31
14 33p to 330p for EMI
1
15 KSI4 31 2 S
16
15
KSI6 31
R3110 20170125 Michael
16 10KOhm Change C3107~C3130 to CN3101~CN3106
IF = 8.48~10mA GND GND
2
17 KSI7 31
17 @ (P/N : 11G246033114030) for EMI
18
18
KSI1 31 VF Min. = 1.7V 20170209 chris
2
19 KSI5 31 CN3101 CN3104 SWAP
20
19 VF Max. = 2.2V
20 KSO13 31
SIDE2 21
32 21 KSO1 31
22
22 KSO3 31
23 GND GND
23 KSO9 31
24
24 KSO14 31 GND
25
25
26 PWR_SW# 31,32,33,60
26
27 D3106改到Q3101.3
27 PWR_LED_KB# 先經過D3106再到Q3101.3
28
28 PWR_LED_KB# 32
29
29 SL3102 1 2 @
30 20mil 0402 +5VS
30
20170110 chris Add R3111 & R3112 follow UX530
J3101
1
C3106 20170208 Remove R3111 & R3112 J3101 pin.30 to +5vs

0.1UF/16V add SL3102
GND /EMI 20170330 chris
2
ADD R3119 ohm for PWR_LED_KB#(KB 亮度)

GND
20170629 Brian
Change J3101 from 12018-00200900 to
12018-00380700 (X405).
Touch PAD +3VS_TP
+3VS
SL3101
1 2
0402
1
C3101
0.1UF/16V
@/EMI
2
D3101
J3102 1 6
8 I/O1 I/O4
Vinafix.com
GND TP_CLK_C I2C1_SDA_TCH_C
8 +3VS_TP
10 7
SIDE2 7
6 R3101 2 @ 1 0Ohm
6 TP_CLK 31
1
5 TP_CLK_C R3102 2 @ 1 0Ohm C3102
5 TP_DAT 31
4 TP_DAT_C 0.1UF/16V 2 5
4 GND +3VS
3 R3103 2 1 0Ohm @/EMI GND VDD
3 I2C1_SDA_TCH_PAD 22
2
9 2 I2C1_SDA_TCH_C R3104 2 1 0Ohm
SIDE1 2 I2C1_SCL_TCH_PAD 22
1 I2C1_CLK_TCH_C
1 TOUCHPAD_INTR# 22
GND
FPC_CON_8P 20151117 X541UJ add 3 4
TP_CLK TP_DAT TP_DAT_C I/O2 I/O3 I2C1_CLK_TCH_C
12018-00212200 20150727 X540LJ
1
C3104 TVLST2304AD0 @/EMI
1
C3103 10PF/50V
10PF/50V @/EMI
2
@/EMI
2
GND
GND GND
2017/01/23 X542UA_R1.1 #17, FP power modfiy from +3VS to +3VSUS

Close J3103
Fingerprint +3VS +3VS_FP
+3VS_FP
R3122 1 @/FPrint 2 49.9KOHM

FP_GSPI0_CS#
/FPrint R3123 1 @/FPrint 2 49.9KOHM
0Ohm 1 2 R3120 FP_GSPI0_CLK
2017/01/23 X542UA_R1.1 #18, Remove reserve RES & add curcrit for RST# R3124 @/FPrint 4.7KOhm
FP_GSPI0_MISO 1 2
1
2016/10/20 X542UA_R1.0 #51, Add J3103 for FingerPrint C3120 R3125 @/FPrint 4.7KOhm
0.1UF/16V FP_GSPI0_MOSI 1 2
@/EMI
2
+5VS
GND
+3VS_FP 2017/02/16 X542UA_R1.1 #31, For AW FP reserve GPIO for reset pin
J3103
5
8 /FPrint
8
10 7 R3121 1 /FPrint 2 0Ohm 4 3
SIDE2 7 FP_RST#_GPIO 22
6 FP_RST# FP_RST#_R
6 FP_GSPI0_MOSI 22
5 Q3120B
2
5 FP_INT# 22,32
4 UM6K1N
4 FP_GSPI0_MISO 22
3 1 6
3 FP_GSPI0_CS# 22
9 2 FP_CS#
SIDE1 2 FP_GSPI0_CLK 22,32
1 /FPrint
1 Q3120A
FPC_CON_8P /FPrint UM6K1N D3109
R3108 2 1 0Ohm
12018-00212200
FP_RST# @/FPrint 1 6
FP_GSPI0_MOSII/O1 I/O4 FP_CS#
22,32 FP_INT#
1
22,32 FP_GSPI0_CLK
GND D3107 2 5
GND +3VS
GND VDD
AZ5525-01F.R7G
1
1
FP_CS# D3108 @/EMI

BOM
C7708 AZ5525-01F.R7G
1
100PF/50V @/EMI Project Name

2
Rev
2
C7709 @/EMI 3 4
100PF/50V FP_GSPI0_MISO I/O2 I/O3 FP_GSPI0_CLK X407UA/UV R1.0
2
2
@/EMI
GND TVLST2304AD0 @/EMI Title : EC-IT8995_KB,TP
Size
GND GND Dept.: ASUSTeK COMPUTER INC. Engineer: Brian Chen
C
GND
Thermal Policy
+3VS
1
R3207
10KOhm
@
2
R3206
0Ohm
/VGA
1 2
77 GPU_THERM#_GPU
20160219 X541UV
R3201->SL3201 for cost
SL3201 2 1
51 CPU_THERM# 0402
1 T3201 Q3201
2
2 2N7002
TPC26T S
+3VA_EC
IT8752 has built-in level detection for
G
26 PLT_RST#
11 R3202 power-on reset circuit
100KOhm
D 1 2
3
3
D3201
1N4148WS
2 1
1 T3202
20150724 R1.1 修改 TPC26T
20151125 R1.1 DEL EC_RST# 31
1
C3201 C3202
1UF/6.3V 0.1UF/10V
nbs_c0603_h37_000s
2
Vinafix.com
Output Signal
GND GND
battery embedded (press pwr_sw 10sec, then reset ec )
+3VA_EC
20160721 長按當機
解QTR背壓測項
D3202 R3205
1N4148WS 1KOhm
1
2 1 R3204 1 2
31,60 LID_SW#
1MOhm EC_RST#_R EC_RST#
N/A R3208
07G001001131 1KOhm
2
1 2
PS_ON 31,58,89
R3203
3
20170626 Brian 1KOhm Q3202B

1 2 5 UM6K1N
ADD D3201 07G001001131 for X405 QTR 背壓BUG.
4
1
C3203
6
Q3202A 10UF/6.3V
2 UM6K1N nbs_c0603_h37_000s
31,32,60 PWR_SW#
2
1
<Variant Name>
Title : 32_RST_Reset Circuit
GND GND GND

B X407UA/UV R1.0

Main Board
For SO-DIMM (A) For SO-DIMM (B)

U0301C
U0301B
17 M_A_DQ[63:0] 18 M_B_DQ[63:0]
IL/NIL
AU53 AF65 AN45
DDR0_CKN[0] M_A_CLK_DDR#0 17 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_CLK_DDR#0 18
AL71 AT53 M_B_DQ0 AF64 AN46
DDR0_DQ[0] DDR0_CKP[0] M_A_CLK_DDR0 17 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] M_B_CLK_DDR#1 18
M_A_DQ0 AL68 AU55 M_B_DQ1 AK65 AP45
DDR0_DQ[1] DDR0_CKN[1] M_A_CLK_DDR#1 17 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_CLK_DDR0 18
M_A_DQ1 AN68 AT55 M_B_DQ2 AK64 AP46
DDR0_DQ[2] DDR0_CKP[1] M_A_CLK_DDR1 17 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLK_DDR1 18
M_A_DQ2 AN69 M_B_DQ3 AF66
DDR0_DQ[3] DDR1_DQ[4]/DDR0_DQ[20]
M_A_DQ3 AL70 BA56 M_B_DQ4 AF67 AN56
DDR0_DQ[4] DDR0_CKE[0] M_A_CKE0 17 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] M_B_CKE0 18
M_A_DQ4 AL69 BB56 M_A_CKE0 M_B_DQ5 AK67 AP55 M_B_CKE0
DDR0_DQ[5] DDR0_CKE[1] M_A_CKE1 17 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] M_B_CKE1 18
M_A_DQ5 AN70 AW56 M_A_CKE1 M_B_DQ6 AK66 AN55 M_B_CKE1 1 T0401
DDR0_DQ[6] DDR0_CKE[2] DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2]
M_A_DQ6 AN71 AY56 M_B_DQ7 AF70 AP53 M_B_CKE2 1 T0404
DDR0_DQ[7] DDR0_CKE[3] DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
M_A_DQ7 AR70 M_B_DQ8 AF68 M_B_CKE3
M_A_DQ8 AR68 AU45 M_B_DQ9 AH71 BB42
DDR0_DQ[9] DDR0_CS#[0] M_A_CS#0 17 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_CS#0 18
M_A_DQ9 AU71 AU43 M_B_DQ10 AH68 AY42
DDR0_DQ[10] DDR0_CS#[1] M_A_CS#1 17 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] M_B_CS#1 18
M_A_DQ10 AU68 AT45 M_B_DQ11 AF71 BA42
DDR0_DQ[11] DDR0_ODT[0] M_A_ODT0 17 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_ODT0 18
M_A_DQ11 AR71 AT43 M_B_DQ12 AF69 AW42
DDR0_DQ[12] DDR0_ODT[1] M_A_ODT1 17 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] M_B_ODT1 18
M_A_DQ12 AR69 DDR3L/LPDDR3/DDR4 M_B_DQ13 AH70 DDR3L/LPDDR3/DDR4
M_A_DQ13 AU70 BA51 M_B_DQ14 AH69 AY48
DDR0_DQ[14] DDR0_MA[5] /DDR0_CAA[0]/DDR0_MA[5] M_A_A[13:0] 17 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5] /DDR1_CAA[0]/DDR1_MA[5]
M_A_DQ14 AU69 BB54 M_A_A5 M_B_DQ15 AT66 AP50 M_B_A5
DDR0_DQ[15] DDR0_MA[9] /DDR0_CAA[1]/DDR0_MA[9] DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9] /DDR1_CAA[1]/DDR1_MA[9]
M_A_DQ15 BB65 BA52 M_A_A9 M_A_A0 M_B_DQ16 AU66 BA48 M_B_A9
DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6] /DDR0_CAA[2]/DDR0_MA[6] DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6] /DDR1_CAA[2]/DDR1_MA[6]
M_A_DQ16 AW65 AY52 M_A_A6 M_A_A1 M_B_DQ17 AP65 BB48 M_B_A6
M_A_DQ17 AW63 AW52 M_A_A8 M_A_A2 M_B_DQ18 AN65 AP48 M_B_A8
DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7] /DDR0_CAA[4]/DDR0_MA[7] DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7] /DDR1_CAA[4]/DDR1_MA[7] M_B_A[13:0] 18
M_A_DQ18 AY63 AY55 M_A_A7 M_A_A3 M_B_DQ19 AN66 AP52 M_B_A7
DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2] /DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 17 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2] /DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 18
M_A_DQ19 BA65 AW54 M_A_A4 M_B_DQ20 AP66 AN50 M_B_A0
M_A_DQ20 AY65 BA54 M_A_A12 M_A_A5 M_B_DQ21 AT65 AN48 M_B_A12 M_B_A1
M_A_DQ21 BA63 BA55 M_A_A11 M_A_A6 M_B_DQ22 AU65 AN53 M_B_A11 M_B_A2
DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15] /DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 17 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15] /DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 18
M_A_DQ22 BB63 AY54 M_A_A7 M_B_DQ23 AT61 AN52 M_B_A3
DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14] /DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 17 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14] /DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 18
M_A_DQ23 BA61 M_A_A8 M_B_DQ24 AU61 M_B_A4
DDR0_DQ[24]/DDR0_DQ[40] DDR1_DQ[25]/DDR0_DQ[57]
M_A_DQ24 AW61 AU46 M_A_A9 M_B_DQ25 AP60 BA43 M_B_A5
DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13] /DDR0_CAB[0]/DDR0_MA[13] DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13] /DDR1_CAB[0]/DDR1_MA[13]
M_A_DQ25 BB59 AU48 M_A_A13 M_A_A10 M_B_DQ26 AN60 AY43 M_B_A13 M_B_A6
DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS# /DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# 17 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS# /DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# 18
M_A_DQ26 AW59 AT46 M_A_A11 M_B_DQ27 AN61 AY44 M_B_A7
DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE# /DDR0_CAB[2]/DDR0_MA[14] M_A_WE# 17 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE# /DDR1_CAB[2]/DDR1_MA[14] M_B_WE# 18
M_A_DQ27 BB61 AU50 M_A_A12 M_B_DQ28 AP61 AW44 M_B_A8
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS# /DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# 17 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS# /DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# 18
M_A_DQ28 AY61 AU52 M_A_A13 M_B_DQ29 AT60 BB44 M_B_A9
DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0] /DDR0_CAB[4]/DDR0_BA[0] M_A_BA0 17 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0] /DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 18
M_A_DQ29 BA59 AY51 M_B_DQ30 AU60 AY47 M_B_A10
M_A_DQ30 AY59 AT48 M_A_A2 M_B_DQ31 AU40 BA44 M_B_A2 M_B_A11
DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1] /DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 17 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1] /DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 18
M_A_DQ31 AY39 AT50 M_B_DQ32 AT40 AW46 M_B_A12
M_A_DQ32 AW39 BB50 M_A_A10 M_B_DQ33 AT37 AY46 M_B_A10 M_B_A13
M_A_DQ33 AY37 AY50 M_A_A1 M_B_DQ34 AU37 BA46 M_B_A1
M_A_DQ34 AW37 BA50 M_A_A0 M_B_DQ35 AR40 BB46 M_B_A0
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3]
M_A_DQ35 BB39 BB52 M_A_A3 M_B_DQ36 AP40 BA47 M_B_A3
DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4]
M_A_DQ36 BA39 M_A_A4 M_B_DQ37 AP37 IL/NIL M_B_A4
DDR0_DQ[37]/DDR1_DQ[5] M_A_DQS#[3:0] 17 DDR1_DQ[38]/DDR1_DQ[22]
M_A_DQ37 BA37 AM70 M_B_DQ38 AR37 AH66
DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2]
M_A_DQ38 BB37 AM69 M_A_DQS#0 M_A_DQS#0 M_B_DQ39 AT33 AH65 M_B_DQS#0
DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS[7:0] 18
M_A_DQ39 AY35 AT69 M_A_DQS0 M_A_DQS#1 M_B_DQ40 AU33 AG69 M_B_DQS0
DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3]
M_A_DQ40 AW35 AT70 M_A_DQS#1 M_A_DQS#2 M_B_DQ41 AU30 AG70 M_B_DQS#1
DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] M_A_DQS[3:0] 17 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS#[7:0] 18
M_A_DQ41 AY33 BA64 M_A_DQS1 M_A_DQS#3 M_B_DQ42 AT30 AR66 M_B_DQS1
DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6]
M_A_DQ42 AW33 AY64 M_A_DQS#2 M_A_DQS0 M_B_DQ43 AR33 AR65 M_B_DQS#2
DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6]
M_A_DQ43 BB35 AY60 M_A_DQS2 M_A_DQS1 M_B_DQ44 AP33 AR61 M_B_DQS2
M_A_DQ44 BA35 BA60 M_A_DQS#3 M_A_DQS2 M_B_DQ45 AR30 AR60 M_B_DQS#3
DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS[7:4] 17 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7]
M_A_DQ45 BA33 BA38 M_A_DQS3 M_A_DQS3 M_B_DQ46 AP30 AT38 M_B_DQS3
M_A_DQ46 BB33 AY38 M_A_DQS#4 M_A_DQS4 M_B_DQ47 AU27 AR38 M_B_DQS#4
DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2]
M_A_DQ47 AY31 AY34 M_A_DQS4 M_A_DQS5 M_B_DQ48 AT27 AT32 M_B_DQS4
DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3]
M_A_DQ48 AW31 BA34 M_A_DQS#5 M_A_DQS6 M_B_DQ49 AT25 AR32 M_B_DQS#5
DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] M_A_DQS#[7:4] 17 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3]
M_A_DQ49 AY29 BA30 M_A_DQS5 M_A_DQS7 M_B_DQ50 AU25 AR25 M_B_DQS5
DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] DDR1_DQ[51] DDR1_DQSN[6]
M_A_DQ50 AW29 AY30 M_A_DQS#6 M_A_DQS#4 M_B_DQ51 AP27 AR27 M_B_DQS#6
DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] DDR1_DQ[52] DDR1_DQSP[6]
M_A_DQ51 BB31 AY26 M_A_DQS6 M_A_DQS#5 M_B_DQ52 AN27 AR22 M_B_DQS6
DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] DDR1_DQ[53] DDR1_DQSN[7]
M_A_DQ52 BA31 BA26 M_A_DQS#7 M_A_DQS#6 M_B_DQ53 AN25 AR21 M_B_DQS#7
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR1_DQ[54] DDR1_DQSP[7]
M_A_DQ53 BA29 M_A_DQS7 M_A_DQS#7 M_B_DQ54 AP25 M_B_DQS7
DDR0_DQ[54]/DDR1_DQ[38] DDR1_DQ[55]
M_A_DQ54 BB29 IL/NIL AW50 M_B_DQ55 AT22 AN43
DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# M_A_ALERT# 17 DDR1_DQ[56] DDR1_ALERT# M_B_ALERT# 18
M_A_DQ55 AY27 AT52 M_B_DQ56 AU22 AP43
DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR1_DQ[57] DDR1_PAR
Vinafix.com
M_A_PAR 17 M_B_PAR 18
M_A_DQ56 AW27 M_B_DQ57 AU21 AT13
DDR0_DQ[57]/DDR1_DQ[41] DDR1_DQ[58] DRAM_RESET#
M_A_DQ57 AY25 AY67 M_B_DQ58 AT21 AR18 DRAMRST#
DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA SA_DIMM_VREFCA 19 DDR1_DQ[59] DDR_RCOMP[0]
M_A_DQ58 AW25 AY68 M_B_DQ59 AN22 AT18 SM_RCOMP_0
DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ DDR1_DQ[60] DDR_RCOMP[1]
M_A_DQ59 BB27 DDR CH - A BA67 M_B_DQ60 AP22 AU18 SM_RCOMP_1
DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ SB_DIMM_VREFCA 19 DDR1_DQ[61] DDR_RCOMP[2]
M_A_DQ60 BA27 M_B_DQ61 AP21 SM_RCOMP_2
DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQ[62]
M_A_DQ61 BA25 AW67 M_B_DQ62 AN21 DDR CH - B
DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL DDR1_DQ[63]
M_A_DQ62 BB25 DDR_VTT_CTRL M_B_DQ63
DDR0_DQ[63]/DDR1_DQ[47]
M_A_DQ63
SKL-ULT
SKL-ULT IL/NIL REV = <REV>
REV = <REV>
+1.2V
DDR0_Vref_DQ - Not in use in DDR4, DDR4 COMPENSATION SIGNALS
DDR_VTT_CTRL: DDR1_Vref_DQ = DDR4_CA_ch1,
System Memory Power Gate Control: DDR_Vref_CA = DD4_CA_ch0
1
Disables the pla�orm memory VTT regulator R0401
in C8 and deeper and S3. 470Ohm R0403 1 2 121Ohm 1%
Ref:544924_544924_Skylake_EDS_Vol_1_Rev0.9.pdf P.120 SL0401 1% SM_RCOMP_0
R0402 1 2 80.6Ohm 1%
2
1 2 SM_RCOMP_1
0402 DDR4_DRAMRST# 17,18,70
DRAMRST# R0406 1 2 100Ohm 1%
1
EMI SM_RCOMP_2
VTT Enable 2017/05/12 change to +3VS /Del R0408 C0401
+1.2V +3VS 0.1UF/16V PDG #543016 P.181
2
@/EMI
GND
1
1
SL0409 2 1 C0402
0402
DDR_VTT_CTRL 0.1UF/16V R0404
U0401 300KOhm
2
1 NC 5
VCC
R0407 @ 0Ohm 2 A
1 2 DDR_PG_CTRL_RR 3 Y 4 R0405 0Ohm
GND DDR_PG_CTRL 87
DDR_PG_CTRL_Y 1 2
U74AUP1G07G-AL5-R
06004-00620000
20160216 X541UV R1.1 20171204 Brian

R0407->R7739,R0408->R7740,R0409->R7741 Change U0401 from 06G004259030 to 06004-00620000.
20160218 X541UV R1.1
R0409->SL0409 for cost
BOM
Project Name Rev
X507UA/UV R1.0
Title : CPU_DDR3
Size
Dept.: ASUSTeK COMPUTER INC. Engineer: Bull Tsai
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
RTL8402 (LAN+CR)
Size
D
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
RTL8402_RJ45
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
Size
C
20160530
1. Del R3833 & Add D3801
2. AUD_DVDD_IO--->AUD_DVDD
MUTE CONTROL AUD_DVDD
20151216
HDA_RST#_SSP_MCLK 由PCH 發出(主要控制訊號)
2
OP_SD 由 EC發出 (For project) R3801
100KOhm
FROM PCH D3801 BAT54AW
1
1
23,37,38 HDA_RST#_SSP_MCLK
3
2
31,38 OP_SD#
FROM EC D3802 1N4148WS

DLY_OP_SD# 37,38
2 1
37 DC_EDT
FROM CODEC 1.25V/150mA
20171020 Brian
Change R3833 to D3802 for De-pop.
Trace width for

H_SPKL+_O/H_SPKL-_O/H_SPKR+_O/H_SPKR-_OSpeaker
Speaker :4 ohm : 40mil ;8 ohm : 20mil
C3801 2 1 1UF/25V
nbs_c0603_h37_000s
@
SL3801 J3802
SL3802 1 2 4 6
37 H_SPKR+ 0603 4 SIDE2
1 2 H_SPKR+_CON 3
37 H_SPKR- 0603 3
H_SPKR-_CON 2
2
1 5
1 SIDE1
WtoB_CON_4P
FOR EMI
1
1
12G17100004F
C3802 C3803
nbs_wtob_4p_007c
Vinafix.com
330PF/50V 330PF/50V
2
2
FOR EMI BEAD @ @
C3804 2 1 1UF/25V GND

nbs_c0603_h37_000s GND
@
SL3803
SL3804 1 2
37 H_SPKL+ 0603 20171204 Brian
1 2 H_SPKL+_CON
37 H_SPKL- 0603 Change J3802 footprint from wtob_4p_49_2hold_ra_ac to
H_SPKL-_CON nbs_wtob_4p_007c .
1
C3805 C3806
330PF/50V 330PF/50V
2
@ @
GND
20170505 不需3W Speaker 改成 short lane
BOM
Project Name Rev
X407UA/UV R1.0
Title : HDD Board-Speaker

Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
HDD Board_HDD Conn_FPC
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
SDIO_CR
Size
A
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
CB-****
Size
C
SD Card Reader
GN
1 T4201 @
MSCLK
SD-DATA2
1 T4205 @ SD-DATA3
DATA4
1 T4206 @ SDCMD
DATA5
SDCLK
U4201
30
29
28
27
26
25
24
23
22
GND2
GND1
MSCLK
MSD7/SDD2
MSD3/SDD3
MSD6/SDD4
SDCMD
MSD2/SDD5
SDCLK
+3V_CR
1 2 1 21 1 T4202 @
GND REXT MSD0/SDD6
R4201 330Ohm CR_REXT 2 20 DATA6 1 T4203 @
V33P MSD4/SDD7
3 19 DATA7
DP MSD1/SDD0
1
C4216 USB_P4_DP_R 4 18 SL4203 SD-DATA0
DM MSD5/SDD1
0.1UF/16V USB_P4_DN_R 5 17 1 2 @ SD-DATA1 20170822 Brian
GND VS33P MSBS/SDWP 0603
6 16 SDWP
XI VDDIO IO_PWR 40mil Add SL4203 for SDWP.
2
7 15 1 T4207 @
XO XTALSEL
XTALSEL
VDDHM
C1_V33
SDCDN
GND 20170125 Brian GND
MSINS
RSTN
Add T6610 for Micro-SD connector non-SDWP pin.
VDD
V18
AU6465RB63-GCF-GR
8
9
10
11
12
13
14
02046-00020200
Max : 1A 40mil +1.8V_CR
R4202 2 @ 1 0Ohm
+3V_CARD BUF_PLT_RST# 26,31,52,54,71
+3VS +3V_CR CR_RSTN
+3V_CR
1
SL4201 SDCDN C4203
近IC
1
1 2 C4201 1 T4204 @ 0.47UF/6.3V
0603 4.7UF/6.3V XDRDN/MSINS
30mil +1.8V_CR
2
@ +3V_CR IO_PWR
Pin 8
1
C4202 GND
GND 0.1UF/16V
1
1
C4205 C4206 C4207 Pin 11
2
C4204 4.7UF/6.3V 4.7UF/6.3V 0.1UF/16V
2.2UF/10V @
2
2
2
GND
20170322 Brian @
Change ECMF(U5505/U5506/U5204/U6603/U6604/U6605/U6701)
to Common mode Choke colay 0ohm.
GND GND
/MP_SL_CH 1 2 RN4201A
24 USB_PP4 0OHM +3V_CARD J4201
19
DUMMY6
+3V_CARD_CON 1 18
DAT2 DUMMY5
SD-DATA2 2 17
DAT3/CD DUMMY4
SL4202 SD-DATA3 3 16
CMD DUMMY3
USB_P4_DP_R 1 2 @ SDCMD 4 15
1
@/EMI 0603 VDD DUMMY2

R4203 2 1 0Ohm 5 14
90Ohm CLK DUMMY1
SDCLK /MP_SL SDCLK_R 6 13
L4201 VSS GND4
9 12
2
CD GND3
USB_P4_DN_R SDCDN 7 11
DAT0 GND2
1
C4209 C4210 SD-DATA0 8 10
2
DAT1 GND1
SD-DATA0 C4208 4.7UF/6.3V 0.1UF/16V SD-DATA1
SD-DATA1 SDCMD 10PF/50V @ SD_CARD_9P
1
2
/MP_SL_CH 3 4 RN4201B SD-DATA2 @/EMI
24 USB_PN4 0OHM
SD-DATA3
12023-00025900
1
C4215 C4212 C4213 C4214 GND GND GND
1
10PF/50V 10PF/50V 10PF/50V 10PF/50V C4211
20160906 chris
1
@/EMI @/EMI @/EMI @/EMI C4217 10PF/50V GND
add c6659~c6662
2
10PF/50V @
for EMI
2
@/EMI
2
GND GND GND GND 20170718 Brian
GND Change J4201 to 12023-00025900
GND
Vinafix.com
BOM
Project Name Rev
X407UA/UV R1.0
Title : CARD READER CONNECTOR

Size
D
All Vref trace must be 20 mils width
2017/02/21 X542UA_R1.1 #32, Modify R1812/18/21 to SO-DIMM setting
+1.2V M_B_VREFCA +1.2V M_A_VREFCA
2
20160218 X541UV
20160218 X541UV R1822 R1805->SL1805 for cost R1821
R1827->SL1827 for cost 1KOhm 1KOhm
1% 1%
1
1
SL1827 nbs_r0603_h39_000s SL1805 nbs_r0603_h39_000s
1 2 1 2 1 2 1 2
5 SB_DIMM_VREFCA 0603 5 SA_DIMM_VREFCA 0603
Vinafix.com
SB_DIMM_VREFCA_C R1807 2.2Ohm SA_DIMM_VREFCA_C R1812 2.2Ohm
1% 1%
1
C1803
1
C1801
0.022UF/16V
2
0.022UF/16V
2
R1820 R1818
2
2
1KOhm 1KOhm
+V_VREF_RC1 1% +V_VREF_CA_RC
1%
1
R1806
1
1
1
24.9Ohm R1810
1% 24.9Ohm
1%
2
Close to SO-DIMM Close to SO-DIMM
2
GND
GND
<Variant Name>
Project Name Rev
X507UA/UV R2.0
Title : DDR4 CA VOLTAGE

Size
C
Dept.: Engineer: Bull Tsai
U0301H
USB 2.0 Mapping USB 3.0
SSIC / USB3 1 USB 2.0 Port 1 USB 3.0 Port0
PCIE/USB3/SATA
H8 2 2
USB3_1_RXN U3_U3RXDN1 53 USB 2.0 Port
G8
USB3_1_RXP U3_U3RXDP1 53
H13 C13 USB 3.0 Port0 3 3
PCIE1_RXN/USB3_5_RXN USB3_1_TXN U3_U3TXDN1 53
PCIENB_RXN0 G13 D13
PCIE1_RXP/USB3_5_RXP USB3_1_TXP U3_U3TXDP1 53
2 1 PCIENB_RXP0 B17 4 4
PCIE1_TXN/USB3_5_TXN Cardreader
PCIEG_RXN0 CX2304 2 1 0.22UF/6.3V PCIENB_TXN0 A17 J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN
PCIEG_RXP0 CX2303 0.22UF/6.3V PCIENB_TXP0 H6 5
USB3_2_RXP/SSIC_1_RXP
/VGA G11 B13
PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN
/VGA PCIENB_RXN1 F11 A13 6
PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP CAMERA
2 1 PCIENB_RXP1 D16 USB 3.0 Type C
71 PCIENB_RXN[3:0] PCIE2_TXN/USB3_6_TXN
PCIEG_RXN1 CX2306 2 1 0.22UF/6.3V PCIENB_TXN1 C16 J10 7
71 PCIENB_RXP[3:0] PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN
PCIEG_RXP1 CX2310 0.22UF/6.3V PCIENB_TXP1 H10
/VGA H16
USB3_3_RXP/SSIC_2_RXP
B15 X540UJ 8 WLAN / BT combo
PCIE3_RXN USB3_3_TXN/SSIC_2_TXN
/VGA PCIENB_RXN2 G16 A15
PCIE3_RXP USB3_3_TXP/SSIC_2_TXP
2 1 PCIENB_RXP2 D17
71 PCIEG_RXN[3:0] PCIE3_TXN
PCIEG_RXN2 CX2308 2 1 0.22UF/6.3V PCIENB_TXN2 C17 E10
71 PCIEG_RXP[3:0]
PCIEG_RXP2 CX2305 0.22UF/6.3V PCIENB_TXP2
PCIE3_TXP USB3_4_RXN
F10 20170505 X540UPR2 DEL Type C
USB3_4_RXP
/VGA G15 C15
PCIE4_RXN USB3_4_TXN
/VGA PCIENB_RXN3 F15 D15 USB2.0 USB3.0 OC LOCATION POWER
PCIE4_RXP USB3_4_TXP
2 1 PCIENB_RXP3 B19
PCIE4_TXN
PCIEG_RXN3 CX2309 2 1 0.22UF/6.3V PCIENB_TXN3 A19 AB9 1 1 0 USB3 +5V_USB_CON1
PCIE4_TXP USB2N_1 USB_PN1 53 USB 3.0 Port0
PCIEG_RXP3 CX2307 0.22UF/6.3V PCIENB_TXP3 AB10
/VGA F16 REV = <REV>
USB2P_1 USB_PP1 53 X540UJ 2 2 1 USB3.1 TYPE-C +USB_C_VBUS
PCIE5_RXN
/VGA E16
PCIE5_RXP USB2N_2
AD6
USB_PN2 53
X541UV
C19 AD7 3 1 USB3.1 TYPE-C +USB_C_VBUS
PCIE5_TXN USB2P_2 USB_PP2 53 USB 2.0 Port2
D19
PCIE5_TXP
AH3 3 USB2.0 +5V_USB_CON1
USB2N_3
G18 AJ3
54 PCIE_RXN_WLAN PCIE6_RXN USB2P_3
F18 4
54 PCIE_RXP_WLAN PCIE6_RXP
C2301 0.1UF/10V D20 AD9
54 PCIE_TXN_WLAN PCIE6_TXN USB2N_4 USB_PN4 43
C2302 1 2 0.1UF/10V PCIE_TXN_WLAN_C C20 AD10 5
54 PCIE_TXP_WLAN PCIE6_TXP USB2P_4 USB_PP4 43
1 2 PCIE_TXP_WLAN_C
F20 AJ1 6 CAMERA +3V_CAM
69 SATA0_HDD_RX_DN PCIE7_RXN/SATA0_RXN USB2N_5
E20 AJ2
69 SATA0_HDD_RX_DP PCIE7_RXP/SATA0_RXP USB2P_5
B21 USB2 7 TOUCH PENAL +5VSUS
69 SATA0_HDD_TX_DN PCIE7_TXN/SATA0_TXN
A21 AF6
69 SATA0_HDD_TX_DP PCIE7_TXP/SATA0_TXP USB2N_6 USB_PN6 46
AF7 8 WLAN / BT combo +3VS_WLAN
USB2P_6 USB_PP6 46 CAMERA
G21
PCIE8_RXN/SATA1A_RXN
F21 AH1 9
PCIE8_RXP/SATA1A_RXP USB2N_7
D21 AH2
PCIE8_TXN/SATA1A_TXN USB2P_7
C21 10
PCIE8_TXP/SATA1A_TXP
AF8
USB2N_8 USB_PN8 54
E22 AF9
52 PCIESSD_RXN3 PCIE9_RXN USB2P_8 USB_PP8 54 WLAN / BT combo
E23
52 PCIESSD_RXP3 PCIE9_RXP
B23 AG1
52 PCIESSD_TXN3 PCIE9_TXN USB2N_9
A23 AG2
52 PCIESSD_TXP3 PCIE9_TXP USB2P_9
F25 AH7 20160218 X541UV

52 PCIESSD_RXN2 PCIE10_RXN USB2N_10
E25 AH8 R2321 unstuff for cost USB2_ID R2321
52 PCIESSD_RXP2 PCIE10_RXP USB2P_10
D23
52 PCIESSD_TXN2 PCIE10_TXN PD 1K: OTG
C23 AB6 R2315 1 2 113Ohm
52 PCIESSD_TXP2 PCIE10_TXP USB2_COMP PD 0ohm: non OTG
AG3 USBCOMP
USB2_ID
F5 AG4 R2322 1 2 1KOhm
PCIE_RCOMPN USB2_VBUSSENSE
1 2 PCIE_RCOMPN E5 USB2_VBUSSENSE
PCIE RCOMP 100 OHM 1% PCIE_RCOMPP
R2316 100Ohm PCIE_RCOMPP A9
GPP_E9/USB2_OC0# 20170720 Brian
D56 C9 USB_OC_1_2#_R +3VSUS
PROC_PRDY# GPP_E10/USB2_OC1# Remove SL2321 for EMI Xtal 0ohm space.
D61 D9 USB_OC_3_4#
PROC_PREQ# GPP_E11/USB2_OC2#
BB11 B9 USB_OC_5_6#
GPP_A7/PIRQA# GPP_E12/USB2_OC3#
PCI_INTA# USB_OC_7_8# 7 8 RN2301D
10KOHM
E28 J1 USB_OC_1_2#_R 1 2 RN2301A
52 PCIESSD_RXN1 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 SATA0_DEVSLP 69 10KOHM
E27 J2 SATA0_DEVSLP USB_OC_3_4# 3 4 RN2301B
52 PCIESSD_RXP1 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 10KOHM
D24 J3 USB_OC_5_6# 5 6 RN2301C
52 PCIESSD_TXN1 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SATA2_DEVSLP 52 10KOHM
C24 USB_OC_7_8#
52 PCIESSD_TXP1 PCIE11_TXP/SATA1B_TXP
E30 H2 20171221 Brian
52 PCIESSD_RXN0 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 Change SATA2_DEVSLP from port1 to port2.
F30 H3 DIRECT_ESATA_DETECT_R#
52 PCIESSD_RXP0 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1
Vinafix.com
A25 G4 SATA_ODD_PRSNT_R#
52 PCIESSD_TXN0 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 MSATA_MPCIE_DET# 52
B25
52 PCIESSD_TXP0 PCIE12_TXP/SATA2_TXP
H1
GPP_E8/SATALED#
To M2. SSD SATA/PCIE0 PCH_SATA_LED#
SKL-ULT
+3VS
20160218 X541UV
R2301 unstuff for cost R2302 unstuff for cost R2303 unstuff for cost
20160603 X540UP R2323 @ 10KOhm
R2301 R2302 R2303 上件
SATA0_DEVSLP 1 2
PCIE USAGE +3VS +3VS +3VS R2309 @ 10KOhm

DEFAULT/OPTION SATA2_DEVSLP 1 2
PCI-E* X1 Co-lay Clock
R2307 1 2 10KOhm
DGPU Port0
PCIE 1 PCH_SATA_LED#
1
1
DGPU R2301 R2302 R2303
PCIE 2 UX303C1 0520 10KOhm 10KOhm 10KOhm 1007-9 Dean
R2312 1 2 10KOhm
DGPU
PCIE 3 PCI_INTA# @
2
2
DGPU
PCIE 4 20170720 Brian
N/A Change R2312 to unmount.
PCIE 5
WLAN Port5 MSATA_MPCIE_DET# DIRECT_ESATA_DETECT_R# SATA_ODD_PRSNT_R#
PCIE 6
1
1
HDD R2304 R2306 R2305
PCIE 7/SATA 0 10KOhm 10KOhm 10KOhm
@ @ @
PCIE 8/SATA 1A
2
2
SSD_PCIE3
PCIE 9
SSD_PCIE2 UX303C1 0520
PCIE 10 GND GND GND
SSD_PCIE1
PCIE 11/SATA 1B
SSD_PCIE0 SSD_SATA
PCIE 12/SATA 2
SATA USAGE
SATA PORT DEFAULT/OPTION
PORT 0 HDD
PORT 1 N/A
PORT 2 N/A OPTION PCIE
PORT 3 SSD OPTION PCIE
BOM
Project Name Rev
X407UA/UV R1.0
Title : CPU_PCH_PCIE,USB,SATA
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
CB-****
Size
C
LPC DEBUG PORT
Vinafix.com
BOM
Project Name Rev
X407UA/UV R1.0
Title : DEBUG PORT

Size
A
eDP (LVDS) Panel
LCD +3VS_LCD Power
+3V_EDP
R4566 1 2 330Ohm
+3VS www.teknisi-indonesia.com
U4503
R4503 1 6
OUT IN
1KOhm 2 5
GND SET
2 1 3 4
4 L_VDDEN_PCH FLAG/EN DSG
L_VDDEN_PCH_R
G517AH1TP1U
1
06016-01100000
1
1
R4510
1
C4555
R4581 C4576 C4507 ILIM 10K = 2A 10KOhm
1UF/6.3V
100KOhm 0.1UF/6.3V 4.7UF/6.3V 1%
2
2
GND GND GND GND GND
CHECK HPD WITH P20

UX303 0830
SL4503
2 1
4 EDP_HPD_CON 0402 EDP_HPD_CON_X1
AC_BAT_SYS +LED_VCC_INV
1
1
C4568
R4521
@
JP4501 100KOhm
5PF/50V
1 2
2
1 2
2
1MM_OPEN_5MIL N/A/EMI
1
Q4501
C4509
P1203EEA GND
N/A 0.1UF/25V
2
3
S
2 5
D
1 GND
1
1
C4510 R4501
G
0.1UF/25V 100KOHM EMI MODIFY 0822
4
N/A N/A
2
20151211 X541UV CAMER AMIC 走這一路
LCD Backlight Ctrl
1
R4502
100KOHM 20150130
N/A Co-Lay AMIC/DMIC_IC/DMIC_PCH
2
SL4506 2 1
4 EDP_BRIGHTNESS 0402
EDP_BRIGHTNESS_CON
(AMIC/DMIC 只會選一組上件)
Camera USB Port
1
R4505 20160218 X541UV A/D Codec
3
D
100KOhm R4506->SL4506 for cost SLN4504A 1 2 R4515 0Ohm /AMIC
24 USB_PP6 2R4P 37 AMIC_DMIC_CLK
Q4502 SLN4504B 3 4 USB_PP6_R R4516 2 0Ohm 1 /AMIC AMIC_DMIC_CLK_AGND
24 USB_PN6 2R4P 37 AMIC_DMIC_DATA
1 2N7002K SHORT_LAND_2R4P USB_PN6_R 2 1 AMIC_DMIC_DATA_L
2
31,58,78,89 SUSB_EC#
1
G SHORT_LAND_2R4P @ @
S
3
R4517 2 33Ohm 1 @/DMIC_CODEC C4501 C4502
2
37 DMIC_DAT_ALC 2 33Ohm 1
GND L4501 R4518 @/DMIC_CODEC 0.1UF/16V 0.1UF/16V
N/A
2
37 DMIC_CLK_ALC
+3V_EDP 90Ohm/100Mhz
@/EMI DMIC to ALC3251
2
GND GND
Reserved for LCD soft-start
1
R4504 R4582 2 33Ohm 1 @/DMIC_PCH

23 DMIC_DAT_PCH
1KOhm 20171228 Brian R4583 2 33Ohm 1 @/DMIC_PCH
23 DMIC_CLK_PCH
Add C4510/C4509/R4501/R4502 and Q4501/Q4502.
Vinafix.com
D4501 20170630 Brian DMIC to PCH
2
1 Remove USB_PP7 / USB_PN7 / I2C2_SDA_TCHPANEL

4 L_BKLT_EN
3 and I2C2_SCL_TCHPANEL for Non-Touch Panel.
2 BL_EN_C
31 LCD_BACKOFF#
20180124 Brian
BAT54AW
Add R4582/R4583 for DMIC to PCH.
eDP Panel differential signals
C4504 0.1UF/16V SL4507 1 2

4 EDP_TXN0 0603
C4505 1 2 0.1UF/16V EDP_L0_N_R SL4508 1 2 EDP_L0_N_C
4 EDP_TXP0 0603
1 2 EDP_L0_P_R EDP_L0_P_C
C4585 0.1UF/16V SL4509 1 2 +3VS +3V_CAM

4 EDP_TXN1 0603
C4586 1 2 0.1UF/16V EDP_L1_N_R SL4510 1 2 EDP_L1_N_C
4 EDP_TXP1 0603
1 2 EDP_L1_P_R EDP_L1_P_C
@
C4506 0.1UF/16V SL4511 1 2 F4502 1 2 1.5A/6V
J4501
4 EDP_AUXN 0603
C4508 1 2 0.1UF/16V EDP_AUXN_R SL4512 1 2 EDP_AUXN_C
4 EDP_AUXP 0603 SIDE1
1 2 EDP_AUXP_R EDP_AUXP_C SL4502 41
1
1 2 1
0603 2 SIDE3
2 43
3
1
20170705 Brian 3
2
4
Change RN4501/RN4502/RN4503 footprint to temp_T_001865 C4594 C4574 C4573 4
for colay ECMF. 5
0.1UF/16V 10UF/6.3V 10PF/50V USB_PN6_R 5
1
6
2
N/A @ USB_PP6_R 6
@/RF 7
20170707 Brian 7
8
Change RN4501/RN4502/RN4503 footprint to 10G302000004020 GND GND GND AMIC_DMIC_DATA_L 8
for colay ECMF. 9
AMIC_DMIC_CLK_AGND 9
10
10
11
20170714 Brian 20170630 Brian EDP_L1_N_C 11
12
Remove RN4501/RN4502/RN4503/L4504/L4509/L4510 EDP_L1_P_C 12
for Non-CMF colay Remove USB_PP7 / USB_PN7 / I2C2_SDA_TCHPANEL 13
/I2C2_SCL_TCHPANEL and TPanel_INT# 13
14
for Non-Touch Panel. EDP_L0_N_C 14
15
EDP_L0_P_C 15
16
16
17
EDP_AUXP_C 17
18
EDP_AUXN_C 18
+3V_EDP 19
19
20
20
21
C4517 10PF/50V 21
22
1 2 22
23
@/RF 23
24
EDP_HPD_CON_X1 24
25
25
26
BL_EN_C 26
27
EDP_BRIGHTNESS_CON 27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
+LED_VCC_INV 36
37
37
38
38
39
39
40 SIDE4
40 44
SIDE2
1
42
C4591 C4592 C4593 WTOB_CON_40P
10PF/50V 10PF/50V 10PF/50V
2
@/EMI @/EMI @/EMI
D4502 GND 12017-00181800
GND
1 6
USB_PP6_R I/O1 I/O4 USB_PN6_R
GND GND GND
+5VSUS
20150707 EMI預留
20160316 換回X540LJ
GND
2 5
VDD
20160701 LBS換footprint
GND
3 4
I/O2 I/O3
AZC099-04SP
靠近J4501
BOM
Project Name Rev
X407UA/UV R1.0
Title : LCD Panel_CMOS_DMIC

Size
D
eDP to LVDS
Vinafix.com
BOM
Project Name Rev
X407UA/UV R1.0
Title : LVDS CONNECTOR

Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : CRT D-SUB

Vinafix.com
Size
D
EC 8585
Power
Only 3V Torlence +3VS +3VA_EC +3VPLL +3VA_EC +3VACC
GPB[0,1,2,3,4,5,6] SL3005 SL3006

GPC[3,4,5,6,7] 1 2 1 2
GPD[0,4,6,7] 0603 SHORTPIN +3VA
GPE[4]
1
C3002 C3003 C3006 C3004 C3005 C3007 nbs_r0603_shorted_000s C3001
GPF[6,7] 0.1UF/16V 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V R3007 1 2 10KOhm
nbs_c0603_h37_000s nbs_c0603_h37_000s SL3007 PWR_SW# R3008 1 2 10KOhm
GPH[7]
2
1 2 LID_SW# R3009 1 2 10KOhm
GPI [0 :7] SHORTPIN AC_IN_OC#
GPJ[0:7] nbs_r0603_shorted_000s
EC_AGND
+5VS
RN3002B 4.7KOhm @
3 +3VS
Can be adjusted to TP_DAT RN3002A 4.7KOhm 4 @
20160104 X541UV del +1.8VS +3VS TP_CLK 1 2
Open-Drain for port: RN3004A 1 2
4.7KOhm
RN3004B 3 4
4.7KOhm
GPA0~GPA3
GPB0~GPB7
LCD_BACKOFF# 46
GPD0~GPD7 +3VA_EC +3VPLL
GPE0~GPE7 +3VACC
GPF0~GPF7 +3VA_EC
GPH0~GPH6
GPJ0~GPJ5 U3001
121
127
114
IT8995E
26
50
92
74
11
RN3003B 3 4
3
4.7KOHM
7 8 RN3001D 10 24 SMB1_DAT RN3003A 1 2
6,29 LPC_AD0 PWR_LED 32,60
VCC
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
GPH7
AVCC
VSTBY(PLL)
47OHM EIO0/LAD0/GPM0 PWM0/GPA0 4.7KOHM
5 6 RN3001C LPC_AD0_R 9 25 SMB1_CLK RN3003C 5 6
6,29 LPC_AD1 47OHM EIO1/LAD1/GPM1 PWM1/GPA1 CHG_LED# 60 4.7KOHM
3 4 RN3001B LPC_AD1_R 8 28 CHG_LED# SMB0_DAT RN3003D 7 8
6,29 LPC_AD2 47OHM EIO2/LAD2/GPM2 PWM2/GPA2 CHG_FULL_LED# 60 4.7KOHM
1 2 RN3001A LPC_AD2_R 7 29 1 T3010 SMB0_CLK
6,29 LPC_AD3 47OHM EIO3/LAD3/GPM3 PWM3/GPA3
LPC_AD3_R 13 30 EC_GPA3 1 T3011 R3063 100KOhm
6 CLK_KBCPCI_PCH ESCK/LPCCLK/GPM4 PWM4/GPA4
CLK_KBCPCI_PCH 6 31 EC_GPA4 PWRLIMIT_EC# 1 2
EC Require 6,29 LPC_FRAME#
22
ECS#/LFRAME#/GPM5 PWM5/GPA5
32
FAN0_PWM 51
1 2
R3001 10KOhm
26,43,52,54,71 BUF_PLT_RST# ERST#/LPCRST#/GPD2 PWM6/SSCK/GPA6
5 34 1 T3013 EC_GPB2
UX303 0809
6 INT_SERIRQ ALERT#/SERIRQ/GPM6 PWM7/RIG1#/GPA7
LPC
15 EC_GPA7
4 EXT_SMI# PLTRST#/ECSMI#/GPD4 UX303 0926
23 108 Need external PU R3017 100KOhm
4 EXT_SCI# ECSCI#/GPD3 AC_IN#/GPB0 AC_IN_OC# 77,90
T3005 1 126 109 Need external PU 3VADSW_ON 1 2
GA20/GPB5 LID_SW#/GPB1 LID_SW# 33,60
A20GATE 4 123 1 T3003 R3015 1 2 10KOhm
6,70 RC_IN# KBRST#/GPB6 CTX0/TMA0/GPB2
14 112 EC_GPB2 2 1 SL3017
33 EC_RST# WRST# VSTBY0 0402 +3VA
FLASH ROM
3VA_ALW R3061 1 2 1MOhm
125 113 1 T3026 5VSUS_ON
77 DGPU_LIMIT SSCE1#/GPG0 CRX0/GPC0
R3024 1 2 15Ohm 105 EC_GPC0 20170510 follow X542UA_R1.0 #79, Remove PM_EXTTS#0 & R3091
29 EC_SCK_PCH FSCK
T3009 1 EC_SCK_PCH_X1 119 120 1 T3022
DSR0#/GPG6 TMRI0/GPC4
R3028 1 2 15Ohm EC_GPG6 103 EC_GPC4 R3060 100KOhm
29 EC_SO_PCH FMISO
R3010 1 2 15Ohm EC_SO_PCH_X1 102 124 2 1 SL3018 1 2
29 EC_SI_PCH FMOSI TMRI1/GPC6 0402 BAT1_IN_OC# 90
SL3025 2 1 EC_SI_PCH_X1 101 16 EC_GPC6 1 T3018 R3036 1 2 1MOhm
29 EC_SCE#_PCH 0402 FSCE# RXD/SIN0 /PWUREQ#/BBO/SMCLK2ALT/GPC7
EC_SCE#_PCH_X1 100 EC_GPC7 VSUS_ON @
SSCE0#/GPG2
SL3016 2 1 18 2 1 SL3009
90 PWRLIMIT_EC# 0402 RI1#/GPD0 PCH_SLP_S0# 26 X541UA MODIFY
EC_GPG2 58 21 EC_GPD0 2 0402 1 SL3010
UX303 0918 32 KSI0 KSI0/STB# RI2#/GPD1 ME_AC_PRESENT 26
59 33 EC_GPD1 2 0402 1 SL3013
32 KSI1 KSI1/AFD# GINT/CTS0#/GPD5 0402 OP_SD# 38,39
20160218 X541UV 60 47 EC_GPD5
32 KSI2 KSI2/INIT# TACH0A/GPD6 FAN0_TACH 51
R3025->SL3025 for cost 61 48 1 T3019 R3021 1 @ 2 10KOhm
32 KSI3 KSI3/SLIN# TACH1A/TMA1/GPD7
62 EC_GPD7 CHG_FULL_LED# R3022 1 @ 2 10KOhm
32 KSI4 KSI4 UX303 1003
2 1 63 19 2 1 SL3003 CHG_LED# R3016 1 @ 2 10KOhm
32 KSI5 KSI5 L80HLAT/BAO/GPE0 SUSB_EC# 46,58,78,89
EC_RST# 64 82 EC_GPE0 2 0402 1 SL3012 THRO_CPU# R3018 1 @ 2 10KOhm
32 KSI6 KSI6 EGAD/GPE1 0402 SUSC_EC# 58,89
C3022 65 84 EC_GPE1 PM_SLP_SUS#
32 KSI7 KSI7 EGCLK/GPE3
1000PF/50V 83 R3020 @ 100KOhm
EGCS#/GPE2 1.2V_ON 87
36 107 1 T3020 1 2
GPIO
32 KSO0 KSO0/PD0 GPE4/BTN#
KBMX
37 35
32 KSO1 KSO1/PD1 RTS1#/GPE5 PM_SUSB# 26,59,89
38 17 1 T3021
32 KSO2 KSO2/PD2 TXD/SOUT0/LPCPD#/GPE6
2013/03/15 Paul :For EMI resevered 39 20 CAP_LED#
KSO3/PD3 L80LLAT/GPE7 THRO_CPU# 9
Vinafix.com
32 KSO3
40
32 KSO4 KSO4/PD4
41
32 KSO5 KSO5/PD5
42 122
32 KSO6 KSO6/PD6 DTR1#/SBUSY/GPG1/ID7 PCH_SUSACK# 26
43 +3VSUS
32 KSO7 KSO7/PD7
44 R3019 1 @ 2 10KOhm
32 KSO8 KSO8/ACK# +3VA_EC
45 PM_PWRBTN#
32 KSO9 KSO9/BUSY
46 106 SL3019 1 2
32 KSO10 KSO10/PE VFSPI 0402 +3VS
51 R1.2-8
32 KSO11 KSO11/ERR#
52 93
32 KSO12 KSO12/SLCT CLKRUN#/GPH0/ID0 PM_CLKRUN# 6
53 94 1 T3004
ITE Version ASUS P/N 32 KSO13 54
KSO13 CRX1/SIN1/SMCLK3/GPH1/ID1
95 SMB3_CLK 1 T3007 R3085 1 2 10KOhm
32 KSO14
55
KSO14 CTX1/SOUT1/SMDAT3/GPH2/ID2
96 SMB3_DAT R1.0-6 IMVP8_PWRGD UX303C1 0718
IT8995E/AX 06037-00050400 32 KSO15
56
KSO15 GPH3/ID3
97
PM_RSMRST# 26
R3074 1 @ 2 10KOhm
26 PM_PWRBTN# KSO16/SMOSI/GPC3 GPH4/ID4 DPWROK_EC 26,59
57 98 A20GATE
IT8995E-128/CX 06037-00050500 26,87 PM_SUSC# KSO17/SMISO/GPC5 GPH5/ID5
99
PM_PWROK 26
R3075 1 2 10KOhm
GPH6/ID6 PM_SYSPWROK 26
T3024 1 128 RC_IN#
GPJ6/THERMTRIP_SHUTDOWN#
T3008 1 2 66
GPJ7 ADC0/GPI0 PM_SLP_SUS# 26
67 PM_SLP_SUS# UX303C1 0520
ADC1/GPI1 3VSUS_PWRGD 59
PS/2
85 68 R3032 1 @ 2 10KOhm
58,88 5VSUS_ON PS2CLK0/TMB0/CEC/GPF0 ADC2/GPI2 ALL_SYSTEM_PWRGD 26,59,70,81
86 69 IMVP8_PWRGD = CORE_PWRGD PM_RSMRST#
58,84,89 VSUS_ON PS2DAT0/TMB1/GPF1 ADC3/GPI3 IMVP8_PWRGD 26,81
87 70 IMVP8_PWRGD 5VSUS_PWRGD remove UX303 0918 R3065 1 2 10KOhm
61,90 SMB0_CLK SMCLK0/GPF2 ADC4/GPI4 3VA_DSW_PWRGD 26,59,88
Battery 88 71 SUSB_EC# R3066 1 2 10KOhm
61,90 SMB0_DAT SMDAT0/GPF3 ADC5/DCD1#/GPI5
89 72 ME_SusPwrDnAck_EC SUSC_EC#
32 TP_CLK PS2CLK2/GPF4 ADC6/DSR1#/GPI6 A/D_MAX_POWER 90
90 73
32 TP_DAT PS2DAT2/GPF5 ADC7/CTS1#/GPI7 MB_MAX_POWER 90
R3069 1 @ 2 10KOhm
2 1 SL3008 110 76 1 T3023 EC_SCK_PCH_X1 R3068 1 @ 2 10KOhm
32,33,60 PWR_SW# 0402 PWRSW/GPB3 TACH2/GPJ0
SMBus
EC_GPB3 111 77 EC_SCE#_PCH_X1 R3030 1 @ 2 10KOhm

33,58,89 PS_ON XLP_OUT/GPB4 GPJ1 3VADSW_ON 88
@ 115 78 1 T3015 EC_SO_PCH_X1 R3031 1 @ 2 10KOhm
29,91 SMB1_CLK SMCLK1/GPC1 DAC2/TACH0B/GPJ2
Thermal sensor 116 79 PL_REF_EC 1 T3025 EC_SI_PCH_X1
29,91 SMB1_DAT SMDAT1/GPC2 DAC3/TACH1B/GPJ3
VCORE
R3033 1 2 43Ohm 117 80 EC_GPJ3 1 T3016 R3006 @ 100KOhm

9 PECI_EC SMCLK2/PECI/GPF6 DAC4/DCD0#/GPJ4
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
PECI_EC_R 118 81 IBAT_REF_EC 1 T3014 MB_MAX_POWER R3002 1 2 100KOhm

23 PCH_SPI_OV SMDAT2/PECIRQT#/GPF7 DAC5/RIG0#/GPJ5
EC_GPJ5 PM_SUSC# R3003 1 2 100KOhm
PM_SUSB# 1 2
2014/02/06-3
1
12
27
49
91
104
75
06037-00050700 EMI solution

EC_12
PM_SYSPWROK
+3VA_EC
1
EC_AGND C3023 Checking
BAT1_IN_OC#
1
@ 0.1UF/6.3V
可拆→接到BAT
C3019 15PF/50V C3008 @ 不可拆→PD
2
EC_SCK_PCH 1 2 0.1UF/16V
2
@ R3047 1 @/in-BAT 2 10KOhm for X455

C3020 33PF/50V BAT1_IN_OC# R3048 1 2 10KOhm internal battery always PD
EC_SI_PCH 1 2 PM_PWROK /in-BAT
1
@ C3024
C3021 33PF/50V 0.1UF/6.3V
EC_SCE#_PCH 1 2 @
2
DPWROK_EC
1
C3025
1000PF/50V
2
@
C3018 10PF/50V
CLK_KBCPCI_PCH 1 2
UX303 1202 EMI
@
C3011 0.01UF/16V ALL_SYSTEM_PWRGD
1
BAT1_IN_OC# 1 2 C3026
UX303 1002 UX303 0826 C3013 0.1UF/10V 0.1UF/6.3V
C3012 0.01UF/16V SUSB_EC# 1 2 @
2
PWR_SW# 1 2 @/EMI
C3014 0.1UF/10V
2 1 SL3001
2 1 26 SUSWARN# 0402 SUSC_EC# 1 2
ME_SusPwrDnAck_EC BOM
BUF_PLT_RST# @/EMI 3VSUS_PWRGD
C3009 C3015 0.1UF/10V 1 C3027 Project Name Rev
1000PF/50V LID_SW# 1 2 1000PF/50V
@/EMI X407UA/UV R1.0
2
Title : IT8995E-128/CX
Size
C
HDMI type-A
+12VS
R1.2_對GND電容,修改為GS電容預留
1
R4801
C4814 100KOhm
0.01UF/25V
@
2
2 1 +5VS_HDMI_CRT
+5VS Q4802
Close to CONNECTOR 2N7002 F4801
1
1
G
1.5A/6V R4802 0Ohm
2 3 1 2 1 2
Near CON J4801
3
+5VSHDMI
D
S
2nd source nbs_r0805_h24_000s
1
07G014150321 C4815 C4809
UX303 0917 07G014150A00 4.7UF/6.3V 0.1UF/10V
Close J4801 X506 modify
@ +5VS_HDMI_CRT
07G014150123
2
2
5 6 RN4801C +3VS +3VS
4 HDMI_DATA2N_PCH 0Ohm
C4801 1 2 HDMI_DATA2N_PCH_X1
0.1UF/16V HDMI_DATA2N_PCH_X2 GND
2
2
1
L4801 R4803
@
90Ohm/100Mhz
180Ohm
@ HDMI CON. 換Connector
3
3
1
3
1
RN4811A RN4811B
7 8 RN4801D RN4810A RN4810B 2.2KOHM 2.2KOHM
4 HDMI_DATA2P_PCH 0Ohm
C4802 1 2 HDMI_DATA2P_PCH_X1
0.1UF/16V HDMI_DATA2P_PCH_X2 2.2KOHM 2.2KOHM
J4801
4
19 20
4
19 P_GND1
Q4807A HDMI_HP_X1 18 22
18 P_GND3
UM6K1N +5VSHDMI 17
2
17
16
16
5 6 RN4802C 1 6 15
4 HDMI_DATA1N_PCH 0Ohm 4 DDPC_SCL_PCH 15
C4803 1 2
0.1UF/16V HDMI_DATA1N_PCH_X1 HDMI_DATA1N_PCH_X2 Q4807B DDPC_SCL_PCH_X1 14
14
UM6K1N 13
5
13
2
12
2
12
L4802 R4804 4 3 HDMI_CLKN_PCH_X2 11
4 DDPC_SDA_PCH 11
@ 180Ohm DDPC_SDA_PCH_X1 10
10
90Ohm/100Mhz @ HDMI_CLKP_PCH_X2 9
3
9
HDMI_DATA0N_PCH_X2 8
8
1
7
7
7 8 RN4802D HDMI_DATA0P_PCH_X2 6
4 HDMI_DATA1P_PCH 0Ohm 6
C4804 1 2
0.1UF/16V
HDMI_DATA1P_PCH_X1 HDMI_DATA1P_PCH_X2 HDMI_DATA1N_PCH_X2 5
5
4
4
HDMI_DATA1P_PCH_X2 3
3
HDMI_DATA2N_PCH_X2 2 23
2 P_GND4
1 21
1 P_GND2
HDMI_DATA2P_PCH_X2
+3VS HDMI_CON_19P
1 2 RN4801A R4861
4 HDMI_DATA0N_PCH 0Ohm
12022-00094900
Vinafix.com
C4810 1 2
0.1UF/16V HDMI_DATA0N_PCH_X1 HDMI_DATA0N_PCH_X2 1 2
GND
2
1MOhm GND
G
1
2
G
L4803 R4805 20170629 Brian
1
@ 180Ohm 2 1 SL4802 S D D4802 Change J4801 from 12022-00094900 to
2 S
1
4 HDMI_HP 0402 12022-00094400(X507).
90Ohm/100Mhz @ HDMI_HP_X1 ULCE0505A015FR
D
3
3
@/EMI
2
1
1
1
Q4804 R4826 D4801 D4803

對Pin Define
2
1
1
3 4 RN4801B ME2N7002D 20KOhm ULCE0505A015FR ULCE0505A015FR
4 HDMI_DATA0P_PCH 0Ohm
C4811 1 2
0.1UF/16V HDMI_DATA0P_PCH_X1 HDMI_DATA0P_PCH_X2 @/EMI @/EMI
2
2
2
GND
GND
GND GND
1 2 RN4802A
4 HDMI_CLKN_PCH 0Ohm
C4812 1 2
0.1UF/16V HDMI_CLKN_PCH_X1 HDMI_CLKN_PCH_X2
HDMI HPD
2
2
L4804 R4806
@ 180Ohm
90Ohm/100Mhz @
3
3 4 RN4802B
4 HDMI_CLKP_PCH 0Ohm
C4813 1 2
0.1UF/16V HDMI_CLKP_PCH_X1 HDMI_CLKP_PCH_X2
R4831 1 1% 2 470Ohm
R4836 1 1% 2 470Ohm HDMI_DATA2P_PCH_X1
HDMI_DATA2N_PCH_X1 UX303 1016 SWAP
R4832 1 1% 2 470Ohm U4802
R4833 1 1% 2 470Ohm HDMI_DATA1P_PCH_X1 1
Line-1
HDMI_DATA1N_PCH_X1 HDMI_DATA2P_PCH_X2 2 9
Line-2 NC4
R4834 1 1% 2 470Ohm HDMI_DATA2N_PCH_X2 3 8 HDMI_DATA2P_PCH_X2
GND NC3
R4835 1 1% 2 470Ohm HDMI_DATA0P_PCH_X1 4 7 HDMI_DATA2N_PCH_X2
Line-3 NC2
HDMI_DATA0N_PCH_X1 HDMI_DATA0P_PCH_X2 5 6 HDMI_DATA0P_PCH_X2
Line-4 NC1
R4838 1 1% 2 470Ohm HDMI_DATA0N_PCH_X2 HDMI_DATA0N_PCH_X2
R4837 1 1% 2 470Ohm HDMI_CLKP_PCH_X1 AZ1045-04F @
HDMI_CLKN_PCH_X1 07G028076030
3
GND
D
D
+3VS Q4801
ME2N7002D U4803
G1 1
Line-1
G HDMI_DATA1P_PCH_X2 2 9
Line-2 NC4
2 S HDMI_DATA1N_PCH_X2 3 8 HDMI_DATA1P_PCH_X2
S
UX303 0917 follow design guide R2.2 GND NC3

4 7 HDMI_DATA1N_PCH_X2
Line-3 NC2
HDMI_CLKP_PCH_X2 5 6 HDMI_CLKP_PCH_X2
Line-4 NC1
GND HDMI_CLKN_PCH_X2 HDMI_CLKN_PCH_X2
AZ1045-04F @
BOM
07G028076030
GND Project Name Rev
X407UA/UV R1.0
Title : HDMI-type D
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
TV_****
Size
C
CPU Thermal Sensor
+3VS
1
R5001
14KOHM
U5001
2
SHORT_LAND_2R4P SHORT_LAND_2R4P
1 2 SLN5001A 1 5 4 3 SLN5001B
29,77 SMB1_CLK_S 2R4P SCL SDA 2R4P SMB1_DAT_S 29,77
SML1_CLK_TH 2 SML1_DAT_TH
GND
3 4
33 CPU_THERM# ALERT# VDD +3VS
1
O/D NCT7717U C5001
0.1UF/10V
2
GND GND
Route CPU_THRM_DA , CPU_THRM_DC and on

the same layer
------------------OTHER SIGNALS
SL5001 10 mils
1 2
+5VS 0805 +5V_FAN ===============GND
10 mils
=========H_THERMDA(10 mils)
DC FAN Control 10 mils
=========H_THERMDC(10 mils)
Vinafix.com
10 mils
=========GND
10 mils
---------------------OTHER SIGNALS
Avoid FSB,Power
+3VS +5V_FAN
1
R5002 C5003 C5002

10KOhm 10UF/6.3V 0.1UF/10V
@
J5001
2
2
2
4 6
4 SIDE2
GND GND 3
31 FAN0_PWM 3
2
2
1 5
31 FAN0_TACH 1 SIDE1
1
C5004 C5005 WtoB_CON_4P

100PF/50V 100PF/50V 12G17100004F
2
GND GND GND GND
20160316 換回X540LJ
<Variant Name>
Title : 50_FAN_Thermal Sensor

B X407UA/UV R1.0

0310-1 Dean
0314-2 Dean
SSD CONN. +3VS +3VS_SSD
PCIE colay SATA signals

SL5101 1.5A
1 2
0805
1
C5135 C5138 C5140 C5134 C5132 C5139 C5133 C5103
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 10UF/6.3V 10UF/6.3V 22UF/6.3V
@ @/EMI N/A @ @ @
2
nbs_c0805_h57_000s
GND GND
20171206 Brian
Add C5140 and C5139 for SATA colay PCIE signal.
6/8 Jacky add 0.1UF for ESD
SATA DEVSLP.
R5173
2 1
24 SATA2_DEVSLP
nbs_r0201_h10_000s SATA2_DEVSLP_R
0Ohm R5101
1
1007-11 Dean @ 0Ohm

nbs_r0201_h10_000s
2
GND +3VS_SSD
PCIE Wake-up. J5101

2 1 1 T5102
3.3V_1 GND/CONFIG_3
4 3 NGFF_CONFIG3
3.3V_2 GND1
6 5
NC1 PERN3 PCIESSD_RXN3 24
8 7
NC2 PERP3 PCIESSD_RXP3 24
@ T5101 1 10 9
DAS/DSS#(OD) GND2
NGFF_DAS/DSS# 12 11 C5114 1 2 0.22UF/6.3V
3.3V_3 PETN3 PCIESSD_TXN3 24
14 13 PCIESSD_TXN3_C C5115 1 2 0.22UF/6.3V
3.3V_4 PETP3 PCIESSD_TXP3 24
16 15 PCIESSD_TXP3_C
3.3V_5 GND3
18 17
3.3V_6 PERN2 PCIESSD_RXN2 24
20 19
NC3 PERP2 PCIESSD_RXP2 24
22 21 1 T5104
NC4 GND/CONFIG_0
24 23 NGFF_CONFIG0 C5116 1 2 0.22UF/6.3V
NC5 PETN2 PCIESSD_TXN2 24
26 25 PCIESSD_TXN2_C C5117 1 2 0.22UF/6.3V
NC6 PETP2 PCIESSD_TXP2 24
28 27 PCIESSD_TXP2_C
NC7 GND4
30 29
NC8 PERN1 PCIESSD_RXN1 24
32 31
NC9 PERP1 PCIESSD_RXP1 24 @/EMI
34 33
20170628 Brian
2
NC10 GND5 90Ohm/100Mhz
36 35 C5118 1 2 0.22UF/6.3V
Remove PCIE Wake-up schematic select for SSD SATA only. 38
NC11 PETN1
37 PCIESSD_TXN1_C C5119 1 2 0.22UF/6.3V
PCIESSD_TXN1 24 L5101
DEVSLP(0/3.3V) PETP1 PCIESSD_TXP1 24
SATA2_DEVSLP_R 40 39 PCIESSD_TXP1_C
3
NC12 GND6
42 41 SLN5101A 1 2
20171221 Brian 44
NC13 PERN0/SATA-B+
43 SATA2_SSD_RX_DP_R SLN5101B 3
2R4P
4
PCIESSD_RXP0 24
For PCIE/SATA select. Add SSD PCIE signal group. 46
NC14
NC15
PERP0/SATA-B-
GND7
45 SATA2_SSD_RX_DN_R
2R4P PCIESSD_RXN0 24
48 47 C5112 1 2 0.22UF/6.3V SLN5102A 1 2

NC16 PETN0/SATA-A- 2R4P
PCIESSD_TXN0 24
SL5106 1 2 50 49 SATA2_SSD_TX_DN_R C5113 1 2 0.22UF/6.3V SATA2_M2SSD_TX_DN_C SLN5102B 3 4
+3VS_SSD 26,31,43,54,71 BUF_PLT_RST# 0201 PERST#(0/3.3V)/NC PETP0/SATA-A+ 2R4P
PCIESSD_TXP0 24
SL5107 1 2 NGFF_PERST# 52 51 SATA2_SSD_TX_DP_R SATA2_M2SSD_TX_DP_C
25 CK_REQ_P3# 0201 CLKREQ#(IO)(0/3.3V)/NC GND8 @/EMI
@ T7615 1 NGFF_CLK# 54 53 SL5103 1 2
2
PEWAKE#(IO)(0/3.3V)/NC REFCLKN 0201 CLK_PCIE_SSD# 25 90Ohm/100Mhz
T5106 1 NGFF_PEWAKE# 56 55 MPCIE_SSD_CLK#_C SL5102 1 2
NC/MFG1 REFCLKP 0201 CLK_PCIE_SSD 25 L5103
2016/5/3 Tommy Remove R5110, T5105 1 NGFF_MFG1 58 57 MPCIE_SSD_CLK_C
page 23 have PU resistor. NC/MFG2 GND9
NGFF_MFG2
3
2016/6/22 Remove Q5101B, C5107.
2
R5111
20171221 Brian
10KOhm
Add SSD PCIE signal group.
T5108 1 68 67
SUSCLK(32KHZ)/(0/3.3V) NC17
SUS_CK_IO 70 69
3.3V_7 PEDET /NC-PCIo/GND-SATA)/CONFIG_1
1
72 71 NGFF_CONFIG1
3.3V_8 GND10
74 73
3.3V_9 GND11
NP_NC1
NP_NC2
R5104 75 1 T5103
SIDE1
SIDE2
GND/CONFIG_2
0OHM NGFF_CONFIG2
24 MSATA_MPCIE_DET# 2 1 NGFF_CONFIG1 MINI_PCI_75P_REMOVE8
76
77
78
79
20170630 Brian
Change J5101 from 12003-00162500 to
2
R5102
10KOhm
0-SATA 12003-00161800 (K501UW).
@
1-PCIE 20170704 Brian
Change J5101 from 12003-00162500 to
12003-00162200
1
12003-00162200.
Vinafix.com
GND GND
20171206 Brian
Add PCIE/SATA schematic select for SSD SATA colay PCIE.
BOM
Project Name Rev
X407UA/UV R3.0
Title : SATA HDD & ODD

Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB4 Brian Chen
D
20170705 Brian
20150513 Change RN5215/RN5216 footprint to temp_T_001865
R1.1 Add USB power SW for power protect
USB3.0_Port 0 for colay ECMF.
20170707 Brian +5V_USB_CON1

20160505 Cost down
Change RN5215/RN5216 footprint to 10G302000004020
for colay ECMF.
J5202
USB3.0 port 0 Power SW for Power Protect 24
24
USB_PP1
USB_PN1
USB_PP1 1
VBUS
USB_PN1 2
D-
USB_U1-_CON 3
D+
1
C5209 0.1UF/16V C5215 C5216 USB_U1+_CON 4
24 U3_U3TXDP1 GND
C5210 1 2 0.1UF/16V U3_U3TXDP1_R1 22UF/6.3V 22UF/6.3V + CE5202 C5234 5
24 U3_U3TXDN1 STDA_SSRX-
1 2 U3_U3TXDN1_R1 nbs_c0805_h57_000s nbs_c0805_h57_000s 100UF/6.3V 0.1UF/16V U3_U3RXDN1_R 6
STDA_SSRX+
2
@ @ U3_U3RXDP1_R 7
GND_DRAIN
2
nbs_c3528_h83_000s 8
STDA_SSTX-
U3_U3TXDN1_R 9
+3V +5VSUS +5V_USB_CON1 24 U3_U3RXDP1 STDA_SSTX+
U3_U3TXDP1_R
24 U3_U3RXDN1
10
P_GND1
GND GND GND 11
P_GND3
2
12
R5235
20171025 Brian 13
P_GND4
3.3KOHM
Delete RN5215 / RN5216 for L5206/L5209 colay footprint.. P_GND2
U5201 USB_CON_9P
1 8
GND OUT1
12013-00151600
1
2 7 20160505 Cost down GND

IN1 OUT2
3 6
IN2 OUT3
4 5 L5206 L5209
7
5
7
5
EN#/EN OC#
C5238
20170629 Brian
GND3
GND1
GND3
GND1
U5204 Change J5202 from 12013-00087800 to
1
BD82046FVJ-GE2
1 3 12013-00151600 (X507).
2
06016-01290000 Via_Input1 Via_Output1

C5223 100UF/6.3V 1 2 1 2 USB_PP1 USB_U1+_CON
SIG_IN+ SIG_OUT+ SIG_IN+ SIG_OUT+
2
1
0.1UF/16V C5247 C5248 1 nbs_c1206_h75_000s U3_U3TXDP1_R1 U3_U3TXDP1_R U3_U3RXDP1 U3_U3RXDP1_R 2 4

1
Via_Input2 Via_Output2
22UF/6.3V 22UF/6.3V @ 4 3 4 3 USB_PN1 USB_U1-_CON
SIG_IN- SIG_OUT- SIG_IN- SIG_OUT-
nbs_c0805_h57_000s nbs_c0805_h57_000s
@ U3_U3TXDN1_R1 U3_U3TXDN1_R U3_U3RXDN1 U3_U3RXDN1_R
2
GND 5 9
C1_1 Via9
GND4
GND2
GND4
GND2
C5241 ECMF_P_21 ECMF_P_21
1
GND 10PF/50V 6 10
C2_1 Via10
@/ RF RFL11T2SA1AR @/ RF RFL11T2SA1AR /EMI C5242 ECMF_N_21 ECMF_N_21 @/EMI
8
6
8
6
1
nbs_c0201_h13_000s 10PF/50V 7 13 R5201 2 1 0Ohm
C1_2 R1_1
2
GND GND /EMI USB_PP1 nbs_r0201_h10_000s @/EMI
nbs_c0201_h13_000s 8 14 R5202 2 1 0Ohm
C2_2 R2_1
2
USB_PN1 nbs_r0201_h10_000s
20170823 Brian 11 15
Add C5247& C5248 for USB3.0 drop. Via11 R1_2
USB_U1+_CON
12 16
Via12 R2_2
USB_U1-_CON
20180307 Brian GND

Change C5241, C5242, C5243, C5244 from
18pF to 10pF(0201) for USB2.0 eye diagram.
/EMI
nbs_empass_ecmf_8p_8v_002;nbs_empass_ecmf_8p_8v_002_t;nbs_empass_ecmf_8p_8v_002_b
20150513
R1.1 Add USB power SW for power protect
USB2.0_Port 2 X540UJ DEL

20170505 X540UPR2 Add USB2.0
USB2.0 port 2 Power SW for Power Protect
+5V_USB_CON2 USB2.0 CONN
24 USB_PP2 J5203
USB_PP2 1.8A USB2.0*2
24 USB_PN2 VBUS P_GND1
USB_PN2 1 5
D- P_GND2
USB_PN2_CON_IO 2 6
+3V +5VSUS +5V_USB_CON2 D+ P_GND3
USB_PP2_CON_IO 3 7
PGND P_GND4
1
C5231 C5230 nbs_c3528_h83_000s 4 8
22UF/6.3V 22UF/6.3V + CE5231 C5233 USB_CON_1X4P
2
nbs_c0805_h57_000s nbs_c0805_h57_000s 100UF/6.3V 0.1UF/16V

12012-00068200
2
R5236 @ @
2
3.3KOHM
U5202
1 8 20170705 Brian
GND OUT1
1
2 7 Change J5203 from 12012-00012500 to

IN1 OUT2 20160505 Cost down U5205 12012-00068200 (X507).
3 6 GND GND GND GND
IN2 OUT3
4 5 1 3 GND
EN#/EN OC# Via_Input1 Via_Output1
USB_PP2 USB_PP2_CON_IO
Vinafix.com
1
BD82046FVJ-GE2 2 4
Via_Input2 Via_Output2
C5246 USB_PN2 USB_PN2_CON_IO
2
06016-01290000
C5245 100UF/6.3V
2
0.1UF/16V nbs_c1206_h75_000s 5 9
1
C1_1 Via9
@ C5243 ECMF_P_22 ECMF_P_22
1
10PF/50V 6 10
C2_1 Via10
GND /EMI C5244 ECMF_N_22 ECMF_N_22 @/EMI
1
nbs_c0201_h13_000s 10PF/50V 7 13 R5203 2 1 0Ohm
C1_2 R1_1
2
GND /EMI USB_PP2 nbs_r0201_h10_000s @/EMI
nbs_c0201_h13_000s 8 14 R5204 2 1 0Ohm
C2_2 R2_1
2
USB_PN2 nbs_r0201_h10_000s
11 15
Via11 R1_2
USB_PP2_CON_IO
12 16
Via12 R2_2
USB_PN2_CON_IO
20180307 Brian GND

Change C5241, C5242, C5243, C5244 from
18pF to 10pF(0201) for USB2.0 eye diagram.
/EMI
nbs_empass_ecmf_8p_8v_002;nbs_empass_ecmf_8p_8v_002_t;nbs_empass_ecmf_8p_8v_002_b
USB 2.0 ESD-Protection

USB3.0 ESD-Protection
D5203
1 6
USB_U1+_CON I/O1 I/O4 USB_U1-_CON
+5V_USB_CON1
2 5
GND VDD
GND
3 4
I/O2 I/O3 U5203
1
Line-1
AZC099-04SP U3_U3RXDN1_R 2 9
Line-2 NC4
/ESD 20170712 Brian U3_U3RXDP1_R 3 8 U3_U3RXDN1_R
GND NC3
Add D5204 for USB2.0 ESD. 4 7 U3_U3RXDP1_R
Line-3 NC2
Reason : USB2.0 signal of USB3.0 on Left side U3_U3TXDN1_R 5 6 U3_U3TXDN1_R
Line-4 NC1
and USB2.0 on right side. U3_U3TXDP1_R U3_U3TXDP1_R
AZ1045-04F
D5204 @/ESD
1 6
I/O1 I/O4
GND
+5V_USB_CON2
2 5
GND VDD
GND
3 4
USB_PP2_CON_IO I/O2 I/O3 USB_PN2_CON_IO
AZC099-04SP
/ESD
BOM
Project Name Rev
X407UA/UV R1.0
Title : USB 3.0 + 2.0 CONN.

Size
D
0520-11 Dean Merge BOM L3000 L5301 L2603 L2604 L2707
=> 120OHM/2A 09G013120802
+3VAUX_WLAN +3VAUX_WLAN +3VS +3VAUX_WLAN
1 2
R5310
@
0Ohm
1
C5304 C5305 C5301 C5302
0.1UF/16V 10UF/10V 33PF/50V 0.1UF/16V C5303
@ @ @ 10UF/6.3V
2
nbs_c0805_h55_000s nbs_c0603_h37_000s
+3VSUS
reserve for ERP
SL5301
GND GND 1 2
0603
0309-11 Dean_cost check keypart list上的WLAN均無+1.5V的需求

=> unstuff C5304, C5305
+3VAUX_WLAN +3VAUX_WLAN
J5301
2 1
3.3Vaux4 GND11
4 3
1 3.3Vaux3 USB_D+ USB_PP8 24
R5306 6 5
LED#1(I)/(OD) USB_D- USB_PN8 24
10KOhm 8 7
PCM_CLK(OI)/(0/1.8V) GND10
20150804 10 9
5% Reserve D5301, R5301 & R5304 for BT-ON_PCH, prevent +3VS leakage at S3/S4/S5 PCM_SYNC(OI)/(0/1.8V) SDIO_CLK(O)/(0/1.8V)
12 11
2
PCM_IN(I)/(0/1.8V) SDIO_CMD(IO)/(0/1.8V)
14 13
PCM_OUT/(O)/(0/1.8V) SDIO_DAT0(IO)/(0/1.8V)
D5301 2017/01/12 X542UA_R1.1 #05, Modify BT_ON & WLAN_ON circuit 16 15
LED#2(I)/(OD) SDIO_DAT1(IO)/(0/1.8V)
BAT54CW 18 17
GND1 SDIO_DAT2(IO)/(0/1.8V)
1 20 19
UART/Wake(I)/(0/3.3V) SDIO_DAT3(IO)/(0/1.8V)
3 22 21
22 BT_ON/OFF# UART/Rx(I)/(0/1.8V) SDIO_Wake(I)/(0/1.8V)
2 BT_ON_NGFF 23
SDIO_Reset(O)/(0/1.8V)
@ 32
UART/Tx(O)/(0/1.8V)
0Ohm 2 1 R5301 34 33
UART/CTS(I)/(0/1.8V) GND9
36 35
UART/RTS(O)/(0/1.8V) PETP0 PCIE_TXP_WLAN 24
38 37
RESERVED7 PETn0 PCIE_TXN_WLAN 24
40 39
RESERVED6 GND8
2017/05/11 Modify R5309 to Shortland SL5309 42 41
RESERVED5 PERp0 PCIE_RXP_WLAN 24
44 43
COEX3/(0/1.8V) PERn0 PCIE_RXN_WLAN 24
46 45
+3VAUX_WLAN COEX2/(0/1.8V) GND7
48 47
COEX1/(0/1.8V) REFCLKP0 CLK_PCIE_WLAN 25
50 49
25 SUS_CK SUSCLK(32kHz)/(O)(0/3.3V) REFCLKN0 CLK_PCIE_WLAN# 25
SL5309 2 1 52 51
26,31,43,52,71 BUF_PLT_RST# 0402 PERST0#(O)/(0/3.3V) GND6
WLAN_RST# 54 53
Reserved/W_DISABLE#2(O)(0/3.3V) CLKREQ0#(IO)/(0/3.3V) CLKREQ_WLAN# 25
BT_ON_NGFF 56 55
W_DISABLE#1(O)/(0/3.3V) PEWake0#(IO)/(0/3.3V) PCIE_WAKE# 26
WLAN_ON_NGFF 58 57
1
I2C/DATA(IO)/(0/3.3) GND5
R5302 60 59
I2C/CLK(O)/(0/3.3) Reserved/2nd_Lane_PETp1
10KOhm @ 62 61
ALERT(I)/(0/3.3) Reserved/2nd_Lane_PETn1
64 63
5% RESERVED4 GND4
66 65
2
RESERVED3 Reserved/2nd_Lane_PERp1
68 67
RESERVED2 Reserved/2nd_Lane_PERn1
70 69
RESERVED1 GND3
72 71
3.3Vaux2 RESERVED9
74 73
Vinafix.com
3.3Vaux1 RESERVED8
WLAN_ON_NGFF 75
GND2
Q5301 76 77 FOR EMI

3
D NP_NC1 NP_NC2
2N7002K 79 78
SIDE2 SIDE1
1 MINI_PCI_75P BUF_PLT_RST#
26 WLAN_ON#
G
07G005000B12
S 12003-00074600
2
1
2nd = 07G005000N11 GND
20170704 Brian GND C5306
GND Change J5301 from 12003-00076900 to 0.1UF/10V
2
D5302 12003-00074600. @/EMI
BAT54CW
1
3
2 GND
@
20150813
Reserve Q5301, R5302, R5503 & R5305 for WLAN_ON_PCH, prevent +3VS leakage
2017/05/11 BT/WLAN ON OFF Follow X452UQ PR
<Variant Name>
Project Name Rev
X407UA/UV R1.0
Title : MINICARD(WLAN)
Size
C
20160505 Cost down
MOAT
20160104 X541UV C3613,C3626 unstuff DVDD must >=DVDD_IO
+1.8VS AUD_DVDD
+5VS +5VS_AUDIO
+5VS
SL3604 1
SL3605
2
For GND Via
Digital Analog 1 2 0603
0603
2017/05/11 remove C3605/C0603 /C3606/3602 U3601B
SL3601 PVDD
1
1 2 C3611 C3612 C3614 C3615 50
2
0603 GND2
10UF/6.3V 0.1UF/16V C3613 C3626 10UF/6.3V 0.1UF/16V 51
GND3
1
2
C3650 nbs_c0603_h37_000s @ 10UF/6.3V 0.1UF/16V nbs_c0603_h37_000s @ 52
1
GND4
2
D3601 10UF/6.3V @ nbs_c0603_h37_000s @ @ 53
GND5
1N4148WS nbs_c0603_h37_000s @ 54
GND6
2
@ +1.8VS AUD_DVDD_IO 55
GND7
@ SL3606 56
GND8
1
1 2 57
0603 GND9
GND_AUDIO GND GND GND 58
GND10
GND
Pin 41 Pin 46
ALC3251-CG
+3VA +3VA_AUDIO
Digital SL3602
Analog GND
1 2
0603
+1.8VS +1.8VS_AUDIO
Digital SL3603
Analog
1 2
0603
+1.8VS_AUDIO
MOAT 39
39
39
H_SPKL+
H_SPKL-
H_SPKR-
C3624
nbs_c0603_h37_000s
10UF/6.3V
GND_AUDIO
@ 1 2
39 H_SPKR+
R3631 0Ohm 1 2 nbs_r0603_h24_000s
nbs_c0603_h37_000s
PVDD C3619 10UF/6.3V
R3632 0Ohm 1 2 nbs_r0603_h24_000s 1 2
Analog
38,39 DLY_OP_SD# GND_AUDIO
GND
C3616 1UF/6.3V
1 2
Digital
AUD_DVDD
49
48
47
46
45
44
43
42
41
40
39
38
37
GND GND_AUDIO U3601A
GND1
PDB
PVDD2
SPK-OUT-R+
SPK-OUT-R-
SPK-OUT-L-
SPK-OUT-L+
PVDD1
AVDD2
LDO2-CAP
AVSS2
CBP
GPIO2/DMIC-DATA34/DMIC-CLK-IN
1
2
C3608 C3609
10UF/6.3V 0.1UF/16V
1
2
nbs_c0603_h37_000s +1.8VS
nbs_c0603_h37_000s
@/DMIC_PCH GND 1 36 C3618 10UF/6.3V
DVDD CPVDD
R3629 1 2 0Ohm 2 35 1 2
46 DMIC_DAT_ALC GPIO0/DMIC-DATA12 CBN
R3630 1 2 0Ohm DMIC_DAT_ALC_R 3 34 C3617 1UF/6.3V
46 DMIC_CLK_ALC GPIO1/DMIC-CLK CPVEE GND
@/DMIC_PCH DMIC_CLK_ALC_R 4 33 1 2
39 DC_EDT DC_DET HPOUT-R(PORT-I-R) AC_HP_R 38
5 32
23 HDA_SDO_SSP0_TXD SDATA-OUT HPOUT-L(PORT-I-L) AC_HP_L 38
6 31
BCLK LINE1-VREFO-L LINE1_VREFO_L 38
1
C3651 C3607 ACZ_BCLK_AUD_X2

10UF/6.3V nbs_c0603_h37_000s 7 30 LINE1_VREFO_L
GND LDO3-CAP LINE1-VREFO-R
10PF/50V 11 2 2 8 29 LINE1_VREFO_R
23 HDA_SDI0_SSP0_RXD SDATA-IN MIC2-VREFO MIC2_VREFO 38
@/DMIC_PCH R3602 33OhmACZ_SDIN0_AUD_X2_IO2 9 28
DVDD-IO VREF
2
Vinafix.com
SPDIF-OUT/
10 27
23 HDA_SYNC_SSP0_SFRM SYNC LDO1-CAP
11 26
AUD_DVDD_IO
I2C-DATA Digital AVDD1 +5VS_AUDIO
2
12 25
I2C-CLK AVSS1
1
GND R3604
SPDIFO/FRONT-JD(JD3)/GPIO3
1
C3623 100KOhm C3625
Analog
2
MIC2-R(PORT-F-R)/SLEEVE
C3620 C3621 10UF/6.3V
MIC2-L(PORT-F-L)/RING2
2.2UF/6.3V
2
0Ohm 10UF/6.3V 0.1UF/16V nbs_c0603_h37_000s c0603
1
2
1
MIC2/LINE2-JD(JD2)
1
LINE1-R(PORT-C-R)
2 1
LINE2-R(PORT-E-R)
nbs_c0603_h37_000s
LINE1-L(PORT-C-L)
LINE2-L(PORT-E-L)
2
23 HDA_BCLK_SSP0_SCLK
HP/LINE1-JD(JD1)
ACZ_BCLK_AUD_X2 C3604 C3601
R3606 10UF/6.3V 0.1UF/16V
1
2
1
C3622 nbs_c0603_h37_000s GND_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO
MIC2-CAP
VD33STB
PCBEEP
33PF/50V
@
2
GND
ALC3251-CG
13
14
15
16
17
18
19
20
21
22
23
24
GND
T3613 HPOUT_JD LINE2_MIC2_INT_L
1 T3614 LINE2_JD LINE2_MIC2_INT_R
MIC_EXT_L 38
1 T3615
MIC_EXT_R 38
1
38 MIC2_L/RING2 +3VA_AUDIO
MIC2_L/RING2
38 MIC2_R/SLEEVE
1
MIC2_R/SLEEVE
C3610
10UF/6.3V
Detection
2
nbs_c0603_h37_000s
GND_AUDIO
+1.8VS_AUDIO
Grounding circuit for combo jack SLEEVE pin

2
R3601
+1.8VS +3VA
100KOhm
MIC2_R/SLEEVE
1
R3603
1
R3625 R3626
SENSE_A_HP_JD 38
HPOUT_JD 1 2 10KOhm 10KOhm
200KOhm @ @ Q3602B
3
UM6K1N
2
5 @
4
R3624
6
10KOhm Q3602A
1 2 2 UM6K1N
@
1
@
1
LINE1_VREFO_R C3649
0.1UF/16V
1
R3620 @
2
TO INTERNAL MIC(Port C) 4.7KOhm
/AMIC
1KOhm GND GND GND
2
C3627 2 1 2.2UF/10V 1 2 R3623

AMIC_DMIC_DATA 46
LINE2_MIC2_INT_R AMIC_CLK_IO2 To solve the background noise while combojack
/AMIC /AMIC connecting to an active speaker and system entry
C3628 2 1 2.2UF/10V into S3/S4/S5 without analog power
2
LINE2_MIC2_INT_L C3648 SL3607

/AMIC 1000PF/50V 2 1
1
0402 AMIC_DMIC_CLK 46
Change R3619 to short land(SL3607) BOM
GND_AUDIO Project Name Rev

GND_AUDIO
X407UA/UV R1.0
Title : HDD Board-AUD-ALC3236

Size
C
Universal Jack (Normal open type) ● 尺寸：一般分三種規格，2.5mm、3.5mm、6.35mm。
● 種類：一般分也三種規格，TS 端子 (Mono)、TRS 端子 (Stereo)、TRRS 端子 (Stereo + Mic/Video)。
R1.3. Item 12.
Add 4 pole headset jack normal
open type for project demand.
Global Headset
R1.4. Item 13. Normal Open
Recommand the HP damping resistance 56 ohm for CB certification. Supported iPhone/Nokia headset, headphone
Depend on your project, you can change the resistance value to meet CB certification
(under 150mV), best chioce is between 140mV~150mV section. J3701
4 M/G
R3716 62Ohm 5
37 SENSE_A_HP_JD
HP_JACK_L_R 1 2 6
1 L/R
2 R/L
R3712 62Ohm 3 G/M
HP_JACK_R_R 1 2 7 MS
2015/09/24
R2.0 R3708, R3709 change from 51 to 62
1
AUDIO_JACK_6P
Ohm for 音壓測試 C3710
12014-00716600
1
C3703 C3702 100PF/50V
2
100PF/50V 100PF/50V @ 20170629 Brian
@ @ Change J3701 from 12014-00711900 to
2
12014-00716600 (X507).
GND_AUDIOGND_AUDIO
CITA:國際標準
Apple iPhone/HTC/小米的 Phone Jack 定義：
GND_AUDIO Apple iPad (Stereo) iPod (Stereo) iPhone (Mic) iPod (AV)
1. Tip Left channel Left channel Left channel Left channel

37 MIC2_VREFO
2. Ring1 Right channel Right channel Right channel Right channel
3. Ring2 - - Ground Ground
2
R3710 R3711 4. Sleeve Ground Ground Mic Video
2.2kOHM 2.2kOHM
MIC2_R/SLEEVE_C
1
MIC2_L/RING2_C
OMTP:國家標準
Nokie Type 的 Phone Jack 定義：
1
R3717 1 2 0Ohm
37 MIC2_L/RING2
MIC2_L/RING2_C D3703 D3704 Standard Mono Stereo Stereo + Mic Audio + Video
/EMI /EMI
R3718 1 2 0Ohm 1. Tip Left channel Left channel Left channel Left channel
37 MIC2_R/SLEEVE
MIC2_R/SLEEVE_C AZ5123-01F.R7GR AZ5123-01F.R7GR
2
2. Ring1 - Right channel Right channel Video
1
C3708 3. Ring2 - - Mic Ground
100PF/50V
2
@ GND_AUDIO GND_AUDIO 4. Sleeve Ground Ground Ground Right channel
1
20151209 X541UV 更換PORT
C3709
R0.93. Item 3. 100PF/50V 20180307 Brian
2
Realtek suggest PCB trace width of RING2 & SLEEVE at least 40 mils. @
Add D3703/D3704 for EMI MIC burn issue.
Vinafix.com GND_AUDIO
MUTE CONTROL
耳機pop noise mute線路
MUTE CONTROL 20151215 +3VS Change to +1.8VS
R3704 1 2 0Ohm
+1.8VS +3VSUS +12VSUS @
Q3703A Q3702A
2
UM6K1N UM6K1N
R3714 1 6
37 AC_HP_L
2.2MOhm 6 1 HP_JACK_L_R
nbs_r0603_h24_000s
N/A N/A N/A
2
1
2
2
R3707 1 2 10KOhm
R3715 R3701 MUTE_POP#
10KOhm 10KOhm N/A 20160929 change CAP voltage rating
@/MUTE N/A
5
3
1
4 3
37 AC_HP_R
1
5 Q3701B
3 4
HP_JACK_R_R
20171020 Brian UM6K1N C3706 Q3702B Q3703B
4
Add DLY_OP_SD# for De-pop. N/A 1UF/6.3V UM6K1N UM6K1N

6
N/A N/A N/A

2 Q3701A
37,39 DLY_OP_SD#
UM6K1N
1
N/A
C3705 2 1 4.7UF/10V R3706 1 2 0Ohm
37 MIC_EXT_L
@
GND GND_AUDIO C3707 2 1 4.7UF/10V

37 MIC_EXT_R
R1.5. Item 14.

D3701 Add 3 pole external MIC function
1 at 4 pole Jack for project demand.
3
2
31,39 OP_SD#
D3702
BAT54AW 1 R3713 4.7KOhm
@ 3 MIC 1-L 2 1
37 LINE1_VREFO_L
2 R3702 4.7KOhm
MIC 1-R 2 1
20151216 Add OP_SD#
BAT54AW
BOM
Project Name Rev
X407UA/UV R1.0
Title : IO Board-Audio Jack

Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
ASM1142_USB3.1_TYPEC
Size
C
Project Name Rev
X407UA/UV R1.0
Title : USB 3.1 MB Type-C Vinafix.com

Size
C
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1 Brian Chen
BOM
Project Name Rev
X407UA/UV R1.0
Title : PWR_SW&HALL_SW
Vinafix.com
Size
A
+5VS +3VS +VCCIO
R1.1-5 Main Board
20160218 X541UV R1.1
R5703 Stuff for dischager +5VS
1
R5703 R5704 R5707
+3VA 330Ohm 330Ohm 330Ohm
@ @ @
2
Q5711A
1
R5701 EM6K1-G-T2R
6
2017 05/10 for X506 SR
Q5702A
100KOhm
EM6K1-G-T2R 2
6
UM6K1N
@
All of discharge circuit has been changed to @
1
5 Q5701B 2 @
@
@
1
6
UM6K1N
2 Q5701A
31,46,78,89 SUSB_EC#
@
20151127 X541UV DEL +1.8VS
+NVVDD +PEX_VDD +3VSG_MAIN +3VSG_AON +FBVDDQ
1
R5722 R5705 R5721 R5718 R5720
330Ohm 330Ohm 330Ohm 330Ohm 330Ohm
@
@ @ @ @
2
@
Q5711B
+NVDD_DSG +PEX_VDD_DSG +3VSG_MAIN_DSG +3VSG_AON_DSG +1.35VSG_DSG
EM6K1-G-T2R
3
Q5703A Q5715B Q5703B Q5715A
2 UM6K1N 5 UM6K1N 5 UM6K1N 2 UM6K1N 5
@ @ @ @
4
R5767 1 2 0Ohm
@ SUSB_GPU_DSG
R5766 1 2 0Ohm
78 dGPU_PWR_DSG#
@
78 dGPU_PWR_15#
4/20 Stuff R5710 and R5711

+3V +1.2V +VCCST Vinafix.com R1.1-5
1
R5711 R5712 R5723

+3VA 330Ohm 330Ohm 330Ohm
@ @
@
2
2
1
R5702
100KOhm
6
UM6K1N UM6K1N UM6K1N

2
2 Q5706A 5 Q5706B 5 Q5705B

@
@ @ @
1
4
6
UM6K1N
2 Q5705A
31,89 SUSC_EC#
@
1
20130619 Paul: Add +5V discharge
20151130 X541UV DEL +5V
+3VA +3VA_EC
+3VA +5VSUS +3VA +3VSUS +1.0VSUS +1.8VSUS
UX303 0827
1
R5713 R5756
1
2
100KOhm 330Ohm R5715 R5719
1
100KOhm 124Ohm R5709 R5717 R5710 R5706

@ @ @ 100KOhm 124Ohm 124Ohm 124Ohm
2
@ @ @ @
2
@
1
1
3
EM6K1-G-T2R
3
3
5 Q5707B EM6K1-G-T2R EM6K1-G-T2R EM6K1-G-T2R EM6K1-G-T2R
5 Q5708B 5 Q5709B 2 Q5704A 5 Q5704B
UX303C1 0616
4
@ @ @ @
4
4
@
6
EM6K1-G-T2R
6
Q5707A EM6K1-G-T2R EM6K1-G-T2R

2
31,33,89 PS_ON Q5708A Q5709A
2 2
1
31,88 5VSUS_ON 31,84,89 VSUS_ON

@ @
1
UX303 1015
BOM
Project Name Rev
X407UA/UV R1.0
Title : DSG_Discharge
Size
C
Main Board
+3VA_DSW +3VA_DSW
1
R5852
1
100KOhm
R5811 R1.0-7
2
100KOhm
2014/12/26
2
20150325 remove VCCPRIM_PWRGD
R1.1 follow VC & intel sequence D5804
1
26,31,88 3VA_DSW_PWRGD
3
2
84 1.0VSUS_PWRGD
BAT54AW
SL5808
1 2
89 P_3VSUS_PWRGD 0402 3VSUS_PWRGD 31
3VSUS_PWRGD
+3VA_DSW
1
R5809
100KOhm
2
D5803
1
84 1.8VSUS_PWRGD
3
2
26,31 DPWROK_EC
BAT54AW
+3VSUS
Vinafix.com
2
R5805
100KOhm
D5802
1 +3VA_DSW +1.0V_VCCST
VCCST_PWRGD for PCH
1
3VSUS_PWRGD 3 +3VS
2
70,89 VCCST_PWRGD
BAT54AW
20150108
1
+3VSUS +3VA_DSW
Checking
1
R5806 R5801 R5803 R5803 near CPU side

10KOhm 100KOhm 1KOhm
2
R1.0-2
2
R5807 R5812 D5805 @
2
VCCST_PWRGD_PCH 26,70
100KOhm 100KOhm BAT54CTB
R1.0-7 1
3
3 UM6K1N
1
20150325 2 5 Q5801B
R1.1 follow VC & intel sequence D5801
4
1 SL5801
6
26,31,89 PM_SUSB# UM6K1N
3 1 2
2 0402 ALL_SYSTEM_PWRGD 26,31,70,81 Q5801A
SL5802 1 2 2
87 1.2V_PWRGD 0402
ALL_SYSTEM_PWRGD
1
BAT54AW
1
1
C5804 @
100PF/50V C5801
1
@ 0.1UF/6.3V
2
2
+3VSUS +3VSUS C5802
0.01UF/25V
2
2
BOM
R5813 R5814
100KOhm 100KOhm UX303C1 0520 Project Name Rev
2.5V_PWRGD
D5806 EMI solution X407UA/UV R1.0
1
1
1 @
89 VCCIO_PWRGD
3 C5803 Title : PRO_Protect
2 0.1UF/6.3V
87 2.5V_PWRGD Size
2
B
BAT54AW
CAP Lock LED
POWER LED WIRELESS/ BT LED
+5VSUS
2
R5911
1KOhm
1
20170704 Brian
IF = 25mA Change LED5905 07G015L0041A to
07G01520043A follow X507.
1
VF Min. = 2.7 V LED5905
+
VF Max. = 3.4 V WHITE
07G01520043A
2
3
3 D
Q5901
11
31,32 PWR_LED 2N7002
G
S
2
2
20170629 Brian
Remove Q5905 and R5906(1Mohm) for cost-down.
LED indicator
GND
Charger LED
+5VSUS
2
R5910
+3VA HALL SENSOR 1.5KOHM
06033-00140000
1
J5901
APX5031AI-TRG
1
IF = 20mA
VDD
3 VF Min. = 2.85 V
GND
2 VF Max. = 3.15 V
1
31,33 LID_SW# OUTPUT
LID_SW# LED5904
+
WHITE&ORANGE
1
C5901
0.1UF/16V
06033-00140000
07014-00190100
2
20170704 Brian
1 2
Change LED5904 07014-00190300 to
331K 07014-00190100 follow X507.
D5911
current: 1m
3
GND @/ESD
GND
Orange
31 CHG_LED#
PWR_SW# 31,32,33
PWR_SW# CHG_LED# CHG_FULL_LED#
JDEBUGSW5901
1
C5903 C5904
Pure White 0.1UF/16V 0.1UF/16V
31 CHG_FULL_LED#
1
C5902 1 3 @/EMI @/EMI
2
0.1UF/16V
/DEBUG
2
2 4
SW_4P GND GND
/DEBUG 20170719 Brian
Vinafix.com
Add C5903/C5904 for EMI.
GND
<Variant Name>
Title : 59_Power & WIFI & CAP LED

D X407UA/UV R1.0

Note:<=65W bead*3;
90W~~150W:Bead*4;
+V_DCJACK >=180W: bead*6 A/D_DOCK_IN
1 PT6001
1 PT6002
TPC28T
1 PT6003
TPC28T
1 PT6004 PL6001
TPC28T
120Ohm
TPC28T
J6001 1 2
PIN(+)
9 PL6002
1
7 +V_DCJACK 120Ohm PR6002 PR6003
SPRING(-) 8 1 2 2.2Ohm 2.2Ohm
1
1
2 PC6001 PL6003 PC6003 PC6004
2
3 0.1UF/25V 120Ohm 1UF/25V 0.1UF/25V
GND
4 1 2 @ P_AC_SNB_20
1
5 PC6005 PC6008 2mm
6 1 PT6005 10UF/25V 10UF/25V
1 PT6006
TPC28T
2
DC_PWR_JACK_9P 1 PT6007
TPC28T
12033-00031400 1 PT6008
TPC28T
TPC28T 20150706
GND GND H6001為一顆螺絲接通 BAT_EN# 和 GND,電池才開始送電
20170629 Brian 20160328
Change J6001 from 12033-00030700 to
12033-00031400(X507).
H6001 換為X540LJ的
H6001
1
換Connector 整個 GND Shape 都要跟PIN腳連起來 NP_NC1
2 4
NP_NC2 GND 20171023 Brian
3
H6001 from s11531 to s11624 follow X507.
3
Battery Connector 2D_D110N_DO98X122N

20171023 Brian
H6001 from s11624 to S11746.
s11746
BAT_CON
2
2
PR6006
PR6007 0Ohm
4
9
5
33Ohm /BAT screw hole
N/A J6003
SIDE1
NP_NC2
SIDE2
SWITCH_SLIDE_3P
1
3 @/BAT SWITCH 20170720 Brian
3
2 Add J6003 BAT SWITCH(12G0910700037) for BAT 客訴issue.
2
20171228 Brian
NP_NC1
1
1
SIDE4
SIDE3
Add PR6007 33ohm for 火線螺絲 issue. 20170831 Brian
J6003 Pin3 to NA and pin1 to GND.
J6002
7
8
6
11
P_GND2
9
9
8
8
7 1 PT6022
7
6 1 PT6020
6 TPC28T
5 PR6004 1
BAT_EN# 2 330Ohm
5 TPC28T SMB0_CLK 31,90
4 SMB0_DAT_CLK_CON PR6005 1 2 330Ohm
4 SMB0_DAT 31,90
3 SMB0_DAT_BAT_CON
3
2 PD6001
2
1
1 I/O3 I/O2
1
10 PC6006 4 3
P_GND1
0.1UF/25V
BATT_CON_9P nbs_c0603_h37_000s +3VA
Vinafix.com
2
12020-00026900
VDD GND
5 2
I/O4 I/O1
GND 6 1
20170629 Brian
Change J6002 from 12020-00025600 to
12020-00026500(X507). AZC099-04SP
20170718 Brian
Change J6002 from 12020-00025600 to
12020-00026700.
<Variant Name>
Project Name Rev
X407UA/UV R0.1
Title : 60_DC_DC & BAT IN
Size
C
Dept.: ASUSTeK COMPUTER INC. Engineer: Andy
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
Sensors
Size
Custom
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
****
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : NFC
Vinafix.com
Size
Custom
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
IO_SATA HDD & SPEAKER
Size
Custom
BOM
Project Name Rev
X407UA/UV R1.0
Title : IO_USB
Vinafix.com
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : IO_USB*2 & CR & LED

Vinafix.com
Size
C
SATA HDD
J6801
2 S1
P_GND2 S1
S2 C6801 2 1 0.01UF/16V
4
NP_NC2
S2
S3
S3 SATA_TXP0_C C6802 2 1 0.01UF/16V
SATA0_HDD_TX_DP
SATA0_HDD_TX_DN
24
24
SATA DEVSLP.
S4 SATA_TXN0_C
S4
S5 C6803 2 1 0.01UF/16V R6801
S5 SATA0_HDD_RX_DN 24
S6 SATA_RXN0_C C6804 2 1 0.01UF/16V 2 1
S6 SATA0_HDD_RX_DP 24 SATA0_DEVSLP 24
S7 SATA_RXP0_C SATA0_DEVSLP_R nbs_r0201_h10_000s
S7
2
0Ohm
R6802 @
P1 10KOhm
P1
P2
P2
P3
P3
1
P4 SATA0_DEVSLP_R 20170629 Brian
P4
P5 Change R6802 from 0ohm to 10kohm and
P5 R6801 option change to unmount.
P6
P6
P7 1 2 SL6801 GND
P7 0805 +5VS
P8 +5VS__HDD
P8
P9
2A 1 2 SL6802
P9 0805
P10
P10
P11 1 T6801
P11
P12 @
P12
3 P13
NP_NC1 P13
P14
P14 0805 SL 拉40 mil trace = 1A
1
P_GND1 P15
P15
for power consumption
SATA_CON_22P
12015-00293300
GND FOR EMI

GND
2nd source: 12015-00012300 U6801
1
C6806 C6807 C6805 1
2
Line-1
0.1UF/16V 10UF/6.3V 22UF/6.3V SATA_TXP0_C 2 9
Line-2 NC4
nbs_c0603_h37_000s nbs_c0805_h57_000s SATA_TXN0_C 3 8 SATA_TXP0_C
1
GND NC3
2
2
@ 4 7 SATA_TXN0_C
Line-3 NC2
Vinafix.com
SATA_RXN0_C 5 6 SATA_RXN0_C
Line-4 NC1
SATA_RXP0_C SATA_RXP0_C
AZ1045-04F
GND @/EMI
GND
BOM
Project Name Rev
X407UA/UV R1.0
Title : B TO B CONNECTOR
Size
B
EMI AC_BAT_SYS CAP
AC_BAT_SYS
1
C6908 C6909 C6910 C6911 C6912
0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V
2
@/EMI @/EMI @/EMI @/EMI @/EMI
GND GND GND GND GND
(1780,7550) (1970,6330) (730,3525) (4150,6490) (1830,965)
EMI CAP
6,31 RC_IN# 26 PM_RSMRST#_PCH 59,89 VCCST_PWRGD

RC_IN#
1
1
C6901
1000PF/50V C6902 C6903
(1470,1110) (3360,4365) 100PF/50V (4810,4510) 100PF/50V

2
2
@/EMI @/EMI
@/EMI
GND GND GND
26,31,59,81 ALL_SYSTEM_PWRGD
26,59 VCCST_PWRGD_PCH
1
1
C6906
C6905
(2067,5686)
(2105,7325) 100PF/50V
2
100PF/50V @/EMI
2
@/EMI
GND
GND
DDR4 CAPs Vinafix.com

5,17,18 DDR4_DRAMRST#
DDR4_DRAMRST#
1
C6913 C6914 C6915

0.01UF/25V 0.01UF/25V 0.01UF/25V
2
@/EMI @/EMI @/EMI
GND GND GND GND GND
Gasket
BOM
Project Name Rev
X407UA/UV R1.0
Title : EMI
Size
C
+3VSG
U7002
1 A 5
26,31,43,52,54 BUF_PLT_RST# VCC For GC6 2.0
2 B
22 GPU_RST#
/GC6 20
3 4 R7002 1 2 0Ohm
GND SYS_PEX_RST_MON# 76,77
Y NB9M_RST#_Y
2
NC7SZ08P5X
GND /VGA R7004 Checking
100KOhm 由X455LD P21 移過來
/VGA VC 做法有點不同
1
R7003 1 2 0Ohm
@/VGA DGPU_RST# +3VSG
/no GC6 20
R7010 1 2 0Ohm GND
U7001A Place Near GPU Place Near GPU
1/14 PCI_EXPRESS +PEX_VDD
20151223 Chagne Optional /VGA --> /no GC6 20
2
Checking GK208/GF117/GF119
NB9M_RST#→DGPU_RST# R7001
10KOhm AB6
NC1 NC
1
/VGA C7009 C7010 C7011 C7012 C7014 C7015
2
AA22 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V @/VGA /VGA
20150724 R1.1 修改 PEX_IOVDD_1
1
AC7 AB23 @/VGA @/VGA /VGA /VGA 22UF/6.3V 22UF/6.3V
1
77 DGPU_RST# PEX_RST* PEX_IOVDD_2
2
2
2
DGPU_RST# AC24 nbs_c0603_h37_000s nbs_c0603_h37_000s
PEX_IOVDD_3 nbs_c0603_h39_000s nbs_c0603_h39_000s
AC6 AD25
PEX_CLKREQ* PEX_IOVDD_4
PEX_CLKREQ# AE26
PEX_IOVDD_5
SL7001 1 2 AE8 AE27
25 CLK_PCIE_PEG_PCH 0402 PEX_REFCLK PEX_IOVDD_6
SL7002 1 2 PEX_REFCLKP AD8 GND
25 CLK_PCIE_PEG#_PCH 0402 PEX_REFCLK*
PEX_REFCLKN
AC9
PEX_TX0 3300 mA
PCIEG_TXP0 AB9
PEX_TX0*
PCIEG_TXN0 +PEX_VDD
AG6
PEX_RX0
PCIEG_RXP0 AG7 AA10
PEX_RX0* PEX_IOVDDQ_1
PCIEG_RXN0 AA12
PEX_IOVDDQ_2
AB10 AA13
PEX_TX1 PEX_IOVDDQ_3
CX7001 2 1 0.22UF/6.3V /VGA PCIEG_TXP1 AC10 AA16
PEX_TX1* PEX_IOVDDQ_4
1
PCIENB_RXN0 CX7002 2 1 0.22UF/6.3V /VGA PCIEG_TXN0 PCIEG_TXN1 AA18 C7016 C7017 C7018 C7020 C7021 C7022
2
PEX_IOVDDQ_5
PCIENB_RXP0 CX7003 2 1 0.22UF/6.3V /VGA PCIEG_TXP0 AF7 AA19 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V @/VGA @/VGA
PEX_RX1 PEX_IOVDDQ_6
PCIENB_RXN1 CX7004 2 1 0.22UF/6.3V /VGA PCIEG_TXN1 PCIEG_RXP1 AE7 AA20 /VGA /VGA @/VGA @/VGA 22UF/6.3V 22UF/6.3V
1
2
2
2
PCIENB_RXP1 CX7005 2 1 0.22UF/6.3V /VGA PCIEG_TXP1 PCIEG_RXN1 AA21 nbs_c0603_h37_000s nbs_c0603_h37_000s
PEX_IOVDDQ_8 nbs_c0603_h39_000s nbs_c0603_h39_000s
PCIENB_RXN2 CX7006 2 1 0.22UF/6.3V /VGA PCIEG_TXN2 AD11 AB22
PEX_TX2 PEX_IOVDDQ_9
PCIENB_RXP2 CX7007 2 1 0.22UF/6.3V /VGA PCIEG_TXP2 PCIEG_TXP2 AC11 AC23
PEX_TX2* PEX_IOVDDQ_10
PCIENB_RXN3 CX7008 2 1 0.22UF/6.3V /VGA PCIEG_TXN3 PCIEG_TXN2 AD24
PEX_IOVDDQ_11
PCIENB_RXP3 PCIEG_TXP3 AE9 AE25
PCIEG_RXP2 AF9
PEX_RX2 PEX_IOVDDQ_12
AF26 Place Under GU GND
PCIEG_RXN2 AF27
PEX_IOVDDQ_14
AC12
24 PCIEG_RXP[3:0] PEX_TX3
PCIEG_TXP3 AB12
24 PCIEG_RXN[3:0] PEX_TX3*
PCIEG_TXN3
24 PCIENB_RXP[3:0]
AG9
24 PCIENB_RXN[3:0] PEX_RX3
PCIEG_RXP3 AG10
PEX_RX3*
PCIEG_RXN3
AB13
AC13
PEX_TX4 Place Near GPU
PEX_TX4*
AF10
PEX_RX4
AE10 +3VSG
PEX_RX4*
AD14
PEX_TX5
Vinafix.com
AC14 AA8
PEX_TX5* PEX_PLL_HVDD_1
AA9
PEX_PLL_HVDD_2
AE12
PEX_RX5
1
AF12 C7023 C7024 C7025
2
PEX_RX5*
AB8 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V
PEX_SVDD_3V3
AC15 /VGA /VGA @/VGA
1
PEX_TX6
2
AB15
PEX_TX6* nbs_c0603_h37_000s nbs_c0603_h37_000s
AG12
PEX_RX6
AG13
PEX_RX6*
AB16 GND
PEX_TX7
AC16
PEX_TX7* Place Under GU
AF13
PEX_RX7
AE13
PEX_RX7*
AD17
NC2 NC
AC17
NC3 NC
AE15
NC4 NC
AF15 NC T7003
NC5
1
AC18 F2 @
NC6 NC VDD_SENSE NVDD_VCCSENSE 92
AB18 NC 0.9V 0.2mm
NC7
AG15 F1
NC8 NC GND_SENSE NVDD_VSSSENSE 92
AG16 0.0V 0.2mm
NC9 NC
AB19
NC10 NC
AC19
NC11 NC
AF16
NC12 NC
AE16
NC13 NC
AD20
NC14 NC
AC20
NC15 NC
AE18
NC16 NC
AF18
NC17 NC
AC21 NC
NC18
AB21
NC19 NC
AG18 AF22
NC20 NC PEX_TSTCLK_OUT
AG19 AE22 PEX_TSTCLK_OUT 1 2
NC21 NC PEX_TSTCLK_OUT*
PEX_TSTCLK_OUT_N R7005 5% 200Ohm
AD23 @/VGA
AE23
NC22 NC
NC
Place Near GPU +PEX_VDD
NC23
150mA Place Under GPU
AF19 NC
AA14 @/VGA 1 2 SL7008
NC24 PEX_PLLVDD_1 0603
AE19 NC AA15 PEX_PLL_VDD
NC25 PEX_PLLVDD_2
1
C7026 C7027 C7030 C7028 C7029
AF24 0.1UF/16V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 1UF/6.3V
NC26 NC
AE24 /VGA /VGA /VGA @/VGA @/VGA
NC27 NC
2
nbs_c0603_h37_000s nbs_c0603_h37_000s
AE21
NC28 NC
AF21
NC29 NC
AD9 1 1% 2
TESTMODE
AG24 NC
TESTMODE R7006 10KOhm GND
NC30
AG25 NC /VGA
NC31
AG21 GND
NC32 NC
AG22
NC33 NC
GF119 GF117
GK208 AF25 1 1% 2
PEX_TERMP
PEX_TERMP
0.3mm R7007 2.49KOhm
BOM
/VGA
N14M_GE_S_A1 Project Name Rev
/VGA GND
X407UA/UV R1.0
Title : N14M-GE_PCIE
Size
C
U7001B
2/14 FBA
73 FBA_D[0:63]
E18 NC
F3
FBA_D0 FB_CLAMP
FBA_D0 F18 GPIO_FB_CLAMP_GPU
FBA_D1
FBA_D1 E16
1
FBA_D2 GF119 GF117/GK208
FBA_D2 F17 R7104
FBA_D3
FBA_D3 D20 10KOhm
FBA_D4
FBA_D4 D21 /VGA
FBA_D5
FBA_D5 F20 1%
2
FBA_D6
FBA_D6 E21
FBA_D7
FBA_D7 E15
FBA_D8
FBA_D8 D15 GND
FBA_D9
FBA_D9 F15
FBA_D10
FBA_D10 F13
FBA_D11
FBA_D11 C13
FBA_D12
FBA_D12 B13
FBA_D13
FBA_D13 E13
FBA_D14
FBA_D14 D13
FBA_D15
FBA_D15 B15
FBA_D16
FBA_D16 C16
FBA_D17
FBA_D17 A13
FBA_D18
FBA_D18 A15
FBA_D19
FBA_D19 B18
FBA_D20
FBA_D20 A18
FBA_D21
FBA_D21 A19
FBA_D22
FBA_D22 C19
FBA_D23
FBA_D23 B24
FBA_D24
FBA_D24 C23
FBA_D25
FBA_D25 A25
FBA_D26
FBA_D26 A24
FBA_D27
FBA_D27 A21
FBA_D28
FBA_D28 B21
FBA_D29 C20
FBA_D29 Mode D：single rank designs.
FBA_D30
FBA_D30 C21
FBA_D31
FBA_D31 R22
FBA_D32 FBA_CMD[0:15] 73
FBA_D32 R24 C27
FBA_D33 FBA_CMD0
FBA_D33 T22 C26 FBA_CMD0
FBA_D34 FBA_CMD1
FBA_D34 R23 E24 FBA_CMD1
FBA_D35 FBA_CMD2
FBA_D35 N25 F24 FBA_CMD2
FBA_D36 FBA_CMD3
FBA_D36 N26 D27 FBA_CMD3
FBA_D37 FBA_CMD4
FBA_D37 N23 D26 FBA_CMD4
FBA_D38 FBA_CMD5
FBA_D38 N24 F25 FBA_CMD5
FBA_D39 FBA_CMD6
FBA_D39 V23 F26 FBA_CMD6
FBA_D40 FBA_CMD7
FBA_D40 V22 F23 FBA_CMD7
FBA_D41 FBA_CMD8
FBA_D41 T23 G22 FBA_CMD8
FBA_D42 FBA_CMD9
FBA_D42 U22 G23 FBA_CMD9
FBA_D43 FBA_CMD10
FBA_D43 Y24 G24 FBA_CMD10
FBA_D44 FBA_CMD11
FBA_D44 AA24 F27 FBA_CMD11
FBA_D45 FBA_CMD12
FBA_D45 Y22 G25 FBA_CMD12
FBA_D46 FBA_CMD13
FBA_D46 AA23 G27 FBA_CMD13
FBA_D47 FBA_CMD14
FBA_D47 AD27 G26 FBA_CMD14
FBA_D48 FBA_CMD15 FBA_CMD[16:31] 73
FBA_D48 AB25 M24 FBA_CMD15
FBA_D49 FBA_CMD16
FBA_D49 AD26 M23 FBA_CMD16
FBA_D50 FBA_CMD17
FBA_D50 AC25 K24 FBA_CMD17
FBA_D51 FBA_CMD18
FBA_D51 AA27 K23 FBA_CMD18
FBA_D52 FBA_CMD19
FBA_D52 AA26 M27 FBA_CMD19
FBA_D53 FBA_CMD20
FBA_D53 W26 M26 FBA_CMD20
FBA_D54 FBA_CMD21
FBA_D54 Y25 M25 FBA_CMD21
FBA_D55 FBA_CMD22
FBA_D55 R26 K26 FBA_CMD22
FBA_D56 FBA_CMD23
FBA_D56 T25 K22 FBA_CMD23
FBA_D57 FBA_CMD24
FBA_D57 N27 J23 FBA_CMD24
FBA_D58 FBA_CMD25
FBA_D58 R27 J25 FBA_CMD25
FBA_D59 FBA_CMD26
FBA_D59 V26 J24 FBA_CMD26
FBA_D60 FBA_CMD27
FBA_D60 V27 K27 FBA_CMD27
FBA_D61 FBA_CMD28
FBA_D61 W27 K25 FBA_CMD28
FBA_D62 FBA_CMD29
FBA_D62 W25 J27 FBA_CMD29
FBA_D63 FBA_CMD30
Vinafix.com
FBA_D63 J26 FBA_CMD30
FBA_CMD31
FBA_CMD31
73 FBA_DBI[7..0]
D19
FBA_DQM0
FBA_DBI0 D14
FBA_DQM1
FBA_DBI1 C17
FBA_DQM2
FBA_DBI2 C22
FBA_DQM3
FBA_DBI3 P24
FBA_DQM4 +FBVDDQ
FBA_DBI4 W24
FBA_DQM5
FBA_DBI5 AA25 R7101 60.4Ohm @/VGA
FBA_DQM6
FBA_DBI6 U25 F22 1 2
FBA_DQM7 FBA_DEBUG0
FBA_DBI7 J22 1 2
FBA_DEBUG1
73 FBA_EDC[7..0]
E19 R7102 60.4Ohm @/VGA
FBA_DQS_WP0
FBA_EDC0 C15
FBA_DQS_WP1
FBA_EDC1 B16 D24
FBA_DQS_WP2 FBA_CLK0 FBA_CLK0 73
FBA_EDC2 B22 D25
FBA_DQS_WP3 FBA_CLK0* FBA_CLK0# 73
FBA_EDC3 R25 N22
FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 73
FBA_EDC4 W23 M22
FBA_DQS_WP5 FBA_CLK1* FBA_CLK1# 73
FBA_EDC5 AB26
FBA_DQS_WP6
FBA_EDC6 T26
FBA_DQS_WP7
FBA_EDC7
F19 D18
FBA_DQS_RN0 FBA_WCK01 FBA_WCK01 73
C14 C18
FBA_DQS_RN1 FBA_WCK01* FBA_WCK01# 73
A16 D17
FBA_DQS_RN2 FBA_WCK23 FBA_WCK23 73
A22 D16
P25 T24
W22
FBA_DQS_RN4 FBA_WCK45
U24
FBA_WCK45 73 Add for FDDR5
AB27 V24
FBA_DQS_RN6 FBA_WCK67 FBA_WCK67 73 +FBVDDQ
T27 V25
FBA_DQS_RN7 FBA_WCK67* FBA_WCK67# 73 Place Near GPU
+PEX_VDD 1 2
Place Under GPU L7101 FBA_CMD14 R7103 10KOhm
200mA
F16 1 2 /VGA
FB_PLLAVDD_1
FB_PLLAVDD 1 2
1
1
P22 C7101 C7102 C7103 C7104 C7105 30Ohm/100Mhz FBA_CMD30 R7123 10KOhm
FB_PLLAVDD_2
0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V /VGA /VGA /VGA
H22 @/VGA @/VGA /VGA /VGA 22UF/6.3V nbs_l0603_h39_000s 1 2
FB_PLLAVDD FB_DLLAVDD
2
2
2
nbs_c0402_h22_000s nbs_c0402_h22_000s nbs_c0402_h22_000s FBA_CMD13 R7124 10KOhm
nbs_c0603_h39_000s
GF117 GF119/GK208 /VGA
1 2
FBA_CMD29 R7125 10KOhm
GND GND GND /VGA
GND
T7101 1 D23
FB_VREF_PROBE
FB_VREF
N14M_GE_S_A1
/VGA
BOM Mount: 02004-00300400
<Variant Name>
Project Name Rev
X407UA/UV R1.0
Title : N14M-GE_FB-IF
Size
C
2.5A
+FBVDDQ
Place Near GPU U7001D Place Under GPU Place Near GPU
N15與N14不一樣。
3V3_AON Place Near Balls 12/14 FBVDDQ
150mA +3VSG
1
B26
U7001C FBVDDQ_01
C25 C7306 C7308 C7310 C7312 C7313 C7335
FBVDDQ_02
14/14 XVDD/VDD33 E23 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
FBVDDQ_03
2
1
1
C7301 C7302 C7303 C7304 E26 /VGA /VGA /VGA /VGA /VGA /VGA
2
FBVDDQ_04
AD10 G10 0.1UF/16V 0.1UF/16V 0.1UF/16V 4.7UF/6.3V F14
NC34 VDD33_1 FBVDDQ_05
AD7 G12 /VGA /VGA @/VGA @/VGA F21
1
2
B19 G8 nbs_c0603_h37_000s G13
G9 G14 5/16 GND
VDD33_4 FBVDDQ_08 C7311→10uF
G15
FBVDDQ_09 C7312→22uF
F11 G16 for PWR Noise
NC37 FBVDDQ_10
GND G18 20170829 Brian
FBVDDQ_11
V5 G19
NC38 Place Near GPU FBVDDQ_12 Change C7310/C7312 from 0603 to 0402 size.
V6 G20 C7313 22uF(0603) change to C7313 and C7335 10uF(0402)
NC39 FBVDDQ_13
1
G21 /VGA
Place Near Balls +3VSG_MAIN
FBVDDQ_14
H24 C7307 C7309 C7311
150mA FBVDDQ_15
H26 2.2UF/6.3V 2.2UF/6.3V 10UF/6.3V
FBVDDQ_16
2
J21 /VGA /VGA
FBVDDQ_17
CONFIGURABLE K21 nbs_c0603_h37_000s
FBVDDQ_18
1
POWER CHANNELS C7331 C7305 C7329 C7330 L22
2
FBVDDQ_19
* nc on substrate 0.1UF/16V 0.1UF/16V 0.1UF/16V 4.7UF/6.3V L24
FBVDDQ_20
/VGA /VGA @/VGA @/VGA L26 GND
1
2 FBVDDQ_21
2
G1 nbs_c0603_h37_000s M21
NC40 FBVDDQ_22
G2 N21
NC41 FBVDDQ_23
G3 R21
NC42 FBVDDQ_24
G4 T21
NC43 FBVDDQ_25
G5 GND V21
NC44 FBVDDQ_26
G6 LD, GC6 20 W21
NC45 FBVDDQ_27
G7
NC46
V1
NC47 U7001F
V2
NC48
13/14 GND
A2 M13
GND_001 GND_071
AB17 M15
GND_005 GND_072
AB20 M17
GND_006 GND_073
W1 AB24 N10
NC49 GND_007 GND_074
W2 AC2 N12
W3 AC22 N14
W4 AC26 N16
AC5 N18
GND_011 GND_078
AC8 P11
GND_012 GND_079
N14M_GE_S_A1 AD12 P13
GND_013 GND_080
AD13 P15
GND_014 GND_081
A26 P17
GND_002 GND_082
AD15 P2
/VGA GND_015 GND_083
AD16 P23
GND_016 GND_084
AD18 P26
GND_017 GND_085
AD19 P5
GND_018 GND_086
AD21 R10
+FBVDDQ GND_019 GND_087
AD22 R12
GND_020 GND_088
AE11 R14
GND_021 GND_089
/VGA 1% 2 1 D22 AE14 R16
FB_CAL_PD_VDDQ GND_022 GND_090
R7301 40.2Ohm FB_CAL_PD_VDDQ AE17 R18
GND_023 GND_091
AE20 T11
GDDR5 = 40.2 ohm /VGA 1% 2 1 C24 AB11
GND_024 GND_092
T13
DDR3 = 42.2 ohm R7302 40.2Ohm FB_CAL_PU_GND
FB_CAL_PU_GND
AF1
GND_003 GND_093
T15
GND_025 GND_094
AF11 T17
GND_026 GND_095
/VGA 1 2 B25 AF14 U10
FB_CAL_TERM_GND GND_027 GND_096
R7303 60.4Ohm FB_CAL_TERM_GND AF17 U12
GND_028 GND_097
AF20 U14
GND_029 GND_098
N14M_GE_S_A1 AF23 U16
GND
GDDR5 = 60.4 ohm /VGA AF5
GND_030 GND_099
U18
DDR3 = 51.1 ohm AF8
GND_031 GND_100
U2
GND_032 GND_101
AG2 U23
GND_033 GND_102
Vinafix.com
AG26 U26
GND_034 GND_103
AB14 U5
GND_004 GND_104
+NVVDD B1 V11
21.22A GND_035 GND_105
B11 V13
U7001E GND_036 GND_106
B14 V15
11/14 NVVDD
Place Near Balls and Under GPU B17
GND_037 GND_107
V17
GND_038 GND_108
K10 B20 Y2
VDD_001 GND_039 GND_109
K12 B23 Y23
VDD_002 GND_040 GND_110
1
K14 C7314 C7317 C7318 C7321 C7324 C7327 B27 Y26

2
VDD_003 GND_041 GND_111

K16 0.1UF/16V 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V B5 Y5
VDD_004 GND_042 GND_112
K18 /VGA @/VGA @/VGA @/VGA @/VGA /VGA B8
1
VDD_005 GND_043
2
L11 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s E11

VDD_006 GND_044
L13 E14
VDD_007 GND_045
L15 E17
VDD_008 GND_046
L17 E2
VDD_009 GND_047
M10 E20
VDD_010 GND_048
M12 E22
VDD_011 GND_049
M14 E25
VDD_012 GND_050
M16 E5
VDD_013 GND_051
1
M18 C7315 C7319 C7322 C7325 C7328 E8

2
VDD_014 GND_052
N11 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V H2
VDD_015 GND_053
N13 /VGA @/VGA @/VGA @/VGA /VGA H23
1
VDD_016 GND_054
2
N15 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s H25

VDD_017 GND_055
N17 H5
VDD_018 GND_056
P10 K11
VDD_019 GND_057
P12 K13
VDD_020 GND_058
P14 K15
VDD_021 GND_059
P16 K17
VDD_022 GND_060
P18 L10
VDD_023 GND_061
R11 L12
VDD_024 GND_062
1
R13 C7316 C7320 C7323 C7326 L14

2
VDD_025 GND_063
R15 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V L16
VDD_026 GND_064
R17 /VGA @/VGA @/VGA @/VGA L18
1
VDD_027 GND_065
2
T10 nbs_c0603_h37_000s nbs_c0603_h37_000s nbs_c0603_h37_000s L2

VDD_028 GND_066
T12 L23
VDD_029 GND_067
T14 L25
VDD_030 GND_068
T16 L5 AA7
VDD_031 GND_069 GND_113
T18 M11 AB7
VDD_032 GND_070 GND_114
U11 GND
VDD_033
U13
VDD_034
U15 GND GND
VDD_035
U17 N14M_GE_S_A1
VDD_036
1
V10 C7334
VDD_037
V12 @/VGA
VDD_038
V14 22UF/6.3V
VDD_039 /VGA
2
V16
VDD_040 nbs_c0603_h39_000s
V18
VDD_041
GND
N14M_GE_S_A1 Optional caps
Place Near GPU
/VGA
BOM
Project Name Rev
X407UA/UV R1.0
Title : N14M-GE-VDD
Size
C
U7001G
LVDS 4/14 IFPAB
GF117 GF119/GK208
AC4
NC IFPA_TXC* U7001I
NC
AC3
GF119/GK208 GF117 IFPA_TXC
U7001H 6/14 IFPD
AA6
IFPAB_RSET NC GF119/GK208 GF117
Y3 5/14 IFPC
NC IFPA_TXD0*
Y4
IFPC U6 GF117 GF119/GK208
NC IFPA_TXD0 GF119/GK208 GF117 IFPD_RSET NC
DVI/HDMI DP
V7 NC
T6 NC GF117 GF119/GK208
IFPAB_PLLVDD_1 IFPC_RSET
NC
AA2
IFPA_TXD1*
W7 AA3 DVI/HDMI DP T7 I2CX_SDA P4
IFPAB_PLLVDD_2 NC NC IFPA_TXD1 IFPD_PLLVDD_2 NC NC IFPD_AUX_I2X_SDA*
NC I2CX_SCL P3
IFPD_AUX_I2CX_SCL
M7 NC NC I2CW_SDA N5 R7 NC
IFPC_PLLVDD_1 IFPC_AUX_I2CW_SDA* IFPD_PLLVDD_1
AA1 N7 NC I2CW_SCL N4
NC IFPA_TXD2* IFPC_PLLVDD_2 NC IFPC_AUX_I2CW_SCL
NC
AB1 R5
IFPA_TXD2 NC TXC IFPD_L3*
R4
NC TXC IFPD_L3
N3
NC TXC IFPC_L3*
AA5 NC N2 T5
NC IFPA_TXD3* TXC IFPC_L3 NC TXD0 IFPD_L2*
NC
AA4 TXD0
T4
IFPA_TXD3 NC IFPD_L2
R3
NC TXD0 IFPC_L2*
TXD0
R2 TXD1 U4
NC IFPC_L2 NC IFPD_L1*
AB4 IFPD NC TXD1 U3
NC IFPB_TXC* IFPD_L1
AB5 TXD1 R1
NC IFPB_TXC NC IFPC_L1*
NC TXD1 T1 V4
GF119/GK208 GF117 IFPC_L1 NC TXD2 IFPD_L0*
NC TXD2
V3
IFPD_L0
W6 AB2 T3
IFPA_IOVDD NC NC IFPB_TXD4* NC TXD2 IFPC_L0*
NC
AB3 NC
T2
IFPB_TXD4 TXD2 IFPC_L0
Y6
IFPB_IOVDD NC
R6 NC NC
D4
IFPD_IOVDD GPIO17
NC
AD2
IFPB_TXD5*
NC
AD3 P6 NC NC C3
IFPB_TXD5 IFPC_IOVDD GPIO15 GF119/GK208 GF117
NC
AD1 N14M_GE_S_A1
IFPB_TXD6*
AE1 /VGA
NC IFPB_TXD6
N14M_GE_S_A1
/VGA
AD5
NC IFPB_TXD7*
NC
AD4
IFPB_TXD7
NC B3
GPIO14
IFPAB
N14M_GE_S_A1
/VGA
U7001J
7/14 IFPEF CRT

GF119/GK208
GF117
DVI-DL DVI-SL/HDMI DP
GF117
NC I2CY_SDA I2CY_SDA J3
GF119 GK208 IFPE_AUX_I2CY_SDA*
Vinafix.com
NC I2CY_SCL I2CY_SCL J2
IFPE_AUX_I2CY_SCL
J7 NC +3VSG
NC53
U7001K
J1
NC TXC TXC NC58
K1 3/14 DACA @/VGA
NC TXC TXC NC59
K7 NC RN7404A
NC54 GF119/GK208 GF117 GF117 GF119/GK208
K3 1
2.2KOHM 2
NC TXD0 TXD0 NC60
K2 W5 NC NC
B7 I2CA_SCL 3
2.2KOHM 4
NC TXD0 TXD0 NC61 DACA_VDD I2CA_SCL
NC
A7 I2CA_SCL I2CA_SDA
I2CA_SDA
K6 NC
M3 AE2 TSEN_VREF I2CA_SDA RN7404B @/VGA
NC55 NC TXD1 TXD1 NC62 DACA_VREF
M2
NC TXD1 TXD1 NC63
AF2 NC NC
AE3
DACA_RSET DACA_HSYNC
M1 AE4
NC TXD2 TXD2 NC64 NC DACA_VSYNC
N1
NC TXD2 TXD2 NC65
RN7405A /VGA
AG3 1
NC DACA_RED 2.2KOHM 2
IFPE NC FOR GK208
3
I2CA_SCL 2.2KOHM 4
AF4 I2CA_SDA
NC DACA_GREEN
RN7405B /VGA
NC C2 AF3
HPD_E HPD_E GPIO18 NC DACA_BLUE
GF117
GND
GF119 GK208
H6 NC N14M_GE_S_A1
NC56
GF119/GK208
GF117
J6 NC
NC57 DVI-DL DVI-SL/HDMI DP
/VGA
NC I2CZ_SDA
H4
IFPF_AUX_I2CZ_SDA*
NC I2CZ_SCL H3
IFPF_AUX_I2CZ_SCL
NC TXC J5
NC66
NC TXC J4
NC67
NC TXD3 TXD0
K5
NC68
NC TXD3 TXD0
K4
NC69
NC TXD4 TXD1 L4
NC70
IFPF NC TXD4 TXD1 L3
NC71
NC TXD5
M5
TXD2 NC72
NC TXD5 TXD2
M4
NC73
NC FOR GK208
NC F7
HPD_F GPIO19
N14M_GE_S_A1
/VGA
BOM
Project Name Rev
X407UA/UV R1.0
Title : N14M-GE_DISPLAY
Size
C
For GC6 20
+3VSG
920: 10G212453214010 45.3K
930/940: 10G212499214010 49.9K
925: 10G212499214010 49.9K +3VSG_MAIN
VG BOM 帶入主料時記得要加2nd Source
2
R7508 R7507 R7503 R7502 R7501 4.99K = 10G212499114010
45.3KOhm 4.99KOhm 10KOhm 45.3KOhm 49.9KOHM +3VSG
10K = 10G212100214010
2
@/VGA/920 @/VGA/920 @/VGA/920 @/VGA/920 /VGA/925
1% 1% 1% 1% U7001L R7516 R7526 R7518 15K = 10G212150214030
1
15KOHM 4.99KOhm 4.99KOhm
20K = 10G212200214030
1
10/14 MISC2 R7514 /VRAM @/VRAM @/VRAM
10KOhm 1% 1% 24.9K = 10G212249214010
1
STRAP4 STRAP3 STRAP2 STRAP1 STRAP0 @/VGA
GF117/GF119/GK208
30.1K = 10G212301214010
2
34.8K = 10G212348214010
2
E10 ROM_SI ROM_SO ROM_SCLK
NC74 NC
R7510 R7509 R7506 R7505 R7504 F10 D12
NC75 NC ROM_CS*
45.3K = 10G212453214010
2
2
45.3KOhm 4.99KOhm 10KOhm 45.3KOhm 45.3KOhm ROM_CS#
@/VGA/920
1%
@/VGA/920
1%
@/VGA/920
1%
@/VGA/920
1%
@/VGA/920
1%
ROM_SI
B12
A12 ROM_SI
R7519
15KOHM
R7520
4.99KOhm
R7521
4.99KOhm
49.9K = 10G212499214010
ROM_SO
1
D1 C12 ROM_SO /VGA /VGA
STRAP0 ROM_SCLK /VRAM
STRAP0 D2 ROM_SCLK 1% 1%
STRAP1
1
1
STRAP1 E4
STRAP2
STRAP2 E3
STRAP3
STRAP3 D3
STRAP4
GND STRAP4 20151222 Change Optional Name /VRAM >> /VGA Allen
GF117 GND
GF119
GK208
C1
NC76 NC
D11
BUFRST*
DA-06814 F6 D10 R7515 10KOhm

MULTI_STRAP_REF0_GND NC NC80
N15V(GT820)-unstuff R7511 2 /VGA 1
GF117 GF117
N15S(GT840)-stuff R7511 GF119 GF119
GK208 GK208 GND
F4
NC77 NC
E9
NC NC79 SYS_PEX_RST_MON# 71,77
F5 SYS_PEX_RST_MON#
NC78 NC GF117
GK208
GPIO8
GF119
1
R7511 R7512 R7513 N14M_GE_S_A1 +3VSG
40.2KOhm 40.2KOhm 40.2KOhm /VGA
/VGA @/VGA @/VGA R7525 10KOhm /GC6 20
1% 1% 1% SYS_PEX_RST_MON# 2 1
2
LD,for GC6 20
GND
N16 (920/930/940)→stuff R7511
Xtal
+PEX_VDD
L7501
Place Near GPU Place close to balls
60mA
L6
U7001M
9/14 XTAL_PLL
Vinafix.com
150mA CORE_PLLVDD
1 2 M6
SP_PLLVDD
+1.1VSG_PLLVDD 45mA
220Ohm/100Mhz N6 NC
VID_PLLVDD
1
1
1
/VGA C7507 C7502 C7501 45mA

@/VGA C7505 C7503 0.1UF/16V 0.1UF/16V
2
GF119/GK208 GF117
22UF/6.3V 4.7UF/6.3V 0.1UF/10V /VGA /VGA Near GPU
2
/VGA @/VGA
1
nbs_c0603_h39_000s
nbs_c0603_h37_000s
A10 C10
XTAL_SSIN XTAL_OUTBUFF
NV27M_SSC_NV SS_CLKIN
C11 B10
XTAL_IN XTAL_OUT
GND GND NV27M_NOSSC_NV
1
1
2
R7522 N14M_GE_S_A1 R7523
10KOhm /VGA R7524 10KOhm
/VGA X7501 20160303 X541UV 1KOhm /VGA
27Mhz GCLK /VGA
2
2
/VGA
20170627 Brian
1
Remove GCLK schematic. 1 3
20170629 Brian Xtal_out GND
GND Remove R7528 0ohm to short for Non-GCLK.
2
4
1
1
C7508 C7509
15PF/50V 15PF/50V
2
2
/VGA /VGA
GND GND
GND GND
BOM
Project Name Rev
X407UA/UV R1.0
Title : N14M-GE_ROM,XTAL
Size
D
+3VSG
Pull high on EC
/VGA 1 2 RN7601A
2.2KOhm
/VGA 3 4 RN7601B
2.2KOhm
Checking
NB9M_RST#→DGPU_RST#
DGPU_RST#
DGPU_RST#
1
1
G
GPIO 2 3
2 S
3D
SMB1_CLK_S 29,51
Q7601
2N7002K
/VGA
3 4 RN7609B /VGA
1
2.2KOHM
1
DDC2C_CLK 1 2 RN7609A /VGA
U7001N 2.2KOHM
G
DDC2C_DAT
8/14 MISC1
D9
I2CS_SCL
D8 I2CS_SCL 2 3
2 S
3D
I2CS_SDA SMB1_DAT_S 29,51
I2CS_SDA
A9 Q7602 3
2.2KOHM
4 RN7608B /VGA
I2CC_SCL
B9 DDC2C_CLK 2N7002K DDC2B_CLK 1
2.2KOHM
2 RN7608A /VGA
I2CC_SDA
DDC2C_DAT Checking DDC2B_DAT
GF119 /VGA
GF117 GK208 change netname to GPU_THERM#_GPU
T7610 1 E12
THERMDN
NC
C9
I2CB_SCL GPU_THERM#_GPU 33
T7611 1 F12 C8 DDC2B_CLK
THERMDP NC I2CB_SDA
DDC2B_DAT
**from PCH GPIO** GND
check 已經有pull up R5002 14Kohm to +3VS @page50
3
T7612 1 AE5
JTAG_TCK
T7614 1 AD6 D 3
T7609 1 AE6
JTAG_TMS For GC6 2.0
JTAG_TDI
T7613 1 AF6
JTAG_TDO
AG4 C6 R7614 0Ohm 1 1 +3VSG
JTAG_TRST* GPIO0 DGPU_FB_CLAMP_GPIO 22,78
B2 2
/GC6 20 1 G
GPIO1
D6
1
GPIO2
R7601 C7 DGPU_FB_CLAMP_GPIO = GC6_FB_EN /VGA
GPIO3 S 2
10KOhm F9 2N7002K
GPIO4
1% A3 Q7603 3 4 RN7602B @/VGA
GPIO5 3V3_MAIN_EN 78 2.2KOHM
2
/VGA A4 3V3_MAIN_EN DDC2C_CLK 1 2 RN7602A @/VGA
Checking
2
GPIO6 2.2KOHM
B6 FB_CLAMP_TGL_REQ DDC2C_DAT
GK208 GPIO7 change netname to DGPU_RST#
OVERT
A6 3D VISION 3 4 RN7603B @/VGA
GPIO8 DGPU_RST# 71,77 2.2KOHM
OVERT F8 GPU_THERM#_L DDC2B_CLK 1 2 RN7603A @/VGA
GPIO9 2.2KOHM
C5 GPU_ALERT#_L DDC2B_DAT
GPIO10 MEM_VREF_CTL 73
E7 MEM_VREF_CTL 1 2 RN7604A /VGA
GPIO11 NVDD_PWM_VID 92 100KOhm
GND D7 Q7604 GPU_THERM#_L 3 4 RN7604B /VGA
2
GPIO12 dGPU_PD# 90 100KOhm
B4 2 S 2N7002K GPU_ALERT#_L
GPIO13 NVDD_PSI 92 @/VGA
GK208 GF117 GF119 Checking G

change netname
D5 1 1 R7606 10KOhm @/VGA
GPIO16 NC GPIO16
2
E6 NVDD_PSI 2 1
GPIO20 NC GPIO20
C4 R7621
GPIO8 NC GPIO21 20151125 X541 修改
GPU_PEX_RST_HOLD# 0Ohm 3D
For GC6 2.0
3
/VGA
1
R7609 10KOhm @/VGA
N14M_GE_S_A1 DGPU_FB_CLAMP_GPIO 2 1
VGA_ALERT_P# 90
/VGA
Vinafix.com
For GC6 2.0
+3VSG R7617 0Ohm 20150623 change VGA_ALERT#
2 1 R7610 10KOhm /GC6 20
@/VGA GPU_PEX_RST_HOLD# 2 1
2
R7615 10KOhm @/VGA

**from PCH GPIO** GPU_EVENT# 2 1
R7618 D7601 check
10KOhm 1 2 R7611 10KOhm /GC6 20
GPU_EVENT# 22
/VGA FB_CLAMP_TGL_REQ FB_CLAMP_TGL_REQ 2 1
1
1N4148WS
/GC6 20
dGPU_PD# 20151207 change FB_CLAMP_TGL_REQ Pull HIGH 10k
20160216 stuff R7611
3
R7612 10KOhm /GC6 20

D 3 DGPU_FB_CLAMP_GPIO 2 1
1 2 RN7607A /VGA
For GC6 2.0 20151120 /GC6 20 100KOhm
1 1 0Ohm 1 @/VGA 2 R7619 +3VSG 3D VISION 3 4 RN7607B /VGA
AC_IN_OC# 31,90 100KOhm
G U7602 MEM_VREF_CTL
2N7002K 0Ohm 1 /VGA 2 R7620 1 A 5

S 2 DGPU_LIMIT 31 71,76 SYS_PEX_RST_MON# VCC
Q7608
/VGA 2 B
2
GPU_PEX_RST_HOLD# GND
3 4
GND DGPU_RST# 71,77
Y
NC7SZ08P5X 20160217 X541UV
/GC6 20 MODIFY DGPU_RST#
1
GND GND R7616 +3VS

10KOhm
/GC6 20
10KOhm R7608 @/VGA
2
VGA_ALERT_P# 2 1
Checking
NB9M_RST#→DGPU_RST#
GND
BOM
Project Name Rev
X407UA/UV R1.0
Title : N14M-GE_GPIO
Size
C
1
dGPU Core Power Sequence

1. +3VSG_MAIN
+3VS +3VSG_MAIN
+12VSUS +3V
dGPU IO Power Sequence D7705 Q7711
1
R7719 R7715 1N4148WS 1 6
stuff unstuff 100KOhm 100KOhm 4. +FBVDD EN Normal R7732 For 920 GPU 2 D 5
/VGA /VGA 2 1 3 S 4
GC6 20 R7731 For 930/940 GPU G
Normal R7703/28
2
@/VGA SI3456DDV-T1-GE3
GC6 20 R7727/30 D7702 R7703/28 /VGA
DGPU_FBVDDQ_EN 94
R7732 1 2 0Ohm 1 2
3
Q7710B dGPU_PWRON_VSG /no GC6 20 R7733 0Ohm
1
DGPU_FB_CLAMP_GPIO = GC6_FB_EN 5 UM6K1N /VGA
58 dGPU_PWR_15#
/VGA C7706
4
D7702 20151127 X541UV MODIFY R7731 1 2 0Ohm
For GC6 2.0 0.01UF/16V
2
R7730 1 2 0Ohm 1 Q7710A dGPU_PWRON_15V---> dGPU_PWRON_MAIN /GC6 20 /VGA
22,77 DGPU_FB_CLAMP_GPIO DGPU_FBVDDQ_EN
/GC6 20 3 2 UM6K1N
R7727 1 2 0Ohm 2 dGPU_PWRON_OR /VGA GND
For GC6 2.0
1
92 NVDD_PWRGD
/GC6 20
2
NVDD_PWR_EN = GPU_PWRON_3.3VSG BAT54CW
+3VS /GC6 20 R7720
100KOhm
20150623 change GPU_PWRON_3.3VSG R7752 /VGA
+3VSUS 100KOhm
1
1
R7708 @/VGA +3VSG_MAIN
U7701
10KOhm
/VGA 1 A 5 GND GND GND GND 2. NVDD EN
31,46,58,89 SUSB_EC# VCC
2
2
2 B R7713 20150623 change

dGPU_PWRON R7703 10KOhm GPU_PWRON_3.3VSG
3 4 1 2 1 2 /VGA
GND
Y dGPU_PWRON_IO R7728 0Ohm +3VSUS
Vinafix.com
1
NC7SZ08P5X 0Ohm
NVDD_PWR_EN 92
@/VGA /no GC6 20 /no GC6 20
3
3 D GND GPU_PWRON_3.3VSG = NVDD_PWR_EN

support GC6 unstuff
2
Q7702
2
1 1 2N7002K R7701 2 1 0Ohm /VGA R7712
3
22 DGPU_PWR_EN# +3VSG_MAIN 3 D
G /VGA 100KOhm R7721
@/VGA 300KOHM
1
+3VS Q7707
2 S 1 1 2N7002K /VGA
1
1
2
R7709 G @/VGA
2
10KOhm R7710
@/VGA 270KOhm C
1% 2 S
2
1
+12VSUS +12VSUS R7750 @/VGA Q7706 GND
2
1
10KOhm B PMBS3904
/VGA @/VGA
1
1
GND GND C7702 R7711
1
R7706 R7707 0.022UF/16V 100KOhm E

100KOhm 100KOhm @/VGA 5%
2
/VGA /VGA @/VGA
2
R7751 2 1 0Ohm GND
2
@/VGA
dGPU_PWRON_VSG GND GND GND
D7706
3
Q7703B 2 1
5 UM6K1N
58 dGPU_PWR_DSG# 20160128 stuff D7706
/VGA for GC6 sequence 1N4148WS
4
DGPU_PWROK 22,25,94 +1.0VSUS +PEX_VDD

/VGA
3. +PEX_VDD
6
Q7703A /VGA
22,25,94 +FBVDDQ_PWRGD Q7705
1
2 UM6K1N C7707
dGPU_PWRON_IO /VGA 0.033UF/16V PEA28BA
1
@/VGA
2
S
3
D
5 2
GND GND
Normal R7723 For 920 GPU
1
G
GND D7704
+3VSG GC6 20 R7724
4
For 930/940 GPU
1N4148WS
+3VSG 2 1
+3VSG_MAIN 0Ohm 2 1 R7723
Normal R7726 For 920 GPU dGPU_PWRON_VSG /no GC6 20 /VGA
R7726 1 2 0Ohm
/no GC6 20 nbs_r0805_h24_000s GC6 20 R7725 For 930/940 GPU
0Ohm 2 1 R7724 1 2
dGPU_PWRON_MAIN /GC6 20 R7705 470KOhm
+3VSG_AON
For GC6 2.0 +3VSG_AON
/VGA
1
R7725 1 2 0Ohm
+3VSG_AON +12VSUS +12VSUS /GC6 20 nbs_r0805_h24_000s C7704
For GC6 2.0 0.01UF/16V
For GC6 2.0
2
/VGA
1
R7735 R7736 R7737 +3VS +3VSG_AON

10KOhm 100KOhm 100KOhm D7701 GND
/GC6 20 /GC6 20 /GC6 20 1N4148WS
2
2 1
20151223 NV 建議上10k ohm dGPU_PWRON_MAIN Q7701

@/VGA
3
1 6 20151127 X541UV EDL ON Board DIMM use DDR4(1.2V)

Q7712B 2 D 5 1.35VGS modify FBVDDQ
5 UM6K1N 1 /GC6 20 2 3 S 4
/GC6 20
4
dGPU_PWRON_VSG R7702 0Ohm G

6
SI3456DDV-T1-GE3
Q7712A
2 UM6K1N /GC6 20 BOM
77 3V3_MAIN_EN
R7738 2 1 0Ohm /GC6 20
1
Project Name Rev

/GC6 20
1
C7701
0.022UF/16V X407UA/UV R1.0
/GC6 20
Title :
2
GND GND N14M-GE_POWER

Size
GND Dept.: ASUSTeK COMPUTER INC. Engineer: Brian Chen
C
BOM
Project Name Rev
X407UA/UV R2.0
Title : Vinafix.com
VGA_****
Size
C
BOM
Project Name Rev
X407UA/UV R1.0
Title : Vinafix.com
VGA_****
Size
C
Kaby Lake-U IMVP8 Power (2) [For CPU]
PSP8115
SHORT_PAD
81 P_IMVP8_CORE_VIN_S
2 1 AC_BAT_SYS
AC_BAT_SYS PJP8102
PJP8101 @ 3MM_OPEN_5MIL @
3MM_OPEN_5MIL @
2 1
P_IMVP8_CORE_VIN_R_S 2 1
2 1
QM3054M6
QM3054M6
2 1
PQH8101
PQH8102
1
1
1
PCI8113 PCI8103 + PCE8102
PCI8101 PCI8111 + PCE8101 10UF/25V 10UF/25V 22UF/25V
2
10UF/25V 10UF/25V 22UF/25V nbs_c0805_h57_000s nbs_c0805_h57_000s
3
D D
2
nbs_c0805_h57_000s nbs_c0805_h57_000s
+VCCSA +VCCIO_CPU
2
2 2
81 P_IMVP8_GT_HG_30 81 P_IMVP8_CORE1_HG_30
G S G S
2
64A
2
PR8106
1
PR8105 10KOhm PL8102
10KOhm PL8101
0.24UH
31A 0.24UH
Irat=35A
1
1 2
Irat=35A
81 P_IMVP8_CORE1_LX_30 @ +VCCCORE
1
1 2
+VCCGT
QM3056M6
81 P_IMVP8_GT_LX_30 @
PQL8102
@ @ [HF]CYNTEC/PEUE063T-R24MS1R195
QM3056M6
1
PQL8101
PC8118 [HF]CYNTEC/PEUE063T-R24MS1R195 PC8168 PSP8103
1000PF/50V PSP8104 1000PF/50V SHORT_PAD
3
D
nbs_c0603_h37_000s SHORT_PAD nbs_c0603_h37_000s
3
2
2 1 P_IMVP8_CORE_ISEN-_10 81
P_IMVP8_GT_ISEN-_10 81
@2 1
81 P_IMVP8_CORE1_LG_30
2
2 P_IMVP8_GT_SNB_S G S P_IMVP8_CORE1_SNB_S PSP8106
81 P_IMVP8_GT_LG_30 @
G S PSP8105 SHORT_PAD
@ SHORT_PAD @
1
2
1
P_IMVP8_CORE_ISEN+_10 81
PC8180 PR8104 PC8179 PR8103 2 1
1
P_IMVP8_GT_ISEN+_10 81
2200PF/50V 1Ohm 5% 2 1 2200PF/50V 1Ohm 5%
1
1
@
@ nbs_r1206_h30_000s @ nbs_r1206_h30_000s
@
2
2
P_IMVP8_CORE_VIN_R_S
QM3054M6
PQH8103
1
/U42 PCI8102 PCI8112 /U42
10UF/25V 10UF/25V
2
P_IMVP8_CORE2_LX_R_30
nbs_c0805_h57_000s nbs_c0805_h57_000s
3
PR8117 /U42 PC8119 /U42 D
1Ohm 0.1UF/25V
5% 2 1
2
2 1 P_IMVP8_CORE2_LX_30
nbs_c0603_h37_000s P_IMVP8_CORE2_HG_30 G S
2
PR8102
1
P_IMVP8_CORE_DRVEN_10 81
PU8102 10KOhm /U42
PL8103
0.24UH
64A
9 /U42
GND2 Irat=35A
1 8
1
EN VCC 1 2
2
PHASE LGATE
7
P_IMVP8_CORE2_LX_30
+VCCCORE
QM3056M6
P_IMVP8_CORE2_LX_30 3 6 P_IMVP8_CORE2_LG_30 @
UGATE GND1 [HF]CYNTEC/PEUE063T-R24MS1R195
PQL8103
@
P_IMVP8_CORE2_HG_30 4 5
BOOT PWM
1
PC8111 PSP8108
P_IMVP8_CORE2_BST_30
1000PF/50V SHORT_PAD
3
/U42 D
RT9610BZQW +5VS_PWR nbs_c0603_h37_000s
2
P_IMVP8_CORE_ISEN2-_10 81
2 1
81 P_IMVP8_CORE2_PWM_10 2
P_IMVP8_CORE2_LG_30 G S P_IMVP8_CORE2_SNB_S PSP8102
/U42
1
SHORT_PAD
PC8120 @
1
2
1
P_IMVP8_CORE_ISEN2+_10 81
1UF/25V PC8112 PR8108 2 1
2
/U42
2200PF/50V 1Ohm 5%
1
nbs_c0603_h35_000s
nbs_r1206_h30_000s
/U42 @ /U42
2
Vinafix.com
+VCCCORE U22 => 22PCS
+VCCGT U42 => 32PCS U22 => 6PCS
30PCS +VCCSA U42 =>11PCS
25PCS; 20PCS
6PCS; 5PCS
1
1
1
PCE8104 + PC8101 PC8104 PC8105 PC8173 PC8126 PC8125 PC8163 PC8143 PC8114 PC8123
1
PCE8106 + PC8159 PC8122 PC8130 PC8113 PC8102 PC8170 PC8171 PC8144 PC8137 PC8184 470U/2V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1
470U/2V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V PC8142 PC8146 PC8175 PC8157 PC8141 PC8124
2
2
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
2
+VCCCORE
+VCCGT
+VCCSA
1
1
PC8182 PC8183 PC8121 PC8191 PC8186 PC8135 PC8190 PC8155 PC8188 PC8178
1
PC8138 PC8153 PC8152 PC8107 PC8108 PC8181 PC8193 PC8162 PC8128 PC8164 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
2
2
1
PC8194 PC8195 PC8196 PC8197 PC8198
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
+VCCGT +VCCCORE
2
/U42 /U42 /U42 /U42 /U42
@ @
1
1
PC8185 PC8129 PC8165 PC8115 PC8103 PC8192 PC8176 PC8177 PC8134 PC8174 PC8145 PC8189 PC8106 PC8109
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
2
/U42 /U42 /U42 /U42 /U42 /U42 /U42 /U42 /U42 /U42
+VCCCORE
1
PC8127 PC8117 PC8116

22UF/6.3V 22UF/6.3V 22UF/6.3V
2
@ @ @
BOM
Project Name Rev
S430 R0.9
Title : PW_KabyLAKE-U (2)

Size
Dept.: NB Power Team Engineer: EE
D
BOM
Project Name Rev
X540UVK R1.0
Title : PW_SKYLAKE-U (3) Vinafix.com

Size
Custom
BOM
Project Name Rev
X540UVK 0.9
Size
Custom
Dept.: ASUSTeK COMPUTER INC. Engineer: Andy
S3 And S5 Truth Table
PD9301
BAT54CW
@/VGA State Pin7(S3) Pin8(S5) VDDQ VTTREF VTT
1
3
2
S0 1 1 On On On
78 DGPU_FBVDDQ_EN
1 2
S3 0 1 On On OFF(Hi-Z)
P_FBVDDQ_EN_10
PR9306
1
0Ohm
/VGA
PC9303
S4/S5 0 0 OFF OFF OFF
0.1UF/25V
(Discharge) (Discharge) (Discharge)
2
@/VGA
+FBVDDQ
[For FRAM]
VTTREF
AC_BAT_SYS
AC_BAT_SYS
1
PC9308
1
0.1UF/25V PCI9301 PCI9303
/VGA 10UF/25V 10UF/25V
2
/VGA /VGA
2
P_FBVDDQ_VTTREF_10
QM1830M3
PQH9301
P_FBVDDQ_DHR_30
5
D
P_FBVDDQ_VSENS_10
Imax = 12A
4
PU9301 G S
RT8248AGQW
5
4
3
2
1
/VGA /VGA
OCP = 13A
1
2
3
VDDQ
GND1
VTTREF
VTTSNS
VTTGND
23
1
GND4
22 PR9312
GND3
f=420kHz 21 PR9317 PC9312 10KOhm
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
c0805,nb_c0805_h57_hdi
GND2
6 20 0Ohm 0.1UF/25V @/VGA Irat=12A
+FBVDDQ
Vinafix.com
FB VTT
P_FBVDDQ_FB_10 7 19 /VGA /VGA
2
S3 VLDOIN
PR9307 8 18 PL9301
S5 BOOT
1 2 P_FBVDDQ_EN_10 9 17 P_FBVDDQ_BST_30 2 1
nbs_r0603_h24_000s 1nbs_c0603_h37_000s
2 1UH /VGA
TON UGATE
AC_BAT_SYS P_FBVDDQ_TON_10 10 16 P_FBVDDQ_HG_30 1 2 1 2
QM1830M3
PGOOD PHASE 1 2
PQL9302
620KOhm P_FBVDDQ_LX_30 +FBVDDQO @/VGA
/VGA 7x7x3mm PJP9303
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
[HF]CYNTEC/PEUB063T-1R0MS 3MM_OPEN_5MIL
LGATE
5
D
PGND
VDD
PCO9306
VID
PC9315
CS
PC9318
PC9309
1
PC9311 @/VGA
22,25,78 +FBVDDQ_PWRGD 4 1000PF/50V
11
12
13
14
15
G S
1
nbs_c0603_h37_000s
1
2
/VGA
1
2
3
+5VSUS
2
2
2
P_FBVDDQ_VDD_20
P_FBVDDQ_VDDP_20
P_FBVDDQ_CS_10
P_FBVDDQ_SNB_S /VGA /VGA /VGA /VGA
1
PC9301 PSP9302
1000PF/50V SHORT_PAD
1
1
PR9315 1 2 PR9305 @/VGA @/VGA
2.2Ohm P_FBVDDQ_LG_30 1Ohm 5%
/VGA 5% @/VGA nbs_r1206_h30_000s
2
nbs_r0603_h24_000s
2
2
1
PR9309 RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA

1
PC9310 402KOhm
1UF/25V /VGA OCP=13A
/VGA PR9314
2
2
nbs_c0603_h37_000s 10Ohm
PC9313 1 2
820PF/50V P_FBVDDQ_LOSENS_10
2 1 /VGA
PR9304 /VGA PSP9301 @/VGA

178KOhm PSL9302 SHORT_PAD
1 2
0402 +FBVDDQ
P_FBVDDQ_LX_30 2 1 1 2 P_FBVDDQ_VSENS_10 P_FBVDDQ_RESENS_10 2 1
/VGA FB=0.75V PR9303 @/VGA
10KOhm
1
/VGA
1
PR9302 PC9317
12.4KOhm 0.1UF/25V
/VGA @/VGA
2
2
PT930* 請放置 PU9301旁;並請放置Trace 上!
PT9301
1 @/VGA
P_FBVDDQ_HG_30
NB_TPC20T
PT9302
1 @/VGA
<Variant Name>
P_FBVDDQ_LX_30
NB_TPC20T
Project Name Rev
PT9303 X540UVK R0.1

1 @/VGA
P_FBVDDQ_LG_30 Title : PW_+FBVDDQ
NB_TPC20T
Size
Dept.: NB Power Team Engineer: SS
Custom
BOM
Project Name Rev
X407UA/UV 0.9
Size
Custom
Dept.: ASUSTeK COMPUTER INC. Engineer: Power
BOM
Project Name Rev
X407UA/UV 0.9
Size
Custom
BOM
Project Name Rev
X407UA/UV 0.9
Size
Custom
BOM
Project Name Rev
X407UA/UV 0.9
Size
Custom
BOM
Project Name Rev
X407UA/UV 0.9
Size
Custom
A/D_DOCK_IN
P0A03BEA P0A03BEA AC_BAT_SYS
SN2867RUYR P0A03BEA
DCDRV
ACDRV
H-MOS
PEA28BA*1 BAT
SMB0_DAT L-MOS
PEA28BA*1
SMB0_CLK
ACOK
+3VAO +3VA
+3VA
RT8249C
AC_BAT_SYS
SN1409049-1 +3VA_EC
PS_ON
+5VO
+5VSUS Imax =10.3A
H-MOS
PEA28BA*1 PEA32DY-1 +5V
5VSUS_ON PS_ON
L-MOS
PEA28BA*1
+5VS
Controller SUSB#_EC PEA32DY-2
Converter
+5VS_PWR
LDO
+3VA_DSW
MOSFET +3VA_DSW Imax =8.3A
SN1409049-2 +3VSUS
VSUS_ON
PEA32DY-1 +3V
SUSC#_EC
H-MOS
PEA28BA*1
3VADSW_ON L-MOS PEA32DY-2
+3VS
PEA28BA*1 SUSB#_EC
+1.8VSUSO
+1.8VSUS
UP0132A
VSUS_ON
1.8VSUS_PWRGD
Vinafix.com
+12VSUS
3VA_DSW_PWRGD
PUMD12
SUSC#_EC +12V
PUMD12 +12VS
SUSB#_EC
PUMD12 +12VDX
MPHY_PWREN
NCP81206
H-MOS
NTMFS4C09*1
L-MOS +VCCCORE Imax = 31A
NTMFS4C06*1
+5VS_PWR
H-MOS +VCCGT
NTMFS4C09*1 Imax = 29A
L-MOS
VCCIN_EN
NTMFS4C06*1
VR_SVID_ALERT#
+VCCSA Imax = 5.1A

VR_SVID_DATA H-MOS
PEA28BA*1
L-MOS
VR_SVID_CLK PEA28BA*1
IMVP8_PWRGD
RT8248A
+5VSUS +1.05VO
H-MOS +1.0VSUS Imax =12A
PEA16BA*1
L-MOS
5VSUS_Delay PEA16BA*1
PEA32DY-1 +VCCST
SUSC#_EC
PEA32DY-2
+VCCIO
SUSB#_EC
RT8248A
+1.35VO
+5VSUS +1.2V Imax = 13A
H-MOS
PEA16BA*1
L-MOS
PEA16BA*1
1.35V_ON
VTT
DDR_PG_CTRL 1.35V_PWRGD
RT8815A
+5VS_PWR H-MOS Imax = 51A

+NVVDD
NTMFS4C09*1
L-MOS
NTMFS4C06*1
NVDD_PWR_EN
NVDD_PWM_VID NVDD_PWRGD
BOM
Project Name Rev
X407UA/UV R1.0
Title : PW_FLOWCHART
Size
Custom
Dept.: NB Power Team Engineer: Power
AC-IN Mode X541UV/UA Power-On Sequence
1 +3VA/+3VA_EC Timing Diagram Rev.0.1
(to EC) 2 EC_RST#
5VSUS_ON
(EC to power) 3 3VA_DSW_ON
+3VA_DSW/+5VSUS/+12VSUS
(pull up to +3VSUS)
(PCH to EC) 4 ME_SusPwrDnAck_R

T0=20ms (spec.>=10ms)
(power to EC) 5 3VSUS_PWRGD
T1<200ms(check)
(EC to PCH) 6 PM_RSMRST#
(EC to PCH) 7 AC_PRESENT
(falling edge)
(to EC) 8 PWR_SW#
T2=50ms
(EC to PCH) 9 PM_PWRBTN#
(PCH to EC) 10 PM_SLP_A#
(PCH to EC) 11 PM_SUSC#
12 PM_SUSB#/SLP_LAN#
(PCH to EC) (PCH to power)
(EC to power) ME_SLP_M_EC#
(EC to power) 13 SUSC_EC#
+1.2V/+2.5V/+3V/+12V/+VCCST
(EC to power)
+1.8VS/+3VS/+5VS/+12VS
+VCCIO/+VccSTG
14 SUSB_EC#
Vinafix.com
VccST/VccPLL
+VCCSA
(power to EC) 15 IMVP8_PWRGD
16 ALL_SYSTEM_PWRGD
(EC to PCH) 17 PM_PWROK_PCH
(PCH to EC) PCH_SUS_STAT#
(PCH to EC) 18 PLT_RST#
+VCCGT
THERMTRIP#
BOM
Project Name Rev
X407UA/UV R1.0
Title : Power On Timing

Size
C
DC-IN Mode X541UV/UA Power-On Sequence
1 +3VA/+3VA_EC Timing Diagram Rev.0.1
(to EC) 2 EC_RST#
5VSUS_ON
(EC to power) 3 3VA_DSW_ON
+3VA_DSW/+5VSUS/+12VSUS
(pull up to +3VSUS)
(PCH to EC) 4 ME_SusPwrDnAck_R

T0=20ms (spec.>=10ms)
(power to EC) 5 3VSUS_PWRGD
T1<200ms(check)
(EC to PCH) 6 PM_RSMRST#
(EC to PCH) 7 AC_PRESENT
(falling edge)
(to EC) 8 PWR_SW#
T2=50ms
(EC to PCH) 9 PM_PWRBTN#
(PCH to EC) 10 PM_SLP_A#
(PCH to EC) 11 PM_SUSC#
12 PM_SUSB#/SLP_LAN#
(PCH to EC) (PCH to power)
(EC to power) ME_SLP_M_EC#
(EC to power) 13 SUSC_EC#
+1.2V/+2.5V/+3V/+12V/+VCCST
(EC to power)
+1.8VS/+3VS/+5VS/+12VS
+VCCIO/+VccSTG
14 SUSB_EC#
Vinafix.com
VccST/VccPLL
+VCCSA
(power to EC) 15 IMVP8_PWRGD
16 ALL_SYSTEM_PWRGD
(EC to PCH) 17 PM_PWROK_PCH
(PCH to EC) PCH_SUS_STAT#
(PCH to EC) 18 PLT_RST#
+VCCGT
THERMTRIP#
BOM
Project Name Rev
X407UA/UV R1.0
Title : Power On Timing

Size
C
Rev Date Description 2017/05/18 ● Update power SCH (X540UVK_MB_20170517_U22)
● Modify Q4807 to 07G005107010 (N-MOSFET EM6K1GT2R EMT6)

R1.0 2016/05/26 1. Remove Q5706 2017/05/19 ● Rmove L5233 /L5204 /L5210 /SLN5213 /RN5203 /RN5201 for EMCF had reserve
2. 改J3101 K/B CONN footprint
3. R7505由100k改為10k 2017/05/24 ● Modify Edp trace shortland location
4. Remove R7121，R7122改為4.7k
● Modify RN4811 PU to +5VS_HDMI_CRT
2017/05/25 ● Update Power SCH (X540UVK_MB_20170525_1350_U22)

2016/05/30 1. updated power 線路
2. Del R3833 & Add D3801 2017/05/26 ● Remove R0602/R0603 JP0607/JP0608 / modify VCCSA power net
3. P.38 AUD_DVDD_IO--->AUD_DVDD
4. 更換P.55 Type-C Short Pin 2017/05/31 ● Update Power SCH (X507_MB_20170531_1350_U22)
2017/06/01 ● Modify D6901 to D4502

2016/06/03 1. updated power 線路 (p.88)
2. R7505 改回100k ( for +1.8vsg power up smooth) ● ADD SATA0 DEVSLP function
3. R2301 R2302 R2303 上件
● remove U42 XTAL@ page 9
2017/06/05 ● remove Q4501 /R4511/R4501/C4503

2016/06/08 1. updated power 線路 (p.87)
2. updated power 線路 (p.80) - change option 2017/06/06 ● DDR SWAP follow Layout : ddr_swap_1404
● ADD J6802/C6809/C6810 for USB IO Board

2017/06/07 ● Update X507_MB_20170607_1050_U22
R2.0 2016/07/01 1. J4501 LBS換footprint
2. C2901 換 12 pF ● Modify GPU Power CAP
3. C2505 for power sequence
4. Updated page 68, page 24 remove net ● Modify L4504/4509/4510 L5206/L5209 to temp_T_001687
● Modify C2623 : 22UF from 11G235222625390 to 11G233222625320
2016/07/12 1. Change page 68 pin defined 2017/06/08 ● ADD USB IO Board Page.66
2017/06/09 ● X507_MB_20170609_1426_U22
2016/07/13 1. Change 7/12 EMI 更動
2017/06/12 ● Change VRAM to GDDR5 256M X32 refer X542UQ
2016/07/21 1. updated power 線路 (p.84, p.88)
2. GPU PCIE change for Gen 2 ● X507_MB_20170612_1856_U22
3. Remove R7114 ，R7505 change 10k
4. R3204 換1M，R3205上件 2017/06/13 ● X507_MB_201706131014_U22
● Change connector follow connector list
2016/09/29 1. change CAP voltage rating (p.37)
2017/06/14 ● Modify TPanel_INT# to J4501 pin28
X540UPR 2017/06/15 ● MOVE I2C2_SDA_TCHPANEL/I2C2_SCL_TCHPANEL from GPP_F4/5 to GPP_C16/17

R1.0 2017/03/28 ● 更新Block Diagram (page 1)
● 新增U42 / U22 colay power plane(+VCCCORE/+VCCGT)切換線路 (page 6) ● Remove R2142
● 新增 24M XTAL 預留線路 for U42 (page 9)
● GCLK generator換料 (page 29) ● Remove C1730
● PCH 24M clock 改由 GCLK輸入 (page 9, 29)
● power更新線路for U42 (page 78, 80, 81, 91) 2017/06/16 ● Update J4201 to 12023-00025900
● ESD pool建議用料更換 (page 55)
2017/06/20 ● Remove USB2.0 port 3
2017/03/29 ● 更新SVID / VCCCORE / VCCGT / VCCSA sense pin name (page6)
2017/03/30 ● power移除+VCCSA線路, 原+VCCSA 改為 +VCCIO_CPU (page 6, 80, 81)
2017/03/31 ● merge 2 USB port to 1ESD component (page 52)

2017/04/05 ● 新增wake on WAN預留線路 (page 30, 53)
2017/04/07 ● P_SVID_DATA_X2(Page 6) 改為P_SVID_DATA_50OHM_X2
2017/04/11 ● C1067 改為上件 C1065 改為不上件 (Page 10)
X506NA
X506UA 2017/05/08 ● Remove ODD (moidify IO) (Page 68)
R1.0
● Remove Carder Reader /direct connect from PCH (Page 42)
● ADD M.2 SSD Schematic refer UX310UV (Page 51)

● Modify Wlan connector / Schematic refer UX310UV (Page 53)
Vinafix.com
2017/05/09 ● Modify R2430,R3079,R2635,R2810 from 0 Ohm to Shortland for cost
● Reduce Wake on WLAN Solution (Page 53)
● Modify DDR to 2SO DIMM refer X542UQ_PR_0327
2017/05/10 ● Follow X542UA_R1.0 #79, Remove PM_EXTTS#0 & R3091 (page 30)
● Remove D3602 (Page 36)
● All Discharge BOM to @ (Page 57)

● Audio A/D GND left one 0 ohm at SR (Page 36)
2017/05/11 ● remove C3605/C0603/C3606/3602 these cap already had near Pin side (Page 36)
● Change R4515/R4516 to shortland(SL4507/SL4508) (Pahe45)
● Change R3619 to short land SL3607 ( Page 36)

● Modify R5309 to Shortland SL5309 ( Page 53)
● BT/WLAN ON OFF Follow X452UQ PR (Pae 53)

● For SDCX; SD_RCOMP need PD 200Ohm(Page22)
2017/05/12 ● ADD Cardreader power solution, and PU/PD resistor move to PCH side
● Del R0303 for better placement /Change R0307 to @ for No Port B at X506UA
● DDR_PG_CTRL PU change to +3VS /Del R0408

refer UX310 X452UQ (Page 4)
● Modify R4803/R4804/R4805/R4806 to @
RN4801/RN4802 to 0ohm (Page 48)
● Change RN2401/RN2402 to R2435~R2440 No use CLK REQ be @ (Page 24)

● Change RN2502 to R2560/R2561(Page 25) for Cost
● remove R2505 ,power sequence will be check in X506 SR (page 25)
● ADD FingerPrint Function
● Remove RN2104 /RN2103 refer UX310/X542UQ/Z450.
● Remove R2196 for X506 No oDD
● Remove R2135 refer X542UQ

● Remove R2161/R2161
● Remove C6920 & NET:SATA0_DEVSLP (Page23/69)
● Remove R2310/R2308
● Change R2301 to SL2321 ,
● Add F4502 reserve (Page 45)

2017/05/15 ● Add USB EMCF (Page 52)
● Remove C6920 for X506UA/UV no ODD
● Remove EDP TX2/TX3 (Page 45)
● Add Touch panel I2C

● Change J4201 PN to 12023-00015200 /add R4203 (page 42)
● UPADTE Poewer SCH (BAY MAX_20170515)
2017/05/16 ● modify J3101 PN to 12018-00200500

J3102 to 12018-00211200
J3701 to 12014-00711900
J6001 to 12033-00030700
J6002 to 12020-00025600
J6002 to 12003-00072200
2017/05/17 ● modify U4503/U4201 to 06016-01100000

BOM
● Add TPanel_INT# inJ4501.33
Project Name Rev
● Add R4505 for SD_PWR_EN_# X407UA/UV
● Modify R0607/R0608 to JP0607/JP0608

Title : System History
Size
Dept.: ASUSTeK COMPUTER INC. Engineer:
D
Load Switch +3VSUS +3VA_DSW +3VSUS
Imax =0.1A
PSL8801 Imax = 1.275A Imax = 5.5A
1
1 2 PR8809 PR8813 PR8802
+3VA
PU8801 0603 +3VA_EC +3V +3VS 100KOhm 100KOhm 100KOhm
17 @ +3VA_DSW +3VA_DSW
GND4
16
2
GND3
15 PQ8811A PQ8811B
GND2
PR8820 1 14 PC8801
VIN1_1 VOUT1_2
P_LS_3VSUS_PG#_10
0Ohm 2 13 +3VA_ECO 470PF/50V 8 D S 1 6 D S 3
VIN1_2 VOUT1_1 P_3VSUS_PWRGD 59
1 2 3 12 7 5
0.01UF/25V
0.01UF/25V
D D
31,33,58 PS_ON ON1 CT1
1
P_LS_3VA_EC_ON_10 4 11 P_LS_3VA_EC_CT_10 1 2 9 D 10 D
VBIAS GND1
1 2 5 10 G G
P_LS_3VSUS_PG_10
PC8805 PC8828
3
PC8826
PC8815
31,58,84 VSUS_ON ON2 CT2
P_LS_3VSUS_ON_10 6 9 P_LS_3VSUS_CT_10 1 2 PEA32DY PEA32DY
@ @ VIN2_1 VOUT2_2 @ 0.1UF/25V 0.1UF/25V
4
2
2
PR8819 7 8 PC8817 @ 5
VIN2_2 VOUT2_1 @
0Ohm 0.1UF/25V PQ8804B
4
1
1
SN1409049DPUR Imax = 1.63A EM6K1-G-T2R
6
+12V +12VS
P_LS_3V_RC_10 2 1 P_LS_3VS_RC_10 2 1 2
2 +3VSUS
1
PC8820 PR8816 PC8827 PR8804 PQ8804A
1
1
1
PC8816 0.01UF/25V 100KOhm 0.01UF/25V 100KOhm PC8819 EM6K1-G-T2R
0.1UF/25V 0.1UF/25V
2
+3VA_DSW
2
20151204 Modify +3VA_DSW
PR8825
10Ohm
Imax = 0.1A Imax = 5.1A 2 1
1
PD8801 @
+1.8VS +5VS +5VS_PWR BAT54CW PC8832
+VCCPLL_OC
+1.8VSUS PQ8809 +5VSUS PQ8801 1 1UF/6.3V
PU8804
2
QM1830M3 QM1830M3 3 +1.2V
2 C1 A2
VDD VOUT
PSL8803 @
S
1
3 3 1 2 A1 C2
D
D
0603 VIN SS
5 2 5 2 P_VCCPLL_OC_SS_10 PC8830
1
1 1
PSL8803請放置PQ8801B旁 B1 B2 0.1UF/25V
G
G
31,58,89 SUSC_EC# EN GND
2
1
PC8823 1 2 P_VCCPLL_OC_EN
4
1
PC8834 0.1UF/25V PR8824 PC8808
2
APL3527GHAI-TRG
0.1UF/25V @ PC8831 0.1UF/25V
2
0Ohm
@ 0.01UF/25V @
2
+12VS
P_LS_5VS_RC_10 2 1
+12VS
1
P_LS_1.8VS_RC_10 2 1 PC8822 PR8823

1
PR8826 0.01UF/25V 100KOhm

PC8833 100KOhm
2
0.01UF/25V
2
+1.0VSUS
Imax = 0.24A
+VCCST
+1.0VSUS
Imax = 3.44A
+VCCIO
Vinafix.com +VCCST +3VSUS +VCCIO +3VSUS
2
1
1
PR8801 PR8815 PR8807 PR8805
VCCST_PWRGD 59,70 VCCIO_PWRGD 59
PQ8805A PQ8805B 1KOhm 100KOhm 1KOhm 100KOhm
+12VS +12VS
8 S 1 6 S 3
2
D D
1
7 5
3
D D
1
9 D 10 D PQ8803A PQ8803B
P_LS_VCCST_PG#_10
P_LS_VCCIO_PG#_10
P_LS_VCCST_PG_10
G PC8803 G PC8809 2 EM6K1-G-T2R 5 EM6K1-G-T2R
P_LS_VCCIO_PG_10
1
PEA32DY 0.1UF/25V PEA32DY 0.1UF/25V PR8806 PR8821
4
2
4
2
@ @ 100KOhm 100KOhm
PQ8802 C PQ8812 C
PMBS3904 PMBS3904
Pull high on P.58
2
Pull high on P.58

+12V B B
P_LS_VCCST_RC_10 2 1 P_LS_VCCIO_RC_10
1
1
6
PC8810 PR8803 PC8811 PC8802 PC8804

0.01UF/25V 100KOhm 0.01UF/25V PQ8813A 0.1UF/25V 0.1UF/25V
1
2 PC8806 PC8825
EM6K1-G-T2R @ @
2
2
P_LS_VCCIO_R_RC_10 4.7UF/6.3V E 4.7UF/6.3V E
1
2
PQ8813B
EM6K1-G-T2R 5
PM_SUSB# 26,31,59
4
PQ8810 PQ8807
EMD62 EMD62
+12VSUS 20mil 20mil +12VSUS 20mil 20mil
4
TR2
3
+12V 4
TR2
3
+12VS
R2 R1 R2 R1
1
P_LS_12V_EN_10 5 2 PR8812 P_LS_12VS_EN_10 5 2 PR8810

R1 R1
R2 R2
1MOhm 1MOhm
6 1 6 1
TR1 TR1
2
31,58,89 SUSC_EC# 31,46,58,78 SUSB_EC#
BOM
Project Name Rev
X540UVK R0.1
Title : PW_LOAD_SWITCH
Size
Custom
PWM-VID Spec
@/VGA
Config A Config B Config C Config D BAT54CW
PD9103
R1 (kR) 39 20 39 27
2
AC_BAT_SYS
R2 (kR) 39 20 30 7.5 3 PJP9100
1 3MM_OPEN_5MIL
R3 (kR) 1.5 2 3 0 GPU_PWRON_3.3VSG = NVDD_PWR_EN
2 1
P_NVVDD_VIN_S 2 1
+3VSG NVDD_PWR_EN 78
R4 (kR) 30 18 24 6.2 2 1 @/VGA
QM3054M6
PQH9101
1
1
PC9110 PR9123 5%
R5 (kR) 1.5 0 3 1.74 1000PF/50V 0Ohm PCI9102 PCI9101 + PCE9100
@/VGA 10UF/25V 10UF/25V 27UF/25V
1
/VGA
2
C (nF) 1.5 2.7 1.8 5.6 /VGA @/VGA /VGA
2
PR9118 nbs_c0805_h57_000s
nbs_c0805_h57_000s h=6mm
3
D
10KOhm PR9119 5%
PSL9106 /VGA 0Ohm
2
1 2 1 2 2
77 NVDD_PSI 0402 G S
P_NVVDD_HG1_30 P_NVVDD_HG1_R_30
@/VGA PD9101 nbs_r0603_h24_000s
1
1 +5VS_PWR PR9110
1
/VGA
PSL9105 P_NVVDD_BST2_30 3 +NVVDD
77 NVDD_PWM_VID 10KOhm /VGA
1 2 2 PL9100
0402
@/VGA [HF]CYNTEC/PEUE064T-R36MS1R407 0.36UH
2
@/VGA BAT54AW @/VGA 1 2
QM3056M6
1
Irat=25A /VGA
P_NVVDD_BST1_30
P_NVVDD_HG1_30
P_NVVDD_VID_10
P_NVVDD_PSI_10
PC9121 PC9104
P_NVVDD_EN_10
2 1
PQL9101
1000PF/50V
2
PR9109 nbs_c0603_h37_000s
3
D
20KOhm 0.1UF/25V @/VGA
nbs_c0603_h37_000s
P_NVVDD_REFIN_R_10 2 1 2
/VGA
R1 /VGA PU9102 P_NVVDD_LG1_30 G S P_NVVDD_SNB1_S
+5VS_PWR
RT8820AGQW
1
1
1
PR9122 /VGA PR9121 PR9117
1
5
4
3
2
1
PC9113
2
R3 2KOHM 27.4kOHM 1Ohm
VID
PSI
EN
UGATE1
BOOT1
1000PF/50V /VGA
Boot Voltage = 0.9V PR9112 23 nbs_r1206_h30_000s
1
GND3
2
/VGA R2 20KOhm 22 PR9103 @/VGA @/VGA 5%
2
2
GND2
PSL9102 21 2.2Ohm @/VGA
GND1
1 2 /VGA 6 20 nbs_r0603_h24_000s
REFADJ PHASE1 OCSET
1
P_NVVDD_REFIN_10 0402 P_NVVDD_REFIN_L_10 P_NVVDD_REFADJ_10 7 19 P_NVVDD_LX1_30 5%
2
REFIN LGATE1
@/VGA P_NVVDD_REFIN_10 8 18 P_NVVDD_LG1_30 OCP=75A
P_NVVDD_VIN_S VREF PVCC /VGA
C P_NVVDD_VREF_10 9 17 P_NVVDD_PVCC_20
1
TON LGATE2
1
1
PR9104 P_NVVDD_OCS_10 10 16 P_NVVDD_LG2_30
RGND PHASE2
R4 18KOhm PC9103 P_NVVDD_FBRTN_10
@/VGA P_NVVDD_LX2_30 PC9123
1
1
OCSET/SS
4700PF/50V PR9106 1UF/25V
1
2
2
UGATE2
PGOOD
PC9101 /VGA /VGA PR9114 nbs_c0603_h37_000s
BOOT2
82KOhm
2
VSNS
4700PF/50V 2.2Ohm /VGA
2
P_NVVDD_FBRTN_R_10
/VGA PR9116 /VGA P_NVVDD_VIN_S
1
@ 620KOhm 1% PC9117
11
12
13
14
15
1
2
PR9102 0.1UF/25V PCI9103 PCI9104
QM3054M6
PQH9103
R5
1
0Ohm PC9122 1 2 10UF/25V 10UF/25V
1
Vinafix.com
nbs_c0603_h37_000s
2
P_NVVDD_COMP_10
P_NVVDD_PG_10
P_NVVDD_HG2_30
0.1UF/25V /VGA /VGA
1
/VGA 1
/VGA
/VGA /VGA PC9114 PR9108
2
1UF/25V 82KOhm nbs_c0805_h57_000s

nbs_c0805_h57_000s
/VGA @/VGA
3
D
2
PR9125 5%
2
P_NVVDD_FB_10 P_NVVDD_BST2_30 0Ohm
P_NVVDD_FBRTN_10 1 2 2
P_NVVDD_HG2_R_30 G S
nbs_r0603_h24_000s
1
PR9101 Imax=51A
1
/VGA
+NVVDD
10KOhm /VGA
+3VSG @/VGA PL9101
1
[HF]CYNTEC/PEUE064T-R36MS1R407 0.36UH
2
PC9119 1 2
PSP9102放在PCE9102 or PCE9101 上
4700PF/25V P_NVVDD_LX2_30
1
2
@/VGA PR9115 Irat=25A /VGA
+NVVDD
1
10KOhm
QM3056M6
PSP9102
PR9107 /VGA PC9111
P_NVVDD_CMP_10
1
PQL9103
PSL9104 1000PF/50V
2
1
2 1 1 2 1 2 nbs_c0603_h37_000s + PCE9103
1
3
0402 NVDD_PWRGD 78 D
100Ohm /VGA PC9120 @/VGA 560UF/2.5V
SHORT_PAD
PR9128 5600PF/25V @/VGA /VGA
2
2
@/VGA 147KOhm @/VGA 2
h=6mm
PSL9103 /VGA P_NVVDD_LG2_30 G S P_NVVDD_SNB2_S
2
1
1 2
RT OCL
1
0402 NVDD_VCCSENSE 71
PR9113
1
1
@/VGA PR9111 PC9116 1Ohm
/VGA
2
1
33KOhm 1000PF/50V nbs_r1206_h30_000s

1
PC9125 PC9109 @/VGA @/VGA @/VGA @/VGA

5%
2
4700pF/50V 4700pF/50V
2
2
@/VGA PC9109放在GPU端
2
PSL9101
+NVVDD
PT910* 請放置 PU9101旁;並請放置Trace 上!
1 2
0402 NVDD_VSSSENSE 71
算式為Per Phase
@/VGA
ROC=Ivalley*Rds*12 /10uA PT9101 PT9104
1 1
PSP9101 1
1
PR9105 RT OCL=87A PC9136 PC9137 PC9138 PC9139 PC9140 P_NVVDD_HG1_30 P_NVVDD_HG2_30
NB_TPC20T NB_TPC20T
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2 1 1 2 /VGA /VGA /VGA /VGA /VGA
2
2
100Ohm nbs_c0805_h57_000s nbs_c0805_h57_000s nbs_c0805_h57_000s nbs_c0805_h57_000s nbs_c0805_h57_000s PT9102 PT9105
SHORT_PAD 1 1
/VGA
@/VGA P_NVVDD_LX1_30 P_NVVDD_LX2_30
NB_TPC20T NB_TPC20T
PSP9101放在PCE9102 or PCE9101 上 PT9103 PT9106

1 1
+NVVDD P_NVVDD_LG1_30 P_NVVDD_LG2_30
NB_TPC20T NB_TPC20T
PTR9110 place near PQL9101
Close to +NVDD L side
BOM
PTR9110
1
1
100kOhm PC9141 PC9142 PC9143 PC9144 Project Name Rev
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2 1 P_GPU_VRM_TEMP_SENSOR_10 91
/VGA /VGA @/VGA @/VGA
X540UVK R0.1
2
2
/VGA
Title : PW_NVVDD (1)
At Page 78 Size
Custom

Asus X407uar X407ubr X407ufr Schematic

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Asus X407uar X407ubr X407ufr Schematic

Uploaded by

Copyright:

Available Formats

SYSTEM PAGE REF.

X407UAR/UBR/UFR SCHEMATIC Revision 1.0 Power

PAGE Content +VCCGT +VCCSA

010_CPU_POWER_CAP (UFR：DGPU = Nvidia N16S-GTR, MX130）(65W) (Power BOM) Page 84

045_eDP Connector SMB0 PCIE_6

051_NGFF(KEY-M)_SSD SPI ROM SPI

075_VGA_nVIDIA_N16V/S_ROM,XTAL USB 2.0_1

Project Name Rev

Title : Block Diagram

+1.8VSUS [For PCH]

PC8316 PR8307 PC8314

PC8311 PC8309 PC8319 @ 1UF/16V 10KOhm 10UF/6.3V

Title : PW_+1.0VSUS / +1.8VSUS

Project Name Rev

Project Name Rev

H6515 H6517 H6513

GND GND GND

CT189B180D150 CT189B180D150 CT189B180D150

GND GND GND 20171025 Brian

GND GND 2D_D110N_D122X98N 2D_D110N_D122X98N

GND 20171013 Brian C315D110N C197D110N

TOP/BOT VRAM GASKET (3*2)

H6521 H6522 H6523 H6524 H6525

SMD98X118 SMD98X118 SMD98X118 SMD118X118 SMD118X118

GND GND GND GND GND

Title : 65_ME_Conn & Skew Hole

ASUSTeK COMPUTER INC. NB4

Date: Wednesday, March 07, 2018 Sheet 66 of 102

PT860* 請放置 PU8600旁;並請放置Trace 上! VFB=0.75V PR8611 PR8609

PC8619 PC8616 1UF/16V 10KOhm 10UF/6.3V

@ 3A LDO REF=0.8V PR8602

nbs_c0805_h57_000s nbs_c0805_h57_000s 10KOhm <Core Design>

Project Name Rev

P_3VADSW_BST_R P_3VADSW_LX_30 +3VADSWO

PC8723 PCE8703 D PC8714 7x7x3mm

PC8709 PR8703 PC8715 1 2 PC8708

31,58 5VSUS_ON 0402 P_5VSUS_EN_10 150PF/50V 6.8KOhm 0.1UF/25V

S0 CS S3 DS3 S4 S5 S5 with USB Charger+ S0 CS S3 DS3 S4 S5 S5 with USB Charger+

PSL8701 1 2 PC8718 5 2 3VSUS_ON 1 - 1 - 0 - 0 3VSUS_ON 1 - - 0 0 0 0

PC8724 4 3 5VSUS_ON 1 - 1 - 1 - 1 5VSUS_ON 1 - - 1 0 0 1

請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm

PT8709 PT8702 PT8706 PT8701 PT8708

PT8710 PT8711 PT8707 PT8705

FBA_EDC0 R13 A12 FBA_EDC7 R13 A12

FBA_DBI0 P13 C11 FBA_DBI7 P13 C11

FBA_CMD14 J11 K2 FBA_CMD30 J11 K2

K4G41325FE-HC28 GND K4G41325FE-HC28 GND

Project Name Rev

127KOhm PC8912 P_CHG_IADP_10

47PF/50V PU8901 P_CHG_VCC_20 10KOhm P_CHG_RSENS_SHAPE

PC8917 P_CHG_PMON_10 10 26 P_CHG_LX_30 0Ohm 1000PF/50V @ 68UF/25V

91 P_CHG_CMPOUT_10 DisCharge 24A

45W: 1.2V =>57.6k 0.1UF/25V

0Ohm 93.1KOhm 0Ohm

Project Name Rev

PTR7807 place near VRAM. P_TEMPSENS_6_VCC_30

P_CHG_REGN_20 P_CHG_REGN_20 P_CHG_REGN_20

PTR9003 place near DC JACK

1 2 PR9014 PR9017 100kOhm

Project Name Rev

Psys FF=3.2V PR8000 P_IMVP8_VREF_0.6V_S 1

2KOhm 1% 2KOhm 1% 0.1UF/16V