MODULE 1

Embedded System Components: Embedded Vs General computing

system, Classification of Embedded systems, Major applications and
purpose of ES. Core of an Embedded System including all types of
processor/controller, Memory, Sensors, Actuators Communication
Interface (on-board and external types), I2CBus, SPI Bus, Embedded
firmware, Other system components- Reset Circuit, Brown- out
Circuit, Oscillator Unit, Real Time Clock(RTC), Watchdog Timer

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 Application Areas
• Medical Systems
– pace maker, patient monitoring systems, injection systems, intensive care
units, …
• Office Equipment
– printer, copier, fax, …
• Tools
– multimeter, oscilloscope, line tester, GPS, …
• Banking
– ATMs, statement printers, …
• Transportation
– (Planes/Trains/[Automobiles] and Boats)
• radar, traffic lights, signalling systems, …
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 Application Areas
• Automobiles
– engine management, trip computer, cruise control,
immobilizer, car alarm,
– airbag, ABS,…
• Building Systems
– elevator, heater, air conditioning, lighting, key card
entries, locks, alarm systems, …
• Agriculture
– feeding systems, milking systems, …
• Space
– satellite systems, …
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 Applications and Technology Trend

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 Embedded Systems are everywhere

–Dedicated purpose
–Hidden

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 What is Embedded System?
An Electronic/Electro mechanical system which is designed to
perform a specific function and is a combination of both
hardware and firmware (Software)

• Unique in character and behavior

• With specialized hardware and software

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 Embedded Systems Vs General Computing Systems:

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Embedded Systems based on Purpose/Usage
• Data Collection/Storage/Representation
• Data Communication
• Data (Signal) Processing
• Monitoring
• Control
• Application Specific User Interface

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 Hearing Aid

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 Control

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Actuator- responsible for moving and controlling a mechanism or system
Application Specific User Interface

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 Classification of Embedded Systems:

1. Based on Generation

2. Based on Complexity & Performance Requirements

3. Based on deterministic behaviour

4. Based on Triggering

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Embedded Systems - Classification based on Generation

• First Generation: early embedded systems built around 8-bit

microprocessors like 8085 and Z80 and 4-bit microcontrollers
EX. stepper motor control units, Digital Telephone Keypads etc.

• Second Generation: Embedded Systems built around 16-bit

microprocessors and 8 or 16-bit microcontrollers, following the first
generation embedded systems
EX . SCADA (Supervisory control and data acquisition system),
Data Acquisition Systems etc.

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 Embedded Systems - Classification based on Generation

• Third Generation: Embedded Systems built around high performance

16/32 bit Microprocessors/controllers, Application Specific Instruction
set processors like Digital Signal Processors (DSPs), and Application
Specific Integrated Circuits (ASICs).The instruction set is complex and
powerful. EX. Robotics, industrial process control, networking etc.

• Fourth Generation: Embedded Systems built around System on Chips

(SoC’s),
Re- configurable processors and multicore processors. It brings high
performance, tight integration and miniaturization into the embedded
device market EX Smart phone devices, Real time systems
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 Embedded Systems - Classification based on Complexity &
Performance
• Small Scale:
The embedded systems built around low performance and
low cost 8 or 16 bit microprocessors/ microcontrollers.
It is suitable for simple applications and where performance
is not time critical.
It may or may not contain OS.

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 Embedded Systems - Classification based on Complexity &
Performance

• Medium Scale:
Embedded Systems built around medium performance,
low cost 16 or 32 bit microprocessors / microcontrollers or
DSPs.
These are slightly complex in hardware and firmware.
It may contain GPOS/RTOS.

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 Embedded Systems - Classification based on Complexity & Performance

• Large Scale/Complex:
 Embedded Systems built around high performance 32 or 64 bit
RISC processors/controllers, RSoC or multi-core processors and
PLD.
 It requires complex hardware and software.
 These system may contain multiple processors/controllers and co-
units/hardware accelerators for offloading the processing
requirements from the main processor.
 It contains RTOS for scheduling, prioritization and management.

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Embedded Systems: Classification Based on deterministic behaviour

 It is applicable for Real Time systems.

 The application/task execution behaviour for an embedded
system can be either deterministic or non-deterministic

These are classified in to two types

1. Soft Real time Systems: Missing a deadline may not be critical

and can be tolerated to a certain degree

2. Hard Real time systems: Missing a program/task execution time

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can not be tolerated at all 22
 The more severe the consequences, the more likely it will be said that the deadline is “hard” and thus,
that the system is a hard real-time system. Real-time systems at the other end of this continuum are
said to have “soft” deadlines—a soft real-time system

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 Embedded Systems - Classification Based on Triggering

These are classified into two types

1. Event Triggered : Activities within the system (e.g., task run-
times) are dynamic and depend upon occurrence of different
events .

2. Time triggered: Activities within the system follow a statically

computed schedule (they are allocated time slots during which they
can take place) and thus by nature are predictable.

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 Core
• Basic Computation Unit of CPU that performs
mathematical and logical operations

• CPU can contain more than one core for

multitasking with supporting hardware and
firmwares

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• A core is capable of independently executing a
single thread or process while the other cores may
be idle or executing a completely different process
simultaneously.
• processor with more cores- better able to
multitask programs without having to divide up
the available time between them as much it would
with a single core for executing all processes.

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 Cores in the Embedded systems
• General purpose/ Domain specific-
microprocessors/microcontrollers/ DSP processors

• Programable Logic Devices

• Application Specific Integrated Circuits

• Commercial Off shelf Components

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 Is microcontroller or microprocessor used most in
embedded applications?
• It depends upon the application needs.
• to control a home appliance at your home then a tiny chip
micro controller can be used
• to control high end devices like servers and automation
machines you need microprocessors as micro
controllers have limited speed and low accuracy.

So choose the one that suits your need…

microcontroller is mostly used in embedded systems.
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• in larger application Microprocessors are used most in
building embedded systems

• embedded systems are meant for specific task, if power

consumption,space,chip count are neglected and if you
need higher level of processing then microprocessor is
the best option

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 Application Specific Integrated Circuit
(ASIC):
• A microchip designed to perform a
specific or unique application. It is
used as replacement to conventional
general purpose logic chips.

• ASIC integrates several functions into a

single chip and thereby reduces the
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 • Most of the ASICs are proprietary products.
• As a single chip, ASIC consumes very small area in the
total system and thereby helps in the design of smaller
systems with high capabilities/functionalities.

• ASICs can be pre-fabricated for a special application

or it can be custom fabricated by using the
components from a re-usable building block library
of components for a particular customer application
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 ASIC Fabrication
• Fabrication of ASICs requires a non-refundable initial
investment (Non Recurring Engineering (NRE)
charges) for the process technology and configuration
expenses
• If the Non-Recurring Engineering Charges (NRE) is
born by a third party and the Application Specific
Integrated Circuit (ASIC) is made openly available in
the market, the ASIC is referred as Application
Specific Standard Product (ASSP)
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 Programmable Logic Devices (PLDs)
• Designers can use inexpensive software tools to
quickly develop, simulate, and test their logic
designs in PLD based design. The design can be
quickly programmed into a device, and immediately
tested in a live circuit
• PLDs are based on re-writable memory technology
and the device is reprogrammed to change the
design
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 COTS (commercial off-the-shelf)

• used "as-is."
• COTS products are designed for easy installation and
interoperate with existing system components.
• Almost all software bought by the average computer user fits
into the COTS category
• Examples - operating systems, office product suites, word
processing
• One of the major advantages of COTS products- mass-
production , relatively low cost.
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 Advantages of COTS

• Reduced development cost, time

• Complex systems can be built using existing
reusables
• Reduced testing efforts

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COTS component contains
a General Purpose Processor (GPP) /
Application Specific Instruction Set
Processor (ASIP) /
Application Specific Integrated Chip
(ASIC)/
Application Specific Standard Product
(ASSP)
or Programmable Logic Device (PLD)
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 advantage of using COTS
• readily available in the market
• cheap and a developer can cut down development time
to a great extend.
• no need to design the module yourself and write the
firmware .
• Everything will be readily supplied by the COTs
manufacturer
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 COT- Drawbacks or concerns
• there are no operational and manufacturing standards

• that the manufacturer may withdraw the product or

discontinue the production of the COTs at any time if rapid
change in technology

• This problem adversely affect a commercial manufacturer of

the embedded system which makes use of the specific COTs
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Processor Application Advantage Disadvantage
General purpose For intensive computations No engg. Cost for designing Additional redundant units in the
engg. Cost - management of system that are not needed
processor project cost
Microcontroller Used with internal memory No engg. Cost for designing Additional manufacting cost and
and devices redundant application units
DSP Used with signal No engg. Cost for designing High manufacturing cost
processing - sum of costs of all resources
consumed in the process of
making a product.
Single purpose or Control IO and Bus Support other processing units In house engg cost , royalty
operations payments for IP
ASIC / processor
Dual core To significantly enhance Reduced engg. cost Manufacturing cost, dual core
the performance of the processors are costly
system

Accelerator To accelerate execution of Increases performance by co- In house engg cost , royalty
the code, floating point processing payments for IP
operations
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 General Schematic of Embedded system
Output
device
Input device (screen)
(keyboard) CPU program

Memory
Sensors Actuators
to measure bus to
physical control
values physical
things
Permanent Memory

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 Input and Output
• Required to communicate with outside world

• Embedded System:

– Sensors (e.g. in automobile: acceleration sensor, seat sensor)

– Actuators (e.g. in automobile: valves for airbags)

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 Sensor / transducer
• any device which converts one form of energy into another
Example
• A microphone converts sound into electrical impulses and a
loudspeaker converts electrical impulses into sound (i.e., sound
energy to electrical energy and vice versa).

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 Actuators

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 Difference in sensor and actuator
• the sensor is used to monitor the changes in the environment
by using measurands

• the actuator is used when along with monitoring, the control

is also applied such as to control the physical change.

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 MEMORY
• The memory used in embedded system can be either Program
Storage Memory (ROM) or Data memory (RAM)
• Certain Embedded processors/controllers contain built in
program memory and data memory and this memory is known
as on-chip memory
• Certain Embedded processors/controllers do not contain
sufficient memory inside the chip and requires external
memory called off-chip memory or external memory.

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 MEMORY

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 Code memory
• Stores the program instructions

• Program is retained even after power off

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 Mask- Rom mask is created from ROM image file
created at foundry for fabrication of a chip
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 EPROM
• Erasable Programmable Read-Only Memory.
• needed U-V light to erase the memory chip

EEPROMFLASH memory/
• non-volatile computer storage medium that can be
electrically erased and reprogrammed.
• bits can be individually erased and programmed
• no necessity to wipe out the entire memory and
reprogram (“burned”) the whole thing again from scratch
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 Read-Write Memory/Random Access Memory (RAM)

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 RAM

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 high-speed SRAM

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 Cache Memory
• stores data in KB and recent activities that are done by CPU.

• CPU always first look for data in cache memory and if not
present in the cache then get from the RAM.

• Cache is more expensive than RAM, stores small amount of

data but it is very fast in the processing cycle.

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 Cache memory (high-speed SRAM)

• purpose - to store program instructions and data that are used

repeatedly in the operation of programs or information that the
CPU is likely to need next.

• The computer processor can access this information quickly

from the cache rather than having to get it from computer's
main memory.

• typically integrated directly into the CPU chip or placed on a

separate chip that has a separate bus interconnect with the
CPU.
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 Memory Shadowing

a technique adopted to solve the

execution speed problem in processor-
based systems.

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 Shadowing of memory
• BIOS is firmware used to perform hardware
initialization during the booting process
• But for high system performance it should be
accessed from a RAM instead of accessing from a
ROM.
• RAM is volatile and it cannot hold the
configuration data which is copied from the BIOS
when the power supply is switched off. Only a
ROM can hold it permanently.
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 Shadowing of memory
the first step that happens during the boot up is
copying the BIOS to the shadowed RAM and
write protecting the RAM then disabling the
BIOS reading.

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 COMMUNICATION INTERFACE
• Communication Protocol: A set of rules and regulations
that allow two electronic devices to connect to
exchange the data with one and another.

1. Onboard Communication Interface/ Intra system

Interface:
the different communication channels/buses for
interconnecting the various integrated circuits and other
peripherals within the embedded system

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 COMMUNICATION INTERFACE

2. External Communication Interface / Inter

System Interface
the different communication channels/buses
used by the embedded system to
communicate with the external world

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 Onboard Communication Interface/ Intra system
Interface:

1.inter Integrated Circuit ( I2C) Bus

2.Serial Peripheral Interface ( SPI) Bus

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 Communication Types

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 Basic types of communication

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 Asynchronous communication
• The data is transmitted as a series
of bits.
• a series of bytes or ASCII characters
can be sent via a single wire.
• A shift register found either in the
hardware or in the software can be
used to serialize every data byte
into a series of bits.
• These bits are then delivered using
a protocol
• Baud rate varies
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 Asynchronous communication
• Requests need not be targeted to specific
server.
• Service need not be available when request is
made.
• No blocking, so resources could be freed.
• Could use connectionless protocol

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 Disadvantages of Asynchronous Communication
• Overhead of start and stop bits

• False recognition of these bits due to noise on the

channel

• Response times are unpredictable.

• Error handling usually more complex.

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 Synchronous Communication
• a frame (a collection of bytes) is
received or transmitted at the constant
time intervals with uniform phase
differences
• Bits of a full frame are sent in a
prefixed maximum time interval.
• A clock with certain rate has always to
be there for transmitting the bits of all
the bytes
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 Synchronous Communication
• Easy to program
• Outcome is known immediately
• Error recovery easier (usually)
• Better real-time response (usually)

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 Iso Synchronous Communication
1.Asynchronous: This is transmission at any time, with arbitrary
delay between transmission of any two successive data items.

2.Synchronous: This is continuous transmission with no

gaps between transmission of successive data items.

3.Iso Synchronous : This is transmission at regular intervals with

a fixed gap between the transmission of successive data items.
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 Iso Synchronous Communication
• ensures that data flows
continuously and at a
steady rate in close
timing

• Applications: bit flow

for multimedia
containing voice, or
video.
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 Iso synchronous Communication
• An isochronous data transfer system sends blocks of data
asynchronously, in other words the data stream can be
transferred at random intervals.
• Each transmission begins with a start packet. Once the start
packet is transmitted, the data must be delivered with a
guaranteed bandwidth.
• Isochronous data transfer is commonly used for where data
must be delivered within certain time constraints, like
streaming video.
• Isochronous systems do not have an error detection
mechanism (acknowledgment of receipt of packet) because if
an error were detected, time constraints would make it
impossible to resend the data.
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 communication protocols define
1. signals used
2. signal strength in terms of Voltage, Current, Power consumption
3. data lines
4. hand shaking
5. addressing the device
6. wired or wireless
7. the baud rate etc.
• protocols support different speeds, different cable length( Wired), different
packet formats, different hardware interfaces , meant for different
applications.
Choose appropriate communication protocol matching your need.
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 'Inter Integrated Circuit' (𝐼^2C) bus

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 I²C (Inter-Integrated Circuit)
• invented in 1982 by Philips Semiconductor (now NXP
Semiconductors).

• synchronous, multi-master, multi-slave , packet switched,

single-ended, half duplex serial computer bus
• widely used for connecting lower-speed peripheral ICs to
processors and microcontrollers in short-distance, intra-
board communication.
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 I²C (Inter-Integrated Circuit)
• Since October 10, 2006, no licensing fees required to
implement the I²C protocol. However, fees required to
obtain I²C slave addresses allocated

• Several competitors- Siemens AG, Texas Instruments,

ST Microelectronics (formerly SGS-Thomson), Motorola,
Nordic Semiconductor and Intersil, have introduced
compatible I²C products to the market since the mid-
1990s.
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I2C Protocol- synchronous serial bus

The I2C bus consists of three data transfer speeds as

 standard -7 bit address space

 fast-mode – 10 bit address space
 high-speed-mode.

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 Features of I2C
 Multi-master , Number of masters can be connected on the bus.
However, at an instance, master is one, which initiates a data
transfer on SDA (serial data) line and which transmits the data
 two wire bus
1. data line (SDA) serial data line
2. clock line (SCL) serial clock line

 Master controls clock for slaves

 Each connected slave has a unique 7-bit address
 simple master/ slave relationships exist at all times;
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 Features of I2C
 if two or more masters simultaneously initiate data transfer
collision detection and arbitration provided to prevent data
corruption

Arbitration – procedure to insure that only one master has

control of the bus at any instant

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 I2C Protocol steps
 Transfers are byte oriented, MSB first
 Start: SDA (serial data line) goes low while SCL is high
 Master sends address of slave (7-bits) on next 7
clocks
 Master sends read/write request bit
 0-write to slave
 1-read from slave
 Slave ACKs by pulling SDA low on next clock
Data transfers starts
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 Master Writes to Slave

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 Synchronous Serial Bus Fields and its length
• First field of 1 bit─ Start bit
• Second field of 7 bits─ address field. It
defines the slave address, which is
being sent the data frame (of many
bytes) by the master
• Third field of 1 control bit─ defines
whether a read or write cycle is in
progress
• Fourth field of 1 control bit─ defines
whether is the present data is an
acknowledgment (from slave)
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• Fifth field of 8 bits─ I2C device data byte
• Sixth field of 1-bit─ bit NACK (negative
acknowledgement) from the receiver.
• Seventh field of 1 bit ─ stop bit

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 𝟐
𝑰 C (Inter integrated Circuit) protocol
• Any device that is compatible with a I2C
• Range - about 1 meter at 100 Kbaud, or
10 meters at 10 Kbaud

• Fast mode – up to 400 kbits/sec

• High-Speed – up to 3.4 Mbits/sec

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 Master Reads from Slave

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 I2C

data line (SDA) serial data line

clock line (SCL) serial clock line
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 I2C

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 I2C Protocol

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 I2C Protocol

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 Speed – I2C Bus
Standard mode - upto 100 Kbps

Fast Mode- 400 Kbps

Fast Mode + = 1Mbps

High Speed= 3.4Mbps

Ultra High Speed- 5 Mbits

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 Disadvantage of I2C bus • if any device
pull up resistors- "open drain“ , they can pull the holds the
corresponding signal line low, but cannot drive it SDA or SCL
high. line low, it
prevents the
master from
sending
START or
STOP
commands to
reset the bus.

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 Disadvantage of I2C bus
• Need of pull up resistors- resistors
2.2 K on each line between the
SCL and SDA lines and the voltage
source
• A pull up resistor is used to
provide a default state for a signal
line or general purpose
input/ouput (GPIO)

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 Disadvantage of I2C bus

• The assignment of slave addresses is one

weakness of I²C.
• For many devices on bus Seven bits is too few
to prevent address collisions
• I²C supports a limited range of speeds

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 Disadvantage of I2C bus
• Because I²C is a shared bus, there is possibility for any device
to have a fault and hang the entire bus.

• if any device holds the SDA or SCL line low, it prevents the
master from sending START or STOP commands to reset the
bus.

• Thus it is common for designs to include a reset signal that

provides an external method of resetting the bus devices

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 Serial Peripheral Interface (SPI)
• protocol developed by Motorola (1980s)
• commonly used to send data between
microcontrollers and small peripherals
such as shift registers, sensors, and SD
cards, for on board communication.
• separate clock and data lines, along with a
select line to choose the device
• Full-duplex Synchronous communication
• SPI is designed for on-PCB
communications less than 30.48cm
• Applications include Secure Digital cards
and liquid crystal displays.
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 SPI protocol
MOSI - signal is generated by Master,
recipient is the Slave.

MISO - Slaves generate MISO signals and

recipient is the Master.

Serial Clock (SCLK or SCK) - SCLK signal

is generated by the Master to synchronize
data transfers

Slave Select (SS) from master to Chip

Select (CS) of slave - SS signal is
generated by Master to select individual
slave/peripheral devices.

single-master communication protocol

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 Timing diagram SPI
• When SPI master wishes to
send data to a slave selects
slave by pulling the
corresponding SS line low
and it activates the clock
signal at a clock frequency
usable by the master and
the slave. The master
generates information onto
MOSI line while it samples
the MISO line
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Advantages of SPI:
• faster than asynchronous serial communication
• supports multiple slaves
• simple hardware interfacing and lower power
requirements
• Slaves use the master's clock and do not need a
unique address
• Uses only four pins on IC packages, and wires in board
layouts, much fewer than parallel interfaces
• Simple software implementation

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 SPI Disadvantages
• requires more signal lines than other communications
methods
• No hardware flow control by the slave
• No hardware slave acknowledgment
• No error-checking protocol is defined
• master controls all communications (slaves can’t talk directly
to each other)
• requires separate SS lines to each slave, which can be
problematic if numerous slaves are needed.
• supports only one master device
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 Applications
• Interfacing with Sensors, ADC, LCD, touchscreens, video
game controllers
• Interfacing Memory
• Real-time clocks

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 Microcontroller with independent chip selects for
multiple slave devices.

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 SPI
• In typical SPI systems with one master and multiple slaves, a
dedicated chip-select signal is used to address an individual
slave.
• As the number of slaves increase, the number of chip-select
lines.
• In this situation, the board layout of the system can become
quite a challenge.
• This architecture increases hardware and layout complexity.
• layout alternative is daisy-chaining

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 SPI Daisy-chain configuration

Only the first slave in the chain (SLAVE 1) receives the command
data directly from the microcontroller. Every other slave in the
network receives its DIN data from the DOUT output of the
preceding slave in the chain.
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 SPI
• The number of bits is not defined by the protocol
so not limited to only 8bits - it can be any
number of bits.

• useful when daisy chaining SPI slaves, need to set

the number of bits to the sum of all the bits
required by each device

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 SPI Daisy-chain configuration

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 SPI Daisy-chain configuration

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 I2C SPI
can be multi-master and multi-slave SPI can be multi-slave but does not a multi-
master
half-duplex communication protocol. full duplex commination protocol.
has the feature of clock stretching, means if the Clock stretching is not the feature of SPI.
slave is not able to send data fast enough, then
it suppresses the clock to stop the
communication.
only two wire for the communication, one wire needs four wire for communication
is used for the data and the second wire is used
for the clock.
slower than SPI ; draws more power than SPI. SPI is faster; Draws less power

less susceptible to noise than SPI more susceptible to noise than I2C.
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 I2C
cheaper to implement than the SPI
Requires pull-up resistors.
In I2C communication we get the
acknowledgment bit after each byte.
I2C is the address base bus protocol,
we have to send the address of the
slave for the communication.
I2C is better for long distance on board SPI is better for the short distance on
communication.
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SPI
Costly as compare to I2C.
no requirement of pull-up resistor
Acknowledgment bit is not
supported by the SPI communication
protocol.
select the slave using the slave
select (SS) pin
board communication.
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START Condtion:
sbit SDA=P1^7; // initialize the SDA and SCL pins of the STOP Condition:
microcontroller//
void main ()
sbit SCL=P1^6; {
void delay(unsigned int); SDA=0; // Stop processing the data//
SCL=1; //clock is high//
void main () delay();
{ SDA=1; //Stopped//
SDA=1; //processing the data// delay();
SCL=0; //clock signal is low//
SCL=1; //clock is high// }
delay(); Void delay(int p)
SDA=0; //sent the data// {
unsignedinta,b;
delay(); For(a=0;a<255;a++); //delay function//
SCL=0; //clock signal is low// For(b=0;b<p;b++);
} }

Void delay(int p)
{
unsignedinta,b;
For(a=0;a<255;a++); //delay function//
For(b=0;b<p;b++);
} 11/23/2023 126
11/23/2023 127
LPC 1768 I2C-bus serial I/O controllers

• three I2C-bus controllers.

• The I2C-bus is bidirectional for inter-IC control using only two wires:
a Serial Clock line (SCL) and a Serial DAta line (SDA).
• Each device is recognized by a unique address and can operate as
either a receiver-only device (e.g., an LCD driver) or a transmitter
with the capability to both receive and send information (such as
memory).
• Transmitters and/or receivers can operate in either master or slave
mode, depending on whether the chip has to initiate a data transfer
or is only addressed.
• The I2C is a multi-master bus and can be controlled by more than
one bus master connected to it.

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 LPC 1768- SPI serial I/O controller
• one SPI controller.
• SPI is a full duplex serial interface designed to handle multiple masters and
slaves connected to a given bus. Only a single master and a single slave can
communicate on the interface during a given data transfer. During a data transfer
the master always sends 8 bits to 16 bits of data to the slave, and the slave
always sends 8 bits to 16 bits of data to the master.
• Maximum SPI data bit rate of 12.5 Mbit/s
• Synchronous, serial, full duplex communication
• 8 bits to 16 bits per transfer

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• Whenever we shut down the computer all
connections and processes inside stop. How is it that
when we open the computer again it tells the exact
correct time?

• Does the computer not shut down completely when

we shut it down?

• Are there some processes still running in it?

• how does laptop tell the correct time when we take out the
battery (forcibly stop all processes) and start it again after a
few days?
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 REAL TIME CLOCK

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 Difference in RTC and Timer?

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 RTC
• a system component responsible for keeping track of time
.
• RTC holds information like current time (In hours, minutes
and seconds) in 12 hour/24 hour format, date, month, year,
day of the week, etc. and supplies timing reference to the
system.

• RTC functions even in the absence of power

11/23/2023 134
 RTC and Timer
RTC gives real time in human units rather than just giving signals
to process data/instructions

• timer - a specialized clock used for measuring specific time

intervals.

• when pulses generated by RTC module are given to a timer, it

keeps ticking/ counting to a value for specified time interval,
after that value is reached an interrupt can be generated , this
interrupt is particularly called timer interrupt
11/23/2023 135
 RTC and Timer
Parameter Internal Timers RTC
Almost negligible. Of the
High and keeps increasing
Error order of 1 sec in 100
with time
years
Memory space usage High Low
CPU usage High Low
Ease of Interfacing Easy Difficult
Program complexity High Low
Efficiency of system Low High
Achieving goals of the
Difficult Easy
system
Cost
11/23/2023
Low High 136
 RTC
• RTC can be inbuilt or external
• Typically an external RTC need more software overhead for control
and communication (i2c or spi driver, read, set, synchronize,
initialze).
• For internal RTC all timing values are directly accessible, easy to
read or set, no need for any communication.
• RTC ICs run on an alternate power source, which allows it to
continually operate under low power or even when the computer
is turned off.

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 RTC
• ICs on older systems utilize lithium batteries, whereas newer
systems make use super-capacitors ( a high-capacity capacitor
with a capacitance value much higher than other capacitors,
but with lower voltage limits)
• The supercapacitor can be charged and discharged a virtually
unlimited number of times

Lithium battery inside the real-

time clock IC

11/23/2023 138
 RTC
• For Operating System based embedded devices, a timing reference is
essential for synchronising the operations of the OS kernel.

• The RTC can interrupt the OS kernel by asserting the interrupt line of
the processor/controller to which the RTC interrupt line is connected.

• The OS kernel identifies the interrupt in terms of the Interrupt Request

(IRQ) number generated by an interrupt controller.

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 RTC- Applications
• Real Time Clock (RTC) is used for tracking time and
maintaining a calendar.
• Many applications require to keep record of time/date for
occurrence of certain events. RTCs are useful in such
applications.
• RTCs come handy in data logging applications..
• RTCs have several registers that keep a track of time and
date.

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 LPC 1768 RTC
• RTC is clocked by a dedicated RTC oscillator.

• The RTC block includes 20 bytes of battery-powered

backup registers, allowing system status to be stored when the rest of the
chip is powered off.

• Battery power can be supplied from a standard 3 V Lithium button cell.

• The RTC will continue working when the battery voltage drops to as low
as 2.1 V.

• An RTC interrupt can wake up the CPU from any reduced power mode.
11/23/2023 141
 LPC 1768 RTC
• CCR Clock Control Register
• Consolidated Time Registers CTIME 0 CTIME 1 CTIME 2

• Time Counter Registers SEC Seconds

• Counter MIN Minutes Register
• HOUR Hours Register
• DOM -Day of Month Register
• DOW -Day of Week Register
• DOY -Day of Year Register
• MONTH -Months Register
• YEAR -Years Register
• CALIBRATION -Calibration value Register

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 RESET circuit- What happens when 8051 is reset?

• RESET - an active High input.

• RESET remains high for at least two machine cycles and then
becomes active low.

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 Reset circuit activation
Hard reset-
 power on reset
 Board reset/Manual reset

Soft reset –
 Software instruction
 Programmed timer

11/23/2023 144
 Difference between board reset and power-on reset
• Power-on-reset: When switch is made ON
controller/processor is resetted as there will
be signal at reset pin.
• Board reset/Manual reset: done by pressing
a switch that provides the signal at reset pin
of the controller/processor.
• It is usually to reset the controller in the
mid-way with turning OFF the power

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 soft reset /soft reboot.

• happens due to watch dog timer reset or software reset

• The action closes applications and clears any data in RAM

only

• PC is loaded with 00h location

• usually performed to repair malfunctioning applications.

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space crafts are not physically accessible to human
operators. If they are unable to autonomously recover from
faults. What will be the effect?

• these could become permanently disabled

Which hardware should be part of such an embedded system,

so that system will not fail permanently?

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 Watchdog timer
• commonly found in embedded systems and other computer-
controlled equipment where humans cannot easily access the
equipment or would be unable to react to faults in a timely
manner.
• In such systems, the computer cannot depend on a human to
invoke a reboot if it hangs; it must be self-reliant.
• hardware to protect a system from specific software or hardware
failures that may cause the system to stop responding.
• a hardware timer that automatically generates a system reset if an
embedded device hangs because of a software or hardware fault.
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 WDT
• The purpose of the watchdog is to
reset the microcontroller within a
reasonable amount of time if it
enters an erroneous state.
The output of the watchdog
timer is given directly to
• When enabled, the watchdog will the microcontroller reset signal.
generate a system reset if the user Whenever the watchdog
program fails to reload the counter register is not cleared,
watchdog within a predetermined
then it immediately forces to
amount of time
restart the microprocessor or
controller
11/23/2023 149
 Watchdog timer
• predefined timeout -This time is usually configured
and the watchdog timer is activated within the first
few clock cycles after power up.
• The timeout signal is used to initiate corrective
action or actions. The corrective actions typically
include placing the computer system in a safe state
and restoring normal system operation
• restarting a watchdog timer is commonly referred as
kicking" the watchdog

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 watchdog timer
• based on a counter that counts down from
some initial value to zero.

• The embedded software selects the counter's

initial value and periodically restarts it.

• If the counter ever reaches zero before the

software restarts it, the software is
presumed to be malfunctioning and the
processor's reset signal is asserted. The
processor will be restarted

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 External Watchdog Timer
• If the microcontrollers or processors lack
inbuilt watchdog timer, then these are
interfaced with watchdog timers, externally.

• external watchdog timers are enabled

manually by hardware after detecting the
system abnormality functions.

• It has a separate clock source given for better

reliability.

• Disadvantage- High cost

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 WDT
• 8051 microcontroller has no inbuilt
watchdog timer and, therefore, this
must be connected and operated
externally.

• LPC 1768 has Inbuilt WDT.

• The WDT can be clocked from the
internal RC oscillator

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 Advantages of Watchdog Timers
• Resets automatically without human intervention.
• Detects the errors in the program and reboot the system
• Cost sensitive
• Saves the time and money
• No need to monitor the software debugs.
• Increases the system performance.

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 Brown-out Protection Circuit
The processor behaviour may not be predictable if the supply voltage falls
below the recommended operating voltage. It may lead to situations like data
corruption.

It is essential for battery powered devices since there are greater chances for
the battery voltage to drop below the required threshold.

It prevents the processor/controller from unexpected program execution

behaviour when the supply voltage to the processor/controller falls below a
specified voltage.

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 Brown-out Protection Circuit

• It holds the processor/controller in reset state, when the operating

voltage falls below the threshold, until it rises above the threshold
voltage.

• Certain processors/controllers support built in brown-out

protection circuit which monitors the supply voltage internally.

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 Brown-out Protection Circuit
• it can be implemented using external passive
circuits or ICs.
• The transistor conducts always when the
supply voltage VCC is greater than that of the
sum of VBE and VZ.
• The transistor stops conducting when the
supply voltage falls below the sum of VBE
and VZ.
• The values of the resistors can be selected
based on the electrical characteristics.
11/23/2023 157
Brownout detection in LPC 17678
• The LPC17xx include 2-stage monitoring of the
voltage on the VDD(REG)(3V3) pins.
• If this voltage falls below 2.2 V, interrupt signal is
generated to the Vectored Interrupt Controller.
• The second stage of low-voltage detection asserts reset to
inactivate the LPC17xx when the voltage on the
VDD(REG)(3V3) pins falls below 1.85 V.

11/23/2023 158
 Brownout detection in LPC 17678
• This reset prevents alteration of the flash memory as operation of
the various elements of the chip would otherwise become
unreliable due to low voltage.

• The BOD circuit maintains this reset down below 1 V, at which

point the power-on reset circuitry maintains the overall reset.

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 Unit1 complete

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